1 * Marvell Armada 375 Ethernet Controller (PPv2.1)
2 Marvell Armada 7K/8K Ethernet Controller (PPv2.2)
6 - compatible: should be one of:
7 "marvell,armada-375-pp2"
8 "marvell,armada-7k-pp2"
9 - reg: addresses and length of the register sets for the device.
10 For "marvell,armada-375-pp2", must contain the following register
12 - common controller registers
14 - one register area per Ethernet port
15 For "marvell,armada-7k-pp2", must contain the following register
17 - packet processor registers
18 - networking interfaces registers
20 - clocks: pointers to the reference clocks for this device, consequently:
21 - main controller clock (for both armada-375-pp2 and armada-7k-pp2)
22 - GOP clock (for both armada-375-pp2 and armada-7k-pp2)
23 - MG clock (only for armada-7k-pp2)
24 - MG Core clock (only for armada-7k-pp2)
25 - AXI clock (only for armada-7k-pp2)
26 - clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk",
27 "mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2).
29 The ethernet ports are represented by subnodes. At least one port is
32 Required properties (port):
34 - interrupts: interrupt for the port
35 - port-id: ID of the port from the MAC point of view
36 - gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the
37 GOP (Group Of Ports) point of view. This ID is used to index the
38 per-port registers in the second register area.
39 - phy-mode: See ethernet.txt file in the same directory
41 Optional properties (port):
43 - marvell,loopback: port is loopback mode
44 - phy: a phandle to a phy node defining the PHY address (as the reg
45 property, a single integer).
46 - interrupt-names: if more than a single interrupt for rx is given, must
47 be the name associated to the interrupts listed. Valid
48 names are: "tx-cpu0", "tx-cpu1", "tx-cpu2", "tx-cpu3",
50 - marvell,system-controller: a phandle to the system controller.
52 Example for marvell,armada-375-pp2:
55 compatible = "marvell,armada-375-pp2";
56 reg = <0xf0000 0xa000>,
60 clocks = <&gateclk 3>, <&gateclk 19>;
61 clock-names = "pp_clk", "gop_clk";
64 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
71 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
78 Example for marvell,armada-7k-pp2:
80 cpm_ethernet: ethernet@0 {
81 compatible = "marvell,armada-7k-pp22";
82 reg = <0x0 0x100000>, <0x129000 0xb000>;
83 clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>,
84 <&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>;
85 clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";
88 interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,
89 <ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,
90 <ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,
91 <ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,
92 <ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>;
93 interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
94 "tx-cpu3", "rx-shared";
100 interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>,
101 <ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,
102 <ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,
103 <ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,
104 <ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>;
105 interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
106 "tx-cpu3", "rx-shared";
112 interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>,
113 <ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,
114 <ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,
115 <ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,
116 <ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>;
117 interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
118 "tx-cpu3", "rx-shared";