1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC Device Tree Bindings
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
14 # Select every compatible, including the deprecated ones. This way, we
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
17 # as a valid value in the compatible property description
41 # We need to include all the compatibles from schemas that will
42 # include that schemas, otherwise compatible won't validate for
47 - allwinner,sun7i-a20-gmac
65 - description: Combined signal for various interrupt events
66 - description: The interrupt to manage the remote wake-up packet detection
67 - description: The interrupt that occurs when Rx exits the LPI state
81 - description: GMAC main clock
82 - description: Peripheral registers interface clock
84 PTP reference clock. This clock is used for programming the
85 Timestamp Addend Register. If not passed then the system
86 clock will be used and this is fine on some platforms.
105 $ref: /schemas/types.yaml#definitions/phandle
107 AXI BUS Mode parameters. Phandle to a node that can contain the
109 * snps,lpi_en, enable Low Power Interface
110 * snps,xit_frm, unlock on WoL
111 * snps,wr_osr_lmt, max write outstanding req. limit
112 * snps,rd_osr_lmt, max read outstanding req. limit
113 * snps,kbbe, do not cross 1KiB boundary.
114 * snps,blen, this is a vector of supported burst length.
115 * snps,fb, fixed-burst
116 * snps,mb, mixed-burst
117 * snps,rb, rebuild INCRx Burst
120 $ref: /schemas/types.yaml#definitions/phandle
122 Multiple RX Queues parameters. Phandle to a node that can
123 contain the following properties
124 * snps,rx-queues-to-use, number of RX queues to be used in the
126 * Choose one of these RX scheduling algorithms
127 * snps,rx-sched-sp, Strict priority
128 * snps,rx-sched-wsp, Weighted Strict priority
130 * Choose one of these modes
131 * snps,dcb-algorithm, Queue to be enabled as DCB
132 * snps,avb-algorithm, Queue to be enabled as AVB
133 * snps,map-to-dma-channel, Channel to map
134 * Specifiy specific packet routing
135 * snps,route-avcp, AV Untagged Control packets
136 * snps,route-ptp, PTP Packets
137 * snps,route-dcbcp, DCB Control Packets
138 * snps,route-up, Untagged Packets
139 * snps,route-multi-broad, Multicast & Broadcast Packets
140 * snps,priority, RX queue priority (Range 0x0 to 0xF)
143 $ref: /schemas/types.yaml#definitions/phandle
145 Multiple TX Queues parameters. Phandle to a node that can
146 contain the following properties
147 * snps,tx-queues-to-use, number of TX queues to be used in the
149 * Choose one of these TX scheduling algorithms
150 * snps,tx-sched-wrr, Weighted Round Robin
151 * snps,tx-sched-wfq, Weighted Fair Queuing
152 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
153 * snps,tx-sched-sp, Strict priority
155 * snps,weight, TX queue weight (if using a DCB weight
157 * Choose one of these modes
158 * snps,dcb-algorithm, TX queue will be working in DCB
159 * snps,avb-algorithm, TX queue will be working in AVB
160 [Attention] Queue 0 is reserved for legacy traffic
161 and so no AVB is available in this queue.
162 * Configure Credit Base Shaper (if AVB Mode selected)
163 * snps,send_slope, enable Low Power Interface
164 * snps,idle_slope, unlock on WoL
165 * snps,high_credit, max write outstanding req. limit
166 * snps,low_credit, max read outstanding req. limit
167 * snps,priority, TX queue priority (Range 0x0 to 0xF)
174 snps,reset-active-low:
175 $ref: /schemas/types.yaml#definitions/flag
177 Indicates that the PHY Reset is active low
179 snps,reset-delays-us:
181 - $ref: /schemas/types.yaml#definitions/uint32-array
185 Triplet of delays. The 1st cell is reset pre-delay in micro
186 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
187 cell is reset post-delay in micro seconds.
190 $ref: /schemas/types.yaml#definitions/flag
192 Use Address-Aligned Beats
195 $ref: /schemas/types.yaml#definitions/flag
197 Program the DMA to use the fixed burst mode
200 $ref: /schemas/types.yaml#definitions/flag
202 Program the DMA to use the mixed burst mode
204 snps,force_thresh_dma_mode:
205 $ref: /schemas/types.yaml#definitions/flag
207 Force DMA to use the threshold mode for both tx and rx
209 snps,force_sf_dma_mode:
210 $ref: /schemas/types.yaml#definitions/flag
212 Force DMA to use the Store and Forward mode for both tx and
213 rx. This flag is ignored if force_thresh_dma_mode is set.
215 snps,en-tx-lpi-clockgating:
216 $ref: /schemas/types.yaml#definitions/flag
218 Enable gating of the MAC TX clock during TX low-power mode
220 snps,multicast-filter-bins:
221 $ref: /schemas/types.yaml#definitions/uint32
223 Number of multicast filter hash bins supported by this device
226 snps,perfect-filter-entries:
227 $ref: /schemas/types.yaml#definitions/uint32
229 Number of perfect filter entries supported by this device
233 $ref: /schemas/types.yaml#definitions/uint32
235 Port selection speed that can be passed to the core when PCS
236 is supported. For example, this is used in case of SGMII and
242 Creates and registers an MDIO bus.
246 const: snps,dwmac-mdio
256 - phy-connection-type
259 snps,reset-active-low: ["snps,reset-gpio"]
260 snps,reset-delay-us: ["snps,reset-gpio"]
263 - $ref: "ethernet-controller.yaml#"
269 - allwinner,sun7i-a20-gmac
278 - $ref: /schemas/types.yaml#definitions/uint32
281 Programmable Burst Length (tx and rx)
285 - $ref: /schemas/types.yaml#definitions/uint32
288 Tx Programmable Burst Length. If set, DMA tx will use this
289 value rather than snps,pbl.
293 - $ref: /schemas/types.yaml#definitions/uint32
296 Rx Programmable Burst Length. If set, DMA rx will use this
297 value rather than snps,pbl.
300 $ref: /schemas/types.yaml#definitions/flag
302 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
303 rev < 3.50, don\'t multiply the values by 4.
310 - allwinner,sun7i-a20-gmac
319 $ref: /schemas/types.yaml#definitions/flag
321 Enables the TSO feature otherwise it will be managed by
322 MAC HW capability register.
326 stmmac_axi_setup: stmmac-axi-config {
327 snps,wr_osr_lmt = <0xf>;
328 snps,rd_osr_lmt = <0xf>;
329 snps,blen = <256 128 64 32 0 0 0>;
332 mtl_rx_setup: rx-queues-config {
333 snps,rx-queues-to-use = <1>;
337 snps,map-to-dma-channel = <0x0>;
338 snps,priority = <0x0>;
342 mtl_tx_setup: tx-queues-config {
343 snps,tx-queues-to-use = <2>;
346 snps,weight = <0x10>;
348 snps,priority = <0x0>;
353 snps,send_slope = <0x1000>;
354 snps,idle_slope = <0x1000>;
355 snps,high_credit = <0x3E800>;
356 snps,low_credit = <0xFFC18000>;
357 snps,priority = <0x1>;
361 gmac0: ethernet@e0800000 {
362 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
363 reg = <0xe0800000 0x8000>;
364 interrupt-parent = <&vic1>;
365 interrupts = <24 23 22>;
366 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
367 mac-address = [000000000000]; /* Filled in by U-Boot */
368 max-frame-size = <3800>;
369 phy-connection-type = "gmii";
370 snps,multicast-filter-bins = <256>;
371 snps,perfect-filter-entries = <128>;
372 rx-fifo-depth = <16384>;
373 tx-fifo-depth = <16384>;
375 clock-names = "stmmaceth";
376 snps,axi-config = <&stmmac_axi_setup>;
377 snps,mtl-rx-config = <&mtl_rx_setup>;
378 snps,mtl-tx-config = <&mtl_tx_setup>;
380 #address-cells = <1>;
382 compatible = "snps,dwmac-mdio";
383 phy1: ethernet-phy@0 {
389 # FIXME: We should set it, but it would report all the generic
390 # properties as additional properties.
391 # additionalProperties: false