3 This document describes the Linux kernel Makefiles.
10 --- 3.1 Goal definitions
11 --- 3.2 Built-in object goals - obj-y
12 --- 3.3 Loadable module goals - obj-m
13 --- 3.4 Objects which export symbols
14 --- 3.5 Library file goals - lib-y
15 --- 3.6 Descending down in directories
16 --- 3.7 Compilation flags
17 --- 3.8 Command line dependency
18 --- 3.9 Dependency tracking
19 --- 3.10 Special Rules
20 --- 3.11 $(CC) support functions
21 --- 3.12 $(LD) support functions
23 === 4 Host Program support
24 --- 4.1 Simple Host Program
25 --- 4.2 Composite Host Programs
26 --- 4.3 Using C++ for host programs
27 --- 4.4 Controlling compiler options for host programs
28 --- 4.5 When host programs are actually built
29 --- 4.6 Using hostprogs-$(CONFIG_FOO)
31 === 5 Kbuild clean infrastructure
33 === 6 Architecture Makefiles
34 --- 6.1 Set variables to tweak the build to the architecture
35 --- 6.2 Add prerequisites to archheaders:
36 --- 6.3 Add prerequisites to archprepare:
37 --- 6.4 List directories to visit when descending
38 --- 6.5 Architecture-specific boot images
39 --- 6.6 Building non-kbuild targets
40 --- 6.7 Commands useful for building a boot image
41 --- 6.8 Custom kbuild commands
42 --- 6.9 Preprocessing linker scripts
43 --- 6.10 Generic header files
44 --- 6.11 Post-link pass
46 === 7 Kbuild syntax for exported headers
47 --- 7.1 no-export-headers
52 === 8 Kbuild Variables
53 === 9 Makefile language
59 The Makefiles have five parts:
61 Makefile the top Makefile.
62 .config the kernel configuration file.
63 arch/$(ARCH)/Makefile the arch Makefile.
64 scripts/Makefile.* common rules etc. for all kbuild Makefiles.
65 kbuild Makefiles there are about 500 of these.
67 The top Makefile reads the .config file, which comes from the kernel
68 configuration process.
70 The top Makefile is responsible for building two major products: vmlinux
71 (the resident kernel image) and modules (any module files).
72 It builds these goals by recursively descending into the subdirectories of
73 the kernel source tree.
74 The list of subdirectories which are visited depends upon the kernel
75 configuration. The top Makefile textually includes an arch Makefile
76 with the name arch/$(ARCH)/Makefile. The arch Makefile supplies
77 architecture-specific information to the top Makefile.
79 Each subdirectory has a kbuild Makefile which carries out the commands
80 passed down from above. The kbuild Makefile uses information from the
81 .config file to construct various file lists used by kbuild to build
82 any built-in or modular targets.
84 scripts/Makefile.* contains all the definitions/rules etc. that
85 are used to build the kernel based on the kbuild makefiles.
90 People have four different relationships with the kernel Makefiles.
92 *Users* are people who build kernels. These people type commands such as
93 "make menuconfig" or "make". They usually do not read or edit
94 any kernel Makefiles (or any other source files).
96 *Normal developers* are people who work on features such as device
97 drivers, file systems, and network protocols. These people need to
98 maintain the kbuild Makefiles for the subsystem they are
99 working on. In order to do this effectively, they need some overall
100 knowledge about the kernel Makefiles, plus detailed knowledge about the
101 public interface for kbuild.
103 *Arch developers* are people who work on an entire architecture, such
104 as sparc or ia64. Arch developers need to know about the arch Makefile
105 as well as kbuild Makefiles.
107 *Kbuild developers* are people who work on the kernel build system itself.
108 These people need to know about all aspects of the kernel Makefiles.
110 This document is aimed towards normal developers and arch developers.
113 === 3 The kbuild files
115 Most Makefiles within the kernel are kbuild Makefiles that use the
116 kbuild infrastructure. This chapter introduces the syntax used in the
118 The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
119 be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
122 Section 3.1 "Goal definitions" is a quick intro, further chapters provide
123 more details, with real examples.
125 --- 3.1 Goal definitions
127 Goal definitions are the main part (heart) of the kbuild Makefile.
128 These lines define the files to be built, any special compilation
129 options, and any subdirectories to be entered recursively.
131 The most simple kbuild makefile contains one line:
136 This tells kbuild that there is one object in that directory, named
137 foo.o. foo.o will be built from foo.c or foo.S.
139 If foo.o shall be built as a module, the variable obj-m is used.
140 Therefore the following pattern is often used:
143 obj-$(CONFIG_FOO) += foo.o
145 $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
146 If CONFIG_FOO is neither y nor m, then the file will not be compiled
149 --- 3.2 Built-in object goals - obj-y
151 The kbuild Makefile specifies object files for vmlinux
152 in the $(obj-y) lists. These lists depend on the kernel
155 Kbuild compiles all the $(obj-y) files. It then calls
156 "$(AR) rcSTP" to merge these files into one built-in.a file.
157 This is a thin archive without a symbol table. It will be later
158 linked into vmlinux by scripts/link-vmlinux.sh
160 The order of files in $(obj-y) is significant. Duplicates in
161 the lists are allowed: the first instance will be linked into
162 built-in.a and succeeding instances will be ignored.
164 Link order is significant, because certain functions
165 (module_init() / __initcall) will be called during boot in the
166 order they appear. So keep in mind that changing the link
167 order may e.g. change the order in which your SCSI
168 controllers are detected, and thus your disks are renumbered.
171 #drivers/isdn/i4l/Makefile
172 # Makefile for the kernel ISDN subsystem and device drivers.
173 # Each configuration option enables a list of files.
174 obj-$(CONFIG_ISDN_I4L) += isdn.o
175 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
177 --- 3.3 Loadable module goals - obj-m
179 $(obj-m) specifies object files which are built as loadable
182 A module may be built from one source file or several source
183 files. In the case of one source file, the kbuild makefile
184 simply adds the file to $(obj-m).
187 #drivers/isdn/i4l/Makefile
188 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
190 Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
192 If a kernel module is built from several source files, you specify
193 that you want to build a module in the same way as above; however,
194 kbuild needs to know which object files you want to build your
195 module from, so you have to tell it by setting a $(<module_name>-y)
199 #drivers/isdn/i4l/Makefile
200 obj-$(CONFIG_ISDN_I4L) += isdn.o
201 isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o
203 In this example, the module name will be isdn.o. Kbuild will
204 compile the objects listed in $(isdn-y) and then run
205 "$(LD) -r" on the list of these files to generate isdn.o.
207 Due to kbuild recognizing $(<module_name>-y) for composite objects,
208 you can use the value of a CONFIG_ symbol to optionally include an
209 object file as part of a composite object.
213 obj-$(CONFIG_EXT2_FS) += ext2.o
214 ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \
215 namei.o super.o symlink.o
216 ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \
219 In this example, xattr.o, xattr_user.o and xattr_trusted.o are only
220 part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)
223 Note: Of course, when you are building objects into the kernel,
224 the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
225 kbuild will build an ext2.o file for you out of the individual
226 parts and then link this into built-in.a, as you would expect.
228 --- 3.4 Objects which export symbols
230 No special notation is required in the makefiles for
231 modules exporting symbols.
233 --- 3.5 Library file goals - lib-y
235 Objects listed with obj-* are used for modules, or
236 combined in a built-in.a for that specific directory.
237 There is also the possibility to list objects that will
238 be included in a library, lib.a.
239 All objects listed with lib-y are combined in a single
240 library for that directory.
241 Objects that are listed in obj-y and additionally listed in
242 lib-y will not be included in the library, since they will
243 be accessible anyway.
244 For consistency, objects listed in lib-m will be included in lib.a.
246 Note that the same kbuild makefile may list files to be built-in
247 and to be part of a library. Therefore the same directory
248 may contain both a built-in.a and a lib.a file.
251 #arch/x86/lib/Makefile
254 This will create a library lib.a based on delay.o. For kbuild to
255 actually recognize that there is a lib.a being built, the directory
256 shall be listed in libs-y.
257 See also "6.4 List directories to visit when descending".
259 Use of lib-y is normally restricted to lib/ and arch/*/lib.
261 --- 3.6 Descending down in directories
263 A Makefile is only responsible for building objects in its own
264 directory. Files in subdirectories should be taken care of by
265 Makefiles in these subdirs. The build system will automatically
266 invoke make recursively in subdirectories, provided you let it know of
269 To do so, obj-y and obj-m are used.
270 ext2 lives in a separate directory, and the Makefile present in fs/
271 tells kbuild to descend down using the following assignment.
275 obj-$(CONFIG_EXT2_FS) += ext2/
277 If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
278 the corresponding obj- variable will be set, and kbuild will descend
279 down in the ext2 directory.
280 Kbuild only uses this information to decide that it needs to visit
281 the directory, it is the Makefile in the subdirectory that
282 specifies what is modular and what is built-in.
284 It is good practice to use a CONFIG_ variable when assigning directory
285 names. This allows kbuild to totally skip the directory if the
286 corresponding CONFIG_ option is neither 'y' nor 'm'.
288 --- 3.7 Compilation flags
290 ccflags-y, asflags-y and ldflags-y
291 These three flags apply only to the kbuild makefile in which they
292 are assigned. They are used for all the normal cc, as and ld
293 invocations happening during a recursive build.
294 Note: Flags with the same behaviour were previously named:
295 EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.
296 They are still supported but their usage is deprecated.
298 ccflags-y specifies options for compiling with $(CC).
301 # drivers/acpi/acpica/Makefile
302 ccflags-y := -Os -D_LINUX -DBUILDING_ACPICA
303 ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT
305 This variable is necessary because the top Makefile owns the
306 variable $(KBUILD_CFLAGS) and uses it for compilation flags for the
309 asflags-y specifies options for assembling with $(AS).
312 #arch/sparc/kernel/Makefile
315 ldflags-y specifies options for linking with $(LD).
318 #arch/cris/boot/compressed/Makefile
319 ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds
321 subdir-ccflags-y, subdir-asflags-y
322 The two flags listed above are similar to ccflags-y and asflags-y.
323 The difference is that the subdir- variants have effect for the kbuild
324 file where they are present and all subdirectories.
325 Options specified using subdir-* are added to the commandline before
326 the options specified using the non-subdir variants.
329 subdir-ccflags-y := -Werror
333 CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
336 $(CFLAGS_$@) specifies per-file options for $(CC). The $@
337 part has a literal value which specifies the file that it is for.
340 # drivers/scsi/Makefile
341 CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF
342 CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
345 These two lines specify compilation flags for aha152x.o and gdth.o.
347 $(AFLAGS_$@) is a similar feature for source files in assembly
351 # arch/arm/kernel/Makefile
352 AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
353 AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
354 AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
357 --- 3.9 Dependency tracking
359 Kbuild tracks dependencies on the following:
360 1) All prerequisite files (both *.c and *.h)
361 2) CONFIG_ options used in all prerequisite files
362 3) Command-line used to compile target
364 Thus, if you change an option to $(CC) all affected files will
367 --- 3.10 Special Rules
369 Special rules are used when the kbuild infrastructure does
370 not provide the required support. A typical example is
371 header files generated during the build process.
372 Another example are the architecture-specific Makefiles which
373 need special rules to prepare boot images etc.
375 Special rules are written as normal Make rules.
376 Kbuild is not executing in the directory where the Makefile is
377 located, so all special rules shall provide a relative
378 path to prerequisite files and target files.
380 Two variables are used when defining special rules:
383 $(src) is a relative path which points to the directory
384 where the Makefile is located. Always use $(src) when
385 referring to files located in the src tree.
388 $(obj) is a relative path which points to the directory
389 where the target is saved. Always use $(obj) when
390 referring to generated files.
393 #drivers/scsi/Makefile
394 $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
395 $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
397 This is a special rule, following the normal syntax
399 The target file depends on two prerequisite files. References
400 to the target file are prefixed with $(obj), references
401 to prerequisites are referenced with $(src) (because they are not
405 echoing information to user in a rule is often a good practice
406 but when execution "make -s" one does not expect to see any output
407 except for warnings/errors.
408 To support this kbuild defines $(kecho) which will echo out the
409 text following $(kecho) to stdout except if "make -s" is used.
412 #arch/blackfin/boot/Makefile
413 $(obj)/vmImage: $(obj)/vmlinux.gz
414 $(call if_changed,uimage)
415 @$(kecho) 'Kernel: $@ is ready'
418 --- 3.11 $(CC) support functions
420 The kernel may be built with several different versions of
421 $(CC), each supporting a unique set of features and options.
422 kbuild provides basic support to check for valid options for $(CC).
423 $(CC) is usually the gcc compiler, but other alternatives are
427 as-option is used to check if $(CC) -- when used to compile
428 assembler (*.S) files -- supports the given option. An optional
429 second option may be specified if the first option is not supported.
433 cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
435 In the above example, cflags-y will be assigned the option
436 -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
437 The second argument is optional, and if supplied will be used
438 if first argument is not supported.
441 cc-ldoption is used to check if $(CC) when used to link object files
442 supports the given option. An optional second option may be
443 specified if first option are not supported.
446 #arch/x86/kernel/Makefile
447 vsyscall-flags += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
449 In the above example, vsyscall-flags will be assigned the option
450 -Wl$(comma)--hash-style=sysv if it is supported by $(CC).
451 The second argument is optional, and if supplied will be used
452 if first argument is not supported.
455 as-instr checks if the assembler reports a specific instruction
456 and then outputs either option1 or option2
457 C escapes are supported in the test instruction
458 Note: as-instr-option uses KBUILD_AFLAGS for $(AS) options
461 cc-option is used to check if $(CC) supports a given option, and if
462 not supported to use an optional second option.
466 cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
468 In the above example, cflags-y will be assigned the option
469 -march=pentium-mmx if supported by $(CC), otherwise -march=i586.
470 The second argument to cc-option is optional, and if omitted,
471 cflags-y will be assigned no value if first option is not supported.
472 Note: cc-option uses KBUILD_CFLAGS for $(CC) options
475 cc-option-yn is used to check if gcc supports a given option
476 and return 'y' if supported, otherwise 'n'.
480 biarch := $(call cc-option-yn, -m32)
481 aflags-$(biarch) += -a32
482 cflags-$(biarch) += -m32
484 In the above example, $(biarch) is set to y if $(CC) supports the -m32
485 option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
486 and $(cflags-y) will be assigned the values -a32 and -m32,
488 Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options
491 cc-disable-warning checks if gcc supports a given warning and returns
492 the commandline switch to disable it. This special function is needed,
493 because gcc 4.4 and later accept any unknown -Wno-* option and only
494 warn about it if there is another warning in the source file.
497 KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
499 In the above example, -Wno-unused-but-set-variable will be added to
500 KBUILD_CFLAGS only if gcc really accepts it.
503 cc-ifversion tests the version of $(CC) and equals the fourth parameter
504 if version expression is true, or the fifth (if given) if the version
508 #fs/reiserfs/Makefile
509 ccflags-y := $(call cc-ifversion, -lt, 0402, -O1)
511 In this example, ccflags-y will be assigned the value -O1 if the
512 $(CC) version is less than 4.2.
513 cc-ifversion takes all the shell operators:
514 -eq, -ne, -lt, -le, -gt, and -ge
515 The third parameter may be a text as in this example, but it may also
516 be an expanded variable or a macro.
519 cc-cross-prefix is used to check if there exists a $(CC) in path with
520 one of the listed prefixes. The first prefix where there exist a
521 prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found
522 then nothing is returned.
523 Additional prefixes are separated by a single space in the
524 call of cc-cross-prefix.
525 This functionality is useful for architecture Makefiles that try
526 to set CROSS_COMPILE to well-known values but may have several
527 values to select between.
528 It is recommended only to try to set CROSS_COMPILE if it is a cross
529 build (host arch is different from target arch). And if CROSS_COMPILE
530 is already set then leave it with the old value.
534 ifneq ($(SUBARCH),$(ARCH))
535 ifeq ($(CROSS_COMPILE),)
536 CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-)
540 --- 3.12 $(LD) support functions
543 ld-option is used to check if $(LD) supports the supplied option.
544 ld-option takes two options as arguments.
545 The second argument is an optional option that can be used if the
546 first option is not supported by $(LD).
550 LDFLAGS_vmlinux += $(call ld-option, -X)
553 === 4 Host Program support
555 Kbuild supports building executables on the host for use during the
557 Two steps are required in order to use a host executable.
559 The first step is to tell kbuild that a host program exists. This is
560 done utilising the variable hostprogs-y.
562 The second step is to add an explicit dependency to the executable.
563 This can be done in two ways. Either add the dependency in a rule,
564 or utilise the variable $(always).
565 Both possibilities are described in the following.
567 --- 4.1 Simple Host Program
569 In some cases there is a need to compile and run a program on the
570 computer where the build is running.
571 The following line tells kbuild that the program bin2hex shall be
572 built on the build host.
575 hostprogs-y := bin2hex
577 Kbuild assumes in the above example that bin2hex is made from a single
578 c-source file named bin2hex.c located in the same directory as
581 --- 4.2 Composite Host Programs
583 Host programs can be made up based on composite objects.
584 The syntax used to define composite objects for host programs is
585 similar to the syntax used for kernel objects.
586 $(<executable>-objs) lists all objects used to link the final
590 #scripts/lxdialog/Makefile
591 hostprogs-y := lxdialog
592 lxdialog-objs := checklist.o lxdialog.o
594 Objects with extension .o are compiled from the corresponding .c
595 files. In the above example, checklist.c is compiled to checklist.o
596 and lxdialog.c is compiled to lxdialog.o.
597 Finally, the two .o files are linked to the executable, lxdialog.
598 Note: The syntax <executable>-y is not permitted for host-programs.
600 --- 4.3 Using C++ for host programs
602 kbuild offers support for host programs written in C++. This was
603 introduced solely to support kconfig, and is not recommended
607 #scripts/kconfig/Makefile
609 qconf-cxxobjs := qconf.o
611 In the example above the executable is composed of the C++ file
612 qconf.cc - identified by $(qconf-cxxobjs).
614 If qconf is composed of a mixture of .c and .cc files, then an
615 additional line can be used to identify this.
618 #scripts/kconfig/Makefile
620 qconf-cxxobjs := qconf.o
621 qconf-objs := check.o
623 --- 4.4 Controlling compiler options for host programs
625 When compiling host programs, it is possible to set specific flags.
626 The programs will always be compiled utilising $(HOSTCC) passed
627 the options specified in $(KBUILD_HOSTCFLAGS).
628 To set flags that will take effect for all host programs created
629 in that Makefile, use the variable HOST_EXTRACFLAGS.
632 #scripts/lxdialog/Makefile
633 HOST_EXTRACFLAGS += -I/usr/include/ncurses
635 To set specific flags for a single file the following construction
639 #arch/ppc64/boot/Makefile
640 HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
642 It is also possible to specify additional options to the linker.
645 #scripts/kconfig/Makefile
646 HOSTLDLIBS_qconf := -L$(QTDIR)/lib
648 When linking qconf, it will be passed the extra option
651 --- 4.5 When host programs are actually built
653 Kbuild will only build host-programs when they are referenced
655 This is possible in two ways:
657 (1) List the prerequisite explicitly in a special rule.
660 #drivers/pci/Makefile
661 hostprogs-y := gen-devlist
662 $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
663 ( cd $(obj); ./gen-devlist ) < $<
665 The target $(obj)/devlist.h will not be built before
666 $(obj)/gen-devlist is updated. Note that references to
667 the host programs in special rules must be prefixed with $(obj).
670 When there is no suitable special rule, and the host program
671 shall be built when a makefile is entered, the $(always)
672 variable shall be used.
675 #scripts/lxdialog/Makefile
676 hostprogs-y := lxdialog
677 always := $(hostprogs-y)
679 This will tell kbuild to build lxdialog even if not referenced in
682 --- 4.6 Using hostprogs-$(CONFIG_FOO)
684 A typical pattern in a Kbuild file looks like this:
688 hostprogs-$(CONFIG_KALLSYMS) += kallsyms
690 Kbuild knows about both 'y' for built-in and 'm' for module.
691 So if a config symbol evaluates to 'm', kbuild will still build
692 the binary. In other words, Kbuild handles hostprogs-m exactly
693 like hostprogs-y. But only hostprogs-y is recommended to be used
694 when no CONFIG symbols are involved.
696 === 5 Kbuild clean infrastructure
698 "make clean" deletes most generated files in the obj tree where the kernel
699 is compiled. This includes generated files such as host programs.
700 Kbuild knows targets listed in $(hostprogs-y), $(hostprogs-m), $(always),
701 $(extra-y) and $(targets). They are all deleted during "make clean".
702 Files matching the patterns "*.[oas]", "*.ko", plus some additional files
703 generated by kbuild are deleted all over the kernel src tree when
704 "make clean" is executed.
706 Additional files can be specified in kbuild makefiles by use of $(clean-files).
710 clean-files := crc32table.h
712 When executing "make clean", the file "crc32table.h" will be deleted.
713 Kbuild will assume files to be in the same relative directory as the
714 Makefile, except if prefixed with $(objtree).
716 To delete a directory hierarchy use:
719 #scripts/package/Makefile
720 clean-dirs := $(objtree)/debian/
722 This will delete the directory debian in the toplevel directory, including all
725 To exclude certain files from make clean, use the $(no-clean-files) variable.
726 This is only a special case used in the top level Kbuild file:
730 no-clean-files := $(bounds-file) $(offsets-file)
732 Usually kbuild descends down in subdirectories due to "obj-* := dir/",
733 but in the architecture makefiles where the kbuild infrastructure
734 is not sufficient this sometimes needs to be explicit.
737 #arch/x86/boot/Makefile
738 subdir- := compressed/
740 The above assignment instructs kbuild to descend down in the
741 directory compressed/ when "make clean" is executed.
743 To support the clean infrastructure in the Makefiles that build the
744 final bootimage there is an optional target named archclean:
749 $(Q)$(MAKE) $(clean)=arch/x86/boot
751 When "make clean" is executed, make will descend down in arch/x86/boot,
752 and clean as usual. The Makefile located in arch/x86/boot/ may use
753 the subdir- trick to descend further down.
755 Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
756 included in the top level makefile, and the kbuild infrastructure
757 is not operational at that point.
759 Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will
760 be visited during "make clean".
762 === 6 Architecture Makefiles
764 The top level Makefile sets up the environment and does the preparation,
765 before starting to descend down in the individual directories.
766 The top level makefile contains the generic part, whereas
767 arch/$(ARCH)/Makefile contains what is required to set up kbuild
768 for said architecture.
769 To do so, arch/$(ARCH)/Makefile sets up a number of variables and defines
772 When kbuild executes, the following steps are followed (roughly):
773 1) Configuration of the kernel => produce .config
774 2) Store kernel version in include/linux/version.h
775 3) Updating all other prerequisites to the target prepare:
776 - Additional prerequisites are specified in arch/$(ARCH)/Makefile
777 4) Recursively descend down in all directories listed in
778 init-* core* drivers-* net-* libs-* and build all targets.
779 - The values of the above variables are expanded in arch/$(ARCH)/Makefile.
780 5) All object files are then linked and the resulting file vmlinux is
781 located at the root of the obj tree.
782 The very first objects linked are listed in head-y, assigned by
783 arch/$(ARCH)/Makefile.
784 6) Finally, the architecture-specific part does any required post processing
785 and builds the final bootimage.
786 - This includes building boot records
787 - Preparing initrd images and the like
790 --- 6.1 Set variables to tweak the build to the architecture
792 LDFLAGS Generic $(LD) options
794 Flags used for all invocations of the linker.
795 Often specifying the emulation is sufficient.
799 LDFLAGS := -m elf_s390
800 Note: ldflags-y can be used to further customise
801 the flags used. See chapter 3.7.
803 LDFLAGS_vmlinux Options for $(LD) when linking vmlinux
805 LDFLAGS_vmlinux is used to specify additional flags to pass to
806 the linker when linking the final vmlinux image.
807 LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
811 LDFLAGS_vmlinux := -e stext
813 OBJCOPYFLAGS objcopy flags
815 When $(call if_changed,objcopy) is used to translate a .o file,
816 the flags specified in OBJCOPYFLAGS will be used.
817 $(call if_changed,objcopy) is often used to generate raw binaries on
822 OBJCOPYFLAGS := -O binary
824 #arch/s390/boot/Makefile
825 $(obj)/image: vmlinux FORCE
826 $(call if_changed,objcopy)
828 In this example, the binary $(obj)/image is a binary version of
829 vmlinux. The usage of $(call if_changed,xxx) will be described later.
831 KBUILD_AFLAGS $(AS) assembler flags
833 Default value - see top level Makefile
834 Append or modify as required per architecture.
837 #arch/sparc64/Makefile
838 KBUILD_AFLAGS += -m64 -mcpu=ultrasparc
840 KBUILD_CFLAGS $(CC) compiler flags
842 Default value - see top level Makefile
843 Append or modify as required per architecture.
845 Often, the KBUILD_CFLAGS variable depends on the configuration.
848 #arch/x86/boot/compressed/Makefile
849 cflags-$(CONFIG_X86_32) := -march=i386
850 cflags-$(CONFIG_X86_64) := -mcmodel=small
851 KBUILD_CFLAGS += $(cflags-y)
853 Many arch Makefiles dynamically run the target C compiler to
854 probe supported options:
859 cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\
860 -march=pentium2,-march=i686)
862 # Disable unit-at-a-time mode ...
863 KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)
867 The first example utilises the trick that a config option expands
868 to 'y' when selected.
870 KBUILD_AFLAGS_KERNEL $(AS) options specific for built-in
872 $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile
873 resident kernel code.
875 KBUILD_AFLAGS_MODULE Options for $(AS) when building modules
877 $(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that
879 From commandline AFLAGS_MODULE shall be used (see kbuild.txt).
881 KBUILD_CFLAGS_KERNEL $(CC) options specific for built-in
883 $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile
884 resident kernel code.
886 KBUILD_CFLAGS_MODULE Options for $(CC) when building modules
888 $(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that
890 From commandline CFLAGS_MODULE shall be used (see kbuild.txt).
892 KBUILD_LDFLAGS_MODULE Options for $(LD) when linking modules
894 $(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options
895 used when linking modules. This is often a linker script.
896 From commandline LDFLAGS_MODULE shall be used (see kbuild.txt).
898 KBUILD_ARFLAGS Options for $(AR) when creating archives
900 $(KBUILD_ARFLAGS) set by the top level Makefile to "D" (deterministic
901 mode) if this option is supported by $(AR).
903 ARCH_CPPFLAGS, ARCH_AFLAGS, ARCH_CFLAGS Overrides the kbuild defaults
905 These variables are appended to the KBUILD_CPPFLAGS,
906 KBUILD_AFLAGS, and KBUILD_CFLAGS, respectively, after the
907 top-level Makefile has set any other flags. This provides a
908 means for an architecture to override the defaults.
911 --- 6.2 Add prerequisites to archheaders:
913 The archheaders: rule is used to generate header files that
914 may be installed into user space by "make header_install" or
915 "make headers_install_all". In order to support
916 "make headers_install_all", this target has to be able to run
917 on an unconfigured tree, or a tree configured for another
920 It is run before "make archprepare" when run on the
924 --- 6.3 Add prerequisites to archprepare:
926 The archprepare: rule is used to list prerequisites that need to be
927 built before starting to descend down in the subdirectories.
928 This is usually used for header files containing assembler constants.
932 archprepare: maketools
934 In this example, the file target maketools will be processed
935 before descending down in the subdirectories.
936 See also chapter XXX-TODO that describe how kbuild supports
937 generating offset header files.
940 --- 6.4 List directories to visit when descending
942 An arch Makefile cooperates with the top Makefile to define variables
943 which specify how to build the vmlinux file. Note that there is no
944 corresponding arch-specific section for modules; the module-building
945 machinery is all architecture-independent.
948 head-y, init-y, core-y, libs-y, drivers-y, net-y
950 $(head-y) lists objects to be linked first in vmlinux.
951 $(libs-y) lists directories where a lib.a archive can be located.
952 The rest list directories where a built-in.a object file can be
955 $(init-y) objects will be located after $(head-y).
956 Then the rest follows in this order:
957 $(core-y), $(libs-y), $(drivers-y) and $(net-y).
959 The top level Makefile defines values for all generic directories,
960 and arch/$(ARCH)/Makefile only adds architecture-specific directories.
963 #arch/sparc64/Makefile
964 core-y += arch/sparc64/kernel/
965 libs-y += arch/sparc64/prom/ arch/sparc64/lib/
966 drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
969 --- 6.5 Architecture-specific boot images
971 An arch Makefile specifies goals that take the vmlinux file, compress
972 it, wrap it in bootstrapping code, and copy the resulting files
973 somewhere. This includes various kinds of installation commands.
974 The actual goals are not standardized across architectures.
976 It is common to locate any additional processing in a boot/
977 directory below arch/$(ARCH)/.
979 Kbuild does not provide any smart way to support building a
980 target specified in boot/. Therefore arch/$(ARCH)/Makefile shall
981 call make manually to build a target in boot/.
983 The recommended approach is to include shortcuts in
984 arch/$(ARCH)/Makefile, and use the full path when calling down
985 into the arch/$(ARCH)/boot/Makefile.
989 boot := arch/x86/boot
991 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
993 "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
994 make in a subdirectory.
996 There are no rules for naming architecture-specific targets,
997 but executing "make help" will list all relevant targets.
998 To support this, $(archhelp) must be defined.
1003 echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
1006 When make is executed without arguments, the first goal encountered
1007 will be built. In the top level Makefile the first goal present
1009 An architecture shall always, per default, build a bootable image.
1010 In "make help", the default goal is highlighted with a '*'.
1011 Add a new prerequisite to all: to select a default goal different
1018 When "make" is executed without arguments, bzImage will be built.
1020 --- 6.6 Building non-kbuild targets
1024 extra-y specifies additional targets created in the current
1025 directory, in addition to any targets specified by obj-*.
1027 Listing all targets in extra-y is required for two purposes:
1028 1) Enable kbuild to check changes in command lines
1029 - When $(call if_changed,xxx) is used
1030 2) kbuild knows what files to delete during "make clean"
1033 #arch/x86/kernel/Makefile
1034 extra-y := head.o init_task.o
1036 In this example, extra-y is used to list object files that
1037 shall be built, but shall not be linked as part of built-in.a.
1040 --- 6.7 Commands useful for building a boot image
1042 Kbuild provides a few macros that are useful when building a
1047 if_changed is the infrastructure used for the following commands.
1050 target: source(s) FORCE
1051 $(call if_changed,ld/objcopy/gzip/...)
1053 When the rule is evaluated, it is checked to see if any files
1054 need an update, or the command line has changed since the last
1055 invocation. The latter will force a rebuild if any options
1056 to the executable have changed.
1057 Any target that utilises if_changed must be listed in $(targets),
1058 otherwise the command line check will fail, and the target will
1060 Assignments to $(targets) are without $(obj)/ prefix.
1061 if_changed may be used in conjunction with custom commands as
1062 defined in 6.8 "Custom kbuild commands".
1064 Note: It is a typical mistake to forget the FORCE prerequisite.
1065 Another common pitfall is that whitespace is sometimes
1066 significant; for instance, the below will fail (note the extra space
1068 target: source(s) FORCE
1069 #WRONG!# $(call if_changed, ld/objcopy/gzip/...)
1071 Note: if_changed should not be used more than once per target.
1072 It stores the executed command in a corresponding .cmd
1073 file and multiple calls would result in overwrites and
1074 unwanted results when the target is up to date and only the
1075 tests on changed commands trigger execution of commands.
1078 Link target. Often, LDFLAGS_$@ is used to set specific options to ld.
1081 #arch/x86/boot/Makefile
1082 LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
1083 LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
1085 targets += setup setup.o bootsect bootsect.o
1086 $(obj)/setup $(obj)/bootsect: %: %.o FORCE
1087 $(call if_changed,ld)
1089 In this example, there are two possible targets, requiring different
1090 options to the linker. The linker options are specified using the
1091 LDFLAGS_$@ syntax - one for each potential target.
1092 $(targets) are assigned all potential targets, by which kbuild knows
1093 the targets and will:
1094 1) check for commandline changes
1095 2) delete target during make clean
1097 The ": %: %.o" part of the prerequisite is a shorthand that
1098 frees us from listing the setup.o and bootsect.o files.
1099 Note: It is a common mistake to forget the "targets :=" assignment,
1100 resulting in the target file being recompiled for no
1104 Copy binary. Uses OBJCOPYFLAGS usually specified in
1105 arch/$(ARCH)/Makefile.
1106 OBJCOPYFLAGS_$@ may be used to set additional options.
1109 Compress target. Use maximum compression to compress target.
1112 #arch/x86/boot/compressed/Makefile
1113 $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
1114 $(call if_changed,gzip)
1117 Create flattened device tree blob object suitable for linking
1118 into vmlinux. Device tree blobs linked into vmlinux are placed
1119 in an init section in the image. Platform code *must* copy the
1120 blob to non-init memory prior to calling unflatten_device_tree().
1122 To use this command, simply add *.dtb into obj-y or targets, or make
1123 some other target depend on %.dtb
1125 A central rule exists to create $(obj)/%.dtb from $(src)/%.dts;
1126 architecture Makefiles do no need to explicitly write out that rule.
1130 DTC_FLAGS ?= -p 1024
1132 --- 6.8 Custom kbuild commands
1134 When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
1135 of a command is normally displayed.
1136 To enable this behaviour for custom commands kbuild requires
1137 two variables to be set:
1138 quiet_cmd_<command> - what shall be echoed
1139 cmd_<command> - the command to execute
1143 quiet_cmd_image = BUILD $@
1144 cmd_image = $(obj)/tools/build $(BUILDFLAGS) \
1145 $(obj)/vmlinux.bin > $@
1148 $(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE
1149 $(call if_changed,image)
1150 @echo 'Kernel: $@ is ready'
1152 When updating the $(obj)/bzImage target, the line
1154 BUILD arch/x86/boot/bzImage
1156 will be displayed with "make KBUILD_VERBOSE=0".
1159 --- 6.9 Preprocessing linker scripts
1161 When the vmlinux image is built, the linker script
1162 arch/$(ARCH)/kernel/vmlinux.lds is used.
1163 The script is a preprocessed variant of the file vmlinux.lds.S
1164 located in the same directory.
1165 kbuild knows .lds files and includes a rule *lds.S -> *lds.
1168 #arch/x86/kernel/Makefile
1169 always := vmlinux.lds
1172 export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
1174 The assignment to $(always) is used to tell kbuild to build the
1176 The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
1177 specified options when building the target vmlinux.lds.
1179 When building the *.lds target, kbuild uses the variables:
1180 KBUILD_CPPFLAGS : Set in top-level Makefile
1181 cppflags-y : May be set in the kbuild makefile
1182 CPPFLAGS_$(@F) : Target-specific flags.
1183 Note that the full filename is used in this
1186 The kbuild infrastructure for *lds files is used in several
1187 architecture-specific files.
1189 --- 6.10 Generic header files
1191 The directory include/asm-generic contains the header files
1192 that may be shared between individual architectures.
1193 The recommended approach how to use a generic header file is
1194 to list the file in the Kbuild file.
1195 See "7.2 generic-y" for further info on syntax etc.
1197 --- 6.11 Post-link pass
1199 If the file arch/xxx/Makefile.postlink exists, this makefile
1200 will be invoked for post-link objects (vmlinux and modules.ko)
1201 for architectures to run post-link passes on. Must also handle
1204 This pass runs after kallsyms generation. If the architecture
1205 needs to modify symbol locations, rather than manipulate the
1206 kallsyms, it may be easier to add another postlink target for
1207 .tmp_vmlinux? targets to be called from link-vmlinux.sh.
1209 For example, powerpc uses this to check relocation sanity of
1210 the linked vmlinux file.
1212 === 7 Kbuild syntax for exported headers
1214 The kernel includes a set of headers that is exported to userspace.
1215 Many headers can be exported as-is but other headers require a
1216 minimal pre-processing before they are ready for user-space.
1217 The pre-processing does:
1218 - drop kernel-specific annotations
1219 - drop include of compiler.h
1220 - drop all sections that are kernel internal (guarded by ifdef __KERNEL__)
1222 All headers under include/uapi/, include/generated/uapi/,
1223 arch/<arch>/include/uapi/ and arch/<arch>/include/generated/uapi/
1226 A Kbuild file may be defined under arch/<arch>/include/uapi/asm/ and
1227 arch/<arch>/include/asm/ to list asm files coming from asm-generic.
1228 See subsequent chapter for the syntax of the Kbuild file.
1230 --- 7.1 no-export-headers
1232 no-export-headers is essentially used by include/uapi/linux/Kbuild to
1233 avoid exporting specific headers (e.g. kvm.h) on architectures that do
1234 not support it. It should be avoided as much as possible.
1238 If an architecture uses a verbatim copy of a header from
1239 include/asm-generic then this is listed in the file
1240 arch/$(ARCH)/include/asm/Kbuild like this:
1243 #arch/x86/include/asm/Kbuild
1244 generic-y += termios.h
1247 During the prepare phase of the build a wrapper include
1248 file is generated in the directory:
1250 arch/$(ARCH)/include/generated/asm
1252 When a header is exported where the architecture uses
1253 the generic header a similar wrapper is generated as part
1254 of the set of exported headers in the directory:
1258 The generated wrapper will in both cases look like the following:
1261 #include <asm-generic/termios.h>
1265 If an architecture generates other header files alongside generic-y
1266 wrappers, generated-y specifies them.
1268 This prevents them being treated as stale asm-generic wrappers and
1272 #arch/x86/include/asm/Kbuild
1273 generated-y += syscalls_32.h
1277 mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild
1278 to define the minimum set of ASM headers that all architectures must have.
1280 This works like optional generic-y. If a mandatory header is missing
1281 in arch/$(ARCH)/include/(uapi/)/asm, Kbuild will automatically generate
1282 a wrapper of the asm-generic one.
1284 The convention is to list one subdir per line and
1285 preferably in alphabetic order.
1287 === 8 Kbuild Variables
1289 The top Makefile exports the following variables:
1291 VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
1293 These variables define the current kernel version. A few arch
1294 Makefiles actually use these values directly; they should use
1295 $(KERNELRELEASE) instead.
1297 $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
1298 three-part version number, such as "2", "4", and "0". These three
1299 values are always numeric.
1301 $(EXTRAVERSION) defines an even tinier sublevel for pre-patches
1302 or additional patches. It is usually some non-numeric string
1303 such as "-pre4", and is often blank.
1307 $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
1308 for constructing installation directory names or showing in
1309 version strings. Some arch Makefiles use it for this purpose.
1313 This variable defines the target architecture, such as "i386",
1314 "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
1315 determine which files to compile.
1317 By default, the top Makefile sets $(ARCH) to be the same as the
1318 host system architecture. For a cross build, a user may
1319 override the value of $(ARCH) on the command line:
1326 This variable defines a place for the arch Makefiles to install
1327 the resident kernel image and System.map file.
1328 Use this for architecture-specific install targets.
1330 INSTALL_MOD_PATH, MODLIB
1332 $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
1333 installation. This variable is not defined in the Makefile but
1334 may be passed in by the user if desired.
1336 $(MODLIB) specifies the directory for module installation.
1337 The top Makefile defines $(MODLIB) to
1338 $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may
1339 override this value on the command line if desired.
1343 If this variable is specified, it will cause modules to be stripped
1344 after they are installed. If INSTALL_MOD_STRIP is '1', then the
1345 default option --strip-debug will be used. Otherwise, the
1346 INSTALL_MOD_STRIP value will be used as the option(s) to the strip
1350 === 9 Makefile language
1352 The kernel Makefiles are designed to be run with GNU Make. The Makefiles
1353 use only the documented features of GNU Make, but they do use many
1356 GNU Make supports elementary list-processing functions. The kernel
1357 Makefiles use a novel style of list building and manipulation with few
1360 GNU Make has two assignment operators, ":=" and "=". ":=" performs
1361 immediate evaluation of the right-hand side and stores an actual string
1362 into the left-hand side. "=" is like a formula definition; it stores the
1363 right-hand side in an unevaluated form and then evaluates this form each
1364 time the left-hand side is used.
1366 There are some cases where "=" is appropriate. Usually, though, ":="
1367 is the right choice.
1371 Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
1372 Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
1373 Updates by Sam Ravnborg <sam@ravnborg.org>
1374 Language QA by Jan Engelhardt <jengelh@gmx.de>
1378 - Describe how kbuild supports shipped files with _shipped.
1379 - Generating offset header files.
1380 - Add more variables to section 7?