arch/arm/boot/dts/am33xx-l4.dtsi

   1 &l4_wkup {                                              /* 0x44c00000 */
   2         compatible = "ti,am33xx-l4-wkup", "simple-bus";
   3         reg = <0x44c00000 0x800>,
   4               <0x44c00800 0x800>,
   5               <0x44c01000 0x400>,
   6               <0x44c01400 0x400>;
   7         reg-names = "ap", "la", "ia0", "ia1";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10         ranges = <0x00000000 0x44c00000 0x100000>,      /* segment 0 */
  11                  <0x00100000 0x44d00000 0x100000>,      /* segment 1 */
  12                  <0x00200000 0x44e00000 0x100000>;      /* segment 2 */
  13
  14         segment@0 {                                     /* 0x44c00000 */
  15                 compatible = "simple-bus";
  16                 #address-cells = <1>;
  17                 #size-cells = <1>;
  18                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  19                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
  20                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
  21                          <0x00001400 0x00001400 0x000400>;      /* ap 3 */
  22         };
  23
  24         segment@100000 {                                        /* 0x44d00000 */
  25                 compatible = "simple-bus";
  26                 #address-cells = <1>;
  27                 #size-cells = <1>;
  28                 ranges = <0x00000000 0x00100000 0x004000>,      /* ap 4 */
  29                          <0x00004000 0x00104000 0x001000>,      /* ap 5 */
  30                          <0x00080000 0x00180000 0x002000>,      /* ap 6 */
  31                          <0x00082000 0x00182000 0x001000>;      /* ap 7 */
  32
  33                 target-module@0 {                       /* 0x44d00000, ap 4 28.0 */
  34                         compatible = "ti,sysc-omap4", "ti,sysc";
  35                         reg = <0x0 0x4>;
  36                         reg-names = "rev";
  37                         #address-cells = <1>;
  38                         #size-cells = <1>;
  39                         ranges = <0x0 0x0 0x4000>;
  40                         status = "disabled";
  41                 };
  42
  43                 target-module@80000 {                   /* 0x44d80000, ap 6 10.0 */
  44                         compatible = "ti,sysc";
  45                         status = "disabled";
  46                         #address-cells = <1>;
  47                         #size-cells = <1>;
  48                         ranges = <0x0 0x80000 0x2000>;
  49                 };
  50         };
  51
  52         segment@200000 {                                        /* 0x44e00000 */
  53                 compatible = "simple-bus";
  54                 #address-cells = <1>;
  55                 #size-cells = <1>;
  56                 ranges = <0x00000000 0x00200000 0x002000>,      /* ap 8 */
  57                          <0x00002000 0x00202000 0x001000>,      /* ap 9 */
  58                          <0x00003000 0x00203000 0x001000>,      /* ap 10 */
  59                          <0x00004000 0x00204000 0x001000>,      /* ap 11 */
  60                          <0x00005000 0x00205000 0x001000>,      /* ap 12 */
  61                          <0x00006000 0x00206000 0x001000>,      /* ap 13 */
  62                          <0x00007000 0x00207000 0x001000>,      /* ap 14 */
  63                          <0x00008000 0x00208000 0x001000>,      /* ap 15 */
  64                          <0x00009000 0x00209000 0x001000>,      /* ap 16 */
  65                          <0x0000a000 0x0020a000 0x001000>,      /* ap 17 */
  66                          <0x0000b000 0x0020b000 0x001000>,      /* ap 18 */
  67                          <0x0000c000 0x0020c000 0x001000>,      /* ap 19 */
  68                          <0x0000d000 0x0020d000 0x001000>,      /* ap 20 */
  69                          <0x0000f000 0x0020f000 0x001000>,      /* ap 21 */
  70                          <0x00010000 0x00210000 0x010000>,      /* ap 22 */
  71                          <0x00020000 0x00220000 0x010000>,      /* ap 23 */
  72                          <0x00030000 0x00230000 0x001000>,      /* ap 24 */
  73                          <0x00031000 0x00231000 0x001000>,      /* ap 25 */
  74                          <0x00032000 0x00232000 0x001000>,      /* ap 26 */
  75                          <0x00033000 0x00233000 0x001000>,      /* ap 27 */
  76                          <0x00034000 0x00234000 0x001000>,      /* ap 28 */
  77                          <0x00035000 0x00235000 0x001000>,      /* ap 29 */
  78                          <0x00036000 0x00236000 0x001000>,      /* ap 30 */
  79                          <0x00037000 0x00237000 0x001000>,      /* ap 31 */
  80                          <0x00038000 0x00238000 0x001000>,      /* ap 32 */
  81                          <0x00039000 0x00239000 0x001000>,      /* ap 33 */
  82                          <0x0003a000 0x0023a000 0x001000>,      /* ap 34 */
  83                          <0x0003e000 0x0023e000 0x001000>,      /* ap 35 */
  84                          <0x0003f000 0x0023f000 0x001000>,      /* ap 36 */
  85                          <0x0000e000 0x0020e000 0x001000>,      /* ap 37 */
  86                          <0x00040000 0x00240000 0x040000>,      /* ap 38 */
  87                          <0x00080000 0x00280000 0x001000>;      /* ap 39 */
  88
  89                 target-module@0 {                       /* 0x44e00000, ap 8 58.0 */
  90                         compatible = "ti,sysc-omap4", "ti,sysc";
  91                         reg = <0 0x4>;
  92                         reg-names = "rev";
  93                         #address-cells = <1>;
  94                         #size-cells = <1>;
  95                         ranges = <0x0 0x0 0x2000>;
  96
  97                         prcm: prcm@0 {
  98                                 compatible = "ti,am3-prcm", "simple-bus";
  99                                 reg = <0 0x2000>;
 100                                 #address-cells = <1>;
 101                                 #size-cells = <1>;
 102                                 ranges = <0 0 0x2000>;
 103
 104                                 prcm_clocks: clocks {
 105                                         #address-cells = <1>;
 106                                         #size-cells = <0>;
 107                                 };
 108
 109                                 prcm_clockdomains: clockdomains {
 110                                 };
 111                         };
 112                 };
 113
 114                 target-module@3000 {                    /* 0x44e03000, ap 10 0a.0 */
 115                         compatible = "ti,sysc";
 116                         status = "disabled";
 117                         #address-cells = <1>;
 118                         #size-cells = <1>;
 119                         ranges = <0x0 0x3000 0x1000>;
 120                 };
 121
 122                 target-module@5000 {                    /* 0x44e05000, ap 12 30.0 */
 123                         compatible = "ti,sysc";
 124                         status = "disabled";
 125                         #address-cells = <1>;
 126                         #size-cells = <1>;
 127                         ranges = <0x0 0x5000 0x1000>;
 128                 };
 129
 130                 target-module@7000 {                    /* 0x44e07000, ap 14 20.0 */
 131                         compatible = "ti,sysc-omap2", "ti,sysc";
 132                         reg = <0x7000 0x4>,
 133                               <0x7010 0x4>,
 134                               <0x7114 0x4>;
 135                         reg-names = "rev", "sysc", "syss";
 136                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 137                                          SYSC_OMAP2_SOFTRESET |
 138                                          SYSC_OMAP2_AUTOIDLE)>;
 139                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 140                                         <SYSC_IDLE_NO>,
 141                                         <SYSC_IDLE_SMART>,
 142                                         <SYSC_IDLE_SMART_WKUP>;
 143                         ti,syss-mask = <1>;
 144                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 145                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 0>,
 146                                  <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 18>;
 147                         clock-names = "fck", "dbclk";
 148                         #address-cells = <1>;
 149                         #size-cells = <1>;
 150                         ranges = <0x0 0x7000 0x1000>;
 151
 152                         gpio0: gpio@0 {
 153                                 compatible = "ti,omap4-gpio";
 154                                 gpio-controller;
 155                                 #gpio-cells = <2>;
 156                                 interrupt-controller;
 157                                 #interrupt-cells = <2>;
 158                                 reg = <0x0 0x1000>;
 159                                 interrupts = <96>;
 160                         };
 161                 };
 162
 163                 target-module@9000 {                    /* 0x44e09000, ap 16 04.0 */
 164                         compatible = "ti,sysc-omap2", "ti,sysc";
 165                         reg = <0x9050 0x4>,
 166                               <0x9054 0x4>,
 167                               <0x9058 0x4>;
 168                         reg-names = "rev", "sysc", "syss";
 169                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 170                                          SYSC_OMAP2_SOFTRESET |
 171                                          SYSC_OMAP2_AUTOIDLE)>;
 172                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 173                                         <SYSC_IDLE_NO>,
 174                                         <SYSC_IDLE_SMART>,
 175                                         <SYSC_IDLE_SMART_WKUP>;
 176                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 177                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_UART1_CLKCTRL 0>;
 178                         clock-names = "fck";
 179                         #address-cells = <1>;
 180                         #size-cells = <1>;
 181                         ranges = <0x0 0x9000 0x1000>;
 182
 183                         uart0: serial@0 {
 184                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
 185                                 clock-frequency = <48000000>;
 186                                 reg = <0x0 0x1000>;
 187                                 interrupts = <72>;
 188                                 status = "disabled";
 189                                 dmas = <&edma 26 0>, <&edma 27 0>;
 190                                 dma-names = "tx", "rx";
 191                         };
 192                 };
 193
 194                 target-module@b000 {                    /* 0x44e0b000, ap 18 48.0 */
 195                         compatible = "ti,sysc-omap2", "ti,sysc";
 196                         reg = <0xb000 0x8>,
 197                               <0xb010 0x8>,
 198                               <0xb090 0x8>;
 199                         reg-names = "rev", "sysc", "syss";
 200                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 201                                          SYSC_OMAP2_ENAWAKEUP |
 202                                          SYSC_OMAP2_SOFTRESET |
 203                                          SYSC_OMAP2_AUTOIDLE)>;
 204                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 205                                         <SYSC_IDLE_NO>,
 206                                         <SYSC_IDLE_SMART>,
 207                                         <SYSC_IDLE_SMART_WKUP>;
 208                         ti,syss-mask = <1>;
 209                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 210                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_I2C1_CLKCTRL 0>;
 211                         clock-names = "fck";
 212                         #address-cells = <1>;
 213                         #size-cells = <1>;
 214                         ranges = <0x0 0xb000 0x1000>;
 215
 216                         i2c0: i2c@0 {
 217                                 compatible = "ti,omap4-i2c";
 218                                 #address-cells = <1>;
 219                                 #size-cells = <0>;
 220                                 reg = <0x0 0x1000>;
 221                                 interrupts = <70>;
 222                                 status = "disabled";
 223                         };
 224                 };
 225
 226                 target-module@d000 {                    /* 0x44e0d000, ap 20 38.0 */
 227                         compatible = "ti,sysc-omap4", "ti,sysc";
 228                         ti,hwmods = "adc_tsc";
 229                         reg = <0xd000 0x4>,
 230                               <0xd010 0x4>;
 231                         reg-names = "rev", "sysc";
 232                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 233                                         <SYSC_IDLE_NO>,
 234                                         <SYSC_IDLE_SMART>,
 235                                         <SYSC_IDLE_SMART_WKUP>;
 236                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 237                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_ADC_TSC_CLKCTRL 0>;
 238                         clock-names = "fck";
 239                         #address-cells = <1>;
 240                         #size-cells = <1>;
 241                         ranges = <0x00000000 0x0000d000 0x00001000>,
 242                                  <0x00001000 0x0000e000 0x00001000>;
 243
 244                                 tscadc: tscadc@0 {
 245                                         compatible = "ti,am3359-tscadc";
 246                                         reg = <0x0 0x1000>;
 247                                         interrupts = <16>;
 248                                         status = "disabled";
 249                                         dmas = <&edma 53 0>, <&edma 57 0>;
 250                                         dma-names = "fifo0", "fifo1";
 251
 252                                         tsc {
 253                                                 compatible = "ti,am3359-tsc";
 254                                         };
 255                                         am335x_adc: adc {
 256                                                 #io-channel-cells = <1>;
 257                                                 compatible = "ti,am3359-adc";
 258                                         };
 259                                 };
 260                 };
 261
 262                 target-module@10000 {                   /* 0x44e10000, ap 22 0c.0 */
 263                         compatible = "ti,sysc-omap4", "ti,sysc";
 264                         reg = <0x10000 0x4>;
 265                         reg-names = "rev";
 266                         #address-cells = <1>;
 267                         #size-cells = <1>;
 268                         ranges = <0x00000000 0x00010000 0x00010000>,
 269                                  <0x00010000 0x00020000 0x00010000>;
 270
 271                         scm: scm@0 {
 272                                 compatible = "ti,am3-scm", "simple-bus";
 273                                 reg = <0x0 0x2000>;
 274                                 #address-cells = <1>;
 275                                 #size-cells = <1>;
 276                                 #pinctrl-cells = <1>;
 277                                 ranges = <0 0 0x2000>;
 278
 279                                 am33xx_pinmux: pinmux@800 {
 280                                         compatible = "pinctrl-single";
 281                                         reg = <0x800 0x238>;
 282                                         #pinctrl-cells = <1>;
 283                                         pinctrl-single,register-width = <32>;
 284                                         pinctrl-single,function-mask = <0x7f>;
 285                                 };
 286
 287                                 scm_conf: scm_conf@0 {
 288                                         compatible = "syscon", "simple-bus";
 289                                         reg = <0x0 0x800>;
 290                                         #address-cells = <1>;
 291                                         #size-cells = <1>;
 292                                         ranges = <0 0 0x800>;
 293
 294                                         phy_gmii_sel: phy-gmii-sel {
 295                                                 compatible = "ti,am3352-phy-gmii-sel";
 296                                                 reg = <0x650 0x4>;
 297                                                 #phy-cells = <2>;
 298                                         };
 299
 300                                         scm_clocks: clocks {
 301                                                 #address-cells = <1>;
 302                                                 #size-cells = <0>;
 303                                         };
 304                                 };
 305
 306                                 wkup_m3_ipc: wkup_m3_ipc@1324 {
 307                                         compatible = "ti,am3352-wkup-m3-ipc";
 308                                         reg = <0x1324 0x24>;
 309                                         interrupts = <78>;
 310                                         ti,rproc = <&wkup_m3>;
 311                                         mboxes = <&mailbox &mbox_wkupm3>;
 312                                 };
 313
 314                                 edma_xbar: dma-router@f90 {
 315                                         compatible = "ti,am335x-edma-crossbar";
 316                                         reg = <0xf90 0x40>;
 317                                         #dma-cells = <3>;
 318                                         dma-requests = <32>;
 319                                         dma-masters = <&edma>;
 320                                 };
 321
 322                                 scm_clockdomains: clockdomains {
 323                                 };
 324                         };
 325                 };
 326
 327                 target-module@31000 {                   /* 0x44e31000, ap 25 40.0 */
 328                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
 329                         ti,hwmods = "timer1";
 330                         reg = <0x31000 0x4>,
 331                               <0x31010 0x4>,
 332                               <0x31014 0x4>;
 333                         reg-names = "rev", "sysc", "syss";
 334                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 335                                          SYSC_OMAP2_SOFTRESET |
 336                                          SYSC_OMAP2_AUTOIDLE)>;
 337                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 338                                         <SYSC_IDLE_NO>,
 339                                         <SYSC_IDLE_SMART>;
 340                         ti,syss-mask = <1>;
 341                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 342                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>;
 343                         clock-names = "fck";
 344                         #address-cells = <1>;
 345                         #size-cells = <1>;
 346                         ranges = <0x0 0x31000 0x1000>;
 347
 348                         timer1: timer@0 {
 349                                 compatible = "ti,am335x-timer-1ms";
 350                                 reg = <0x0 0x400>;
 351                                 interrupts = <67>;
 352                                 ti,timer-alwon;
 353                                 clocks = <&timer1_fck>;
 354                                 clock-names = "fck";
 355                         };
 356                 };
 357
 358                 target-module@33000 {                   /* 0x44e33000, ap 27 18.0 */
 359                         compatible = "ti,sysc";
 360                         status = "disabled";
 361                         #address-cells = <1>;
 362                         #size-cells = <1>;
 363                         ranges = <0x0 0x33000 0x1000>;
 364                 };
 365
 366                 target-module@35000 {                   /* 0x44e35000, ap 29 50.0 */
 367                         compatible = "ti,sysc-omap2", "ti,sysc";
 368                         reg = <0x35000 0x4>,
 369                               <0x35010 0x4>,
 370                               <0x35014 0x4>;
 371                         reg-names = "rev", "sysc", "syss";
 372                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 373                                          SYSC_OMAP2_SOFTRESET)>;
 374                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 375                                         <SYSC_IDLE_NO>,
 376                                         <SYSC_IDLE_SMART>,
 377                                         <SYSC_IDLE_SMART_WKUP>;
 378                         ti,syss-mask = <1>;
 379                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 380                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
 381                         clock-names = "fck";
 382                         #address-cells = <1>;
 383                         #size-cells = <1>;
 384                         ranges = <0x0 0x35000 0x1000>;
 385
 386                         wdt2: wdt@0 {
 387                                 compatible = "ti,omap3-wdt";
 388                                 reg = <0x0 0x1000>;
 389                                 interrupts = <91>;
 390                         };
 391                 };
 392
 393                 target-module@37000 {                   /* 0x44e37000, ap 31 08.0 */
 394                         compatible = "ti,sysc";
 395                         status = "disabled";
 396                         #address-cells = <1>;
 397                         #size-cells = <1>;
 398                         ranges = <0x0 0x37000 0x1000>;
 399                 };
 400
 401                 target-module@39000 {                   /* 0x44e39000, ap 33 02.0 */
 402                         compatible = "ti,sysc";
 403                         status = "disabled";
 404                         #address-cells = <1>;
 405                         #size-cells = <1>;
 406                         ranges = <0x0 0x39000 0x1000>;
 407                 };
 408
 409                 target-module@3e000 {                   /* 0x44e3e000, ap 35 60.0 */
 410                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 411                         ti,hwmods = "rtc";
 412                         reg = <0x3e074 0x4>,
 413                               <0x3e078 0x4>;
 414                         reg-names = "rev", "sysc";
 415                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 416                                         <SYSC_IDLE_NO>,
 417                                         <SYSC_IDLE_SMART>,
 418                                         <SYSC_IDLE_SMART_WKUP>;
 419                         /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
 420                         clocks = <&l4_rtc_clkctrl AM3_L4_RTC_RTC_CLKCTRL 0>;
 421                         clock-names = "fck";
 422                         #address-cells = <1>;
 423                         #size-cells = <1>;
 424                         ranges = <0x0 0x3e000 0x1000>;
 425
 426                         rtc: rtc@0 {
 427                                 compatible = "ti,am3352-rtc", "ti,da830-rtc";
 428                                 reg = <0x0 0x1000>;
 429                                 interrupts = <75
 430                                               76>;
 431                         };
 432                 };
 433
 434                 target-module@40000 {                   /* 0x44e40000, ap 38 68.0 */
 435                         compatible = "ti,sysc";
 436                         status = "disabled";
 437                         #address-cells = <1>;
 438                         #size-cells = <1>;
 439                         ranges = <0x0 0x40000 0x40000>;
 440                 };
 441         };
 442 };
 443
 444 &l4_fw {                                                /* 0x47c00000 */
 445         compatible = "ti,am33xx-l4-fw", "simple-bus";
 446         reg = <0x47c00000 0x800>,
 447               <0x47c00800 0x800>,
 448               <0x47c01000 0x400>;
 449         reg-names = "ap", "la", "ia0";
 450         #address-cells = <1>;
 451         #size-cells = <1>;
 452         ranges = <0x00000000 0x47c00000 0x1000000>;     /* segment 0 */
 453
 454         segment@0 {                                     /* 0x47c00000 */
 455                 compatible = "simple-bus";
 456                 #address-cells = <1>;
 457                 #size-cells = <1>;
 458                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 459                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
 460                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
 461                          <0x0000c000 0x0000c000 0x001000>,      /* ap 3 */
 462                          <0x0000d000 0x0000d000 0x001000>,      /* ap 4 */
 463                          <0x0000e000 0x0000e000 0x001000>,      /* ap 5 */
 464                          <0x0000f000 0x0000f000 0x001000>,      /* ap 6 */
 465                          <0x00010000 0x00010000 0x001000>,      /* ap 7 */
 466                          <0x00011000 0x00011000 0x001000>,      /* ap 8 */
 467                          <0x0001a000 0x0001a000 0x001000>,      /* ap 9 */
 468                          <0x0001b000 0x0001b000 0x001000>,      /* ap 10 */
 469                          <0x00024000 0x00024000 0x001000>,      /* ap 11 */
 470                          <0x00025000 0x00025000 0x001000>,      /* ap 12 */
 471                          <0x00026000 0x00026000 0x001000>,      /* ap 13 */
 472                          <0x00027000 0x00027000 0x001000>,      /* ap 14 */
 473                          <0x00030000 0x00030000 0x001000>,      /* ap 15 */
 474                          <0x00031000 0x00031000 0x001000>,      /* ap 16 */
 475                          <0x00038000 0x00038000 0x001000>,      /* ap 17 */
 476                          <0x00039000 0x00039000 0x001000>,      /* ap 18 */
 477                          <0x0003a000 0x0003a000 0x001000>,      /* ap 19 */
 478                          <0x0003b000 0x0003b000 0x001000>,      /* ap 20 */
 479                          <0x0003e000 0x0003e000 0x001000>,      /* ap 21 */
 480                          <0x0003f000 0x0003f000 0x001000>,      /* ap 22 */
 481                          <0x0003c000 0x0003c000 0x001000>,      /* ap 23 */
 482                          <0x00040000 0x00040000 0x001000>,      /* ap 24 */
 483                          <0x00046000 0x00046000 0x001000>,      /* ap 25 */
 484                          <0x00047000 0x00047000 0x001000>,      /* ap 26 */
 485                          <0x00044000 0x00044000 0x001000>,      /* ap 27 */
 486                          <0x00045000 0x00045000 0x001000>,      /* ap 28 */
 487                          <0x00028000 0x00028000 0x001000>,      /* ap 29 */
 488                          <0x00029000 0x00029000 0x001000>,      /* ap 30 */
 489                          <0x00032000 0x00032000 0x001000>,      /* ap 31 */
 490                          <0x00033000 0x00033000 0x001000>,      /* ap 32 */
 491                          <0x0003d000 0x0003d000 0x001000>,      /* ap 33 */
 492                          <0x00041000 0x00041000 0x001000>,      /* ap 34 */
 493                          <0x00042000 0x00042000 0x001000>,      /* ap 35 */
 494                          <0x00043000 0x00043000 0x001000>,      /* ap 36 */
 495                          <0x00014000 0x00014000 0x001000>,      /* ap 37 */
 496                          <0x00015000 0x00015000 0x001000>;      /* ap 38 */
 497
 498                 target-module@c000 {                    /* 0x47c0c000, ap 3 04.0 */
 499                         compatible = "ti,sysc";
 500                         status = "disabled";
 501                         #address-cells = <1>;
 502                         #size-cells = <1>;
 503                         ranges = <0x0 0xc000 0x1000>;
 504                 };
 505
 506                 target-module@e000 {                    /* 0x47c0e000, ap 5 0c.0 */
 507                         compatible = "ti,sysc";
 508                         status = "disabled";
 509                         #address-cells = <1>;
 510                         #size-cells = <1>;
 511                         ranges = <0x0 0xe000 0x1000>;
 512                 };
 513
 514                 target-module@10000 {                   /* 0x47c10000, ap 7 20.0 */
 515                         compatible = "ti,sysc";
 516                         status = "disabled";
 517                         #address-cells = <1>;
 518                         #size-cells = <1>;
 519                         ranges = <0x0 0x10000 0x1000>;
 520                 };
 521
 522                 target-module@14000 {                   /* 0x47c14000, ap 37 3c.0 */
 523                         compatible = "ti,sysc";
 524                         status = "disabled";
 525                         #address-cells = <1>;
 526                         #size-cells = <1>;
 527                         ranges = <0x0 0x14000 0x1000>;
 528                 };
 529
 530                 target-module@1a000 {                   /* 0x47c1a000, ap 9 08.0 */
 531                         compatible = "ti,sysc";
 532                         status = "disabled";
 533                         #address-cells = <1>;
 534                         #size-cells = <1>;
 535                         ranges = <0x0 0x1a000 0x1000>;
 536                 };
 537
 538                 target-module@24000 {                   /* 0x47c24000, ap 11 28.0 */
 539                         compatible = "ti,sysc";
 540                         status = "disabled";
 541                         #address-cells = <1>;
 542                         #size-cells = <1>;
 543                         ranges = <0x0 0x24000 0x1000>;
 544                 };
 545
 546                 target-module@26000 {                   /* 0x47c26000, ap 13 30.0 */
 547                         compatible = "ti,sysc";
 548                         status = "disabled";
 549                         #address-cells = <1>;
 550                         #size-cells = <1>;
 551                         ranges = <0x0 0x26000 0x1000>;
 552                 };
 553
 554                 target-module@28000 {                   /* 0x47c28000, ap 29 40.0 */
 555                         compatible = "ti,sysc";
 556                         status = "disabled";
 557                         #address-cells = <1>;
 558                         #size-cells = <1>;
 559                         ranges = <0x0 0x28000 0x1000>;
 560                 };
 561
 562                 target-module@30000 {                   /* 0x47c30000, ap 15 14.0 */
 563                         compatible = "ti,sysc";
 564                         status = "disabled";
 565                         #address-cells = <1>;
 566                         #size-cells = <1>;
 567                         ranges = <0x0 0x30000 0x1000>;
 568                 };
 569
 570                 target-module@32000 {                   /* 0x47c32000, ap 31 06.0 */
 571                         compatible = "ti,sysc";
 572                         status = "disabled";
 573                         #address-cells = <1>;
 574                         #size-cells = <1>;
 575                         ranges = <0x0 0x32000 0x1000>;
 576                 };
 577
 578                 target-module@38000 {                   /* 0x47c38000, ap 17 18.0 */
 579                         compatible = "ti,sysc";
 580                         status = "disabled";
 581                         #address-cells = <1>;
 582                         #size-cells = <1>;
 583                         ranges = <0x0 0x38000 0x1000>;
 584                 };
 585
 586                 target-module@3a000 {                   /* 0x47c3a000, ap 19 1c.0 */
 587                         compatible = "ti,sysc";
 588                         status = "disabled";
 589                         #address-cells = <1>;
 590                         #size-cells = <1>;
 591                         ranges = <0x0 0x3a000 0x1000>;
 592                 };
 593
 594                 target-module@3c000 {                   /* 0x47c3c000, ap 23 38.0 */
 595                         compatible = "ti,sysc";
 596                         status = "disabled";
 597                         #address-cells = <1>;
 598                         #size-cells = <1>;
 599                         ranges = <0x0 0x3c000 0x1000>;
 600                 };
 601
 602                 target-module@3e000 {                   /* 0x47c3e000, ap 21 10.0 */
 603                         compatible = "ti,sysc";
 604                         status = "disabled";
 605                         #address-cells = <1>;
 606                         #size-cells = <1>;
 607                         ranges = <0x0 0x3e000 0x1000>;
 608                 };
 609
 610                 target-module@40000 {                   /* 0x47c40000, ap 24 02.0 */
 611                         compatible = "ti,sysc";
 612                         status = "disabled";
 613                         #address-cells = <1>;
 614                         #size-cells = <1>;
 615                         ranges = <0x0 0x40000 0x1000>;
 616                 };
 617
 618                 target-module@42000 {                   /* 0x47c42000, ap 35 34.0 */
 619                         compatible = "ti,sysc";
 620                         status = "disabled";
 621                         #address-cells = <1>;
 622                         #size-cells = <1>;
 623                         ranges = <0x0 0x42000 0x1000>;
 624                 };
 625
 626                 target-module@44000 {                   /* 0x47c44000, ap 27 24.0 */
 627                         compatible = "ti,sysc";
 628                         status = "disabled";
 629                         #address-cells = <1>;
 630                         #size-cells = <1>;
 631                         ranges = <0x0 0x44000 0x1000>;
 632                 };
 633
 634                 target-module@46000 {                   /* 0x47c46000, ap 25 2c.0 */
 635                         compatible = "ti,sysc";
 636                         status = "disabled";
 637                         #address-cells = <1>;
 638                         #size-cells = <1>;
 639                         ranges = <0x0 0x46000 0x1000>;
 640                 };
 641         };
 642 };
 643
 644 &l4_fast {                                      /* 0x4a000000 */
 645         compatible = "ti,am33xx-l4-fast", "simple-bus";
 646         reg = <0x4a000000 0x800>,
 647               <0x4a000800 0x800>,
 648               <0x4a001000 0x400>;
 649         reg-names = "ap", "la", "ia0";
 650         #address-cells = <1>;
 651         #size-cells = <1>;
 652         ranges = <0x00000000 0x4a000000 0x1000000>;     /* segment 0 */
 653
 654         segment@0 {                                     /* 0x4a000000 */
 655                 compatible = "simple-bus";
 656                 #address-cells = <1>;
 657                 #size-cells = <1>;
 658                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 659                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
 660                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
 661                          <0x00100000 0x00100000 0x008000>,      /* ap 3 */
 662                          <0x00108000 0x00108000 0x001000>,      /* ap 4 */
 663                          <0x00180000 0x00180000 0x020000>,      /* ap 5 */
 664                          <0x001a0000 0x001a0000 0x001000>,      /* ap 6 */
 665                          <0x00200000 0x00200000 0x080000>,      /* ap 7 */
 666                          <0x00280000 0x00280000 0x001000>,      /* ap 8 */
 667                          <0x00300000 0x00300000 0x080000>,      /* ap 9 */
 668                          <0x00380000 0x00380000 0x001000>;      /* ap 10 */
 669
 670                 target-module@100000 {                  /* 0x4a100000, ap 3 08.0 */
 671                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 672                         reg = <0x101200 0x4>,
 673                               <0x101208 0x4>,
 674                               <0x101204 0x4>;
 675                         reg-names = "rev", "sysc", "syss";
 676                         ti,sysc-mask = <0>;
 677                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 678                                         <SYSC_IDLE_NO>;
 679                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 680                                         <SYSC_IDLE_NO>;
 681                         ti,syss-mask = <1>;
 682                         clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
 683                         clock-names = "fck";
 684                         #address-cells = <1>;
 685                         #size-cells = <1>;
 686                         ranges = <0x0 0x100000 0x8000>;
 687
 688                         mac: ethernet@0 {
 689                                 compatible = "ti,am335x-cpsw","ti,cpsw";
 690                                 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
 691                                 clock-names = "fck", "cpts";
 692                                 cpdma_channels = <8>;
 693                                 ale_entries = <1024>;
 694                                 bd_ram_size = <0x2000>;
 695                                 mac_control = <0x20>;
 696                                 slaves = <2>;
 697                                 active_slave = <0>;
 698                                 cpts_clock_mult = <0x80000000>;
 699                                 cpts_clock_shift = <29>;
 700                                 reg = <0x0 0x800
 701                                        0x1200 0x100>;
 702                                 #address-cells = <1>;
 703                                 #size-cells = <1>;
 704                                 /*
 705                                  * c0_rx_thresh_pend
 706                                  * c0_rx_pend
 707                                  * c0_tx_pend
 708                                  * c0_misc_pend
 709                                  */
 710                                 interrupts = <40 41 42 43>;
 711                                 ranges = <0 0 0x8000>;
 712                                 syscon = <&scm_conf>;
 713                                 status = "disabled";
 714
 715                                 davinci_mdio: mdio@1000 {
 716                                         compatible = "ti,cpsw-mdio","ti,davinci_mdio";
 717                                         clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
 718                                         clock-names = "fck";
 719                                         #address-cells = <1>;
 720                                         #size-cells = <0>;
 721                                         bus_freq = <1000000>;
 722                                         reg = <0x1000 0x100>;
 723                                         status = "disabled";
 724                                 };
 725
 726                                 cpsw_emac0: slave@200 {
 727                                         /* Filled in by U-Boot */
 728                                         mac-address = [ 00 00 00 00 00 00 ];
 729                                         phys = <&phy_gmii_sel 1 1>;
 730                                 };
 731
 732                                 cpsw_emac1: slave@300 {
 733                                         /* Filled in by U-Boot */
 734                                         mac-address = [ 00 00 00 00 00 00 ];
 735                                         phys = <&phy_gmii_sel 2 1>;
 736                                 };
 737                         };
 738                 };
 739
 740                 target-module@180000 {                  /* 0x4a180000, ap 5 10.0 */
 741                         compatible = "ti,sysc";
 742                         status = "disabled";
 743                         #address-cells = <1>;
 744                         #size-cells = <1>;
 745                         ranges = <0x0 0x180000 0x20000>;
 746                 };
 747
 748                 target-module@200000 {                  /* 0x4a200000, ap 7 02.0 */
 749                         compatible = "ti,sysc";
 750                         status = "disabled";
 751                         #address-cells = <1>;
 752                         #size-cells = <1>;
 753                         ranges = <0x0 0x200000 0x80000>;
 754                 };
 755
 756                 target-module@300000 {                  /* 0x4a300000, ap 9 04.0 */
 757                         compatible = "ti,sysc";
 758                         status = "disabled";
 759                         #address-cells = <1>;
 760                         #size-cells = <1>;
 761                         ranges = <0x0 0x300000 0x80000>;
 762                 };
 763         };
 764 };
 765
 766 &l4_mpuss {                                             /* 0x4b140000 */
 767         compatible = "ti,am33xx-l4-mpuss", "simple-bus";
 768         reg = <0x4b144400 0x100>,
 769               <0x4b144800 0x400>;
 770         reg-names = "la", "ap";
 771         #address-cells = <1>;
 772         #size-cells = <1>;
 773         ranges = <0x00000000 0x4b140000 0x008000>;      /* segment 0 */
 774
 775         segment@0 {                                     /* 0x4b140000 */
 776                 compatible = "simple-bus";
 777                 #address-cells = <1>;
 778                 #size-cells = <1>;
 779                 ranges = <0x00004800 0x00004800 0x000400>,      /* ap 0 */
 780                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
 781                          <0x00002000 0x00002000 0x001000>,      /* ap 2 */
 782                          <0x00004000 0x00004000 0x000400>,      /* ap 3 */
 783                          <0x00005000 0x00005000 0x000400>,      /* ap 4 */
 784                          <0x00000000 0x00000000 0x001000>,      /* ap 5 */
 785                          <0x00003000 0x00003000 0x001000>,      /* ap 6 */
 786                          <0x00000800 0x00000800 0x000800>;      /* ap 7 */
 787
 788                 target-module@0 {                       /* 0x4b140000, ap 5 02.2 */
 789                         compatible = "ti,sysc";
 790                         status = "disabled";
 791                         #address-cells = <1>;
 792                         #size-cells = <1>;
 793                         ranges = <0x00000000 0x00000000 0x00001000>,
 794                                  <0x00001000 0x00001000 0x00001000>,
 795                                  <0x00002000 0x00002000 0x00001000>;
 796                 };
 797
 798                 target-module@3000 {                    /* 0x4b143000, ap 6 04.0 */
 799                         compatible = "ti,sysc";
 800                         status = "disabled";
 801                         #address-cells = <1>;
 802                         #size-cells = <1>;
 803                         ranges = <0x0 0x3000 0x1000>;
 804                 };
 805         };
 806 };
 807
 808 &l4_per {                                               /* 0x48000000 */
 809         compatible = "ti,am33xx-l4-per", "simple-bus";
 810         reg = <0x48000000 0x800>,
 811               <0x48000800 0x800>,
 812               <0x48001000 0x400>,
 813               <0x48001400 0x400>,
 814               <0x48001800 0x400>,
 815               <0x48001c00 0x400>;
 816         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
 817         #address-cells = <1>;
 818         #size-cells = <1>;
 819         ranges = <0x00000000 0x48000000 0x100000>,      /* segment 0 */
 820                  <0x00100000 0x48100000 0x100000>,      /* segment 1 */
 821                  <0x00200000 0x48200000 0x100000>,      /* segment 2 */
 822                  <0x00300000 0x48300000 0x100000>,      /* segment 3 */
 823                  <0x46000000 0x46000000 0x400000>,      /* l3 data port */
 824                  <0x46400000 0x46400000 0x400000>;      /* l3 data port */
 825
 826         segment@0 {                                     /* 0x48000000 */
 827                 compatible = "simple-bus";
 828                 #address-cells = <1>;
 829                 #size-cells = <1>;
 830                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 831                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
 832                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
 833                          <0x00001400 0x00001400 0x000400>,      /* ap 3 */
 834                          <0x00001800 0x00001800 0x000400>,      /* ap 4 */
 835                          <0x00001c00 0x00001c00 0x000400>,      /* ap 5 */
 836                          <0x00008000 0x00008000 0x001000>,      /* ap 6 */
 837                          <0x00009000 0x00009000 0x001000>,      /* ap 7 */
 838                          <0x00016000 0x00016000 0x001000>,      /* ap 8 */
 839                          <0x00017000 0x00017000 0x001000>,      /* ap 9 */
 840                          <0x00022000 0x00022000 0x001000>,      /* ap 10 */
 841                          <0x00023000 0x00023000 0x001000>,      /* ap 11 */
 842                          <0x00024000 0x00024000 0x001000>,      /* ap 12 */
 843                          <0x00025000 0x00025000 0x001000>,      /* ap 13 */
 844                          <0x0002a000 0x0002a000 0x001000>,      /* ap 14 */
 845                          <0x0002b000 0x0002b000 0x001000>,      /* ap 15 */
 846                          <0x00038000 0x00038000 0x002000>,      /* ap 16 */
 847                          <0x0003a000 0x0003a000 0x001000>,      /* ap 17 */
 848                          <0x00014000 0x00014000 0x001000>,      /* ap 18 */
 849                          <0x00015000 0x00015000 0x001000>,      /* ap 19 */
 850                          <0x0003c000 0x0003c000 0x002000>,      /* ap 20 */
 851                          <0x0003e000 0x0003e000 0x001000>,      /* ap 21 */
 852                          <0x00040000 0x00040000 0x001000>,      /* ap 22 */
 853                          <0x00041000 0x00041000 0x001000>,      /* ap 23 */
 854                          <0x00042000 0x00042000 0x001000>,      /* ap 24 */
 855                          <0x00043000 0x00043000 0x001000>,      /* ap 25 */
 856                          <0x00044000 0x00044000 0x001000>,      /* ap 26 */
 857                          <0x00045000 0x00045000 0x001000>,      /* ap 27 */
 858                          <0x00046000 0x00046000 0x001000>,      /* ap 28 */
 859                          <0x00047000 0x00047000 0x001000>,      /* ap 29 */
 860                          <0x00048000 0x00048000 0x001000>,      /* ap 30 */
 861                          <0x00049000 0x00049000 0x001000>,      /* ap 31 */
 862                          <0x0004c000 0x0004c000 0x001000>,      /* ap 32 */
 863                          <0x0004d000 0x0004d000 0x001000>,      /* ap 33 */
 864                          <0x00050000 0x00050000 0x002000>,      /* ap 34 */
 865                          <0x00052000 0x00052000 0x001000>,      /* ap 35 */
 866                          <0x00060000 0x00060000 0x001000>,      /* ap 36 */
 867                          <0x00061000 0x00061000 0x001000>,      /* ap 37 */
 868                          <0x00080000 0x00080000 0x010000>,      /* ap 38 */
 869                          <0x00090000 0x00090000 0x001000>,      /* ap 39 */
 870                          <0x000a0000 0x000a0000 0x010000>,      /* ap 40 */
 871                          <0x000b0000 0x000b0000 0x001000>,      /* ap 41 */
 872                          <0x00030000 0x00030000 0x001000>,      /* ap 77 */
 873                          <0x00031000 0x00031000 0x001000>,      /* ap 78 */
 874                          <0x0004a000 0x0004a000 0x001000>,      /* ap 85 */
 875                          <0x0004b000 0x0004b000 0x001000>,      /* ap 86 */
 876                          <0x000c8000 0x000c8000 0x001000>,      /* ap 87 */
 877                          <0x000c9000 0x000c9000 0x001000>,      /* ap 88 */
 878                          <0x000cc000 0x000cc000 0x001000>,      /* ap 89 */
 879                          <0x000cd000 0x000cd000 0x001000>,      /* ap 90 */
 880                          <0x000ca000 0x000ca000 0x001000>,      /* ap 91 */
 881                          <0x000cb000 0x000cb000 0x001000>,      /* ap 92 */
 882                          <0x46000000 0x46000000 0x400000>,      /* l3 data port */
 883                          <0x46400000 0x46400000 0x400000>;      /* l3 data port */
 884
 885                 target-module@8000 {                    /* 0x48008000, ap 6 10.0 */
 886                         compatible = "ti,sysc";
 887                         status = "disabled";
 888                         #address-cells = <1>;
 889                         #size-cells = <1>;
 890                         ranges = <0x0 0x8000 0x1000>;
 891                 };
 892
 893                 target-module@14000 {                   /* 0x48014000, ap 18 58.0 */
 894                         compatible = "ti,sysc";
 895                         status = "disabled";
 896                         #address-cells = <1>;
 897                         #size-cells = <1>;
 898                         ranges = <0x0 0x14000 0x1000>;
 899                 };
 900
 901                 target-module@16000 {                   /* 0x48016000, ap 8 3c.0 */
 902                         compatible = "ti,sysc";
 903                         status = "disabled";
 904                         #address-cells = <1>;
 905                         #size-cells = <1>;
 906                         ranges = <0x0 0x16000 0x1000>;
 907                 };
 908
 909                 target-module@22000 {                   /* 0x48022000, ap 10 12.0 */
 910                         compatible = "ti,sysc-omap2", "ti,sysc";
 911                         reg = <0x22050 0x4>,
 912                               <0x22054 0x4>,
 913                               <0x22058 0x4>;
 914                         reg-names = "rev", "sysc", "syss";
 915                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 916                                          SYSC_OMAP2_SOFTRESET |
 917                                          SYSC_OMAP2_AUTOIDLE)>;
 918                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 919                                         <SYSC_IDLE_NO>,
 920                                         <SYSC_IDLE_SMART>,
 921                                         <SYSC_IDLE_SMART_WKUP>;
 922                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
 923                         clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>;
 924                         clock-names = "fck";
 925                         #address-cells = <1>;
 926                         #size-cells = <1>;
 927                         ranges = <0x0 0x22000 0x1000>;
 928
 929                         uart1: serial@0 {
 930                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
 931                                 clock-frequency = <48000000>;
 932                                 reg = <0x0 0x1000>;
 933                                 interrupts = <73>;
 934                                 status = "disabled";
 935                                 dmas = <&edma 28 0>, <&edma 29 0>;
 936                                 dma-names = "tx", "rx";
 937                         };
 938                 };
 939
 940                 target-module@24000 {                   /* 0x48024000, ap 12 14.0 */
 941                         compatible = "ti,sysc-omap2", "ti,sysc";
 942                         reg = <0x24050 0x4>,
 943                               <0x24054 0x4>,
 944                               <0x24058 0x4>;
 945                         reg-names = "rev", "sysc", "syss";
 946                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 947                                          SYSC_OMAP2_SOFTRESET |
 948                                          SYSC_OMAP2_AUTOIDLE)>;
 949                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 950                                         <SYSC_IDLE_NO>,
 951                                         <SYSC_IDLE_SMART>,
 952                                         <SYSC_IDLE_SMART_WKUP>;
 953                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
 954                         clocks = <&l4ls_clkctrl AM3_L4LS_UART3_CLKCTRL 0>;
 955                         clock-names = "fck";
 956                         #address-cells = <1>;
 957                         #size-cells = <1>;
 958                         ranges = <0x0 0x24000 0x1000>;
 959
 960                         uart2: serial@0 {
 961                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
 962                                 clock-frequency = <48000000>;
 963                                 reg = <0x0 0x1000>;
 964                                 interrupts = <74>;
 965                                 status = "disabled";
 966                                 dmas = <&edma 30 0>, <&edma 31 0>;
 967                                 dma-names = "tx", "rx";
 968                         };
 969                 };
 970
 971                 target-module@2a000 {                   /* 0x4802a000, ap 14 2a.0 */
 972                         compatible = "ti,sysc-omap2", "ti,sysc";
 973                         reg = <0x2a000 0x8>,
 974                               <0x2a010 0x8>,
 975                               <0x2a090 0x8>;
 976                         reg-names = "rev", "sysc", "syss";
 977                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 978                                          SYSC_OMAP2_ENAWAKEUP |
 979                                          SYSC_OMAP2_SOFTRESET |
 980                                          SYSC_OMAP2_AUTOIDLE)>;
 981                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 982                                         <SYSC_IDLE_NO>,
 983                                         <SYSC_IDLE_SMART>,
 984                                         <SYSC_IDLE_SMART_WKUP>;
 985                         ti,syss-mask = <1>;
 986                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
 987                         clocks = <&l4ls_clkctrl AM3_L4LS_I2C2_CLKCTRL 0>;
 988                         clock-names = "fck";
 989                         #address-cells = <1>;
 990                         #size-cells = <1>;
 991                         ranges = <0x0 0x2a000 0x1000>;
 992
 993                         i2c1: i2c@0 {
 994                                 compatible = "ti,omap4-i2c";
 995                                 #address-cells = <1>;
 996                                 #size-cells = <0>;
 997                                 reg = <0x0 0x1000>;
 998                                 interrupts = <71>;
 999                                 status = "disabled";
1000                         };
1001                 };
1002
1003                 target-module@30000 {                   /* 0x48030000, ap 77 08.0 */
1004                         compatible = "ti,sysc-omap2", "ti,sysc";
1005                         ti,hwmods = "spi0";
1006                         reg = <0x30000 0x4>,
1007                               <0x30110 0x4>,
1008                               <0x30114 0x4>;
1009                         reg-names = "rev", "sysc", "syss";
1010                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1011                                          SYSC_OMAP2_SOFTRESET |
1012                                          SYSC_OMAP2_AUTOIDLE)>;
1013                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1014                                         <SYSC_IDLE_NO>,
1015                                         <SYSC_IDLE_SMART>;
1016                         ti,syss-mask = <1>;
1017                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1018                         clocks = <&l4ls_clkctrl AM3_L4LS_SPI0_CLKCTRL 0>;
1019                         clock-names = "fck";
1020                         #address-cells = <1>;
1021                         #size-cells = <1>;
1022                         ranges = <0x0 0x30000 0x1000>;
1023
1024                         spi0: spi@0 {
1025                                 compatible = "ti,omap4-mcspi";
1026                                 #address-cells = <1>;
1027                                 #size-cells = <0>;
1028                                 reg = <0x0 0x400>;
1029                                 interrupts = <65>;
1030                                 ti,spi-num-cs = <2>;
1031                                 dmas = <&edma 16 0
1032                                         &edma 17 0
1033                                         &edma 18 0
1034                                         &edma 19 0>;
1035                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1036                                 status = "disabled";
1037                         };
1038                 };
1039
1040                 target-module@38000 {                   /* 0x48038000, ap 16 02.0 */
1041                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
1042                         reg = <0x38000 0x4>,
1043                               <0x38004 0x4>;
1044                         reg-names = "rev", "sysc";
1045                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1046                                         <SYSC_IDLE_NO>,
1047                                         <SYSC_IDLE_SMART>;
1048                         /* Domains (P, C): per_pwrdm, l3s_clkdm */
1049                         clocks = <&l3s_clkctrl AM3_L3S_MCASP0_CLKCTRL 0>;
1050                         clock-names = "fck";
1051                         #address-cells = <1>;
1052                         #size-cells = <1>;
1053                         ranges = <0x0 0x38000 0x2000>,
1054                                  <0x46000000 0x46000000 0x400000>;
1055
1056                         mcasp0: mcasp@0 {
1057                                 compatible = "ti,am33xx-mcasp-audio";
1058                                 reg = <0x0 0x2000>,
1059                                       <0x46000000 0x400000>;
1060                                 reg-names = "mpu", "dat";
1061                                 interrupts = <80>, <81>;
1062                                 interrupt-names = "tx", "rx";
1063                                 status = "disabled";
1064                                 dmas = <&edma 8 2>,
1065                                         <&edma 9 2>;
1066                                 dma-names = "tx", "rx";
1067                         };
1068                 };
1069
1070                 target-module@3c000 {                   /* 0x4803c000, ap 20 32.0 */
1071                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
1072                         reg = <0x3c000 0x4>,
1073                               <0x3c004 0x4>;
1074                         reg-names = "rev", "sysc";
1075                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1076                                         <SYSC_IDLE_NO>,
1077                                         <SYSC_IDLE_SMART>;
1078                         /* Domains (P, C): per_pwrdm, l3s_clkdm */
1079                         clocks = <&l3s_clkctrl AM3_L3S_MCASP1_CLKCTRL 0>;
1080                         clock-names = "fck";
1081                         #address-cells = <1>;
1082                         #size-cells = <1>;
1083                         ranges = <0x0 0x3c000 0x2000>,
1084                                  <0x46400000 0x46400000 0x400000>;
1085
1086                         mcasp1: mcasp@0 {
1087                                 compatible = "ti,am33xx-mcasp-audio";
1088                                 reg = <0x0 0x2000>,
1089                                       <0x46400000 0x400000>;
1090                                 reg-names = "mpu", "dat";
1091                                 interrupts = <82>, <83>;
1092                                 interrupt-names = "tx", "rx";
1093                                 status = "disabled";
1094                                 dmas = <&edma 10 2>,
1095                                         <&edma 11 2>;
1096                                 dma-names = "tx", "rx";
1097                         };
1098                 };
1099
1100                 target-module@40000 {                   /* 0x48040000, ap 22 1e.0 */
1101                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1102                         ti,hwmods = "timer2";
1103                         reg = <0x40000 0x4>,
1104                               <0x40010 0x4>,
1105                               <0x40014 0x4>;
1106                         reg-names = "rev", "sysc", "syss";
1107                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1108                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1109                                         <SYSC_IDLE_NO>,
1110                                         <SYSC_IDLE_SMART>,
1111                                         <SYSC_IDLE_SMART_WKUP>;
1112                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1113                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>;
1114                         clock-names = "fck";
1115                         #address-cells = <1>;
1116                         #size-cells = <1>;
1117                         ranges = <0x0 0x40000 0x1000>;
1118
1119                         timer2: timer@0 {
1120                                 compatible = "ti,am335x-timer";
1121                                 reg = <0x0 0x400>;
1122                                 interrupts = <68>;
1123                                 clocks = <&timer2_fck>;
1124                                 clock-names = "fck";
1125                         };
1126                 };
1127
1128                 target-module@42000 {                   /* 0x48042000, ap 24 1c.0 */
1129                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1130                         ti,hwmods = "timer3";
1131                         reg = <0x42000 0x4>,
1132                               <0x42010 0x4>,
1133                               <0x42014 0x4>;
1134                         reg-names = "rev", "sysc", "syss";
1135                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1136                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1137                                         <SYSC_IDLE_NO>,
1138                                         <SYSC_IDLE_SMART>,
1139                                         <SYSC_IDLE_SMART_WKUP>;
1140                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1141                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER3_CLKCTRL 0>;
1142                         clock-names = "fck";
1143                         #address-cells = <1>;
1144                         #size-cells = <1>;
1145                         ranges = <0x0 0x42000 0x1000>;
1146
1147                         timer3: timer@0 {
1148                                 compatible = "ti,am335x-timer";
1149                                 reg = <0x0 0x400>;
1150                                 interrupts = <69>;
1151                         };
1152                 };
1153
1154                 target-module@44000 {                   /* 0x48044000, ap 26 26.0 */
1155                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1156                         ti,hwmods = "timer4";
1157                         reg = <0x44000 0x4>,
1158                               <0x44010 0x4>,
1159                               <0x44014 0x4>;
1160                         reg-names = "rev", "sysc", "syss";
1161                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1162                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1163                                         <SYSC_IDLE_NO>,
1164                                         <SYSC_IDLE_SMART>,
1165                                         <SYSC_IDLE_SMART_WKUP>;
1166                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1167                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER4_CLKCTRL 0>;
1168                         clock-names = "fck";
1169                         #address-cells = <1>;
1170                         #size-cells = <1>;
1171                         ranges = <0x0 0x44000 0x1000>;
1172
1173                         timer4: timer@0 {
1174                                 compatible = "ti,am335x-timer";
1175                                 reg = <0x0 0x400>;
1176                                 interrupts = <92>;
1177                                 ti,timer-pwm;
1178                         };
1179                 };
1180
1181                 target-module@46000 {                   /* 0x48046000, ap 28 28.0 */
1182                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1183                         ti,hwmods = "timer5";
1184                         reg = <0x46000 0x4>,
1185                               <0x46010 0x4>,
1186                               <0x46014 0x4>;
1187                         reg-names = "rev", "sysc", "syss";
1188                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1189                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1190                                         <SYSC_IDLE_NO>,
1191                                         <SYSC_IDLE_SMART>,
1192                                         <SYSC_IDLE_SMART_WKUP>;
1193                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1194                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER5_CLKCTRL 0>;
1195                         clock-names = "fck";
1196                         #address-cells = <1>;
1197                         #size-cells = <1>;
1198                         ranges = <0x0 0x46000 0x1000>;
1199
1200                         timer5: timer@0 {
1201                                 compatible = "ti,am335x-timer";
1202                                 reg = <0x0 0x400>;
1203                                 interrupts = <93>;
1204                                 ti,timer-pwm;
1205                         };
1206                 };
1207
1208                 target-module@48000 {                   /* 0x48048000, ap 30 22.0 */
1209                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1210                         ti,hwmods = "timer6";
1211                         reg = <0x48000 0x4>,
1212                               <0x48010 0x4>,
1213                               <0x48014 0x4>;
1214                         reg-names = "rev", "sysc", "syss";
1215                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1216                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1217                                         <SYSC_IDLE_NO>,
1218                                         <SYSC_IDLE_SMART>,
1219                                         <SYSC_IDLE_SMART_WKUP>;
1220                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1221                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER6_CLKCTRL 0>;
1222                         clock-names = "fck";
1223                         #address-cells = <1>;
1224                         #size-cells = <1>;
1225                         ranges = <0x0 0x48000 0x1000>;
1226
1227                         timer6: timer@0 {
1228                                 compatible = "ti,am335x-timer";
1229                                 reg = <0x0 0x400>;
1230                                 interrupts = <94>;
1231                                 ti,timer-pwm;
1232                         };
1233                 };
1234
1235                 target-module@4a000 {                   /* 0x4804a000, ap 85 60.0 */
1236                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1237                         ti,hwmods = "timer7";
1238                         reg = <0x4a000 0x4>,
1239                               <0x4a010 0x4>,
1240                               <0x4a014 0x4>;
1241                         reg-names = "rev", "sysc", "syss";
1242                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1243                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1244                                         <SYSC_IDLE_NO>,
1245                                         <SYSC_IDLE_SMART>,
1246                                         <SYSC_IDLE_SMART_WKUP>;
1247                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1248                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER7_CLKCTRL 0>;
1249                         clock-names = "fck";
1250                         #address-cells = <1>;
1251                         #size-cells = <1>;
1252                         ranges = <0x0 0x4a000 0x1000>;
1253
1254                         timer7: timer@0 {
1255                                 compatible = "ti,am335x-timer";
1256                                 reg = <0x0 0x400>;
1257                                 interrupts = <95>;
1258                                 ti,timer-pwm;
1259                         };
1260                 };
1261
1262                 target-module@4c000 {                   /* 0x4804c000, ap 32 36.0 */
1263                         compatible = "ti,sysc-omap2", "ti,sysc";
1264                         reg = <0x4c000 0x4>,
1265                               <0x4c010 0x4>,
1266                               <0x4c114 0x4>;
1267                         reg-names = "rev", "sysc", "syss";
1268                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1269                                          SYSC_OMAP2_SOFTRESET |
1270                                          SYSC_OMAP2_AUTOIDLE)>;
1271                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1272                                         <SYSC_IDLE_NO>,
1273                                         <SYSC_IDLE_SMART>,
1274                                         <SYSC_IDLE_SMART_WKUP>;
1275                         ti,syss-mask = <1>;
1276                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1277                         clocks = <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 0>,
1278                                  <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 18>;
1279                         clock-names = "fck", "dbclk";
1280                         #address-cells = <1>;
1281                         #size-cells = <1>;
1282                         ranges = <0x0 0x4c000 0x1000>;
1283
1284                         gpio1: gpio@0 {
1285                                 compatible = "ti,omap4-gpio";
1286                                 gpio-controller;
1287                                 #gpio-cells = <2>;
1288                                 interrupt-controller;
1289                                 #interrupt-cells = <2>;
1290                                 reg = <0x0 0x1000>;
1291                                 interrupts = <98>;
1292                         };
1293                 };
1294
1295                 target-module@50000 {                   /* 0x48050000, ap 34 2c.0 */
1296                         compatible = "ti,sysc";
1297                         status = "disabled";
1298                         #address-cells = <1>;
1299                         #size-cells = <1>;
1300                         ranges = <0x0 0x50000 0x2000>;
1301                 };
1302
1303                 target-module@60000 {                   /* 0x48060000, ap 36 0c.0 */
1304                         compatible = "ti,sysc-omap2", "ti,sysc";
1305                         reg = <0x602fc 0x4>,
1306                               <0x60110 0x4>,
1307                               <0x60114 0x4>;
1308                         reg-names = "rev", "sysc", "syss";
1309                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1310                                          SYSC_OMAP2_ENAWAKEUP |
1311                                          SYSC_OMAP2_SOFTRESET |
1312                                          SYSC_OMAP2_AUTOIDLE)>;
1313                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1314                                         <SYSC_IDLE_NO>,
1315                                         <SYSC_IDLE_SMART>;
1316                         ti,syss-mask = <1>;
1317                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1318                         clocks = <&l4ls_clkctrl AM3_L4LS_MMC1_CLKCTRL 0>;
1319                         clock-names = "fck";
1320                         #address-cells = <1>;
1321                         #size-cells = <1>;
1322                         ranges = <0x0 0x60000 0x1000>;
1323
1324                         mmc1: mmc@0 {
1325                                 compatible = "ti,omap4-hsmmc";
1326                                 ti,dual-volt;
1327                                 ti,needs-special-reset;
1328                                 ti,needs-special-hs-handling;
1329                                 dmas = <&edma_xbar 24 0 0
1330                                         &edma_xbar 25 0 0>;
1331                                 dma-names = "tx", "rx";
1332                                 interrupts = <64>;
1333                                 reg = <0x0 0x1000>;
1334                                 status = "disabled";
1335                         };
1336                 };
1337
1338                 target-module@80000 {                   /* 0x48080000, ap 38 18.0 */
1339                         compatible = "ti,sysc-omap2", "ti,sysc";
1340                         ti,hwmods = "elm";
1341                         reg = <0x80000 0x4>,
1342                               <0x80010 0x4>,
1343                               <0x80014 0x4>;
1344                         reg-names = "rev", "sysc", "syss";
1345                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1346                                          SYSC_OMAP2_SOFTRESET |
1347                                          SYSC_OMAP2_AUTOIDLE)>;
1348                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1349                                         <SYSC_IDLE_NO>,
1350                                         <SYSC_IDLE_SMART>;
1351                         ti,syss-mask = <1>;
1352                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1353                         clocks = <&l4ls_clkctrl AM3_L4LS_ELM_CLKCTRL 0>;
1354                         clock-names = "fck";
1355                         #address-cells = <1>;
1356                         #size-cells = <1>;
1357                         ranges = <0x0 0x80000 0x10000>;
1358
1359                         elm: elm@0 {
1360                                 compatible = "ti,am3352-elm";
1361                                 reg = <0x0 0x2000>;
1362                                 interrupts = <4>;
1363                                 status = "disabled";
1364                         };
1365                 };
1366
1367                 target-module@a0000 {                   /* 0x480a0000, ap 40 5e.0 */
1368                         compatible = "ti,sysc";
1369                         status = "disabled";
1370                         #address-cells = <1>;
1371                         #size-cells = <1>;
1372                         ranges = <0x0 0xa0000 0x10000>;
1373                 };
1374
1375                 target-module@c8000 {                   /* 0x480c8000, ap 87 06.0 */
1376                         compatible = "ti,sysc-omap4", "ti,sysc";
1377                         reg = <0xc8000 0x4>,
1378                               <0xc8010 0x4>;
1379                         reg-names = "rev", "sysc";
1380                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1381                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1382                                         <SYSC_IDLE_NO>,
1383                                         <SYSC_IDLE_SMART>;
1384                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1385                         clocks = <&l4ls_clkctrl AM3_L4LS_MAILBOX_CLKCTRL 0>;
1386                         clock-names = "fck";
1387                         #address-cells = <1>;
1388                         #size-cells = <1>;
1389                         ranges = <0x0 0xc8000 0x1000>;
1390
1391                         mailbox: mailbox@0 {
1392                                 compatible = "ti,omap4-mailbox";
1393                                 reg = <0x0 0x200>;
1394                                 interrupts = <77>;
1395                                 #mbox-cells = <1>;
1396                                 ti,mbox-num-users = <4>;
1397                                 ti,mbox-num-fifos = <8>;
1398                                 mbox_wkupm3: wkup_m3 {
1399                                         ti,mbox-send-noirq;
1400                                         ti,mbox-tx = <0 0 0>;
1401                                         ti,mbox-rx = <0 0 3>;
1402                                 };
1403                         };
1404                 };
1405
1406                 target-module@ca000 {                   /* 0x480ca000, ap 91 40.0 */
1407                         compatible = "ti,sysc-omap2", "ti,sysc";
1408                         ti,hwmods = "spinlock";
1409                         reg = <0xca000 0x4>,
1410                               <0xca010 0x4>,
1411                               <0xca014 0x4>;
1412                         reg-names = "rev", "sysc", "syss";
1413                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1414                                          SYSC_OMAP2_ENAWAKEUP |
1415                                          SYSC_OMAP2_SOFTRESET |
1416                                          SYSC_OMAP2_AUTOIDLE)>;
1417                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1418                                         <SYSC_IDLE_NO>,
1419                                         <SYSC_IDLE_SMART>;
1420                         ti,syss-mask = <1>;
1421                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1422                         clocks = <&l4ls_clkctrl AM3_L4LS_SPINLOCK_CLKCTRL 0>;
1423                         clock-names = "fck";
1424                         #address-cells = <1>;
1425                         #size-cells = <1>;
1426                         ranges = <0x0 0xca000 0x1000>;
1427
1428                         hwspinlock: spinlock@0 {
1429                                 compatible = "ti,omap4-hwspinlock";
1430                                 reg = <0x0 0x1000>;
1431                                 #hwlock-cells = <1>;
1432                         };
1433                 };
1434
1435                 target-module@cc000 {                   /* 0x480cc000, ap 89 0e.0 */
1436                         compatible = "ti,sysc";
1437                         status = "disabled";
1438                         #address-cells = <1>;
1439                         #size-cells = <1>;
1440                         ranges = <0x0 0xcc000 0x1000>;
1441                 };
1442         };
1443
1444         segment@100000 {                                        /* 0x48100000 */
1445                 compatible = "simple-bus";
1446                 #address-cells = <1>;
1447                 #size-cells = <1>;
1448                 ranges = <0x0008c000 0x0018c000 0x001000>,      /* ap 42 */
1449                          <0x0008d000 0x0018d000 0x001000>,      /* ap 43 */
1450                          <0x0008e000 0x0018e000 0x001000>,      /* ap 44 */
1451                          <0x0008f000 0x0018f000 0x001000>,      /* ap 45 */
1452                          <0x0009c000 0x0019c000 0x001000>,      /* ap 46 */
1453                          <0x0009d000 0x0019d000 0x001000>,      /* ap 47 */
1454                          <0x000a6000 0x001a6000 0x001000>,      /* ap 48 */
1455                          <0x000a7000 0x001a7000 0x001000>,      /* ap 49 */
1456                          <0x000a8000 0x001a8000 0x001000>,      /* ap 50 */
1457                          <0x000a9000 0x001a9000 0x001000>,      /* ap 51 */
1458                          <0x000aa000 0x001aa000 0x001000>,      /* ap 52 */
1459                          <0x000ab000 0x001ab000 0x001000>,      /* ap 53 */
1460                          <0x000ac000 0x001ac000 0x001000>,      /* ap 54 */
1461                          <0x000ad000 0x001ad000 0x001000>,      /* ap 55 */
1462                          <0x000ae000 0x001ae000 0x001000>,      /* ap 56 */
1463                          <0x000af000 0x001af000 0x001000>,      /* ap 57 */
1464                          <0x000b0000 0x001b0000 0x010000>,      /* ap 58 */
1465                          <0x000c0000 0x001c0000 0x001000>,      /* ap 59 */
1466                          <0x000cc000 0x001cc000 0x002000>,      /* ap 60 */
1467                          <0x000ce000 0x001ce000 0x002000>,      /* ap 61 */
1468                          <0x000d0000 0x001d0000 0x002000>,      /* ap 62 */
1469                          <0x000d2000 0x001d2000 0x002000>,      /* ap 63 */
1470                          <0x000d8000 0x001d8000 0x001000>,      /* ap 64 */
1471                          <0x000d9000 0x001d9000 0x001000>,      /* ap 65 */
1472                          <0x000a0000 0x001a0000 0x001000>,      /* ap 79 */
1473                          <0x000a1000 0x001a1000 0x001000>,      /* ap 80 */
1474                          <0x000a2000 0x001a2000 0x001000>,      /* ap 81 */
1475                          <0x000a3000 0x001a3000 0x001000>,      /* ap 82 */
1476                          <0x000a4000 0x001a4000 0x001000>,      /* ap 83 */
1477                          <0x000a5000 0x001a5000 0x001000>;      /* ap 84 */
1478
1479                 target-module@8c000 {                   /* 0x4818c000, ap 42 04.0 */
1480                         compatible = "ti,sysc";
1481                         status = "disabled";
1482                         #address-cells = <1>;
1483                         #size-cells = <1>;
1484                         ranges = <0x0 0x8c000 0x1000>;
1485                 };
1486
1487                 target-module@8e000 {                   /* 0x4818e000, ap 44 0a.0 */
1488                         compatible = "ti,sysc";
1489                         status = "disabled";
1490                         #address-cells = <1>;
1491                         #size-cells = <1>;
1492                         ranges = <0x0 0x8e000 0x1000>;
1493                 };
1494
1495                 target-module@9c000 {                   /* 0x4819c000, ap 46 5a.0 */
1496                         compatible = "ti,sysc-omap2", "ti,sysc";
1497                         reg = <0x9c000 0x8>,
1498                               <0x9c010 0x8>,
1499                               <0x9c090 0x8>;
1500                         reg-names = "rev", "sysc", "syss";
1501                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1502                                          SYSC_OMAP2_ENAWAKEUP |
1503                                          SYSC_OMAP2_SOFTRESET |
1504                                          SYSC_OMAP2_AUTOIDLE)>;
1505                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1506                                         <SYSC_IDLE_NO>,
1507                                         <SYSC_IDLE_SMART>,
1508                                         <SYSC_IDLE_SMART_WKUP>;
1509                         ti,syss-mask = <1>;
1510                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1511                         clocks = <&l4ls_clkctrl AM3_L4LS_I2C3_CLKCTRL 0>;
1512                         clock-names = "fck";
1513                         #address-cells = <1>;
1514                         #size-cells = <1>;
1515                         ranges = <0x0 0x9c000 0x1000>;
1516
1517                         i2c2: i2c@0 {
1518                                 compatible = "ti,omap4-i2c";
1519                                 #address-cells = <1>;
1520                                 #size-cells = <0>;
1521                                 reg = <0x0 0x1000>;
1522                                 interrupts = <30>;
1523                                 status = "disabled";
1524                         };
1525                 };
1526
1527                 target-module@a0000 {                   /* 0x481a0000, ap 79 24.0 */
1528                         compatible = "ti,sysc-omap2", "ti,sysc";
1529                         ti,hwmods = "spi1";
1530                         reg = <0xa0000 0x4>,
1531                               <0xa0110 0x4>,
1532                               <0xa0114 0x4>;
1533                         reg-names = "rev", "sysc", "syss";
1534                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1535                                          SYSC_OMAP2_SOFTRESET |
1536                                          SYSC_OMAP2_AUTOIDLE)>;
1537                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1538                                         <SYSC_IDLE_NO>,
1539                                         <SYSC_IDLE_SMART>;
1540                         ti,syss-mask = <1>;
1541                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1542                         clocks = <&l4ls_clkctrl AM3_L4LS_SPI1_CLKCTRL 0>;
1543                         clock-names = "fck";
1544                         #address-cells = <1>;
1545                         #size-cells = <1>;
1546                         ranges = <0x0 0xa0000 0x1000>;
1547
1548                         spi1: spi@0 {
1549                                 compatible = "ti,omap4-mcspi";
1550                                 #address-cells = <1>;
1551                                 #size-cells = <0>;
1552                                 reg = <0x0 0x400>;
1553                                 interrupts = <125>;
1554                                 ti,spi-num-cs = <2>;
1555                                 dmas = <&edma 42 0
1556                                         &edma 43 0
1557                                         &edma 44 0
1558                                         &edma 45 0>;
1559                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1560                                 status = "disabled";
1561                         };
1562                 };
1563
1564                 target-module@a2000 {                   /* 0x481a2000, ap 81 2e.0 */
1565                         compatible = "ti,sysc";
1566                         status = "disabled";
1567                         #address-cells = <1>;
1568                         #size-cells = <1>;
1569                         ranges = <0x0 0xa2000 0x1000>;
1570                 };
1571
1572                 target-module@a4000 {                   /* 0x481a4000, ap 83 30.0 */
1573                         compatible = "ti,sysc";
1574                         status = "disabled";
1575                         #address-cells = <1>;
1576                         #size-cells = <1>;
1577                         ranges = <0x0 0xa4000 0x1000>;
1578                 };
1579
1580                 target-module@a6000 {                   /* 0x481a6000, ap 48 16.0 */
1581                         compatible = "ti,sysc-omap2", "ti,sysc";
1582                         reg = <0xa6050 0x4>,
1583                               <0xa6054 0x4>,
1584                               <0xa6058 0x4>;
1585                         reg-names = "rev", "sysc", "syss";
1586                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1587                                          SYSC_OMAP2_SOFTRESET |
1588                                          SYSC_OMAP2_AUTOIDLE)>;
1589                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1590                                         <SYSC_IDLE_NO>,
1591                                         <SYSC_IDLE_SMART>,
1592                                         <SYSC_IDLE_SMART_WKUP>;
1593                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1594                         clocks = <&l4ls_clkctrl AM3_L4LS_UART4_CLKCTRL 0>;
1595                         clock-names = "fck";
1596                         #address-cells = <1>;
1597                         #size-cells = <1>;
1598                         ranges = <0x0 0xa6000 0x1000>;
1599
1600                         uart3: serial@0 {
1601                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
1602                                 clock-frequency = <48000000>;
1603                                 reg = <0x0 0x1000>;
1604                                 interrupts = <44>;
1605                                 status = "disabled";
1606                         };
1607                 };
1608
1609                 target-module@a8000 {                   /* 0x481a8000, ap 50 20.0 */
1610                         compatible = "ti,sysc-omap2", "ti,sysc";
1611                         reg = <0xa8050 0x4>,
1612                               <0xa8054 0x4>,
1613                               <0xa8058 0x4>;
1614                         reg-names = "rev", "sysc", "syss";
1615                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1616                                          SYSC_OMAP2_SOFTRESET |
1617                                          SYSC_OMAP2_AUTOIDLE)>;
1618                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1619                                         <SYSC_IDLE_NO>,
1620                                         <SYSC_IDLE_SMART>,
1621                                         <SYSC_IDLE_SMART_WKUP>;
1622                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1623                         clocks = <&l4ls_clkctrl AM3_L4LS_UART5_CLKCTRL 0>;
1624                         clock-names = "fck";
1625                         #address-cells = <1>;
1626                         #size-cells = <1>;
1627                         ranges = <0x0 0xa8000 0x1000>;
1628
1629                         uart4: serial@0 {
1630                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
1631                                 clock-frequency = <48000000>;
1632                                 reg = <0x0 0x1000>;
1633                                 interrupts = <45>;
1634                                 status = "disabled";
1635                         };
1636                 };
1637
1638                 target-module@aa000 {                   /* 0x481aa000, ap 52 1a.0 */
1639                         compatible = "ti,sysc-omap2", "ti,sysc";
1640                         reg = <0xaa050 0x4>,
1641                               <0xaa054 0x4>,
1642                               <0xaa058 0x4>;
1643                         reg-names = "rev", "sysc", "syss";
1644                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1645                                          SYSC_OMAP2_SOFTRESET |
1646                                          SYSC_OMAP2_AUTOIDLE)>;
1647                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1648                                         <SYSC_IDLE_NO>,
1649                                         <SYSC_IDLE_SMART>,
1650                                         <SYSC_IDLE_SMART_WKUP>;
1651                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1652                         clocks = <&l4ls_clkctrl AM3_L4LS_UART6_CLKCTRL 0>;
1653                         clock-names = "fck";
1654                         #address-cells = <1>;
1655                         #size-cells = <1>;
1656                         ranges = <0x0 0xaa000 0x1000>;
1657
1658                         uart5: serial@0 {
1659                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
1660                                 clock-frequency = <48000000>;
1661                                 reg = <0x0 0x1000>;
1662                                 interrupts = <46>;
1663                                 status = "disabled";
1664                         };
1665                 };
1666
1667                 target-module@ac000 {                   /* 0x481ac000, ap 54 38.0 */
1668                         compatible = "ti,sysc-omap2", "ti,sysc";
1669                         reg = <0xac000 0x4>,
1670                               <0xac010 0x4>,
1671                               <0xac114 0x4>;
1672                         reg-names = "rev", "sysc", "syss";
1673                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1674                                          SYSC_OMAP2_SOFTRESET |
1675                                          SYSC_OMAP2_AUTOIDLE)>;
1676                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1677                                         <SYSC_IDLE_NO>,
1678                                         <SYSC_IDLE_SMART>,
1679                                         <SYSC_IDLE_SMART_WKUP>;
1680                         ti,syss-mask = <1>;
1681                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1682                         clocks = <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 0>,
1683                                  <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 18>;
1684                         clock-names = "fck", "dbclk";
1685                         #address-cells = <1>;
1686                         #size-cells = <1>;
1687                         ranges = <0x0 0xac000 0x1000>;
1688
1689                         gpio2: gpio@0 {
1690                                 compatible = "ti,omap4-gpio";
1691                                 gpio-controller;
1692                                 #gpio-cells = <2>;
1693                                 interrupt-controller;
1694                                 #interrupt-cells = <2>;
1695                                 reg = <0x0 0x1000>;
1696                                 interrupts = <32>;
1697                         };
1698                 };
1699
1700                 target-module@ae000 {                   /* 0x481ae000, ap 56 3a.0 */
1701                         compatible = "ti,sysc-omap2", "ti,sysc";
1702                         reg = <0xae000 0x4>,
1703                               <0xae010 0x4>,
1704                               <0xae114 0x4>;
1705                         reg-names = "rev", "sysc", "syss";
1706                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1707                                          SYSC_OMAP2_SOFTRESET |
1708                                          SYSC_OMAP2_AUTOIDLE)>;
1709                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1710                                         <SYSC_IDLE_NO>,
1711                                         <SYSC_IDLE_SMART>,
1712                                         <SYSC_IDLE_SMART_WKUP>;
1713                         ti,syss-mask = <1>;
1714                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1715                         clocks = <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 0>,
1716                                  <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 18>;
1717                         clock-names = "fck", "dbclk";
1718                         #address-cells = <1>;
1719                         #size-cells = <1>;
1720                         ranges = <0x0 0xae000 0x1000>;
1721
1722                         gpio3: gpio@0 {
1723                                 compatible = "ti,omap4-gpio";
1724                                 gpio-controller;
1725                                 #gpio-cells = <2>;
1726                                 interrupt-controller;
1727                                 #interrupt-cells = <2>;
1728                                 reg = <0x0 0x1000>;
1729                                 interrupts = <62>;
1730                         };
1731                 };
1732
1733                 target-module@b0000 {                   /* 0x481b0000, ap 58 50.0 */
1734                         compatible = "ti,sysc";
1735                         status = "disabled";
1736                         #address-cells = <1>;
1737                         #size-cells = <1>;
1738                         ranges = <0x0 0xb0000 0x10000>;
1739                 };
1740
1741                 target-module@cc000 {                   /* 0x481cc000, ap 60 46.0 */
1742                         compatible = "ti,sysc-omap4", "ti,sysc";
1743                         reg = <0xcc020 0x4>;
1744                         reg-names = "rev";
1745                         ti,hwmods = "d_can0";
1746                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1747                         clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>,
1748                                  <&dcan0_fck>;
1749                         clock-names = "fck", "osc";
1750                         #address-cells = <1>;
1751                         #size-cells = <1>;
1752                         ranges = <0x0 0xcc000 0x2000>;
1753
1754                         dcan0: can@0 {
1755                                 compatible = "ti,am3352-d_can";
1756                                 reg = <0x0 0x2000>;
1757                                 clocks = <&dcan0_fck>;
1758                                 clock-names = "fck";
1759                                 syscon-raminit = <&scm_conf 0x644 0>;
1760                                 interrupts = <52>;
1761                                 status = "disabled";
1762                         };
1763                 };
1764
1765                 target-module@d0000 {                   /* 0x481d0000, ap 62 42.0 */
1766                         compatible = "ti,sysc-omap4", "ti,sysc";
1767                         reg = <0xd0020 0x4>;
1768                         reg-names = "rev";
1769                         ti,hwmods = "d_can1";
1770                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1771                         clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>,
1772                                  <&dcan1_fck>;
1773                         clock-names = "fck", "osc";
1774                         #address-cells = <1>;
1775                         #size-cells = <1>;
1776                         ranges = <0x0 0xd0000 0x2000>;
1777
1778                         dcan1: can@0 {
1779                                 compatible = "ti,am3352-d_can";
1780                                 reg = <0x0 0x2000>;
1781                                 clocks = <&dcan1_fck>;
1782                                 clock-names = "fck";
1783                                 syscon-raminit = <&scm_conf 0x644 1>;
1784                                 interrupts = <55>;
1785                                 status = "disabled";
1786                         };
1787                 };
1788
1789                 target-module@d8000 {                   /* 0x481d8000, ap 64 66.0 */
1790                         compatible = "ti,sysc-omap2", "ti,sysc";
1791                         reg = <0xd82fc 0x4>,
1792                               <0xd8110 0x4>,
1793                               <0xd8114 0x4>;
1794                         reg-names = "rev", "sysc", "syss";
1795                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1796                                          SYSC_OMAP2_ENAWAKEUP |
1797                                          SYSC_OMAP2_SOFTRESET |
1798                                          SYSC_OMAP2_AUTOIDLE)>;
1799                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1800                                         <SYSC_IDLE_NO>,
1801                                         <SYSC_IDLE_SMART>;
1802                         ti,syss-mask = <1>;
1803                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1804                         clocks = <&l4ls_clkctrl AM3_L4LS_MMC2_CLKCTRL 0>;
1805                         clock-names = "fck";
1806                         #address-cells = <1>;
1807                         #size-cells = <1>;
1808                         ranges = <0x0 0xd8000 0x1000>;
1809
1810                         mmc2: mmc@0 {
1811                                 compatible = "ti,omap4-hsmmc";
1812                                 ti,needs-special-reset;
1813                                 dmas = <&edma 2 0
1814                                         &edma 3 0>;
1815                                 dma-names = "tx", "rx";
1816                                 interrupts = <28>;
1817                                 reg = <0x0 0x1000>;
1818                                 status = "disabled";
1819                         };
1820                 };
1821         };
1822
1823         segment@200000 {                                        /* 0x48200000 */
1824                 compatible = "simple-bus";
1825                 #address-cells = <1>;
1826                 #size-cells = <1>;
1827         };
1828
1829         segment@300000 {                                        /* 0x48300000 */
1830                 compatible = "simple-bus";
1831                 #address-cells = <1>;
1832                 #size-cells = <1>;
1833                 ranges = <0x00000000 0x00300000 0x001000>,      /* ap 66 */
1834                          <0x00001000 0x00301000 0x001000>,      /* ap 67 */
1835                          <0x00002000 0x00302000 0x001000>,      /* ap 68 */
1836                          <0x00003000 0x00303000 0x001000>,      /* ap 69 */
1837                          <0x00004000 0x00304000 0x001000>,      /* ap 70 */
1838                          <0x00005000 0x00305000 0x001000>,      /* ap 71 */
1839                          <0x0000e000 0x0030e000 0x001000>,      /* ap 72 */
1840                          <0x0000f000 0x0030f000 0x001000>,      /* ap 73 */
1841                          <0x00018000 0x00318000 0x004000>,      /* ap 74 */
1842                          <0x0001c000 0x0031c000 0x001000>,      /* ap 75 */
1843                          <0x00010000 0x00310000 0x002000>,      /* ap 76 */
1844                          <0x00012000 0x00312000 0x001000>,      /* ap 93 */
1845                          <0x00015000 0x00315000 0x001000>,      /* ap 94 */
1846                          <0x00016000 0x00316000 0x001000>,      /* ap 95 */
1847                          <0x00017000 0x00317000 0x001000>,      /* ap 96 */
1848                          <0x00013000 0x00313000 0x001000>,      /* ap 97 */
1849                          <0x00014000 0x00314000 0x001000>,      /* ap 98 */
1850                          <0x00020000 0x00320000 0x001000>,      /* ap 99 */
1851                          <0x00021000 0x00321000 0x001000>,      /* ap 100 */
1852                          <0x00022000 0x00322000 0x001000>,      /* ap 101 */
1853                          <0x00023000 0x00323000 0x001000>,      /* ap 102 */
1854                          <0x00024000 0x00324000 0x001000>,      /* ap 103 */
1855                          <0x00025000 0x00325000 0x001000>;      /* ap 104 */
1856
1857                 target-module@0 {                       /* 0x48300000, ap 66 48.0 */
1858                         compatible = "ti,sysc-omap4", "ti,sysc";
1859                         ti,hwmods = "epwmss0";
1860                         reg = <0x0 0x4>,
1861                               <0x4 0x4>;
1862                         reg-names = "rev", "sysc";
1863                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1864                                         <SYSC_IDLE_NO>,
1865                                         <SYSC_IDLE_SMART>,
1866                                         <SYSC_IDLE_SMART_WKUP>;
1867                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1868                                         <SYSC_IDLE_NO>,
1869                                         <SYSC_IDLE_SMART>,
1870                                         <SYSC_IDLE_SMART_WKUP>;
1871                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1872                         clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS0_CLKCTRL 0>;
1873                         clock-names = "fck";
1874                         #address-cells = <1>;
1875                         #size-cells = <1>;
1876                         ranges = <0x0 0x0 0x1000>;
1877
1878                         epwmss0: epwmss@0 {
1879                                 compatible = "ti,am33xx-pwmss";
1880                                 reg = <0x0 0x10>;
1881                                 #address-cells = <1>;
1882                                 #size-cells = <1>;
1883                                 status = "disabled";
1884                                 ranges = <0 0 0x1000>;
1885
1886                                 ecap0: ecap@100 {
1887                                         compatible = "ti,am3352-ecap",
1888                                                      "ti,am33xx-ecap";
1889                                         #pwm-cells = <3>;
1890                                         reg = <0x100 0x80>;
1891                                         clocks = <&l4ls_gclk>;
1892                                         clock-names = "fck";
1893                                         interrupts = <31>;
1894                                         interrupt-names = "ecap0";
1895                                         status = "disabled";
1896                                 };
1897
1898                                 ehrpwm0: pwm@200 {
1899                                         compatible = "ti,am3352-ehrpwm",
1900                                                      "ti,am33xx-ehrpwm";
1901                                         #pwm-cells = <3>;
1902                                         reg = <0x200 0x80>;
1903                                         clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1904                                         clock-names = "tbclk", "fck";
1905                                         status = "disabled";
1906                                 };
1907                         };
1908                 };
1909
1910                 target-module@2000 {                    /* 0x48302000, ap 68 52.0 */
1911                         compatible = "ti,sysc-omap4", "ti,sysc";
1912                         ti,hwmods = "epwmss1";
1913                         reg = <0x2000 0x4>,
1914                               <0x2004 0x4>;
1915                         reg-names = "rev", "sysc";
1916                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1917                                         <SYSC_IDLE_NO>,
1918                                         <SYSC_IDLE_SMART>,
1919                                         <SYSC_IDLE_SMART_WKUP>;
1920                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1921                                         <SYSC_IDLE_NO>,
1922                                         <SYSC_IDLE_SMART>,
1923                                         <SYSC_IDLE_SMART_WKUP>;
1924                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1925                         clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS1_CLKCTRL 0>;
1926                         clock-names = "fck";
1927                         #address-cells = <1>;
1928                         #size-cells = <1>;
1929                         ranges = <0x0 0x2000 0x1000>;
1930
1931                         epwmss1: epwmss@0 {
1932                                 compatible = "ti,am33xx-pwmss";
1933                                 reg = <0x0 0x10>;
1934                                 #address-cells = <1>;
1935                                 #size-cells = <1>;
1936                                 status = "disabled";
1937                                 ranges = <0 0 0x1000>;
1938
1939                                 ecap1: ecap@100 {
1940                                         compatible = "ti,am3352-ecap",
1941                                                      "ti,am33xx-ecap";
1942                                         #pwm-cells = <3>;
1943                                         reg = <0x100 0x80>;
1944                                         clocks = <&l4ls_gclk>;
1945                                         clock-names = "fck";
1946                                         interrupts = <47>;
1947                                         interrupt-names = "ecap1";
1948                                         status = "disabled";
1949                                 };
1950
1951                                 ehrpwm1: pwm@200 {
1952                                         compatible = "ti,am3352-ehrpwm",
1953                                                      "ti,am33xx-ehrpwm";
1954                                         #pwm-cells = <3>;
1955                                         reg = <0x200 0x80>;
1956                                         clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1957                                         clock-names = "tbclk", "fck";
1958                                         status = "disabled";
1959                                 };
1960                         };
1961                 };
1962
1963                 target-module@4000 {                    /* 0x48304000, ap 70 44.0 */
1964                         compatible = "ti,sysc-omap4", "ti,sysc";
1965                         ti,hwmods = "epwmss2";
1966                         reg = <0x4000 0x4>,
1967                               <0x4004 0x4>;
1968                         reg-names = "rev", "sysc";
1969                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1970                                         <SYSC_IDLE_NO>,
1971                                         <SYSC_IDLE_SMART>,
1972                                         <SYSC_IDLE_SMART_WKUP>;
1973                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1974                                         <SYSC_IDLE_NO>,
1975                                         <SYSC_IDLE_SMART>,
1976                                         <SYSC_IDLE_SMART_WKUP>;
1977                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1978                         clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS2_CLKCTRL 0>;
1979                         clock-names = "fck";
1980                         #address-cells = <1>;
1981                         #size-cells = <1>;
1982                         ranges = <0x0 0x4000 0x1000>;
1983
1984                         epwmss2: epwmss@0 {
1985                                 compatible = "ti,am33xx-pwmss";
1986                                 reg = <0x0 0x10>;
1987                                 #address-cells = <1>;
1988                                 #size-cells = <1>;
1989                                 status = "disabled";
1990                                 ranges = <0 0 0x1000>;
1991
1992                                 ecap2: ecap@100 {
1993                                         compatible = "ti,am3352-ecap",
1994                                                      "ti,am33xx-ecap";
1995                                         #pwm-cells = <3>;
1996                                         reg = <0x100 0x80>;
1997                                         clocks = <&l4ls_gclk>;
1998                                         clock-names = "fck";
1999                                         interrupts = <61>;
2000                                         interrupt-names = "ecap2";
2001                                         status = "disabled";
2002                                 };
2003
2004                                 ehrpwm2: pwm@200 {
2005                                         compatible = "ti,am3352-ehrpwm",
2006                                                      "ti,am33xx-ehrpwm";
2007                                         #pwm-cells = <3>;
2008                                         reg = <0x200 0x80>;
2009                                         clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
2010                                         clock-names = "tbclk", "fck";
2011                                         status = "disabled";
2012                                 };
2013                         };
2014                 };
2015
2016                 target-module@e000 {                    /* 0x4830e000, ap 72 4a.0 */
2017                         compatible = "ti,sysc-omap4", "ti,sysc";
2018                         ti,hwmods = "lcdc";
2019                         reg = <0xe000 0x4>,
2020                               <0xe054 0x4>;
2021                         reg-names = "rev", "sysc";
2022                         ti,sysc-midle ;
2023                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2024                                         <SYSC_IDLE_NO>,
2025                                         <SYSC_IDLE_SMART>;
2026                         /* Domains (P, C): per_pwrdm, lcdc_clkdm */
2027                         clocks = <&lcdc_clkctrl AM3_LCDC_LCDC_CLKCTRL 0>;
2028                         clock-names = "fck";
2029                         #address-cells = <1>;
2030                         #size-cells = <1>;
2031                         ranges = <0x0 0xe000 0x1000>;
2032
2033                         lcdc: lcdc@0 {
2034                                 compatible = "ti,am33xx-tilcdc";
2035                                 reg = <0x0 0x1000>;
2036                                 interrupts = <36>;
2037                                 status = "disabled";
2038                         };
2039                 };
2040
2041                 target-module@10000 {                   /* 0x48310000, ap 76 4e.1 */
2042                         compatible = "ti,sysc-omap2", "ti,sysc";
2043                         reg = <0x11fe0 0x4>,
2044                               <0x11fe4 0x4>;
2045                         reg-names = "rev", "sysc";
2046                         ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
2047                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2048                                         <SYSC_IDLE_NO>;
2049                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2050                         clocks = <&l4ls_clkctrl AM3_L4LS_RNG_CLKCTRL 0>;
2051                         clock-names = "fck";
2052                         #address-cells = <1>;
2053                         #size-cells = <1>;
2054                         ranges = <0x0 0x10000 0x2000>;
2055
2056                         rng: rng@0 {
2057                                 compatible = "ti,omap4-rng";
2058                                 reg = <0x0 0x2000>;
2059                                 interrupts = <111>;
2060                         };
2061                 };
2062
2063                 target-module@13000 {                   /* 0x48313000, ap 97 62.0 */
2064                         compatible = "ti,sysc";
2065                         status = "disabled";
2066                         #address-cells = <1>;
2067                         #size-cells = <1>;
2068                         ranges = <0x0 0x13000 0x1000>;
2069                 };
2070
2071                 target-module@15000 {                   /* 0x48315000, ap 94 56.0 */
2072                         compatible = "ti,sysc";
2073                         status = "disabled";
2074                         #address-cells = <1>;
2075                         #size-cells = <1>;
2076                         ranges = <0x00000000 0x00015000 0x00001000>,
2077                                  <0x00001000 0x00016000 0x00001000>;
2078                 };
2079
2080                 target-module@18000 {                   /* 0x48318000, ap 74 4c.0 */
2081                         compatible = "ti,sysc";
2082                         status = "disabled";
2083                         #address-cells = <1>;
2084                         #size-cells = <1>;
2085                         ranges = <0x0 0x18000 0x4000>;
2086                 };
2087
2088                 target-module@20000 {                   /* 0x48320000, ap 99 34.0 */
2089                         compatible = "ti,sysc";
2090                         status = "disabled";
2091                         #address-cells = <1>;
2092                         #size-cells = <1>;
2093                         ranges = <0x0 0x20000 0x1000>;
2094                 };
2095
2096                 target-module@22000 {                   /* 0x48322000, ap 101 3e.0 */
2097                         compatible = "ti,sysc";
2098                         status = "disabled";
2099                         #address-cells = <1>;
2100                         #size-cells = <1>;
2101                         ranges = <0x0 0x22000 0x1000>;
2102                 };
2103
2104                 target-module@24000 {                   /* 0x48324000, ap 103 68.0 */
2105                         compatible = "ti,sysc";
2106                         status = "disabled";
2107                         #address-cells = <1>;
2108                         #size-cells = <1>;
2109                         ranges = <0x0 0x24000 0x1000>;
2110                 };
2111         };
2112 };
2113