1 &l4_wkup { /* 0x44c00000 */
2 compatible = "ti,am4-l4-wkup", "simple-bus";
3 reg = <0x44c00000 0x800>,
7 reg-names = "ap", "la", "ia0", "ia1";
10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
14 segment@0 { /* 0x44c00000 */
15 compatible = "simple-bus";
18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
19 <0x00000800 0x00000800 0x000800>, /* ap 1 */
20 <0x00001000 0x00001000 0x000400>, /* ap 2 */
21 <0x00001400 0x00001400 0x000400>; /* ap 3 */
24 segment@100000 { /* 0x44d00000 */
25 compatible = "simple-bus";
28 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */
29 <0x00004000 0x00104000 0x001000>, /* ap 5 */
30 <0x00080000 0x00180000 0x002000>, /* ap 6 */
31 <0x00082000 0x00182000 0x001000>, /* ap 7 */
32 <0x000f0000 0x001f0000 0x010000>; /* ap 8 */
34 target-module@0 { /* 0x44d00000, ap 4 28.0 */
35 compatible = "ti,sysc";
39 ranges = <0x0 0x0 0x4000>;
42 target-module@80000 { /* 0x44d80000, ap 6 10.0 */
43 compatible = "ti,sysc";
47 ranges = <0x0 0x80000 0x2000>;
50 target-module@f0000 { /* 0x44df0000, ap 8 58.0 */
51 compatible = "ti,sysc-omap4", "ti,sysc";
56 ranges = <0x0 0xf0000 0x10000>;
59 compatible = "ti,am4-prcm", "simple-bus";
61 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
64 ranges = <0 0 0x11000>;
71 prcm_clockdomains: clockdomains {
77 segment@200000 { /* 0x44e00000 */
78 compatible = "simple-bus";
81 ranges = <0x00000000 0x00200000 0x001000>, /* ap 9 */
82 <0x00003000 0x00203000 0x001000>, /* ap 10 */
83 <0x00004000 0x00204000 0x001000>, /* ap 11 */
84 <0x00005000 0x00205000 0x001000>, /* ap 12 */
85 <0x00006000 0x00206000 0x001000>, /* ap 13 */
86 <0x00007000 0x00207000 0x001000>, /* ap 14 */
87 <0x00008000 0x00208000 0x001000>, /* ap 15 */
88 <0x00009000 0x00209000 0x001000>, /* ap 16 */
89 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */
90 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */
91 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */
92 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */
93 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */
94 <0x00010000 0x00210000 0x010000>, /* ap 22 */
95 <0x00030000 0x00230000 0x001000>, /* ap 23 */
96 <0x00031000 0x00231000 0x001000>, /* ap 24 */
97 <0x00032000 0x00232000 0x001000>, /* ap 25 */
98 <0x00033000 0x00233000 0x001000>, /* ap 26 */
99 <0x00034000 0x00234000 0x001000>, /* ap 27 */
100 <0x00035000 0x00235000 0x001000>, /* ap 28 */
101 <0x00036000 0x00236000 0x001000>, /* ap 29 */
102 <0x00037000 0x00237000 0x001000>, /* ap 30 */
103 <0x00038000 0x00238000 0x001000>, /* ap 31 */
104 <0x00039000 0x00239000 0x001000>, /* ap 32 */
105 <0x0003a000 0x0023a000 0x001000>, /* ap 33 */
106 <0x0003e000 0x0023e000 0x001000>, /* ap 34 */
107 <0x0003f000 0x0023f000 0x001000>, /* ap 35 */
108 <0x00040000 0x00240000 0x040000>, /* ap 36 */
109 <0x00080000 0x00280000 0x001000>, /* ap 37 */
110 <0x00088000 0x00288000 0x008000>, /* ap 38 */
111 <0x00092000 0x00292000 0x001000>, /* ap 39 */
112 <0x00086000 0x00286000 0x001000>, /* ap 40 */
113 <0x00087000 0x00287000 0x001000>, /* ap 41 */
114 <0x00090000 0x00290000 0x001000>, /* ap 42 */
115 <0x00091000 0x00291000 0x001000>; /* ap 43 */
117 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */
118 compatible = "ti,sysc";
120 #address-cells = <1>;
122 ranges = <0x0 0x3000 0x1000>;
125 target-module@5000 { /* 0x44e05000, ap 12 30.0 */
126 compatible = "ti,sysc";
128 #address-cells = <1>;
130 ranges = <0x0 0x5000 0x1000>;
133 target-module@7000 { /* 0x44e07000, ap 14 20.0 */
134 compatible = "ti,sysc-omap2", "ti,sysc";
138 reg-names = "rev", "sysc", "syss";
139 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
140 SYSC_OMAP2_SOFTRESET |
141 SYSC_OMAP2_AUTOIDLE)>;
142 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
145 <SYSC_IDLE_SMART_WKUP>;
147 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
148 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>,
149 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>;
150 clock-names = "fck", "dbclk";
151 #address-cells = <1>;
153 ranges = <0x0 0x7000 0x1000>;
156 compatible = "ti,am4372-gpio","ti,omap4-gpio";
158 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
161 interrupt-controller;
162 #interrupt-cells = <2>;
167 target-module@9000 { /* 0x44e09000, ap 16 04.0 */
168 compatible = "ti,sysc-omap2", "ti,sysc";
172 reg-names = "rev", "sysc", "syss";
173 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
174 SYSC_OMAP2_SOFTRESET |
175 SYSC_OMAP2_AUTOIDLE)>;
176 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
179 <SYSC_IDLE_SMART_WKUP>;
180 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
181 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>;
183 #address-cells = <1>;
185 ranges = <0x0 0x9000 0x1000>;
188 compatible = "ti,am4372-uart","ti,omap2-uart";
190 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
194 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */
195 compatible = "ti,sysc-omap2", "ti,sysc";
199 reg-names = "rev", "sysc", "syss";
200 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
201 SYSC_OMAP2_ENAWAKEUP |
202 SYSC_OMAP2_SOFTRESET |
203 SYSC_OMAP2_AUTOIDLE)>;
204 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
207 <SYSC_IDLE_SMART_WKUP>;
209 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
210 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>;
212 #address-cells = <1>;
214 ranges = <0x0 0xb000 0x1000>;
217 compatible = "ti,am4372-i2c","ti,omap4-i2c";
219 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
220 #address-cells = <1>;
226 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */
227 compatible = "ti,sysc-omap4", "ti,sysc";
228 ti,hwmods = "adc_tsc";
231 reg-names = "rev", "sysc";
232 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
235 <SYSC_IDLE_SMART_WKUP>;
236 /* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */
237 clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>;
239 #address-cells = <1>;
241 ranges = <0x0 0xd000 0x1000>;
244 compatible = "ti,am3359-tscadc";
246 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
247 clocks = <&adc_tsc_fck>;
250 dmas = <&edma 53 0>, <&edma 57 0>;
251 dma-names = "fifo0", "fifo1";
254 compatible = "ti,am3359-tsc";
258 #io-channel-cells = <1>;
259 compatible = "ti,am3359-adc";
265 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */
266 compatible = "ti,sysc-omap4", "ti,sysc";
269 #address-cells = <1>;
271 ranges = <0x0 0x10000 0x10000>;
274 compatible = "ti,am4-scm", "simple-bus";
276 #address-cells = <1>;
278 ranges = <0 0 0x4000>;
280 am43xx_pinmux: pinmux@800 {
281 compatible = "ti,am437-padconf",
284 #address-cells = <1>;
286 #pinctrl-cells = <1>;
287 #interrupt-cells = <1>;
288 interrupt-controller;
289 pinctrl-single,register-width = <32>;
290 pinctrl-single,function-mask = <0xffffffff>;
293 scm_conf: scm_conf@0 {
294 compatible = "syscon", "simple-bus";
296 #address-cells = <1>;
299 phy_gmii_sel: phy-gmii-sel {
300 compatible = "ti,am43xx-phy-gmii-sel";
306 #address-cells = <1>;
311 wkup_m3_ipc: wkup_m3_ipc@1324 {
312 compatible = "ti,am4372-wkup-m3-ipc";
314 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
315 ti,rproc = <&wkup_m3>;
316 mboxes = <&mailbox &mbox_wkupm3>;
319 edma_xbar: dma-router@f90 {
320 compatible = "ti,am335x-edma-crossbar";
324 dma-masters = <&edma>;
327 scm_clockdomains: clockdomains {
332 target-module@31000 { /* 0x44e31000, ap 24 40.0 */
333 compatible = "ti,sysc-omap2-timer", "ti,sysc";
334 ti,hwmods = "timer1";
338 reg-names = "rev", "sysc", "syss";
339 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
340 SYSC_OMAP2_SOFTRESET |
341 SYSC_OMAP2_AUTOIDLE)>;
342 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
346 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
347 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>;
349 #address-cells = <1>;
351 ranges = <0x0 0x31000 0x1000>;
354 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
356 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
358 clocks = <&timer1_fck>;
363 target-module@33000 { /* 0x44e33000, ap 26 18.0 */
364 compatible = "ti,sysc";
366 #address-cells = <1>;
368 ranges = <0x0 0x33000 0x1000>;
371 target-module@35000 { /* 0x44e35000, ap 28 50.0 */
372 compatible = "ti,sysc-omap2", "ti,sysc";
376 reg-names = "rev", "sysc", "syss";
377 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
378 SYSC_OMAP2_SOFTRESET)>;
379 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
382 <SYSC_IDLE_SMART_WKUP>;
384 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
385 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
387 #address-cells = <1>;
389 ranges = <0x0 0x35000 0x1000>;
392 compatible = "ti,am4372-wdt","ti,omap3-wdt";
394 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
398 target-module@37000 { /* 0x44e37000, ap 30 08.0 */
399 compatible = "ti,sysc";
401 #address-cells = <1>;
403 ranges = <0x0 0x37000 0x1000>;
406 target-module@39000 { /* 0x44e39000, ap 32 02.0 */
407 compatible = "ti,sysc";
409 #address-cells = <1>;
411 ranges = <0x0 0x39000 0x1000>;
414 target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */
415 compatible = "ti,sysc-omap4-simple", "ti,sysc";
419 reg-names = "rev", "sysc";
420 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
423 <SYSC_IDLE_SMART_WKUP>;
424 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
425 clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;
427 #address-cells = <1>;
429 ranges = <0x0 0x3e000 0x1000>;
432 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
435 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
437 clocks = <&clk_32768_ck>;
438 clock-names = "int-clk";
439 system-power-controller;
444 target-module@40000 { /* 0x44e40000, ap 36 68.0 */
445 compatible = "ti,sysc";
447 #address-cells = <1>;
449 ranges = <0x0 0x40000 0x40000>;
452 target-module@86000 { /* 0x44e86000, ap 40 70.0 */
453 compatible = "ti,sysc-omap2", "ti,sysc";
454 ti,hwmods = "counter_32k";
457 reg-names = "rev", "sysc";
458 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
460 /* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */
461 clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>;
463 #address-cells = <1>;
465 ranges = <0x0 0x86000 0x1000>;
467 counter32k: counter@0 {
468 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
473 target-module@88000 { /* 0x44e88000, ap 38 12.0 */
474 compatible = "ti,sysc";
476 #address-cells = <1>;
478 ranges = <0x00000000 0x00088000 0x00008000>,
479 <0x00008000 0x00090000 0x00001000>,
480 <0x00009000 0x00091000 0x00001000>;
485 &l4_fast { /* 0x4a000000 */
486 compatible = "ti,am4-l4-fast", "simple-bus";
487 reg = <0x4a000000 0x800>,
490 reg-names = "ap", "la", "ia0";
491 #address-cells = <1>;
493 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */
495 segment@0 { /* 0x4a000000 */
496 compatible = "simple-bus";
497 #address-cells = <1>;
499 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
500 <0x00000800 0x00000800 0x000800>, /* ap 1 */
501 <0x00001000 0x00001000 0x000400>, /* ap 2 */
502 <0x00100000 0x00100000 0x008000>, /* ap 3 */
503 <0x00108000 0x00108000 0x001000>, /* ap 4 */
504 <0x00400000 0x00400000 0x002000>, /* ap 5 */
505 <0x00402000 0x00402000 0x001000>, /* ap 6 */
506 <0x00200000 0x00200000 0x080000>, /* ap 7 */
507 <0x00280000 0x00280000 0x001000>; /* ap 8 */
509 target-module@100000 { /* 0x4a100000, ap 3 04.0 */
510 compatible = "ti,sysc-omap4-simple", "ti,sysc";
511 reg = <0x101200 0x4>,
514 reg-names = "rev", "sysc", "syss";
516 ti,sysc-midle = <SYSC_IDLE_FORCE>,
518 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
521 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
523 #address-cells = <1>;
525 ranges = <0x0 0x100000 0x8000>;
528 compatible = "ti,am4372-cpsw","ti,cpsw";
531 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
532 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
533 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
534 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
535 #address-cells = <1>;
537 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
538 <&dpll_clksel_mac_clk>;
539 clock-names = "fck", "cpts", "50mclk";
540 assigned-clocks = <&dpll_clksel_mac_clk>;
541 assigned-clock-rates = <50000000>;
543 cpdma_channels = <8>;
544 ale_entries = <1024>;
545 bd_ram_size = <0x2000>;
546 mac_control = <0x20>;
549 cpts_clock_mult = <0x80000000>;
550 cpts_clock_shift = <29>;
551 ranges = <0 0 0x8000>;
552 syscon = <&scm_conf>;
554 davinci_mdio: mdio@1000 {
555 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
556 reg = <0x1000 0x100>;
557 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
559 #address-cells = <1>;
561 bus_freq = <1000000>;
565 cpsw_emac0: slave@200 {
566 /* Filled in by U-Boot */
567 mac-address = [ 00 00 00 00 00 00 ];
568 phys = <&phy_gmii_sel 1 0>;
571 cpsw_emac1: slave@300 {
572 /* Filled in by U-Boot */
573 mac-address = [ 00 00 00 00 00 00 ];
574 phys = <&phy_gmii_sel 2 0>;
579 target-module@200000 { /* 0x4a200000, ap 7 02.0 */
580 compatible = "ti,sysc";
582 #address-cells = <1>;
584 ranges = <0x0 0x200000 0x80000>;
587 target-module@400000 { /* 0x4a400000, ap 5 08.0 */
588 compatible = "ti,sysc";
590 #address-cells = <1>;
592 ranges = <0x0 0x400000 0x2000>;
597 &l4_per { /* 0x48000000 */
598 compatible = "ti,am4-l4-per", "simple-bus";
599 reg = <0x48000000 0x800>,
605 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
606 #address-cells = <1>;
608 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */
609 <0x00100000 0x48100000 0x100000>, /* segment 1 */
610 <0x00200000 0x48200000 0x100000>, /* segment 2 */
611 <0x00300000 0x48300000 0x100000>, /* segment 3 */
612 <0x46000000 0x46000000 0x400000>, /* l3 data port */
613 <0x46400000 0x46400000 0x400000>; /* l3 data port */
615 segment@0 { /* 0x48000000 */
616 compatible = "simple-bus";
617 #address-cells = <1>;
619 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
620 <0x00000800 0x00000800 0x000800>, /* ap 1 */
621 <0x00001000 0x00001000 0x000400>, /* ap 2 */
622 <0x00001400 0x00001400 0x000400>, /* ap 3 */
623 <0x00001800 0x00001800 0x000400>, /* ap 4 */
624 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */
625 <0x00008000 0x00008000 0x001000>, /* ap 6 */
626 <0x00009000 0x00009000 0x001000>, /* ap 7 */
627 <0x00022000 0x00022000 0x001000>, /* ap 8 */
628 <0x00023000 0x00023000 0x001000>, /* ap 9 */
629 <0x00024000 0x00024000 0x001000>, /* ap 10 */
630 <0x00025000 0x00025000 0x001000>, /* ap 11 */
631 <0x0002a000 0x0002a000 0x001000>, /* ap 12 */
632 <0x0002b000 0x0002b000 0x001000>, /* ap 13 */
633 <0x00038000 0x00038000 0x002000>, /* ap 14 */
634 <0x0003a000 0x0003a000 0x001000>, /* ap 15 */
635 <0x0003c000 0x0003c000 0x002000>, /* ap 16 */
636 <0x0003e000 0x0003e000 0x001000>, /* ap 17 */
637 <0x00040000 0x00040000 0x001000>, /* ap 18 */
638 <0x00041000 0x00041000 0x001000>, /* ap 19 */
639 <0x00042000 0x00042000 0x001000>, /* ap 20 */
640 <0x00043000 0x00043000 0x001000>, /* ap 21 */
641 <0x00044000 0x00044000 0x001000>, /* ap 22 */
642 <0x00045000 0x00045000 0x001000>, /* ap 23 */
643 <0x00046000 0x00046000 0x001000>, /* ap 24 */
644 <0x00047000 0x00047000 0x001000>, /* ap 25 */
645 <0x00048000 0x00048000 0x001000>, /* ap 26 */
646 <0x00049000 0x00049000 0x001000>, /* ap 27 */
647 <0x0004c000 0x0004c000 0x001000>, /* ap 28 */
648 <0x0004d000 0x0004d000 0x001000>, /* ap 29 */
649 <0x00060000 0x00060000 0x001000>, /* ap 30 */
650 <0x00061000 0x00061000 0x001000>, /* ap 31 */
651 <0x00080000 0x00080000 0x010000>, /* ap 32 */
652 <0x00090000 0x00090000 0x001000>, /* ap 33 */
653 <0x00030000 0x00030000 0x001000>, /* ap 65 */
654 <0x00031000 0x00031000 0x001000>, /* ap 66 */
655 <0x0004a000 0x0004a000 0x001000>, /* ap 71 */
656 <0x0004b000 0x0004b000 0x001000>, /* ap 72 */
657 <0x000c8000 0x000c8000 0x001000>, /* ap 73 */
658 <0x000c9000 0x000c9000 0x001000>, /* ap 74 */
659 <0x000ca000 0x000ca000 0x001000>, /* ap 77 */
660 <0x000cb000 0x000cb000 0x001000>, /* ap 78 */
661 <0x00034000 0x00034000 0x001000>, /* ap 80 */
662 <0x00035000 0x00035000 0x001000>, /* ap 81 */
663 <0x00036000 0x00036000 0x001000>, /* ap 84 */
664 <0x00037000 0x00037000 0x001000>, /* ap 85 */
665 <0x46000000 0x46000000 0x400000>, /* l3 data port */
666 <0x46400000 0x46400000 0x400000>; /* l3 data port */
668 target-module@8000 { /* 0x48008000, ap 6 10.0 */
669 compatible = "ti,sysc";
671 #address-cells = <1>;
673 ranges = <0x0 0x8000 0x1000>;
676 target-module@22000 { /* 0x48022000, ap 8 0a.0 */
677 compatible = "ti,sysc-omap2", "ti,sysc";
681 reg-names = "rev", "sysc", "syss";
682 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
683 SYSC_OMAP2_SOFTRESET |
684 SYSC_OMAP2_AUTOIDLE)>;
685 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
688 <SYSC_IDLE_SMART_WKUP>;
689 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
690 clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>;
692 #address-cells = <1>;
694 ranges = <0x0 0x22000 0x1000>;
697 compatible = "ti,am4372-uart","ti,omap2-uart";
699 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
704 target-module@24000 { /* 0x48024000, ap 10 1c.0 */
705 compatible = "ti,sysc-omap2", "ti,sysc";
709 reg-names = "rev", "sysc", "syss";
710 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
711 SYSC_OMAP2_SOFTRESET |
712 SYSC_OMAP2_AUTOIDLE)>;
713 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
716 <SYSC_IDLE_SMART_WKUP>;
717 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
718 clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>;
720 #address-cells = <1>;
722 ranges = <0x0 0x24000 0x1000>;
725 compatible = "ti,am4372-uart","ti,omap2-uart";
727 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
732 target-module@2a000 { /* 0x4802a000, ap 12 22.0 */
733 compatible = "ti,sysc-omap2", "ti,sysc";
737 reg-names = "rev", "sysc", "syss";
738 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
739 SYSC_OMAP2_ENAWAKEUP |
740 SYSC_OMAP2_SOFTRESET |
741 SYSC_OMAP2_AUTOIDLE)>;
742 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
745 <SYSC_IDLE_SMART_WKUP>;
747 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
748 clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>;
750 #address-cells = <1>;
752 ranges = <0x0 0x2a000 0x1000>;
755 compatible = "ti,am4372-i2c","ti,omap4-i2c";
757 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
758 #address-cells = <1>;
764 target-module@30000 { /* 0x48030000, ap 65 08.0 */
765 compatible = "ti,sysc-omap2", "ti,sysc";
770 reg-names = "rev", "sysc", "syss";
771 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
772 SYSC_OMAP2_SOFTRESET |
773 SYSC_OMAP2_AUTOIDLE)>;
774 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
778 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
779 clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>;
781 #address-cells = <1>;
783 ranges = <0x0 0x30000 0x1000>;
786 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
788 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
789 #address-cells = <1>;
795 target-module@34000 { /* 0x48034000, ap 80 56.0 */
796 compatible = "ti,sysc";
798 #address-cells = <1>;
800 ranges = <0x0 0x34000 0x1000>;
803 target-module@36000 { /* 0x48036000, ap 84 3e.0 */
804 compatible = "ti,sysc";
806 #address-cells = <1>;
808 ranges = <0x0 0x36000 0x1000>;
811 target-module@38000 { /* 0x48038000, ap 14 04.0 */
812 compatible = "ti,sysc-omap4-simple", "ti,sysc";
813 ti,hwmods = "mcasp0";
816 reg-names = "rev", "sysc";
817 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
820 /* Domains (P, C): per_pwrdm, l3s_clkdm */
821 clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>;
823 #address-cells = <1>;
825 ranges = <0x0 0x38000 0x2000>,
826 <0x46000000 0x46000000 0x400000>;
829 compatible = "ti,am33xx-mcasp-audio";
831 <0x46000000 0x400000>;
832 reg-names = "mpu", "dat";
833 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
834 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
835 interrupt-names = "tx", "rx";
839 dma-names = "tx", "rx";
843 target-module@3c000 { /* 0x4803c000, ap 16 2a.0 */
844 compatible = "ti,sysc-omap4-simple", "ti,sysc";
845 ti,hwmods = "mcasp1";
848 reg-names = "rev", "sysc";
849 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
852 /* Domains (P, C): per_pwrdm, l3s_clkdm */
853 clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>;
855 #address-cells = <1>;
857 ranges = <0x0 0x3c000 0x2000>,
858 <0x46400000 0x46400000 0x400000>;
861 compatible = "ti,am33xx-mcasp-audio";
863 <0x46400000 0x400000>;
864 reg-names = "mpu", "dat";
865 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
867 interrupt-names = "tx", "rx";
871 dma-names = "tx", "rx";
875 target-module@40000 { /* 0x48040000, ap 18 1e.0 */
876 compatible = "ti,sysc-omap4-timer", "ti,sysc";
877 ti,hwmods = "timer2";
881 reg-names = "rev", "sysc", "syss";
882 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
883 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
886 <SYSC_IDLE_SMART_WKUP>;
887 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
888 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>;
890 #address-cells = <1>;
892 ranges = <0x0 0x40000 0x1000>;
895 compatible = "ti,am4372-timer","ti,am335x-timer";
897 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
898 clocks = <&timer2_fck>;
903 target-module@42000 { /* 0x48042000, ap 20 24.0 */
904 compatible = "ti,sysc-omap4-timer", "ti,sysc";
905 ti,hwmods = "timer3";
909 reg-names = "rev", "sysc", "syss";
910 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
911 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
914 <SYSC_IDLE_SMART_WKUP>;
915 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
916 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>;
918 #address-cells = <1>;
920 ranges = <0x0 0x42000 0x1000>;
923 compatible = "ti,am4372-timer","ti,am335x-timer";
925 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
930 target-module@44000 { /* 0x48044000, ap 22 26.0 */
931 compatible = "ti,sysc-omap4-timer", "ti,sysc";
932 ti,hwmods = "timer4";
936 reg-names = "rev", "sysc", "syss";
937 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
938 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
941 <SYSC_IDLE_SMART_WKUP>;
942 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
943 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>;
945 #address-cells = <1>;
947 ranges = <0x0 0x44000 0x1000>;
950 compatible = "ti,am4372-timer","ti,am335x-timer";
952 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
958 target-module@46000 { /* 0x48046000, ap 24 28.0 */
959 compatible = "ti,sysc-omap4-timer", "ti,sysc";
960 ti,hwmods = "timer5";
964 reg-names = "rev", "sysc", "syss";
965 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
966 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
969 <SYSC_IDLE_SMART_WKUP>;
970 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
971 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>;
973 #address-cells = <1>;
975 ranges = <0x0 0x46000 0x1000>;
978 compatible = "ti,am4372-timer","ti,am335x-timer";
980 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
986 target-module@48000 { /* 0x48048000, ap 26 1a.0 */
987 compatible = "ti,sysc-omap4-timer", "ti,sysc";
988 ti,hwmods = "timer6";
992 reg-names = "rev", "sysc", "syss";
993 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
994 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
997 <SYSC_IDLE_SMART_WKUP>;
998 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
999 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>;
1000 clock-names = "fck";
1001 #address-cells = <1>;
1003 ranges = <0x0 0x48000 0x1000>;
1006 compatible = "ti,am4372-timer","ti,am335x-timer";
1008 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1010 status = "disabled";
1014 target-module@4a000 { /* 0x4804a000, ap 71 48.0 */
1015 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1016 ti,hwmods = "timer7";
1017 reg = <0x4a000 0x4>,
1020 reg-names = "rev", "sysc", "syss";
1021 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1022 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1025 <SYSC_IDLE_SMART_WKUP>;
1026 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1027 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>;
1028 clock-names = "fck";
1029 #address-cells = <1>;
1031 ranges = <0x0 0x4a000 0x1000>;
1034 compatible = "ti,am4372-timer","ti,am335x-timer";
1036 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1038 status = "disabled";
1042 target-module@4c000 { /* 0x4804c000, ap 28 36.0 */
1043 compatible = "ti,sysc-omap2", "ti,sysc";
1044 reg = <0x4c000 0x4>,
1047 reg-names = "rev", "sysc", "syss";
1048 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1049 SYSC_OMAP2_SOFTRESET |
1050 SYSC_OMAP2_AUTOIDLE)>;
1051 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1054 <SYSC_IDLE_SMART_WKUP>;
1056 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1057 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>,
1058 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>;
1059 clock-names = "fck", "dbclk";
1060 #address-cells = <1>;
1062 ranges = <0x0 0x4c000 0x1000>;
1065 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1067 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1070 interrupt-controller;
1071 #interrupt-cells = <2>;
1072 status = "disabled";
1076 target-module@60000 { /* 0x48060000, ap 30 14.0 */
1077 compatible = "ti,sysc-omap2", "ti,sysc";
1078 reg = <0x602fc 0x4>,
1081 reg-names = "rev", "sysc", "syss";
1082 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1083 SYSC_OMAP2_ENAWAKEUP |
1084 SYSC_OMAP2_SOFTRESET |
1085 SYSC_OMAP2_AUTOIDLE)>;
1086 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1090 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1091 clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>;
1092 clock-names = "fck";
1093 #address-cells = <1>;
1095 ranges = <0x0 0x60000 0x1000>;
1098 compatible = "ti,omap4-hsmmc";
1101 ti,needs-special-reset;
1102 dmas = <&edma 24 0>,
1104 dma-names = "tx", "rx";
1105 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
1106 status = "disabled";
1110 target-module@80000 { /* 0x48080000, ap 32 18.0 */
1111 compatible = "ti,sysc-omap2", "ti,sysc";
1113 reg = <0x80000 0x4>,
1116 reg-names = "rev", "sysc", "syss";
1117 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1118 SYSC_OMAP2_SOFTRESET |
1119 SYSC_OMAP2_AUTOIDLE)>;
1120 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1124 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1125 clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>;
1126 clock-names = "fck";
1127 #address-cells = <1>;
1129 ranges = <0x0 0x80000 0x10000>;
1132 compatible = "ti,am3352-elm";
1134 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1135 clocks = <&l4ls_gclk>;
1136 clock-names = "fck";
1137 status = "disabled";
1141 target-module@c8000 { /* 0x480c8000, ap 73 06.0 */
1142 compatible = "ti,sysc-omap4", "ti,sysc";
1143 reg = <0xc8000 0x4>,
1145 reg-names = "rev", "sysc";
1146 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1147 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1150 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1151 clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>;
1152 clock-names = "fck";
1153 #address-cells = <1>;
1155 ranges = <0x0 0xc8000 0x1000>;
1157 mailbox: mailbox@0 {
1158 compatible = "ti,omap4-mailbox";
1160 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1162 ti,mbox-num-users = <4>;
1163 ti,mbox-num-fifos = <8>;
1164 mbox_wkupm3: wkup_m3 {
1166 ti,mbox-tx = <0 0 0>;
1167 ti,mbox-rx = <0 0 3>;
1172 target-module@ca000 { /* 0x480ca000, ap 77 38.0 */
1173 compatible = "ti,sysc-omap2", "ti,sysc";
1174 ti,hwmods = "spinlock";
1175 reg = <0xca000 0x4>,
1178 reg-names = "rev", "sysc", "syss";
1179 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1180 SYSC_OMAP2_ENAWAKEUP |
1181 SYSC_OMAP2_SOFTRESET |
1182 SYSC_OMAP2_AUTOIDLE)>;
1183 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1187 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1188 clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>;
1189 clock-names = "fck";
1190 #address-cells = <1>;
1192 ranges = <0x0 0xca000 0x1000>;
1194 hwspinlock: spinlock@0 {
1195 compatible = "ti,omap4-hwspinlock";
1197 #hwlock-cells = <1>;
1202 segment@100000 { /* 0x48100000 */
1203 compatible = "simple-bus";
1204 #address-cells = <1>;
1206 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 34 */
1207 <0x0008d000 0x0018d000 0x001000>, /* ap 35 */
1208 <0x0008e000 0x0018e000 0x001000>, /* ap 36 */
1209 <0x0008f000 0x0018f000 0x001000>, /* ap 37 */
1210 <0x0009c000 0x0019c000 0x001000>, /* ap 38 */
1211 <0x0009d000 0x0019d000 0x001000>, /* ap 39 */
1212 <0x000a6000 0x001a6000 0x001000>, /* ap 40 */
1213 <0x000a7000 0x001a7000 0x001000>, /* ap 41 */
1214 <0x000a8000 0x001a8000 0x001000>, /* ap 42 */
1215 <0x000a9000 0x001a9000 0x001000>, /* ap 43 */
1216 <0x000aa000 0x001aa000 0x001000>, /* ap 44 */
1217 <0x000ab000 0x001ab000 0x001000>, /* ap 45 */
1218 <0x000ac000 0x001ac000 0x001000>, /* ap 46 */
1219 <0x000ad000 0x001ad000 0x001000>, /* ap 47 */
1220 <0x000ae000 0x001ae000 0x001000>, /* ap 48 */
1221 <0x000af000 0x001af000 0x001000>, /* ap 49 */
1222 <0x000cc000 0x001cc000 0x002000>, /* ap 50 */
1223 <0x000ce000 0x001ce000 0x002000>, /* ap 51 */
1224 <0x000d0000 0x001d0000 0x002000>, /* ap 52 */
1225 <0x000d2000 0x001d2000 0x002000>, /* ap 53 */
1226 <0x000d8000 0x001d8000 0x001000>, /* ap 54 */
1227 <0x000d9000 0x001d9000 0x001000>, /* ap 55 */
1228 <0x000a0000 0x001a0000 0x001000>, /* ap 67 */
1229 <0x000a1000 0x001a1000 0x001000>, /* ap 68 */
1230 <0x000a2000 0x001a2000 0x001000>, /* ap 69 */
1231 <0x000a3000 0x001a3000 0x001000>, /* ap 70 */
1232 <0x000a4000 0x001a4000 0x001000>, /* ap 92 */
1233 <0x000a5000 0x001a5000 0x001000>, /* ap 93 */
1234 <0x000c1000 0x001c1000 0x001000>, /* ap 94 */
1235 <0x000c2000 0x001c2000 0x001000>; /* ap 95 */
1237 target-module@8c000 { /* 0x4818c000, ap 34 0c.0 */
1238 compatible = "ti,sysc";
1239 status = "disabled";
1240 #address-cells = <1>;
1242 ranges = <0x0 0x8c000 0x1000>;
1245 target-module@8e000 { /* 0x4818e000, ap 36 02.0 */
1246 compatible = "ti,sysc";
1247 status = "disabled";
1248 #address-cells = <1>;
1250 ranges = <0x0 0x8e000 0x1000>;
1253 target-module@9c000 { /* 0x4819c000, ap 38 52.0 */
1254 compatible = "ti,sysc-omap2", "ti,sysc";
1255 reg = <0x9c000 0x8>,
1258 reg-names = "rev", "sysc", "syss";
1259 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1260 SYSC_OMAP2_ENAWAKEUP |
1261 SYSC_OMAP2_SOFTRESET |
1262 SYSC_OMAP2_AUTOIDLE)>;
1263 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1266 <SYSC_IDLE_SMART_WKUP>;
1268 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1269 clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>;
1270 clock-names = "fck";
1271 #address-cells = <1>;
1273 ranges = <0x0 0x9c000 0x1000>;
1276 compatible = "ti,am4372-i2c","ti,omap4-i2c";
1278 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1279 #address-cells = <1>;
1281 status = "disabled";
1285 target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */
1286 compatible = "ti,sysc-omap2", "ti,sysc";
1288 reg = <0xa0000 0x4>,
1291 reg-names = "rev", "sysc", "syss";
1292 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1293 SYSC_OMAP2_SOFTRESET |
1294 SYSC_OMAP2_AUTOIDLE)>;
1295 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1299 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1300 clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>;
1301 clock-names = "fck";
1302 #address-cells = <1>;
1304 ranges = <0x0 0xa0000 0x1000>;
1307 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1309 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1310 #address-cells = <1>;
1312 status = "disabled";
1316 target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */
1317 compatible = "ti,sysc-omap2", "ti,sysc";
1319 reg = <0xa2000 0x4>,
1322 reg-names = "rev", "sysc", "syss";
1323 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1324 SYSC_OMAP2_SOFTRESET |
1325 SYSC_OMAP2_AUTOIDLE)>;
1326 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1330 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1331 clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>;
1332 clock-names = "fck";
1333 #address-cells = <1>;
1335 ranges = <0x0 0xa2000 0x1000>;
1338 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1340 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
1341 #address-cells = <1>;
1343 status = "disabled";
1347 target-module@a4000 { /* 0x481a4000, ap 92 62.0 */
1348 compatible = "ti,sysc-omap2", "ti,sysc";
1350 reg = <0xa4000 0x4>,
1353 reg-names = "rev", "sysc", "syss";
1354 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1355 SYSC_OMAP2_SOFTRESET |
1356 SYSC_OMAP2_AUTOIDLE)>;
1357 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1361 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1362 clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>;
1363 clock-names = "fck";
1364 #address-cells = <1>;
1366 ranges = <0x0 0xa4000 0x1000>;
1369 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1371 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
1372 #address-cells = <1>;
1374 status = "disabled";
1378 target-module@a6000 { /* 0x481a6000, ap 40 16.0 */
1379 compatible = "ti,sysc-omap2", "ti,sysc";
1380 reg = <0xa6050 0x4>,
1383 reg-names = "rev", "sysc", "syss";
1384 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1385 SYSC_OMAP2_SOFTRESET |
1386 SYSC_OMAP2_AUTOIDLE)>;
1387 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1390 <SYSC_IDLE_SMART_WKUP>;
1391 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1392 clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>;
1393 clock-names = "fck";
1394 #address-cells = <1>;
1396 ranges = <0x0 0xa6000 0x1000>;
1399 compatible = "ti,am4372-uart","ti,omap2-uart";
1401 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
1402 status = "disabled";
1406 target-module@a8000 { /* 0x481a8000, ap 42 20.0 */
1407 compatible = "ti,sysc-omap2", "ti,sysc";
1408 reg = <0xa8050 0x4>,
1411 reg-names = "rev", "sysc", "syss";
1412 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1413 SYSC_OMAP2_SOFTRESET |
1414 SYSC_OMAP2_AUTOIDLE)>;
1415 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1418 <SYSC_IDLE_SMART_WKUP>;
1419 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1420 clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>;
1421 clock-names = "fck";
1422 #address-cells = <1>;
1424 ranges = <0x0 0xa8000 0x1000>;
1427 compatible = "ti,am4372-uart","ti,omap2-uart";
1429 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1430 status = "disabled";
1434 target-module@aa000 { /* 0x481aa000, ap 44 12.0 */
1435 compatible = "ti,sysc-omap2", "ti,sysc";
1436 reg = <0xaa050 0x4>,
1439 reg-names = "rev", "sysc", "syss";
1440 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1441 SYSC_OMAP2_SOFTRESET |
1442 SYSC_OMAP2_AUTOIDLE)>;
1443 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1446 <SYSC_IDLE_SMART_WKUP>;
1447 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1448 clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>;
1449 clock-names = "fck";
1450 #address-cells = <1>;
1452 ranges = <0x0 0xaa000 0x1000>;
1455 compatible = "ti,am4372-uart","ti,omap2-uart";
1457 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1458 status = "disabled";
1462 target-module@ac000 { /* 0x481ac000, ap 46 30.0 */
1463 compatible = "ti,sysc-omap2", "ti,sysc";
1464 reg = <0xac000 0x4>,
1467 reg-names = "rev", "sysc", "syss";
1468 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1469 SYSC_OMAP2_SOFTRESET |
1470 SYSC_OMAP2_AUTOIDLE)>;
1471 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1474 <SYSC_IDLE_SMART_WKUP>;
1476 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1477 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>,
1478 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>;
1479 clock-names = "fck", "dbclk";
1480 #address-cells = <1>;
1482 ranges = <0x0 0xac000 0x1000>;
1485 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1487 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1490 interrupt-controller;
1491 #interrupt-cells = <2>;
1492 status = "disabled";
1496 target-module@ae000 { /* 0x481ae000, ap 48 32.0 */
1497 compatible = "ti,sysc-omap2", "ti,sysc";
1498 reg = <0xae000 0x4>,
1501 reg-names = "rev", "sysc", "syss";
1502 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1503 SYSC_OMAP2_SOFTRESET |
1504 SYSC_OMAP2_AUTOIDLE)>;
1505 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1508 <SYSC_IDLE_SMART_WKUP>;
1510 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1511 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>,
1512 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>;
1513 clock-names = "fck", "dbclk";
1514 #address-cells = <1>;
1516 ranges = <0x0 0xae000 0x1000>;
1519 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1521 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1524 interrupt-controller;
1525 #interrupt-cells = <2>;
1526 status = "disabled";
1530 target-module@c1000 { /* 0x481c1000, ap 94 68.0 */
1531 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1532 ti,hwmods = "timer8";
1533 reg = <0xc1000 0x4>,
1536 reg-names = "rev", "sysc", "syss";
1537 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1538 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1541 <SYSC_IDLE_SMART_WKUP>;
1542 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1543 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>;
1544 clock-names = "fck";
1545 #address-cells = <1>;
1547 ranges = <0x0 0xc1000 0x1000>;
1550 compatible = "ti,am4372-timer","ti,am335x-timer";
1552 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
1553 status = "disabled";
1557 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */
1558 compatible = "ti,sysc-omap4", "ti,sysc";
1559 reg = <0xcc020 0x4>;
1561 ti,hwmods = "d_can0";
1562 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1563 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>;
1564 clock-names = "fck";
1565 #address-cells = <1>;
1567 ranges = <0x0 0xcc000 0x2000>;
1570 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1572 syscon-raminit = <&scm_conf 0x644 0>;
1573 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1574 status = "disabled";
1578 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */
1579 compatible = "ti,sysc-omap4", "ti,sysc";
1580 reg = <0xd0020 0x4>;
1582 ti,hwmods = "d_can1";
1583 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1584 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>;
1585 clock-names = "fck";
1586 #address-cells = <1>;
1588 ranges = <0x0 0xd0000 0x2000>;
1591 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1593 syscon-raminit = <&scm_conf 0x644 1>;
1594 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1595 status = "disabled";
1599 target-module@d8000 { /* 0x481d8000, ap 54 5e.0 */
1600 compatible = "ti,sysc-omap2", "ti,sysc";
1601 reg = <0xd82fc 0x4>,
1604 reg-names = "rev", "sysc", "syss";
1605 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1606 SYSC_OMAP2_ENAWAKEUP |
1607 SYSC_OMAP2_SOFTRESET |
1608 SYSC_OMAP2_AUTOIDLE)>;
1609 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1613 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1614 clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>;
1615 clock-names = "fck";
1616 #address-cells = <1>;
1618 ranges = <0x0 0xd8000 0x1000>;
1621 compatible = "ti,omap4-hsmmc";
1623 ti,needs-special-reset;
1626 dma-names = "tx", "rx";
1627 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
1628 status = "disabled";
1633 segment@200000 { /* 0x48200000 */
1634 compatible = "simple-bus";
1635 #address-cells = <1>;
1639 segment@300000 { /* 0x48300000 */
1640 compatible = "simple-bus";
1641 #address-cells = <1>;
1643 ranges = <0x00000000 0x00300000 0x001000>, /* ap 56 */
1644 <0x00001000 0x00301000 0x001000>, /* ap 57 */
1645 <0x00002000 0x00302000 0x001000>, /* ap 58 */
1646 <0x00003000 0x00303000 0x001000>, /* ap 59 */
1647 <0x00004000 0x00304000 0x001000>, /* ap 60 */
1648 <0x00005000 0x00305000 0x001000>, /* ap 61 */
1649 <0x00018000 0x00318000 0x004000>, /* ap 62 */
1650 <0x0001c000 0x0031c000 0x001000>, /* ap 63 */
1651 <0x00010000 0x00310000 0x002000>, /* ap 64 */
1652 <0x00028000 0x00328000 0x001000>, /* ap 75 */
1653 <0x00029000 0x00329000 0x001000>, /* ap 76 */
1654 <0x00012000 0x00312000 0x001000>, /* ap 79 */
1655 <0x00020000 0x00320000 0x001000>, /* ap 82 */
1656 <0x00021000 0x00321000 0x001000>, /* ap 83 */
1657 <0x00026000 0x00326000 0x001000>, /* ap 86 */
1658 <0x00027000 0x00327000 0x001000>, /* ap 87 */
1659 <0x0002a000 0x0032a000 0x000400>, /* ap 88 */
1660 <0x0002c000 0x0032c000 0x001000>, /* ap 89 */
1661 <0x00013000 0x00313000 0x001000>, /* ap 90 */
1662 <0x00014000 0x00314000 0x001000>, /* ap 91 */
1663 <0x00006000 0x00306000 0x001000>, /* ap 96 */
1664 <0x00007000 0x00307000 0x001000>, /* ap 97 */
1665 <0x00008000 0x00308000 0x001000>, /* ap 98 */
1666 <0x00009000 0x00309000 0x001000>, /* ap 99 */
1667 <0x0000a000 0x0030a000 0x001000>, /* ap 100 */
1668 <0x0000b000 0x0030b000 0x001000>, /* ap 101 */
1669 <0x0003d000 0x0033d000 0x001000>, /* ap 102 */
1670 <0x0003e000 0x0033e000 0x001000>, /* ap 103 */
1671 <0x0003f000 0x0033f000 0x001000>, /* ap 104 */
1672 <0x00040000 0x00340000 0x001000>, /* ap 105 */
1673 <0x00041000 0x00341000 0x001000>, /* ap 106 */
1674 <0x00042000 0x00342000 0x001000>, /* ap 107 */
1675 <0x00045000 0x00345000 0x001000>, /* ap 108 */
1676 <0x00046000 0x00346000 0x001000>, /* ap 109 */
1677 <0x00047000 0x00347000 0x001000>, /* ap 110 */
1678 <0x00048000 0x00348000 0x001000>, /* ap 111 */
1679 <0x000f2000 0x003f2000 0x002000>, /* ap 112 */
1680 <0x000f4000 0x003f4000 0x001000>, /* ap 113 */
1681 <0x0004c000 0x0034c000 0x002000>, /* ap 114 */
1682 <0x0004e000 0x0034e000 0x001000>, /* ap 115 */
1683 <0x00022000 0x00322000 0x001000>, /* ap 116 */
1684 <0x00023000 0x00323000 0x001000>, /* ap 117 */
1685 <0x000f0000 0x003f0000 0x001000>, /* ap 118 */
1686 <0x0002a400 0x0032a400 0x000400>, /* ap 119 */
1687 <0x0002a800 0x0032a800 0x000400>, /* ap 120 */
1688 <0x0002ac00 0x0032ac00 0x000400>, /* ap 121 */
1689 <0x0002b000 0x0032b000 0x001000>, /* ap 122 */
1690 <0x00080000 0x00380000 0x020000>, /* ap 123 */
1691 <0x000a0000 0x003a0000 0x001000>, /* ap 124 */
1692 <0x000a8000 0x003a8000 0x008000>, /* ap 125 */
1693 <0x000b0000 0x003b0000 0x001000>, /* ap 126 */
1694 <0x000c0000 0x003c0000 0x020000>, /* ap 127 */
1695 <0x000e0000 0x003e0000 0x001000>, /* ap 128 */
1696 <0x000e8000 0x003e8000 0x008000>; /* ap 129 */
1698 target-module@0 { /* 0x48300000, ap 56 40.0 */
1699 compatible = "ti,sysc-omap4", "ti,sysc";
1700 ti,hwmods = "epwmss0";
1703 reg-names = "rev", "sysc";
1704 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1707 <SYSC_IDLE_SMART_WKUP>;
1708 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1711 <SYSC_IDLE_SMART_WKUP>;
1712 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1713 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>;
1714 clock-names = "fck";
1715 #address-cells = <1>;
1717 ranges = <0x0 0x0 0x1000>;
1720 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1722 #address-cells = <1>;
1724 ranges = <0 0 0x1000>;
1725 status = "disabled";
1728 compatible = "ti,am4372-ecap",
1733 clocks = <&l4ls_gclk>;
1734 clock-names = "fck";
1735 status = "disabled";
1739 compatible = "ti,am4372-ehrpwm",
1744 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1745 clock-names = "tbclk", "fck";
1746 status = "disabled";
1751 target-module@2000 { /* 0x48302000, ap 58 4a.0 */
1752 compatible = "ti,sysc-omap4", "ti,sysc";
1753 ti,hwmods = "epwmss1";
1756 reg-names = "rev", "sysc";
1757 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1760 <SYSC_IDLE_SMART_WKUP>;
1761 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1764 <SYSC_IDLE_SMART_WKUP>;
1765 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1766 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>;
1767 clock-names = "fck";
1768 #address-cells = <1>;
1770 ranges = <0x0 0x2000 0x1000>;
1773 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1775 #address-cells = <1>;
1777 ranges = <0 0 0x1000>;
1778 status = "disabled";
1781 compatible = "ti,am4372-ecap",
1786 clocks = <&l4ls_gclk>;
1787 clock-names = "fck";
1788 status = "disabled";
1792 compatible = "ti,am4372-ehrpwm",
1797 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1798 clock-names = "tbclk", "fck";
1799 status = "disabled";
1804 target-module@4000 { /* 0x48304000, ap 60 44.0 */
1805 compatible = "ti,sysc-omap4", "ti,sysc";
1806 ti,hwmods = "epwmss2";
1809 reg-names = "rev", "sysc";
1810 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1813 <SYSC_IDLE_SMART_WKUP>;
1814 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1817 <SYSC_IDLE_SMART_WKUP>;
1818 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1819 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>;
1820 clock-names = "fck";
1821 #address-cells = <1>;
1823 ranges = <0x0 0x4000 0x1000>;
1826 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1828 #address-cells = <1>;
1830 ranges = <0 0 0x1000>;
1831 status = "disabled";
1834 compatible = "ti,am4372-ecap",
1839 clocks = <&l4ls_gclk>;
1840 clock-names = "fck";
1841 status = "disabled";
1845 compatible = "ti,am4372-ehrpwm",
1850 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
1851 clock-names = "tbclk", "fck";
1852 status = "disabled";
1857 target-module@6000 { /* 0x48306000, ap 96 58.0 */
1858 compatible = "ti,sysc-omap4", "ti,sysc";
1859 ti,hwmods = "epwmss3";
1862 reg-names = "rev", "sysc";
1863 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1866 <SYSC_IDLE_SMART_WKUP>;
1867 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1870 <SYSC_IDLE_SMART_WKUP>;
1871 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1872 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>;
1873 clock-names = "fck";
1874 #address-cells = <1>;
1876 ranges = <0x0 0x6000 0x1000>;
1879 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1881 #address-cells = <1>;
1883 ranges = <0 0 0x1000>;
1884 status = "disabled";
1887 compatible = "ti,am4372-ehrpwm",
1892 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
1893 clock-names = "tbclk", "fck";
1894 status = "disabled";
1899 target-module@8000 { /* 0x48308000, ap 98 54.0 */
1900 compatible = "ti,sysc-omap4", "ti,sysc";
1901 ti,hwmods = "epwmss4";
1904 reg-names = "rev", "sysc";
1905 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1908 <SYSC_IDLE_SMART_WKUP>;
1909 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1912 <SYSC_IDLE_SMART_WKUP>;
1913 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1914 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>;
1915 clock-names = "fck";
1916 #address-cells = <1>;
1918 ranges = <0x0 0x8000 0x1000>;
1921 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1923 #address-cells = <1>;
1925 ranges = <0 0 0x1000>;
1926 status = "disabled";
1928 ehrpwm4: pwm@48308200 {
1929 compatible = "ti,am4372-ehrpwm",
1934 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
1935 clock-names = "tbclk", "fck";
1936 status = "disabled";
1941 target-module@a000 { /* 0x4830a000, ap 100 60.0 */
1942 compatible = "ti,sysc-omap4", "ti,sysc";
1943 ti,hwmods = "epwmss5";
1946 reg-names = "rev", "sysc";
1947 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1950 <SYSC_IDLE_SMART_WKUP>;
1951 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1954 <SYSC_IDLE_SMART_WKUP>;
1955 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1956 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>;
1957 clock-names = "fck";
1958 #address-cells = <1>;
1960 ranges = <0x0 0xa000 0x1000>;
1963 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1965 #address-cells = <1>;
1967 ranges = <0 0 0x1000>;
1968 status = "disabled";
1971 compatible = "ti,am4372-ehrpwm",
1976 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
1977 clock-names = "tbclk", "fck";
1978 status = "disabled";
1983 target-module@10000 { /* 0x48310000, ap 64 4e.1 */
1984 compatible = "ti,sysc-omap2", "ti,sysc";
1985 reg = <0x11fe0 0x4>,
1987 reg-names = "rev", "sysc";
1988 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
1989 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1991 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1992 clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>;
1993 clock-names = "fck";
1994 #address-cells = <1>;
1996 ranges = <0x0 0x10000 0x2000>;
1999 compatible = "ti,omap4-rng";
2001 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
2005 target-module@13000 { /* 0x48313000, ap 90 50.0 */
2006 compatible = "ti,sysc";
2007 status = "disabled";
2008 #address-cells = <1>;
2010 ranges = <0x0 0x13000 0x1000>;
2013 target-module@18000 { /* 0x48318000, ap 62 4c.0 */
2014 compatible = "ti,sysc";
2015 status = "disabled";
2016 #address-cells = <1>;
2018 ranges = <0x0 0x18000 0x4000>;
2021 target-module@20000 { /* 0x48320000, ap 82 34.0 */
2022 compatible = "ti,sysc-omap2", "ti,sysc";
2023 reg = <0x20000 0x4>,
2026 reg-names = "rev", "sysc", "syss";
2027 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2028 SYSC_OMAP2_SOFTRESET |
2029 SYSC_OMAP2_AUTOIDLE)>;
2030 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2033 <SYSC_IDLE_SMART_WKUP>;
2035 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2036 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>,
2037 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>;
2038 clock-names = "fck", "dbclk";
2039 #address-cells = <1>;
2041 ranges = <0x0 0x20000 0x1000>;
2044 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2046 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
2049 interrupt-controller;
2050 #interrupt-cells = <2>;
2051 status = "disabled";
2055 target-module@22000 { /* 0x48322000, ap 116 64.0 */
2056 compatible = "ti,sysc-omap2", "ti,sysc";
2057 reg = <0x22000 0x4>,
2060 reg-names = "rev", "sysc", "syss";
2061 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2062 SYSC_OMAP2_SOFTRESET |
2063 SYSC_OMAP2_AUTOIDLE)>;
2064 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2067 <SYSC_IDLE_SMART_WKUP>;
2069 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2070 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>,
2071 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>;
2072 clock-names = "fck", "dbclk";
2073 #address-cells = <1>;
2075 ranges = <0x0 0x22000 0x1000>;
2078 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2080 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2083 interrupt-controller;
2084 #interrupt-cells = <2>;
2085 status = "disabled";
2089 target-module@26000 { /* 0x48326000, ap 86 66.0 */
2090 compatible = "ti,sysc-omap4", "ti,sysc";
2091 ti,hwmods = "vpfe0";
2092 reg = <0x26000 0x4>,
2094 reg-names = "rev", "sysc";
2095 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2098 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2101 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2102 clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>;
2103 clock-names = "fck";
2104 #address-cells = <1>;
2106 ranges = <0x0 0x26000 0x1000>;
2109 compatible = "ti,am437x-vpfe";
2111 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2112 status = "disabled";
2116 target-module@28000 { /* 0x48328000, ap 75 0e.0 */
2117 compatible = "ti,sysc-omap4", "ti,sysc";
2118 ti,hwmods = "vpfe1";
2119 reg = <0x28000 0x4>,
2121 reg-names = "rev", "sysc";
2122 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2125 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2128 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2129 clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>;
2130 clock-names = "fck";
2131 #address-cells = <1>;
2133 ranges = <0x0 0x28000 0x1000>;
2136 compatible = "ti,am437x-vpfe";
2138 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
2139 status = "disabled";
2143 target-module@2a000 { /* 0x4832a000, ap 88 3c.0 */
2144 compatible = "ti,sysc-omap2", "ti,sysc";
2145 ti,hwmods = "dss_core";
2146 reg = <0x2a000 0x4>,
2149 reg-names = "rev", "sysc", "syss";
2150 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2151 SYSC_OMAP2_AUTOIDLE)>;
2153 /* Domains (P, C): per_pwrdm, dss_clkdm */
2154 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2155 clock-names = "fck";
2156 #address-cells = <1>;
2158 ranges = <0x00000000 0x0002a000 0x00000400>,
2159 <0x00000400 0x0002a400 0x00000400>,
2160 <0x00000800 0x0002a800 0x00000400>,
2161 <0x00000c00 0x0002ac00 0x00000400>,
2162 <0x00001000 0x0002b000 0x00001000>;
2165 target-module@3d000 { /* 0x4833d000, ap 102 6e.0 */
2166 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2167 ti,hwmods = "timer9";
2168 reg = <0x3d000 0x4>,
2171 reg-names = "rev", "sysc", "syss";
2172 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2173 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2176 <SYSC_IDLE_SMART_WKUP>;
2177 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2178 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>;
2179 clock-names = "fck";
2180 #address-cells = <1>;
2182 ranges = <0x0 0x3d000 0x1000>;
2185 compatible = "ti,am4372-timer","ti,am335x-timer";
2187 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
2188 status = "disabled";
2192 target-module@3f000 { /* 0x4833f000, ap 104 5c.0 */
2193 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2194 ti,hwmods = "timer10";
2195 reg = <0x3f000 0x4>,
2198 reg-names = "rev", "sysc", "syss";
2199 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2200 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2203 <SYSC_IDLE_SMART_WKUP>;
2204 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2205 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>;
2206 clock-names = "fck";
2207 #address-cells = <1>;
2209 ranges = <0x0 0x3f000 0x1000>;
2212 compatible = "ti,am4372-timer","ti,am335x-timer";
2214 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
2215 status = "disabled";
2219 target-module@41000 { /* 0x48341000, ap 106 76.0 */
2220 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2221 ti,hwmods = "timer11";
2222 reg = <0x41000 0x4>,
2225 reg-names = "rev", "sysc", "syss";
2226 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2227 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2230 <SYSC_IDLE_SMART_WKUP>;
2231 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2232 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>;
2233 clock-names = "fck";
2234 #address-cells = <1>;
2236 ranges = <0x0 0x41000 0x1000>;
2239 compatible = "ti,am4372-timer","ti,am335x-timer";
2241 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
2242 status = "disabled";
2246 target-module@45000 { /* 0x48345000, ap 108 6a.0 */
2247 compatible = "ti,sysc-omap2", "ti,sysc";
2249 reg = <0x45000 0x4>,
2252 reg-names = "rev", "sysc", "syss";
2253 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2254 SYSC_OMAP2_SOFTRESET |
2255 SYSC_OMAP2_AUTOIDLE)>;
2256 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2260 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2261 clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>;
2262 clock-names = "fck";
2263 #address-cells = <1>;
2265 ranges = <0x0 0x45000 0x1000>;
2268 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
2270 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
2271 #address-cells = <1>;
2273 status = "disabled";
2277 target-module@47000 { /* 0x48347000, ap 110 70.0 */
2278 compatible = "ti,sysc-omap2", "ti,sysc";
2279 reg = <0x47000 0x4>,
2282 reg-names = "rev", "sysc", "syss";
2283 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2284 SYSC_OMAP2_AUTOIDLE)>;
2285 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2286 clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>;
2287 clock-names = "fck";
2288 #address-cells = <1>;
2290 ranges = <0x0 0x47000 0x1000>;
2293 compatible = "ti,am4372-hdq";
2295 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
2296 clocks = <&func_12m_clk>;
2297 clock-names = "fck";
2298 status = "disabled";
2302 target-module@4c000 { /* 0x4834c000, ap 114 72.0 */
2303 compatible = "ti,sysc";
2304 status = "disabled";
2305 #address-cells = <1>;
2307 ranges = <0x0 0x4c000 0x2000>;
2310 target-module@80000 { /* 0x48380000, ap 123 42.0 */
2311 compatible = "ti,sysc-omap4", "ti,sysc";
2312 ti,hwmods = "usb_otg_ss0";
2313 reg = <0x80000 0x4>,
2315 reg-names = "rev", "sysc";
2316 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2317 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2320 <SYSC_IDLE_SMART_WKUP>;
2321 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2324 <SYSC_IDLE_SMART_WKUP>;
2325 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2326 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>;
2327 clock-names = "fck";
2328 #address-cells = <1>;
2330 ranges = <0x0 0x80000 0x20000>;
2332 dwc3_1: omap_dwc3@0 {
2333 compatible = "ti,am437x-dwc3";
2334 reg = <0x0 0x10000>;
2335 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2336 #address-cells = <1>;
2339 ranges = <0 0 0x20000>;
2342 compatible = "synopsys,dwc3";
2343 reg = <0x10000 0x10000>;
2344 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2345 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2346 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2347 interrupt-names = "peripheral",
2350 phys = <&usb2_phy1>;
2351 phy-names = "usb2-phy";
2352 maximum-speed = "high-speed";
2354 status = "disabled";
2355 snps,dis_u3_susphy_quirk;
2356 snps,dis_u2_susphy_quirk;
2361 target-module@a8000 { /* 0x483a8000, ap 125 6c.0 */
2362 compatible = "ti,sysc-omap4", "ti,sysc";
2363 ti,hwmods = "ocp2scp0";
2364 reg = <0xa8000 0x4>;
2366 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2367 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>;
2368 clock-names = "fck";
2369 #address-cells = <1>;
2371 ranges = <0x0 0xa8000 0x8000>;
2373 ocp2scp0: ocp2scp@0 {
2374 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2375 #address-cells = <1>;
2377 ranges = <0 0 0x8000>;
2379 usb2_phy1: phy@8000 {
2380 compatible = "ti,am437x-usb2";
2382 syscon-phy-power = <&scm_conf 0x620>;
2383 clocks = <&usb_phy0_always_on_clk32k>,
2384 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>;
2385 clock-names = "wkupclk", "refclk";
2387 status = "disabled";
2392 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */
2393 compatible = "ti,sysc-omap4", "ti,sysc";
2394 ti,hwmods = "usb_otg_ss1";
2395 reg = <0xc0000 0x4>,
2397 reg-names = "rev", "sysc";
2398 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2399 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2402 <SYSC_IDLE_SMART_WKUP>;
2403 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2406 <SYSC_IDLE_SMART_WKUP>;
2407 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2408 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>;
2409 clock-names = "fck";
2410 #address-cells = <1>;
2412 ranges = <0x0 0xc0000 0x20000>;
2414 dwc3_2: omap_dwc3@0 {
2415 compatible = "ti,am437x-dwc3";
2416 reg = <0x0 0x10000>;
2417 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2418 #address-cells = <1>;
2421 ranges = <0 0 0x20000>;
2424 compatible = "synopsys,dwc3";
2425 reg = <0x10000 0x10000>;
2426 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2427 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2428 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2429 interrupt-names = "peripheral",
2432 phys = <&usb2_phy2>;
2433 phy-names = "usb2-phy";
2434 maximum-speed = "high-speed";
2436 status = "disabled";
2437 snps,dis_u3_susphy_quirk;
2438 snps,dis_u2_susphy_quirk;
2443 target-module@e8000 { /* 0x483e8000, ap 129 78.0 */
2444 compatible = "ti,sysc-omap4", "ti,sysc";
2445 ti,hwmods = "ocp2scp1";
2446 reg = <0xe8000 0x4>;
2448 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2449 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>;
2450 clock-names = "fck";
2451 #address-cells = <1>;
2453 ranges = <0x0 0xe8000 0x8000>;
2455 ocp2scp1: ocp2scp@0 {
2456 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2457 #address-cells = <1>;
2459 ranges = <0 0 0x8000>;
2461 usb2_phy2: phy@8000 {
2462 compatible = "ti,am437x-usb2";
2464 syscon-phy-power = <&scm_conf 0x628>;
2465 clocks = <&usb_phy1_always_on_clk32k>,
2466 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>;
2467 clock-names = "wkupclk", "refclk";
2469 status = "disabled";
2474 target-module@f2000 { /* 0x483f2000, ap 112 5a.0 */
2475 compatible = "ti,sysc";
2476 status = "disabled";
2477 #address-cells = <1>;
2479 ranges = <0x0 0xf2000 0x2000>;