1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2500";
9 interrupt-parent = <&vic>;
39 compatible = "arm,arm1176jzf-s";
46 device_type = "memory";
51 compatible = "simple-bus";
56 fmc: flash-controller@1e620000 {
57 reg = < 0x1e620000 0xc4
58 0x20000000 0x10000000 >;
61 compatible = "aspeed,ast2500-fmc";
62 clocks = <&syscon ASPEED_CLK_AHB>;
67 compatible = "jedec,spi-nor";
72 compatible = "jedec,spi-nor";
77 compatible = "jedec,spi-nor";
82 spi1: flash-controller@1e630000 {
83 reg = < 0x1e630000 0xc4
84 0x30000000 0x08000000 >;
87 compatible = "aspeed,ast2500-spi";
88 clocks = <&syscon ASPEED_CLK_AHB>;
92 compatible = "jedec,spi-nor";
97 compatible = "jedec,spi-nor";
102 spi2: flash-controller@1e631000 {
103 reg = < 0x1e631000 0xc4
104 0x38000000 0x08000000 >;
105 #address-cells = <1>;
107 compatible = "aspeed,ast2500-spi";
108 clocks = <&syscon ASPEED_CLK_AHB>;
112 compatible = "jedec,spi-nor";
117 compatible = "jedec,spi-nor";
122 vic: interrupt-controller@1e6c0080 {
123 compatible = "aspeed,ast2400-vic";
124 interrupt-controller;
125 #interrupt-cells = <1>;
126 valid-sources = <0xfefff7ff 0x0807ffff>;
127 reg = <0x1e6c0080 0x80>;
130 cvic: copro-interrupt-controller@1e6c2000 {
131 compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
132 valid-sources = <0xffffffff>;
133 copro-sw-interrupts = <1>;
134 reg = <0x1e6c2000 0x80>;
137 mac0: ethernet@1e660000 {
138 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
139 reg = <0x1e660000 0x180>;
141 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
145 mac1: ethernet@1e680000 {
146 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
147 reg = <0x1e680000 0x180>;
149 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
153 ehci0: usb@1e6a1000 {
154 compatible = "aspeed,ast2500-ehci", "generic-ehci";
155 reg = <0x1e6a1000 0x100>;
157 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_usb2ah_default>;
163 ehci1: usb@1e6a3000 {
164 compatible = "aspeed,ast2500-ehci", "generic-ehci";
165 reg = <0x1e6a3000 0x100>;
167 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_usb2bh_default>;
174 compatible = "aspeed,ast2500-uhci", "generic-uhci";
175 reg = <0x1e6b0000 0x100>;
178 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
181 * No default pinmux, it will follow EHCI, use an explicit pinmux
182 * override if you don't enable EHCI
186 vhub: usb-vhub@1e6a0000 {
187 compatible = "aspeed,ast2500-usb-vhub";
188 reg = <0x1e6a0000 0x300>;
190 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_usb2ad_default>;
197 compatible = "simple-bus";
198 #address-cells = <1>;
202 syscon: syscon@1e6e2000 {
203 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
204 reg = <0x1e6e2000 0x1a8>;
205 #address-cells = <1>;
211 compatible = "aspeed,g5-pinctrl";
212 aspeed,external-nodes = <&gfx &lhc>;
217 rng: hwrng@1e6e2078 {
218 compatible = "timeriomem_rng";
219 reg = <0x1e6e2078 0x4>;
224 gfx: display@1e6e6000 {
225 compatible = "aspeed,ast2500-gfx", "syscon";
226 reg = <0x1e6e6000 0x1000>;
231 compatible = "aspeed,ast2500-adc";
232 reg = <0x1e6e9000 0xb0>;
233 clocks = <&syscon ASPEED_CLK_APB>;
234 resets = <&syscon ASPEED_RESET_ADC>;
235 #io-channel-cells = <1>;
239 sram: sram@1e720000 {
240 compatible = "mmio-sram";
241 reg = <0x1e720000 0x9000>; // 36K
244 gpio: gpio@1e780000 {
247 compatible = "aspeed,ast2500-gpio";
248 reg = <0x1e780000 0x1000>;
250 gpio-ranges = <&pinctrl 0 0 220>;
251 clocks = <&syscon ASPEED_CLK_APB>;
252 interrupt-controller;
255 timer: timer@1e782000 {
256 /* This timer is a Faraday FTTMR010 derivative */
257 compatible = "aspeed,ast2400-timer";
258 reg = <0x1e782000 0x90>;
259 interrupts = <16 17 18 35 36 37 38 39>;
260 clocks = <&syscon ASPEED_CLK_APB>;
261 clock-names = "PCLK";
264 uart1: serial@1e783000 {
265 compatible = "ns16550a";
266 reg = <0x1e783000 0x20>;
269 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
270 resets = <&lpc_reset 4>;
275 uart5: serial@1e784000 {
276 compatible = "ns16550a";
277 reg = <0x1e784000 0x20>;
280 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
285 wdt1: watchdog@1e785000 {
286 compatible = "aspeed,ast2500-wdt";
287 reg = <0x1e785000 0x20>;
288 clocks = <&syscon ASPEED_CLK_APB>;
291 wdt2: watchdog@1e785020 {
292 compatible = "aspeed,ast2500-wdt";
293 reg = <0x1e785020 0x20>;
294 clocks = <&syscon ASPEED_CLK_APB>;
297 wdt3: watchdog@1e785040 {
298 compatible = "aspeed,ast2500-wdt";
299 reg = <0x1e785040 0x20>;
300 clocks = <&syscon ASPEED_CLK_APB>;
304 pwm_tacho: pwm-tacho-controller@1e786000 {
305 compatible = "aspeed,ast2500-pwm-tacho";
306 #address-cells = <1>;
308 reg = <0x1e786000 0x1000>;
309 clocks = <&syscon ASPEED_CLK_24M>;
310 resets = <&syscon ASPEED_RESET_PWM>;
314 vuart: serial@1e787000 {
315 compatible = "aspeed,ast2500-vuart";
316 reg = <0x1e787000 0x40>;
319 clocks = <&syscon ASPEED_CLK_APB>;
325 compatible = "aspeed,ast2500-lpc", "simple-mfd";
326 reg = <0x1e789000 0x1000>;
328 #address-cells = <1>;
330 ranges = <0x0 0x1e789000 0x1000>;
333 compatible = "aspeed,ast2500-lpc-bmc";
337 lpc_host: lpc-host@80 {
338 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
342 #address-cells = <1>;
344 ranges = <0x0 0x80 0x1e0>;
346 lpc_ctrl: lpc-ctrl@0 {
347 compatible = "aspeed,ast2500-lpc-ctrl";
349 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
353 lpc_snoop: lpc-snoop@0 {
354 compatible = "aspeed,ast2500-lpc-snoop";
361 compatible = "aspeed,ast2500-lhc";
362 reg = <0x20 0x24 0x48 0x8>;
365 lpc_reset: reset-controller@18 {
366 compatible = "aspeed,ast2500-lpc-reset";
372 compatible = "aspeed,ast2500-ibt-bmc";
380 uart2: serial@1e78d000 {
381 compatible = "ns16550a";
382 reg = <0x1e78d000 0x20>;
385 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
386 resets = <&lpc_reset 5>;
391 uart3: serial@1e78e000 {
392 compatible = "ns16550a";
393 reg = <0x1e78e000 0x20>;
396 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
397 resets = <&lpc_reset 6>;
402 uart4: serial@1e78f000 {
403 compatible = "ns16550a";
404 reg = <0x1e78f000 0x20>;
407 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
408 resets = <&lpc_reset 7>;
414 compatible = "simple-bus";
415 #address-cells = <1>;
417 ranges = <0 0x1e78a000 0x1000>;
424 i2c_ic: interrupt-controller@0 {
425 #interrupt-cells = <1>;
426 compatible = "aspeed,ast2500-i2c-ic";
429 interrupt-controller;
433 #address-cells = <1>;
435 #interrupt-cells = <1>;
438 compatible = "aspeed,ast2500-i2c-bus";
439 clocks = <&syscon ASPEED_CLK_APB>;
440 resets = <&syscon ASPEED_RESET_I2C>;
441 bus-frequency = <100000>;
443 interrupt-parent = <&i2c_ic>;
445 /* Does not need pinctrl properties */
449 #address-cells = <1>;
451 #interrupt-cells = <1>;
454 compatible = "aspeed,ast2500-i2c-bus";
455 clocks = <&syscon ASPEED_CLK_APB>;
456 resets = <&syscon ASPEED_RESET_I2C>;
457 bus-frequency = <100000>;
459 interrupt-parent = <&i2c_ic>;
461 /* Does not need pinctrl properties */
465 #address-cells = <1>;
467 #interrupt-cells = <1>;
470 compatible = "aspeed,ast2500-i2c-bus";
471 clocks = <&syscon ASPEED_CLK_APB>;
472 resets = <&syscon ASPEED_RESET_I2C>;
473 bus-frequency = <100000>;
475 interrupt-parent = <&i2c_ic>;
476 pinctrl-names = "default";
477 pinctrl-0 = <&pinctrl_i2c3_default>;
482 #address-cells = <1>;
484 #interrupt-cells = <1>;
487 compatible = "aspeed,ast2500-i2c-bus";
488 clocks = <&syscon ASPEED_CLK_APB>;
489 resets = <&syscon ASPEED_RESET_I2C>;
490 bus-frequency = <100000>;
492 interrupt-parent = <&i2c_ic>;
493 pinctrl-names = "default";
494 pinctrl-0 = <&pinctrl_i2c4_default>;
499 #address-cells = <1>;
501 #interrupt-cells = <1>;
504 compatible = "aspeed,ast2500-i2c-bus";
505 clocks = <&syscon ASPEED_CLK_APB>;
506 resets = <&syscon ASPEED_RESET_I2C>;
507 bus-frequency = <100000>;
509 interrupt-parent = <&i2c_ic>;
510 pinctrl-names = "default";
511 pinctrl-0 = <&pinctrl_i2c5_default>;
516 #address-cells = <1>;
518 #interrupt-cells = <1>;
521 compatible = "aspeed,ast2500-i2c-bus";
522 clocks = <&syscon ASPEED_CLK_APB>;
523 resets = <&syscon ASPEED_RESET_I2C>;
524 bus-frequency = <100000>;
526 interrupt-parent = <&i2c_ic>;
527 pinctrl-names = "default";
528 pinctrl-0 = <&pinctrl_i2c6_default>;
533 #address-cells = <1>;
535 #interrupt-cells = <1>;
538 compatible = "aspeed,ast2500-i2c-bus";
539 clocks = <&syscon ASPEED_CLK_APB>;
540 resets = <&syscon ASPEED_RESET_I2C>;
541 bus-frequency = <100000>;
543 interrupt-parent = <&i2c_ic>;
544 pinctrl-names = "default";
545 pinctrl-0 = <&pinctrl_i2c7_default>;
550 #address-cells = <1>;
552 #interrupt-cells = <1>;
555 compatible = "aspeed,ast2500-i2c-bus";
556 clocks = <&syscon ASPEED_CLK_APB>;
557 resets = <&syscon ASPEED_RESET_I2C>;
558 bus-frequency = <100000>;
560 interrupt-parent = <&i2c_ic>;
561 pinctrl-names = "default";
562 pinctrl-0 = <&pinctrl_i2c8_default>;
567 #address-cells = <1>;
569 #interrupt-cells = <1>;
572 compatible = "aspeed,ast2500-i2c-bus";
573 clocks = <&syscon ASPEED_CLK_APB>;
574 resets = <&syscon ASPEED_RESET_I2C>;
575 bus-frequency = <100000>;
577 interrupt-parent = <&i2c_ic>;
578 pinctrl-names = "default";
579 pinctrl-0 = <&pinctrl_i2c9_default>;
584 #address-cells = <1>;
586 #interrupt-cells = <1>;
589 compatible = "aspeed,ast2500-i2c-bus";
590 clocks = <&syscon ASPEED_CLK_APB>;
591 resets = <&syscon ASPEED_RESET_I2C>;
592 bus-frequency = <100000>;
594 interrupt-parent = <&i2c_ic>;
595 pinctrl-names = "default";
596 pinctrl-0 = <&pinctrl_i2c10_default>;
601 #address-cells = <1>;
603 #interrupt-cells = <1>;
606 compatible = "aspeed,ast2500-i2c-bus";
607 clocks = <&syscon ASPEED_CLK_APB>;
608 resets = <&syscon ASPEED_RESET_I2C>;
609 bus-frequency = <100000>;
611 interrupt-parent = <&i2c_ic>;
612 pinctrl-names = "default";
613 pinctrl-0 = <&pinctrl_i2c11_default>;
618 #address-cells = <1>;
620 #interrupt-cells = <1>;
623 compatible = "aspeed,ast2500-i2c-bus";
624 clocks = <&syscon ASPEED_CLK_APB>;
625 resets = <&syscon ASPEED_RESET_I2C>;
626 bus-frequency = <100000>;
628 interrupt-parent = <&i2c_ic>;
629 pinctrl-names = "default";
630 pinctrl-0 = <&pinctrl_i2c12_default>;
635 #address-cells = <1>;
637 #interrupt-cells = <1>;
640 compatible = "aspeed,ast2500-i2c-bus";
641 clocks = <&syscon ASPEED_CLK_APB>;
642 resets = <&syscon ASPEED_RESET_I2C>;
643 bus-frequency = <100000>;
645 interrupt-parent = <&i2c_ic>;
646 pinctrl-names = "default";
647 pinctrl-0 = <&pinctrl_i2c13_default>;
652 #address-cells = <1>;
654 #interrupt-cells = <1>;
657 compatible = "aspeed,ast2500-i2c-bus";
658 clocks = <&syscon ASPEED_CLK_APB>;
659 resets = <&syscon ASPEED_RESET_I2C>;
660 bus-frequency = <100000>;
662 interrupt-parent = <&i2c_ic>;
663 pinctrl-names = "default";
664 pinctrl-0 = <&pinctrl_i2c14_default>;
670 pinctrl_acpi_default: acpi_default {
675 pinctrl_adc0_default: adc0_default {
680 pinctrl_adc1_default: adc1_default {
685 pinctrl_adc10_default: adc10_default {
690 pinctrl_adc11_default: adc11_default {
695 pinctrl_adc12_default: adc12_default {
700 pinctrl_adc13_default: adc13_default {
705 pinctrl_adc14_default: adc14_default {
710 pinctrl_adc15_default: adc15_default {
715 pinctrl_adc2_default: adc2_default {
720 pinctrl_adc3_default: adc3_default {
725 pinctrl_adc4_default: adc4_default {
730 pinctrl_adc5_default: adc5_default {
735 pinctrl_adc6_default: adc6_default {
740 pinctrl_adc7_default: adc7_default {
745 pinctrl_adc8_default: adc8_default {
750 pinctrl_adc9_default: adc9_default {
755 pinctrl_bmcint_default: bmcint_default {
760 pinctrl_ddcclk_default: ddcclk_default {
765 pinctrl_ddcdat_default: ddcdat_default {
770 pinctrl_espi_default: espi_default {
775 pinctrl_fwspics1_default: fwspics1_default {
776 function = "FWSPICS1";
780 pinctrl_fwspics2_default: fwspics2_default {
781 function = "FWSPICS2";
785 pinctrl_gpid0_default: gpid0_default {
790 pinctrl_gpid2_default: gpid2_default {
795 pinctrl_gpid4_default: gpid4_default {
800 pinctrl_gpid6_default: gpid6_default {
805 pinctrl_gpie0_default: gpie0_default {
810 pinctrl_gpie2_default: gpie2_default {
815 pinctrl_gpie4_default: gpie4_default {
820 pinctrl_gpie6_default: gpie6_default {
825 pinctrl_i2c10_default: i2c10_default {
830 pinctrl_i2c11_default: i2c11_default {
835 pinctrl_i2c12_default: i2c12_default {
840 pinctrl_i2c13_default: i2c13_default {
845 pinctrl_i2c14_default: i2c14_default {
850 pinctrl_i2c3_default: i2c3_default {
855 pinctrl_i2c4_default: i2c4_default {
860 pinctrl_i2c5_default: i2c5_default {
865 pinctrl_i2c6_default: i2c6_default {
870 pinctrl_i2c7_default: i2c7_default {
875 pinctrl_i2c8_default: i2c8_default {
880 pinctrl_i2c9_default: i2c9_default {
885 pinctrl_lad0_default: lad0_default {
890 pinctrl_lad1_default: lad1_default {
895 pinctrl_lad2_default: lad2_default {
900 pinctrl_lad3_default: lad3_default {
905 pinctrl_lclk_default: lclk_default {
910 pinctrl_lframe_default: lframe_default {
915 pinctrl_lpchc_default: lpchc_default {
920 pinctrl_lpcpd_default: lpcpd_default {
925 pinctrl_lpcplus_default: lpcplus_default {
926 function = "LPCPLUS";
930 pinctrl_lpcpme_default: lpcpme_default {
935 pinctrl_lpcrst_default: lpcrst_default {
940 pinctrl_lpcsmi_default: lpcsmi_default {
945 pinctrl_lsirq_default: lsirq_default {
950 pinctrl_mac1link_default: mac1link_default {
951 function = "MAC1LINK";
955 pinctrl_mac2link_default: mac2link_default {
956 function = "MAC2LINK";
960 pinctrl_mdio1_default: mdio1_default {
965 pinctrl_mdio2_default: mdio2_default {
970 pinctrl_ncts1_default: ncts1_default {
975 pinctrl_ncts2_default: ncts2_default {
980 pinctrl_ncts3_default: ncts3_default {
985 pinctrl_ncts4_default: ncts4_default {
990 pinctrl_ndcd1_default: ndcd1_default {
995 pinctrl_ndcd2_default: ndcd2_default {
1000 pinctrl_ndcd3_default: ndcd3_default {
1005 pinctrl_ndcd4_default: ndcd4_default {
1010 pinctrl_ndsr1_default: ndsr1_default {
1015 pinctrl_ndsr2_default: ndsr2_default {
1020 pinctrl_ndsr3_default: ndsr3_default {
1025 pinctrl_ndsr4_default: ndsr4_default {
1030 pinctrl_ndtr1_default: ndtr1_default {
1035 pinctrl_ndtr2_default: ndtr2_default {
1040 pinctrl_ndtr3_default: ndtr3_default {
1045 pinctrl_ndtr4_default: ndtr4_default {
1050 pinctrl_nri1_default: nri1_default {
1055 pinctrl_nri2_default: nri2_default {
1060 pinctrl_nri3_default: nri3_default {
1065 pinctrl_nri4_default: nri4_default {
1070 pinctrl_nrts1_default: nrts1_default {
1075 pinctrl_nrts2_default: nrts2_default {
1080 pinctrl_nrts3_default: nrts3_default {
1085 pinctrl_nrts4_default: nrts4_default {
1090 pinctrl_oscclk_default: oscclk_default {
1091 function = "OSCCLK";
1095 pinctrl_pewake_default: pewake_default {
1096 function = "PEWAKE";
1100 pinctrl_pnor_default: pnor_default {
1105 pinctrl_pwm0_default: pwm0_default {
1110 pinctrl_pwm1_default: pwm1_default {
1115 pinctrl_pwm2_default: pwm2_default {
1120 pinctrl_pwm3_default: pwm3_default {
1125 pinctrl_pwm4_default: pwm4_default {
1130 pinctrl_pwm5_default: pwm5_default {
1135 pinctrl_pwm6_default: pwm6_default {
1140 pinctrl_pwm7_default: pwm7_default {
1145 pinctrl_rgmii1_default: rgmii1_default {
1146 function = "RGMII1";
1150 pinctrl_rgmii2_default: rgmii2_default {
1151 function = "RGMII2";
1155 pinctrl_rmii1_default: rmii1_default {
1160 pinctrl_rmii2_default: rmii2_default {
1165 pinctrl_rxd1_default: rxd1_default {
1170 pinctrl_rxd2_default: rxd2_default {
1175 pinctrl_rxd3_default: rxd3_default {
1180 pinctrl_rxd4_default: rxd4_default {
1185 pinctrl_salt1_default: salt1_default {
1190 pinctrl_salt10_default: salt10_default {
1191 function = "SALT10";
1195 pinctrl_salt11_default: salt11_default {
1196 function = "SALT11";
1200 pinctrl_salt12_default: salt12_default {
1201 function = "SALT12";
1205 pinctrl_salt13_default: salt13_default {
1206 function = "SALT13";
1210 pinctrl_salt14_default: salt14_default {
1211 function = "SALT14";
1215 pinctrl_salt2_default: salt2_default {
1220 pinctrl_salt3_default: salt3_default {
1225 pinctrl_salt4_default: salt4_default {
1230 pinctrl_salt5_default: salt5_default {
1235 pinctrl_salt6_default: salt6_default {
1240 pinctrl_salt7_default: salt7_default {
1245 pinctrl_salt8_default: salt8_default {
1250 pinctrl_salt9_default: salt9_default {
1255 pinctrl_scl1_default: scl1_default {
1260 pinctrl_scl2_default: scl2_default {
1265 pinctrl_sd1_default: sd1_default {
1270 pinctrl_sd2_default: sd2_default {
1275 pinctrl_sda1_default: sda1_default {
1280 pinctrl_sda2_default: sda2_default {
1285 pinctrl_sgps1_default: sgps1_default {
1290 pinctrl_sgps2_default: sgps2_default {
1295 pinctrl_sioonctrl_default: sioonctrl_default {
1296 function = "SIOONCTRL";
1297 groups = "SIOONCTRL";
1300 pinctrl_siopbi_default: siopbi_default {
1301 function = "SIOPBI";
1305 pinctrl_siopbo_default: siopbo_default {
1306 function = "SIOPBO";
1310 pinctrl_siopwreq_default: siopwreq_default {
1311 function = "SIOPWREQ";
1312 groups = "SIOPWREQ";
1315 pinctrl_siopwrgd_default: siopwrgd_default {
1316 function = "SIOPWRGD";
1317 groups = "SIOPWRGD";
1320 pinctrl_sios3_default: sios3_default {
1325 pinctrl_sios5_default: sios5_default {
1330 pinctrl_siosci_default: siosci_default {
1331 function = "SIOSCI";
1335 pinctrl_spi1_default: spi1_default {
1340 pinctrl_spi1cs1_default: spi1cs1_default {
1341 function = "SPI1CS1";
1345 pinctrl_spi1debug_default: spi1debug_default {
1346 function = "SPI1DEBUG";
1347 groups = "SPI1DEBUG";
1350 pinctrl_spi1passthru_default: spi1passthru_default {
1351 function = "SPI1PASSTHRU";
1352 groups = "SPI1PASSTHRU";
1355 pinctrl_spi2ck_default: spi2ck_default {
1356 function = "SPI2CK";
1360 pinctrl_spi2cs0_default: spi2cs0_default {
1361 function = "SPI2CS0";
1365 pinctrl_spi2cs1_default: spi2cs1_default {
1366 function = "SPI2CS1";
1370 pinctrl_spi2miso_default: spi2miso_default {
1371 function = "SPI2MISO";
1372 groups = "SPI2MISO";
1375 pinctrl_spi2mosi_default: spi2mosi_default {
1376 function = "SPI2MOSI";
1377 groups = "SPI2MOSI";
1380 pinctrl_timer3_default: timer3_default {
1381 function = "TIMER3";
1385 pinctrl_timer4_default: timer4_default {
1386 function = "TIMER4";
1390 pinctrl_timer5_default: timer5_default {
1391 function = "TIMER5";
1395 pinctrl_timer6_default: timer6_default {
1396 function = "TIMER6";
1400 pinctrl_timer7_default: timer7_default {
1401 function = "TIMER7";
1405 pinctrl_timer8_default: timer8_default {
1406 function = "TIMER8";
1410 pinctrl_txd1_default: txd1_default {
1415 pinctrl_txd2_default: txd2_default {
1420 pinctrl_txd3_default: txd3_default {
1425 pinctrl_txd4_default: txd4_default {
1430 pinctrl_uart6_default: uart6_default {
1435 pinctrl_usbcki_default: usbcki_default {
1436 function = "USBCKI";
1440 pinctrl_usb2ah_default: usb2ah_default {
1441 function = "USB2AH";
1445 pinctrl_usb2ad_default: usb2ad_default {
1446 function = "USB2AD";
1450 pinctrl_usb11bhid_default: usb11bhid_default {
1451 function = "USB11BHID";
1452 groups = "USB11BHID";
1455 pinctrl_usb2bh_default: usb2bh_default {
1456 function = "USB2BH";
1460 pinctrl_vgabiosrom_default: vgabiosrom_default {
1461 function = "VGABIOSROM";
1462 groups = "VGABIOSROM";
1465 pinctrl_vgahs_default: vgahs_default {
1470 pinctrl_vgavs_default: vgavs_default {
1475 pinctrl_vpi24_default: vpi24_default {
1480 pinctrl_vpo_default: vpo_default {
1485 pinctrl_wdtrst1_default: wdtrst1_default {
1486 function = "WDTRST1";
1490 pinctrl_wdtrst2_default: wdtrst2_default {
1491 function = "WDTRST2";