2 * Copyright (c) 2016 BayLibre, Inc.
4 * Licensed under GPLv2.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 model = "DA850/AM1808/OMAP-L138 LCDK";
13 compatible = "ti,da850-lcdk", "ti,da850";
21 stdout-path = "serial2:115200n8";
25 device_type = "memory";
26 reg = <0xc0000000 0x08000000>;
30 compatible = "simple-audio-card";
31 simple-audio-card,name = "DA850/OMAP-L138 LCDK";
32 simple-audio-card,widgets =
35 simple-audio-card,routing =
40 simple-audio-card,format = "dsp_b";
41 simple-audio-card,bitclock-master = <&link0_codec>;
42 simple-audio-card,frame-master = <&link0_codec>;
43 simple-audio-card,bitclock-inversion;
45 simple-audio-card,cpu {
46 sound-dai = <&mcasp0>;
47 system-clock-frequency = <24576000>;
50 link0_codec: simple-audio-card,codec {
51 sound-dai = <&tlv320aic3106>;
52 system-clock-frequency = <24576000>;
57 compatible = "gpio-keys";
61 label = "GPIO Key USER1";
63 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
67 label = "GPIO Key USER2";
69 gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
74 compatible = "ti,ths8135";
85 vga_bridge_in: endpoint {
86 remote-endpoint = <&lcdc_out_vga>;
93 vga_bridge_out: endpoint {
94 remote-endpoint = <&vga_con_in>;
101 compatible = "vga-connector";
103 ddc-i2c-bus = <&i2c0>;
106 vga_con_in: endpoint {
107 remote-endpoint = <&vga_bridge_out>;
116 mcasp0_pins: pinmux_mcasp0_pins {
117 pinctrl-single,bits = <
118 /* AHCLKX AFSX ACLKX */
119 0x00 0x00101010 0x00f0f0f0
121 0x04 0x00000110 0x00000ff0
125 nand_pins: nand_pins {
126 pinctrl-single,bits = <
127 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
128 0x1c 0x10110010 0xf0ff00f0
130 * EMA_D[0], EMA_D[1], EMA_D[2],
131 * EMA_D[3], EMA_D[4], EMA_D[5],
134 0x24 0x11111111 0xffffffff
136 * EMA_D[8], EMA_D[9], EMA_D[10],
137 * EMA_D[11], EMA_D[12], EMA_D[13],
138 * EMA_D[14], EMA_D[15]
140 0x20 0x11111111 0xffffffff
141 /* EMA_A[1], EMA_A[2] */
142 0x30 0x01100000 0x0ff00000
148 pinctrl-names = "default";
149 pinctrl-0 = <&serial2_rxtx_pins>;
170 pinctrl-names = "default";
171 pinctrl-0 = <&mdio_pins>;
172 bus_freq = <2200000>;
177 pinctrl-names = "default";
178 pinctrl-0 = <&mii_pins>;
183 max-frequency = <50000000>;
185 pinctrl-names = "default";
186 pinctrl-0 = <&mmc0_pins>;
187 cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&i2c0_pins>;
194 clock-frequency = <100000>;
197 tlv320aic3106: tlv320aic3106@18 {
198 #sound-dai-cells = <0>;
199 compatible = "ti,tlv320aic3106";
206 #sound-dai-cells = <0>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&mcasp0_pins>;
211 op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */
213 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
236 pinctrl-names = "default";
237 pinctrl-0 = <&nand_pins>;
240 #address-cells = <2>;
245 ti,cs-chipselect = <3>;
248 compatible = "ti,davinci-nand";
249 #address-cells = <1>;
251 reg = <0 0x02000000 0x02000000
252 1 0x00000000 0x00008000>;
254 ti,davinci-chipselect = <1>;
255 ti,davinci-mask-ale = <0>;
256 ti,davinci-mask-cle = <0>;
257 ti,davinci-mask-chipsel = <0>;
259 ti,davinci-nand-buswidth = <16>;
260 ti,davinci-ecc-mode = "hw";
261 ti,davinci-ecc-bits = <4>;
262 ti,davinci-nand-use-bbt;
265 * The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
266 * "To boot from NAND Flash, the AIS should be written
267 * to NAND block 1 (NAND block 0 is not used by default)".
268 * The same doc mentions that for ROM "Silicon Revision 2.1",
269 * "Updated NAND boot mode to offer boot from block 0 or block 1".
270 * However the limitaion is left here by default for compatibility
271 * with older silicon and because it needs new boot pin settings
272 * not possible in stock LCDK.
275 compatible = "fixed-partitions";
276 #address-cells = <1>;
280 label = "u-boot env";
284 /* The LCDK defaults to booting from this partition */
286 reg = <0x020000 0x080000>;
289 label = "free space";
307 pinctrl-names = "default";
308 pinctrl-0 = <&lcd_pins>;
311 lcdc_out_vga: endpoint {
312 remote-endpoint = <&vga_bridge_in>;
318 pinctrl-names = "default";
319 pinctrl-0 = <&vpif_capture_pins>;
322 /* VPIF capture port */