arch/arm/boot/dts/lpc3250-phy3250.dts

   1 /*
   2  * PHYTEC phyCORE-LPC3250 board
   3  *
   4  * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
   5  * Copyright 2012 Roland Stigge <stigge@antcom.de>
   6  *
   7  * The code contained herein is licensed under the GNU General Public
   8  * License. You may obtain a copy of the GNU General Public License
   9  * Version 2 or later at the following locations:
  10  *
  11  * http://www.opensource.org/licenses/gpl-license.html
  12  * http://www.gnu.org/copyleft/gpl.html
  13  */
  14
  15 /dts-v1/;
  16 #include "lpc32xx.dtsi"
  17
  18 / {
  19         model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";
  20         compatible = "phytec,phy3250", "nxp,lpc3250";
  21
  22         memory@80000000 {
  23                 device_type = "memory";
  24                 reg = <0x80000000 0x4000000>;
  25         };
  26
  27         leds {
  28                 compatible = "gpio-leds";
  29
  30                 led0 { /* red */
  31                         gpios = <&gpio 5 1 0>; /* GPO_P3 1, GPIO 80, active high */
  32                         default-state = "off";
  33                 };
  34
  35                 led1 { /* green */
  36                         gpios = <&gpio 5 14 0>; /* GPO_P3 14, GPIO 93, active high */
  37                         linux,default-trigger = "heartbeat";
  38                 };
  39         };
  40
  41         panel: panel {
  42                 compatible = "sharp,lq035q7db03";
  43                 power-supply = <&reg_lcd>;
  44
  45                 port {
  46                         panel_input: endpoint {
  47                                 remote-endpoint = <&cldc_output>;
  48                         };
  49                 };
  50         };
  51
  52         reg_backlight: regulator-backlight {
  53                 compatible = "regulator-fixed";
  54                 regulator-name = "backlight";
  55                 regulator-min-microvolt = <1800000>;
  56                 regulator-max-microvolt = <1800000>;
  57                 gpio = <&gpio 5 4 0>;
  58                 enable-active-high;
  59                 regulator-boot-on;
  60         };
  61
  62         reg_lcd: regulator-lcd {
  63                 compatible = "regulator-fixed";
  64                 regulator-name = "lcd";
  65                 regulator-min-microvolt = <1800000>;
  66                 regulator-max-microvolt = <1800000>;
  67                 gpio = <&gpio 5 0 0>;
  68                 enable-active-high;
  69                 regulator-boot-on;
  70         };
  71
  72         reg_sd: regulator-sd {
  73                 compatible = "regulator-fixed";
  74                 regulator-name = "sd";
  75                 regulator-min-microvolt = <3300000>;
  76                 regulator-max-microvolt = <3300000>;
  77                 gpio = <&gpio 5 5 0>;
  78                 enable-active-high;
  79                 regulator-boot-on;
  80         };
  81 };
  82
  83 &clcd {
  84         max-memory-bandwidth = <18710000>;
  85         status = "okay";
  86
  87         port {
  88                 cldc_output: endpoint {
  89                         remote-endpoint = <&panel_input>;
  90                         arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
  91                 };
  92         };
  93 };
  94
  95 &i2c1 {
  96         clock-frequency = <100000>;
  97
  98         uda1380: uda1380@18 {
  99                 compatible = "nxp,uda1380";
 100                 reg = <0x18>;
 101                 power-gpio = <&gpio 3 10 0>;
 102                 reset-gpio = <&gpio 3 2 0>;
 103                 dac-clk = "wspll";
 104         };
 105
 106         pcf8563: rtc@51 {
 107                 compatible = "nxp,pcf8563";
 108                 reg = <0x51>;
 109         };
 110 };
 111
 112 &i2c2 {
 113         clock-frequency = <100000>;
 114 };
 115
 116 &i2cusb {
 117         clock-frequency = <100000>;
 118
 119         isp1301: usb-transceiver@2c {
 120                 compatible = "nxp,isp1301";
 121                 reg = <0x2c>;
 122         };
 123 };
 124
 125 &key {
 126         keypad,num-rows = <1>;
 127         keypad,num-columns = <1>;
 128         nxp,debounce-delay-ms = <3>;
 129         nxp,scan-delay-ms = <34>;
 130         linux,keymap = <0x00000002>;
 131         status = "okay";
 132 };
 133
 134 &mac {
 135         phy-mode = "rmii";
 136         use-iram;
 137         status = "okay";
 138 };
 139
 140 /* Here, choose exactly one from: ohci, usbd */
 141 &ohci /* &usbd */ {
 142         transceiver = <&isp1301>;
 143         status = "okay";
 144 };
 145
 146 &sd {
 147         wp-gpios = <&gpio 3 0 0>;
 148         cd-gpios = <&gpio 3 1 0>;
 149         cd-inverted;
 150         bus-width = <4>;
 151         vmmc-supply = <&reg_sd>;
 152         status = "okay";
 153 };
 154
 155 /* 64MB Flash via SLC NAND controller */
 156 &slc {
 157         status = "okay";
 158
 159         nxp,wdr-clks = <14>;
 160         nxp,wwidth = <40000000>;
 161         nxp,whold = <100000000>;
 162         nxp,wsetup = <100000000>;
 163         nxp,rdr-clks = <14>;
 164         nxp,rwidth = <40000000>;
 165         nxp,rhold = <66666666>;
 166         nxp,rsetup = <100000000>;
 167         nand-on-flash-bbt;
 168         gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
 169
 170         partitions {
 171                 compatible = "fixed-partitions";
 172                 #address-cells = <1>;
 173                 #size-cells = <1>;
 174
 175                 mtd0@0 {
 176                         label = "phy3250-boot";
 177                         reg = <0x00000000 0x00064000>;
 178                         read-only;
 179                 };
 180
 181                 mtd1@64000 {
 182                         label = "phy3250-uboot";
 183                         reg = <0x00064000 0x00190000>;
 184                         read-only;
 185                 };
 186
 187                 mtd2@1f4000 {
 188                         label = "phy3250-ubt-prms";
 189                         reg = <0x001f4000 0x00010000>;
 190                 };
 191
 192                 mtd3@204000 {
 193                         label = "phy3250-kernel";
 194                         reg = <0x00204000 0x00400000>;
 195                 };
 196
 197                 mtd4@604000 {
 198                         label = "phy3250-rootfs";
 199                         reg = <0x00604000 0x039fc000>;
 200                 };
 201         };
 202 };
 203
 204 &ssp0 {
 205         num-cs = <1>;
 206         cs-gpios = <&gpio 3 5 0>;
 207         status = "okay";
 208
 209         eeprom: at25@0 {
 210                 compatible = "atmel,at25";
 211                 reg = <0>;
 212                 spi-max-frequency = <5000000>;
 213
 214                 pl022,interface = <0>;
 215                 pl022,com-mode = <0>;
 216                 pl022,rx-level-trig = <1>;
 217                 pl022,tx-level-trig = <1>;
 218                 pl022,ctrl-len = <11>;
 219                 pl022,wait-state = <0>;
 220                 pl022,duplex = <0>;
 221
 222                 at25,byte-len = <0x8000>;
 223                 at25,addr-mode = <2>;
 224                 at25,page-size = <64>;
 225         };
 226 };
 227
 228 &tsc {
 229         status = "okay";
 230 };
 231
 232 &uart2 {
 233         status = "okay";
 234 };
 235
 236 &uart3 {
 237         status = "okay";
 238 };
 239
 240 &uart5 {
 241         status = "okay";
 242 };