arch/arm/boot/dts/omap4-l4.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 &l4_cfg {                                               /* 0x4a000000 */
   3         compatible = "ti,omap4-l4-cfg", "simple-bus";
   4         reg = <0x4a000000 0x800>,
   5               <0x4a000800 0x800>,
   6               <0x4a001000 0x1000>;
   7         reg-names = "ap", "la", "ia0";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  11                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  12                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  13                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  14                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  15                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  16                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  17
  18         segment@0 {                                     /* 0x4a000000 */
  19                 compatible = "simple-bus";
  20                 #address-cells = <1>;
  21                 #size-cells = <1>;
  22                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  23                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  24                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  25                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  26                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  27                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  28                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  29                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  30                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  31                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  32                          <0x00058000 0x00058000 0x004000>,      /* ap 10 */
  33                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  34                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  35                          <0x00008000 0x00008000 0x002000>,      /* ap 23 */
  36                          <0x0000a000 0x0000a000 0x001000>,      /* ap 24 */
  37                          <0x00066000 0x00066000 0x001000>,      /* ap 25 */
  38                          <0x00067000 0x00067000 0x001000>,      /* ap 26 */
  39                          <0x0005e000 0x0005e000 0x002000>,      /* ap 80 */
  40                          <0x00060000 0x00060000 0x001000>,      /* ap 81 */
  41                          <0x00064000 0x00064000 0x001000>,      /* ap 86 */
  42                          <0x00065000 0x00065000 0x001000>;      /* ap 87 */
  43
  44                 target-module@2000 {                    /* 0x4a002000, ap 3 06.0 */
  45                         compatible = "ti,sysc-omap4", "ti,sysc";
  46                         ti,hwmods = "ctrl_module_core";
  47                         reg = <0x2000 0x4>,
  48                               <0x2010 0x4>;
  49                         reg-names = "rev", "sysc";
  50                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
  51                                         <SYSC_IDLE_NO>,
  52                                         <SYSC_IDLE_SMART>,
  53                                         <SYSC_IDLE_SMART_WKUP>;
  54                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         ranges = <0x0 0x2000 0x1000>;
  58
  59                         omap4_scm_core: scm@0 {
  60                                 compatible = "ti,omap4-scm-core", "simple-bus";
  61                                 reg = <0x0 0x1000>;
  62                                 #address-cells = <1>;
  63                                 #size-cells = <1>;
  64                                 ranges = <0 0 0x1000>;
  65
  66                                 scm_conf: scm_conf@0 {
  67                                         compatible = "syscon";
  68                                         reg = <0x0 0x800>;
  69                                         #address-cells = <1>;
  70                                         #size-cells = <1>;
  71                                 };
  72
  73                                 omap_control_usb2phy: control-phy@300 {
  74                                         compatible = "ti,control-phy-usb2";
  75                                         reg = <0x300 0x4>;
  76                                         reg-names = "power";
  77                                 };
  78
  79                                 omap_control_usbotg: control-phy@33c {
  80                                         compatible = "ti,control-phy-otghs";
  81                                         reg = <0x33c 0x4>;
  82                                         reg-names = "otghs_control";
  83                                 };
  84                         };
  85                 };
  86
  87                 target-module@4000 {                    /* 0x4a004000, ap 5 02.0 */
  88                         compatible = "ti,sysc-omap4", "ti,sysc";
  89                         reg = <0x4000 0x4>;
  90                         reg-names = "rev";
  91                         #address-cells = <1>;
  92                         #size-cells = <1>;
  93                         ranges = <0x0 0x4000 0x1000>;
  94
  95                         cm1: cm1@0 {
  96                                 compatible = "ti,omap4-cm1", "simple-bus";
  97                                 reg = <0x0 0x2000>;
  98                                 #address-cells = <1>;
  99                                 #size-cells = <1>;
 100                                 ranges = <0 0 0x2000>;
 101
 102                                 cm1_clocks: clocks {
 103                                         #address-cells = <1>;
 104                                         #size-cells = <0>;
 105                                 };
 106
 107                                 cm1_clockdomains: clockdomains {
 108                                 };
 109                         };
 110                 };
 111
 112                 target-module@8000 {                    /* 0x4a008000, ap 23 32.0 */
 113                         compatible = "ti,sysc-omap4", "ti,sysc";
 114                         reg = <0x8000 0x4>;
 115                         reg-names = "rev";
 116                         #address-cells = <1>;
 117                         #size-cells = <1>;
 118                         ranges = <0x0 0x8000 0x2000>;
 119
 120                         cm2: cm2@0 {
 121                                 compatible = "ti,omap4-cm2", "simple-bus";
 122                                 reg = <0x0 0x2000>;
 123                                 #address-cells = <1>;
 124                                 #size-cells = <1>;
 125                                 ranges = <0 0 0x2000>;
 126
 127                                 cm2_clocks: clocks {
 128                                         #address-cells = <1>;
 129                                         #size-cells = <0>;
 130                                 };
 131
 132                                 cm2_clockdomains: clockdomains {
 133                                 };
 134                         };
 135                 };
 136
 137                 target-module@56000 {                   /* 0x4a056000, ap 7 0a.0 */
 138                         compatible = "ti,sysc-omap2", "ti,sysc";
 139                         ti,hwmods = "dma_system";
 140                         reg = <0x56000 0x4>,
 141                               <0x5602c 0x4>,
 142                               <0x56028 0x4>;
 143                         reg-names = "rev", "sysc", "syss";
 144                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 145                                          SYSC_OMAP2_EMUFREE |
 146                                          SYSC_OMAP2_SOFTRESET |
 147                                          SYSC_OMAP2_AUTOIDLE)>;
 148                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 149                                         <SYSC_IDLE_NO>,
 150                                         <SYSC_IDLE_SMART>;
 151                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 152                                         <SYSC_IDLE_NO>,
 153                                         <SYSC_IDLE_SMART>;
 154                         ti,syss-mask = <1>;
 155                         /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */
 156                         clocks = <&l3_dma_clkctrl OMAP4_DMA_SYSTEM_CLKCTRL 0>;
 157                         clock-names = "fck";
 158                         #address-cells = <1>;
 159                         #size-cells = <1>;
 160                         ranges = <0x0 0x56000 0x1000>;
 161
 162                         sdma: dma-controller@0 {
 163                                 compatible = "ti,omap4430-sdma";
 164                                 reg = <0x0 0x1000>;
 165                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 166                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 167                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 168                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 169                                 #dma-cells = <1>;
 170                                 dma-channels = <32>;
 171                                 dma-requests = <127>;
 172                         };
 173                 };
 174
 175                 target-module@58000 {                   /* 0x4a058000, ap 10 0e.0 */
 176                         compatible = "ti,sysc-omap2", "ti,sysc";
 177                         ti,hwmods = "hsi";
 178                         reg = <0x58000 0x4>,
 179                               <0x58010 0x4>,
 180                               <0x58014 0x4>;
 181                         reg-names = "rev", "sysc", "syss";
 182                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 183                                          SYSC_OMAP2_SOFTRESET |
 184                                          SYSC_OMAP2_AUTOIDLE)>;
 185                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 186                                         <SYSC_IDLE_NO>,
 187                                         <SYSC_IDLE_SMART>,
 188                                         <SYSC_IDLE_SMART_WKUP>;
 189                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 190                                         <SYSC_IDLE_NO>,
 191                                         <SYSC_IDLE_SMART>,
 192                                         <SYSC_IDLE_SMART_WKUP>;
 193                         ti,syss-mask = <1>;
 194                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 195                         clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 196                         clock-names = "fck";
 197                         #address-cells = <1>;
 198                         #size-cells = <1>;
 199                         ranges = <0x0 0x58000 0x5000>;
 200
 201                         hsi: hsi@0 {
 202                                 compatible = "ti,omap4-hsi";
 203                                 reg = <0x0 0x4000>,
 204                                       <0x5000 0x1000>;
 205                                 reg-names = "sys", "gdd";
 206
 207                                 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 208                                 clock-names = "hsi_fck";
 209
 210                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 211                                 interrupt-names = "gdd_mpu";
 212
 213                                 #address-cells = <1>;
 214                                 #size-cells = <1>;
 215                                 ranges = <0 0 0x4000>;
 216
 217                                 hsi_port1: hsi-port@2000 {
 218                                         compatible = "ti,omap4-hsi-port";
 219                                         reg = <0x2000 0x800>,
 220                                               <0x2800 0x800>;
 221                                         reg-names = "tx", "rx";
 222                                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 223                                 };
 224
 225                                 hsi_port2: hsi-port@3000 {
 226                                         compatible = "ti,omap4-hsi-port";
 227                                         reg = <0x3000 0x800>,
 228                                               <0x3800 0x800>;
 229                                         reg-names = "tx", "rx";
 230                                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 231                                 };
 232                         };
 233                 };
 234
 235                 target-module@5e000 {                   /* 0x4a05e000, ap 80 68.0 */
 236                         compatible = "ti,sysc";
 237                         status = "disabled";
 238                         #address-cells = <1>;
 239                         #size-cells = <1>;
 240                         ranges = <0x0 0x5e000 0x2000>;
 241                 };
 242
 243                 target-module@62000 {                   /* 0x4a062000, ap 11 16.0 */
 244                         compatible = "ti,sysc-omap2", "ti,sysc";
 245                         ti,hwmods = "usb_tll_hs";
 246                         reg = <0x62000 0x4>,
 247                               <0x62010 0x4>,
 248                               <0x62014 0x4>;
 249                         reg-names = "rev", "sysc", "syss";
 250                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 251                                          SYSC_OMAP2_ENAWAKEUP |
 252                                          SYSC_OMAP2_SOFTRESET |
 253                                          SYSC_OMAP2_AUTOIDLE)>;
 254                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 255                                         <SYSC_IDLE_NO>,
 256                                         <SYSC_IDLE_SMART>;
 257                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 258                         clocks = <&l3_init_clkctrl OMAP4_USB_TLL_HS_CLKCTRL 0>;
 259                         clock-names = "fck";
 260                         #address-cells = <1>;
 261                         #size-cells = <1>;
 262                         ranges = <0x0 0x62000 0x1000>;
 263
 264                         usbhstll: usbhstll@0 {
 265                                 compatible = "ti,usbhs-tll";
 266                                 reg = <0x0 0x1000>;
 267                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 268                         };
 269                 };
 270
 271                 target-module@64000 {                   /* 0x4a064000, ap 86 1e.0 */
 272                         compatible = "ti,sysc-omap4", "ti,sysc";
 273                         ti,hwmods = "usb_host_hs";
 274                         reg = <0x64000 0x4>,
 275                               <0x64010 0x4>,
 276                               <0x64014 0x4>;
 277                         reg-names = "rev", "sysc", "syss";
 278                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 279                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 280                                         <SYSC_IDLE_NO>,
 281                                         <SYSC_IDLE_SMART>,
 282                                         <SYSC_IDLE_SMART_WKUP>;
 283                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 284                                         <SYSC_IDLE_NO>,
 285                                         <SYSC_IDLE_SMART>,
 286                                         <SYSC_IDLE_SMART_WKUP>;
 287                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 288                         clocks = <&l3_init_clkctrl OMAP4_USB_HOST_HS_CLKCTRL 0>;
 289                         clock-names = "fck";
 290                         #address-cells = <1>;
 291                         #size-cells = <1>;
 292                         ranges = <0x0 0x64000 0x1000>;
 293
 294                         usbhshost: usbhshost@0 {
 295                                 compatible = "ti,usbhs-host";
 296                                 reg = <0x0 0x800>;
 297                                 #address-cells = <1>;
 298                                 #size-cells = <1>;
 299                                 ranges = <0 0 0x1000>;
 300                                 clocks = <&init_60m_fclk>,
 301                                          <&xclk60mhsp1_ck>,
 302                                          <&xclk60mhsp2_ck>;
 303                                 clock-names = "refclk_60m_int",
 304                                               "refclk_60m_ext_p1",
 305                                               "refclk_60m_ext_p2";
 306
 307                                 usbhsohci: ohci@800 {
 308                                         compatible = "ti,ohci-omap3";
 309                                         reg = <0x800 0x400>;
 310                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 311                                         remote-wakeup-connected;
 312                                 };
 313
 314                                 usbhsehci: ehci@c00 {
 315                                         compatible = "ti,ehci-omap";
 316                                         reg = <0xc00 0x400>;
 317                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 318                                 };
 319                         };
 320                 };
 321
 322                 target-module@66000 {                   /* 0x4a066000, ap 25 26.0 */
 323                         compatible = "ti,sysc-omap2", "ti,sysc";
 324                         ti,hwmods = "mmu_dsp";
 325                         reg = <0x66000 0x4>,
 326                               <0x66010 0x4>,
 327                               <0x66014 0x4>;
 328                         reg-names = "rev", "sysc", "syss";
 329                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 330                                          SYSC_OMAP2_SOFTRESET |
 331                                          SYSC_OMAP2_AUTOIDLE)>;
 332                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 333                                         <SYSC_IDLE_NO>,
 334                                         <SYSC_IDLE_SMART>;
 335                         /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */
 336                         clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
 337                         clock-names = "fck";
 338                         #address-cells = <1>;
 339                         #size-cells = <1>;
 340                         ranges = <0x0 0x66000 0x1000>;
 341
 342                         /* mmu_dsp cannot be moved before reset driver */
 343                         status = "disabled";
 344                 };
 345         };
 346
 347         segment@80000 {                                 /* 0x4a080000 */
 348                 compatible = "simple-bus";
 349                 #address-cells = <1>;
 350                 #size-cells = <1>;
 351                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 352                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 353                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 354                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 355                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 356                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 357                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 358                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 359                          <0x00074000 0x000f4000 0x001000>,      /* ap 27 */
 360                          <0x00075000 0x000f5000 0x001000>,      /* ap 28 */
 361                          <0x00076000 0x000f6000 0x001000>,      /* ap 29 */
 362                          <0x00077000 0x000f7000 0x001000>,      /* ap 30 */
 363                          <0x00036000 0x000b6000 0x001000>,      /* ap 69 */
 364                          <0x00037000 0x000b7000 0x001000>,      /* ap 70 */
 365                          <0x0004d000 0x000cd000 0x001000>,      /* ap 78 */
 366                          <0x0004e000 0x000ce000 0x001000>,      /* ap 79 */
 367                          <0x00029000 0x000a9000 0x001000>,      /* ap 82 */
 368                          <0x0002a000 0x000aa000 0x001000>,      /* ap 83 */
 369                          <0x0002b000 0x000ab000 0x001000>,      /* ap 84 */
 370                          <0x0002c000 0x000ac000 0x001000>,      /* ap 85 */
 371                          <0x0002d000 0x000ad000 0x001000>,      /* ap 88 */
 372                          <0x0002e000 0x000ae000 0x001000>;      /* ap 89 */
 373
 374                 target-module@29000 {                   /* 0x4a0a9000, ap 82 04.0 */
 375                         compatible = "ti,sysc";
 376                         status = "disabled";
 377                         #address-cells = <1>;
 378                         #size-cells = <1>;
 379                         ranges = <0x0 0x29000 0x1000>;
 380                 };
 381
 382                 target-module@2b000 {                   /* 0x4a0ab000, ap 84 12.0 */
 383                         compatible = "ti,sysc-omap2", "ti,sysc";
 384                         ti,hwmods = "usb_otg_hs";
 385                         reg = <0x2b400 0x4>,
 386                               <0x2b404 0x4>,
 387                               <0x2b408 0x4>;
 388                         reg-names = "rev", "sysc", "syss";
 389                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 390                                          SYSC_OMAP2_SOFTRESET |
 391                                          SYSC_OMAP2_AUTOIDLE)>;
 392                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 393                                         <SYSC_IDLE_NO>,
 394                                         <SYSC_IDLE_SMART>;
 395                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 396                                         <SYSC_IDLE_NO>,
 397                                         <SYSC_IDLE_SMART>,
 398                                         <SYSC_IDLE_SMART_WKUP>;
 399                         ti,syss-mask = <1>;
 400                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 401                         clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
 402                         clock-names = "fck";
 403                         #address-cells = <1>;
 404                         #size-cells = <1>;
 405                         ranges = <0x0 0x2b000 0x1000>;
 406
 407                         usb_otg_hs: usb_otg_hs@0 {
 408                                 compatible = "ti,omap4-musb";
 409                                 reg = <0x0 0x7ff>;
 410                                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 411                                 interrupt-names = "mc", "dma";
 412                                 usb-phy = <&usb2_phy>;
 413                                 phys = <&usb2_phy>;
 414                                 phy-names = "usb2-phy";
 415                                 multipoint = <1>;
 416                                 num-eps = <16>;
 417                                 ram-bits = <12>;
 418                                 ctrl-module = <&omap_control_usbotg>;
 419                         };
 420                 };
 421
 422                 target-module@2d000 {                   /* 0x4a0ad000, ap 88 0c.0 */
 423                         compatible = "ti,sysc-omap2", "ti,sysc";
 424                         ti,hwmods = "ocp2scp_usb_phy";
 425                         reg = <0x2d000 0x4>,
 426                               <0x2d010 0x4>,
 427                               <0x2d014 0x4>;
 428                         reg-names = "rev", "sysc", "syss";
 429                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 430                                          SYSC_OMAP2_AUTOIDLE)>;
 431                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 432                                         <SYSC_IDLE_NO>,
 433                                         <SYSC_IDLE_SMART>;
 434                         ti,syss-mask = <1>;
 435                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 436                         clocks = <&l3_init_clkctrl OMAP4_OCP2SCP_USB_PHY_CLKCTRL 0>;
 437                         clock-names = "fck";
 438                         #address-cells = <1>;
 439                         #size-cells = <1>;
 440                         ranges = <0x0 0x2d000 0x1000>;
 441
 442                         ocp2scp@0 {
 443                                 compatible = "ti,omap-ocp2scp";
 444                                 reg = <0x0 0x1f>;
 445                                 #address-cells = <1>;
 446                                 #size-cells = <1>;
 447                                 ranges = <0 0 0x1000>;
 448                                 usb2_phy: usb2phy@80 {
 449                                         compatible = "ti,omap-usb2";
 450                                         reg = <0x80 0x58>;
 451                                         ctrl-module = <&omap_control_usb2phy>;
 452                                         clocks = <&usb_phy_cm_clk32k>;
 453                                         clock-names = "wkupclk";
 454                                         #phy-cells = <0>;
 455                                 };
 456                         };
 457                 };
 458
 459                 /* d2d mdm */
 460                 target-module@36000 {                   /* 0x4a0b6000, ap 69 60.0 */
 461                         compatible = "ti,sysc-omap2", "ti,sysc";
 462                         reg = <0x36000 0x4>,
 463                               <0x36010 0x4>,
 464                               <0x36014 0x4>;
 465                         reg-names = "rev", "sysc", "syss";
 466                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 467                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 468                                         <SYSC_IDLE_NO>,
 469                                         <SYSC_IDLE_SMART>,
 470                                         <SYSC_IDLE_SMART_WKUP>;
 471                         ti,syss-mask = <1>;
 472                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 473                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 474                         clock-names = "fck";
 475                         #address-cells = <1>;
 476                         #size-cells = <1>;
 477                         ranges = <0x0 0x36000 0x1000>;
 478                 };
 479
 480                 /* d2d mpu */
 481                 target-module@4d000 {                   /* 0x4a0cd000, ap 78 58.0 */
 482                         compatible = "ti,sysc-omap2", "ti,sysc";
 483                         reg = <0x4d000 0x4>,
 484                               <0x4d010 0x4>,
 485                               <0x4d014 0x4>;
 486                         reg-names = "rev", "sysc", "syss";
 487                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 488                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 489                                         <SYSC_IDLE_NO>,
 490                                         <SYSC_IDLE_SMART>,
 491                                         <SYSC_IDLE_SMART_WKUP>;
 492                         ti,syss-mask = <1>;
 493                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 494                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 495                         clock-names = "fck";
 496                         #address-cells = <1>;
 497                         #size-cells = <1>;
 498                         ranges = <0x0 0x4d000 0x1000>;
 499                 };
 500
 501                 target-module@59000 {                   /* 0x4a0d9000, ap 13 1a.0 */
 502                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 503                         ti,hwmods = "smartreflex_mpu";
 504                         reg = <0x59038 0x4>;
 505                         reg-names = "sysc";
 506                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 507                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 508                                         <SYSC_IDLE_NO>,
 509                                         <SYSC_IDLE_SMART>,
 510                                         <SYSC_IDLE_SMART_WKUP>;
 511                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 512                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
 513                         clock-names = "fck";
 514                         #address-cells = <1>;
 515                         #size-cells = <1>;
 516                         ranges = <0x0 0x59000 0x1000>;
 517
 518                         smartreflex_mpu: smartreflex@0 {
 519                                 compatible = "ti,omap4-smartreflex-mpu";
 520                                 reg = <0x0 0x80>;
 521                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 522                         };
 523                 };
 524
 525                 target-module@5b000 {                   /* 0x4a0db000, ap 15 08.0 */
 526                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 527                         ti,hwmods = "smartreflex_iva";
 528                         reg = <0x5b038 0x4>;
 529                         reg-names = "sysc";
 530                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 531                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 532                                         <SYSC_IDLE_NO>,
 533                                         <SYSC_IDLE_SMART>,
 534                                         <SYSC_IDLE_SMART_WKUP>;
 535                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 536                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
 537                         clock-names = "fck";
 538                         #address-cells = <1>;
 539                         #size-cells = <1>;
 540                         ranges = <0x0 0x5b000 0x1000>;
 541
 542                         smartreflex_iva: smartreflex@0 {
 543                                 compatible = "ti,omap4-smartreflex-iva";
 544                                 reg = <0x0 0x80>;
 545                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 546                         };
 547                 };
 548
 549                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 22.0 */
 550                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 551                         ti,hwmods = "smartreflex_core";
 552                         reg = <0x5d038 0x4>;
 553                         reg-names = "sysc";
 554                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 555                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 556                                         <SYSC_IDLE_NO>,
 557                                         <SYSC_IDLE_SMART>,
 558                                         <SYSC_IDLE_SMART_WKUP>;
 559                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 560                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
 561                         clock-names = "fck";
 562                         #address-cells = <1>;
 563                         #size-cells = <1>;
 564                         ranges = <0x0 0x5d000 0x1000>;
 565
 566                         smartreflex_core: smartreflex@0 {
 567                                 compatible = "ti,omap4-smartreflex-core";
 568                                 reg = <0x0 0x80>;
 569                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 570                         };
 571                 };
 572
 573                 target-module@60000 {                   /* 0x4a0e0000, ap 19 1c.0 */
 574                         compatible = "ti,sysc";
 575                         status = "disabled";
 576                         #address-cells = <1>;
 577                         #size-cells = <1>;
 578                         ranges = <0x0 0x60000 0x1000>;
 579                 };
 580
 581                 target-module@74000 {                   /* 0x4a0f4000, ap 27 24.0 */
 582                         compatible = "ti,sysc-omap4", "ti,sysc";
 583                         ti,hwmods = "mailbox";
 584                         reg = <0x74000 0x4>,
 585                               <0x74010 0x4>;
 586                         reg-names = "rev", "sysc";
 587                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 588                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 589                                         <SYSC_IDLE_NO>,
 590                                         <SYSC_IDLE_SMART>;
 591                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 592                         clocks = <&l4_cfg_clkctrl OMAP4_MAILBOX_CLKCTRL 0>;
 593                         clock-names = "fck";
 594                         #address-cells = <1>;
 595                         #size-cells = <1>;
 596                         ranges = <0x0 0x74000 0x1000>;
 597
 598                         mailbox: mailbox@0 {
 599                                 compatible = "ti,omap4-mailbox";
 600                                 reg = <0x0 0x200>;
 601                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 602                                 #mbox-cells = <1>;
 603                                 ti,mbox-num-users = <3>;
 604                                 ti,mbox-num-fifos = <8>;
 605                                 mbox_ipu: mbox_ipu {
 606                                         ti,mbox-tx = <0 0 0>;
 607                                         ti,mbox-rx = <1 0 0>;
 608                                 };
 609                                 mbox_dsp: mbox_dsp {
 610                                         ti,mbox-tx = <3 0 0>;
 611                                         ti,mbox-rx = <2 0 0>;
 612                                 };
 613                         };
 614                 };
 615
 616                 target-module@76000 {                   /* 0x4a0f6000, ap 29 3a.0 */
 617                         compatible = "ti,sysc-omap2", "ti,sysc";
 618                         ti,hwmods = "spinlock";
 619                         reg = <0x76000 0x4>,
 620                               <0x76010 0x4>,
 621                               <0x76014 0x4>;
 622                         reg-names = "rev", "sysc", "syss";
 623                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 624                                          SYSC_OMAP2_ENAWAKEUP |
 625                                          SYSC_OMAP2_SOFTRESET |
 626                                          SYSC_OMAP2_AUTOIDLE)>;
 627                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 628                                         <SYSC_IDLE_NO>,
 629                                         <SYSC_IDLE_SMART>;
 630                         ti,syss-mask = <1>;
 631                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 632                         clocks = <&l4_cfg_clkctrl OMAP4_SPINLOCK_CLKCTRL 0>;
 633                         clock-names = "fck";
 634                         #address-cells = <1>;
 635                         #size-cells = <1>;
 636                         ranges = <0x0 0x76000 0x1000>;
 637
 638                         hwspinlock: spinlock@0 {
 639                                 compatible = "ti,omap4-hwspinlock";
 640                                 reg = <0x0 0x1000>;
 641                                 #hwlock-cells = <1>;
 642                         };
 643                 };
 644         };
 645
 646         segment@100000 {                                        /* 0x4a100000 */
 647                 compatible = "simple-bus";
 648                 #address-cells = <1>;
 649                 #size-cells = <1>;
 650                 ranges = <0x00000000 0x00100000 0x001000>,      /* ap 21 */
 651                          <0x00001000 0x00101000 0x001000>,      /* ap 22 */
 652                          <0x00002000 0x00102000 0x001000>,      /* ap 61 */
 653                          <0x00003000 0x00103000 0x001000>,      /* ap 62 */
 654                          <0x00008000 0x00108000 0x001000>,      /* ap 63 */
 655                          <0x00009000 0x00109000 0x001000>,      /* ap 64 */
 656                          <0x0000a000 0x0010a000 0x001000>,      /* ap 65 */
 657                          <0x0000b000 0x0010b000 0x001000>;      /* ap 66 */
 658
 659                 target-module@0 {                       /* 0x4a100000, ap 21 2a.0 */
 660                         compatible = "ti,sysc-omap4", "ti,sysc";
 661                         ti,hwmods = "ctrl_module_pad_core";
 662                         reg = <0x0 0x4>,
 663                               <0x10 0x4>;
 664                         reg-names = "rev", "sysc";
 665                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 666                                         <SYSC_IDLE_NO>,
 667                                         <SYSC_IDLE_SMART>,
 668                                         <SYSC_IDLE_SMART_WKUP>;
 669                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 670                         #address-cells = <1>;
 671                         #size-cells = <1>;
 672                         ranges = <0x0 0x0 0x1000>;
 673
 674                         omap4_pmx_core: pinmux@40 {
 675                                 compatible = "ti,omap4-padconf",
 676                                              "pinctrl-single";
 677                                 reg = <0x40 0x0196>;
 678                                 #address-cells = <1>;
 679                                 #size-cells = <0>;
 680                                 #pinctrl-cells = <1>;
 681                                 #interrupt-cells = <1>;
 682                                 interrupt-controller;
 683                                 pinctrl-single,register-width = <16>;
 684                                 pinctrl-single,function-mask = <0x7fff>;
 685                         };
 686
 687                         omap4_padconf_global: omap4_padconf_global@5a0 {
 688                                 compatible = "syscon",
 689                                              "simple-bus";
 690                                 reg = <0x5a0 0x170>;
 691                                 #address-cells = <1>;
 692                                 #size-cells = <1>;
 693                                 ranges = <0 0x5a0 0x170>;
 694
 695                                 pbias_regulator: pbias_regulator@60 {
 696                                         compatible = "ti,pbias-omap4", "ti,pbias-omap";
 697                                         reg = <0x60 0x4>;
 698                                         syscon = <&omap4_padconf_global>;
 699                                         pbias_mmc_reg: pbias_mmc_omap4 {
 700                                                 regulator-name = "pbias_mmc_omap4";
 701                                                 regulator-min-microvolt = <1800000>;
 702                                                 regulator-max-microvolt = <3000000>;
 703                                         };
 704                                 };
 705                         };
 706                 };
 707
 708                 target-module@2000 {                    /* 0x4a102000, ap 61 3c.0 */
 709                         compatible = "ti,sysc";
 710                         status = "disabled";
 711                         #address-cells = <1>;
 712                         #size-cells = <1>;
 713                         ranges = <0x0 0x2000 0x1000>;
 714                 };
 715
 716                 target-module@8000 {                    /* 0x4a108000, ap 63 62.0 */
 717                         compatible = "ti,sysc";
 718                         status = "disabled";
 719                         #address-cells = <1>;
 720                         #size-cells = <1>;
 721                         ranges = <0x0 0x8000 0x1000>;
 722                 };
 723
 724                 target-module@a000 {                    /* 0x4a10a000, ap 65 50.0 */
 725                         compatible = "ti,sysc-omap4", "ti,sysc";
 726                         ti,hwmods = "fdif";
 727                         reg = <0xa000 0x4>,
 728                               <0xa010 0x4>;
 729                         reg-names = "rev", "sysc";
 730                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 731                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 732                                         <SYSC_IDLE_NO>,
 733                                         <SYSC_IDLE_SMART>;
 734                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 735                                         <SYSC_IDLE_NO>,
 736                                         <SYSC_IDLE_SMART>;
 737                         ti,sysc-delay-us = <2>;
 738                         /* Domains (V, P, C): core, cam_pwrdm, iss_clkdm */
 739                         clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
 740                         clock-names = "fck";
 741                         #address-cells = <1>;
 742                         #size-cells = <1>;
 743                         ranges = <0x0 0xa000 0x1000>;
 744
 745                         /* No child device binding or driver in mainline */
 746                 };
 747         };
 748
 749         segment@180000 {                                        /* 0x4a180000 */
 750                 compatible = "simple-bus";
 751                 #address-cells = <1>;
 752                 #size-cells = <1>;
 753         };
 754
 755         segment@200000 {                                        /* 0x4a200000 */
 756                 compatible = "simple-bus";
 757                 #address-cells = <1>;
 758                 #size-cells = <1>;
 759                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 31 */
 760                          <0x0001f000 0x0021f000 0x001000>,      /* ap 32 */
 761                          <0x0000a000 0x0020a000 0x001000>,      /* ap 33 */
 762                          <0x0000b000 0x0020b000 0x001000>,      /* ap 34 */
 763                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 764                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 765                          <0x00006000 0x00206000 0x001000>,      /* ap 37 */
 766                          <0x00007000 0x00207000 0x001000>,      /* ap 38 */
 767                          <0x00012000 0x00212000 0x001000>,      /* ap 39 */
 768                          <0x00013000 0x00213000 0x001000>,      /* ap 40 */
 769                          <0x0000c000 0x0020c000 0x001000>,      /* ap 41 */
 770                          <0x0000d000 0x0020d000 0x001000>,      /* ap 42 */
 771                          <0x00010000 0x00210000 0x001000>,      /* ap 43 */
 772                          <0x00011000 0x00211000 0x001000>,      /* ap 44 */
 773                          <0x00016000 0x00216000 0x001000>,      /* ap 45 */
 774                          <0x00017000 0x00217000 0x001000>,      /* ap 46 */
 775                          <0x00014000 0x00214000 0x001000>,      /* ap 47 */
 776                          <0x00015000 0x00215000 0x001000>,      /* ap 48 */
 777                          <0x00018000 0x00218000 0x001000>,      /* ap 49 */
 778                          <0x00019000 0x00219000 0x001000>,      /* ap 50 */
 779                          <0x00020000 0x00220000 0x001000>,      /* ap 51 */
 780                          <0x00021000 0x00221000 0x001000>,      /* ap 52 */
 781                          <0x00026000 0x00226000 0x001000>,      /* ap 53 */
 782                          <0x00027000 0x00227000 0x001000>,      /* ap 54 */
 783                          <0x00028000 0x00228000 0x001000>,      /* ap 55 */
 784                          <0x00029000 0x00229000 0x001000>,      /* ap 56 */
 785                          <0x0002a000 0x0022a000 0x001000>,      /* ap 57 */
 786                          <0x0002b000 0x0022b000 0x001000>,      /* ap 58 */
 787                          <0x0001c000 0x0021c000 0x001000>,      /* ap 59 */
 788                          <0x0001d000 0x0021d000 0x001000>;      /* ap 60 */
 789
 790                 target-module@4000 {                    /* 0x4a204000, ap 35 42.0 */
 791                         compatible = "ti,sysc";
 792                         status = "disabled";
 793                         #address-cells = <1>;
 794                         #size-cells = <1>;
 795                         ranges = <0x0 0x4000 0x1000>;
 796                 };
 797
 798                 target-module@6000 {                    /* 0x4a206000, ap 37 4a.0 */
 799                         compatible = "ti,sysc";
 800                         status = "disabled";
 801                         #address-cells = <1>;
 802                         #size-cells = <1>;
 803                         ranges = <0x0 0x6000 0x1000>;
 804                 };
 805
 806                 target-module@a000 {                    /* 0x4a20a000, ap 33 2c.0 */
 807                         compatible = "ti,sysc";
 808                         status = "disabled";
 809                         #address-cells = <1>;
 810                         #size-cells = <1>;
 811                         ranges = <0x0 0xa000 0x1000>;
 812                 };
 813
 814                 target-module@c000 {                    /* 0x4a20c000, ap 41 20.0 */
 815                         compatible = "ti,sysc";
 816                         status = "disabled";
 817                         #address-cells = <1>;
 818                         #size-cells = <1>;
 819                         ranges = <0x0 0xc000 0x1000>;
 820                 };
 821
 822                 target-module@10000 {                   /* 0x4a210000, ap 43 52.0 */
 823                         compatible = "ti,sysc";
 824                         status = "disabled";
 825                         #address-cells = <1>;
 826                         #size-cells = <1>;
 827                         ranges = <0x0 0x10000 0x1000>;
 828                 };
 829
 830                 target-module@12000 {                   /* 0x4a212000, ap 39 18.0 */
 831                         compatible = "ti,sysc";
 832                         status = "disabled";
 833                         #address-cells = <1>;
 834                         #size-cells = <1>;
 835                         ranges = <0x0 0x12000 0x1000>;
 836                 };
 837
 838                 target-module@14000 {                   /* 0x4a214000, ap 47 30.0 */
 839                         compatible = "ti,sysc";
 840                         status = "disabled";
 841                         #address-cells = <1>;
 842                         #size-cells = <1>;
 843                         ranges = <0x0 0x14000 0x1000>;
 844                 };
 845
 846                 target-module@16000 {                   /* 0x4a216000, ap 45 28.0 */
 847                         compatible = "ti,sysc";
 848                         status = "disabled";
 849                         #address-cells = <1>;
 850                         #size-cells = <1>;
 851                         ranges = <0x0 0x16000 0x1000>;
 852                 };
 853
 854                 target-module@18000 {                   /* 0x4a218000, ap 49 38.0 */
 855                         compatible = "ti,sysc";
 856                         status = "disabled";
 857                         #address-cells = <1>;
 858                         #size-cells = <1>;
 859                         ranges = <0x0 0x18000 0x1000>;
 860                 };
 861
 862                 target-module@1c000 {                   /* 0x4a21c000, ap 59 5a.0 */
 863                         compatible = "ti,sysc";
 864                         status = "disabled";
 865                         #address-cells = <1>;
 866                         #size-cells = <1>;
 867                         ranges = <0x0 0x1c000 0x1000>;
 868                 };
 869
 870                 target-module@1e000 {                   /* 0x4a21e000, ap 31 10.0 */
 871                         compatible = "ti,sysc";
 872                         status = "disabled";
 873                         #address-cells = <1>;
 874                         #size-cells = <1>;
 875                         ranges = <0x0 0x1e000 0x1000>;
 876                 };
 877
 878                 target-module@20000 {                   /* 0x4a220000, ap 51 40.0 */
 879                         compatible = "ti,sysc";
 880                         status = "disabled";
 881                         #address-cells = <1>;
 882                         #size-cells = <1>;
 883                         ranges = <0x0 0x20000 0x1000>;
 884                 };
 885
 886                 target-module@26000 {                   /* 0x4a226000, ap 53 34.0 */
 887                         compatible = "ti,sysc";
 888                         status = "disabled";
 889                         #address-cells = <1>;
 890                         #size-cells = <1>;
 891                         ranges = <0x0 0x26000 0x1000>;
 892                 };
 893
 894                 target-module@28000 {                   /* 0x4a228000, ap 55 2e.0 */
 895                         compatible = "ti,sysc";
 896                         status = "disabled";
 897                         #address-cells = <1>;
 898                         #size-cells = <1>;
 899                         ranges = <0x0 0x28000 0x1000>;
 900                 };
 901
 902                 target-module@2a000 {                   /* 0x4a22a000, ap 57 48.0 */
 903                         compatible = "ti,sysc";
 904                         status = "disabled";
 905                         #address-cells = <1>;
 906                         #size-cells = <1>;
 907                         ranges = <0x0 0x2a000 0x1000>;
 908                 };
 909         };
 910
 911         segment@280000 {                                        /* 0x4a280000 */
 912                 compatible = "simple-bus";
 913                 #address-cells = <1>;
 914                 #size-cells = <1>;
 915         };
 916
 917         l4_cfg_segment_300000: segment@300000 {                 /* 0x4a300000 */
 918                 compatible = "simple-bus";
 919                 #address-cells = <1>;
 920                 #size-cells = <1>;
 921                 ranges = <0x00000000 0x00300000 0x020000>,      /* ap 67 */
 922                          <0x00040000 0x00340000 0x001000>,      /* ap 68 */
 923                          <0x00020000 0x00320000 0x004000>,      /* ap 71 */
 924                          <0x00024000 0x00324000 0x002000>,      /* ap 72 */
 925                          <0x00026000 0x00326000 0x001000>,      /* ap 73 */
 926                          <0x00027000 0x00327000 0x001000>,      /* ap 74 */
 927                          <0x00028000 0x00328000 0x001000>,      /* ap 75 */
 928                          <0x00029000 0x00329000 0x001000>,      /* ap 76 */
 929                          <0x00030000 0x00330000 0x010000>,      /* ap 77 */
 930                          <0x0002a000 0x0032a000 0x002000>,      /* ap 90 */
 931                          <0x0002c000 0x0032c000 0x004000>;      /* ap 91 */
 932
 933                 l4_cfg_target_0: target-module@0 {      /* 0x4a300000, ap 67 14.0 */
 934                         compatible = "ti,sysc";
 935                         status = "disabled";
 936                         #address-cells = <1>;
 937                         #size-cells = <1>;
 938                         ranges = <0x00000000 0x00000000 0x00020000>,
 939                                  <0x00020000 0x00020000 0x00004000>,
 940                                  <0x00024000 0x00024000 0x00002000>,
 941                                  <0x00026000 0x00026000 0x00001000>,
 942                                  <0x00027000 0x00027000 0x00001000>,
 943                                  <0x00028000 0x00028000 0x00001000>,
 944                                  <0x00029000 0x00029000 0x00001000>,
 945                                  <0x0002a000 0x0002a000 0x00002000>,
 946                                  <0x0002c000 0x0002c000 0x00004000>,
 947                                  <0x00030000 0x00030000 0x00010000>;
 948                 };
 949         };
 950 };
 951
 952 &l4_wkup {                                              /* 0x4a300000 */
 953         compatible = "ti,omap4-l4-wkup", "simple-bus";
 954         reg = <0x4a300000 0x800>,
 955               <0x4a300800 0x800>,
 956               <0x4a301000 0x1000>;
 957         reg-names = "ap", "la", "ia0";
 958         #address-cells = <1>;
 959         #size-cells = <1>;
 960         ranges = <0x00000000 0x4a300000 0x010000>,      /* segment 0 */
 961                  <0x00010000 0x4a310000 0x010000>,      /* segment 1 */
 962                  <0x00020000 0x4a320000 0x010000>;      /* segment 2 */
 963
 964         segment@0 {                                     /* 0x4a300000 */
 965                 compatible = "simple-bus";
 966                 #address-cells = <1>;
 967                 #size-cells = <1>;
 968                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 969                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
 970                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 971                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
 972                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
 973                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
 974                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
 975                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
 976                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
 977                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
 978                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
 979
 980                 target-module@4000 {                    /* 0x4a304000, ap 17 24.0 */
 981                         compatible = "ti,sysc-omap2", "ti,sysc";
 982                         ti,hwmods = "counter_32k";
 983                         reg = <0x4000 0x4>,
 984                               <0x4004 0x4>;
 985                         reg-names = "rev", "sysc";
 986                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 987                                         <SYSC_IDLE_NO>;
 988                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
 989                         clocks = <&l4_wkup_clkctrl OMAP4_COUNTER_32K_CLKCTRL 0>;
 990                         clock-names = "fck";
 991                         #address-cells = <1>;
 992                         #size-cells = <1>;
 993                         ranges = <0x0 0x4000 0x1000>;
 994
 995                         counter32k: counter@0 {
 996                                 compatible = "ti,omap-counter32k";
 997                                 reg = <0x0 0x20>;
 998                         };
 999                 };
1000
1001                 target-module@6000 {                    /* 0x4a306000, ap 3 08.0 */
1002                         compatible = "ti,sysc-omap4", "ti,sysc";
1003                         reg = <0x6000 0x4>;
1004                         reg-names = "rev";
1005                         #address-cells = <1>;
1006                         #size-cells = <1>;
1007                         ranges = <0x0 0x6000 0x2000>;
1008
1009                         prm: prm@0 {
1010                                 compatible = "ti,omap4-prm";
1011                                 reg = <0x0 0x2000>;
1012                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1013                                 #address-cells = <1>;
1014                                 #size-cells = <1>;
1015                                 ranges = <0 0 0x2000>;
1016
1017                                 prm_clocks: clocks {
1018                                         #address-cells = <1>;
1019                                         #size-cells = <0>;
1020                                 };
1021
1022                                 prm_clockdomains: clockdomains {
1023                                 };
1024                         };
1025                 };
1026
1027                 target-module@a000 {                    /* 0x4a30a000, ap 15 34.0 */
1028                         compatible = "ti,sysc-omap4", "ti,sysc";
1029                         reg = <0xa000 0x4>;
1030                         reg-names = "rev";
1031                         #address-cells = <1>;
1032                         #size-cells = <1>;
1033                         ranges = <0x0 0xa000 0x1000>;
1034
1035                         scrm: scrm@0 {
1036                                 compatible = "ti,omap4-scrm";
1037                                 reg = <0x0 0x2000>;
1038
1039                                 scrm_clocks: clocks {
1040                                         #address-cells = <1>;
1041                                         #size-cells = <0>;
1042                                 };
1043
1044                                 scrm_clockdomains: clockdomains {
1045                                 };
1046                         };
1047                 };
1048
1049                 target-module@c000 {                    /* 0x4a30c000, ap 19 2c.0 */
1050                         compatible = "ti,sysc-omap4", "ti,sysc";
1051                         ti,hwmods = "ctrl_module_wkup";
1052                         reg = <0xc000 0x4>,
1053                               <0xc010 0x4>;
1054                         reg-names = "rev", "sysc";
1055                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1056                                         <SYSC_IDLE_NO>,
1057                                         <SYSC_IDLE_SMART>,
1058                                         <SYSC_IDLE_SMART_WKUP>;
1059                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1060                         #address-cells = <1>;
1061                         #size-cells = <1>;
1062                         ranges = <0x0 0xc000 0x1000>;
1063
1064                         omap4_scm_wkup: scm@c000 {
1065                                 compatible = "ti,omap4-scm-wkup";
1066                                 reg = <0xc000 0x1000>;
1067                         };
1068                 };
1069         };
1070
1071         segment@10000 {                                 /* 0x4a310000 */
1072                 compatible = "simple-bus";
1073                 #address-cells = <1>;
1074                 #size-cells = <1>;
1075                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
1076                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
1077                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
1078                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
1079                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
1080                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
1081                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
1082                          <0x0000d000 0x0001d000 0x001000>,      /* ap 12 */
1083                          <0x0000e000 0x0001e000 0x001000>,      /* ap 21 */
1084                          <0x0000f000 0x0001f000 0x001000>;      /* ap 22 */
1085
1086                 gpio1_target: target-module@0 {                 /* 0x4a310000, ap 5 14.0 */
1087                         compatible = "ti,sysc-omap2", "ti,sysc";
1088                         reg = <0x0 0x4>,
1089                               <0x10 0x4>,
1090                               <0x114 0x4>;
1091                         reg-names = "rev", "sysc", "syss";
1092                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1093                                          SYSC_OMAP2_SOFTRESET |
1094                                          SYSC_OMAP2_AUTOIDLE)>;
1095                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1096                                         <SYSC_IDLE_NO>,
1097                                         <SYSC_IDLE_SMART>,
1098                                         <SYSC_IDLE_SMART_WKUP>;
1099                         ti,syss-mask = <1>;
1100                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1101                         clocks = <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 0>,
1102                                  <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 8>;
1103                         clock-names = "fck", "dbclk";
1104                         #address-cells = <1>;
1105                         #size-cells = <1>;
1106                         ranges = <0x0 0x0 0x1000>;
1107
1108                         gpio1: gpio@0 {
1109                                 compatible = "ti,omap4-gpio";
1110                                 reg = <0x0 0x200>;
1111                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1112                                 ti,gpio-always-on;
1113                                 gpio-controller;
1114                                 #gpio-cells = <2>;
1115                                 interrupt-controller;
1116                                 #interrupt-cells = <2>;
1117                         };
1118                 };
1119
1120                 target-module@4000 {                    /* 0x4a314000, ap 7 18.0 */
1121                         compatible = "ti,sysc-omap2", "ti,sysc";
1122                         reg = <0x4000 0x4>,
1123                               <0x4010 0x4>,
1124                               <0x4014 0x4>;
1125                         reg-names = "rev", "sysc", "syss";
1126                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
1127                                          SYSC_OMAP2_SOFTRESET)>;
1128                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1129                                         <SYSC_IDLE_NO>,
1130                                         <SYSC_IDLE_SMART>,
1131                                         <SYSC_IDLE_SMART_WKUP>;
1132                         ti,syss-mask = <1>;
1133                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1134                         clocks = <&l4_wkup_clkctrl OMAP4_WD_TIMER2_CLKCTRL 0>;
1135                         clock-names = "fck";
1136                         #address-cells = <1>;
1137                         #size-cells = <1>;
1138                         ranges = <0x0 0x4000 0x1000>;
1139
1140                         wdt2: wdt@0 {
1141                                 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
1142                                 reg = <0x0 0x80>;
1143                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
1144                         };
1145                 };
1146
1147                 target-module@8000 {                    /* 0x4a318000, ap 9 1c.0 */
1148                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1149                         ti,hwmods = "timer1";
1150                         reg = <0x8000 0x4>,
1151                               <0x8010 0x4>,
1152                               <0x8014 0x4>;
1153                         reg-names = "rev", "sysc", "syss";
1154                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1155                                          SYSC_OMAP2_EMUFREE |
1156                                          SYSC_OMAP2_ENAWAKEUP |
1157                                          SYSC_OMAP2_SOFTRESET |
1158                                          SYSC_OMAP2_AUTOIDLE)>;
1159                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1160                                         <SYSC_IDLE_NO>,
1161                                         <SYSC_IDLE_SMART>;
1162                         ti,syss-mask = <1>;
1163                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1164                         clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 0>;
1165                         clock-names = "fck";
1166                         #address-cells = <1>;
1167                         #size-cells = <1>;
1168                         ranges = <0x0 0x8000 0x1000>;
1169
1170                         timer1: timer@0 {
1171                                 compatible = "ti,omap3430-timer";
1172                                 reg = <0x0 0x80>;
1173                                 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
1174                                 clock-names = "fck";
1175                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1176                                 ti,timer-alwon;
1177                         };
1178                 };
1179
1180                 target-module@c000 {                    /* 0x4a31c000, ap 11 20.0 */
1181                         compatible = "ti,sysc-omap2", "ti,sysc";
1182                         ti,hwmods = "kbd";
1183                         reg = <0xc000 0x4>,
1184                               <0xc010 0x4>,
1185                               <0xc014 0x4>;
1186                         reg-names = "rev", "sysc", "syss";
1187                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1188                                          SYSC_OMAP2_EMUFREE |
1189                                          SYSC_OMAP2_ENAWAKEUP |
1190                                          SYSC_OMAP2_SOFTRESET |
1191                                          SYSC_OMAP2_AUTOIDLE)>;
1192                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1193                                         <SYSC_IDLE_NO>,
1194                                         <SYSC_IDLE_SMART>;
1195                         ti,syss-mask = <1>;
1196                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1197                         clocks = <&l4_wkup_clkctrl OMAP4_KBD_CLKCTRL 0>;
1198                         clock-names = "fck";
1199                         #address-cells = <1>;
1200                         #size-cells = <1>;
1201                         ranges = <0x0 0xc000 0x1000>;
1202
1203                         keypad: keypad@0 {
1204                                 compatible = "ti,omap4-keypad";
1205                                 reg = <0x0 0x80>;
1206                                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1207                                 reg-names = "mpu";
1208                         };
1209                 };
1210
1211                 target-module@e000 {                    /* 0x4a31e000, ap 21 30.0 */
1212                         compatible = "ti,sysc-omap4", "ti,sysc";
1213                         ti,hwmods = "ctrl_module_pad_wkup";
1214                         reg = <0xe000 0x4>,
1215                               <0xe010 0x4>;
1216                         reg-names = "rev", "sysc";
1217                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1218                                         <SYSC_IDLE_NO>,
1219                                         <SYSC_IDLE_SMART>,
1220                                         <SYSC_IDLE_SMART_WKUP>;
1221                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1222                         #address-cells = <1>;
1223                         #size-cells = <1>;
1224                         ranges = <0x0 0xe000 0x1000>;
1225
1226                         omap4_pmx_wkup: pinmux@40 {
1227                                 compatible = "ti,omap4-padconf",
1228                                              "pinctrl-single";
1229                                 reg = <0x40 0x0038>;
1230                                 #address-cells = <1>;
1231                                 #size-cells = <0>;
1232                                 #pinctrl-cells = <1>;
1233                                 #interrupt-cells = <1>;
1234                                 interrupt-controller;
1235                                 pinctrl-single,register-width = <16>;
1236                                 pinctrl-single,function-mask = <0x7fff>;
1237                         };
1238                 };
1239         };
1240
1241         segment@20000 {                                 /* 0x4a320000 */
1242                 compatible = "simple-bus";
1243                 #address-cells = <1>;
1244                 #size-cells = <1>;
1245                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
1246                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
1247                          <0x00000000 0x00020000 0x001000>,      /* ap 23 */
1248                          <0x00001000 0x00021000 0x001000>,      /* ap 24 */
1249                          <0x00002000 0x00022000 0x001000>,      /* ap 25 */
1250                          <0x00003000 0x00023000 0x001000>,      /* ap 26 */
1251                          <0x00004000 0x00024000 0x001000>,      /* ap 27 */
1252                          <0x00005000 0x00025000 0x001000>,      /* ap 28 */
1253                          <0x00007000 0x00027000 0x000400>,      /* ap 29 */
1254                          <0x00008000 0x00028000 0x000800>,      /* ap 30 */
1255                          <0x00009000 0x00029000 0x000400>;      /* ap 31 */
1256
1257                 target-module@0 {                       /* 0x4a320000, ap 23 04.0 */
1258                         compatible = "ti,sysc";
1259                         status = "disabled";
1260                         #address-cells = <1>;
1261                         #size-cells = <1>;
1262                         ranges = <0x0 0x0 0x1000>;
1263                 };
1264
1265                 target-module@2000 {                    /* 0x4a322000, ap 25 0c.0 */
1266                         compatible = "ti,sysc";
1267                         status = "disabled";
1268                         #address-cells = <1>;
1269                         #size-cells = <1>;
1270                         ranges = <0x0 0x2000 0x1000>;
1271                 };
1272
1273                 target-module@4000 {                    /* 0x4a324000, ap 27 10.0 */
1274                         compatible = "ti,sysc";
1275                         status = "disabled";
1276                         #address-cells = <1>;
1277                         #size-cells = <1>;
1278                         ranges = <0x0 0x4000 0x1000>;
1279                 };
1280
1281                 target-module@6000 {                    /* 0x4a326000, ap 13 28.0 */
1282                         compatible = "ti,sysc";
1283                         status = "disabled";
1284                         #address-cells = <1>;
1285                         #size-cells = <1>;
1286                         ranges = <0x00000000 0x00006000 0x00001000>,
1287                                  <0x00001000 0x00007000 0x00000400>,
1288                                  <0x00002000 0x00008000 0x00000800>,
1289                                  <0x00003000 0x00009000 0x00000400>;
1290                 };
1291         };
1292 };
1293
1294 &l4_per {                                               /* 0x48000000 */
1295         compatible = "ti,omap4-l4-per", "simple-bus";
1296         reg = <0x48000000 0x800>,
1297               <0x48000800 0x800>,
1298               <0x48001000 0x400>,
1299               <0x48001400 0x400>,
1300               <0x48001800 0x400>,
1301               <0x48001c00 0x400>;
1302         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
1303         #address-cells = <1>;
1304         #size-cells = <1>;
1305         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
1306                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
1307
1308         segment@0 {                                     /* 0x48000000 */
1309                 compatible = "simple-bus";
1310                 #address-cells = <1>;
1311                 #size-cells = <1>;
1312                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
1313                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
1314                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
1315                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
1316                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
1317                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
1318                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
1319                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
1320                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
1321                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
1322                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
1323                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
1324                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
1325                          <0x00040000 0x00040000 0x010000>,      /* ap 13 */
1326                          <0x00050000 0x00050000 0x001000>,      /* ap 14 */
1327                          <0x00055000 0x00055000 0x001000>,      /* ap 15 */
1328                          <0x00056000 0x00056000 0x001000>,      /* ap 16 */
1329                          <0x00057000 0x00057000 0x001000>,      /* ap 17 */
1330                          <0x00058000 0x00058000 0x001000>,      /* ap 18 */
1331                          <0x00059000 0x00059000 0x001000>,      /* ap 19 */
1332                          <0x0005a000 0x0005a000 0x001000>,      /* ap 20 */
1333                          <0x0005b000 0x0005b000 0x001000>,      /* ap 21 */
1334                          <0x0005c000 0x0005c000 0x001000>,      /* ap 22 */
1335                          <0x0005d000 0x0005d000 0x001000>,      /* ap 23 */
1336                          <0x0005e000 0x0005e000 0x001000>,      /* ap 24 */
1337                          <0x00060000 0x00060000 0x001000>,      /* ap 25 */
1338                          <0x0006a000 0x0006a000 0x001000>,      /* ap 26 */
1339                          <0x0006b000 0x0006b000 0x001000>,      /* ap 27 */
1340                          <0x0006c000 0x0006c000 0x001000>,      /* ap 28 */
1341                          <0x0006d000 0x0006d000 0x001000>,      /* ap 29 */
1342                          <0x0006e000 0x0006e000 0x001000>,      /* ap 30 */
1343                          <0x0006f000 0x0006f000 0x001000>,      /* ap 31 */
1344                          <0x00070000 0x00070000 0x001000>,      /* ap 32 */
1345                          <0x00071000 0x00071000 0x001000>,      /* ap 33 */
1346                          <0x00072000 0x00072000 0x001000>,      /* ap 34 */
1347                          <0x00073000 0x00073000 0x001000>,      /* ap 35 */
1348                          <0x00061000 0x00061000 0x001000>,      /* ap 36 */
1349                          <0x00096000 0x00096000 0x001000>,      /* ap 37 */
1350                          <0x00097000 0x00097000 0x001000>,      /* ap 38 */
1351                          <0x00076000 0x00076000 0x001000>,      /* ap 39 */
1352                          <0x00077000 0x00077000 0x001000>,      /* ap 40 */
1353                          <0x00078000 0x00078000 0x001000>,      /* ap 41 */
1354                          <0x00079000 0x00079000 0x001000>,      /* ap 42 */
1355                          <0x00086000 0x00086000 0x001000>,      /* ap 43 */
1356                          <0x00087000 0x00087000 0x001000>,      /* ap 44 */
1357                          <0x00088000 0x00088000 0x001000>,      /* ap 45 */
1358                          <0x00089000 0x00089000 0x001000>,      /* ap 46 */
1359                          <0x000b0000 0x000b0000 0x001000>,      /* ap 47 */
1360                          <0x000b1000 0x000b1000 0x001000>,      /* ap 48 */
1361                          <0x00098000 0x00098000 0x001000>,      /* ap 49 */
1362                          <0x00099000 0x00099000 0x001000>,      /* ap 50 */
1363                          <0x0009a000 0x0009a000 0x001000>,      /* ap 51 */
1364                          <0x0009b000 0x0009b000 0x001000>,      /* ap 52 */
1365                          <0x0009c000 0x0009c000 0x001000>,      /* ap 53 */
1366                          <0x0009d000 0x0009d000 0x001000>,      /* ap 54 */
1367                          <0x0009e000 0x0009e000 0x001000>,      /* ap 55 */
1368                          <0x0009f000 0x0009f000 0x001000>,      /* ap 56 */
1369                          <0x00090000 0x00090000 0x002000>,      /* ap 57 */
1370                          <0x00092000 0x00092000 0x001000>,      /* ap 58 */
1371                          <0x000a4000 0x000a4000 0x001000>,      /* ap 59 */
1372                          <0x000a6000 0x000a6000 0x001000>,      /* ap 60 */
1373                          <0x000a8000 0x000a8000 0x004000>,      /* ap 61 */
1374                          <0x000ac000 0x000ac000 0x001000>,      /* ap 62 */
1375                          <0x000ad000 0x000ad000 0x001000>,      /* ap 63 */
1376                          <0x000ae000 0x000ae000 0x001000>,      /* ap 64 */
1377                          <0x000b2000 0x000b2000 0x001000>,      /* ap 65 */
1378                          <0x000b3000 0x000b3000 0x001000>,      /* ap 66 */
1379                          <0x000b4000 0x000b4000 0x001000>,      /* ap 67 */
1380                          <0x000b5000 0x000b5000 0x001000>,      /* ap 68 */
1381                          <0x000b8000 0x000b8000 0x001000>,      /* ap 69 */
1382                          <0x000b9000 0x000b9000 0x001000>,      /* ap 70 */
1383                          <0x000ba000 0x000ba000 0x001000>,      /* ap 71 */
1384                          <0x000bb000 0x000bb000 0x001000>,      /* ap 72 */
1385                          <0x000d1000 0x000d1000 0x001000>,      /* ap 73 */
1386                          <0x000d2000 0x000d2000 0x001000>,      /* ap 74 */
1387                          <0x000d5000 0x000d5000 0x001000>,      /* ap 75 */
1388                          <0x000d6000 0x000d6000 0x001000>,      /* ap 76 */
1389                          <0x000a2000 0x000a2000 0x001000>,      /* ap 79 */
1390                          <0x000a3000 0x000a3000 0x001000>,      /* ap 80 */
1391                          <0x00001400 0x00001400 0x000400>,      /* ap 81 */
1392                          <0x00001800 0x00001800 0x000400>,      /* ap 82 */
1393                          <0x00001c00 0x00001c00 0x000400>,      /* ap 83 */
1394                          <0x000a5000 0x000a5000 0x001000>;      /* ap 84 */
1395
1396                 target-module@20000 {                   /* 0x48020000, ap 3 06.0 */
1397                         compatible = "ti,sysc-omap2", "ti,sysc";
1398                         reg = <0x20050 0x4>,
1399                               <0x20054 0x4>,
1400                               <0x20058 0x4>;
1401                         reg-names = "rev", "sysc", "syss";
1402                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1403                                          SYSC_OMAP2_SOFTRESET |
1404                                          SYSC_OMAP2_AUTOIDLE)>;
1405                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1406                                         <SYSC_IDLE_NO>,
1407                                         <SYSC_IDLE_SMART>,
1408                                         <SYSC_IDLE_SMART_WKUP>;
1409                         ti,syss-mask = <1>;
1410                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1411                         clocks = <&l4_per_clkctrl OMAP4_UART3_CLKCTRL 0>;
1412                         clock-names = "fck";
1413                         #address-cells = <1>;
1414                         #size-cells = <1>;
1415                         ranges = <0x0 0x20000 0x1000>;
1416
1417                         uart3: serial@0 {
1418                                 compatible = "ti,omap4-uart";
1419                                 reg = <0x0 0x100>;
1420                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1421                                 clock-frequency = <48000000>;
1422                         };
1423                 };
1424
1425                 target-module@32000 {                   /* 0x48032000, ap 5 02.0 */
1426                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1427                         ti,hwmods = "timer2";
1428                         reg = <0x32000 0x4>,
1429                               <0x32010 0x4>,
1430                               <0x32014 0x4>;
1431                         reg-names = "rev", "sysc", "syss";
1432                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1433                                          SYSC_OMAP2_EMUFREE |
1434                                          SYSC_OMAP2_ENAWAKEUP |
1435                                          SYSC_OMAP2_SOFTRESET |
1436                                          SYSC_OMAP2_AUTOIDLE)>;
1437                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1438                                         <SYSC_IDLE_NO>,
1439                                         <SYSC_IDLE_SMART>;
1440                         ti,syss-mask = <1>;
1441                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1442                         clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 0>;
1443                         clock-names = "fck";
1444                         #address-cells = <1>;
1445                         #size-cells = <1>;
1446                         ranges = <0x0 0x32000 0x1000>;
1447
1448                         timer2: timer@0 {
1449                                 compatible = "ti,omap3430-timer";
1450                                 reg = <0x0 0x80>;
1451                                 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>;
1452                                 clock-names = "fck";
1453                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1454                         };
1455                 };
1456
1457                 target-module@34000 {                   /* 0x48034000, ap 7 04.0 */
1458                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1459                         ti,hwmods = "timer3";
1460                         reg = <0x34000 0x4>,
1461                               <0x34010 0x4>;
1462                         reg-names = "rev", "sysc";
1463                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1464                                          SYSC_OMAP4_SOFTRESET)>;
1465                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1466                                         <SYSC_IDLE_NO>,
1467                                         <SYSC_IDLE_SMART>,
1468                                         <SYSC_IDLE_SMART_WKUP>;
1469                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1470                         clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 0>;
1471                         clock-names = "fck";
1472                         #address-cells = <1>;
1473                         #size-cells = <1>;
1474                         ranges = <0x0 0x34000 0x1000>;
1475
1476                         timer3: timer@0 {
1477                                 compatible = "ti,omap4430-timer";
1478                                 reg = <0x0 0x80>;
1479                                 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>;
1480                                 clock-names = "fck";
1481                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1482                         };
1483                 };
1484
1485                 target-module@36000 {                   /* 0x48036000, ap 9 0e.0 */
1486                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1487                         ti,hwmods = "timer4";
1488                         reg = <0x36000 0x4>,
1489                               <0x36010 0x4>;
1490                         reg-names = "rev", "sysc";
1491                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1492                                          SYSC_OMAP4_SOFTRESET)>;
1493                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1494                                         <SYSC_IDLE_NO>,
1495                                         <SYSC_IDLE_SMART>,
1496                                         <SYSC_IDLE_SMART_WKUP>;
1497                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1498                         clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 0>;
1499                         clock-names = "fck";
1500                         #address-cells = <1>;
1501                         #size-cells = <1>;
1502                         ranges = <0x0 0x36000 0x1000>;
1503
1504                         timer4: timer@0 {
1505                                 compatible = "ti,omap4430-timer";
1506                                 reg = <0x0 0x80>;
1507                                 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>;
1508                                 clock-names = "fck";
1509                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1510                         };
1511                 };
1512
1513                 target-module@3e000 {                   /* 0x4803e000, ap 11 08.0 */
1514                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1515                         ti,hwmods = "timer9";
1516                         reg = <0x3e000 0x4>,
1517                               <0x3e010 0x4>;
1518                         reg-names = "rev", "sysc";
1519                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1520                                          SYSC_OMAP4_SOFTRESET)>;
1521                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1522                                         <SYSC_IDLE_NO>,
1523                                         <SYSC_IDLE_SMART>,
1524                                         <SYSC_IDLE_SMART_WKUP>;
1525                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1526                         clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 0>;
1527                         clock-names = "fck";
1528                         #address-cells = <1>;
1529                         #size-cells = <1>;
1530                         ranges = <0x0 0x3e000 0x1000>;
1531
1532                         timer9: timer@0 {
1533                                 compatible = "ti,omap4430-timer";
1534                                 reg = <0x0 0x80>;
1535                                 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
1536                                 clock-names = "fck";
1537                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1538                                 ti,timer-pwm;
1539                         };
1540                 };
1541
1542                 target-module@40000 {                   /* 0x48040000, ap 13 0a.0 */
1543                         compatible = "ti,sysc";
1544                         status = "disabled";
1545                         #address-cells = <1>;
1546                         #size-cells = <1>;
1547                         ranges = <0x0 0x40000 0x10000>;
1548                 };
1549
1550                 target-module@55000 {                   /* 0x48055000, ap 15 0c.0 */
1551                         compatible = "ti,sysc-omap2", "ti,sysc";
1552                         reg = <0x55000 0x4>,
1553                               <0x55010 0x4>,
1554                               <0x55114 0x4>;
1555                         reg-names = "rev", "sysc", "syss";
1556                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1557                                          SYSC_OMAP2_SOFTRESET |
1558                                          SYSC_OMAP2_AUTOIDLE)>;
1559                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1560                                         <SYSC_IDLE_NO>,
1561                                         <SYSC_IDLE_SMART>,
1562                                         <SYSC_IDLE_SMART_WKUP>;
1563                         ti,syss-mask = <1>;
1564                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1565                         clocks = <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 0>,
1566                                  <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 8>;
1567                         clock-names = "fck", "dbclk";
1568                         #address-cells = <1>;
1569                         #size-cells = <1>;
1570                         ranges = <0x0 0x55000 0x1000>;
1571
1572                         gpio2: gpio@0 {
1573                                 compatible = "ti,omap4-gpio";
1574                                 reg = <0x0 0x200>;
1575                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1576                                 gpio-controller;
1577                                 #gpio-cells = <2>;
1578                                 interrupt-controller;
1579                                 #interrupt-cells = <2>;
1580                         };
1581                 };
1582
1583                 target-module@57000 {                   /* 0x48057000, ap 17 16.0 */
1584                         compatible = "ti,sysc-omap2", "ti,sysc";
1585                         reg = <0x57000 0x4>,
1586                               <0x57010 0x4>,
1587                               <0x57114 0x4>;
1588                         reg-names = "rev", "sysc", "syss";
1589                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1590                                          SYSC_OMAP2_SOFTRESET |
1591                                          SYSC_OMAP2_AUTOIDLE)>;
1592                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1593                                         <SYSC_IDLE_NO>,
1594                                         <SYSC_IDLE_SMART>,
1595                                         <SYSC_IDLE_SMART_WKUP>;
1596                         ti,syss-mask = <1>;
1597                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1598                         clocks = <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 0>,
1599                                  <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 8>;
1600                         clock-names = "fck", "dbclk";
1601                         #address-cells = <1>;
1602                         #size-cells = <1>;
1603                         ranges = <0x0 0x57000 0x1000>;
1604
1605                         gpio3: gpio@0 {
1606                                 compatible = "ti,omap4-gpio";
1607                                 reg = <0x0 0x200>;
1608                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1609                                 gpio-controller;
1610                                 #gpio-cells = <2>;
1611                                 interrupt-controller;
1612                                 #interrupt-cells = <2>;
1613                         };
1614                 };
1615
1616                 target-module@59000 {                   /* 0x48059000, ap 19 10.0 */
1617                         compatible = "ti,sysc-omap2", "ti,sysc";
1618                         reg = <0x59000 0x4>,
1619                               <0x59010 0x4>,
1620                               <0x59114 0x4>;
1621                         reg-names = "rev", "sysc", "syss";
1622                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1623                                          SYSC_OMAP2_SOFTRESET |
1624                                          SYSC_OMAP2_AUTOIDLE)>;
1625                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1626                                         <SYSC_IDLE_NO>,
1627                                         <SYSC_IDLE_SMART>,
1628                                         <SYSC_IDLE_SMART_WKUP>;
1629                         ti,syss-mask = <1>;
1630                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1631                         clocks = <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 0>,
1632                                  <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 8>;
1633                         clock-names = "fck", "dbclk";
1634                         #address-cells = <1>;
1635                         #size-cells = <1>;
1636                         ranges = <0x0 0x59000 0x1000>;
1637
1638                         gpio4: gpio@0 {
1639                                 compatible = "ti,omap4-gpio";
1640                                 reg = <0x0 0x200>;
1641                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1642                                 gpio-controller;
1643                                 #gpio-cells = <2>;
1644                                 interrupt-controller;
1645                                 #interrupt-cells = <2>;
1646                         };
1647                 };
1648
1649                 target-module@5b000 {                   /* 0x4805b000, ap 21 12.0 */
1650                         compatible = "ti,sysc-omap2", "ti,sysc";
1651                         reg = <0x5b000 0x4>,
1652                               <0x5b010 0x4>,
1653                               <0x5b114 0x4>;
1654                         reg-names = "rev", "sysc", "syss";
1655                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1656                                          SYSC_OMAP2_SOFTRESET |
1657                                          SYSC_OMAP2_AUTOIDLE)>;
1658                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1659                                         <SYSC_IDLE_NO>,
1660                                         <SYSC_IDLE_SMART>,
1661                                         <SYSC_IDLE_SMART_WKUP>;
1662                         ti,syss-mask = <1>;
1663                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1664                         clocks = <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 0>,
1665                                  <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 8>;
1666                         clock-names = "fck", "dbclk";
1667                         #address-cells = <1>;
1668                         #size-cells = <1>;
1669                         ranges = <0x0 0x5b000 0x1000>;
1670
1671                         gpio5: gpio@0 {
1672                                 compatible = "ti,omap4-gpio";
1673                                 reg = <0x0 0x200>;
1674                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1675                                 gpio-controller;
1676                                 #gpio-cells = <2>;
1677                                 interrupt-controller;
1678                                 #interrupt-cells = <2>;
1679                         };
1680                 };
1681
1682                 target-module@5d000 {                   /* 0x4805d000, ap 23 14.0 */
1683                         compatible = "ti,sysc-omap2", "ti,sysc";
1684                         reg = <0x5d000 0x4>,
1685                               <0x5d010 0x4>,
1686                               <0x5d114 0x4>;
1687                         reg-names = "rev", "sysc", "syss";
1688                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1689                                          SYSC_OMAP2_SOFTRESET |
1690                                          SYSC_OMAP2_AUTOIDLE)>;
1691                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1692                                         <SYSC_IDLE_NO>,
1693                                         <SYSC_IDLE_SMART>,
1694                                         <SYSC_IDLE_SMART_WKUP>;
1695                         ti,syss-mask = <1>;
1696                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1697                         clocks = <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 0>,
1698                                  <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 8>;
1699                         clock-names = "fck", "dbclk";
1700                         #address-cells = <1>;
1701                         #size-cells = <1>;
1702                         ranges = <0x0 0x5d000 0x1000>;
1703
1704                         gpio6: gpio@0 {
1705                                 compatible = "ti,omap4-gpio";
1706                                 reg = <0x0 0x200>;
1707                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1708                                 gpio-controller;
1709                                 #gpio-cells = <2>;
1710                                 interrupt-controller;
1711                                 #interrupt-cells = <2>;
1712                         };
1713                 };
1714
1715                 target-module@60000 {                   /* 0x48060000, ap 25 1e.0 */
1716                         compatible = "ti,sysc-omap2", "ti,sysc";
1717                         reg = <0x60000 0x8>,
1718                               <0x60010 0x8>,
1719                               <0x60090 0x8>;
1720                         reg-names = "rev", "sysc", "syss";
1721                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1722                                          SYSC_OMAP2_ENAWAKEUP |
1723                                          SYSC_OMAP2_SOFTRESET |
1724                                          SYSC_OMAP2_AUTOIDLE)>;
1725                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1726                                         <SYSC_IDLE_NO>,
1727                                         <SYSC_IDLE_SMART>,
1728                                         <SYSC_IDLE_SMART_WKUP>;
1729                         ti,syss-mask = <1>;
1730                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1731                         clocks = <&l4_per_clkctrl OMAP4_I2C3_CLKCTRL 0>;
1732                         clock-names = "fck";
1733                         #address-cells = <1>;
1734                         #size-cells = <1>;
1735                         ranges = <0x0 0x60000 0x1000>;
1736
1737                         i2c3: i2c@0 {
1738                                 compatible = "ti,omap4-i2c";
1739                                 reg = <0x0 0x100>;
1740                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1741                                 #address-cells = <1>;
1742                                 #size-cells = <0>;
1743                         };
1744                 };
1745
1746                 target-module@6a000 {                   /* 0x4806a000, ap 26 18.0 */
1747                         compatible = "ti,sysc-omap2", "ti,sysc";
1748                         reg = <0x6a050 0x4>,
1749                               <0x6a054 0x4>,
1750                               <0x6a058 0x4>;
1751                         reg-names = "rev", "sysc", "syss";
1752                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1753                                          SYSC_OMAP2_SOFTRESET |
1754                                          SYSC_OMAP2_AUTOIDLE)>;
1755                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1756                                         <SYSC_IDLE_NO>,
1757                                         <SYSC_IDLE_SMART>,
1758                                         <SYSC_IDLE_SMART_WKUP>;
1759                         ti,syss-mask = <1>;
1760                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1761                         clocks = <&l4_per_clkctrl OMAP4_UART1_CLKCTRL 0>;
1762                         clock-names = "fck";
1763                         #address-cells = <1>;
1764                         #size-cells = <1>;
1765                         ranges = <0x0 0x6a000 0x1000>;
1766
1767                         uart1: serial@0 {
1768                                 compatible = "ti,omap4-uart";
1769                                 reg = <0x0 0x100>;
1770                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1771                                 clock-frequency = <48000000>;
1772                         };
1773                 };
1774
1775                 target-module@6c000 {                   /* 0x4806c000, ap 28 20.0 */
1776                         compatible = "ti,sysc-omap2", "ti,sysc";
1777                         reg = <0x6c050 0x4>,
1778                               <0x6c054 0x4>,
1779                               <0x6c058 0x4>;
1780                         reg-names = "rev", "sysc", "syss";
1781                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1782                                          SYSC_OMAP2_SOFTRESET |
1783                                          SYSC_OMAP2_AUTOIDLE)>;
1784                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1785                                         <SYSC_IDLE_NO>,
1786                                         <SYSC_IDLE_SMART>,
1787                                         <SYSC_IDLE_SMART_WKUP>;
1788                         ti,syss-mask = <1>;
1789                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1790                         clocks = <&l4_per_clkctrl OMAP4_UART2_CLKCTRL 0>;
1791                         clock-names = "fck";
1792                         #address-cells = <1>;
1793                         #size-cells = <1>;
1794                         ranges = <0x0 0x6c000 0x1000>;
1795
1796                         uart2: serial@0 {
1797                                 compatible = "ti,omap4-uart";
1798                                 reg = <0x0 0x100>;
1799                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1800                                 clock-frequency = <48000000>;
1801                         };
1802                 };
1803
1804                 target-module@6e000 {                   /* 0x4806e000, ap 30 1c.1 */
1805                         compatible = "ti,sysc-omap2", "ti,sysc";
1806                         reg = <0x6e050 0x4>,
1807                               <0x6e054 0x4>,
1808                               <0x6e058 0x4>;
1809                         reg-names = "rev", "sysc", "syss";
1810                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1811                                          SYSC_OMAP2_SOFTRESET |
1812                                          SYSC_OMAP2_AUTOIDLE)>;
1813                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1814                                         <SYSC_IDLE_NO>,
1815                                         <SYSC_IDLE_SMART>,
1816                                         <SYSC_IDLE_SMART_WKUP>;
1817                         ti,syss-mask = <1>;
1818                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1819                         clocks = <&l4_per_clkctrl OMAP4_UART4_CLKCTRL 0>;
1820                         clock-names = "fck";
1821                         #address-cells = <1>;
1822                         #size-cells = <1>;
1823                         ranges = <0x0 0x6e000 0x1000>;
1824
1825                         uart4: serial@0 {
1826                                 compatible = "ti,omap4-uart";
1827                                 reg = <0x0 0x100>;
1828                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1829                                 clock-frequency = <48000000>;
1830                         };
1831                 };
1832
1833                 target-module@70000 {                   /* 0x48070000, ap 32 28.0 */
1834                         compatible = "ti,sysc-omap2", "ti,sysc";
1835                         reg = <0x70000 0x8>,
1836                               <0x70010 0x8>,
1837                               <0x70090 0x8>;
1838                         reg-names = "rev", "sysc", "syss";
1839                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1840                                          SYSC_OMAP2_ENAWAKEUP |
1841                                          SYSC_OMAP2_SOFTRESET |
1842                                          SYSC_OMAP2_AUTOIDLE)>;
1843                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1844                                         <SYSC_IDLE_NO>,
1845                                         <SYSC_IDLE_SMART>,
1846                                         <SYSC_IDLE_SMART_WKUP>;
1847                         ti,syss-mask = <1>;
1848                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1849                         clocks = <&l4_per_clkctrl OMAP4_I2C1_CLKCTRL 0>;
1850                         clock-names = "fck";
1851                         #address-cells = <1>;
1852                         #size-cells = <1>;
1853                         ranges = <0x0 0x70000 0x1000>;
1854
1855                         i2c1: i2c@0 {
1856                                 compatible = "ti,omap4-i2c";
1857                                 reg = <0x0 0x100>;
1858                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1859                                 #address-cells = <1>;
1860                                 #size-cells = <0>;
1861                         };
1862                 };
1863
1864                 target-module@72000 {                   /* 0x48072000, ap 34 30.0 */
1865                         compatible = "ti,sysc-omap2", "ti,sysc";
1866                         reg = <0x72000 0x8>,
1867                               <0x72010 0x8>,
1868                               <0x72090 0x8>;
1869                         reg-names = "rev", "sysc", "syss";
1870                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1871                                          SYSC_OMAP2_ENAWAKEUP |
1872                                          SYSC_OMAP2_SOFTRESET |
1873                                          SYSC_OMAP2_AUTOIDLE)>;
1874                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1875                                         <SYSC_IDLE_NO>,
1876                                         <SYSC_IDLE_SMART>,
1877                                         <SYSC_IDLE_SMART_WKUP>;
1878                         ti,syss-mask = <1>;
1879                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1880                         clocks = <&l4_per_clkctrl OMAP4_I2C2_CLKCTRL 0>;
1881                         clock-names = "fck";
1882                         #address-cells = <1>;
1883                         #size-cells = <1>;
1884                         ranges = <0x0 0x72000 0x1000>;
1885
1886                         i2c2: i2c@0 {
1887                                 compatible = "ti,omap4-i2c";
1888                                 reg = <0x0 0x100>;
1889                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1890                                 #address-cells = <1>;
1891                                 #size-cells = <0>;
1892                         };
1893                 };
1894
1895                 target-module@76000 {                   /* 0x48076000, ap 39 38.0 */
1896                         compatible = "ti,sysc-omap4", "ti,sysc";
1897                         ti,hwmods = "slimbus2";
1898                         reg = <0x76000 0x4>,
1899                               <0x76010 0x4>;
1900                         reg-names = "rev", "sysc";
1901                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1902                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1903                                         <SYSC_IDLE_NO>,
1904                                         <SYSC_IDLE_SMART>,
1905                                         <SYSC_IDLE_SMART_WKUP>;
1906                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1907                         clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
1908                         clock-names = "fck";
1909                         #address-cells = <1>;
1910                         #size-cells = <1>;
1911                         ranges = <0x0 0x76000 0x1000>;
1912
1913                         /* No child device binding or driver in mainline */
1914                 };
1915
1916                 target-module@78000 {                   /* 0x48078000, ap 41 1a.0 */
1917                         compatible = "ti,sysc-omap2", "ti,sysc";
1918                         ti,hwmods = "elm";
1919                         reg = <0x78000 0x4>,
1920                               <0x78010 0x4>,
1921                               <0x78014 0x4>;
1922                         reg-names = "rev", "sysc", "syss";
1923                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1924                                          SYSC_OMAP2_SOFTRESET |
1925                                          SYSC_OMAP2_AUTOIDLE)>;
1926                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1927                                         <SYSC_IDLE_NO>,
1928                                         <SYSC_IDLE_SMART>;
1929                         ti,syss-mask = <1>;
1930                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1931                         clocks = <&l4_per_clkctrl OMAP4_ELM_CLKCTRL 0>;
1932                         clock-names = "fck";
1933                         #address-cells = <1>;
1934                         #size-cells = <1>;
1935                         ranges = <0x0 0x78000 0x1000>;
1936
1937                         elm: elm@0 {
1938                                 compatible = "ti,am3352-elm";
1939                                 reg = <0x0 0x2000>;
1940                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1941                                 status = "disabled";
1942                         };
1943                 };
1944
1945                 target-module@86000 {                   /* 0x48086000, ap 43 24.0 */
1946                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1947                         ti,hwmods = "timer10";
1948                         reg = <0x86000 0x4>,
1949                               <0x86010 0x4>,
1950                               <0x86014 0x4>;
1951                         reg-names = "rev", "sysc", "syss";
1952                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1953                                          SYSC_OMAP2_EMUFREE |
1954                                          SYSC_OMAP2_ENAWAKEUP |
1955                                          SYSC_OMAP2_SOFTRESET |
1956                                          SYSC_OMAP2_AUTOIDLE)>;
1957                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1958                                         <SYSC_IDLE_NO>,
1959                                         <SYSC_IDLE_SMART>;
1960                         ti,syss-mask = <1>;
1961                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1962                         clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 0>;
1963                         clock-names = "fck";
1964                         #address-cells = <1>;
1965                         #size-cells = <1>;
1966                         ranges = <0x0 0x86000 0x1000>;
1967
1968                         timer10: timer@0 {
1969                                 compatible = "ti,omap3430-timer";
1970                                 reg = <0x0 0x80>;
1971                                 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>;
1972                                 clock-names = "fck";
1973                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1974                                 ti,timer-pwm;
1975                         };
1976                 };
1977
1978                 target-module@88000 {                   /* 0x48088000, ap 45 2e.0 */
1979                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1980                         ti,hwmods = "timer11";
1981                         reg = <0x88000 0x4>,
1982                               <0x88010 0x4>;
1983                         reg-names = "rev", "sysc";
1984                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1985                                          SYSC_OMAP4_SOFTRESET)>;
1986                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1987                                         <SYSC_IDLE_NO>,
1988                                         <SYSC_IDLE_SMART>,
1989                                         <SYSC_IDLE_SMART_WKUP>;
1990                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1991                         clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 0>;
1992                         clock-names = "fck";
1993                         #address-cells = <1>;
1994                         #size-cells = <1>;
1995                         ranges = <0x0 0x88000 0x1000>;
1996
1997                         timer11: timer@0 {
1998                                 compatible = "ti,omap4430-timer";
1999                                 reg = <0x0 0x80>;
2000                                 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>;
2001                                 clock-names = "fck";
2002                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
2003                                 ti,timer-pwm;
2004                         };
2005                 };
2006
2007                 target-module@90000 {                   /* 0x48090000, ap 57 2a.0 */
2008                         compatible = "ti,sysc";
2009                         status = "disabled";
2010                         #address-cells = <1>;
2011                         #size-cells = <1>;
2012                         ranges = <0x0 0x90000 0x2000>;
2013                 };
2014
2015                 target-module@96000 {                   /* 0x48096000, ap 37 26.0 */
2016                         compatible = "ti,sysc-omap2", "ti,sysc";
2017                         ti,hwmods = "mcbsp4";
2018                         reg = <0x9608c 0x4>;
2019                         reg-names = "sysc";
2020                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2021                                          SYSC_OMAP2_ENAWAKEUP |
2022                                          SYSC_OMAP2_SOFTRESET)>;
2023                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2024                                         <SYSC_IDLE_NO>,
2025                                         <SYSC_IDLE_SMART>;
2026                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2027                         clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 0>;
2028                         clock-names = "fck";
2029                         #address-cells = <1>;
2030                         #size-cells = <1>;
2031                         ranges = <0x0 0x96000 0x1000>;
2032
2033                         mcbsp4: mcbsp@0 {
2034                                 compatible = "ti,omap4-mcbsp";
2035                                 reg = <0x0 0xff>; /* L4 Interconnect */
2036                                 reg-names = "mpu";
2037                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2038                                 interrupt-names = "common";
2039                                 ti,buffer-size = <128>;
2040                                 dmas = <&sdma 31>,
2041                                        <&sdma 32>;
2042                                 dma-names = "tx", "rx";
2043                                 status = "disabled";
2044                         };
2045                 };
2046
2047                 target-module@98000 {                   /* 0x48098000, ap 49 22.0 */
2048                         compatible = "ti,sysc-omap4", "ti,sysc";
2049                         ti,hwmods = "mcspi1";
2050                         reg = <0x98000 0x4>,
2051                               <0x98010 0x4>;
2052                         reg-names = "rev", "sysc";
2053                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2054                                          SYSC_OMAP4_SOFTRESET)>;
2055                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2056                                         <SYSC_IDLE_NO>,
2057                                         <SYSC_IDLE_SMART>,
2058                                         <SYSC_IDLE_SMART_WKUP>;
2059                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2060                         clocks = <&l4_per_clkctrl OMAP4_MCSPI1_CLKCTRL 0>;
2061                         clock-names = "fck";
2062                         #address-cells = <1>;
2063                         #size-cells = <1>;
2064                         ranges = <0x0 0x98000 0x1000>;
2065
2066                         mcspi1: spi@0 {
2067                                 compatible = "ti,omap4-mcspi";
2068                                 reg = <0x0 0x200>;
2069                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
2070                                 #address-cells = <1>;
2071                                 #size-cells = <0>;
2072                                 ti,spi-num-cs = <4>;
2073                                 dmas = <&sdma 35>,
2074                                        <&sdma 36>,
2075                                        <&sdma 37>,
2076                                        <&sdma 38>,
2077                                        <&sdma 39>,
2078                                        <&sdma 40>,
2079                                        <&sdma 41>,
2080                                        <&sdma 42>;
2081                                 dma-names = "tx0", "rx0", "tx1", "rx1",
2082                                             "tx2", "rx2", "tx3", "rx3";
2083                         };
2084                 };
2085
2086                 target-module@9a000 {                   /* 0x4809a000, ap 51 2c.0 */
2087                         compatible = "ti,sysc-omap4", "ti,sysc";
2088                         ti,hwmods = "mcspi2";
2089                         reg = <0x9a000 0x4>,
2090                               <0x9a010 0x4>;
2091                         reg-names = "rev", "sysc";
2092                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2093                                          SYSC_OMAP4_SOFTRESET)>;
2094                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2095                                         <SYSC_IDLE_NO>,
2096                                         <SYSC_IDLE_SMART>,
2097                                         <SYSC_IDLE_SMART_WKUP>;
2098                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2099                         clocks = <&l4_per_clkctrl OMAP4_MCSPI2_CLKCTRL 0>;
2100                         clock-names = "fck";
2101                         #address-cells = <1>;
2102                         #size-cells = <1>;
2103                         ranges = <0x0 0x9a000 0x1000>;
2104
2105                         mcspi2: spi@0 {
2106                                 compatible = "ti,omap4-mcspi";
2107                                 reg = <0x0 0x200>;
2108                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
2109                                 #address-cells = <1>;
2110                                 #size-cells = <0>;
2111                                 ti,spi-num-cs = <2>;
2112                                 dmas = <&sdma 43>,
2113                                        <&sdma 44>,
2114                                        <&sdma 45>,
2115                                        <&sdma 46>;
2116                                 dma-names = "tx0", "rx0", "tx1", "rx1";
2117                         };
2118                 };
2119
2120                 target-module@9c000 {                   /* 0x4809c000, ap 53 36.0 */
2121                         compatible = "ti,sysc-omap4", "ti,sysc";
2122                         reg = <0x9c000 0x4>,
2123                               <0x9c010 0x4>;
2124                         reg-names = "rev", "sysc";
2125                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2126                                          SYSC_OMAP4_SOFTRESET)>;
2127                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2128                                         <SYSC_IDLE_NO>,
2129                                         <SYSC_IDLE_SMART>,
2130                                         <SYSC_IDLE_SMART_WKUP>;
2131                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2132                                         <SYSC_IDLE_NO>,
2133                                         <SYSC_IDLE_SMART>,
2134                                         <SYSC_IDLE_SMART_WKUP>;
2135                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2136                         clocks = <&l3_init_clkctrl OMAP4_MMC1_CLKCTRL 0>;
2137                         clock-names = "fck";
2138                         #address-cells = <1>;
2139                         #size-cells = <1>;
2140                         ranges = <0x0 0x9c000 0x1000>;
2141
2142                         mmc1: mmc@0 {
2143                                 compatible = "ti,omap4-hsmmc";
2144                                 reg = <0x0 0x400>;
2145                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
2146                                 ti,dual-volt;
2147                                 ti,needs-special-reset;
2148                                 dmas = <&sdma 61>, <&sdma 62>;
2149                                 dma-names = "tx", "rx";
2150                                 pbias-supply = <&pbias_mmc_reg>;
2151                         };
2152                 };
2153
2154                 target-module@9e000 {                   /* 0x4809e000, ap 55 48.0 */
2155                         compatible = "ti,sysc";
2156                         status = "disabled";
2157                         #address-cells = <1>;
2158                         #size-cells = <1>;
2159                         ranges = <0x0 0x9e000 0x1000>;
2160                 };
2161
2162                 target-module@a2000 {                   /* 0x480a2000, ap 79 3a.0 */
2163                         compatible = "ti,sysc";
2164                         status = "disabled";
2165                         #address-cells = <1>;
2166                         #size-cells = <1>;
2167                         ranges = <0x0 0xa2000 0x1000>;
2168                 };
2169
2170                 target-module@a4000 {                   /* 0x480a4000, ap 59 34.0 */
2171                         compatible = "ti,sysc";
2172                         status = "disabled";
2173                         #address-cells = <1>;
2174                         #size-cells = <1>;
2175                         ranges = <0x00000000 0x000a4000 0x00001000>,
2176                                  <0x00001000 0x000a5000 0x00001000>;
2177                 };
2178
2179                 target-module@a8000 {                   /* 0x480a8000, ap 61 3e.0 */
2180                         compatible = "ti,sysc";
2181                         status = "disabled";
2182                         #address-cells = <1>;
2183                         #size-cells = <1>;
2184                         ranges = <0x0 0xa8000 0x4000>;
2185                 };
2186
2187                 target-module@ad000 {                   /* 0x480ad000, ap 63 50.0 */
2188                         compatible = "ti,sysc-omap4", "ti,sysc";
2189                         reg = <0xad000 0x4>,
2190                               <0xad010 0x4>;
2191                         reg-names = "rev", "sysc";
2192                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2193                                          SYSC_OMAP4_SOFTRESET)>;
2194                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2195                                         <SYSC_IDLE_NO>,
2196                                         <SYSC_IDLE_SMART>,
2197                                         <SYSC_IDLE_SMART_WKUP>;
2198                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2199                                         <SYSC_IDLE_NO>,
2200                                         <SYSC_IDLE_SMART>,
2201                                         <SYSC_IDLE_SMART_WKUP>;
2202                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2203                         clocks = <&l4_per_clkctrl OMAP4_MMC3_CLKCTRL 0>;
2204                         clock-names = "fck";
2205                         #address-cells = <1>;
2206                         #size-cells = <1>;
2207                         ranges = <0x0 0xad000 0x1000>;
2208
2209                         mmc3: mmc@0 {
2210                                 compatible = "ti,omap4-hsmmc";
2211                                 reg = <0x0 0x400>;
2212                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
2213                                 ti,needs-special-reset;
2214                                 dmas = <&sdma 77>, <&sdma 78>;
2215                                 dma-names = "tx", "rx";
2216                         };
2217                 };
2218
2219                 target-module@b0000 {                   /* 0x480b0000, ap 47 40.0 */
2220                         compatible = "ti,sysc";
2221                         status = "disabled";
2222                         #address-cells = <1>;
2223                         #size-cells = <1>;
2224                         ranges = <0x0 0xb0000 0x1000>;
2225                 };
2226
2227                 target-module@b2000 {                   /* 0x480b2000, ap 65 3c.0 */
2228                         compatible = "ti,sysc-omap2", "ti,sysc";
2229                         ti,hwmods = "hdq1w";
2230                         reg = <0xb2000 0x4>,
2231                               <0xb2014 0x4>,
2232                               <0xb2018 0x4>;
2233                         reg-names = "rev", "sysc", "syss";
2234                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2235                                          SYSC_OMAP2_AUTOIDLE)>;
2236                         ti,syss-mask = <1>;
2237                         ti,no-reset-on-init;
2238                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2239                         clocks = <&l4_per_clkctrl OMAP4_HDQ1W_CLKCTRL 0>;
2240                         clock-names = "fck";
2241                         #address-cells = <1>;
2242                         #size-cells = <1>;
2243                         ranges = <0x0 0xb2000 0x1000>;
2244
2245                         hdqw1w: 1w@0 {
2246                                 compatible = "ti,omap3-1w";
2247                                 reg = <0x0 0x1000>;
2248                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
2249                         };
2250                 };
2251
2252                 target-module@b4000 {                   /* 0x480b4000, ap 67 46.0 */
2253                         compatible = "ti,sysc-omap4", "ti,sysc";
2254                         reg = <0xb4000 0x4>,
2255                               <0xb4010 0x4>;
2256                         reg-names = "rev", "sysc";
2257                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2258                                          SYSC_OMAP4_SOFTRESET)>;
2259                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2260                                         <SYSC_IDLE_NO>,
2261                                         <SYSC_IDLE_SMART>,
2262                                         <SYSC_IDLE_SMART_WKUP>;
2263                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2264                                         <SYSC_IDLE_NO>,
2265                                         <SYSC_IDLE_SMART>,
2266                                         <SYSC_IDLE_SMART_WKUP>;
2267                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2268                         clocks = <&l3_init_clkctrl OMAP4_MMC2_CLKCTRL 0>;
2269                         clock-names = "fck";
2270                         #address-cells = <1>;
2271                         #size-cells = <1>;
2272                         ranges = <0x0 0xb4000 0x1000>;
2273
2274                         mmc2: mmc@0 {
2275                                 compatible = "ti,omap4-hsmmc";
2276                                 reg = <0x0 0x400>;
2277                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2278                                 ti,needs-special-reset;
2279                                 dmas = <&sdma 47>, <&sdma 48>;
2280                                 dma-names = "tx", "rx";
2281                         };
2282                 };
2283
2284                 target-module@b8000 {                   /* 0x480b8000, ap 69 58.0 */
2285                         compatible = "ti,sysc-omap4", "ti,sysc";
2286                         ti,hwmods = "mcspi3";
2287                         reg = <0xb8000 0x4>,
2288                               <0xb8010 0x4>;
2289                         reg-names = "rev", "sysc";
2290                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2291                                          SYSC_OMAP4_SOFTRESET)>;
2292                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2293                                         <SYSC_IDLE_NO>,
2294                                         <SYSC_IDLE_SMART>,
2295                                         <SYSC_IDLE_SMART_WKUP>;
2296                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2297                         clocks = <&l4_per_clkctrl OMAP4_MCSPI3_CLKCTRL 0>;
2298                         clock-names = "fck";
2299                         #address-cells = <1>;
2300                         #size-cells = <1>;
2301                         ranges = <0x0 0xb8000 0x1000>;
2302
2303                         mcspi3: spi@0 {
2304                                 compatible = "ti,omap4-mcspi";
2305                                 reg = <0x0 0x200>;
2306                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2307                                 #address-cells = <1>;
2308                                 #size-cells = <0>;
2309                                 ti,spi-num-cs = <2>;
2310                                 dmas = <&sdma 15>, <&sdma 16>;
2311                                 dma-names = "tx0", "rx0";
2312                         };
2313                 };
2314
2315                 target-module@ba000 {                   /* 0x480ba000, ap 71 32.0 */
2316                         compatible = "ti,sysc-omap4", "ti,sysc";
2317                         ti,hwmods = "mcspi4";
2318                         reg = <0xba000 0x4>,
2319                               <0xba010 0x4>;
2320                         reg-names = "rev", "sysc";
2321                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2322                                          SYSC_OMAP4_SOFTRESET)>;
2323                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2324                                         <SYSC_IDLE_NO>,
2325                                         <SYSC_IDLE_SMART>,
2326                                         <SYSC_IDLE_SMART_WKUP>;
2327                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2328                         clocks = <&l4_per_clkctrl OMAP4_MCSPI4_CLKCTRL 0>;
2329                         clock-names = "fck";
2330                         #address-cells = <1>;
2331                         #size-cells = <1>;
2332                         ranges = <0x0 0xba000 0x1000>;
2333
2334                         mcspi4: spi@0 {
2335                                 compatible = "ti,omap4-mcspi";
2336                                 reg = <0x0 0x200>;
2337                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2338                                 #address-cells = <1>;
2339                                 #size-cells = <0>;
2340                                 ti,spi-num-cs = <1>;
2341                                 dmas = <&sdma 70>, <&sdma 71>;
2342                                 dma-names = "tx0", "rx0";
2343                         };
2344                 };
2345
2346                 target-module@d1000 {                   /* 0x480d1000, ap 73 44.0 */
2347                         compatible = "ti,sysc-omap4", "ti,sysc";
2348                         reg = <0xd1000 0x4>,
2349                               <0xd1010 0x4>;
2350                         reg-names = "rev", "sysc";
2351                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2352                                          SYSC_OMAP4_SOFTRESET)>;
2353                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2354                                         <SYSC_IDLE_NO>,
2355                                         <SYSC_IDLE_SMART>,
2356                                         <SYSC_IDLE_SMART_WKUP>;
2357                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2358                                         <SYSC_IDLE_NO>,
2359                                         <SYSC_IDLE_SMART>,
2360                                         <SYSC_IDLE_SMART_WKUP>;
2361                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2362                         clocks = <&l4_per_clkctrl OMAP4_MMC4_CLKCTRL 0>;
2363                         clock-names = "fck";
2364                         #address-cells = <1>;
2365                         #size-cells = <1>;
2366                         ranges = <0x0 0xd1000 0x1000>;
2367
2368                         mmc4: mmc@0 {
2369                                 compatible = "ti,omap4-hsmmc";
2370                                 reg = <0x0 0x400>;
2371                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2372                                 ti,needs-special-reset;
2373                                 dmas = <&sdma 57>, <&sdma 58>;
2374                                 dma-names = "tx", "rx";
2375                         };
2376                 };
2377
2378                 target-module@d5000 {                   /* 0x480d5000, ap 75 4e.0 */
2379                         compatible = "ti,sysc-omap4", "ti,sysc";
2380                         reg = <0xd5000 0x4>,
2381                               <0xd5010 0x4>;
2382                         reg-names = "rev", "sysc";
2383                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2384                                          SYSC_OMAP4_SOFTRESET)>;
2385                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2386                                         <SYSC_IDLE_NO>,
2387                                         <SYSC_IDLE_SMART>,
2388                                         <SYSC_IDLE_SMART_WKUP>;
2389                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2390                                         <SYSC_IDLE_NO>,
2391                                         <SYSC_IDLE_SMART>,
2392                                         <SYSC_IDLE_SMART_WKUP>;
2393                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2394                         clocks = <&l4_per_clkctrl OMAP4_MMC5_CLKCTRL 0>;
2395                         clock-names = "fck";
2396                         #address-cells = <1>;
2397                         #size-cells = <1>;
2398                         ranges = <0x0 0xd5000 0x1000>;
2399
2400                         mmc5: mmc@0 {
2401                                 compatible = "ti,omap4-hsmmc";
2402                                 reg = <0x0 0x400>;
2403                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2404                                 ti,needs-special-reset;
2405                                 dmas = <&sdma 59>, <&sdma 60>;
2406                                 dma-names = "tx", "rx";
2407                         };
2408                 };
2409         };
2410
2411         segment@200000 {                                        /* 0x48200000 */
2412                 compatible = "simple-bus";
2413                 #address-cells = <1>;
2414                 #size-cells = <1>;
2415                 ranges = <0x00150000 0x00350000 0x001000>,      /* ap 77 */
2416                          <0x00151000 0x00351000 0x001000>;      /* ap 78 */
2417
2418                 target-module@150000 {                  /* 0x48350000, ap 77 4c.0 */
2419                         compatible = "ti,sysc-omap2", "ti,sysc";
2420                         reg = <0x150000 0x8>,
2421                               <0x150010 0x8>,
2422                               <0x150090 0x8>;
2423                         reg-names = "rev", "sysc", "syss";
2424                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2425                                          SYSC_OMAP2_ENAWAKEUP |
2426                                          SYSC_OMAP2_SOFTRESET |
2427                                          SYSC_OMAP2_AUTOIDLE)>;
2428                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2429                                         <SYSC_IDLE_NO>,
2430                                         <SYSC_IDLE_SMART>,
2431                                         <SYSC_IDLE_SMART_WKUP>;
2432                         ti,syss-mask = <1>;
2433                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2434                         clocks = <&l4_per_clkctrl OMAP4_I2C4_CLKCTRL 0>;
2435                         clock-names = "fck";
2436                         #address-cells = <1>;
2437                         #size-cells = <1>;
2438                         ranges = <0x0 0x150000 0x1000>;
2439
2440                         i2c4: i2c@0 {
2441                                 compatible = "ti,omap4-i2c";
2442                                 reg = <0x0 0x100>;
2443                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
2444                                 #address-cells = <1>;
2445                                 #size-cells = <0>;
2446                         };
2447                 };
2448         };
2449 };
2450