arch/arm/boot/dts/r8a7745.dtsi

   1 /*
   2  * Device Tree Source for the r8a7745 SoC
   3  *
   4  * Copyright (C) 2016 Cogent Embedded Inc.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2. This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
  14 #include <dt-bindings/power/r8a7745-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7745";
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         cpus {
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 cpu0: cpu@0 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a7";
  28                         reg = <0>;
  29                         clock-frequency = <1000000000>;
  30                         clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
  31                         power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
  32                         next-level-cache = <&L2_CA7>;
  33                 };
  34
  35                 L2_CA7: cache-controller@0 {
  36                         compatible = "cache";
  37                         reg = <0>;
  38                         cache-unified;
  39                         cache-level = <2>;
  40                         power-domains = <&sysc R8A7745_PD_CA7_SCU>;
  41                 };
  42         };
  43
  44         soc {
  45                 compatible = "simple-bus";
  46                 interrupt-parent = <&gic>;
  47
  48                 #address-cells = <2>;
  49                 #size-cells = <2>;
  50                 ranges;
  51
  52                 gic: interrupt-controller@f1001000 {
  53                         compatible = "arm,gic-400";
  54                         #interrupt-cells = <3>;
  55                         #address-cells = <0>;
  56                         interrupt-controller;
  57                         reg = <0 0xf1001000 0 0x1000>,
  58                               <0 0xf1002000 0 0x1000>,
  59                               <0 0xf1004000 0 0x2000>,
  60                               <0 0xf1006000 0 0x2000>;
  61                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
  62                                                  IRQ_TYPE_LEVEL_HIGH)>;
  63                 };
  64
  65                 irqc: interrupt-controller@e61c0000 {
  66                         compatible = "renesas,irqc-r8a7745", "renesas,irqc";
  67                         #interrupt-cells = <2>;
  68                         interrupt-controller;
  69                         reg = <0 0xe61c0000 0 0x200>;
  70                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
  71                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
  72                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  73                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
  74                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
  75                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
  76                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
  77                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
  78                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
  79                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
  80                         clocks = <&cpg CPG_MOD 407>;
  81                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
  82                 };
  83
  84                 timer {
  85                         compatible = "arm,armv7-timer";
  86                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
  87                                                   IRQ_TYPE_LEVEL_LOW)>,
  88                                      <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
  89                                                   IRQ_TYPE_LEVEL_LOW)>,
  90                                      <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
  91                                                   IRQ_TYPE_LEVEL_LOW)>,
  92                                      <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
  93                                                   IRQ_TYPE_LEVEL_LOW)>;
  94                 };
  95
  96                 cpg: clock-controller@e6150000 {
  97                         compatible = "renesas,r8a7745-cpg-mssr";
  98                         reg = <0 0xe6150000 0 0x1000>;
  99                         clocks = <&extal_clk>, <&usb_extal_clk>;
 100                         clock-names = "extal", "usb_extal";
 101                         #clock-cells = <2>;
 102                         #power-domain-cells = <0>;
 103                 };
 104
 105                 prr: chipid@ff000044 {
 106                         compatible = "renesas,prr";
 107                         reg = <0 0xff000044 0 4>;
 108                 };
 109
 110                 rst: reset-controller@e6160000 {
 111                         compatible = "renesas,r8a7745-rst";
 112                         reg = <0 0xe6160000 0 0x100>;
 113                 };
 114
 115                 sysc: system-controller@e6180000 {
 116                         compatible = "renesas,r8a7745-sysc";
 117                         reg = <0 0xe6180000 0 0x200>;
 118                         #power-domain-cells = <1>;
 119                 };
 120
 121                 dmac0: dma-controller@e6700000 {
 122                         compatible = "renesas,dmac-r8a7745",
 123                                      "renesas,rcar-dmac";
 124                         reg = <0 0xe6700000 0 0x20000>;
 125                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 126                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 127                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 128                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 129                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 130                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 131                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 132                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 133                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 134                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 135                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 136                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 137                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 138                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 139                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 140                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 141                         interrupt-names = "error",
 142                                         "ch0", "ch1", "ch2", "ch3",
 143                                         "ch4", "ch5", "ch6", "ch7",
 144                                         "ch8", "ch9", "ch10", "ch11",
 145                                         "ch12", "ch13", "ch14";
 146                         clocks = <&cpg CPG_MOD 219>;
 147                         clock-names = "fck";
 148                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 149                         #dma-cells = <1>;
 150                         dma-channels = <15>;
 151                 };
 152
 153                 dmac1: dma-controller@e6720000 {
 154                         compatible = "renesas,dmac-r8a7745",
 155                                      "renesas,rcar-dmac";
 156                         reg = <0 0xe6720000 0 0x20000>;
 157                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 158                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 159                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 160                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 161                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 162                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 163                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 164                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 165                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 166                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 167                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 168                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 169                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 170                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 171                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 172                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 173                         interrupt-names = "error",
 174                                         "ch0", "ch1", "ch2", "ch3",
 175                                         "ch4", "ch5", "ch6", "ch7",
 176                                         "ch8", "ch9", "ch10", "ch11",
 177                                         "ch12", "ch13", "ch14";
 178                         clocks = <&cpg CPG_MOD 218>;
 179                         clock-names = "fck";
 180                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 181                         #dma-cells = <1>;
 182                         dma-channels = <15>;
 183                 };
 184
 185                 scifa0: serial@e6c40000 {
 186                         compatible = "renesas,scifa-r8a7745",
 187                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 188                         reg = <0 0xe6c40000 0 0x40>;
 189                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 190                         clocks = <&cpg CPG_MOD 204>;
 191                         clock-names = "fck";
 192                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 193                                <&dmac1 0x21>, <&dmac1 0x22>;
 194                         dma-names = "tx", "rx", "tx", "rx";
 195                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 196                         status = "disabled";
 197                 };
 198
 199                 scifa1: serial@e6c50000 {
 200                         compatible = "renesas,scifa-r8a7745",
 201                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 202                         reg = <0 0xe6c50000 0 0x40>;
 203                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 204                         clocks = <&cpg CPG_MOD 203>;
 205                         clock-names = "fck";
 206                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 207                                <&dmac1 0x25>, <&dmac1 0x26>;
 208                         dma-names = "tx", "rx", "tx", "rx";
 209                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 210                         status = "disabled";
 211                 };
 212
 213                 scifa2: serial@e6c60000 {
 214                         compatible = "renesas,scifa-r8a7745",
 215                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 216                         reg = <0 0xe6c60000 0 0x40>;
 217                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 218                         clocks = <&cpg CPG_MOD 202>;
 219                         clock-names = "fck";
 220                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 221                                <&dmac1 0x27>, <&dmac1 0x28>;
 222                         dma-names = "tx", "rx", "tx", "rx";
 223                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 224                         status = "disabled";
 225                 };
 226
 227                 scifa3: serial@e6c70000 {
 228                         compatible = "renesas,scifa-r8a7745",
 229                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 230                         reg = <0 0xe6c70000 0 0x40>;
 231                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 232                         clocks = <&cpg CPG_MOD 1106>;
 233                         clock-names = "fck";
 234                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 235                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 236                         dma-names = "tx", "rx", "tx", "rx";
 237                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 238                         status = "disabled";
 239                 };
 240
 241                 scifa4: serial@e6c78000 {
 242                         compatible = "renesas,scifa-r8a7745",
 243                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 244                         reg = <0 0xe6c78000 0 0x40>;
 245                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 246                         clocks = <&cpg CPG_MOD 1107>;
 247                         clock-names = "fck";
 248                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 249                                <&dmac1 0x1f>, <&dmac1 0x20>;
 250                         dma-names = "tx", "rx", "tx", "rx";
 251                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 252                         status = "disabled";
 253                 };
 254
 255                 scifa5: serial@e6c80000 {
 256                         compatible = "renesas,scifa-r8a7745",
 257                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 258                         reg = <0 0xe6c80000 0 0x40>;
 259                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 260                         clocks = <&cpg CPG_MOD 1108>;
 261                         clock-names = "fck";
 262                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 263                                <&dmac1 0x23>, <&dmac1 0x24>;
 264                         dma-names = "tx", "rx", "tx", "rx";
 265                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 266                         status = "disabled";
 267                 };
 268
 269                 scifb0: serial@e6c20000 {
 270                         compatible = "renesas,scifb-r8a7745",
 271                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 272                         reg = <0 0xe6c20000 0 0x100>;
 273                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 274                         clocks = <&cpg CPG_MOD 206>;
 275                         clock-names = "fck";
 276                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 277                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 278                         dma-names = "tx", "rx", "tx", "rx";
 279                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 280                         status = "disabled";
 281                 };
 282
 283                 scifb1: serial@e6c30000 {
 284                         compatible = "renesas,scifb-r8a7745",
 285                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 286                         reg = <0 0xe6c30000 0 0x100>;
 287                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 288                         clocks = <&cpg CPG_MOD 207>;
 289                         clock-names = "fck";
 290                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 291                                <&dmac1 0x19>, <&dmac1 0x1a>;
 292                         dma-names = "tx", "rx", "tx", "rx";
 293                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 294                         status = "disabled";
 295                 };
 296
 297                 scifb2: serial@e6ce0000 {
 298                         compatible = "renesas,scifb-r8a7745",
 299                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 300                         reg = <0 0xe6ce0000 0 0x100>;
 301                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 302                         clocks = <&cpg CPG_MOD 216>;
 303                         clock-names = "fck";
 304                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 305                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 306                         dma-names = "tx", "rx", "tx", "rx";
 307                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 308                         status = "disabled";
 309                 };
 310
 311                 scif0: serial@e6e60000 {
 312                         compatible = "renesas,scif-r8a7745",
 313                                      "renesas,rcar-gen2-scif", "renesas,scif";
 314                         reg = <0 0xe6e60000 0 0x40>;
 315                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 316                         clocks = <&cpg CPG_MOD 721>,
 317                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 318                         clock-names = "fck", "brg_int", "scif_clk";
 319                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 320                                <&dmac1 0x29>, <&dmac1 0x2a>;
 321                         dma-names = "tx", "rx", "tx", "rx";
 322                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 323                         status = "disabled";
 324                 };
 325
 326                 scif1: serial@e6e68000 {
 327                         compatible = "renesas,scif-r8a7745",
 328                                      "renesas,rcar-gen2-scif", "renesas,scif";
 329                         reg = <0 0xe6e68000 0 0x40>;
 330                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 331                         clocks = <&cpg CPG_MOD 720>,
 332                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 333                         clock-names = "fck", "brg_int", "scif_clk";
 334                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 335                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 336                         dma-names = "tx", "rx", "tx", "rx";
 337                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 338                         status = "disabled";
 339                 };
 340
 341                 scif2: serial@e6e58000 {
 342                         compatible = "renesas,scif-r8a7745",
 343                                      "renesas,rcar-gen2-scif", "renesas,scif";
 344                         reg = <0 0xe6e58000 0 0x40>;
 345                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 346                         clocks = <&cpg CPG_MOD 719>,
 347                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 348                         clock-names = "fck", "brg_int", "scif_clk";
 349                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 350                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 351                         dma-names = "tx", "rx", "tx", "rx";
 352                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 353                         status = "disabled";
 354                 };
 355
 356                 scif3: serial@e6ea8000 {
 357                         compatible = "renesas,scif-r8a7745",
 358                                      "renesas,rcar-gen2-scif", "renesas,scif";
 359                         reg = <0 0xe6ea8000 0 0x40>;
 360                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 361                         clocks = <&cpg CPG_MOD 718>,
 362                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 363                         clock-names = "fck", "brg_int", "scif_clk";
 364                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 365                                <&dmac1 0x2f>, <&dmac1 0x30>;
 366                         dma-names = "tx", "rx", "tx", "rx";
 367                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 368                         status = "disabled";
 369                 };
 370
 371                 scif4: serial@e6ee0000 {
 372                         compatible = "renesas,scif-r8a7745",
 373                                      "renesas,rcar-gen2-scif", "renesas,scif";
 374                         reg = <0 0xe6ee0000 0 0x40>;
 375                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 376                         clocks = <&cpg CPG_MOD 715>,
 377                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 378                         clock-names = "fck", "brg_int", "scif_clk";
 379                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 380                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 381                         dma-names = "tx", "rx", "tx", "rx";
 382                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 383                         status = "disabled";
 384                 };
 385
 386                 scif5: serial@e6ee8000 {
 387                         compatible = "renesas,scif-r8a7745",
 388                                      "renesas,rcar-gen2-scif", "renesas,scif";
 389                         reg = <0 0xe6ee8000 0 0x40>;
 390                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 391                         clocks = <&cpg CPG_MOD 714>,
 392                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 393                         clock-names = "fck", "brg_int", "scif_clk";
 394                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 395                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 396                         dma-names = "tx", "rx", "tx", "rx";
 397                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 398                         status = "disabled";
 399                 };
 400
 401                 hscif0: serial@e62c0000 {
 402                         compatible = "renesas,hscif-r8a7745",
 403                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 404                         reg = <0 0xe62c0000 0 0x60>;
 405                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 406                         clocks = <&cpg CPG_MOD 717>,
 407                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 408                         clock-names = "fck", "brg_int", "scif_clk";
 409                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 410                                <&dmac1 0x39>, <&dmac1 0x3a>;
 411                         dma-names = "tx", "rx", "tx", "rx";
 412                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 413                         status = "disabled";
 414                 };
 415
 416                 hscif1: serial@e62c8000 {
 417                         compatible = "renesas,hscif-r8a7745",
 418                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 419                         reg = <0 0xe62c8000 0 0x60>;
 420                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 421                         clocks = <&cpg CPG_MOD 716>,
 422                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 423                         clock-names = "fck", "brg_int", "scif_clk";
 424                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 425                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 426                         dma-names = "tx", "rx", "tx", "rx";
 427                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 428                         status = "disabled";
 429                 };
 430
 431                 hscif2: serial@e62d0000 {
 432                         compatible = "renesas,hscif-r8a7745",
 433                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 434                         reg = <0 0xe62d0000 0 0x60>;
 435                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 436                         clocks = <&cpg CPG_MOD 713>,
 437                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 438                         clock-names = "fck", "brg_int", "scif_clk";
 439                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 440                                <&dmac1 0x3b>, <&dmac1 0x3c>;
 441                         dma-names = "tx", "rx", "tx", "rx";
 442                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 443                         status = "disabled";
 444                 };
 445
 446                 ether: ethernet@ee700000 {
 447                         compatible = "renesas,ether-r8a7745";
 448                         reg = <0 0xee700000 0 0x400>;
 449                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 450                         clocks = <&cpg CPG_MOD 813>;
 451                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 452                         phy-mode = "rmii";
 453                         #address-cells = <1>;
 454                         #size-cells = <0>;
 455                         status = "disabled";
 456                 };
 457         };
 458
 459         /* External root clock */
 460         extal_clk: extal {
 461                 compatible = "fixed-clock";
 462                 #clock-cells = <0>;
 463                 /* This value must be overridden by the board. */
 464                 clock-frequency = <0>;
 465         };
 466
 467         /* External USB clock - can be overridden by the board */
 468         usb_extal_clk: usb_extal {
 469                 compatible = "fixed-clock";
 470                 #clock-cells = <0>;
 471                 clock-frequency = <48000000>;
 472         };
 473
 474         /* External SCIF clock */
 475         scif_clk: scif {
 476                 compatible = "fixed-clock";
 477                 #clock-cells = <0>;
 478                 /* This value must be overridden by the board. */
 479                 clock-frequency = <0>;
 480         };
 481 };