2 * Copyright 2015 Vishnu Patekar
4 * Vishnu Patekar <vishnupatekar0510@gmail.com>
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-r-ccu.h>
49 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
52 interrupt-parent = <&gic>;
67 compatible = "arm,cortex-a7";
73 compatible = "arm,cortex-a7";
79 compatible = "arm,cortex-a7";
85 compatible = "arm,cortex-a7";
91 compatible = "arm,cortex-a7";
97 compatible = "arm,cortex-a7";
103 compatible = "arm,cortex-a7";
109 compatible = "arm,cortex-a7";
116 compatible = "arm,armv7-timer";
117 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
118 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
119 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
120 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
124 #address-cells = <1>;
128 /* TODO: PRCM block has a mux for this. */
131 compatible = "fixed-clock";
132 clock-frequency = <24000000>;
133 clock-accuracy = <50000>;
134 clock-output-names = "osc24M";
138 * This is called "internal OSC" in some places.
139 * It is an internal RC-based oscillator.
140 * TODO: Its controls are in the PRCM block.
144 compatible = "fixed-clock";
145 clock-frequency = <16000000>;
146 clock-output-names = "osc16M";
149 osc16Md512: osc16Md512_clk {
151 compatible = "fixed-factor-clock";
155 clock-output-names = "osc16M-d512";
160 reg = <0x40000000 0x80000000>;
161 device_type = "memory";
165 compatible = "simple-bus";
166 #address-cells = <1>;
170 syscon: syscon@1c00000 {
171 compatible = "allwinner,sun8i-a83t-system-controller",
173 reg = <0x01c00000 0x1000>;
176 dma: dma-controller@1c02000 {
177 compatible = "allwinner,sun8i-a83t-dma";
178 reg = <0x01c02000 0x1000>;
179 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
180 clocks = <&ccu CLK_BUS_DMA>;
181 resets = <&ccu RST_BUS_DMA>;
186 compatible = "allwinner,sun8i-a83t-ccu";
187 reg = <0x01c20000 0x400>;
188 clocks = <&osc24M>, <&osc16Md512>;
189 clock-names = "hosc", "losc";
194 pio: pinctrl@1c20800 {
195 compatible = "allwinner,sun8i-a83t-pinctrl";
196 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
197 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
198 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
199 reg = <0x01c20800 0x400>;
200 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc16Md512>;
201 clock-names = "apb", "hosc", "losc";
203 interrupt-controller;
204 #interrupt-cells = <3>;
207 mmc0_pins: mmc0-pins {
208 pins = "PF0", "PF1", "PF2",
211 drive-strength = <30>;
215 spdif_tx_pin: spdif-tx-pin {
220 uart0_pb_pins: uart0-pb-pins {
221 pins = "PB9", "PB10";
225 uart0_pf_pins: uart0-pf-pins {
232 compatible = "allwinner,sun4i-a10-timer";
233 reg = <0x01c20c00 0xa0>;
234 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
235 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
240 compatible = "allwinner,sun6i-a31-wdt";
241 reg = <0x01c20ca0 0x20>;
242 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
246 spdif: spdif@1c21000 {
247 #sound-dai-cells = <0>;
248 compatible = "allwinner,sun8i-a83t-spdif",
249 "allwinner,sun8i-h3-spdif";
250 reg = <0x01c21000 0x400>;
251 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
252 clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
253 resets = <&ccu RST_BUS_SPDIF>;
254 clock-names = "apb", "spdif";
257 pinctrl-names = "default";
258 pinctrl-0 = <&spdif_tx_pin>;
262 uart0: serial@01c28000 {
263 compatible = "snps,dw-apb-uart";
264 reg = <0x01c28000 0x400>;
265 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
268 clocks = <&ccu CLK_BUS_UART0>;
269 resets = <&ccu RST_BUS_UART0>;
273 gic: interrupt-controller@1c81000 {
274 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
275 reg = <0x01c81000 0x1000>,
279 interrupt-controller;
280 #interrupt-cells = <3>;
281 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
284 r_ccu: clock@1f01400 {
285 compatible = "allwinner,sun8i-a83t-r-ccu";
286 reg = <0x01f01400 0x400>;
287 clocks = <&osc24M>, <&osc16Md512>, <&osc16M>,
289 clock-names = "hosc", "losc", "iosc", "pll-periph";
294 r_pio: pinctrl@1f02c00 {
295 compatible = "allwinner,sun8i-a83t-r-pinctrl";
296 reg = <0x01f02c00 0x400>;
297 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
298 clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>,
300 clock-names = "apb", "hosc", "losc";
303 interrupt-controller;
304 #interrupt-cells = <3>;