1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mm/dma-mapping.c
5 * Copyright (C) 2000-2004 Russell King
7 * DMA uncached mapping support.
9 #include <linux/module.h>
11 #include <linux/genalloc.h>
12 #include <linux/gfp.h>
13 #include <linux/errno.h>
14 #include <linux/list.h>
15 #include <linux/init.h>
16 #include <linux/device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/dma-contiguous.h>
19 #include <linux/highmem.h>
20 #include <linux/memblock.h>
21 #include <linux/slab.h>
22 #include <linux/iommu.h>
24 #include <linux/vmalloc.h>
25 #include <linux/sizes.h>
26 #include <linux/cma.h>
28 #include <asm/memory.h>
29 #include <asm/highmem.h>
30 #include <asm/cacheflush.h>
31 #include <asm/tlbflush.h>
32 #include <asm/mach/arch.h>
33 #include <asm/dma-iommu.h>
34 #include <asm/mach/map.h>
35 #include <asm/system_info.h>
36 #include <asm/dma-contiguous.h>
41 struct arm_dma_alloc_args {
51 struct arm_dma_free_args {
62 struct arm_dma_allocator {
63 void *(*alloc)(struct arm_dma_alloc_args *args,
64 struct page **ret_page);
65 void (*free)(struct arm_dma_free_args *args);
68 struct arm_dma_buffer {
69 struct list_head list;
71 struct arm_dma_allocator *allocator;
74 static LIST_HEAD(arm_dma_bufs);
75 static DEFINE_SPINLOCK(arm_dma_bufs_lock);
77 static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
79 struct arm_dma_buffer *buf, *found = NULL;
82 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
83 list_for_each_entry(buf, &arm_dma_bufs, list) {
84 if (buf->virt == virt) {
90 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
95 * The DMA API is built upon the notion of "buffer ownership". A buffer
96 * is either exclusively owned by the CPU (and therefore may be accessed
97 * by it) or exclusively owned by the DMA device. These helper functions
98 * represent the transitions between these two ownership states.
100 * Note, however, that on later ARMs, this notion does not work due to
101 * speculative prefetches. We model our approach on the assumption that
102 * the CPU does do speculative prefetches, which means we clean caches
103 * before transfers and delay cache invalidation until transfer completion.
106 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
107 size_t, enum dma_data_direction);
108 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
109 size_t, enum dma_data_direction);
112 * arm_dma_map_page - map a portion of a page for streaming DMA
113 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
114 * @page: page that buffer resides in
115 * @offset: offset into page for start of buffer
116 * @size: size of buffer to map
117 * @dir: DMA transfer direction
119 * Ensure that any data held in the cache is appropriately discarded
122 * The device owns this memory once this call has completed. The CPU
123 * can regain ownership by calling dma_unmap_page().
125 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
126 unsigned long offset, size_t size, enum dma_data_direction dir,
129 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
130 __dma_page_cpu_to_dev(page, offset, size, dir);
131 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
134 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
135 unsigned long offset, size_t size, enum dma_data_direction dir,
138 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
142 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
143 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
144 * @handle: DMA address of buffer
145 * @size: size of buffer (same as passed to dma_map_page)
146 * @dir: DMA transfer direction (same as passed to dma_map_page)
148 * Unmap a page streaming mode DMA translation. The handle and size
149 * must match what was provided in the previous dma_map_page() call.
150 * All other usages are undefined.
152 * After this call, reads by the CPU to the buffer are guaranteed to see
153 * whatever the device wrote there.
155 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
156 size_t size, enum dma_data_direction dir, unsigned long attrs)
158 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
159 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
160 handle & ~PAGE_MASK, size, dir);
163 static void arm_dma_sync_single_for_cpu(struct device *dev,
164 dma_addr_t handle, size_t size, enum dma_data_direction dir)
166 unsigned int offset = handle & (PAGE_SIZE - 1);
167 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
168 __dma_page_dev_to_cpu(page, offset, size, dir);
171 static void arm_dma_sync_single_for_device(struct device *dev,
172 dma_addr_t handle, size_t size, enum dma_data_direction dir)
174 unsigned int offset = handle & (PAGE_SIZE - 1);
175 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
176 __dma_page_cpu_to_dev(page, offset, size, dir);
179 const struct dma_map_ops arm_dma_ops = {
180 .alloc = arm_dma_alloc,
181 .free = arm_dma_free,
182 .mmap = arm_dma_mmap,
183 .get_sgtable = arm_dma_get_sgtable,
184 .map_page = arm_dma_map_page,
185 .unmap_page = arm_dma_unmap_page,
186 .map_sg = arm_dma_map_sg,
187 .unmap_sg = arm_dma_unmap_sg,
188 .map_resource = dma_direct_map_resource,
189 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
190 .sync_single_for_device = arm_dma_sync_single_for_device,
191 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
192 .sync_sg_for_device = arm_dma_sync_sg_for_device,
193 .dma_supported = arm_dma_supported,
195 EXPORT_SYMBOL(arm_dma_ops);
197 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
198 dma_addr_t *handle, gfp_t gfp, unsigned long attrs);
199 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
200 dma_addr_t handle, unsigned long attrs);
201 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
202 void *cpu_addr, dma_addr_t dma_addr, size_t size,
203 unsigned long attrs);
205 const struct dma_map_ops arm_coherent_dma_ops = {
206 .alloc = arm_coherent_dma_alloc,
207 .free = arm_coherent_dma_free,
208 .mmap = arm_coherent_dma_mmap,
209 .get_sgtable = arm_dma_get_sgtable,
210 .map_page = arm_coherent_dma_map_page,
211 .map_sg = arm_dma_map_sg,
212 .map_resource = dma_direct_map_resource,
213 .dma_supported = arm_dma_supported,
215 EXPORT_SYMBOL(arm_coherent_dma_ops);
217 static int __dma_supported(struct device *dev, u64 mask, bool warn)
219 unsigned long max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
222 * Translate the device's DMA mask to a PFN limit. This
223 * PFN number includes the page which we can DMA to.
225 if (dma_to_pfn(dev, mask) < max_dma_pfn) {
227 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
229 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
237 static u64 get_coherent_dma_mask(struct device *dev)
239 u64 mask = (u64)DMA_BIT_MASK(32);
242 mask = dev->coherent_dma_mask;
245 * Sanity check the DMA mask - it must be non-zero, and
246 * must be able to be satisfied by a DMA allocation.
249 dev_warn(dev, "coherent DMA mask is unset\n");
253 if (!__dma_supported(dev, mask, true))
260 static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
263 * Ensure that the allocated pages are zeroed, and that any data
264 * lurking in the kernel direct-mapped region is invalidated.
266 if (PageHighMem(page)) {
267 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
268 phys_addr_t end = base + size;
270 void *ptr = kmap_atomic(page);
271 memset(ptr, 0, PAGE_SIZE);
272 if (coherent_flag != COHERENT)
273 dmac_flush_range(ptr, ptr + PAGE_SIZE);
278 if (coherent_flag != COHERENT)
279 outer_flush_range(base, end);
281 void *ptr = page_address(page);
282 memset(ptr, 0, size);
283 if (coherent_flag != COHERENT) {
284 dmac_flush_range(ptr, ptr + size);
285 outer_flush_range(__pa(ptr), __pa(ptr) + size);
291 * Allocate a DMA buffer for 'dev' of size 'size' using the
292 * specified gfp mask. Note that 'size' must be page aligned.
294 static struct page *__dma_alloc_buffer(struct device *dev, size_t size,
295 gfp_t gfp, int coherent_flag)
297 unsigned long order = get_order(size);
298 struct page *page, *p, *e;
300 page = alloc_pages(gfp, order);
305 * Now split the huge page and free the excess pages
307 split_page(page, order);
308 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
311 __dma_clear_buffer(page, size, coherent_flag);
317 * Free a DMA buffer. 'size' must be page aligned.
319 static void __dma_free_buffer(struct page *page, size_t size)
321 struct page *e = page + (size >> PAGE_SHIFT);
329 static void *__alloc_from_contiguous(struct device *dev, size_t size,
330 pgprot_t prot, struct page **ret_page,
331 const void *caller, bool want_vaddr,
332 int coherent_flag, gfp_t gfp);
334 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
335 pgprot_t prot, struct page **ret_page,
336 const void *caller, bool want_vaddr);
339 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
343 * DMA allocation can be mapped to user space, so lets
344 * set VM_USERMAP flags too.
346 return dma_common_contiguous_remap(page, size,
347 VM_ARM_DMA_CONSISTENT | VM_USERMAP,
351 static void __dma_free_remap(void *cpu_addr, size_t size)
353 dma_common_free_remap(cpu_addr, size,
354 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
357 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
358 static struct gen_pool *atomic_pool __ro_after_init;
360 static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
362 static int __init early_coherent_pool(char *p)
364 atomic_pool_size = memparse(p, &p);
367 early_param("coherent_pool", early_coherent_pool);
370 * Initialise the coherent pool for atomic allocations.
372 static int __init atomic_pool_init(void)
374 pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
375 gfp_t gfp = GFP_KERNEL | GFP_DMA;
379 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
383 * The atomic pool is only used for non-coherent allocations
384 * so we must pass NORMAL for coherent_flag.
386 if (dev_get_cma_area(NULL))
387 ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
388 &page, atomic_pool_init, true, NORMAL,
391 ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
392 &page, atomic_pool_init, true);
396 ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
398 atomic_pool_size, -1);
400 goto destroy_genpool;
402 gen_pool_set_algo(atomic_pool,
403 gen_pool_first_fit_order_align,
405 pr_info("DMA: preallocated %zu KiB pool for atomic coherent allocations\n",
406 atomic_pool_size / 1024);
411 gen_pool_destroy(atomic_pool);
414 pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
415 atomic_pool_size / 1024);
419 * CMA is activated by core_initcall, so we must be called after it.
421 postcore_initcall(atomic_pool_init);
423 struct dma_contig_early_reserve {
428 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
430 static int dma_mmu_remap_num __initdata;
432 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
434 dma_mmu_remap[dma_mmu_remap_num].base = base;
435 dma_mmu_remap[dma_mmu_remap_num].size = size;
439 void __init dma_contiguous_remap(void)
442 for (i = 0; i < dma_mmu_remap_num; i++) {
443 phys_addr_t start = dma_mmu_remap[i].base;
444 phys_addr_t end = start + dma_mmu_remap[i].size;
448 if (end > arm_lowmem_limit)
449 end = arm_lowmem_limit;
453 map.pfn = __phys_to_pfn(start);
454 map.virtual = __phys_to_virt(start);
455 map.length = end - start;
456 map.type = MT_MEMORY_DMA_READY;
459 * Clear previous low-memory mapping to ensure that the
460 * TLB does not see any conflicting entries, then flush
461 * the TLB of the old entries before creating new mappings.
463 * This ensures that any speculatively loaded TLB entries
464 * (even though they may be rare) can not cause any problems,
465 * and ensures that this code is architecturally compliant.
467 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
469 pmd_clear(pmd_off_k(addr));
471 flush_tlb_kernel_range(__phys_to_virt(start),
472 __phys_to_virt(end));
474 iotable_init(&map, 1);
478 static int __dma_update_pte(pte_t *pte, unsigned long addr, void *data)
480 struct page *page = virt_to_page(addr);
481 pgprot_t prot = *(pgprot_t *)data;
483 set_pte_ext(pte, mk_pte(page, prot), 0);
487 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
489 unsigned long start = (unsigned long) page_address(page);
490 unsigned end = start + size;
492 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
493 flush_tlb_kernel_range(start, end);
496 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
497 pgprot_t prot, struct page **ret_page,
498 const void *caller, bool want_vaddr)
503 * __alloc_remap_buffer is only called when the device is
506 page = __dma_alloc_buffer(dev, size, gfp, NORMAL);
512 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
514 __dma_free_buffer(page, size);
523 static void *__alloc_from_pool(size_t size, struct page **ret_page)
529 WARN(1, "coherent pool not initialised!\n");
533 val = gen_pool_alloc(atomic_pool, size);
535 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
537 *ret_page = phys_to_page(phys);
544 static bool __in_atomic_pool(void *start, size_t size)
546 return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
549 static int __free_from_pool(void *start, size_t size)
551 if (!__in_atomic_pool(start, size))
554 gen_pool_free(atomic_pool, (unsigned long)start, size);
559 static void *__alloc_from_contiguous(struct device *dev, size_t size,
560 pgprot_t prot, struct page **ret_page,
561 const void *caller, bool want_vaddr,
562 int coherent_flag, gfp_t gfp)
564 unsigned long order = get_order(size);
565 size_t count = size >> PAGE_SHIFT;
569 page = dma_alloc_from_contiguous(dev, count, order, gfp & __GFP_NOWARN);
573 __dma_clear_buffer(page, size, coherent_flag);
578 if (PageHighMem(page)) {
579 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
581 dma_release_from_contiguous(dev, page, count);
585 __dma_remap(page, size, prot);
586 ptr = page_address(page);
594 static void __free_from_contiguous(struct device *dev, struct page *page,
595 void *cpu_addr, size_t size, bool want_vaddr)
598 if (PageHighMem(page))
599 __dma_free_remap(cpu_addr, size);
601 __dma_remap(page, size, PAGE_KERNEL);
603 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
606 static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
608 prot = (attrs & DMA_ATTR_WRITE_COMBINE) ?
609 pgprot_writecombine(prot) :
610 pgprot_dmacoherent(prot);
614 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
615 struct page **ret_page)
618 /* __alloc_simple_buffer is only called when the device is coherent */
619 page = __dma_alloc_buffer(dev, size, gfp, COHERENT);
624 return page_address(page);
627 static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
628 struct page **ret_page)
630 return __alloc_simple_buffer(args->dev, args->size, args->gfp,
634 static void simple_allocator_free(struct arm_dma_free_args *args)
636 __dma_free_buffer(args->page, args->size);
639 static struct arm_dma_allocator simple_allocator = {
640 .alloc = simple_allocator_alloc,
641 .free = simple_allocator_free,
644 static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
645 struct page **ret_page)
647 return __alloc_from_contiguous(args->dev, args->size, args->prot,
648 ret_page, args->caller,
649 args->want_vaddr, args->coherent_flag,
653 static void cma_allocator_free(struct arm_dma_free_args *args)
655 __free_from_contiguous(args->dev, args->page, args->cpu_addr,
656 args->size, args->want_vaddr);
659 static struct arm_dma_allocator cma_allocator = {
660 .alloc = cma_allocator_alloc,
661 .free = cma_allocator_free,
664 static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
665 struct page **ret_page)
667 return __alloc_from_pool(args->size, ret_page);
670 static void pool_allocator_free(struct arm_dma_free_args *args)
672 __free_from_pool(args->cpu_addr, args->size);
675 static struct arm_dma_allocator pool_allocator = {
676 .alloc = pool_allocator_alloc,
677 .free = pool_allocator_free,
680 static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
681 struct page **ret_page)
683 return __alloc_remap_buffer(args->dev, args->size, args->gfp,
684 args->prot, ret_page, args->caller,
688 static void remap_allocator_free(struct arm_dma_free_args *args)
690 if (args->want_vaddr)
691 __dma_free_remap(args->cpu_addr, args->size);
693 __dma_free_buffer(args->page, args->size);
696 static struct arm_dma_allocator remap_allocator = {
697 .alloc = remap_allocator_alloc,
698 .free = remap_allocator_free,
701 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
702 gfp_t gfp, pgprot_t prot, bool is_coherent,
703 unsigned long attrs, const void *caller)
705 u64 mask = get_coherent_dma_mask(dev);
706 struct page *page = NULL;
708 bool allowblock, cma;
709 struct arm_dma_buffer *buf;
710 struct arm_dma_alloc_args args = {
712 .size = PAGE_ALIGN(size),
716 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
717 .coherent_flag = is_coherent ? COHERENT : NORMAL,
720 #ifdef CONFIG_DMA_API_DEBUG
721 u64 limit = (mask + 1) & ~mask;
722 if (limit && size >= limit) {
723 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
732 buf = kzalloc(sizeof(*buf),
733 gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
737 if (mask < 0xffffffffULL)
741 * Following is a work-around (a.k.a. hack) to prevent pages
742 * with __GFP_COMP being passed to split_page() which cannot
743 * handle them. The real problem is that this flag probably
744 * should be 0 on ARM as it is not supported on this
745 * platform; see CONFIG_HUGETLBFS.
747 gfp &= ~(__GFP_COMP);
750 *handle = DMA_MAPPING_ERROR;
751 allowblock = gfpflags_allow_blocking(gfp);
752 cma = allowblock ? dev_get_cma_area(dev) : false;
755 buf->allocator = &cma_allocator;
756 else if (is_coherent)
757 buf->allocator = &simple_allocator;
759 buf->allocator = &remap_allocator;
761 buf->allocator = &pool_allocator;
763 addr = buf->allocator->alloc(&args, &page);
768 *handle = pfn_to_dma(dev, page_to_pfn(page));
769 buf->virt = args.want_vaddr ? addr : page;
771 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
772 list_add(&buf->list, &arm_dma_bufs);
773 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
778 return args.want_vaddr ? addr : page;
782 * Allocate DMA-coherent memory space and return both the kernel remapped
783 * virtual and bus address for that space.
785 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
786 gfp_t gfp, unsigned long attrs)
788 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
790 return __dma_alloc(dev, size, handle, gfp, prot, false,
791 attrs, __builtin_return_address(0));
794 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
795 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
797 return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
798 attrs, __builtin_return_address(0));
801 static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
802 void *cpu_addr, dma_addr_t dma_addr, size_t size,
806 unsigned long nr_vma_pages = vma_pages(vma);
807 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
808 unsigned long pfn = dma_to_pfn(dev, dma_addr);
809 unsigned long off = vma->vm_pgoff;
811 if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
814 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
815 ret = remap_pfn_range(vma, vma->vm_start,
817 vma->vm_end - vma->vm_start,
825 * Create userspace mapping for the DMA-coherent memory.
827 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
828 void *cpu_addr, dma_addr_t dma_addr, size_t size,
831 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
834 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
835 void *cpu_addr, dma_addr_t dma_addr, size_t size,
838 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
839 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
843 * Free a buffer as defined by the above mapping.
845 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
846 dma_addr_t handle, unsigned long attrs,
849 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
850 struct arm_dma_buffer *buf;
851 struct arm_dma_free_args args = {
853 .size = PAGE_ALIGN(size),
854 .cpu_addr = cpu_addr,
856 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
859 buf = arm_dma_buffer_find(cpu_addr);
860 if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
863 buf->allocator->free(&args);
867 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
868 dma_addr_t handle, unsigned long attrs)
870 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
873 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
874 dma_addr_t handle, unsigned long attrs)
876 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
880 * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
881 * that the intention is to allow exporting memory allocated via the
882 * coherent DMA APIs through the dma_buf API, which only accepts a
883 * scattertable. This presents a couple of problems:
884 * 1. Not all memory allocated via the coherent DMA APIs is backed by
886 * 2. Passing coherent DMA memory into the streaming APIs is not allowed
887 * as we will try to flush the memory through a different alias to that
888 * actually being used (and the flushes are redundant.)
890 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
891 void *cpu_addr, dma_addr_t handle, size_t size,
894 unsigned long pfn = dma_to_pfn(dev, handle);
898 /* If the PFN is not valid, we do not have a struct page */
902 page = pfn_to_page(pfn);
904 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
908 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
912 static void dma_cache_maint_page(struct page *page, unsigned long offset,
913 size_t size, enum dma_data_direction dir,
914 void (*op)(const void *, size_t, int))
919 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
923 * A single sg entry may refer to multiple physically contiguous
924 * pages. But we still need to process highmem pages individually.
925 * If highmem is not configured then the bulk of this loop gets
932 page = pfn_to_page(pfn);
934 if (PageHighMem(page)) {
935 if (len + offset > PAGE_SIZE)
936 len = PAGE_SIZE - offset;
938 if (cache_is_vipt_nonaliasing()) {
939 vaddr = kmap_atomic(page);
940 op(vaddr + offset, len, dir);
941 kunmap_atomic(vaddr);
943 vaddr = kmap_high_get(page);
945 op(vaddr + offset, len, dir);
950 vaddr = page_address(page) + offset;
960 * Make an area consistent for devices.
961 * Note: Drivers should NOT use this function directly, as it will break
962 * platforms with CONFIG_DMABOUNCE.
963 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
965 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
966 size_t size, enum dma_data_direction dir)
970 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
972 paddr = page_to_phys(page) + off;
973 if (dir == DMA_FROM_DEVICE) {
974 outer_inv_range(paddr, paddr + size);
976 outer_clean_range(paddr, paddr + size);
978 /* FIXME: non-speculating: flush on bidirectional mappings? */
981 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
982 size_t size, enum dma_data_direction dir)
984 phys_addr_t paddr = page_to_phys(page) + off;
986 /* FIXME: non-speculating: not required */
987 /* in any case, don't bother invalidating if DMA to device */
988 if (dir != DMA_TO_DEVICE) {
989 outer_inv_range(paddr, paddr + size);
991 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
995 * Mark the D-cache clean for these pages to avoid extra flushing.
997 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
1001 pfn = page_to_pfn(page) + off / PAGE_SIZE;
1005 left -= PAGE_SIZE - off;
1007 while (left >= PAGE_SIZE) {
1008 page = pfn_to_page(pfn++);
1009 set_bit(PG_dcache_clean, &page->flags);
1016 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
1017 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1018 * @sg: list of buffers
1019 * @nents: number of buffers to map
1020 * @dir: DMA transfer direction
1022 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1023 * This is the scatter-gather version of the dma_map_single interface.
1024 * Here the scatter gather list elements are each tagged with the
1025 * appropriate dma address and length. They are obtained via
1026 * sg_dma_{address,length}.
1028 * Device ownership issues as mentioned for dma_map_single are the same
1031 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1032 enum dma_data_direction dir, unsigned long attrs)
1034 const struct dma_map_ops *ops = get_dma_ops(dev);
1035 struct scatterlist *s;
1038 for_each_sg(sg, s, nents, i) {
1039 #ifdef CONFIG_NEED_SG_DMA_LENGTH
1040 s->dma_length = s->length;
1042 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
1043 s->length, dir, attrs);
1044 if (dma_mapping_error(dev, s->dma_address))
1050 for_each_sg(sg, s, i, j)
1051 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1056 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1057 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1058 * @sg: list of buffers
1059 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1060 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1062 * Unmap a set of streaming mode DMA translations. Again, CPU access
1063 * rules concerning calls here are the same as for dma_unmap_single().
1065 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1066 enum dma_data_direction dir, unsigned long attrs)
1068 const struct dma_map_ops *ops = get_dma_ops(dev);
1069 struct scatterlist *s;
1073 for_each_sg(sg, s, nents, i)
1074 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1078 * arm_dma_sync_sg_for_cpu
1079 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1080 * @sg: list of buffers
1081 * @nents: number of buffers to map (returned from dma_map_sg)
1082 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1084 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1085 int nents, enum dma_data_direction dir)
1087 const struct dma_map_ops *ops = get_dma_ops(dev);
1088 struct scatterlist *s;
1091 for_each_sg(sg, s, nents, i)
1092 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
1097 * arm_dma_sync_sg_for_device
1098 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1099 * @sg: list of buffers
1100 * @nents: number of buffers to map (returned from dma_map_sg)
1101 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1103 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1104 int nents, enum dma_data_direction dir)
1106 const struct dma_map_ops *ops = get_dma_ops(dev);
1107 struct scatterlist *s;
1110 for_each_sg(sg, s, nents, i)
1111 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1116 * Return whether the given device DMA address mask can be supported
1117 * properly. For example, if your device can only drive the low 24-bits
1118 * during bus mastering, then you would pass 0x00ffffff as the mask
1121 int arm_dma_supported(struct device *dev, u64 mask)
1123 return __dma_supported(dev, mask, false);
1126 static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
1128 return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
1131 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1133 static int __dma_info_to_prot(enum dma_data_direction dir, unsigned long attrs)
1137 if (attrs & DMA_ATTR_PRIVILEGED)
1141 case DMA_BIDIRECTIONAL:
1142 return prot | IOMMU_READ | IOMMU_WRITE;
1144 return prot | IOMMU_READ;
1145 case DMA_FROM_DEVICE:
1146 return prot | IOMMU_WRITE;
1154 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
1156 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1159 unsigned int order = get_order(size);
1160 unsigned int align = 0;
1161 unsigned int count, start;
1162 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1163 unsigned long flags;
1167 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1168 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1170 count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1171 align = (1 << order) - 1;
1173 spin_lock_irqsave(&mapping->lock, flags);
1174 for (i = 0; i < mapping->nr_bitmaps; i++) {
1175 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1176 mapping->bits, 0, count, align);
1178 if (start > mapping->bits)
1181 bitmap_set(mapping->bitmaps[i], start, count);
1186 * No unused range found. Try to extend the existing mapping
1187 * and perform a second attempt to reserve an IO virtual
1188 * address range of size bytes.
1190 if (i == mapping->nr_bitmaps) {
1191 if (extend_iommu_mapping(mapping)) {
1192 spin_unlock_irqrestore(&mapping->lock, flags);
1193 return DMA_MAPPING_ERROR;
1196 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1197 mapping->bits, 0, count, align);
1199 if (start > mapping->bits) {
1200 spin_unlock_irqrestore(&mapping->lock, flags);
1201 return DMA_MAPPING_ERROR;
1204 bitmap_set(mapping->bitmaps[i], start, count);
1206 spin_unlock_irqrestore(&mapping->lock, flags);
1208 iova = mapping->base + (mapping_size * i);
1209 iova += start << PAGE_SHIFT;
1214 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1215 dma_addr_t addr, size_t size)
1217 unsigned int start, count;
1218 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1219 unsigned long flags;
1220 dma_addr_t bitmap_base;
1226 bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1227 BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
1229 bitmap_base = mapping->base + mapping_size * bitmap_index;
1231 start = (addr - bitmap_base) >> PAGE_SHIFT;
1233 if (addr + size > bitmap_base + mapping_size) {
1235 * The address range to be freed reaches into the iova
1236 * range of the next bitmap. This should not happen as
1237 * we don't allow this in __alloc_iova (at the
1242 count = size >> PAGE_SHIFT;
1244 spin_lock_irqsave(&mapping->lock, flags);
1245 bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1246 spin_unlock_irqrestore(&mapping->lock, flags);
1249 /* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
1250 static const int iommu_order_array[] = { 9, 8, 4, 0 };
1252 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1253 gfp_t gfp, unsigned long attrs,
1256 struct page **pages;
1257 int count = size >> PAGE_SHIFT;
1258 int array_size = count * sizeof(struct page *);
1262 if (array_size <= PAGE_SIZE)
1263 pages = kzalloc(array_size, GFP_KERNEL);
1265 pages = vzalloc(array_size);
1269 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS)
1271 unsigned long order = get_order(size);
1274 page = dma_alloc_from_contiguous(dev, count, order,
1275 gfp & __GFP_NOWARN);
1279 __dma_clear_buffer(page, size, coherent_flag);
1281 for (i = 0; i < count; i++)
1282 pages[i] = page + i;
1287 /* Go straight to 4K chunks if caller says it's OK. */
1288 if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
1289 order_idx = ARRAY_SIZE(iommu_order_array) - 1;
1292 * IOMMU can map any pages, so himem can also be used here
1294 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1299 order = iommu_order_array[order_idx];
1301 /* Drop down when we get small */
1302 if (__fls(count) < order) {
1308 /* See if it's easy to allocate a high-order chunk */
1309 pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
1311 /* Go down a notch at first sign of pressure */
1317 pages[i] = alloc_pages(gfp, 0);
1323 split_page(pages[i], order);
1326 pages[i + j] = pages[i] + j;
1329 __dma_clear_buffer(pages[i], PAGE_SIZE << order, coherent_flag);
1331 count -= 1 << order;
1338 __free_pages(pages[i], 0);
1343 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1344 size_t size, unsigned long attrs)
1346 int count = size >> PAGE_SHIFT;
1349 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
1350 dma_release_from_contiguous(dev, pages[0], count);
1352 for (i = 0; i < count; i++)
1354 __free_pages(pages[i], 0);
1362 * Create a CPU mapping for a specified pages
1365 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1368 return dma_common_pages_remap(pages, size,
1369 VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1373 * Create a mapping in device IO address space for specified pages
1376 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
1377 unsigned long attrs)
1379 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1380 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1381 dma_addr_t dma_addr, iova;
1384 dma_addr = __alloc_iova(mapping, size);
1385 if (dma_addr == DMA_MAPPING_ERROR)
1389 for (i = 0; i < count; ) {
1392 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1393 phys_addr_t phys = page_to_phys(pages[i]);
1394 unsigned int len, j;
1396 for (j = i + 1; j < count; j++, next_pfn++)
1397 if (page_to_pfn(pages[j]) != next_pfn)
1400 len = (j - i) << PAGE_SHIFT;
1401 ret = iommu_map(mapping->domain, iova, phys, len,
1402 __dma_info_to_prot(DMA_BIDIRECTIONAL, attrs));
1410 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1411 __free_iova(mapping, dma_addr, size);
1412 return DMA_MAPPING_ERROR;
1415 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1417 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1420 * add optional in-page offset from iova to size and align
1421 * result to page size
1423 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1426 iommu_unmap(mapping->domain, iova, size);
1427 __free_iova(mapping, iova, size);
1431 static struct page **__atomic_get_pages(void *addr)
1436 phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1437 page = phys_to_page(phys);
1439 return (struct page **)page;
1442 static struct page **__iommu_get_pages(void *cpu_addr, unsigned long attrs)
1444 struct vm_struct *area;
1446 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1447 return __atomic_get_pages(cpu_addr);
1449 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1452 area = find_vm_area(cpu_addr);
1453 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1458 static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
1459 dma_addr_t *handle, int coherent_flag,
1460 unsigned long attrs)
1465 if (coherent_flag == COHERENT)
1466 addr = __alloc_simple_buffer(dev, size, gfp, &page);
1468 addr = __alloc_from_pool(size, &page);
1472 *handle = __iommu_create_mapping(dev, &page, size, attrs);
1473 if (*handle == DMA_MAPPING_ERROR)
1479 __free_from_pool(addr, size);
1483 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1484 dma_addr_t handle, size_t size, int coherent_flag)
1486 __iommu_remove_mapping(dev, handle, size);
1487 if (coherent_flag == COHERENT)
1488 __dma_free_buffer(virt_to_page(cpu_addr), size);
1490 __free_from_pool(cpu_addr, size);
1493 static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
1494 dma_addr_t *handle, gfp_t gfp, unsigned long attrs,
1497 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1498 struct page **pages;
1501 *handle = DMA_MAPPING_ERROR;
1502 size = PAGE_ALIGN(size);
1504 if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp))
1505 return __iommu_alloc_simple(dev, size, gfp, handle,
1506 coherent_flag, attrs);
1509 * Following is a work-around (a.k.a. hack) to prevent pages
1510 * with __GFP_COMP being passed to split_page() which cannot
1511 * handle them. The real problem is that this flag probably
1512 * should be 0 on ARM as it is not supported on this
1513 * platform; see CONFIG_HUGETLBFS.
1515 gfp &= ~(__GFP_COMP);
1517 pages = __iommu_alloc_buffer(dev, size, gfp, attrs, coherent_flag);
1521 *handle = __iommu_create_mapping(dev, pages, size, attrs);
1522 if (*handle == DMA_MAPPING_ERROR)
1525 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1528 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1529 __builtin_return_address(0));
1536 __iommu_remove_mapping(dev, *handle, size);
1538 __iommu_free_buffer(dev, pages, size, attrs);
1542 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1543 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1545 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, NORMAL);
1548 static void *arm_coherent_iommu_alloc_attrs(struct device *dev, size_t size,
1549 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1551 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, COHERENT);
1554 static int __arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1555 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1556 unsigned long attrs)
1558 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1559 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1565 if (vma->vm_pgoff >= nr_pages)
1568 err = vm_map_pages(vma, pages, nr_pages);
1570 pr_err("Remapping memory failed: %d\n", err);
1574 static int arm_iommu_mmap_attrs(struct device *dev,
1575 struct vm_area_struct *vma, void *cpu_addr,
1576 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1578 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1580 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1583 static int arm_coherent_iommu_mmap_attrs(struct device *dev,
1584 struct vm_area_struct *vma, void *cpu_addr,
1585 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1587 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1591 * free a page as defined by the above mapping.
1592 * Must not be called with IRQs disabled.
1594 void __arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1595 dma_addr_t handle, unsigned long attrs, int coherent_flag)
1597 struct page **pages;
1598 size = PAGE_ALIGN(size);
1600 if (coherent_flag == COHERENT || __in_atomic_pool(cpu_addr, size)) {
1601 __iommu_free_atomic(dev, cpu_addr, handle, size, coherent_flag);
1605 pages = __iommu_get_pages(cpu_addr, attrs);
1607 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1611 if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0) {
1612 dma_common_free_remap(cpu_addr, size,
1613 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1616 __iommu_remove_mapping(dev, handle, size);
1617 __iommu_free_buffer(dev, pages, size, attrs);
1620 void arm_iommu_free_attrs(struct device *dev, size_t size,
1621 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1623 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, NORMAL);
1626 void arm_coherent_iommu_free_attrs(struct device *dev, size_t size,
1627 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1629 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, COHERENT);
1632 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1633 void *cpu_addr, dma_addr_t dma_addr,
1634 size_t size, unsigned long attrs)
1636 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1637 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1642 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1647 * Map a part of the scatter-gather list into contiguous io address space
1649 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1650 size_t size, dma_addr_t *handle,
1651 enum dma_data_direction dir, unsigned long attrs,
1654 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1655 dma_addr_t iova, iova_base;
1658 struct scatterlist *s;
1661 size = PAGE_ALIGN(size);
1662 *handle = DMA_MAPPING_ERROR;
1664 iova_base = iova = __alloc_iova(mapping, size);
1665 if (iova == DMA_MAPPING_ERROR)
1668 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1669 phys_addr_t phys = page_to_phys(sg_page(s));
1670 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1672 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1673 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1675 prot = __dma_info_to_prot(dir, attrs);
1677 ret = iommu_map(mapping->domain, iova, phys, len, prot);
1680 count += len >> PAGE_SHIFT;
1683 *handle = iova_base;
1687 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1688 __free_iova(mapping, iova_base, size);
1692 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1693 enum dma_data_direction dir, unsigned long attrs,
1696 struct scatterlist *s = sg, *dma = sg, *start = sg;
1698 unsigned int offset = s->offset;
1699 unsigned int size = s->offset + s->length;
1700 unsigned int max = dma_get_max_seg_size(dev);
1702 for (i = 1; i < nents; i++) {
1705 s->dma_address = DMA_MAPPING_ERROR;
1708 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1709 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1710 dir, attrs, is_coherent) < 0)
1713 dma->dma_address += offset;
1714 dma->dma_length = size - offset;
1716 size = offset = s->offset;
1723 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1727 dma->dma_address += offset;
1728 dma->dma_length = size - offset;
1733 for_each_sg(sg, s, count, i)
1734 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1739 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1740 * @dev: valid struct device pointer
1741 * @sg: list of buffers
1742 * @nents: number of buffers to map
1743 * @dir: DMA transfer direction
1745 * Map a set of i/o coherent buffers described by scatterlist in streaming
1746 * mode for DMA. The scatter gather list elements are merged together (if
1747 * possible) and tagged with the appropriate dma address and length. They are
1748 * obtained via sg_dma_{address,length}.
1750 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1751 int nents, enum dma_data_direction dir, unsigned long attrs)
1753 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1757 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1758 * @dev: valid struct device pointer
1759 * @sg: list of buffers
1760 * @nents: number of buffers to map
1761 * @dir: DMA transfer direction
1763 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1764 * The scatter gather list elements are merged together (if possible) and
1765 * tagged with the appropriate dma address and length. They are obtained via
1766 * sg_dma_{address,length}.
1768 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1769 int nents, enum dma_data_direction dir, unsigned long attrs)
1771 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1774 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1775 int nents, enum dma_data_direction dir,
1776 unsigned long attrs, bool is_coherent)
1778 struct scatterlist *s;
1781 for_each_sg(sg, s, nents, i) {
1783 __iommu_remove_mapping(dev, sg_dma_address(s),
1785 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1786 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1792 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1793 * @dev: valid struct device pointer
1794 * @sg: list of buffers
1795 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1796 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1798 * Unmap a set of streaming mode DMA translations. Again, CPU access
1799 * rules concerning calls here are the same as for dma_unmap_single().
1801 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1802 int nents, enum dma_data_direction dir,
1803 unsigned long attrs)
1805 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1809 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1810 * @dev: valid struct device pointer
1811 * @sg: list of buffers
1812 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1813 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1815 * Unmap a set of streaming mode DMA translations. Again, CPU access
1816 * rules concerning calls here are the same as for dma_unmap_single().
1818 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1819 enum dma_data_direction dir,
1820 unsigned long attrs)
1822 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1826 * arm_iommu_sync_sg_for_cpu
1827 * @dev: valid struct device pointer
1828 * @sg: list of buffers
1829 * @nents: number of buffers to map (returned from dma_map_sg)
1830 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1832 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1833 int nents, enum dma_data_direction dir)
1835 struct scatterlist *s;
1838 for_each_sg(sg, s, nents, i)
1839 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1844 * arm_iommu_sync_sg_for_device
1845 * @dev: valid struct device pointer
1846 * @sg: list of buffers
1847 * @nents: number of buffers to map (returned from dma_map_sg)
1848 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1850 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1851 int nents, enum dma_data_direction dir)
1853 struct scatterlist *s;
1856 for_each_sg(sg, s, nents, i)
1857 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1862 * arm_coherent_iommu_map_page
1863 * @dev: valid struct device pointer
1864 * @page: page that buffer resides in
1865 * @offset: offset into page for start of buffer
1866 * @size: size of buffer to map
1867 * @dir: DMA transfer direction
1869 * Coherent IOMMU aware version of arm_dma_map_page()
1871 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1872 unsigned long offset, size_t size, enum dma_data_direction dir,
1873 unsigned long attrs)
1875 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1876 dma_addr_t dma_addr;
1877 int ret, prot, len = PAGE_ALIGN(size + offset);
1879 dma_addr = __alloc_iova(mapping, len);
1880 if (dma_addr == DMA_MAPPING_ERROR)
1883 prot = __dma_info_to_prot(dir, attrs);
1885 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1889 return dma_addr + offset;
1891 __free_iova(mapping, dma_addr, len);
1892 return DMA_MAPPING_ERROR;
1896 * arm_iommu_map_page
1897 * @dev: valid struct device pointer
1898 * @page: page that buffer resides in
1899 * @offset: offset into page for start of buffer
1900 * @size: size of buffer to map
1901 * @dir: DMA transfer direction
1903 * IOMMU aware version of arm_dma_map_page()
1905 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1906 unsigned long offset, size_t size, enum dma_data_direction dir,
1907 unsigned long attrs)
1909 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1910 __dma_page_cpu_to_dev(page, offset, size, dir);
1912 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1916 * arm_coherent_iommu_unmap_page
1917 * @dev: valid struct device pointer
1918 * @handle: DMA address of buffer
1919 * @size: size of buffer (same as passed to dma_map_page)
1920 * @dir: DMA transfer direction (same as passed to dma_map_page)
1922 * Coherent IOMMU aware version of arm_dma_unmap_page()
1924 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1925 size_t size, enum dma_data_direction dir, unsigned long attrs)
1927 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1928 dma_addr_t iova = handle & PAGE_MASK;
1929 int offset = handle & ~PAGE_MASK;
1930 int len = PAGE_ALIGN(size + offset);
1935 iommu_unmap(mapping->domain, iova, len);
1936 __free_iova(mapping, iova, len);
1940 * arm_iommu_unmap_page
1941 * @dev: valid struct device pointer
1942 * @handle: DMA address of buffer
1943 * @size: size of buffer (same as passed to dma_map_page)
1944 * @dir: DMA transfer direction (same as passed to dma_map_page)
1946 * IOMMU aware version of arm_dma_unmap_page()
1948 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1949 size_t size, enum dma_data_direction dir, unsigned long attrs)
1951 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1952 dma_addr_t iova = handle & PAGE_MASK;
1953 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1954 int offset = handle & ~PAGE_MASK;
1955 int len = PAGE_ALIGN(size + offset);
1960 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1961 __dma_page_dev_to_cpu(page, offset, size, dir);
1963 iommu_unmap(mapping->domain, iova, len);
1964 __free_iova(mapping, iova, len);
1968 * arm_iommu_map_resource - map a device resource for DMA
1969 * @dev: valid struct device pointer
1970 * @phys_addr: physical address of resource
1971 * @size: size of resource to map
1972 * @dir: DMA transfer direction
1974 static dma_addr_t arm_iommu_map_resource(struct device *dev,
1975 phys_addr_t phys_addr, size_t size,
1976 enum dma_data_direction dir, unsigned long attrs)
1978 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1979 dma_addr_t dma_addr;
1981 phys_addr_t addr = phys_addr & PAGE_MASK;
1982 unsigned int offset = phys_addr & ~PAGE_MASK;
1983 size_t len = PAGE_ALIGN(size + offset);
1985 dma_addr = __alloc_iova(mapping, len);
1986 if (dma_addr == DMA_MAPPING_ERROR)
1989 prot = __dma_info_to_prot(dir, attrs) | IOMMU_MMIO;
1991 ret = iommu_map(mapping->domain, dma_addr, addr, len, prot);
1995 return dma_addr + offset;
1997 __free_iova(mapping, dma_addr, len);
1998 return DMA_MAPPING_ERROR;
2002 * arm_iommu_unmap_resource - unmap a device DMA resource
2003 * @dev: valid struct device pointer
2004 * @dma_handle: DMA address to resource
2005 * @size: size of resource to map
2006 * @dir: DMA transfer direction
2008 static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
2009 size_t size, enum dma_data_direction dir,
2010 unsigned long attrs)
2012 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2013 dma_addr_t iova = dma_handle & PAGE_MASK;
2014 unsigned int offset = dma_handle & ~PAGE_MASK;
2015 size_t len = PAGE_ALIGN(size + offset);
2020 iommu_unmap(mapping->domain, iova, len);
2021 __free_iova(mapping, iova, len);
2024 static void arm_iommu_sync_single_for_cpu(struct device *dev,
2025 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2027 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2028 dma_addr_t iova = handle & PAGE_MASK;
2029 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2030 unsigned int offset = handle & ~PAGE_MASK;
2035 __dma_page_dev_to_cpu(page, offset, size, dir);
2038 static void arm_iommu_sync_single_for_device(struct device *dev,
2039 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2041 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2042 dma_addr_t iova = handle & PAGE_MASK;
2043 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2044 unsigned int offset = handle & ~PAGE_MASK;
2049 __dma_page_cpu_to_dev(page, offset, size, dir);
2052 const struct dma_map_ops iommu_ops = {
2053 .alloc = arm_iommu_alloc_attrs,
2054 .free = arm_iommu_free_attrs,
2055 .mmap = arm_iommu_mmap_attrs,
2056 .get_sgtable = arm_iommu_get_sgtable,
2058 .map_page = arm_iommu_map_page,
2059 .unmap_page = arm_iommu_unmap_page,
2060 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
2061 .sync_single_for_device = arm_iommu_sync_single_for_device,
2063 .map_sg = arm_iommu_map_sg,
2064 .unmap_sg = arm_iommu_unmap_sg,
2065 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
2066 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
2068 .map_resource = arm_iommu_map_resource,
2069 .unmap_resource = arm_iommu_unmap_resource,
2071 .dma_supported = arm_dma_supported,
2074 const struct dma_map_ops iommu_coherent_ops = {
2075 .alloc = arm_coherent_iommu_alloc_attrs,
2076 .free = arm_coherent_iommu_free_attrs,
2077 .mmap = arm_coherent_iommu_mmap_attrs,
2078 .get_sgtable = arm_iommu_get_sgtable,
2080 .map_page = arm_coherent_iommu_map_page,
2081 .unmap_page = arm_coherent_iommu_unmap_page,
2083 .map_sg = arm_coherent_iommu_map_sg,
2084 .unmap_sg = arm_coherent_iommu_unmap_sg,
2086 .map_resource = arm_iommu_map_resource,
2087 .unmap_resource = arm_iommu_unmap_resource,
2089 .dma_supported = arm_dma_supported,
2093 * arm_iommu_create_mapping
2094 * @bus: pointer to the bus holding the client device (for IOMMU calls)
2095 * @base: start address of the valid IO address space
2096 * @size: maximum size of the valid IO address space
2098 * Creates a mapping structure which holds information about used/unused
2099 * IO address ranges, which is required to perform memory allocation and
2100 * mapping with IOMMU aware functions.
2102 * The client device need to be attached to the mapping with
2103 * arm_iommu_attach_device function.
2105 struct dma_iommu_mapping *
2106 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
2108 unsigned int bits = size >> PAGE_SHIFT;
2109 unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
2110 struct dma_iommu_mapping *mapping;
2114 /* currently only 32-bit DMA address space is supported */
2115 if (size > DMA_BIT_MASK(32) + 1)
2116 return ERR_PTR(-ERANGE);
2119 return ERR_PTR(-EINVAL);
2121 if (bitmap_size > PAGE_SIZE) {
2122 extensions = bitmap_size / PAGE_SIZE;
2123 bitmap_size = PAGE_SIZE;
2126 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
2130 mapping->bitmap_size = bitmap_size;
2131 mapping->bitmaps = kcalloc(extensions, sizeof(unsigned long *),
2133 if (!mapping->bitmaps)
2136 mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
2137 if (!mapping->bitmaps[0])
2140 mapping->nr_bitmaps = 1;
2141 mapping->extensions = extensions;
2142 mapping->base = base;
2143 mapping->bits = BITS_PER_BYTE * bitmap_size;
2145 spin_lock_init(&mapping->lock);
2147 mapping->domain = iommu_domain_alloc(bus);
2148 if (!mapping->domain)
2151 kref_init(&mapping->kref);
2154 kfree(mapping->bitmaps[0]);
2156 kfree(mapping->bitmaps);
2160 return ERR_PTR(err);
2162 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
2164 static void release_iommu_mapping(struct kref *kref)
2167 struct dma_iommu_mapping *mapping =
2168 container_of(kref, struct dma_iommu_mapping, kref);
2170 iommu_domain_free(mapping->domain);
2171 for (i = 0; i < mapping->nr_bitmaps; i++)
2172 kfree(mapping->bitmaps[i]);
2173 kfree(mapping->bitmaps);
2177 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
2181 if (mapping->nr_bitmaps >= mapping->extensions)
2184 next_bitmap = mapping->nr_bitmaps;
2185 mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
2187 if (!mapping->bitmaps[next_bitmap])
2190 mapping->nr_bitmaps++;
2195 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
2198 kref_put(&mapping->kref, release_iommu_mapping);
2200 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2202 static int __arm_iommu_attach_device(struct device *dev,
2203 struct dma_iommu_mapping *mapping)
2207 err = iommu_attach_device(mapping->domain, dev);
2211 kref_get(&mapping->kref);
2212 to_dma_iommu_mapping(dev) = mapping;
2214 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
2219 * arm_iommu_attach_device
2220 * @dev: valid struct device pointer
2221 * @mapping: io address space mapping structure (returned from
2222 * arm_iommu_create_mapping)
2224 * Attaches specified io address space mapping to the provided device.
2225 * This replaces the dma operations (dma_map_ops pointer) with the
2226 * IOMMU aware version.
2228 * More than one client might be attached to the same io address space
2231 int arm_iommu_attach_device(struct device *dev,
2232 struct dma_iommu_mapping *mapping)
2236 err = __arm_iommu_attach_device(dev, mapping);
2240 set_dma_ops(dev, &iommu_ops);
2243 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2246 * arm_iommu_detach_device
2247 * @dev: valid struct device pointer
2249 * Detaches the provided device from a previously attached map.
2250 * This overwrites the dma_ops pointer with appropriate non-IOMMU ops.
2252 void arm_iommu_detach_device(struct device *dev)
2254 struct dma_iommu_mapping *mapping;
2256 mapping = to_dma_iommu_mapping(dev);
2258 dev_warn(dev, "Not attached\n");
2262 iommu_detach_device(mapping->domain, dev);
2263 kref_put(&mapping->kref, release_iommu_mapping);
2264 to_dma_iommu_mapping(dev) = NULL;
2265 set_dma_ops(dev, arm_get_dma_map_ops(dev->archdata.dma_coherent));
2267 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
2269 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2271 static const struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
2273 return coherent ? &iommu_coherent_ops : &iommu_ops;
2276 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2277 const struct iommu_ops *iommu)
2279 struct dma_iommu_mapping *mapping;
2284 mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
2285 if (IS_ERR(mapping)) {
2286 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2287 size, dev_name(dev));
2291 if (__arm_iommu_attach_device(dev, mapping)) {
2292 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2294 arm_iommu_release_mapping(mapping);
2301 static void arm_teardown_iommu_dma_ops(struct device *dev)
2303 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2308 arm_iommu_detach_device(dev);
2309 arm_iommu_release_mapping(mapping);
2314 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2315 const struct iommu_ops *iommu)
2320 static void arm_teardown_iommu_dma_ops(struct device *dev) { }
2322 #define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2324 #endif /* CONFIG_ARM_DMA_USE_IOMMU */
2326 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2327 const struct iommu_ops *iommu, bool coherent)
2329 const struct dma_map_ops *dma_ops;
2331 dev->archdata.dma_coherent = coherent;
2334 * Don't override the dma_ops if they have already been set. Ideally
2335 * this should be the only location where dma_ops are set, remove this
2336 * check when all other callers of set_dma_ops will have disappeared.
2341 if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
2342 dma_ops = arm_get_iommu_dma_map_ops(coherent);
2344 dma_ops = arm_get_dma_map_ops(coherent);
2346 set_dma_ops(dev, dma_ops);
2349 if (xen_initial_domain()) {
2350 dev->archdata.dev_dma_ops = dev->dma_ops;
2351 dev->dma_ops = xen_dma_ops;
2354 dev->archdata.dma_ops_setup = true;
2357 void arch_teardown_dma_ops(struct device *dev)
2359 if (!dev->archdata.dma_ops_setup)
2362 arm_teardown_iommu_dma_ops(dev);
2363 /* Let arch_setup_dma_ops() start again from scratch upon re-probe */
2364 set_dma_ops(dev, NULL);