2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/bootmem.h>
13 #include <linux/module.h>
15 #include <linux/genalloc.h>
16 #include <linux/gfp.h>
17 #include <linux/errno.h>
18 #include <linux/list.h>
19 #include <linux/init.h>
20 #include <linux/device.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/dma-contiguous.h>
23 #include <linux/highmem.h>
24 #include <linux/memblock.h>
25 #include <linux/slab.h>
26 #include <linux/iommu.h>
28 #include <linux/vmalloc.h>
29 #include <linux/sizes.h>
30 #include <linux/cma.h>
32 #include <asm/memory.h>
33 #include <asm/highmem.h>
34 #include <asm/cacheflush.h>
35 #include <asm/tlbflush.h>
36 #include <asm/mach/arch.h>
37 #include <asm/dma-iommu.h>
38 #include <asm/mach/map.h>
39 #include <asm/system_info.h>
40 #include <asm/dma-contiguous.h>
45 struct arm_dma_alloc_args {
55 struct arm_dma_free_args {
66 struct arm_dma_allocator {
67 void *(*alloc)(struct arm_dma_alloc_args *args,
68 struct page **ret_page);
69 void (*free)(struct arm_dma_free_args *args);
72 struct arm_dma_buffer {
73 struct list_head list;
75 struct arm_dma_allocator *allocator;
78 static LIST_HEAD(arm_dma_bufs);
79 static DEFINE_SPINLOCK(arm_dma_bufs_lock);
81 static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
83 struct arm_dma_buffer *buf, *found = NULL;
86 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
87 list_for_each_entry(buf, &arm_dma_bufs, list) {
88 if (buf->virt == virt) {
94 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
99 * The DMA API is built upon the notion of "buffer ownership". A buffer
100 * is either exclusively owned by the CPU (and therefore may be accessed
101 * by it) or exclusively owned by the DMA device. These helper functions
102 * represent the transitions between these two ownership states.
104 * Note, however, that on later ARMs, this notion does not work due to
105 * speculative prefetches. We model our approach on the assumption that
106 * the CPU does do speculative prefetches, which means we clean caches
107 * before transfers and delay cache invalidation until transfer completion.
110 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
111 size_t, enum dma_data_direction);
112 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
113 size_t, enum dma_data_direction);
116 * arm_dma_map_page - map a portion of a page for streaming DMA
117 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
118 * @page: page that buffer resides in
119 * @offset: offset into page for start of buffer
120 * @size: size of buffer to map
121 * @dir: DMA transfer direction
123 * Ensure that any data held in the cache is appropriately discarded
126 * The device owns this memory once this call has completed. The CPU
127 * can regain ownership by calling dma_unmap_page().
129 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
130 unsigned long offset, size_t size, enum dma_data_direction dir,
133 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
134 __dma_page_cpu_to_dev(page, offset, size, dir);
135 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
138 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
139 unsigned long offset, size_t size, enum dma_data_direction dir,
142 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
146 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
147 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
148 * @handle: DMA address of buffer
149 * @size: size of buffer (same as passed to dma_map_page)
150 * @dir: DMA transfer direction (same as passed to dma_map_page)
152 * Unmap a page streaming mode DMA translation. The handle and size
153 * must match what was provided in the previous dma_map_page() call.
154 * All other usages are undefined.
156 * After this call, reads by the CPU to the buffer are guaranteed to see
157 * whatever the device wrote there.
159 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
160 size_t size, enum dma_data_direction dir, unsigned long attrs)
162 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
163 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
164 handle & ~PAGE_MASK, size, dir);
167 static void arm_dma_sync_single_for_cpu(struct device *dev,
168 dma_addr_t handle, size_t size, enum dma_data_direction dir)
170 unsigned int offset = handle & (PAGE_SIZE - 1);
171 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
172 __dma_page_dev_to_cpu(page, offset, size, dir);
175 static void arm_dma_sync_single_for_device(struct device *dev,
176 dma_addr_t handle, size_t size, enum dma_data_direction dir)
178 unsigned int offset = handle & (PAGE_SIZE - 1);
179 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
180 __dma_page_cpu_to_dev(page, offset, size, dir);
183 static int arm_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
185 return dma_addr == ARM_MAPPING_ERROR;
188 const struct dma_map_ops arm_dma_ops = {
189 .alloc = arm_dma_alloc,
190 .free = arm_dma_free,
191 .mmap = arm_dma_mmap,
192 .get_sgtable = arm_dma_get_sgtable,
193 .map_page = arm_dma_map_page,
194 .unmap_page = arm_dma_unmap_page,
195 .map_sg = arm_dma_map_sg,
196 .unmap_sg = arm_dma_unmap_sg,
197 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
198 .sync_single_for_device = arm_dma_sync_single_for_device,
199 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
200 .sync_sg_for_device = arm_dma_sync_sg_for_device,
201 .mapping_error = arm_dma_mapping_error,
202 .dma_supported = arm_dma_supported,
204 EXPORT_SYMBOL(arm_dma_ops);
206 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
207 dma_addr_t *handle, gfp_t gfp, unsigned long attrs);
208 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
209 dma_addr_t handle, unsigned long attrs);
210 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
211 void *cpu_addr, dma_addr_t dma_addr, size_t size,
212 unsigned long attrs);
214 const struct dma_map_ops arm_coherent_dma_ops = {
215 .alloc = arm_coherent_dma_alloc,
216 .free = arm_coherent_dma_free,
217 .mmap = arm_coherent_dma_mmap,
218 .get_sgtable = arm_dma_get_sgtable,
219 .map_page = arm_coherent_dma_map_page,
220 .map_sg = arm_dma_map_sg,
221 .mapping_error = arm_dma_mapping_error,
222 .dma_supported = arm_dma_supported,
224 EXPORT_SYMBOL(arm_coherent_dma_ops);
226 static int __dma_supported(struct device *dev, u64 mask, bool warn)
228 unsigned long max_dma_pfn;
231 * If the mask allows for more memory than we can address,
232 * and we actually have that much memory, then we must
233 * indicate that DMA to this device is not supported.
235 if (sizeof(mask) != sizeof(dma_addr_t) &&
236 mask > (dma_addr_t)~0 &&
237 dma_to_pfn(dev, ~0) < max_pfn - 1) {
239 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
241 dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
246 max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
249 * Translate the device's DMA mask to a PFN limit. This
250 * PFN number includes the page which we can DMA to.
252 if (dma_to_pfn(dev, mask) < max_dma_pfn) {
254 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
256 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
264 static u64 get_coherent_dma_mask(struct device *dev)
266 u64 mask = (u64)DMA_BIT_MASK(32);
269 mask = dev->coherent_dma_mask;
272 * Sanity check the DMA mask - it must be non-zero, and
273 * must be able to be satisfied by a DMA allocation.
276 dev_warn(dev, "coherent DMA mask is unset\n");
280 if (!__dma_supported(dev, mask, true))
287 static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
290 * Ensure that the allocated pages are zeroed, and that any data
291 * lurking in the kernel direct-mapped region is invalidated.
293 if (PageHighMem(page)) {
294 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
295 phys_addr_t end = base + size;
297 void *ptr = kmap_atomic(page);
298 memset(ptr, 0, PAGE_SIZE);
299 if (coherent_flag != COHERENT)
300 dmac_flush_range(ptr, ptr + PAGE_SIZE);
305 if (coherent_flag != COHERENT)
306 outer_flush_range(base, end);
308 void *ptr = page_address(page);
309 memset(ptr, 0, size);
310 if (coherent_flag != COHERENT) {
311 dmac_flush_range(ptr, ptr + size);
312 outer_flush_range(__pa(ptr), __pa(ptr) + size);
318 * Allocate a DMA buffer for 'dev' of size 'size' using the
319 * specified gfp mask. Note that 'size' must be page aligned.
321 static struct page *__dma_alloc_buffer(struct device *dev, size_t size,
322 gfp_t gfp, int coherent_flag)
324 unsigned long order = get_order(size);
325 struct page *page, *p, *e;
327 page = alloc_pages(gfp, order);
332 * Now split the huge page and free the excess pages
334 split_page(page, order);
335 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
338 __dma_clear_buffer(page, size, coherent_flag);
344 * Free a DMA buffer. 'size' must be page aligned.
346 static void __dma_free_buffer(struct page *page, size_t size)
348 struct page *e = page + (size >> PAGE_SHIFT);
358 static void *__alloc_from_contiguous(struct device *dev, size_t size,
359 pgprot_t prot, struct page **ret_page,
360 const void *caller, bool want_vaddr,
361 int coherent_flag, gfp_t gfp);
363 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
364 pgprot_t prot, struct page **ret_page,
365 const void *caller, bool want_vaddr);
368 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
372 * DMA allocation can be mapped to user space, so lets
373 * set VM_USERMAP flags too.
375 return dma_common_contiguous_remap(page, size,
376 VM_ARM_DMA_CONSISTENT | VM_USERMAP,
380 static void __dma_free_remap(void *cpu_addr, size_t size)
382 dma_common_free_remap(cpu_addr, size,
383 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
386 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
387 static struct gen_pool *atomic_pool;
389 static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
391 static int __init early_coherent_pool(char *p)
393 atomic_pool_size = memparse(p, &p);
396 early_param("coherent_pool", early_coherent_pool);
398 void __init init_dma_coherent_pool_size(unsigned long size)
401 * Catch any attempt to set the pool size too late.
406 * Set architecture specific coherent pool size only if
407 * it has not been changed by kernel command line parameter.
409 if (atomic_pool_size == DEFAULT_DMA_COHERENT_POOL_SIZE)
410 atomic_pool_size = size;
414 * Initialise the coherent pool for atomic allocations.
416 static int __init atomic_pool_init(void)
418 pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
419 gfp_t gfp = GFP_KERNEL | GFP_DMA;
423 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
427 * The atomic pool is only used for non-coherent allocations
428 * so we must pass NORMAL for coherent_flag.
430 if (dev_get_cma_area(NULL))
431 ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
432 &page, atomic_pool_init, true, NORMAL,
435 ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
436 &page, atomic_pool_init, true);
440 ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
442 atomic_pool_size, -1);
444 goto destroy_genpool;
446 gen_pool_set_algo(atomic_pool,
447 gen_pool_first_fit_order_align,
449 pr_info("DMA: preallocated %zu KiB pool for atomic coherent allocations\n",
450 atomic_pool_size / 1024);
455 gen_pool_destroy(atomic_pool);
458 pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
459 atomic_pool_size / 1024);
463 * CMA is activated by core_initcall, so we must be called after it.
465 postcore_initcall(atomic_pool_init);
467 struct dma_contig_early_reserve {
472 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
474 static int dma_mmu_remap_num __initdata;
476 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
478 dma_mmu_remap[dma_mmu_remap_num].base = base;
479 dma_mmu_remap[dma_mmu_remap_num].size = size;
483 void __init dma_contiguous_remap(void)
486 for (i = 0; i < dma_mmu_remap_num; i++) {
487 phys_addr_t start = dma_mmu_remap[i].base;
488 phys_addr_t end = start + dma_mmu_remap[i].size;
492 if (end > arm_lowmem_limit)
493 end = arm_lowmem_limit;
497 map.pfn = __phys_to_pfn(start);
498 map.virtual = __phys_to_virt(start);
499 map.length = end - start;
500 map.type = MT_MEMORY_DMA_READY;
503 * Clear previous low-memory mapping to ensure that the
504 * TLB does not see any conflicting entries, then flush
505 * the TLB of the old entries before creating new mappings.
507 * This ensures that any speculatively loaded TLB entries
508 * (even though they may be rare) can not cause any problems,
509 * and ensures that this code is architecturally compliant.
511 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
513 pmd_clear(pmd_off_k(addr));
515 flush_tlb_kernel_range(__phys_to_virt(start),
516 __phys_to_virt(end));
518 iotable_init(&map, 1);
522 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
525 struct page *page = virt_to_page(addr);
526 pgprot_t prot = *(pgprot_t *)data;
528 set_pte_ext(pte, mk_pte(page, prot), 0);
532 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
534 unsigned long start = (unsigned long) page_address(page);
535 unsigned end = start + size;
537 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
538 flush_tlb_kernel_range(start, end);
541 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
542 pgprot_t prot, struct page **ret_page,
543 const void *caller, bool want_vaddr)
548 * __alloc_remap_buffer is only called when the device is
551 page = __dma_alloc_buffer(dev, size, gfp, NORMAL);
557 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
559 __dma_free_buffer(page, size);
568 static void *__alloc_from_pool(size_t size, struct page **ret_page)
574 WARN(1, "coherent pool not initialised!\n");
578 val = gen_pool_alloc(atomic_pool, size);
580 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
582 *ret_page = phys_to_page(phys);
589 static bool __in_atomic_pool(void *start, size_t size)
591 return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
594 static int __free_from_pool(void *start, size_t size)
596 if (!__in_atomic_pool(start, size))
599 gen_pool_free(atomic_pool, (unsigned long)start, size);
604 static void *__alloc_from_contiguous(struct device *dev, size_t size,
605 pgprot_t prot, struct page **ret_page,
606 const void *caller, bool want_vaddr,
607 int coherent_flag, gfp_t gfp)
609 unsigned long order = get_order(size);
610 size_t count = size >> PAGE_SHIFT;
614 page = dma_alloc_from_contiguous(dev, count, order, gfp);
618 __dma_clear_buffer(page, size, coherent_flag);
623 if (PageHighMem(page)) {
624 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
626 dma_release_from_contiguous(dev, page, count);
630 __dma_remap(page, size, prot);
631 ptr = page_address(page);
639 static void __free_from_contiguous(struct device *dev, struct page *page,
640 void *cpu_addr, size_t size, bool want_vaddr)
643 if (PageHighMem(page))
644 __dma_free_remap(cpu_addr, size);
646 __dma_remap(page, size, PAGE_KERNEL);
648 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
651 static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
653 prot = (attrs & DMA_ATTR_WRITE_COMBINE) ?
654 pgprot_writecombine(prot) :
655 pgprot_dmacoherent(prot);
661 #else /* !CONFIG_MMU */
665 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
666 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c, wv) NULL
667 #define __alloc_from_pool(size, ret_page) NULL
668 #define __alloc_from_contiguous(dev, size, prot, ret, c, wv, coherent_flag, gfp) NULL
669 #define __free_from_pool(cpu_addr, size) do { } while (0)
670 #define __free_from_contiguous(dev, page, cpu_addr, size, wv) do { } while (0)
671 #define __dma_free_remap(cpu_addr, size) do { } while (0)
673 #endif /* CONFIG_MMU */
675 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
676 struct page **ret_page)
679 /* __alloc_simple_buffer is only called when the device is coherent */
680 page = __dma_alloc_buffer(dev, size, gfp, COHERENT);
685 return page_address(page);
688 static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
689 struct page **ret_page)
691 return __alloc_simple_buffer(args->dev, args->size, args->gfp,
695 static void simple_allocator_free(struct arm_dma_free_args *args)
697 __dma_free_buffer(args->page, args->size);
700 static struct arm_dma_allocator simple_allocator = {
701 .alloc = simple_allocator_alloc,
702 .free = simple_allocator_free,
705 static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
706 struct page **ret_page)
708 return __alloc_from_contiguous(args->dev, args->size, args->prot,
709 ret_page, args->caller,
710 args->want_vaddr, args->coherent_flag,
714 static void cma_allocator_free(struct arm_dma_free_args *args)
716 __free_from_contiguous(args->dev, args->page, args->cpu_addr,
717 args->size, args->want_vaddr);
720 static struct arm_dma_allocator cma_allocator = {
721 .alloc = cma_allocator_alloc,
722 .free = cma_allocator_free,
725 static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
726 struct page **ret_page)
728 return __alloc_from_pool(args->size, ret_page);
731 static void pool_allocator_free(struct arm_dma_free_args *args)
733 __free_from_pool(args->cpu_addr, args->size);
736 static struct arm_dma_allocator pool_allocator = {
737 .alloc = pool_allocator_alloc,
738 .free = pool_allocator_free,
741 static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
742 struct page **ret_page)
744 return __alloc_remap_buffer(args->dev, args->size, args->gfp,
745 args->prot, ret_page, args->caller,
749 static void remap_allocator_free(struct arm_dma_free_args *args)
751 if (args->want_vaddr)
752 __dma_free_remap(args->cpu_addr, args->size);
754 __dma_free_buffer(args->page, args->size);
757 static struct arm_dma_allocator remap_allocator = {
758 .alloc = remap_allocator_alloc,
759 .free = remap_allocator_free,
762 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
763 gfp_t gfp, pgprot_t prot, bool is_coherent,
764 unsigned long attrs, const void *caller)
766 u64 mask = get_coherent_dma_mask(dev);
767 struct page *page = NULL;
769 bool allowblock, cma;
770 struct arm_dma_buffer *buf;
771 struct arm_dma_alloc_args args = {
773 .size = PAGE_ALIGN(size),
777 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
778 .coherent_flag = is_coherent ? COHERENT : NORMAL,
781 #ifdef CONFIG_DMA_API_DEBUG
782 u64 limit = (mask + 1) & ~mask;
783 if (limit && size >= limit) {
784 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
793 buf = kzalloc(sizeof(*buf),
794 gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
798 if (mask < 0xffffffffULL)
802 * Following is a work-around (a.k.a. hack) to prevent pages
803 * with __GFP_COMP being passed to split_page() which cannot
804 * handle them. The real problem is that this flag probably
805 * should be 0 on ARM as it is not supported on this
806 * platform; see CONFIG_HUGETLBFS.
808 gfp &= ~(__GFP_COMP);
811 *handle = ARM_MAPPING_ERROR;
812 allowblock = gfpflags_allow_blocking(gfp);
813 cma = allowblock ? dev_get_cma_area(dev) : false;
816 buf->allocator = &cma_allocator;
817 else if (nommu() || is_coherent)
818 buf->allocator = &simple_allocator;
820 buf->allocator = &remap_allocator;
822 buf->allocator = &pool_allocator;
824 addr = buf->allocator->alloc(&args, &page);
829 *handle = pfn_to_dma(dev, page_to_pfn(page));
830 buf->virt = args.want_vaddr ? addr : page;
832 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
833 list_add(&buf->list, &arm_dma_bufs);
834 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
839 return args.want_vaddr ? addr : page;
843 * Allocate DMA-coherent memory space and return both the kernel remapped
844 * virtual and bus address for that space.
846 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
847 gfp_t gfp, unsigned long attrs)
849 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
851 return __dma_alloc(dev, size, handle, gfp, prot, false,
852 attrs, __builtin_return_address(0));
855 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
856 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
858 return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
859 attrs, __builtin_return_address(0));
862 static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
863 void *cpu_addr, dma_addr_t dma_addr, size_t size,
868 unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
869 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
870 unsigned long pfn = dma_to_pfn(dev, dma_addr);
871 unsigned long off = vma->vm_pgoff;
873 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
876 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
877 ret = remap_pfn_range(vma, vma->vm_start,
879 vma->vm_end - vma->vm_start,
883 ret = vm_iomap_memory(vma, vma->vm_start,
884 (vma->vm_end - vma->vm_start));
885 #endif /* CONFIG_MMU */
891 * Create userspace mapping for the DMA-coherent memory.
893 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
894 void *cpu_addr, dma_addr_t dma_addr, size_t size,
897 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
900 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
901 void *cpu_addr, dma_addr_t dma_addr, size_t size,
905 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
906 #endif /* CONFIG_MMU */
907 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
911 * Free a buffer as defined by the above mapping.
913 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
914 dma_addr_t handle, unsigned long attrs,
917 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
918 struct arm_dma_buffer *buf;
919 struct arm_dma_free_args args = {
921 .size = PAGE_ALIGN(size),
922 .cpu_addr = cpu_addr,
924 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
927 buf = arm_dma_buffer_find(cpu_addr);
928 if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
931 buf->allocator->free(&args);
935 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
936 dma_addr_t handle, unsigned long attrs)
938 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
941 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
942 dma_addr_t handle, unsigned long attrs)
944 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
948 * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
949 * that the intention is to allow exporting memory allocated via the
950 * coherent DMA APIs through the dma_buf API, which only accepts a
951 * scattertable. This presents a couple of problems:
952 * 1. Not all memory allocated via the coherent DMA APIs is backed by
954 * 2. Passing coherent DMA memory into the streaming APIs is not allowed
955 * as we will try to flush the memory through a different alias to that
956 * actually being used (and the flushes are redundant.)
958 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
959 void *cpu_addr, dma_addr_t handle, size_t size,
962 unsigned long pfn = dma_to_pfn(dev, handle);
966 /* If the PFN is not valid, we do not have a struct page */
970 page = pfn_to_page(pfn);
972 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
976 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
980 static void dma_cache_maint_page(struct page *page, unsigned long offset,
981 size_t size, enum dma_data_direction dir,
982 void (*op)(const void *, size_t, int))
987 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
991 * A single sg entry may refer to multiple physically contiguous
992 * pages. But we still need to process highmem pages individually.
993 * If highmem is not configured then the bulk of this loop gets
1000 page = pfn_to_page(pfn);
1002 if (PageHighMem(page)) {
1003 if (len + offset > PAGE_SIZE)
1004 len = PAGE_SIZE - offset;
1006 if (cache_is_vipt_nonaliasing()) {
1007 vaddr = kmap_atomic(page);
1008 op(vaddr + offset, len, dir);
1009 kunmap_atomic(vaddr);
1011 vaddr = kmap_high_get(page);
1013 op(vaddr + offset, len, dir);
1018 vaddr = page_address(page) + offset;
1019 op(vaddr, len, dir);
1028 * Make an area consistent for devices.
1029 * Note: Drivers should NOT use this function directly, as it will break
1030 * platforms with CONFIG_DMABOUNCE.
1031 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
1033 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
1034 size_t size, enum dma_data_direction dir)
1038 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
1040 paddr = page_to_phys(page) + off;
1041 if (dir == DMA_FROM_DEVICE) {
1042 outer_inv_range(paddr, paddr + size);
1044 outer_clean_range(paddr, paddr + size);
1046 /* FIXME: non-speculating: flush on bidirectional mappings? */
1049 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
1050 size_t size, enum dma_data_direction dir)
1052 phys_addr_t paddr = page_to_phys(page) + off;
1054 /* FIXME: non-speculating: not required */
1055 /* in any case, don't bother invalidating if DMA to device */
1056 if (dir != DMA_TO_DEVICE) {
1057 outer_inv_range(paddr, paddr + size);
1059 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
1063 * Mark the D-cache clean for these pages to avoid extra flushing.
1065 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
1069 pfn = page_to_pfn(page) + off / PAGE_SIZE;
1073 left -= PAGE_SIZE - off;
1075 while (left >= PAGE_SIZE) {
1076 page = pfn_to_page(pfn++);
1077 set_bit(PG_dcache_clean, &page->flags);
1084 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
1085 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1086 * @sg: list of buffers
1087 * @nents: number of buffers to map
1088 * @dir: DMA transfer direction
1090 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1091 * This is the scatter-gather version of the dma_map_single interface.
1092 * Here the scatter gather list elements are each tagged with the
1093 * appropriate dma address and length. They are obtained via
1094 * sg_dma_{address,length}.
1096 * Device ownership issues as mentioned for dma_map_single are the same
1099 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1100 enum dma_data_direction dir, unsigned long attrs)
1102 const struct dma_map_ops *ops = get_dma_ops(dev);
1103 struct scatterlist *s;
1106 for_each_sg(sg, s, nents, i) {
1107 #ifdef CONFIG_NEED_SG_DMA_LENGTH
1108 s->dma_length = s->length;
1110 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
1111 s->length, dir, attrs);
1112 if (dma_mapping_error(dev, s->dma_address))
1118 for_each_sg(sg, s, i, j)
1119 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1124 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1125 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1126 * @sg: list of buffers
1127 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1128 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1130 * Unmap a set of streaming mode DMA translations. Again, CPU access
1131 * rules concerning calls here are the same as for dma_unmap_single().
1133 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1134 enum dma_data_direction dir, unsigned long attrs)
1136 const struct dma_map_ops *ops = get_dma_ops(dev);
1137 struct scatterlist *s;
1141 for_each_sg(sg, s, nents, i)
1142 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1146 * arm_dma_sync_sg_for_cpu
1147 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1148 * @sg: list of buffers
1149 * @nents: number of buffers to map (returned from dma_map_sg)
1150 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1152 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1153 int nents, enum dma_data_direction dir)
1155 const struct dma_map_ops *ops = get_dma_ops(dev);
1156 struct scatterlist *s;
1159 for_each_sg(sg, s, nents, i)
1160 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
1165 * arm_dma_sync_sg_for_device
1166 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1167 * @sg: list of buffers
1168 * @nents: number of buffers to map (returned from dma_map_sg)
1169 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1171 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1172 int nents, enum dma_data_direction dir)
1174 const struct dma_map_ops *ops = get_dma_ops(dev);
1175 struct scatterlist *s;
1178 for_each_sg(sg, s, nents, i)
1179 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1184 * Return whether the given device DMA address mask can be supported
1185 * properly. For example, if your device can only drive the low 24-bits
1186 * during bus mastering, then you would pass 0x00ffffff as the mask
1189 int arm_dma_supported(struct device *dev, u64 mask)
1191 return __dma_supported(dev, mask, false);
1194 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
1196 static int __init dma_debug_do_init(void)
1198 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
1201 core_initcall(dma_debug_do_init);
1203 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1205 static int __dma_info_to_prot(enum dma_data_direction dir, unsigned long attrs)
1209 if (attrs & DMA_ATTR_PRIVILEGED)
1213 case DMA_BIDIRECTIONAL:
1214 return prot | IOMMU_READ | IOMMU_WRITE;
1216 return prot | IOMMU_READ;
1217 case DMA_FROM_DEVICE:
1218 return prot | IOMMU_WRITE;
1226 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
1228 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1231 unsigned int order = get_order(size);
1232 unsigned int align = 0;
1233 unsigned int count, start;
1234 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1235 unsigned long flags;
1239 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1240 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1242 count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1243 align = (1 << order) - 1;
1245 spin_lock_irqsave(&mapping->lock, flags);
1246 for (i = 0; i < mapping->nr_bitmaps; i++) {
1247 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1248 mapping->bits, 0, count, align);
1250 if (start > mapping->bits)
1253 bitmap_set(mapping->bitmaps[i], start, count);
1258 * No unused range found. Try to extend the existing mapping
1259 * and perform a second attempt to reserve an IO virtual
1260 * address range of size bytes.
1262 if (i == mapping->nr_bitmaps) {
1263 if (extend_iommu_mapping(mapping)) {
1264 spin_unlock_irqrestore(&mapping->lock, flags);
1265 return ARM_MAPPING_ERROR;
1268 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1269 mapping->bits, 0, count, align);
1271 if (start > mapping->bits) {
1272 spin_unlock_irqrestore(&mapping->lock, flags);
1273 return ARM_MAPPING_ERROR;
1276 bitmap_set(mapping->bitmaps[i], start, count);
1278 spin_unlock_irqrestore(&mapping->lock, flags);
1280 iova = mapping->base + (mapping_size * i);
1281 iova += start << PAGE_SHIFT;
1286 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1287 dma_addr_t addr, size_t size)
1289 unsigned int start, count;
1290 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1291 unsigned long flags;
1292 dma_addr_t bitmap_base;
1298 bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1299 BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
1301 bitmap_base = mapping->base + mapping_size * bitmap_index;
1303 start = (addr - bitmap_base) >> PAGE_SHIFT;
1305 if (addr + size > bitmap_base + mapping_size) {
1307 * The address range to be freed reaches into the iova
1308 * range of the next bitmap. This should not happen as
1309 * we don't allow this in __alloc_iova (at the
1314 count = size >> PAGE_SHIFT;
1316 spin_lock_irqsave(&mapping->lock, flags);
1317 bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1318 spin_unlock_irqrestore(&mapping->lock, flags);
1321 /* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
1322 static const int iommu_order_array[] = { 9, 8, 4, 0 };
1324 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1325 gfp_t gfp, unsigned long attrs,
1328 struct page **pages;
1329 int count = size >> PAGE_SHIFT;
1330 int array_size = count * sizeof(struct page *);
1334 if (array_size <= PAGE_SIZE)
1335 pages = kzalloc(array_size, GFP_KERNEL);
1337 pages = vzalloc(array_size);
1341 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS)
1343 unsigned long order = get_order(size);
1346 page = dma_alloc_from_contiguous(dev, count, order, gfp);
1350 __dma_clear_buffer(page, size, coherent_flag);
1352 for (i = 0; i < count; i++)
1353 pages[i] = page + i;
1358 /* Go straight to 4K chunks if caller says it's OK. */
1359 if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
1360 order_idx = ARRAY_SIZE(iommu_order_array) - 1;
1363 * IOMMU can map any pages, so himem can also be used here
1365 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1370 order = iommu_order_array[order_idx];
1372 /* Drop down when we get small */
1373 if (__fls(count) < order) {
1379 /* See if it's easy to allocate a high-order chunk */
1380 pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
1382 /* Go down a notch at first sign of pressure */
1388 pages[i] = alloc_pages(gfp, 0);
1394 split_page(pages[i], order);
1397 pages[i + j] = pages[i] + j;
1400 __dma_clear_buffer(pages[i], PAGE_SIZE << order, coherent_flag);
1402 count -= 1 << order;
1409 __free_pages(pages[i], 0);
1414 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1415 size_t size, unsigned long attrs)
1417 int count = size >> PAGE_SHIFT;
1420 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
1421 dma_release_from_contiguous(dev, pages[0], count);
1423 for (i = 0; i < count; i++)
1425 __free_pages(pages[i], 0);
1433 * Create a CPU mapping for a specified pages
1436 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1439 return dma_common_pages_remap(pages, size,
1440 VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1444 * Create a mapping in device IO address space for specified pages
1447 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
1448 unsigned long attrs)
1450 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1451 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1452 dma_addr_t dma_addr, iova;
1455 dma_addr = __alloc_iova(mapping, size);
1456 if (dma_addr == ARM_MAPPING_ERROR)
1460 for (i = 0; i < count; ) {
1463 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1464 phys_addr_t phys = page_to_phys(pages[i]);
1465 unsigned int len, j;
1467 for (j = i + 1; j < count; j++, next_pfn++)
1468 if (page_to_pfn(pages[j]) != next_pfn)
1471 len = (j - i) << PAGE_SHIFT;
1472 ret = iommu_map(mapping->domain, iova, phys, len,
1473 __dma_info_to_prot(DMA_BIDIRECTIONAL, attrs));
1481 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1482 __free_iova(mapping, dma_addr, size);
1483 return ARM_MAPPING_ERROR;
1486 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1488 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1491 * add optional in-page offset from iova to size and align
1492 * result to page size
1494 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1497 iommu_unmap(mapping->domain, iova, size);
1498 __free_iova(mapping, iova, size);
1502 static struct page **__atomic_get_pages(void *addr)
1507 phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1508 page = phys_to_page(phys);
1510 return (struct page **)page;
1513 static struct page **__iommu_get_pages(void *cpu_addr, unsigned long attrs)
1515 struct vm_struct *area;
1517 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1518 return __atomic_get_pages(cpu_addr);
1520 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1523 area = find_vm_area(cpu_addr);
1524 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1529 static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
1530 dma_addr_t *handle, int coherent_flag,
1531 unsigned long attrs)
1536 if (coherent_flag == COHERENT)
1537 addr = __alloc_simple_buffer(dev, size, gfp, &page);
1539 addr = __alloc_from_pool(size, &page);
1543 *handle = __iommu_create_mapping(dev, &page, size, attrs);
1544 if (*handle == ARM_MAPPING_ERROR)
1550 __free_from_pool(addr, size);
1554 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1555 dma_addr_t handle, size_t size, int coherent_flag)
1557 __iommu_remove_mapping(dev, handle, size);
1558 if (coherent_flag == COHERENT)
1559 __dma_free_buffer(virt_to_page(cpu_addr), size);
1561 __free_from_pool(cpu_addr, size);
1564 static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
1565 dma_addr_t *handle, gfp_t gfp, unsigned long attrs,
1568 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1569 struct page **pages;
1572 *handle = ARM_MAPPING_ERROR;
1573 size = PAGE_ALIGN(size);
1575 if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp))
1576 return __iommu_alloc_simple(dev, size, gfp, handle,
1577 coherent_flag, attrs);
1580 * Following is a work-around (a.k.a. hack) to prevent pages
1581 * with __GFP_COMP being passed to split_page() which cannot
1582 * handle them. The real problem is that this flag probably
1583 * should be 0 on ARM as it is not supported on this
1584 * platform; see CONFIG_HUGETLBFS.
1586 gfp &= ~(__GFP_COMP);
1588 pages = __iommu_alloc_buffer(dev, size, gfp, attrs, coherent_flag);
1592 *handle = __iommu_create_mapping(dev, pages, size, attrs);
1593 if (*handle == ARM_MAPPING_ERROR)
1596 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1599 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1600 __builtin_return_address(0));
1607 __iommu_remove_mapping(dev, *handle, size);
1609 __iommu_free_buffer(dev, pages, size, attrs);
1613 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1614 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1616 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, NORMAL);
1619 static void *arm_coherent_iommu_alloc_attrs(struct device *dev, size_t size,
1620 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1622 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, COHERENT);
1625 static int __arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1626 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1627 unsigned long attrs)
1629 unsigned long uaddr = vma->vm_start;
1630 unsigned long usize = vma->vm_end - vma->vm_start;
1631 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1632 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1633 unsigned long off = vma->vm_pgoff;
1638 if (off >= nr_pages || (usize >> PAGE_SHIFT) > nr_pages - off)
1644 int ret = vm_insert_page(vma, uaddr, *pages++);
1646 pr_err("Remapping memory failed: %d\n", ret);
1651 } while (usize > 0);
1655 static int arm_iommu_mmap_attrs(struct device *dev,
1656 struct vm_area_struct *vma, void *cpu_addr,
1657 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1659 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1661 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1664 static int arm_coherent_iommu_mmap_attrs(struct device *dev,
1665 struct vm_area_struct *vma, void *cpu_addr,
1666 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1668 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1672 * free a page as defined by the above mapping.
1673 * Must not be called with IRQs disabled.
1675 void __arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1676 dma_addr_t handle, unsigned long attrs, int coherent_flag)
1678 struct page **pages;
1679 size = PAGE_ALIGN(size);
1681 if (coherent_flag == COHERENT || __in_atomic_pool(cpu_addr, size)) {
1682 __iommu_free_atomic(dev, cpu_addr, handle, size, coherent_flag);
1686 pages = __iommu_get_pages(cpu_addr, attrs);
1688 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1692 if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0) {
1693 dma_common_free_remap(cpu_addr, size,
1694 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1697 __iommu_remove_mapping(dev, handle, size);
1698 __iommu_free_buffer(dev, pages, size, attrs);
1701 void arm_iommu_free_attrs(struct device *dev, size_t size,
1702 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1704 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, NORMAL);
1707 void arm_coherent_iommu_free_attrs(struct device *dev, size_t size,
1708 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1710 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, COHERENT);
1713 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1714 void *cpu_addr, dma_addr_t dma_addr,
1715 size_t size, unsigned long attrs)
1717 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1718 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1723 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1728 * Map a part of the scatter-gather list into contiguous io address space
1730 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1731 size_t size, dma_addr_t *handle,
1732 enum dma_data_direction dir, unsigned long attrs,
1735 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1736 dma_addr_t iova, iova_base;
1739 struct scatterlist *s;
1742 size = PAGE_ALIGN(size);
1743 *handle = ARM_MAPPING_ERROR;
1745 iova_base = iova = __alloc_iova(mapping, size);
1746 if (iova == ARM_MAPPING_ERROR)
1749 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1750 phys_addr_t phys = page_to_phys(sg_page(s));
1751 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1753 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1754 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1756 prot = __dma_info_to_prot(dir, attrs);
1758 ret = iommu_map(mapping->domain, iova, phys, len, prot);
1761 count += len >> PAGE_SHIFT;
1764 *handle = iova_base;
1768 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1769 __free_iova(mapping, iova_base, size);
1773 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1774 enum dma_data_direction dir, unsigned long attrs,
1777 struct scatterlist *s = sg, *dma = sg, *start = sg;
1779 unsigned int offset = s->offset;
1780 unsigned int size = s->offset + s->length;
1781 unsigned int max = dma_get_max_seg_size(dev);
1783 for (i = 1; i < nents; i++) {
1786 s->dma_address = ARM_MAPPING_ERROR;
1789 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1790 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1791 dir, attrs, is_coherent) < 0)
1794 dma->dma_address += offset;
1795 dma->dma_length = size - offset;
1797 size = offset = s->offset;
1804 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1808 dma->dma_address += offset;
1809 dma->dma_length = size - offset;
1814 for_each_sg(sg, s, count, i)
1815 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1820 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1821 * @dev: valid struct device pointer
1822 * @sg: list of buffers
1823 * @nents: number of buffers to map
1824 * @dir: DMA transfer direction
1826 * Map a set of i/o coherent buffers described by scatterlist in streaming
1827 * mode for DMA. The scatter gather list elements are merged together (if
1828 * possible) and tagged with the appropriate dma address and length. They are
1829 * obtained via sg_dma_{address,length}.
1831 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1832 int nents, enum dma_data_direction dir, unsigned long attrs)
1834 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1838 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1839 * @dev: valid struct device pointer
1840 * @sg: list of buffers
1841 * @nents: number of buffers to map
1842 * @dir: DMA transfer direction
1844 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1845 * The scatter gather list elements are merged together (if possible) and
1846 * tagged with the appropriate dma address and length. They are obtained via
1847 * sg_dma_{address,length}.
1849 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1850 int nents, enum dma_data_direction dir, unsigned long attrs)
1852 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1855 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1856 int nents, enum dma_data_direction dir,
1857 unsigned long attrs, bool is_coherent)
1859 struct scatterlist *s;
1862 for_each_sg(sg, s, nents, i) {
1864 __iommu_remove_mapping(dev, sg_dma_address(s),
1866 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1867 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1873 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1874 * @dev: valid struct device pointer
1875 * @sg: list of buffers
1876 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1877 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1879 * Unmap a set of streaming mode DMA translations. Again, CPU access
1880 * rules concerning calls here are the same as for dma_unmap_single().
1882 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1883 int nents, enum dma_data_direction dir,
1884 unsigned long attrs)
1886 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1890 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1891 * @dev: valid struct device pointer
1892 * @sg: list of buffers
1893 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1894 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1896 * Unmap a set of streaming mode DMA translations. Again, CPU access
1897 * rules concerning calls here are the same as for dma_unmap_single().
1899 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1900 enum dma_data_direction dir,
1901 unsigned long attrs)
1903 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1907 * arm_iommu_sync_sg_for_cpu
1908 * @dev: valid struct device pointer
1909 * @sg: list of buffers
1910 * @nents: number of buffers to map (returned from dma_map_sg)
1911 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1913 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1914 int nents, enum dma_data_direction dir)
1916 struct scatterlist *s;
1919 for_each_sg(sg, s, nents, i)
1920 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1925 * arm_iommu_sync_sg_for_device
1926 * @dev: valid struct device pointer
1927 * @sg: list of buffers
1928 * @nents: number of buffers to map (returned from dma_map_sg)
1929 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1931 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1932 int nents, enum dma_data_direction dir)
1934 struct scatterlist *s;
1937 for_each_sg(sg, s, nents, i)
1938 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1943 * arm_coherent_iommu_map_page
1944 * @dev: valid struct device pointer
1945 * @page: page that buffer resides in
1946 * @offset: offset into page for start of buffer
1947 * @size: size of buffer to map
1948 * @dir: DMA transfer direction
1950 * Coherent IOMMU aware version of arm_dma_map_page()
1952 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1953 unsigned long offset, size_t size, enum dma_data_direction dir,
1954 unsigned long attrs)
1956 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1957 dma_addr_t dma_addr;
1958 int ret, prot, len = PAGE_ALIGN(size + offset);
1960 dma_addr = __alloc_iova(mapping, len);
1961 if (dma_addr == ARM_MAPPING_ERROR)
1964 prot = __dma_info_to_prot(dir, attrs);
1966 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1970 return dma_addr + offset;
1972 __free_iova(mapping, dma_addr, len);
1973 return ARM_MAPPING_ERROR;
1977 * arm_iommu_map_page
1978 * @dev: valid struct device pointer
1979 * @page: page that buffer resides in
1980 * @offset: offset into page for start of buffer
1981 * @size: size of buffer to map
1982 * @dir: DMA transfer direction
1984 * IOMMU aware version of arm_dma_map_page()
1986 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1987 unsigned long offset, size_t size, enum dma_data_direction dir,
1988 unsigned long attrs)
1990 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1991 __dma_page_cpu_to_dev(page, offset, size, dir);
1993 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1997 * arm_coherent_iommu_unmap_page
1998 * @dev: valid struct device pointer
1999 * @handle: DMA address of buffer
2000 * @size: size of buffer (same as passed to dma_map_page)
2001 * @dir: DMA transfer direction (same as passed to dma_map_page)
2003 * Coherent IOMMU aware version of arm_dma_unmap_page()
2005 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
2006 size_t size, enum dma_data_direction dir, unsigned long attrs)
2008 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2009 dma_addr_t iova = handle & PAGE_MASK;
2010 int offset = handle & ~PAGE_MASK;
2011 int len = PAGE_ALIGN(size + offset);
2016 iommu_unmap(mapping->domain, iova, len);
2017 __free_iova(mapping, iova, len);
2021 * arm_iommu_unmap_page
2022 * @dev: valid struct device pointer
2023 * @handle: DMA address of buffer
2024 * @size: size of buffer (same as passed to dma_map_page)
2025 * @dir: DMA transfer direction (same as passed to dma_map_page)
2027 * IOMMU aware version of arm_dma_unmap_page()
2029 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
2030 size_t size, enum dma_data_direction dir, unsigned long attrs)
2032 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2033 dma_addr_t iova = handle & PAGE_MASK;
2034 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2035 int offset = handle & ~PAGE_MASK;
2036 int len = PAGE_ALIGN(size + offset);
2041 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
2042 __dma_page_dev_to_cpu(page, offset, size, dir);
2044 iommu_unmap(mapping->domain, iova, len);
2045 __free_iova(mapping, iova, len);
2049 * arm_iommu_map_resource - map a device resource for DMA
2050 * @dev: valid struct device pointer
2051 * @phys_addr: physical address of resource
2052 * @size: size of resource to map
2053 * @dir: DMA transfer direction
2055 static dma_addr_t arm_iommu_map_resource(struct device *dev,
2056 phys_addr_t phys_addr, size_t size,
2057 enum dma_data_direction dir, unsigned long attrs)
2059 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2060 dma_addr_t dma_addr;
2062 phys_addr_t addr = phys_addr & PAGE_MASK;
2063 unsigned int offset = phys_addr & ~PAGE_MASK;
2064 size_t len = PAGE_ALIGN(size + offset);
2066 dma_addr = __alloc_iova(mapping, len);
2067 if (dma_addr == ARM_MAPPING_ERROR)
2070 prot = __dma_info_to_prot(dir, attrs) | IOMMU_MMIO;
2072 ret = iommu_map(mapping->domain, dma_addr, addr, len, prot);
2076 return dma_addr + offset;
2078 __free_iova(mapping, dma_addr, len);
2079 return ARM_MAPPING_ERROR;
2083 * arm_iommu_unmap_resource - unmap a device DMA resource
2084 * @dev: valid struct device pointer
2085 * @dma_handle: DMA address to resource
2086 * @size: size of resource to map
2087 * @dir: DMA transfer direction
2089 static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
2090 size_t size, enum dma_data_direction dir,
2091 unsigned long attrs)
2093 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2094 dma_addr_t iova = dma_handle & PAGE_MASK;
2095 unsigned int offset = dma_handle & ~PAGE_MASK;
2096 size_t len = PAGE_ALIGN(size + offset);
2101 iommu_unmap(mapping->domain, iova, len);
2102 __free_iova(mapping, iova, len);
2105 static void arm_iommu_sync_single_for_cpu(struct device *dev,
2106 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2108 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2109 dma_addr_t iova = handle & PAGE_MASK;
2110 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2111 unsigned int offset = handle & ~PAGE_MASK;
2116 __dma_page_dev_to_cpu(page, offset, size, dir);
2119 static void arm_iommu_sync_single_for_device(struct device *dev,
2120 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2122 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2123 dma_addr_t iova = handle & PAGE_MASK;
2124 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2125 unsigned int offset = handle & ~PAGE_MASK;
2130 __dma_page_cpu_to_dev(page, offset, size, dir);
2133 const struct dma_map_ops iommu_ops = {
2134 .alloc = arm_iommu_alloc_attrs,
2135 .free = arm_iommu_free_attrs,
2136 .mmap = arm_iommu_mmap_attrs,
2137 .get_sgtable = arm_iommu_get_sgtable,
2139 .map_page = arm_iommu_map_page,
2140 .unmap_page = arm_iommu_unmap_page,
2141 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
2142 .sync_single_for_device = arm_iommu_sync_single_for_device,
2144 .map_sg = arm_iommu_map_sg,
2145 .unmap_sg = arm_iommu_unmap_sg,
2146 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
2147 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
2149 .map_resource = arm_iommu_map_resource,
2150 .unmap_resource = arm_iommu_unmap_resource,
2152 .mapping_error = arm_dma_mapping_error,
2153 .dma_supported = arm_dma_supported,
2156 const struct dma_map_ops iommu_coherent_ops = {
2157 .alloc = arm_coherent_iommu_alloc_attrs,
2158 .free = arm_coherent_iommu_free_attrs,
2159 .mmap = arm_coherent_iommu_mmap_attrs,
2160 .get_sgtable = arm_iommu_get_sgtable,
2162 .map_page = arm_coherent_iommu_map_page,
2163 .unmap_page = arm_coherent_iommu_unmap_page,
2165 .map_sg = arm_coherent_iommu_map_sg,
2166 .unmap_sg = arm_coherent_iommu_unmap_sg,
2168 .map_resource = arm_iommu_map_resource,
2169 .unmap_resource = arm_iommu_unmap_resource,
2171 .mapping_error = arm_dma_mapping_error,
2172 .dma_supported = arm_dma_supported,
2176 * arm_iommu_create_mapping
2177 * @bus: pointer to the bus holding the client device (for IOMMU calls)
2178 * @base: start address of the valid IO address space
2179 * @size: maximum size of the valid IO address space
2181 * Creates a mapping structure which holds information about used/unused
2182 * IO address ranges, which is required to perform memory allocation and
2183 * mapping with IOMMU aware functions.
2185 * The client device need to be attached to the mapping with
2186 * arm_iommu_attach_device function.
2188 struct dma_iommu_mapping *
2189 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
2191 unsigned int bits = size >> PAGE_SHIFT;
2192 unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
2193 struct dma_iommu_mapping *mapping;
2197 /* currently only 32-bit DMA address space is supported */
2198 if (size > DMA_BIT_MASK(32) + 1)
2199 return ERR_PTR(-ERANGE);
2202 return ERR_PTR(-EINVAL);
2204 if (bitmap_size > PAGE_SIZE) {
2205 extensions = bitmap_size / PAGE_SIZE;
2206 bitmap_size = PAGE_SIZE;
2209 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
2213 mapping->bitmap_size = bitmap_size;
2214 mapping->bitmaps = kzalloc(extensions * sizeof(unsigned long *),
2216 if (!mapping->bitmaps)
2219 mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
2220 if (!mapping->bitmaps[0])
2223 mapping->nr_bitmaps = 1;
2224 mapping->extensions = extensions;
2225 mapping->base = base;
2226 mapping->bits = BITS_PER_BYTE * bitmap_size;
2228 spin_lock_init(&mapping->lock);
2230 mapping->domain = iommu_domain_alloc(bus);
2231 if (!mapping->domain)
2234 kref_init(&mapping->kref);
2237 kfree(mapping->bitmaps[0]);
2239 kfree(mapping->bitmaps);
2243 return ERR_PTR(err);
2245 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
2247 static void release_iommu_mapping(struct kref *kref)
2250 struct dma_iommu_mapping *mapping =
2251 container_of(kref, struct dma_iommu_mapping, kref);
2253 iommu_domain_free(mapping->domain);
2254 for (i = 0; i < mapping->nr_bitmaps; i++)
2255 kfree(mapping->bitmaps[i]);
2256 kfree(mapping->bitmaps);
2260 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
2264 if (mapping->nr_bitmaps >= mapping->extensions)
2267 next_bitmap = mapping->nr_bitmaps;
2268 mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
2270 if (!mapping->bitmaps[next_bitmap])
2273 mapping->nr_bitmaps++;
2278 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
2281 kref_put(&mapping->kref, release_iommu_mapping);
2283 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2285 static int __arm_iommu_attach_device(struct device *dev,
2286 struct dma_iommu_mapping *mapping)
2290 err = iommu_attach_device(mapping->domain, dev);
2294 kref_get(&mapping->kref);
2295 to_dma_iommu_mapping(dev) = mapping;
2297 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
2302 * arm_iommu_attach_device
2303 * @dev: valid struct device pointer
2304 * @mapping: io address space mapping structure (returned from
2305 * arm_iommu_create_mapping)
2307 * Attaches specified io address space mapping to the provided device.
2308 * This replaces the dma operations (dma_map_ops pointer) with the
2309 * IOMMU aware version.
2311 * More than one client might be attached to the same io address space
2314 int arm_iommu_attach_device(struct device *dev,
2315 struct dma_iommu_mapping *mapping)
2319 err = __arm_iommu_attach_device(dev, mapping);
2323 set_dma_ops(dev, &iommu_ops);
2326 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2329 * arm_iommu_detach_device
2330 * @dev: valid struct device pointer
2332 * Detaches the provided device from a previously attached map.
2333 * This voids the dma operations (dma_map_ops pointer)
2335 void arm_iommu_detach_device(struct device *dev)
2337 struct dma_iommu_mapping *mapping;
2339 mapping = to_dma_iommu_mapping(dev);
2341 dev_warn(dev, "Not attached\n");
2345 iommu_detach_device(mapping->domain, dev);
2346 kref_put(&mapping->kref, release_iommu_mapping);
2347 to_dma_iommu_mapping(dev) = NULL;
2348 set_dma_ops(dev, NULL);
2350 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
2352 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2354 static const struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
2356 return coherent ? &iommu_coherent_ops : &iommu_ops;
2359 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2360 const struct iommu_ops *iommu)
2362 struct dma_iommu_mapping *mapping;
2367 mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
2368 if (IS_ERR(mapping)) {
2369 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2370 size, dev_name(dev));
2374 if (__arm_iommu_attach_device(dev, mapping)) {
2375 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2377 arm_iommu_release_mapping(mapping);
2384 static void arm_teardown_iommu_dma_ops(struct device *dev)
2386 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2391 arm_iommu_detach_device(dev);
2392 arm_iommu_release_mapping(mapping);
2397 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2398 const struct iommu_ops *iommu)
2403 static void arm_teardown_iommu_dma_ops(struct device *dev) { }
2405 #define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2407 #endif /* CONFIG_ARM_DMA_USE_IOMMU */
2409 static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
2411 return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
2414 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2415 const struct iommu_ops *iommu, bool coherent)
2417 const struct dma_map_ops *dma_ops;
2419 dev->archdata.dma_coherent = coherent;
2422 * Don't override the dma_ops if they have already been set. Ideally
2423 * this should be the only location where dma_ops are set, remove this
2424 * check when all other callers of set_dma_ops will have disappeared.
2429 if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
2430 dma_ops = arm_get_iommu_dma_map_ops(coherent);
2432 dma_ops = arm_get_dma_map_ops(coherent);
2434 set_dma_ops(dev, dma_ops);
2437 if (xen_initial_domain()) {
2438 dev->archdata.dev_dma_ops = dev->dma_ops;
2439 dev->dma_ops = xen_dma_ops;
2442 dev->archdata.dma_ops_setup = true;
2445 void arch_teardown_dma_ops(struct device *dev)
2447 if (!dev->archdata.dma_ops_setup)
2450 arm_teardown_iommu_dma_ops(dev);