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[linux.git] / arch / arm / plat-samsung / devs.c
1 /* linux/arch/arm/plat-samsung/devs.c
2  *
3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com
5  *
6  * Base SAMSUNG platform device definitions
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/fb.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33
34 #include <asm/irq.h>
35 #include <asm/pmu.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39
40 #include <mach/hardware.h>
41 #include <mach/dma.h>
42 #include <mach/irqs.h>
43 #include <mach/map.h>
44
45 #include <plat/cpu.h>
46 #include <plat/devs.h>
47 #include <plat/adc.h>
48 #include <plat/ata.h>
49 #include <plat/ehci.h>
50 #include <plat/fb.h>
51 #include <plat/fb-s3c2410.h>
52 #include <plat/hwmon.h>
53 #include <plat/iic.h>
54 #include <plat/keypad.h>
55 #include <plat/mci.h>
56 #include <plat/nand.h>
57 #include <plat/sdhci.h>
58 #include <plat/ts.h>
59 #include <plat/udc.h>
60 #include <plat/udc-hs.h>
61 #include <plat/usb-control.h>
62 #include <plat/usb-phy.h>
63 #include <plat/regs-iic.h>
64 #include <plat/regs-serial.h>
65 #include <plat/regs-spi.h>
66 #include <plat/s3c64xx-spi.h>
67
68 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
69
70 /* AC97 */
71 #ifdef CONFIG_CPU_S3C2440
72 static struct resource s3c_ac97_resource[] = {
73         [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
74         [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
75         [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
76         [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
77         [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
78 };
79
80 struct platform_device s3c_device_ac97 = {
81         .name           = "samsung-ac97",
82         .id             = -1,
83         .num_resources  = ARRAY_SIZE(s3c_ac97_resource),
84         .resource       = s3c_ac97_resource,
85         .dev            = {
86                 .dma_mask               = &samsung_device_dma_mask,
87                 .coherent_dma_mask      = DMA_BIT_MASK(32),
88         }
89 };
90 #endif /* CONFIG_CPU_S3C2440 */
91
92 /* ADC */
93
94 #ifdef CONFIG_PLAT_S3C24XX
95 static struct resource s3c_adc_resource[] = {
96         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
97         [1] = DEFINE_RES_IRQ(IRQ_TC),
98         [2] = DEFINE_RES_IRQ(IRQ_ADC),
99 };
100
101 struct platform_device s3c_device_adc = {
102         .name           = "s3c24xx-adc",
103         .id             = -1,
104         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
105         .resource       = s3c_adc_resource,
106 };
107 #endif /* CONFIG_PLAT_S3C24XX */
108
109 #if defined(CONFIG_SAMSUNG_DEV_ADC)
110 static struct resource s3c_adc_resource[] = {
111         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
112         [1] = DEFINE_RES_IRQ(IRQ_TC),
113         [2] = DEFINE_RES_IRQ(IRQ_ADC),
114 };
115
116 struct platform_device s3c_device_adc = {
117         .name           = "samsung-adc",
118         .id             = -1,
119         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
120         .resource       = s3c_adc_resource,
121 };
122 #endif /* CONFIG_SAMSUNG_DEV_ADC */
123
124 /* Camif Controller */
125
126 #ifdef CONFIG_CPU_S3C2440
127 static struct resource s3c_camif_resource[] = {
128         [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
129         [1] = DEFINE_RES_IRQ(IRQ_CAM),
130 };
131
132 struct platform_device s3c_device_camif = {
133         .name           = "s3c2440-camif",
134         .id             = -1,
135         .num_resources  = ARRAY_SIZE(s3c_camif_resource),
136         .resource       = s3c_camif_resource,
137         .dev            = {
138                 .dma_mask               = &samsung_device_dma_mask,
139                 .coherent_dma_mask      = DMA_BIT_MASK(32),
140         }
141 };
142 #endif /* CONFIG_CPU_S3C2440 */
143
144 /* ASOC DMA */
145
146 struct platform_device samsung_asoc_dma = {
147         .name           = "samsung-audio",
148         .id             = -1,
149         .dev            = {
150                 .dma_mask               = &samsung_device_dma_mask,
151                 .coherent_dma_mask      = DMA_BIT_MASK(32),
152         }
153 };
154
155 struct platform_device samsung_asoc_idma = {
156         .name           = "samsung-idma",
157         .id             = -1,
158         .dev            = {
159                 .dma_mask               = &samsung_device_dma_mask,
160                 .coherent_dma_mask      = DMA_BIT_MASK(32),
161         }
162 };
163
164 /* FB */
165
166 #ifdef CONFIG_S3C_DEV_FB
167 static struct resource s3c_fb_resource[] = {
168         [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
169         [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
170         [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
171         [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
172 };
173
174 struct platform_device s3c_device_fb = {
175         .name           = "s3c-fb",
176         .id             = -1,
177         .num_resources  = ARRAY_SIZE(s3c_fb_resource),
178         .resource       = s3c_fb_resource,
179         .dev            = {
180                 .dma_mask               = &samsung_device_dma_mask,
181                 .coherent_dma_mask      = DMA_BIT_MASK(32),
182         },
183 };
184
185 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
186 {
187         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
188                          &s3c_device_fb);
189 }
190 #endif /* CONFIG_S3C_DEV_FB */
191
192 /* FIMC */
193
194 #ifdef CONFIG_S5P_DEV_FIMC0
195 static struct resource s5p_fimc0_resource[] = {
196         [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
197         [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
198 };
199
200 struct platform_device s5p_device_fimc0 = {
201         .name           = "s5p-fimc",
202         .id             = 0,
203         .num_resources  = ARRAY_SIZE(s5p_fimc0_resource),
204         .resource       = s5p_fimc0_resource,
205         .dev            = {
206                 .dma_mask               = &samsung_device_dma_mask,
207                 .coherent_dma_mask      = DMA_BIT_MASK(32),
208         },
209 };
210
211 struct platform_device s5p_device_fimc_md = {
212         .name   = "s5p-fimc-md",
213         .id     = -1,
214 };
215 #endif /* CONFIG_S5P_DEV_FIMC0 */
216
217 #ifdef CONFIG_S5P_DEV_FIMC1
218 static struct resource s5p_fimc1_resource[] = {
219         [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
220         [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
221 };
222
223 struct platform_device s5p_device_fimc1 = {
224         .name           = "s5p-fimc",
225         .id             = 1,
226         .num_resources  = ARRAY_SIZE(s5p_fimc1_resource),
227         .resource       = s5p_fimc1_resource,
228         .dev            = {
229                 .dma_mask               = &samsung_device_dma_mask,
230                 .coherent_dma_mask      = DMA_BIT_MASK(32),
231         },
232 };
233 #endif /* CONFIG_S5P_DEV_FIMC1 */
234
235 #ifdef CONFIG_S5P_DEV_FIMC2
236 static struct resource s5p_fimc2_resource[] = {
237         [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
238         [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
239 };
240
241 struct platform_device s5p_device_fimc2 = {
242         .name           = "s5p-fimc",
243         .id             = 2,
244         .num_resources  = ARRAY_SIZE(s5p_fimc2_resource),
245         .resource       = s5p_fimc2_resource,
246         .dev            = {
247                 .dma_mask               = &samsung_device_dma_mask,
248                 .coherent_dma_mask      = DMA_BIT_MASK(32),
249         },
250 };
251 #endif /* CONFIG_S5P_DEV_FIMC2 */
252
253 #ifdef CONFIG_S5P_DEV_FIMC3
254 static struct resource s5p_fimc3_resource[] = {
255         [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
256         [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
257 };
258
259 struct platform_device s5p_device_fimc3 = {
260         .name           = "s5p-fimc",
261         .id             = 3,
262         .num_resources  = ARRAY_SIZE(s5p_fimc3_resource),
263         .resource       = s5p_fimc3_resource,
264         .dev            = {
265                 .dma_mask               = &samsung_device_dma_mask,
266                 .coherent_dma_mask      = DMA_BIT_MASK(32),
267         },
268 };
269 #endif /* CONFIG_S5P_DEV_FIMC3 */
270
271 /* G2D */
272
273 #ifdef CONFIG_S5P_DEV_G2D
274 static struct resource s5p_g2d_resource[] = {
275         [0] = {
276                 .start  = S5P_PA_G2D,
277                 .end    = S5P_PA_G2D + SZ_4K - 1,
278                 .flags  = IORESOURCE_MEM,
279         },
280         [1] = {
281                 .start  = IRQ_2D,
282                 .end    = IRQ_2D,
283                 .flags  = IORESOURCE_IRQ,
284         },
285 };
286
287 struct platform_device s5p_device_g2d = {
288         .name           = "s5p-g2d",
289         .id             = 0,
290         .num_resources  = ARRAY_SIZE(s5p_g2d_resource),
291         .resource       = s5p_g2d_resource,
292         .dev            = {
293                 .dma_mask               = &samsung_device_dma_mask,
294                 .coherent_dma_mask      = DMA_BIT_MASK(32),
295         },
296 };
297 #endif /* CONFIG_S5P_DEV_G2D */
298
299 #ifdef CONFIG_S5P_DEV_JPEG
300 static struct resource s5p_jpeg_resource[] = {
301         [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
302         [1] = DEFINE_RES_IRQ(IRQ_JPEG),
303 };
304
305 struct platform_device s5p_device_jpeg = {
306         .name           = "s5p-jpeg",
307         .id             = 0,
308         .num_resources  = ARRAY_SIZE(s5p_jpeg_resource),
309         .resource       = s5p_jpeg_resource,
310         .dev            = {
311                 .dma_mask               = &samsung_device_dma_mask,
312                 .coherent_dma_mask      = DMA_BIT_MASK(32),
313         },
314 };
315 #endif /*  CONFIG_S5P_DEV_JPEG */
316
317 /* FIMD0 */
318
319 #ifdef CONFIG_S5P_DEV_FIMD0
320 static struct resource s5p_fimd0_resource[] = {
321         [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
322         [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
323         [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
324         [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
325 };
326
327 struct platform_device s5p_device_fimd0 = {
328         .name           = "s5p-fb",
329         .id             = 0,
330         .num_resources  = ARRAY_SIZE(s5p_fimd0_resource),
331         .resource       = s5p_fimd0_resource,
332         .dev            = {
333                 .dma_mask               = &samsung_device_dma_mask,
334                 .coherent_dma_mask      = DMA_BIT_MASK(32),
335         },
336 };
337
338 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
339 {
340         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
341                          &s5p_device_fimd0);
342 }
343 #endif /* CONFIG_S5P_DEV_FIMD0 */
344
345 /* HWMON */
346
347 #ifdef CONFIG_S3C_DEV_HWMON
348 struct platform_device s3c_device_hwmon = {
349         .name           = "s3c-hwmon",
350         .id             = -1,
351         .dev.parent     = &s3c_device_adc.dev,
352 };
353
354 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
355 {
356         s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
357                          &s3c_device_hwmon);
358 }
359 #endif /* CONFIG_S3C_DEV_HWMON */
360
361 /* HSMMC */
362
363 #ifdef CONFIG_S3C_DEV_HSMMC
364 static struct resource s3c_hsmmc_resource[] = {
365         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
366         [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
367 };
368
369 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
370         .max_width      = 4,
371         .host_caps      = (MMC_CAP_4_BIT_DATA |
372                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
373         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
374 };
375
376 struct platform_device s3c_device_hsmmc0 = {
377         .name           = "s3c-sdhci",
378         .id             = 0,
379         .num_resources  = ARRAY_SIZE(s3c_hsmmc_resource),
380         .resource       = s3c_hsmmc_resource,
381         .dev            = {
382                 .dma_mask               = &samsung_device_dma_mask,
383                 .coherent_dma_mask      = DMA_BIT_MASK(32),
384                 .platform_data          = &s3c_hsmmc0_def_platdata,
385         },
386 };
387
388 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
389 {
390         s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
391 }
392 #endif /* CONFIG_S3C_DEV_HSMMC */
393
394 #ifdef CONFIG_S3C_DEV_HSMMC1
395 static struct resource s3c_hsmmc1_resource[] = {
396         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
397         [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
398 };
399
400 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
401         .max_width      = 4,
402         .host_caps      = (MMC_CAP_4_BIT_DATA |
403                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
404         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
405 };
406
407 struct platform_device s3c_device_hsmmc1 = {
408         .name           = "s3c-sdhci",
409         .id             = 1,
410         .num_resources  = ARRAY_SIZE(s3c_hsmmc1_resource),
411         .resource       = s3c_hsmmc1_resource,
412         .dev            = {
413                 .dma_mask               = &samsung_device_dma_mask,
414                 .coherent_dma_mask      = DMA_BIT_MASK(32),
415                 .platform_data          = &s3c_hsmmc1_def_platdata,
416         },
417 };
418
419 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
420 {
421         s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
422 }
423 #endif /* CONFIG_S3C_DEV_HSMMC1 */
424
425 /* HSMMC2 */
426
427 #ifdef CONFIG_S3C_DEV_HSMMC2
428 static struct resource s3c_hsmmc2_resource[] = {
429         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
430         [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
431 };
432
433 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
434         .max_width      = 4,
435         .host_caps      = (MMC_CAP_4_BIT_DATA |
436                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
437         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
438 };
439
440 struct platform_device s3c_device_hsmmc2 = {
441         .name           = "s3c-sdhci",
442         .id             = 2,
443         .num_resources  = ARRAY_SIZE(s3c_hsmmc2_resource),
444         .resource       = s3c_hsmmc2_resource,
445         .dev            = {
446                 .dma_mask               = &samsung_device_dma_mask,
447                 .coherent_dma_mask      = DMA_BIT_MASK(32),
448                 .platform_data          = &s3c_hsmmc2_def_platdata,
449         },
450 };
451
452 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
453 {
454         s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
455 }
456 #endif /* CONFIG_S3C_DEV_HSMMC2 */
457
458 #ifdef CONFIG_S3C_DEV_HSMMC3
459 static struct resource s3c_hsmmc3_resource[] = {
460         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
461         [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
462 };
463
464 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
465         .max_width      = 4,
466         .host_caps      = (MMC_CAP_4_BIT_DATA |
467                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
468         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
469 };
470
471 struct platform_device s3c_device_hsmmc3 = {
472         .name           = "s3c-sdhci",
473         .id             = 3,
474         .num_resources  = ARRAY_SIZE(s3c_hsmmc3_resource),
475         .resource       = s3c_hsmmc3_resource,
476         .dev            = {
477                 .dma_mask               = &samsung_device_dma_mask,
478                 .coherent_dma_mask      = DMA_BIT_MASK(32),
479                 .platform_data          = &s3c_hsmmc3_def_platdata,
480         },
481 };
482
483 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
484 {
485         s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
486 }
487 #endif /* CONFIG_S3C_DEV_HSMMC3 */
488
489 /* I2C */
490
491 static struct resource s3c_i2c0_resource[] = {
492         [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
493         [1] = DEFINE_RES_IRQ(IRQ_IIC),
494 };
495
496 struct platform_device s3c_device_i2c0 = {
497         .name           = "s3c2410-i2c",
498 #ifdef CONFIG_S3C_DEV_I2C1
499         .id             = 0,
500 #else
501         .id             = -1,
502 #endif
503         .num_resources  = ARRAY_SIZE(s3c_i2c0_resource),
504         .resource       = s3c_i2c0_resource,
505 };
506
507 struct s3c2410_platform_i2c default_i2c_data __initdata = {
508         .flags          = 0,
509         .slave_addr     = 0x10,
510         .frequency      = 100*1000,
511         .sda_delay      = 100,
512 };
513
514 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
515 {
516         struct s3c2410_platform_i2c *npd;
517
518         if (!pd) {
519                 pd = &default_i2c_data;
520                 pd->bus_num = 0;
521         }
522
523         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
524                                &s3c_device_i2c0);
525
526         if (!npd->cfg_gpio)
527                 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
528 }
529
530 #ifdef CONFIG_S3C_DEV_I2C1
531 static struct resource s3c_i2c1_resource[] = {
532         [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
533         [1] = DEFINE_RES_IRQ(IRQ_IIC1),
534 };
535
536 struct platform_device s3c_device_i2c1 = {
537         .name           = "s3c2410-i2c",
538         .id             = 1,
539         .num_resources  = ARRAY_SIZE(s3c_i2c1_resource),
540         .resource       = s3c_i2c1_resource,
541 };
542
543 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
544 {
545         struct s3c2410_platform_i2c *npd;
546
547         if (!pd) {
548                 pd = &default_i2c_data;
549                 pd->bus_num = 1;
550         }
551
552         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
553                                &s3c_device_i2c1);
554
555         if (!npd->cfg_gpio)
556                 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
557 }
558 #endif /* CONFIG_S3C_DEV_I2C1 */
559
560 #ifdef CONFIG_S3C_DEV_I2C2
561 static struct resource s3c_i2c2_resource[] = {
562         [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
563         [1] = DEFINE_RES_IRQ(IRQ_IIC2),
564 };
565
566 struct platform_device s3c_device_i2c2 = {
567         .name           = "s3c2410-i2c",
568         .id             = 2,
569         .num_resources  = ARRAY_SIZE(s3c_i2c2_resource),
570         .resource       = s3c_i2c2_resource,
571 };
572
573 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
574 {
575         struct s3c2410_platform_i2c *npd;
576
577         if (!pd) {
578                 pd = &default_i2c_data;
579                 pd->bus_num = 2;
580         }
581
582         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
583                                &s3c_device_i2c2);
584
585         if (!npd->cfg_gpio)
586                 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
587 }
588 #endif /* CONFIG_S3C_DEV_I2C2 */
589
590 #ifdef CONFIG_S3C_DEV_I2C3
591 static struct resource s3c_i2c3_resource[] = {
592         [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
593         [1] = DEFINE_RES_IRQ(IRQ_IIC3),
594 };
595
596 struct platform_device s3c_device_i2c3 = {
597         .name           = "s3c2440-i2c",
598         .id             = 3,
599         .num_resources  = ARRAY_SIZE(s3c_i2c3_resource),
600         .resource       = s3c_i2c3_resource,
601 };
602
603 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
604 {
605         struct s3c2410_platform_i2c *npd;
606
607         if (!pd) {
608                 pd = &default_i2c_data;
609                 pd->bus_num = 3;
610         }
611
612         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
613                                &s3c_device_i2c3);
614
615         if (!npd->cfg_gpio)
616                 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
617 }
618 #endif /*CONFIG_S3C_DEV_I2C3 */
619
620 #ifdef CONFIG_S3C_DEV_I2C4
621 static struct resource s3c_i2c4_resource[] = {
622         [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
623         [1] = DEFINE_RES_IRQ(IRQ_IIC4),
624 };
625
626 struct platform_device s3c_device_i2c4 = {
627         .name           = "s3c2440-i2c",
628         .id             = 4,
629         .num_resources  = ARRAY_SIZE(s3c_i2c4_resource),
630         .resource       = s3c_i2c4_resource,
631 };
632
633 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
634 {
635         struct s3c2410_platform_i2c *npd;
636
637         if (!pd) {
638                 pd = &default_i2c_data;
639                 pd->bus_num = 4;
640         }
641
642         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
643                                &s3c_device_i2c4);
644
645         if (!npd->cfg_gpio)
646                 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
647 }
648 #endif /*CONFIG_S3C_DEV_I2C4 */
649
650 #ifdef CONFIG_S3C_DEV_I2C5
651 static struct resource s3c_i2c5_resource[] = {
652         [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
653         [1] = DEFINE_RES_IRQ(IRQ_IIC5),
654 };
655
656 struct platform_device s3c_device_i2c5 = {
657         .name           = "s3c2440-i2c",
658         .id             = 5,
659         .num_resources  = ARRAY_SIZE(s3c_i2c5_resource),
660         .resource       = s3c_i2c5_resource,
661 };
662
663 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
664 {
665         struct s3c2410_platform_i2c *npd;
666
667         if (!pd) {
668                 pd = &default_i2c_data;
669                 pd->bus_num = 5;
670         }
671
672         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
673                                &s3c_device_i2c5);
674
675         if (!npd->cfg_gpio)
676                 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
677 }
678 #endif /*CONFIG_S3C_DEV_I2C5 */
679
680 #ifdef CONFIG_S3C_DEV_I2C6
681 static struct resource s3c_i2c6_resource[] = {
682         [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
683         [1] = DEFINE_RES_IRQ(IRQ_IIC6),
684 };
685
686 struct platform_device s3c_device_i2c6 = {
687         .name           = "s3c2440-i2c",
688         .id             = 6,
689         .num_resources  = ARRAY_SIZE(s3c_i2c6_resource),
690         .resource       = s3c_i2c6_resource,
691 };
692
693 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
694 {
695         struct s3c2410_platform_i2c *npd;
696
697         if (!pd) {
698                 pd = &default_i2c_data;
699                 pd->bus_num = 6;
700         }
701
702         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
703                                &s3c_device_i2c6);
704
705         if (!npd->cfg_gpio)
706                 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
707 }
708 #endif /* CONFIG_S3C_DEV_I2C6 */
709
710 #ifdef CONFIG_S3C_DEV_I2C7
711 static struct resource s3c_i2c7_resource[] = {
712         [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
713         [1] = DEFINE_RES_IRQ(IRQ_IIC7),
714 };
715
716 struct platform_device s3c_device_i2c7 = {
717         .name           = "s3c2440-i2c",
718         .id             = 7,
719         .num_resources  = ARRAY_SIZE(s3c_i2c7_resource),
720         .resource       = s3c_i2c7_resource,
721 };
722
723 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
724 {
725         struct s3c2410_platform_i2c *npd;
726
727         if (!pd) {
728                 pd = &default_i2c_data;
729                 pd->bus_num = 7;
730         }
731
732         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
733                                &s3c_device_i2c7);
734
735         if (!npd->cfg_gpio)
736                 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
737 }
738 #endif /* CONFIG_S3C_DEV_I2C7 */
739
740 /* I2C HDMIPHY */
741
742 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
743 static struct resource s5p_i2c_resource[] = {
744         [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
745         [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
746 };
747
748 struct platform_device s5p_device_i2c_hdmiphy = {
749         .name           = "s3c2440-hdmiphy-i2c",
750         .id             = -1,
751         .num_resources  = ARRAY_SIZE(s5p_i2c_resource),
752         .resource       = s5p_i2c_resource,
753 };
754
755 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
756 {
757         struct s3c2410_platform_i2c *npd;
758
759         if (!pd) {
760                 pd = &default_i2c_data;
761
762                 if (soc_is_exynos4210())
763                         pd->bus_num = 8;
764                 else if (soc_is_s5pv210())
765                         pd->bus_num = 3;
766                 else
767                         pd->bus_num = 0;
768         }
769
770         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
771                                &s5p_device_i2c_hdmiphy);
772 }
773 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
774
775 /* I2S */
776
777 #ifdef CONFIG_PLAT_S3C24XX
778 static struct resource s3c_iis_resource[] = {
779         [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
780 };
781
782 struct platform_device s3c_device_iis = {
783         .name           = "s3c24xx-iis",
784         .id             = -1,
785         .num_resources  = ARRAY_SIZE(s3c_iis_resource),
786         .resource       = s3c_iis_resource,
787         .dev            = {
788                 .dma_mask               = &samsung_device_dma_mask,
789                 .coherent_dma_mask      = DMA_BIT_MASK(32),
790         }
791 };
792 #endif /* CONFIG_PLAT_S3C24XX */
793
794 #ifdef CONFIG_CPU_S3C2440
795 struct platform_device s3c2412_device_iis = {
796         .name           = "s3c2412-iis",
797         .id             = -1,
798         .dev            = {
799                 .dma_mask               = &samsung_device_dma_mask,
800                 .coherent_dma_mask      = DMA_BIT_MASK(32),
801         }
802 };
803 #endif /* CONFIG_CPU_S3C2440 */
804
805 /* IDE CFCON */
806
807 #ifdef CONFIG_SAMSUNG_DEV_IDE
808 static struct resource s3c_cfcon_resource[] = {
809         [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
810         [1] = DEFINE_RES_IRQ(IRQ_CFCON),
811 };
812
813 struct platform_device s3c_device_cfcon = {
814         .id             = 0,
815         .num_resources  = ARRAY_SIZE(s3c_cfcon_resource),
816         .resource       = s3c_cfcon_resource,
817 };
818
819 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
820 {
821         s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
822                          &s3c_device_cfcon);
823 }
824 #endif /* CONFIG_SAMSUNG_DEV_IDE */
825
826 /* KEYPAD */
827
828 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
829 static struct resource samsung_keypad_resources[] = {
830         [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
831         [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
832 };
833
834 struct platform_device samsung_device_keypad = {
835         .name           = "samsung-keypad",
836         .id             = -1,
837         .num_resources  = ARRAY_SIZE(samsung_keypad_resources),
838         .resource       = samsung_keypad_resources,
839 };
840
841 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
842 {
843         struct samsung_keypad_platdata *npd;
844
845         npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
846                         &samsung_device_keypad);
847
848         if (!npd->cfg_gpio)
849                 npd->cfg_gpio = samsung_keypad_cfg_gpio;
850 }
851 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
852
853 /* LCD Controller */
854
855 #ifdef CONFIG_PLAT_S3C24XX
856 static struct resource s3c_lcd_resource[] = {
857         [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
858         [1] = DEFINE_RES_IRQ(IRQ_LCD),
859 };
860
861 struct platform_device s3c_device_lcd = {
862         .name           = "s3c2410-lcd",
863         .id             = -1,
864         .num_resources  = ARRAY_SIZE(s3c_lcd_resource),
865         .resource       = s3c_lcd_resource,
866         .dev            = {
867                 .dma_mask               = &samsung_device_dma_mask,
868                 .coherent_dma_mask      = DMA_BIT_MASK(32),
869         }
870 };
871
872 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
873 {
874         struct s3c2410fb_mach_info *npd;
875
876         npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
877         if (npd) {
878                 npd->displays = kmemdup(pd->displays,
879                         sizeof(struct s3c2410fb_display) * npd->num_displays,
880                         GFP_KERNEL);
881                 if (!npd->displays)
882                         printk(KERN_ERR "no memory for LCD display data\n");
883         } else {
884                 printk(KERN_ERR "no memory for LCD platform data\n");
885         }
886 }
887 #endif /* CONFIG_PLAT_S3C24XX */
888
889 /* MFC */
890
891 #ifdef CONFIG_S5P_DEV_MFC
892 static struct resource s5p_mfc_resource[] = {
893         [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
894         [1] = DEFINE_RES_IRQ(IRQ_MFC),
895 };
896
897 struct platform_device s5p_device_mfc = {
898         .name           = "s5p-mfc",
899         .id             = -1,
900         .num_resources  = ARRAY_SIZE(s5p_mfc_resource),
901         .resource       = s5p_mfc_resource,
902 };
903
904 /*
905  * MFC hardware has 2 memory interfaces which are modelled as two separate
906  * platform devices to let dma-mapping distinguish between them.
907  *
908  * MFC parent device (s5p_device_mfc) must be registered before memory
909  * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
910  */
911
912 struct platform_device s5p_device_mfc_l = {
913         .name           = "s5p-mfc-l",
914         .id             = -1,
915         .dev            = {
916                 .parent                 = &s5p_device_mfc.dev,
917                 .dma_mask               = &samsung_device_dma_mask,
918                 .coherent_dma_mask      = DMA_BIT_MASK(32),
919         },
920 };
921
922 struct platform_device s5p_device_mfc_r = {
923         .name           = "s5p-mfc-r",
924         .id             = -1,
925         .dev            = {
926                 .parent                 = &s5p_device_mfc.dev,
927                 .dma_mask               = &samsung_device_dma_mask,
928                 .coherent_dma_mask      = DMA_BIT_MASK(32),
929         },
930 };
931 #endif /* CONFIG_S5P_DEV_MFC */
932
933 /* MIPI CSIS */
934
935 #ifdef CONFIG_S5P_DEV_CSIS0
936 static struct resource s5p_mipi_csis0_resource[] = {
937         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
938         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
939 };
940
941 struct platform_device s5p_device_mipi_csis0 = {
942         .name           = "s5p-mipi-csis",
943         .id             = 0,
944         .num_resources  = ARRAY_SIZE(s5p_mipi_csis0_resource),
945         .resource       = s5p_mipi_csis0_resource,
946 };
947 #endif /* CONFIG_S5P_DEV_CSIS0 */
948
949 #ifdef CONFIG_S5P_DEV_CSIS1
950 static struct resource s5p_mipi_csis1_resource[] = {
951         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
952         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
953 };
954
955 struct platform_device s5p_device_mipi_csis1 = {
956         .name           = "s5p-mipi-csis",
957         .id             = 1,
958         .num_resources  = ARRAY_SIZE(s5p_mipi_csis1_resource),
959         .resource       = s5p_mipi_csis1_resource,
960 };
961 #endif
962
963 /* NAND */
964
965 #ifdef CONFIG_S3C_DEV_NAND
966 static struct resource s3c_nand_resource[] = {
967         [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
968 };
969
970 struct platform_device s3c_device_nand = {
971         .name           = "s3c2410-nand",
972         .id             = -1,
973         .num_resources  = ARRAY_SIZE(s3c_nand_resource),
974         .resource       = s3c_nand_resource,
975 };
976
977 /*
978  * s3c_nand_copy_set() - copy nand set data
979  * @set: The new structure, directly copied from the old.
980  *
981  * Copy all the fields from the NAND set field from what is probably __initdata
982  * to new kernel memory. The code returns 0 if the copy happened correctly or
983  * an error code for the calling function to display.
984  *
985  * Note, we currently do not try and look to see if we've already copied the
986  * data in a previous set.
987  */
988 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
989 {
990         void *ptr;
991         int size;
992
993         size = sizeof(struct mtd_partition) * set->nr_partitions;
994         if (size) {
995                 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
996                 set->partitions = ptr;
997
998                 if (!ptr)
999                         return -ENOMEM;
1000         }
1001
1002         if (set->nr_map && set->nr_chips) {
1003                 size = sizeof(int) * set->nr_chips;
1004                 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
1005                 set->nr_map = ptr;
1006
1007                 if (!ptr)
1008                         return -ENOMEM;
1009         }
1010
1011         if (set->ecc_layout) {
1012                 ptr = kmemdup(set->ecc_layout,
1013                               sizeof(struct nand_ecclayout), GFP_KERNEL);
1014                 set->ecc_layout = ptr;
1015
1016                 if (!ptr)
1017                         return -ENOMEM;
1018         }
1019
1020         return 0;
1021 }
1022
1023 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1024 {
1025         struct s3c2410_platform_nand *npd;
1026         int size;
1027         int ret;
1028
1029         /* note, if we get a failure in allocation, we simply drop out of the
1030          * function. If there is so little memory available at initialisation
1031          * time then there is little chance the system is going to run.
1032          */
1033
1034         npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1035                                 &s3c_device_nand);
1036         if (!npd)
1037                 return;
1038
1039         /* now see if we need to copy any of the nand set data */
1040
1041         size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1042         if (size) {
1043                 struct s3c2410_nand_set *from = npd->sets;
1044                 struct s3c2410_nand_set *to;
1045                 int i;
1046
1047                 to = kmemdup(from, size, GFP_KERNEL);
1048                 npd->sets = to; /* set, even if we failed */
1049
1050                 if (!to) {
1051                         printk(KERN_ERR "%s: no memory for sets\n", __func__);
1052                         return;
1053                 }
1054
1055                 for (i = 0; i < npd->nr_sets; i++) {
1056                         ret = s3c_nand_copy_set(to);
1057                         if (ret) {
1058                                 printk(KERN_ERR "%s: failed to copy set %d\n",
1059                                 __func__, i);
1060                                 return;
1061                         }
1062                         to++;
1063                 }
1064         }
1065 }
1066 #endif /* CONFIG_S3C_DEV_NAND */
1067
1068 /* ONENAND */
1069
1070 #ifdef CONFIG_S3C_DEV_ONENAND
1071 static struct resource s3c_onenand_resources[] = {
1072         [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1073         [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1074         [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1075 };
1076
1077 struct platform_device s3c_device_onenand = {
1078         .name           = "samsung-onenand",
1079         .id             = 0,
1080         .num_resources  = ARRAY_SIZE(s3c_onenand_resources),
1081         .resource       = s3c_onenand_resources,
1082 };
1083 #endif /* CONFIG_S3C_DEV_ONENAND */
1084
1085 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1086 static struct resource s3c64xx_onenand1_resources[] = {
1087         [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1088         [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1089         [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1090 };
1091
1092 struct platform_device s3c64xx_device_onenand1 = {
1093         .name           = "samsung-onenand",
1094         .id             = 1,
1095         .num_resources  = ARRAY_SIZE(s3c64xx_onenand1_resources),
1096         .resource       = s3c64xx_onenand1_resources,
1097 };
1098
1099 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1100 {
1101         s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1102                          &s3c64xx_device_onenand1);
1103 }
1104 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1105
1106 #ifdef CONFIG_S5P_DEV_ONENAND
1107 static struct resource s5p_onenand_resources[] = {
1108         [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1109         [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1110         [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1111 };
1112
1113 struct platform_device s5p_device_onenand = {
1114         .name           = "s5pc110-onenand",
1115         .id             = -1,
1116         .num_resources  = ARRAY_SIZE(s5p_onenand_resources),
1117         .resource       = s5p_onenand_resources,
1118 };
1119 #endif /* CONFIG_S5P_DEV_ONENAND */
1120
1121 /* PMU */
1122
1123 #ifdef CONFIG_PLAT_S5P
1124 static struct resource s5p_pmu_resource[] = {
1125         DEFINE_RES_IRQ(IRQ_PMU)
1126 };
1127
1128 struct platform_device s5p_device_pmu = {
1129         .name           = "arm-pmu",
1130         .id             = ARM_PMU_DEVICE_CPU,
1131         .num_resources  = ARRAY_SIZE(s5p_pmu_resource),
1132         .resource       = s5p_pmu_resource,
1133 };
1134
1135 static int __init s5p_pmu_init(void)
1136 {
1137         platform_device_register(&s5p_device_pmu);
1138         return 0;
1139 }
1140 arch_initcall(s5p_pmu_init);
1141 #endif /* CONFIG_PLAT_S5P */
1142
1143 /* PWM Timer */
1144
1145 #ifdef CONFIG_SAMSUNG_DEV_PWM
1146
1147 #define TIMER_RESOURCE_SIZE (1)
1148
1149 #define TIMER_RESOURCE(_tmr, _irq)                      \
1150         (struct resource [TIMER_RESOURCE_SIZE]) {       \
1151                 [0] = {                                 \
1152                         .start  = _irq,                 \
1153                         .end    = _irq,                 \
1154                         .flags  = IORESOURCE_IRQ        \
1155                 }                                       \
1156         }
1157
1158 #define DEFINE_S3C_TIMER(_tmr_no, _irq)                 \
1159         .name           = "s3c24xx-pwm",                \
1160         .id             = _tmr_no,                      \
1161         .num_resources  = TIMER_RESOURCE_SIZE,          \
1162         .resource       = TIMER_RESOURCE(_tmr_no, _irq),        \
1163
1164 /*
1165  * since we already have an static mapping for the timer,
1166  * we do not bother setting any IO resource for the base.
1167  */
1168
1169 struct platform_device s3c_device_timer[] = {
1170         [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1171         [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1172         [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1173         [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1174         [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1175 };
1176 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1177
1178 /* RTC */
1179
1180 #ifdef CONFIG_PLAT_S3C24XX
1181 static struct resource s3c_rtc_resource[] = {
1182         [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1183         [1] = DEFINE_RES_IRQ(IRQ_RTC),
1184         [2] = DEFINE_RES_IRQ(IRQ_TICK),
1185 };
1186
1187 struct platform_device s3c_device_rtc = {
1188         .name           = "s3c2410-rtc",
1189         .id             = -1,
1190         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1191         .resource       = s3c_rtc_resource,
1192 };
1193 #endif /* CONFIG_PLAT_S3C24XX */
1194
1195 #ifdef CONFIG_S3C_DEV_RTC
1196 static struct resource s3c_rtc_resource[] = {
1197         [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1198         [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1199         [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1200 };
1201
1202 struct platform_device s3c_device_rtc = {
1203         .name           = "s3c64xx-rtc",
1204         .id             = -1,
1205         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1206         .resource       = s3c_rtc_resource,
1207 };
1208 #endif /* CONFIG_S3C_DEV_RTC */
1209
1210 /* SDI */
1211
1212 #ifdef CONFIG_PLAT_S3C24XX
1213 static struct resource s3c_sdi_resource[] = {
1214         [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1215         [1] = DEFINE_RES_IRQ(IRQ_SDI),
1216 };
1217
1218 struct platform_device s3c_device_sdi = {
1219         .name           = "s3c2410-sdi",
1220         .id             = -1,
1221         .num_resources  = ARRAY_SIZE(s3c_sdi_resource),
1222         .resource       = s3c_sdi_resource,
1223 };
1224
1225 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1226 {
1227         s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1228                          &s3c_device_sdi);
1229 }
1230 #endif /* CONFIG_PLAT_S3C24XX */
1231
1232 /* SPI */
1233
1234 #ifdef CONFIG_PLAT_S3C24XX
1235 static struct resource s3c_spi0_resource[] = {
1236         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1237         [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1238 };
1239
1240 struct platform_device s3c_device_spi0 = {
1241         .name           = "s3c2410-spi",
1242         .id             = 0,
1243         .num_resources  = ARRAY_SIZE(s3c_spi0_resource),
1244         .resource       = s3c_spi0_resource,
1245         .dev            = {
1246                 .dma_mask               = &samsung_device_dma_mask,
1247                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1248         }
1249 };
1250
1251 static struct resource s3c_spi1_resource[] = {
1252         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1253         [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1254 };
1255
1256 struct platform_device s3c_device_spi1 = {
1257         .name           = "s3c2410-spi",
1258         .id             = 1,
1259         .num_resources  = ARRAY_SIZE(s3c_spi1_resource),
1260         .resource       = s3c_spi1_resource,
1261         .dev            = {
1262                 .dma_mask               = &samsung_device_dma_mask,
1263                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1264         }
1265 };
1266 #endif /* CONFIG_PLAT_S3C24XX */
1267
1268 /* Touchscreen */
1269
1270 #ifdef CONFIG_PLAT_S3C24XX
1271 static struct resource s3c_ts_resource[] = {
1272         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1273         [1] = DEFINE_RES_IRQ(IRQ_TC),
1274 };
1275
1276 struct platform_device s3c_device_ts = {
1277         .name           = "s3c2410-ts",
1278         .id             = -1,
1279         .dev.parent     = &s3c_device_adc.dev,
1280         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1281         .resource       = s3c_ts_resource,
1282 };
1283
1284 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1285 {
1286         s3c_set_platdata(hard_s3c2410ts_info,
1287                          sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1288 }
1289 #endif /* CONFIG_PLAT_S3C24XX */
1290
1291 #ifdef CONFIG_SAMSUNG_DEV_TS
1292 static struct resource s3c_ts_resource[] = {
1293         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1294         [1] = DEFINE_RES_IRQ(IRQ_TC),
1295 };
1296
1297 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1298         .delay                  = 10000,
1299         .presc                  = 49,
1300         .oversampling_shift     = 2,
1301 };
1302
1303 struct platform_device s3c_device_ts = {
1304         .name           = "s3c64xx-ts",
1305         .id             = -1,
1306         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1307         .resource       = s3c_ts_resource,
1308 };
1309
1310 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1311 {
1312         if (!pd)
1313                 pd = &default_ts_data;
1314
1315         s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1316                          &s3c_device_ts);
1317 }
1318 #endif /* CONFIG_SAMSUNG_DEV_TS */
1319
1320 /* TV */
1321
1322 #ifdef CONFIG_S5P_DEV_TV
1323
1324 static struct resource s5p_hdmi_resources[] = {
1325         [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1326         [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1327 };
1328
1329 struct platform_device s5p_device_hdmi = {
1330         .name           = "s5p-hdmi",
1331         .id             = -1,
1332         .num_resources  = ARRAY_SIZE(s5p_hdmi_resources),
1333         .resource       = s5p_hdmi_resources,
1334 };
1335
1336 static struct resource s5p_sdo_resources[] = {
1337         [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1338         [1] = DEFINE_RES_IRQ(IRQ_SDO),
1339 };
1340
1341 struct platform_device s5p_device_sdo = {
1342         .name           = "s5p-sdo",
1343         .id             = -1,
1344         .num_resources  = ARRAY_SIZE(s5p_sdo_resources),
1345         .resource       = s5p_sdo_resources,
1346 };
1347
1348 static struct resource s5p_mixer_resources[] = {
1349         [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1350         [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1351         [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1352 };
1353
1354 struct platform_device s5p_device_mixer = {
1355         .name           = "s5p-mixer",
1356         .id             = -1,
1357         .num_resources  = ARRAY_SIZE(s5p_mixer_resources),
1358         .resource       = s5p_mixer_resources,
1359         .dev            = {
1360                 .dma_mask               = &samsung_device_dma_mask,
1361                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1362         }
1363 };
1364 #endif /* CONFIG_S5P_DEV_TV */
1365
1366 /* USB */
1367
1368 #ifdef CONFIG_S3C_DEV_USB_HOST
1369 static struct resource s3c_usb_resource[] = {
1370         [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1371         [1] = DEFINE_RES_IRQ(IRQ_USBH),
1372 };
1373
1374 struct platform_device s3c_device_ohci = {
1375         .name           = "s3c2410-ohci",
1376         .id             = -1,
1377         .num_resources  = ARRAY_SIZE(s3c_usb_resource),
1378         .resource       = s3c_usb_resource,
1379         .dev            = {
1380                 .dma_mask               = &samsung_device_dma_mask,
1381                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1382         }
1383 };
1384
1385 /*
1386  * s3c_ohci_set_platdata - initialise OHCI device platform data
1387  * @info: The platform data.
1388  *
1389  * This call copies the @info passed in and sets the device .platform_data
1390  * field to that copy. The @info is copied so that the original can be marked
1391  * __initdata.
1392  */
1393
1394 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1395 {
1396         s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1397                          &s3c_device_ohci);
1398 }
1399 #endif /* CONFIG_S3C_DEV_USB_HOST */
1400
1401 /* USB Device (Gadget) */
1402
1403 #ifdef CONFIG_PLAT_S3C24XX
1404 static struct resource s3c_usbgadget_resource[] = {
1405         [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1406         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1407 };
1408
1409 struct platform_device s3c_device_usbgadget = {
1410         .name           = "s3c2410-usbgadget",
1411         .id             = -1,
1412         .num_resources  = ARRAY_SIZE(s3c_usbgadget_resource),
1413         .resource       = s3c_usbgadget_resource,
1414 };
1415
1416 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1417 {
1418         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1419 }
1420 #endif /* CONFIG_PLAT_S3C24XX */
1421
1422 /* USB EHCI Host Controller */
1423
1424 #ifdef CONFIG_S5P_DEV_USB_EHCI
1425 static struct resource s5p_ehci_resource[] = {
1426         [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1427         [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1428 };
1429
1430 struct platform_device s5p_device_ehci = {
1431         .name           = "s5p-ehci",
1432         .id             = -1,
1433         .num_resources  = ARRAY_SIZE(s5p_ehci_resource),
1434         .resource       = s5p_ehci_resource,
1435         .dev            = {
1436                 .dma_mask               = &samsung_device_dma_mask,
1437                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1438         }
1439 };
1440
1441 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1442 {
1443         struct s5p_ehci_platdata *npd;
1444
1445         npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1446                         &s5p_device_ehci);
1447
1448         if (!npd->phy_init)
1449                 npd->phy_init = s5p_usb_phy_init;
1450         if (!npd->phy_exit)
1451                 npd->phy_exit = s5p_usb_phy_exit;
1452 }
1453 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1454
1455 /* USB HSOTG */
1456
1457 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1458 static struct resource s3c_usb_hsotg_resources[] = {
1459         [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
1460         [1] = DEFINE_RES_IRQ(IRQ_OTG),
1461 };
1462
1463 struct platform_device s3c_device_usb_hsotg = {
1464         .name           = "s3c-hsotg",
1465         .id             = -1,
1466         .num_resources  = ARRAY_SIZE(s3c_usb_hsotg_resources),
1467         .resource       = s3c_usb_hsotg_resources,
1468         .dev            = {
1469                 .dma_mask               = &samsung_device_dma_mask,
1470                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1471         },
1472 };
1473
1474 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1475 {
1476         struct s3c_hsotg_plat *npd;
1477
1478         npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1479                         &s3c_device_usb_hsotg);
1480
1481         if (!npd->phy_init)
1482                 npd->phy_init = s5p_usb_phy_init;
1483         if (!npd->phy_exit)
1484                 npd->phy_exit = s5p_usb_phy_exit;
1485 }
1486 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1487
1488 /* USB High Spped 2.0 Device (Gadget) */
1489
1490 #ifdef CONFIG_PLAT_S3C24XX
1491 static struct resource s3c_hsudc_resource[] = {
1492         [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1493         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1494 };
1495
1496 struct platform_device s3c_device_usb_hsudc = {
1497         .name           = "s3c-hsudc",
1498         .id             = -1,
1499         .num_resources  = ARRAY_SIZE(s3c_hsudc_resource),
1500         .resource       = s3c_hsudc_resource,
1501         .dev            = {
1502                 .dma_mask               = &samsung_device_dma_mask,
1503                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1504         },
1505 };
1506
1507 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1508 {
1509         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1510 }
1511 #endif /* CONFIG_PLAT_S3C24XX */
1512
1513 /* WDT */
1514
1515 #ifdef CONFIG_S3C_DEV_WDT
1516 static struct resource s3c_wdt_resource[] = {
1517         [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1518         [1] = DEFINE_RES_IRQ(IRQ_WDT),
1519 };
1520
1521 struct platform_device s3c_device_wdt = {
1522         .name           = "s3c2410-wdt",
1523         .id             = -1,
1524         .num_resources  = ARRAY_SIZE(s3c_wdt_resource),
1525         .resource       = s3c_wdt_resource,
1526 };
1527 #endif /* CONFIG_S3C_DEV_WDT */
1528
1529 #ifdef CONFIG_S3C64XX_DEV_SPI0
1530 static struct resource s3c64xx_spi0_resource[] = {
1531         [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1532         [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1533         [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1534         [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1535 };
1536
1537 struct platform_device s3c64xx_device_spi0 = {
1538         .name           = "s3c64xx-spi",
1539         .id             = 0,
1540         .num_resources  = ARRAY_SIZE(s3c64xx_spi0_resource),
1541         .resource       = s3c64xx_spi0_resource,
1542         .dev = {
1543                 .dma_mask               = &samsung_device_dma_mask,
1544                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1545         },
1546 };
1547
1548 void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1549                                       int src_clk_nr, int num_cs)
1550 {
1551         if (!pd) {
1552                 pr_err("%s:Need to pass platform data\n", __func__);
1553                 return;
1554         }
1555
1556         /* Reject invalid configuration */
1557         if (!num_cs || src_clk_nr < 0) {
1558                 pr_err("%s: Invalid SPI configuration\n", __func__);
1559                 return;
1560         }
1561
1562         pd->num_cs = num_cs;
1563         pd->src_clk_nr = src_clk_nr;
1564         if (!pd->cfg_gpio)
1565                 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1566
1567         s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
1568 }
1569 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1570
1571 #ifdef CONFIG_S3C64XX_DEV_SPI1
1572 static struct resource s3c64xx_spi1_resource[] = {
1573         [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1574         [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1575         [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1576         [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1577 };
1578
1579 struct platform_device s3c64xx_device_spi1 = {
1580         .name           = "s3c64xx-spi",
1581         .id             = 1,
1582         .num_resources  = ARRAY_SIZE(s3c64xx_spi1_resource),
1583         .resource       = s3c64xx_spi1_resource,
1584         .dev = {
1585                 .dma_mask               = &samsung_device_dma_mask,
1586                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1587         },
1588 };
1589
1590 void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
1591                                       int src_clk_nr, int num_cs)
1592 {
1593         if (!pd) {
1594                 pr_err("%s:Need to pass platform data\n", __func__);
1595                 return;
1596         }
1597
1598         /* Reject invalid configuration */
1599         if (!num_cs || src_clk_nr < 0) {
1600                 pr_err("%s: Invalid SPI configuration\n", __func__);
1601                 return;
1602         }
1603
1604         pd->num_cs = num_cs;
1605         pd->src_clk_nr = src_clk_nr;
1606         if (!pd->cfg_gpio)
1607                 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1608
1609         s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
1610 }
1611 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1612
1613 #ifdef CONFIG_S3C64XX_DEV_SPI2
1614 static struct resource s3c64xx_spi2_resource[] = {
1615         [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1616         [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1617         [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1618         [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1619 };
1620
1621 struct platform_device s3c64xx_device_spi2 = {
1622         .name           = "s3c64xx-spi",
1623         .id             = 2,
1624         .num_resources  = ARRAY_SIZE(s3c64xx_spi2_resource),
1625         .resource       = s3c64xx_spi2_resource,
1626         .dev = {
1627                 .dma_mask               = &samsung_device_dma_mask,
1628                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1629         },
1630 };
1631
1632 void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1633                                       int src_clk_nr, int num_cs)
1634 {
1635         if (!pd) {
1636                 pr_err("%s:Need to pass platform data\n", __func__);
1637                 return;
1638         }
1639
1640         /* Reject invalid configuration */
1641         if (!num_cs || src_clk_nr < 0) {
1642                 pr_err("%s: Invalid SPI configuration\n", __func__);
1643                 return;
1644         }
1645
1646         pd->num_cs = num_cs;
1647         pd->src_clk_nr = src_clk_nr;
1648         if (!pd->cfg_gpio)
1649                 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1650
1651         s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
1652 }
1653 #endif /* CONFIG_S3C64XX_DEV_SPI2 */