arch/arm64/boot/dts/amlogic/meson-sm1.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2019 BayLibre, SAS
   4  * Author: Neil Armstrong <narmstrong@baylibre.com>
   5  */
   6
   7 #include "meson-g12-common.dtsi"
   8
   9 / {
  10         compatible = "amlogic,sm1";
  11
  12         cpus {
  13                 #address-cells = <0x2>;
  14                 #size-cells = <0x0>;
  15
  16                 cpu0: cpu@0 {
  17                         device_type = "cpu";
  18                         compatible = "arm,cortex-a55";
  19                         reg = <0x0 0x0>;
  20                         enable-method = "psci";
  21                         next-level-cache = <&l2>;
  22                 };
  23
  24                 cpu1: cpu@1 {
  25                         device_type = "cpu";
  26                         compatible = "arm,cortex-a55";
  27                         reg = <0x0 0x1>;
  28                         enable-method = "psci";
  29                         next-level-cache = <&l2>;
  30                 };
  31
  32                 cpu2: cpu@2 {
  33                         device_type = "cpu";
  34                         compatible = "arm,cortex-a55";
  35                         reg = <0x0 0x2>;
  36                         enable-method = "psci";
  37                         next-level-cache = <&l2>;
  38                 };
  39
  40                 cpu3: cpu@3 {
  41                         device_type = "cpu";
  42                         compatible = "arm,cortex-a55";
  43                         reg = <0x0 0x3>;
  44                         enable-method = "psci";
  45                         next-level-cache = <&l2>;
  46                 };
  47
  48                 l2: l2-cache0 {
  49                         compatible = "cache";
  50                 };
  51         };
  52 };
  53
  54 &cecb_AO {
  55         compatible = "amlogic,meson-sm1-ao-cec";
  56 };
  57
  58 &clk_msr {
  59         compatible = "amlogic,meson-sm1-clk-measure";
  60 };
  61
  62 &pwrc_vpu {
  63         status = "disabled";
  64 };
  65
  66 &vpu {
  67         status = "disabled";
  68 };