arch/arm64/boot/dts/marvell/armada-cp110.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (C) 2016 Marvell Technology Group Ltd.
   4  *
   5  * Device Tree file for Marvell Armada CP110.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
   9 #include <dt-bindings/thermal/thermal.h>
  10
  11 #include "armada-common.dtsi"
  12
  13 #define CP110_PCIEx_IO_BASE(iface)      (CP110_PCIE_IO_BASE + (iface *  0x10000))
  14 #define CP110_PCIEx_MEM_BASE(iface)     (CP110_PCIE_MEM_BASE + (iface *  0x1000000))
  15 #define CP110_PCIEx_CONF_BASE(iface)    (CP110_PCIEx_MEM_BASE(iface) + 0xf00000)
  16
  17 / {
  18         /*
  19          * The contents of the node are defined below, in order to
  20          * save one indentation level
  21          */
  22         CP110_NAME: CP110_NAME { };
  23
  24         /*
  25          * CPs only have one sensor in the thermal IC.
  26          *
  27          * The cooling maps are empty as there are no cooling devices.
  28          */
  29         thermal-zones {
  30                 CP110_LABEL(thermal_ic): CP110_NODE_NAME(thermal-ic) {
  31                         polling-delay-passive = <0>; /* Interrupt driven */
  32                         polling-delay = <0>; /* Interrupt driven */
  33
  34                         thermal-sensors = <&CP110_LABEL(thermal) 0>;
  35
  36                         trips {
  37                                 CP110_LABEL(crit): crit {
  38                                         temperature = <100000>; /* mC degrees */
  39                                         hysteresis = <2000>; /* mC degrees */
  40                                         type = "critical";
  41                                 };
  42                         };
  43
  44                         cooling-maps { };
  45                 };
  46         };
  47 };
  48
  49 &CP110_NAME {
  50         #address-cells = <2>;
  51         #size-cells = <2>;
  52         compatible = "simple-bus";
  53         interrupt-parent = <&CP110_LABEL(icu_nsr)>;
  54         ranges;
  55
  56         config-space@CP110_BASE {
  57                 #address-cells = <1>;
  58                 #size-cells = <1>;
  59                 compatible = "simple-bus";
  60                 ranges = <0x0 0x0 ADDRESSIFY(CP110_BASE) 0x2000000>;
  61
  62                 CP110_LABEL(ethernet): ethernet@0 {
  63                         compatible = "marvell,armada-7k-pp22";
  64                         reg = <0x0 0x100000>, <0x129000 0xb000>;
  65                         clocks = <&CP110_LABEL(clk) 1 3>, <&CP110_LABEL(clk) 1 9>,
  66                                  <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>,
  67                                  <&CP110_LABEL(clk) 1 18>;
  68                         clock-names = "pp_clk", "gop_clk",
  69                                       "mg_clk", "mg_core_clk", "axi_clk";
  70                         marvell,system-controller = <&CP110_LABEL(syscon0)>;
  71                         status = "disabled";
  72                         dma-coherent;
  73
  74                         CP110_LABEL(eth0): eth0 {
  75                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>,
  76                                         <43 IRQ_TYPE_LEVEL_HIGH>,
  77                                         <47 IRQ_TYPE_LEVEL_HIGH>,
  78                                         <51 IRQ_TYPE_LEVEL_HIGH>,
  79                                         <55 IRQ_TYPE_LEVEL_HIGH>,
  80                                         <59 IRQ_TYPE_LEVEL_HIGH>,
  81                                         <63 IRQ_TYPE_LEVEL_HIGH>,
  82                                         <67 IRQ_TYPE_LEVEL_HIGH>,
  83                                         <71 IRQ_TYPE_LEVEL_HIGH>,
  84                                         <129 IRQ_TYPE_LEVEL_HIGH>;
  85                                 interrupt-names = "hif0", "hif1", "hif2",
  86                                         "hif3", "hif4", "hif5", "hif6", "hif7",
  87                                         "hif8", "link";
  88                                 port-id = <0>;
  89                                 gop-port-id = <0>;
  90                                 status = "disabled";
  91                         };
  92
  93                         CP110_LABEL(eth1): eth1 {
  94                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH>,
  95                                         <44 IRQ_TYPE_LEVEL_HIGH>,
  96                                         <48 IRQ_TYPE_LEVEL_HIGH>,
  97                                         <52 IRQ_TYPE_LEVEL_HIGH>,
  98                                         <56 IRQ_TYPE_LEVEL_HIGH>,
  99                                         <60 IRQ_TYPE_LEVEL_HIGH>,
 100                                         <64 IRQ_TYPE_LEVEL_HIGH>,
 101                                         <68 IRQ_TYPE_LEVEL_HIGH>,
 102                                         <72 IRQ_TYPE_LEVEL_HIGH>,
 103                                         <128 IRQ_TYPE_LEVEL_HIGH>;
 104                                 interrupt-names = "hif0", "hif1", "hif2",
 105                                         "hif3", "hif4", "hif5", "hif6", "hif7",
 106                                         "hif8", "link";
 107                                 port-id = <1>;
 108                                 gop-port-id = <2>;
 109                                 status = "disabled";
 110                         };
 111
 112                         CP110_LABEL(eth2): eth2 {
 113                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH>,
 114                                         <45 IRQ_TYPE_LEVEL_HIGH>,
 115                                         <49 IRQ_TYPE_LEVEL_HIGH>,
 116                                         <53 IRQ_TYPE_LEVEL_HIGH>,
 117                                         <57 IRQ_TYPE_LEVEL_HIGH>,
 118                                         <61 IRQ_TYPE_LEVEL_HIGH>,
 119                                         <65 IRQ_TYPE_LEVEL_HIGH>,
 120                                         <69 IRQ_TYPE_LEVEL_HIGH>,
 121                                         <73 IRQ_TYPE_LEVEL_HIGH>,
 122                                         <127 IRQ_TYPE_LEVEL_HIGH>;
 123                                 interrupt-names = "hif0", "hif1", "hif2",
 124                                         "hif3", "hif4", "hif5", "hif6", "hif7",
 125                                         "hif8", "link";
 126                                 port-id = <2>;
 127                                 gop-port-id = <3>;
 128                                 status = "disabled";
 129                         };
 130                 };
 131
 132                 CP110_LABEL(comphy): phy@120000 {
 133                         compatible = "marvell,comphy-cp110";
 134                         reg = <0x120000 0x6000>;
 135                         marvell,system-controller = <&CP110_LABEL(syscon0)>;
 136                         clocks = <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>,
 137                                  <&CP110_LABEL(clk) 1 18>;
 138                         clock-names = "mg_clk", "mg_core_clk", "axi_clk";
 139                         #address-cells = <1>;
 140                         #size-cells = <0>;
 141
 142                         CP110_LABEL(comphy0): phy@0 {
 143                                 reg = <0>;
 144                                 #phy-cells = <1>;
 145                         };
 146
 147                         CP110_LABEL(comphy1): phy@1 {
 148                                 reg = <1>;
 149                                 #phy-cells = <1>;
 150                         };
 151
 152                         CP110_LABEL(comphy2): phy@2 {
 153                                 reg = <2>;
 154                                 #phy-cells = <1>;
 155                         };
 156
 157                         CP110_LABEL(comphy3): phy@3 {
 158                                 reg = <3>;
 159                                 #phy-cells = <1>;
 160                         };
 161
 162                         CP110_LABEL(comphy4): phy@4 {
 163                                 reg = <4>;
 164                                 #phy-cells = <1>;
 165                         };
 166
 167                         CP110_LABEL(comphy5): phy@5 {
 168                                 reg = <5>;
 169                                 #phy-cells = <1>;
 170                         };
 171                 };
 172
 173                 CP110_LABEL(mdio): mdio@12a200 {
 174                         #address-cells = <1>;
 175                         #size-cells = <0>;
 176                         compatible = "marvell,orion-mdio";
 177                         reg = <0x12a200 0x10>;
 178                         clocks = <&CP110_LABEL(clk) 1 9>, <&CP110_LABEL(clk) 1 5>,
 179                                  <&CP110_LABEL(clk) 1 6>, <&CP110_LABEL(clk) 1 18>;
 180                         status = "disabled";
 181                 };
 182
 183                 CP110_LABEL(xmdio): mdio@12a600 {
 184                         #address-cells = <1>;
 185                         #size-cells = <0>;
 186                         compatible = "marvell,xmdio";
 187                         reg = <0x12a600 0x10>;
 188                         clocks = <&CP110_LABEL(clk) 1 5>,
 189                                  <&CP110_LABEL(clk) 1 6>, <&CP110_LABEL(clk) 1 18>;
 190                         status = "disabled";
 191                 };
 192
 193                 CP110_LABEL(icu): interrupt-controller@1e0000 {
 194                         compatible = "marvell,cp110-icu";
 195                         reg = <0x1e0000 0x440>;
 196                         #address-cells = <1>;
 197                         #size-cells = <1>;
 198
 199                         CP110_LABEL(icu_nsr): interrupt-controller@10 {
 200                                 compatible = "marvell,cp110-icu-nsr";
 201                                 reg = <0x10 0x20>;
 202                                 #interrupt-cells = <2>;
 203                                 interrupt-controller;
 204                                 msi-parent = <&gicp>;
 205                         };
 206
 207                         CP110_LABEL(icu_sei): interrupt-controller@50 {
 208                                 compatible = "marvell,cp110-icu-sei";
 209                                 reg = <0x50 0x10>;
 210                                 #interrupt-cells = <2>;
 211                                 interrupt-controller;
 212                                 msi-parent = <&sei>;
 213                         };
 214                 };
 215
 216                 CP110_LABEL(rtc): rtc@284000 {
 217                         compatible = "marvell,armada-8k-rtc";
 218                         reg = <0x284000 0x20>, <0x284080 0x24>;
 219                         reg-names = "rtc", "rtc-soc";
 220                         interrupts = <77 IRQ_TYPE_LEVEL_HIGH>;
 221                 };
 222
 223                 CP110_LABEL(syscon0): system-controller@440000 {
 224                         compatible = "syscon", "simple-mfd";
 225                         reg = <0x440000 0x2000>;
 226
 227                         CP110_LABEL(clk): clock {
 228                                 compatible = "marvell,cp110-clock";
 229                                 #clock-cells = <2>;
 230                         };
 231
 232                         CP110_LABEL(gpio1): gpio@100 {
 233                                 compatible = "marvell,armada-8k-gpio";
 234                                 offset = <0x100>;
 235                                 ngpios = <32>;
 236                                 gpio-controller;
 237                                 #gpio-cells = <2>;
 238                                 gpio-ranges = <&CP110_LABEL(pinctrl) 0 0 32>;
 239                                 interrupt-controller;
 240                                 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>,
 241                                         <85 IRQ_TYPE_LEVEL_HIGH>,
 242                                         <84 IRQ_TYPE_LEVEL_HIGH>,
 243                                         <83 IRQ_TYPE_LEVEL_HIGH>;
 244                                 #interrupt-cells = <2>;
 245                                 status = "disabled";
 246                         };
 247
 248                         CP110_LABEL(gpio2): gpio@140 {
 249                                 compatible = "marvell,armada-8k-gpio";
 250                                 offset = <0x140>;
 251                                 ngpios = <31>;
 252                                 gpio-controller;
 253                                 #gpio-cells = <2>;
 254                                 gpio-ranges = <&CP110_LABEL(pinctrl) 0 32 31>;
 255                                 interrupt-controller;
 256                                 interrupts = <82 IRQ_TYPE_LEVEL_HIGH>,
 257                                         <81 IRQ_TYPE_LEVEL_HIGH>,
 258                                         <80 IRQ_TYPE_LEVEL_HIGH>,
 259                                         <79 IRQ_TYPE_LEVEL_HIGH>;
 260                                 #interrupt-cells = <2>;
 261                                 status = "disabled";
 262                         };
 263                 };
 264
 265                 CP110_LABEL(syscon1): system-controller@400000 {
 266                         compatible = "syscon", "simple-mfd";
 267                         reg = <0x400000 0x1000>;
 268                         #address-cells = <1>;
 269                         #size-cells = <1>;
 270
 271                         CP110_LABEL(thermal): thermal-sensor@70 {
 272                                 compatible = "marvell,armada-cp110-thermal";
 273                                 reg = <0x70 0x10>;
 274                                 interrupts-extended =
 275                                         <&CP110_LABEL(icu_sei) 116 IRQ_TYPE_LEVEL_HIGH>;
 276                                 #thermal-sensor-cells = <1>;
 277                         };
 278                 };
 279
 280                 CP110_LABEL(usb3_0): usb3@500000 {
 281                         compatible = "marvell,armada-8k-xhci",
 282                         "generic-xhci";
 283                         reg = <0x500000 0x4000>;
 284                         dma-coherent;
 285                         interrupts = <106 IRQ_TYPE_LEVEL_HIGH>;
 286                         clock-names = "core", "reg";
 287                         clocks = <&CP110_LABEL(clk) 1 22>,
 288                                  <&CP110_LABEL(clk) 1 16>;
 289                         status = "disabled";
 290                 };
 291
 292                 CP110_LABEL(usb3_1): usb3@510000 {
 293                         compatible = "marvell,armada-8k-xhci",
 294                         "generic-xhci";
 295                         reg = <0x510000 0x4000>;
 296                         dma-coherent;
 297                         interrupts = <105 IRQ_TYPE_LEVEL_HIGH>;
 298                         clock-names = "core", "reg";
 299                         clocks = <&CP110_LABEL(clk) 1 23>,
 300                                  <&CP110_LABEL(clk) 1 16>;
 301                         status = "disabled";
 302                 };
 303
 304                 CP110_LABEL(sata0): sata@540000 {
 305                         compatible = "marvell,armada-8k-ahci",
 306                         "generic-ahci";
 307                         reg = <0x540000 0x30000>;
 308                         dma-coherent;
 309                         interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
 310                         clocks = <&CP110_LABEL(clk) 1 15>,
 311                                  <&CP110_LABEL(clk) 1 16>;
 312                         status = "disabled";
 313                 };
 314
 315                 CP110_LABEL(xor0): xor@6a0000 {
 316                         compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 317                         reg = <0x6a0000 0x1000>, <0x6b0000 0x1000>;
 318                         dma-coherent;
 319                         msi-parent = <&gic_v2m0>;
 320                         clock-names = "core", "reg";
 321                         clocks = <&CP110_LABEL(clk) 1 8>,
 322                                  <&CP110_LABEL(clk) 1 14>;
 323                 };
 324
 325                 CP110_LABEL(xor1): xor@6c0000 {
 326                         compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 327                         reg = <0x6c0000 0x1000>, <0x6d0000 0x1000>;
 328                         dma-coherent;
 329                         msi-parent = <&gic_v2m0>;
 330                         clock-names = "core", "reg";
 331                         clocks = <&CP110_LABEL(clk) 1 7>,
 332                                  <&CP110_LABEL(clk) 1 14>;
 333                 };
 334
 335                 CP110_LABEL(spi0): spi@700600 {
 336                         compatible = "marvell,armada-380-spi";
 337                         reg = <0x700600 0x50>;
 338                         #address-cells = <0x1>;
 339                         #size-cells = <0x0>;
 340                         clock-names = "core", "axi";
 341                         clocks = <&CP110_LABEL(clk) 1 21>,
 342                                  <&CP110_LABEL(clk) 1 17>;
 343                         status = "disabled";
 344                 };
 345
 346                 CP110_LABEL(spi1): spi@700680 {
 347                         compatible = "marvell,armada-380-spi";
 348                         reg = <0x700680 0x50>;
 349                         #address-cells = <1>;
 350                         #size-cells = <0>;
 351                         clock-names = "core", "axi";
 352                         clocks = <&CP110_LABEL(clk) 1 21>,
 353                                  <&CP110_LABEL(clk) 1 17>;
 354                         status = "disabled";
 355                 };
 356
 357                 CP110_LABEL(i2c0): i2c@701000 {
 358                         compatible = "marvell,mv78230-i2c";
 359                         reg = <0x701000 0x20>;
 360                         #address-cells = <1>;
 361                         #size-cells = <0>;
 362                         interrupts = <120 IRQ_TYPE_LEVEL_HIGH>;
 363                         clock-names = "core", "reg";
 364                         clocks = <&CP110_LABEL(clk) 1 21>,
 365                                  <&CP110_LABEL(clk) 1 17>;
 366                         status = "disabled";
 367                 };
 368
 369                 CP110_LABEL(i2c1): i2c@701100 {
 370                         compatible = "marvell,mv78230-i2c";
 371                         reg = <0x701100 0x20>;
 372                         #address-cells = <1>;
 373                         #size-cells = <0>;
 374                         interrupts = <121 IRQ_TYPE_LEVEL_HIGH>;
 375                         clock-names = "core", "reg";
 376                         clocks = <&CP110_LABEL(clk) 1 21>,
 377                                  <&CP110_LABEL(clk) 1 17>;
 378                         status = "disabled";
 379                 };
 380
 381                 CP110_LABEL(uart0): serial@702000 {
 382                         compatible = "snps,dw-apb-uart";
 383                         reg = <0x702000 0x100>;
 384                         reg-shift = <2>;
 385                         interrupts = <122 IRQ_TYPE_LEVEL_HIGH>;
 386                         reg-io-width = <1>;
 387                         clock-names = "baudclk", "apb_pclk";
 388                         clocks = <&CP110_LABEL(clk) 1 21>,
 389                                  <&CP110_LABEL(clk) 1 17>;
 390                         status = "disabled";
 391                 };
 392
 393                 CP110_LABEL(uart1): serial@702100 {
 394                         compatible = "snps,dw-apb-uart";
 395                         reg = <0x702100 0x100>;
 396                         reg-shift = <2>;
 397                         interrupts = <123 IRQ_TYPE_LEVEL_HIGH>;
 398                         reg-io-width = <1>;
 399                         clock-names = "baudclk", "apb_pclk";
 400                         clocks = <&CP110_LABEL(clk) 1 21>,
 401                                  <&CP110_LABEL(clk) 1 17>;
 402                         status = "disabled";
 403                 };
 404
 405                 CP110_LABEL(uart2): serial@702200 {
 406                         compatible = "snps,dw-apb-uart";
 407                         reg = <0x702200 0x100>;
 408                         reg-shift = <2>;
 409                         interrupts = <124 IRQ_TYPE_LEVEL_HIGH>;
 410                         reg-io-width = <1>;
 411                         clock-names = "baudclk", "apb_pclk";
 412                         clocks = <&CP110_LABEL(clk) 1 21>,
 413                                  <&CP110_LABEL(clk) 1 17>;
 414                         status = "disabled";
 415                 };
 416
 417                 CP110_LABEL(uart3): serial@702300 {
 418                         compatible = "snps,dw-apb-uart";
 419                         reg = <0x702300 0x100>;
 420                         reg-shift = <2>;
 421                         interrupts = <125 IRQ_TYPE_LEVEL_HIGH>;
 422                         reg-io-width = <1>;
 423                         clock-names = "baudclk", "apb_pclk";
 424                         clocks = <&CP110_LABEL(clk) 1 21>,
 425                                  <&CP110_LABEL(clk) 1 17>;
 426                         status = "disabled";
 427                 };
 428
 429                 CP110_LABEL(nand_controller): nand@720000 {
 430                         /*
 431                         * Due to the limitation of the pins available
 432                         * this controller is only usable on the CPM
 433                         * for A7K and on the CPS for A8K.
 434                         */
 435                         compatible = "marvell,armada-8k-nand-controller",
 436                                 "marvell,armada370-nand-controller";
 437                         reg = <0x720000 0x54>;
 438                         #address-cells = <1>;
 439                         #size-cells = <0>;
 440                         interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
 441                         clock-names = "core", "reg";
 442                         clocks = <&CP110_LABEL(clk) 1 2>,
 443                                  <&CP110_LABEL(clk) 1 17>;
 444                         marvell,system-controller = <&CP110_LABEL(syscon0)>;
 445                         status = "disabled";
 446                 };
 447
 448                 CP110_LABEL(trng): trng@760000 {
 449                         compatible = "marvell,armada-8k-rng",
 450                         "inside-secure,safexcel-eip76";
 451                         reg = <0x760000 0x7d>;
 452                         interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
 453                         clock-names = "core", "reg";
 454                         clocks = <&CP110_LABEL(clk) 1 25>,
 455                                  <&CP110_LABEL(clk) 1 17>;
 456                         status = "okay";
 457                 };
 458
 459                 CP110_LABEL(sdhci0): sdhci@780000 {
 460                         compatible = "marvell,armada-cp110-sdhci";
 461                         reg = <0x780000 0x300>;
 462                         interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
 463                         clock-names = "core", "axi";
 464                         clocks = <&CP110_LABEL(clk) 1 4>, <&CP110_LABEL(clk) 1 18>;
 465                         dma-coherent;
 466                         status = "disabled";
 467                 };
 468
 469                 CP110_LABEL(crypto): crypto@800000 {
 470                         compatible = "inside-secure,safexcel-eip197b";
 471                         reg = <0x800000 0x200000>;
 472                         interrupts = <87 IRQ_TYPE_LEVEL_HIGH>,
 473                                 <88 IRQ_TYPE_LEVEL_HIGH>,
 474                                 <89 IRQ_TYPE_LEVEL_HIGH>,
 475                                 <90 IRQ_TYPE_LEVEL_HIGH>,
 476                                 <91 IRQ_TYPE_LEVEL_HIGH>,
 477                                 <92 IRQ_TYPE_LEVEL_HIGH>;
 478                         interrupt-names = "mem", "ring0", "ring1",
 479                                 "ring2", "ring3", "eip";
 480                         clock-names = "core", "reg";
 481                         clocks = <&CP110_LABEL(clk) 1 26>,
 482                                  <&CP110_LABEL(clk) 1 17>;
 483                         dma-coherent;
 484                 };
 485         };
 486
 487         CP110_LABEL(pcie0): pcie@CP110_PCIE0_BASE {
 488                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 489                 reg = <0 ADDRESSIFY(CP110_PCIE0_BASE) 0 0x10000>,
 490                       <0 CP110_PCIEx_CONF_BASE(0) 0 0x80000>;
 491                 reg-names = "ctrl", "config";
 492                 #address-cells = <3>;
 493                 #size-cells = <2>;
 494                 #interrupt-cells = <1>;
 495                 device_type = "pci";
 496                 dma-coherent;
 497                 msi-parent = <&gic_v2m0>;
 498
 499                 bus-range = <0 0xff>;
 500                 ranges =
 501                 /* downstream I/O */
 502                 <0x81000000 0 CP110_PCIEx_IO_BASE(0) 0  CP110_PCIEx_IO_BASE(0) 0 0x10000
 503                 /* non-prefetchable memory */
 504                 0x82000000 0 CP110_PCIEx_MEM_BASE(0) 0  CP110_PCIEx_MEM_BASE(0) 0 0xf00000>;
 505                 interrupt-map-mask = <0 0 0 0>;
 506                 interrupt-map = <0 0 0 0 &CP110_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>;
 507                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
 508                 num-lanes = <1>;
 509                 clock-names = "core", "reg";
 510                 clocks = <&CP110_LABEL(clk) 1 13>, <&CP110_LABEL(clk) 1 14>;
 511                 status = "disabled";
 512         };
 513
 514         CP110_LABEL(pcie1): pcie@CP110_PCIE1_BASE {
 515                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 516                 reg = <0 ADDRESSIFY(CP110_PCIE1_BASE) 0 0x10000>,
 517                       <0 CP110_PCIEx_CONF_BASE(1) 0 0x80000>;
 518                 reg-names = "ctrl", "config";
 519                 #address-cells = <3>;
 520                 #size-cells = <2>;
 521                 #interrupt-cells = <1>;
 522                 device_type = "pci";
 523                 dma-coherent;
 524                 msi-parent = <&gic_v2m0>;
 525
 526                 bus-range = <0 0xff>;
 527                 ranges =
 528                 /* downstream I/O */
 529                 <0x81000000 0 CP110_PCIEx_IO_BASE(1) 0  CP110_PCIEx_IO_BASE(1) 0 0x10000
 530                 /* non-prefetchable memory */
 531                 0x82000000 0 CP110_PCIEx_MEM_BASE(1) 0  CP110_PCIEx_MEM_BASE(1) 0 0xf00000>;
 532                 interrupt-map-mask = <0 0 0 0>;
 533                 interrupt-map = <0 0 0 0 &CP110_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>;
 534                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
 535
 536                 num-lanes = <1>;
 537                 clock-names = "core", "reg";
 538                 clocks = <&CP110_LABEL(clk) 1 11>, <&CP110_LABEL(clk) 1 14>;
 539                 status = "disabled";
 540         };
 541
 542         CP110_LABEL(pcie2): pcie@CP110_PCIE2_BASE {
 543                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 544                 reg = <0 ADDRESSIFY(CP110_PCIE2_BASE) 0 0x10000>,
 545                       <0 CP110_PCIEx_CONF_BASE(2) 0 0x80000>;
 546                 reg-names = "ctrl", "config";
 547                 #address-cells = <3>;
 548                 #size-cells = <2>;
 549                 #interrupt-cells = <1>;
 550                 device_type = "pci";
 551                 dma-coherent;
 552                 msi-parent = <&gic_v2m0>;
 553
 554                 bus-range = <0 0xff>;
 555                 ranges =
 556                 /* downstream I/O */
 557                 <0x81000000 0 CP110_PCIEx_IO_BASE(2) 0  CP110_PCIEx_IO_BASE(2) 0 0x10000
 558                 /* non-prefetchable memory */
 559                 0x82000000 0 CP110_PCIEx_MEM_BASE(2) 0  CP110_PCIEx_MEM_BASE(2) 0 0xf00000>;
 560                 interrupt-map-mask = <0 0 0 0>;
 561                 interrupt-map = <0 0 0 0 &CP110_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>;
 562                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
 563
 564                 num-lanes = <1>;
 565                 clock-names = "core", "reg";
 566                 clocks = <&CP110_LABEL(clk) 1 12>, <&CP110_LABEL(clk) 1 14>;
 567                 status = "disabled";
 568         };
 569 };