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arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file
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1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Copyright (C) 2016 Marvell Technology Group Ltd.
4  *
5  * Device Tree file for Marvell Armada CP11x.
6  */
7
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
10
11 #include "armada-common.dtsi"
12
13 #define CP11X_PCIEx_MEM_BASE(iface)     (CP11X_PCIE_MEM_BASE + (iface *  0x1000000))
14 #define CP11X_PCIEx_CONF_BASE(iface)    (CP11X_PCIEx_MEM_BASE(iface) + 0xf00000)
15
16 / {
17         /*
18          * The contents of the node are defined below, in order to
19          * save one indentation level
20          */
21         CP11X_NAME: CP11X_NAME { };
22
23         /*
24          * CPs only have one sensor in the thermal IC.
25          *
26          * The cooling maps are empty as there are no cooling devices.
27          */
28         thermal-zones {
29                 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(thermal-ic) {
30                         polling-delay-passive = <0>; /* Interrupt driven */
31                         polling-delay = <0>; /* Interrupt driven */
32
33                         thermal-sensors = <&CP11X_LABEL(thermal) 0>;
34
35                         trips {
36                                 CP11X_LABEL(crit): crit {
37                                         temperature = <100000>; /* mC degrees */
38                                         hysteresis = <2000>; /* mC degrees */
39                                         type = "critical";
40                                 };
41                         };
42
43                         cooling-maps { };
44                 };
45         };
46 };
47
48 &CP11X_NAME {
49         #address-cells = <2>;
50         #size-cells = <2>;
51         compatible = "simple-bus";
52         interrupt-parent = <&CP11X_LABEL(icu_nsr)>;
53         ranges;
54
55         config-space@CP11X_BASE {
56                 #address-cells = <1>;
57                 #size-cells = <1>;
58                 compatible = "simple-bus";
59                 ranges = <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>;
60
61                 CP11X_LABEL(ethernet): ethernet@0 {
62                         compatible = "marvell,armada-7k-pp22";
63                         reg = <0x0 0x100000>, <0x129000 0xb000>;
64                         clocks = <&CP11X_LABEL(clk) 1 3>, <&CP11X_LABEL(clk) 1 9>,
65                                  <&CP11X_LABEL(clk) 1 5>, <&CP11X_LABEL(clk) 1 6>,
66                                  <&CP11X_LABEL(clk) 1 18>;
67                         clock-names = "pp_clk", "gop_clk",
68                                       "mg_clk", "mg_core_clk", "axi_clk";
69                         marvell,system-controller = <&CP11X_LABEL(syscon0)>;
70                         status = "disabled";
71                         dma-coherent;
72
73                         CP11X_LABEL(eth0): eth0 {
74                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>,
75                                         <43 IRQ_TYPE_LEVEL_HIGH>,
76                                         <47 IRQ_TYPE_LEVEL_HIGH>,
77                                         <51 IRQ_TYPE_LEVEL_HIGH>,
78                                         <55 IRQ_TYPE_LEVEL_HIGH>,
79                                         <59 IRQ_TYPE_LEVEL_HIGH>,
80                                         <63 IRQ_TYPE_LEVEL_HIGH>,
81                                         <67 IRQ_TYPE_LEVEL_HIGH>,
82                                         <71 IRQ_TYPE_LEVEL_HIGH>,
83                                         <129 IRQ_TYPE_LEVEL_HIGH>;
84                                 interrupt-names = "hif0", "hif1", "hif2",
85                                         "hif3", "hif4", "hif5", "hif6", "hif7",
86                                         "hif8", "link";
87                                 port-id = <0>;
88                                 gop-port-id = <0>;
89                                 status = "disabled";
90                         };
91
92                         CP11X_LABEL(eth1): eth1 {
93                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH>,
94                                         <44 IRQ_TYPE_LEVEL_HIGH>,
95                                         <48 IRQ_TYPE_LEVEL_HIGH>,
96                                         <52 IRQ_TYPE_LEVEL_HIGH>,
97                                         <56 IRQ_TYPE_LEVEL_HIGH>,
98                                         <60 IRQ_TYPE_LEVEL_HIGH>,
99                                         <64 IRQ_TYPE_LEVEL_HIGH>,
100                                         <68 IRQ_TYPE_LEVEL_HIGH>,
101                                         <72 IRQ_TYPE_LEVEL_HIGH>,
102                                         <128 IRQ_TYPE_LEVEL_HIGH>;
103                                 interrupt-names = "hif0", "hif1", "hif2",
104                                         "hif3", "hif4", "hif5", "hif6", "hif7",
105                                         "hif8", "link";
106                                 port-id = <1>;
107                                 gop-port-id = <2>;
108                                 status = "disabled";
109                         };
110
111                         CP11X_LABEL(eth2): eth2 {
112                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH>,
113                                         <45 IRQ_TYPE_LEVEL_HIGH>,
114                                         <49 IRQ_TYPE_LEVEL_HIGH>,
115                                         <53 IRQ_TYPE_LEVEL_HIGH>,
116                                         <57 IRQ_TYPE_LEVEL_HIGH>,
117                                         <61 IRQ_TYPE_LEVEL_HIGH>,
118                                         <65 IRQ_TYPE_LEVEL_HIGH>,
119                                         <69 IRQ_TYPE_LEVEL_HIGH>,
120                                         <73 IRQ_TYPE_LEVEL_HIGH>,
121                                         <127 IRQ_TYPE_LEVEL_HIGH>;
122                                 interrupt-names = "hif0", "hif1", "hif2",
123                                         "hif3", "hif4", "hif5", "hif6", "hif7",
124                                         "hif8", "link";
125                                 port-id = <2>;
126                                 gop-port-id = <3>;
127                                 status = "disabled";
128                         };
129                 };
130
131                 CP11X_LABEL(comphy): phy@120000 {
132                         compatible = "marvell,comphy-cp110";
133                         reg = <0x120000 0x6000>;
134                         marvell,system-controller = <&CP11X_LABEL(syscon0)>;
135                         clocks = <&CP11X_LABEL(clk) 1 5>, <&CP11X_LABEL(clk) 1 6>,
136                                  <&CP11X_LABEL(clk) 1 18>;
137                         clock-names = "mg_clk", "mg_core_clk", "axi_clk";
138                         #address-cells = <1>;
139                         #size-cells = <0>;
140
141                         CP11X_LABEL(comphy0): phy@0 {
142                                 reg = <0>;
143                                 #phy-cells = <1>;
144                         };
145
146                         CP11X_LABEL(comphy1): phy@1 {
147                                 reg = <1>;
148                                 #phy-cells = <1>;
149                         };
150
151                         CP11X_LABEL(comphy2): phy@2 {
152                                 reg = <2>;
153                                 #phy-cells = <1>;
154                         };
155
156                         CP11X_LABEL(comphy3): phy@3 {
157                                 reg = <3>;
158                                 #phy-cells = <1>;
159                         };
160
161                         CP11X_LABEL(comphy4): phy@4 {
162                                 reg = <4>;
163                                 #phy-cells = <1>;
164                         };
165
166                         CP11X_LABEL(comphy5): phy@5 {
167                                 reg = <5>;
168                                 #phy-cells = <1>;
169                         };
170                 };
171
172                 CP11X_LABEL(mdio): mdio@12a200 {
173                         #address-cells = <1>;
174                         #size-cells = <0>;
175                         compatible = "marvell,orion-mdio";
176                         reg = <0x12a200 0x10>;
177                         clocks = <&CP11X_LABEL(clk) 1 9>, <&CP11X_LABEL(clk) 1 5>,
178                                  <&CP11X_LABEL(clk) 1 6>, <&CP11X_LABEL(clk) 1 18>;
179                         status = "disabled";
180                 };
181
182                 CP11X_LABEL(xmdio): mdio@12a600 {
183                         #address-cells = <1>;
184                         #size-cells = <0>;
185                         compatible = "marvell,xmdio";
186                         reg = <0x12a600 0x10>;
187                         clocks = <&CP11X_LABEL(clk) 1 5>,
188                                  <&CP11X_LABEL(clk) 1 6>, <&CP11X_LABEL(clk) 1 18>;
189                         status = "disabled";
190                 };
191
192                 CP11X_LABEL(icu): interrupt-controller@1e0000 {
193                         compatible = "marvell,cp110-icu";
194                         reg = <0x1e0000 0x440>;
195                         #address-cells = <1>;
196                         #size-cells = <1>;
197
198                         CP11X_LABEL(icu_nsr): interrupt-controller@10 {
199                                 compatible = "marvell,cp110-icu-nsr";
200                                 reg = <0x10 0x20>;
201                                 #interrupt-cells = <2>;
202                                 interrupt-controller;
203                                 msi-parent = <&gicp>;
204                         };
205
206                         CP11X_LABEL(icu_sei): interrupt-controller@50 {
207                                 compatible = "marvell,cp110-icu-sei";
208                                 reg = <0x50 0x10>;
209                                 #interrupt-cells = <2>;
210                                 interrupt-controller;
211                                 msi-parent = <&sei>;
212                         };
213                 };
214
215                 CP11X_LABEL(rtc): rtc@284000 {
216                         compatible = "marvell,armada-8k-rtc";
217                         reg = <0x284000 0x20>, <0x284080 0x24>;
218                         reg-names = "rtc", "rtc-soc";
219                         interrupts = <77 IRQ_TYPE_LEVEL_HIGH>;
220                 };
221
222                 CP11X_LABEL(syscon0): system-controller@440000 {
223                         compatible = "syscon", "simple-mfd";
224                         reg = <0x440000 0x2000>;
225
226                         CP11X_LABEL(clk): clock {
227                                 compatible = "marvell,cp110-clock";
228                                 #clock-cells = <2>;
229                         };
230
231                         CP11X_LABEL(gpio1): gpio@100 {
232                                 compatible = "marvell,armada-8k-gpio";
233                                 offset = <0x100>;
234                                 ngpios = <32>;
235                                 gpio-controller;
236                                 #gpio-cells = <2>;
237                                 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 0 32>;
238                                 interrupt-controller;
239                                 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>,
240                                         <85 IRQ_TYPE_LEVEL_HIGH>,
241                                         <84 IRQ_TYPE_LEVEL_HIGH>,
242                                         <83 IRQ_TYPE_LEVEL_HIGH>;
243                                 #interrupt-cells = <2>;
244                                 status = "disabled";
245                         };
246
247                         CP11X_LABEL(gpio2): gpio@140 {
248                                 compatible = "marvell,armada-8k-gpio";
249                                 offset = <0x140>;
250                                 ngpios = <31>;
251                                 gpio-controller;
252                                 #gpio-cells = <2>;
253                                 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 32 31>;
254                                 interrupt-controller;
255                                 interrupts = <82 IRQ_TYPE_LEVEL_HIGH>,
256                                         <81 IRQ_TYPE_LEVEL_HIGH>,
257                                         <80 IRQ_TYPE_LEVEL_HIGH>,
258                                         <79 IRQ_TYPE_LEVEL_HIGH>;
259                                 #interrupt-cells = <2>;
260                                 status = "disabled";
261                         };
262                 };
263
264                 CP11X_LABEL(syscon1): system-controller@400000 {
265                         compatible = "syscon", "simple-mfd";
266                         reg = <0x400000 0x1000>;
267                         #address-cells = <1>;
268                         #size-cells = <1>;
269
270                         CP11X_LABEL(thermal): thermal-sensor@70 {
271                                 compatible = "marvell,armada-cp110-thermal";
272                                 reg = <0x70 0x10>;
273                                 interrupts-extended =
274                                         <&CP11X_LABEL(icu_sei) 116 IRQ_TYPE_LEVEL_HIGH>;
275                                 #thermal-sensor-cells = <1>;
276                         };
277                 };
278
279                 CP11X_LABEL(usb3_0): usb3@500000 {
280                         compatible = "marvell,armada-8k-xhci",
281                         "generic-xhci";
282                         reg = <0x500000 0x4000>;
283                         dma-coherent;
284                         interrupts = <106 IRQ_TYPE_LEVEL_HIGH>;
285                         clock-names = "core", "reg";
286                         clocks = <&CP11X_LABEL(clk) 1 22>,
287                                  <&CP11X_LABEL(clk) 1 16>;
288                         status = "disabled";
289                 };
290
291                 CP11X_LABEL(usb3_1): usb3@510000 {
292                         compatible = "marvell,armada-8k-xhci",
293                         "generic-xhci";
294                         reg = <0x510000 0x4000>;
295                         dma-coherent;
296                         interrupts = <105 IRQ_TYPE_LEVEL_HIGH>;
297                         clock-names = "core", "reg";
298                         clocks = <&CP11X_LABEL(clk) 1 23>,
299                                  <&CP11X_LABEL(clk) 1 16>;
300                         status = "disabled";
301                 };
302
303                 CP11X_LABEL(sata0): sata@540000 {
304                         compatible = "marvell,armada-8k-ahci",
305                         "generic-ahci";
306                         reg = <0x540000 0x30000>;
307                         dma-coherent;
308                         interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
309                         clocks = <&CP11X_LABEL(clk) 1 15>,
310                                  <&CP11X_LABEL(clk) 1 16>;
311                         #address-cells = <1>;
312                         #size-cells = <0>;
313                         status = "disabled";
314
315                         sata-port@0 {
316                                 reg = <0>;
317                         };
318
319                         sata-port@1 {
320                                 reg = <1>;
321                         };
322                 };
323
324                 CP11X_LABEL(xor0): xor@6a0000 {
325                         compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
326                         reg = <0x6a0000 0x1000>, <0x6b0000 0x1000>;
327                         dma-coherent;
328                         msi-parent = <&gic_v2m0>;
329                         clock-names = "core", "reg";
330                         clocks = <&CP11X_LABEL(clk) 1 8>,
331                                  <&CP11X_LABEL(clk) 1 14>;
332                 };
333
334                 CP11X_LABEL(xor1): xor@6c0000 {
335                         compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
336                         reg = <0x6c0000 0x1000>, <0x6d0000 0x1000>;
337                         dma-coherent;
338                         msi-parent = <&gic_v2m0>;
339                         clock-names = "core", "reg";
340                         clocks = <&CP11X_LABEL(clk) 1 7>,
341                                  <&CP11X_LABEL(clk) 1 14>;
342                 };
343
344                 CP11X_LABEL(spi0): spi@700600 {
345                         compatible = "marvell,armada-380-spi";
346                         reg = <0x700600 0x50>;
347                         #address-cells = <0x1>;
348                         #size-cells = <0x0>;
349                         clock-names = "core", "axi";
350                         clocks = <&CP11X_LABEL(clk) 1 21>,
351                                  <&CP11X_LABEL(clk) 1 17>;
352                         status = "disabled";
353                 };
354
355                 CP11X_LABEL(spi1): spi@700680 {
356                         compatible = "marvell,armada-380-spi";
357                         reg = <0x700680 0x50>;
358                         #address-cells = <1>;
359                         #size-cells = <0>;
360                         clock-names = "core", "axi";
361                         clocks = <&CP11X_LABEL(clk) 1 21>,
362                                  <&CP11X_LABEL(clk) 1 17>;
363                         status = "disabled";
364                 };
365
366                 CP11X_LABEL(i2c0): i2c@701000 {
367                         compatible = "marvell,mv78230-i2c";
368                         reg = <0x701000 0x20>;
369                         #address-cells = <1>;
370                         #size-cells = <0>;
371                         interrupts = <120 IRQ_TYPE_LEVEL_HIGH>;
372                         clock-names = "core", "reg";
373                         clocks = <&CP11X_LABEL(clk) 1 21>,
374                                  <&CP11X_LABEL(clk) 1 17>;
375                         status = "disabled";
376                 };
377
378                 CP11X_LABEL(i2c1): i2c@701100 {
379                         compatible = "marvell,mv78230-i2c";
380                         reg = <0x701100 0x20>;
381                         #address-cells = <1>;
382                         #size-cells = <0>;
383                         interrupts = <121 IRQ_TYPE_LEVEL_HIGH>;
384                         clock-names = "core", "reg";
385                         clocks = <&CP11X_LABEL(clk) 1 21>,
386                                  <&CP11X_LABEL(clk) 1 17>;
387                         status = "disabled";
388                 };
389
390                 CP11X_LABEL(uart0): serial@702000 {
391                         compatible = "snps,dw-apb-uart";
392                         reg = <0x702000 0x100>;
393                         reg-shift = <2>;
394                         interrupts = <122 IRQ_TYPE_LEVEL_HIGH>;
395                         reg-io-width = <1>;
396                         clock-names = "baudclk", "apb_pclk";
397                         clocks = <&CP11X_LABEL(clk) 1 21>,
398                                  <&CP11X_LABEL(clk) 1 17>;
399                         status = "disabled";
400                 };
401
402                 CP11X_LABEL(uart1): serial@702100 {
403                         compatible = "snps,dw-apb-uart";
404                         reg = <0x702100 0x100>;
405                         reg-shift = <2>;
406                         interrupts = <123 IRQ_TYPE_LEVEL_HIGH>;
407                         reg-io-width = <1>;
408                         clock-names = "baudclk", "apb_pclk";
409                         clocks = <&CP11X_LABEL(clk) 1 21>,
410                                  <&CP11X_LABEL(clk) 1 17>;
411                         status = "disabled";
412                 };
413
414                 CP11X_LABEL(uart2): serial@702200 {
415                         compatible = "snps,dw-apb-uart";
416                         reg = <0x702200 0x100>;
417                         reg-shift = <2>;
418                         interrupts = <124 IRQ_TYPE_LEVEL_HIGH>;
419                         reg-io-width = <1>;
420                         clock-names = "baudclk", "apb_pclk";
421                         clocks = <&CP11X_LABEL(clk) 1 21>,
422                                  <&CP11X_LABEL(clk) 1 17>;
423                         status = "disabled";
424                 };
425
426                 CP11X_LABEL(uart3): serial@702300 {
427                         compatible = "snps,dw-apb-uart";
428                         reg = <0x702300 0x100>;
429                         reg-shift = <2>;
430                         interrupts = <125 IRQ_TYPE_LEVEL_HIGH>;
431                         reg-io-width = <1>;
432                         clock-names = "baudclk", "apb_pclk";
433                         clocks = <&CP11X_LABEL(clk) 1 21>,
434                                  <&CP11X_LABEL(clk) 1 17>;
435                         status = "disabled";
436                 };
437
438                 CP11X_LABEL(nand_controller): nand@720000 {
439                         /*
440                          * Due to the limitation of the pins available
441                          * this controller is only usable on the CPM
442                          * for A7K and on the CPS for A8K.
443                          */
444                         compatible = "marvell,armada-8k-nand-controller",
445                                 "marvell,armada370-nand-controller";
446                         reg = <0x720000 0x54>;
447                         #address-cells = <1>;
448                         #size-cells = <0>;
449                         interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
450                         clock-names = "core", "reg";
451                         clocks = <&CP11X_LABEL(clk) 1 2>,
452                                  <&CP11X_LABEL(clk) 1 17>;
453                         marvell,system-controller = <&CP11X_LABEL(syscon0)>;
454                         status = "disabled";
455                 };
456
457                 CP11X_LABEL(trng): trng@760000 {
458                         compatible = "marvell,armada-8k-rng",
459                         "inside-secure,safexcel-eip76";
460                         reg = <0x760000 0x7d>;
461                         interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
462                         clock-names = "core", "reg";
463                         clocks = <&CP11X_LABEL(clk) 1 25>,
464                                  <&CP11X_LABEL(clk) 1 17>;
465                         status = "okay";
466                 };
467
468                 CP11X_LABEL(sdhci0): sdhci@780000 {
469                         compatible = "marvell,armada-cp110-sdhci";
470                         reg = <0x780000 0x300>;
471                         interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
472                         clock-names = "core", "axi";
473                         clocks = <&CP11X_LABEL(clk) 1 4>, <&CP11X_LABEL(clk) 1 18>;
474                         dma-coherent;
475                         status = "disabled";
476                 };
477
478                 CP11X_LABEL(crypto): crypto@800000 {
479                         compatible = "inside-secure,safexcel-eip197b";
480                         reg = <0x800000 0x200000>;
481                         interrupts = <87 IRQ_TYPE_LEVEL_HIGH>,
482                                 <88 IRQ_TYPE_LEVEL_HIGH>,
483                                 <89 IRQ_TYPE_LEVEL_HIGH>,
484                                 <90 IRQ_TYPE_LEVEL_HIGH>,
485                                 <91 IRQ_TYPE_LEVEL_HIGH>,
486                                 <92 IRQ_TYPE_LEVEL_HIGH>;
487                         interrupt-names = "mem", "ring0", "ring1",
488                                 "ring2", "ring3", "eip";
489                         clock-names = "core", "reg";
490                         clocks = <&CP11X_LABEL(clk) 1 26>,
491                                  <&CP11X_LABEL(clk) 1 17>;
492                         dma-coherent;
493                 };
494         };
495
496         CP11X_LABEL(pcie0): pcie@CP11X_PCIE0_BASE {
497                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
498                 reg = <0 ADDRESSIFY(CP11X_PCIE0_BASE) 0 0x10000>,
499                       <0 CP11X_PCIEx_CONF_BASE(0) 0 0x80000>;
500                 reg-names = "ctrl", "config";
501                 #address-cells = <3>;
502                 #size-cells = <2>;
503                 #interrupt-cells = <1>;
504                 device_type = "pci";
505                 dma-coherent;
506                 msi-parent = <&gic_v2m0>;
507
508                 bus-range = <0 0xff>;
509                 /* non-prefetchable memory */
510                 ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(0) 0  CP11X_PCIEx_MEM_BASE(0) 0 0xf00000>;
511                 interrupt-map-mask = <0 0 0 0>;
512                 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>;
513                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
514                 num-lanes = <1>;
515                 clock-names = "core", "reg";
516                 clocks = <&CP11X_LABEL(clk) 1 13>, <&CP11X_LABEL(clk) 1 14>;
517                 status = "disabled";
518         };
519
520         CP11X_LABEL(pcie1): pcie@CP11X_PCIE1_BASE {
521                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
522                 reg = <0 ADDRESSIFY(CP11X_PCIE1_BASE) 0 0x10000>,
523                       <0 CP11X_PCIEx_CONF_BASE(1) 0 0x80000>;
524                 reg-names = "ctrl", "config";
525                 #address-cells = <3>;
526                 #size-cells = <2>;
527                 #interrupt-cells = <1>;
528                 device_type = "pci";
529                 dma-coherent;
530                 msi-parent = <&gic_v2m0>;
531
532                 bus-range = <0 0xff>;
533                 /* non-prefetchable memory */
534                 ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(1) 0  CP11X_PCIEx_MEM_BASE(1) 0 0xf00000>;
535                 interrupt-map-mask = <0 0 0 0>;
536                 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>;
537                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
538
539                 num-lanes = <1>;
540                 clock-names = "core", "reg";
541                 clocks = <&CP11X_LABEL(clk) 1 11>, <&CP11X_LABEL(clk) 1 14>;
542                 status = "disabled";
543         };
544
545         CP11X_LABEL(pcie2): pcie@CP11X_PCIE2_BASE {
546                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
547                 reg = <0 ADDRESSIFY(CP11X_PCIE2_BASE) 0 0x10000>,
548                       <0 CP11X_PCIEx_CONF_BASE(2) 0 0x80000>;
549                 reg-names = "ctrl", "config";
550                 #address-cells = <3>;
551                 #size-cells = <2>;
552                 #interrupt-cells = <1>;
553                 device_type = "pci";
554                 dma-coherent;
555                 msi-parent = <&gic_v2m0>;
556
557                 bus-range = <0 0xff>;
558                 /* non-prefetchable memory */
559                 ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(2) 0  CP11X_PCIEx_MEM_BASE(2) 0 0xf00000>;
560                 interrupt-map-mask = <0 0 0 0>;
561                 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>;
562                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
563
564                 num-lanes = <1>;
565                 clock-names = "core", "reg";
566                 clocks = <&CP11X_LABEL(clk) 1 12>, <&CP11X_LABEL(clk) 1 14>;
567                 status = "disabled";
568         };
569 };