2 * arch/arm64/include/asm/arch_timer.h
4 * Copyright (C) 2012 ARM Ltd.
5 * Author: Marc Zyngier <marc.zyngier@arm.com>
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef __ASM_ARCH_TIMER_H
20 #define __ASM_ARCH_TIMER_H
22 #include <asm/barrier.h>
23 #include <asm/sysreg.h>
25 #include <linux/bug.h>
26 #include <linux/init.h>
27 #include <linux/jump_label.h>
28 #include <linux/types.h>
30 #include <clocksource/arm_arch_timer.h>
32 #if IS_ENABLED(CONFIG_FSL_ERRATUM_A008585)
33 extern struct static_key_false arch_timer_read_ool_enabled;
34 #define needs_fsl_a008585_workaround() \
35 static_branch_unlikely(&arch_timer_read_ool_enabled)
37 #define needs_fsl_a008585_workaround() false
40 u32 __fsl_a008585_read_cntp_tval_el0(void);
41 u32 __fsl_a008585_read_cntv_tval_el0(void);
42 u64 __fsl_a008585_read_cntvct_el0(void);
45 * The number of retries is an arbitrary value well beyond the highest number
46 * of iterations the loop has been observed to take.
48 #define __fsl_a008585_read_reg(reg) ({ \
53 _old = read_sysreg(reg); \
54 _new = read_sysreg(reg); \
56 } while (unlikely(_old != _new) && _retries); \
58 WARN_ON_ONCE(!_retries); \
62 #define arch_timer_reg_read_stable(reg) \
65 if (needs_fsl_a008585_workaround()) \
66 _val = __fsl_a008585_read_##reg(); \
68 _val = read_sysreg(reg); \
73 * These register accessors are marked inline so the compiler can
74 * nicely work out which register we want, and chuck away the rest of
77 static __always_inline
78 void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
80 if (access == ARCH_TIMER_PHYS_ACCESS) {
82 case ARCH_TIMER_REG_CTRL:
83 write_sysreg(val, cntp_ctl_el0);
85 case ARCH_TIMER_REG_TVAL:
86 write_sysreg(val, cntp_tval_el0);
89 } else if (access == ARCH_TIMER_VIRT_ACCESS) {
91 case ARCH_TIMER_REG_CTRL:
92 write_sysreg(val, cntv_ctl_el0);
94 case ARCH_TIMER_REG_TVAL:
95 write_sysreg(val, cntv_tval_el0);
103 static __always_inline
104 u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
106 if (access == ARCH_TIMER_PHYS_ACCESS) {
108 case ARCH_TIMER_REG_CTRL:
109 return read_sysreg(cntp_ctl_el0);
110 case ARCH_TIMER_REG_TVAL:
111 return arch_timer_reg_read_stable(cntp_tval_el0);
113 } else if (access == ARCH_TIMER_VIRT_ACCESS) {
115 case ARCH_TIMER_REG_CTRL:
116 return read_sysreg(cntv_ctl_el0);
117 case ARCH_TIMER_REG_TVAL:
118 return arch_timer_reg_read_stable(cntv_tval_el0);
125 static inline u32 arch_timer_get_cntfrq(void)
127 return read_sysreg(cntfrq_el0);
130 static inline u32 arch_timer_get_cntkctl(void)
132 return read_sysreg(cntkctl_el1);
135 static inline void arch_timer_set_cntkctl(u32 cntkctl)
137 write_sysreg(cntkctl, cntkctl_el1);
140 static inline u64 arch_counter_get_cntpct(void)
143 * AArch64 kernel and user space mandate the use of CNTVCT.
149 static inline u64 arch_counter_get_cntvct(void)
152 return arch_timer_reg_read_stable(cntvct_el0);
155 static inline int arch_timer_arch_init(void)