arch/arm64/kernel/traps.c

   1 /*
   2  * Based on arch/arm/kernel/traps.c
   3  *
   4  * Copyright (C) 1995-2009 Russell King
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/bug.h>
  21 #include <linux/signal.h>
  22 #include <linux/personality.h>
  23 #include <linux/kallsyms.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/uaccess.h>
  26 #include <linux/hardirq.h>
  27 #include <linux/kdebug.h>
  28 #include <linux/module.h>
  29 #include <linux/kexec.h>
  30 #include <linux/delay.h>
  31 #include <linux/init.h>
  32 #include <linux/sched/signal.h>
  33 #include <linux/sched/debug.h>
  34 #include <linux/sched/task_stack.h>
  35 #include <linux/syscalls.h>
  36 #include <linux/mm_types.h>
  37
  38 #include <asm/atomic.h>
  39 #include <asm/bug.h>
  40 #include <asm/debug-monitors.h>
  41 #include <asm/esr.h>
  42 #include <asm/insn.h>
  43 #include <asm/traps.h>
  44 #include <asm/stack_pointer.h>
  45 #include <asm/stacktrace.h>
  46 #include <asm/exception.h>
  47 #include <asm/system_misc.h>
  48 #include <asm/sysreg.h>
  49
  50 static const char *handler[]= {
  51         "Synchronous Abort",
  52         "IRQ",
  53         "FIQ",
  54         "Error"
  55 };
  56
  57 int show_unhandled_signals = 1;
  58
  59 /*
  60  * Dump out the contents of some kernel memory nicely...
  61  */
  62 static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
  63                      unsigned long top)
  64 {
  65         unsigned long first;
  66         mm_segment_t fs;
  67         int i;
  68
  69         /*
  70          * We need to switch to kernel mode so that we can use __get_user
  71          * to safely read from kernel space.
  72          */
  73         fs = get_fs();
  74         set_fs(KERNEL_DS);
  75
  76         printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
  77
  78         for (first = bottom & ~31; first < top; first += 32) {
  79                 unsigned long p;
  80                 char str[sizeof(" 12345678") * 8 + 1];
  81
  82                 memset(str, ' ', sizeof(str));
  83                 str[sizeof(str) - 1] = '\0';
  84
  85                 for (p = first, i = 0; i < (32 / 8)
  86                                         && p < top; i++, p += 8) {
  87                         if (p >= bottom && p < top) {
  88                                 unsigned long val;
  89
  90                                 if (__get_user(val, (unsigned long *)p) == 0)
  91                                         sprintf(str + i * 17, " %016lx", val);
  92                                 else
  93                                         sprintf(str + i * 17, " ????????????????");
  94                         }
  95                 }
  96                 printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
  97         }
  98
  99         set_fs(fs);
 100 }
 101
 102 static void dump_backtrace_entry(unsigned long where)
 103 {
 104         /*
 105          * Note that 'where' can have a physical address, but it's not handled.
 106          */
 107         print_ip_sym(where);
 108 }
 109
 110 static void __dump_instr(const char *lvl, struct pt_regs *regs)
 111 {
 112         unsigned long addr = instruction_pointer(regs);
 113         char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
 114         int i;
 115
 116         for (i = -4; i < 1; i++) {
 117                 unsigned int val, bad;
 118
 119                 bad = __get_user(val, &((u32 *)addr)[i]);
 120
 121                 if (!bad)
 122                         p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
 123                 else {
 124                         p += sprintf(p, "bad PC value");
 125                         break;
 126                 }
 127         }
 128         printk("%sCode: %s\n", lvl, str);
 129 }
 130
 131 static void dump_instr(const char *lvl, struct pt_regs *regs)
 132 {
 133         if (!user_mode(regs)) {
 134                 mm_segment_t fs = get_fs();
 135                 set_fs(KERNEL_DS);
 136                 __dump_instr(lvl, regs);
 137                 set_fs(fs);
 138         } else {
 139                 __dump_instr(lvl, regs);
 140         }
 141 }
 142
 143 void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
 144 {
 145         struct stackframe frame;
 146         int skip;
 147
 148         pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
 149
 150         if (!tsk)
 151                 tsk = current;
 152
 153         if (!try_get_task_stack(tsk))
 154                 return;
 155
 156         if (tsk == current) {
 157                 frame.fp = (unsigned long)__builtin_frame_address(0);
 158                 frame.pc = (unsigned long)dump_backtrace;
 159         } else {
 160                 /*
 161                  * task blocked in __switch_to
 162                  */
 163                 frame.fp = thread_saved_fp(tsk);
 164                 frame.pc = thread_saved_pc(tsk);
 165         }
 166 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 167         frame.graph = tsk->curr_ret_stack;
 168 #endif
 169
 170         skip = !!regs;
 171         printk("Call trace:\n");
 172         while (1) {
 173                 unsigned long stack;
 174                 int ret;
 175
 176                 /* skip until specified stack frame */
 177                 if (!skip) {
 178                         dump_backtrace_entry(frame.pc);
 179                 } else if (frame.fp == regs->regs[29]) {
 180                         skip = 0;
 181                         /*
 182                          * Mostly, this is the case where this function is
 183                          * called in panic/abort. As exception handler's
 184                          * stack frame does not contain the corresponding pc
 185                          * at which an exception has taken place, use regs->pc
 186                          * instead.
 187                          */
 188                         dump_backtrace_entry(regs->pc);
 189                 }
 190                 ret = unwind_frame(tsk, &frame);
 191                 if (ret < 0)
 192                         break;
 193                 if (in_entry_text(frame.pc)) {
 194                         stack = frame.fp - offsetof(struct pt_regs, stackframe);
 195
 196                         if (on_task_stack(tsk, stack) ||
 197                             (tsk == current && !preemptible() && on_irq_stack(stack)))
 198                                 dump_mem("", "Exception stack", stack,
 199                                          stack + sizeof(struct pt_regs));
 200                 }
 201         }
 202
 203         put_task_stack(tsk);
 204 }
 205
 206 void show_stack(struct task_struct *tsk, unsigned long *sp)
 207 {
 208         dump_backtrace(NULL, tsk);
 209         barrier();
 210 }
 211
 212 #ifdef CONFIG_PREEMPT
 213 #define S_PREEMPT " PREEMPT"
 214 #else
 215 #define S_PREEMPT ""
 216 #endif
 217 #define S_SMP " SMP"
 218
 219 static int __die(const char *str, int err, struct pt_regs *regs)
 220 {
 221         struct task_struct *tsk = current;
 222         static int die_counter;
 223         int ret;
 224
 225         pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
 226                  str, err, ++die_counter);
 227
 228         /* trap and error numbers are mostly meaningless on ARM */
 229         ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
 230         if (ret == NOTIFY_STOP)
 231                 return ret;
 232
 233         print_modules();
 234         __show_regs(regs);
 235         pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
 236                  TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk),
 237                  end_of_stack(tsk));
 238
 239         if (!user_mode(regs)) {
 240                 dump_mem(KERN_EMERG, "Stack: ", regs->sp,
 241                          THREAD_SIZE + (unsigned long)task_stack_page(tsk));
 242                 dump_backtrace(regs, tsk);
 243                 dump_instr(KERN_EMERG, regs);
 244         }
 245
 246         return ret;
 247 }
 248
 249 static DEFINE_RAW_SPINLOCK(die_lock);
 250
 251 /*
 252  * This function is protected against re-entrancy.
 253  */
 254 void die(const char *str, struct pt_regs *regs, int err)
 255 {
 256         int ret;
 257         unsigned long flags;
 258
 259         raw_spin_lock_irqsave(&die_lock, flags);
 260
 261         oops_enter();
 262
 263         console_verbose();
 264         bust_spinlocks(1);
 265         ret = __die(str, err, regs);
 266
 267         if (regs && kexec_should_crash(current))
 268                 crash_kexec(regs);
 269
 270         bust_spinlocks(0);
 271         add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
 272         oops_exit();
 273
 274         if (in_interrupt())
 275                 panic("Fatal exception in interrupt");
 276         if (panic_on_oops)
 277                 panic("Fatal exception");
 278
 279         raw_spin_unlock_irqrestore(&die_lock, flags);
 280
 281         if (ret != NOTIFY_STOP)
 282                 do_exit(SIGSEGV);
 283 }
 284
 285 void arm64_notify_die(const char *str, struct pt_regs *regs,
 286                       struct siginfo *info, int err)
 287 {
 288         if (user_mode(regs)) {
 289                 current->thread.fault_address = 0;
 290                 current->thread.fault_code = err;
 291                 force_sig_info(info->si_signo, info, current);
 292         } else {
 293                 die(str, regs, err);
 294         }
 295 }
 296
 297 static LIST_HEAD(undef_hook);
 298 static DEFINE_RAW_SPINLOCK(undef_lock);
 299
 300 void register_undef_hook(struct undef_hook *hook)
 301 {
 302         unsigned long flags;
 303
 304         raw_spin_lock_irqsave(&undef_lock, flags);
 305         list_add(&hook->node, &undef_hook);
 306         raw_spin_unlock_irqrestore(&undef_lock, flags);
 307 }
 308
 309 void unregister_undef_hook(struct undef_hook *hook)
 310 {
 311         unsigned long flags;
 312
 313         raw_spin_lock_irqsave(&undef_lock, flags);
 314         list_del(&hook->node);
 315         raw_spin_unlock_irqrestore(&undef_lock, flags);
 316 }
 317
 318 static int call_undef_hook(struct pt_regs *regs)
 319 {
 320         struct undef_hook *hook;
 321         unsigned long flags;
 322         u32 instr;
 323         int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
 324         void __user *pc = (void __user *)instruction_pointer(regs);
 325
 326         if (!user_mode(regs))
 327                 return 1;
 328
 329         if (compat_thumb_mode(regs)) {
 330                 /* 16-bit Thumb instruction */
 331                 __le16 instr_le;
 332                 if (get_user(instr_le, (__le16 __user *)pc))
 333                         goto exit;
 334                 instr = le16_to_cpu(instr_le);
 335                 if (aarch32_insn_is_wide(instr)) {
 336                         u32 instr2;
 337
 338                         if (get_user(instr_le, (__le16 __user *)(pc + 2)))
 339                                 goto exit;
 340                         instr2 = le16_to_cpu(instr_le);
 341                         instr = (instr << 16) | instr2;
 342                 }
 343         } else {
 344                 /* 32-bit ARM instruction */
 345                 __le32 instr_le;
 346                 if (get_user(instr_le, (__le32 __user *)pc))
 347                         goto exit;
 348                 instr = le32_to_cpu(instr_le);
 349         }
 350
 351         raw_spin_lock_irqsave(&undef_lock, flags);
 352         list_for_each_entry(hook, &undef_hook, node)
 353                 if ((instr & hook->instr_mask) == hook->instr_val &&
 354                         (regs->pstate & hook->pstate_mask) == hook->pstate_val)
 355                         fn = hook->fn;
 356
 357         raw_spin_unlock_irqrestore(&undef_lock, flags);
 358 exit:
 359         return fn ? fn(regs, instr) : 1;
 360 }
 361
 362 static void force_signal_inject(int signal, int code, struct pt_regs *regs,
 363                                 unsigned long address)
 364 {
 365         siginfo_t info;
 366         void __user *pc = (void __user *)instruction_pointer(regs);
 367         const char *desc;
 368
 369         switch (signal) {
 370         case SIGILL:
 371                 desc = "undefined instruction";
 372                 break;
 373         case SIGSEGV:
 374                 desc = "illegal memory access";
 375                 break;
 376         default:
 377                 desc = "bad mode";
 378                 break;
 379         }
 380
 381         if (unhandled_signal(current, signal) &&
 382             show_unhandled_signals_ratelimited()) {
 383                 pr_info("%s[%d]: %s: pc=%p\n",
 384                         current->comm, task_pid_nr(current), desc, pc);
 385                 dump_instr(KERN_INFO, regs);
 386         }
 387
 388         info.si_signo = signal;
 389         info.si_errno = 0;
 390         info.si_code  = code;
 391         info.si_addr  = pc;
 392
 393         arm64_notify_die(desc, regs, &info, 0);
 394 }
 395
 396 /*
 397  * Set up process info to signal segmentation fault - called on access error.
 398  */
 399 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
 400 {
 401         int code;
 402
 403         down_read(&current->mm->mmap_sem);
 404         if (find_vma(current->mm, addr) == NULL)
 405                 code = SEGV_MAPERR;
 406         else
 407                 code = SEGV_ACCERR;
 408         up_read(&current->mm->mmap_sem);
 409
 410         force_signal_inject(SIGSEGV, code, regs, addr);
 411 }
 412
 413 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
 414 {
 415         /* check for AArch32 breakpoint instructions */
 416         if (!aarch32_break_handler(regs))
 417                 return;
 418
 419         if (call_undef_hook(regs) == 0)
 420                 return;
 421
 422         force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 423 }
 424
 425 int cpu_enable_cache_maint_trap(void *__unused)
 426 {
 427         config_sctlr_el1(SCTLR_EL1_UCI, 0);
 428         return 0;
 429 }
 430
 431 #define __user_cache_maint(insn, address, res)                  \
 432         if (address >= user_addr_max()) {                       \
 433                 res = -EFAULT;                                  \
 434         } else {                                                \
 435                 uaccess_ttbr0_enable();                         \
 436                 asm volatile (                                  \
 437                         "1:     " insn ", %1\n"                 \
 438                         "       mov     %w0, #0\n"              \
 439                         "2:\n"                                  \
 440                         "       .pushsection .fixup,\"ax\"\n"   \
 441                         "       .align  2\n"                    \
 442                         "3:     mov     %w0, %w2\n"             \
 443                         "       b       2b\n"                   \
 444                         "       .popsection\n"                  \
 445                         _ASM_EXTABLE(1b, 3b)                    \
 446                         : "=r" (res)                            \
 447                         : "r" (address), "i" (-EFAULT));        \
 448                 uaccess_ttbr0_disable();                        \
 449         }
 450
 451 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
 452 {
 453         unsigned long address;
 454         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 455         int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
 456         int ret = 0;
 457
 458         address = untagged_addr(pt_regs_read_reg(regs, rt));
 459
 460         switch (crm) {
 461         case ESR_ELx_SYS64_ISS_CRM_DC_CVAU:     /* DC CVAU, gets promoted */
 462                 __user_cache_maint("dc civac", address, ret);
 463                 break;
 464         case ESR_ELx_SYS64_ISS_CRM_DC_CVAC:     /* DC CVAC, gets promoted */
 465                 __user_cache_maint("dc civac", address, ret);
 466                 break;
 467         case ESR_ELx_SYS64_ISS_CRM_DC_CVAP:     /* DC CVAP */
 468                 __user_cache_maint("sys 3, c7, c12, 1", address, ret);
 469                 break;
 470         case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC:    /* DC CIVAC */
 471                 __user_cache_maint("dc civac", address, ret);
 472                 break;
 473         case ESR_ELx_SYS64_ISS_CRM_IC_IVAU:     /* IC IVAU */
 474                 __user_cache_maint("ic ivau", address, ret);
 475                 break;
 476         default:
 477                 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 478                 return;
 479         }
 480
 481         if (ret)
 482                 arm64_notify_segfault(regs, address);
 483         else
 484                 regs->pc += 4;
 485 }
 486
 487 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
 488 {
 489         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 490         unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0);
 491
 492         pt_regs_write_reg(regs, rt, val);
 493
 494         regs->pc += 4;
 495 }
 496
 497 static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
 498 {
 499         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 500
 501         pt_regs_write_reg(regs, rt, arch_counter_get_cntvct());
 502         regs->pc += 4;
 503 }
 504
 505 static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
 506 {
 507         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 508
 509         pt_regs_write_reg(regs, rt, arch_timer_get_rate());
 510         regs->pc += 4;
 511 }
 512
 513 struct sys64_hook {
 514         unsigned int esr_mask;
 515         unsigned int esr_val;
 516         void (*handler)(unsigned int esr, struct pt_regs *regs);
 517 };
 518
 519 static struct sys64_hook sys64_hooks[] = {
 520         {
 521                 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
 522                 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
 523                 .handler = user_cache_maint_handler,
 524         },
 525         {
 526                 /* Trap read access to CTR_EL0 */
 527                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 528                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
 529                 .handler = ctr_read_handler,
 530         },
 531         {
 532                 /* Trap read access to CNTVCT_EL0 */
 533                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 534                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
 535                 .handler = cntvct_read_handler,
 536         },
 537         {
 538                 /* Trap read access to CNTFRQ_EL0 */
 539                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 540                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ,
 541                 .handler = cntfrq_read_handler,
 542         },
 543         {},
 544 };
 545
 546 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
 547 {
 548         struct sys64_hook *hook;
 549
 550         for (hook = sys64_hooks; hook->handler; hook++)
 551                 if ((hook->esr_mask & esr) == hook->esr_val) {
 552                         hook->handler(esr, regs);
 553                         return;
 554                 }
 555
 556         /*
 557          * New SYS instructions may previously have been undefined at EL0. Fall
 558          * back to our usual undefined instruction handler so that we handle
 559          * these consistently.
 560          */
 561         do_undefinstr(regs);
 562 }
 563
 564 long compat_arm_syscall(struct pt_regs *regs);
 565
 566 asmlinkage long do_ni_syscall(struct pt_regs *regs)
 567 {
 568 #ifdef CONFIG_COMPAT
 569         long ret;
 570         if (is_compat_task()) {
 571                 ret = compat_arm_syscall(regs);
 572                 if (ret != -ENOSYS)
 573                         return ret;
 574         }
 575 #endif
 576
 577         if (show_unhandled_signals_ratelimited()) {
 578                 pr_info("%s[%d]: syscall %d\n", current->comm,
 579                         task_pid_nr(current), regs->syscallno);
 580                 dump_instr("", regs);
 581                 if (user_mode(regs))
 582                         __show_regs(regs);
 583         }
 584
 585         return sys_ni_syscall();
 586 }
 587
 588 static const char *esr_class_str[] = {
 589         [0 ... ESR_ELx_EC_MAX]          = "UNRECOGNIZED EC",
 590         [ESR_ELx_EC_UNKNOWN]            = "Unknown/Uncategorized",
 591         [ESR_ELx_EC_WFx]                = "WFI/WFE",
 592         [ESR_ELx_EC_CP15_32]            = "CP15 MCR/MRC",
 593         [ESR_ELx_EC_CP15_64]            = "CP15 MCRR/MRRC",
 594         [ESR_ELx_EC_CP14_MR]            = "CP14 MCR/MRC",
 595         [ESR_ELx_EC_CP14_LS]            = "CP14 LDC/STC",
 596         [ESR_ELx_EC_FP_ASIMD]           = "ASIMD",
 597         [ESR_ELx_EC_CP10_ID]            = "CP10 MRC/VMRS",
 598         [ESR_ELx_EC_CP14_64]            = "CP14 MCRR/MRRC",
 599         [ESR_ELx_EC_ILL]                = "PSTATE.IL",
 600         [ESR_ELx_EC_SVC32]              = "SVC (AArch32)",
 601         [ESR_ELx_EC_HVC32]              = "HVC (AArch32)",
 602         [ESR_ELx_EC_SMC32]              = "SMC (AArch32)",
 603         [ESR_ELx_EC_SVC64]              = "SVC (AArch64)",
 604         [ESR_ELx_EC_HVC64]              = "HVC (AArch64)",
 605         [ESR_ELx_EC_SMC64]              = "SMC (AArch64)",
 606         [ESR_ELx_EC_SYS64]              = "MSR/MRS (AArch64)",
 607         [ESR_ELx_EC_IMP_DEF]            = "EL3 IMP DEF",
 608         [ESR_ELx_EC_IABT_LOW]           = "IABT (lower EL)",
 609         [ESR_ELx_EC_IABT_CUR]           = "IABT (current EL)",
 610         [ESR_ELx_EC_PC_ALIGN]           = "PC Alignment",
 611         [ESR_ELx_EC_DABT_LOW]           = "DABT (lower EL)",
 612         [ESR_ELx_EC_DABT_CUR]           = "DABT (current EL)",
 613         [ESR_ELx_EC_SP_ALIGN]           = "SP Alignment",
 614         [ESR_ELx_EC_FP_EXC32]           = "FP (AArch32)",
 615         [ESR_ELx_EC_FP_EXC64]           = "FP (AArch64)",
 616         [ESR_ELx_EC_SERROR]             = "SError",
 617         [ESR_ELx_EC_BREAKPT_LOW]        = "Breakpoint (lower EL)",
 618         [ESR_ELx_EC_BREAKPT_CUR]        = "Breakpoint (current EL)",
 619         [ESR_ELx_EC_SOFTSTP_LOW]        = "Software Step (lower EL)",
 620         [ESR_ELx_EC_SOFTSTP_CUR]        = "Software Step (current EL)",
 621         [ESR_ELx_EC_WATCHPT_LOW]        = "Watchpoint (lower EL)",
 622         [ESR_ELx_EC_WATCHPT_CUR]        = "Watchpoint (current EL)",
 623         [ESR_ELx_EC_BKPT32]             = "BKPT (AArch32)",
 624         [ESR_ELx_EC_VECTOR32]           = "Vector catch (AArch32)",
 625         [ESR_ELx_EC_BRK64]              = "BRK (AArch64)",
 626 };
 627
 628 const char *esr_get_class_string(u32 esr)
 629 {
 630         return esr_class_str[ESR_ELx_EC(esr)];
 631 }
 632
 633 /*
 634  * bad_mode handles the impossible case in the exception vector. This is always
 635  * fatal.
 636  */
 637 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
 638 {
 639         console_verbose();
 640
 641         pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
 642                 handler[reason], smp_processor_id(), esr,
 643                 esr_get_class_string(esr));
 644
 645         die("Oops - bad mode", regs, 0);
 646         local_irq_disable();
 647         panic("bad mode");
 648 }
 649
 650 /*
 651  * bad_el0_sync handles unexpected, but potentially recoverable synchronous
 652  * exceptions taken from EL0. Unlike bad_mode, this returns.
 653  */
 654 asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
 655 {
 656         siginfo_t info;
 657         void __user *pc = (void __user *)instruction_pointer(regs);
 658         console_verbose();
 659
 660         pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n",
 661                 smp_processor_id(), esr, esr_get_class_string(esr));
 662         __show_regs(regs);
 663
 664         info.si_signo = SIGILL;
 665         info.si_errno = 0;
 666         info.si_code  = ILL_ILLOPC;
 667         info.si_addr  = pc;
 668
 669         current->thread.fault_address = 0;
 670         current->thread.fault_code = 0;
 671
 672         force_sig_info(info.si_signo, &info, current);
 673 }
 674
 675 void __pte_error(const char *file, int line, unsigned long val)
 676 {
 677         pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
 678 }
 679
 680 void __pmd_error(const char *file, int line, unsigned long val)
 681 {
 682         pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
 683 }
 684
 685 void __pud_error(const char *file, int line, unsigned long val)
 686 {
 687         pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
 688 }
 689
 690 void __pgd_error(const char *file, int line, unsigned long val)
 691 {
 692         pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
 693 }
 694
 695 /* GENERIC_BUG traps */
 696
 697 int is_valid_bugaddr(unsigned long addr)
 698 {
 699         /*
 700          * bug_handler() only called for BRK #BUG_BRK_IMM.
 701          * So the answer is trivial -- any spurious instances with no
 702          * bug table entry will be rejected by report_bug() and passed
 703          * back to the debug-monitors code and handled as a fatal
 704          * unexpected debug exception.
 705          */
 706         return 1;
 707 }
 708
 709 static int bug_handler(struct pt_regs *regs, unsigned int esr)
 710 {
 711         if (user_mode(regs))
 712                 return DBG_HOOK_ERROR;
 713
 714         switch (report_bug(regs->pc, regs)) {
 715         case BUG_TRAP_TYPE_BUG:
 716                 die("Oops - BUG", regs, 0);
 717                 break;
 718
 719         case BUG_TRAP_TYPE_WARN:
 720                 break;
 721
 722         default:
 723                 /* unknown/unrecognised bug trap type */
 724                 return DBG_HOOK_ERROR;
 725         }
 726
 727         /* If thread survives, skip over the BUG instruction and continue: */
 728         regs->pc += AARCH64_INSN_SIZE;  /* skip BRK and resume */
 729         return DBG_HOOK_HANDLED;
 730 }
 731
 732 static struct break_hook bug_break_hook = {
 733         .esr_val = 0xf2000000 | BUG_BRK_IMM,
 734         .esr_mask = 0xffffffff,
 735         .fn = bug_handler,
 736 };
 737
 738 /*
 739  * Initial handler for AArch64 BRK exceptions
 740  * This handler only used until debug_traps_init().
 741  */
 742 int __init early_brk64(unsigned long addr, unsigned int esr,
 743                 struct pt_regs *regs)
 744 {
 745         return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
 746 }
 747
 748 /* This registration must happen early, before debug_traps_init(). */
 749 void __init trap_init(void)
 750 {
 751         register_break_hook(&bug_break_hook);
 752 }