1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
4 #include <linux/spinlock.h>
7 #include <asm/barrier.h>
9 inline void dcache_wb_line(unsigned long start)
11 asm volatile("dcache.cval1 %0\n"::"r"(start):"memory");
15 void icache_inv_range(unsigned long start, unsigned long end)
17 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
19 for (; i < end; i += L1_CACHE_BYTES)
20 asm volatile("icache.iva %0\n"::"r"(i):"memory");
24 void icache_inv_all(void)
26 asm volatile("icache.ialls\n":::"memory");
30 void dcache_wb_range(unsigned long start, unsigned long end)
32 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
34 for (; i < end; i += L1_CACHE_BYTES)
35 asm volatile("dcache.cval1 %0\n"::"r"(i):"memory");
39 void dcache_inv_range(unsigned long start, unsigned long end)
41 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
43 for (; i < end; i += L1_CACHE_BYTES)
44 asm volatile("dcache.civa %0\n"::"r"(i):"memory");
48 void cache_wbinv_range(unsigned long start, unsigned long end)
50 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
52 for (; i < end; i += L1_CACHE_BYTES)
53 asm volatile("dcache.cval1 %0\n"::"r"(i):"memory");
56 i = start & ~(L1_CACHE_BYTES - 1);
57 for (; i < end; i += L1_CACHE_BYTES)
58 asm volatile("icache.iva %0\n"::"r"(i):"memory");
61 EXPORT_SYMBOL(cache_wbinv_range);
63 void dma_wbinv_range(unsigned long start, unsigned long end)
65 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
67 for (; i < end; i += L1_CACHE_BYTES)
68 asm volatile("dcache.civa %0\n"::"r"(i):"memory");
72 void dma_wb_range(unsigned long start, unsigned long end)
74 unsigned long i = start & ~(L1_CACHE_BYTES - 1);
76 for (; i < end; i += L1_CACHE_BYTES)
77 asm volatile("dcache.civa %0\n"::"r"(i):"memory");