1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_CLOCKSOURCE_DATA
8 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
9 select ARCH_HAS_UBSAN_SANITIZE_ALL
10 select ARCH_SUPPORTS_UPROBES
11 select ARCH_USE_BUILTIN_BSWAP
12 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
13 select ARCH_USE_QUEUED_RWLOCKS
14 select ARCH_USE_QUEUED_SPINLOCKS
15 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
16 select ARCH_WANT_IPC_PARSE_VERSION
17 select BUILDTIME_EXTABLE_SORT
18 select CLONE_BACKWARDS
19 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
20 select CPU_PM if CPU_IDLE
21 select GENERIC_ATOMIC64 if !64BIT
22 select GENERIC_CLOCKEVENTS
23 select GENERIC_CMOS_UPDATE
24 select GENERIC_CPU_AUTOPROBE
25 select GENERIC_GETTIMEOFDAY
27 select GENERIC_IRQ_PROBE
28 select GENERIC_IRQ_SHOW
29 select GENERIC_ISA_DMA if EISA
30 select GENERIC_LIB_ASHLDI3
31 select GENERIC_LIB_ASHRDI3
32 select GENERIC_LIB_CMPDI2
33 select GENERIC_LIB_LSHRDI3
34 select GENERIC_LIB_UCMPDI2
35 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
36 select GENERIC_SMP_IDLE_THREAD
37 select GENERIC_TIME_VSYSCALL
38 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
39 select HANDLE_DOMAIN_IRQ
40 select HAVE_ARCH_COMPILER_H
41 select HAVE_ARCH_JUMP_LABEL
43 select HAVE_ARCH_MMAP_RND_BITS if MMU
44 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
45 select HAVE_ARCH_SECCOMP_FILTER
46 select HAVE_ARCH_TRACEHOOK
47 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
48 select HAVE_ASM_MODVERSIONS
49 select HAVE_EBPF_JIT if (!CPU_MICROMIPS)
50 select HAVE_CONTEXT_TRACKING
51 select HAVE_COPY_THREAD_TLS
52 select HAVE_C_RECORDMCOUNT
53 select HAVE_DEBUG_KMEMLEAK
54 select HAVE_DEBUG_STACKOVERFLOW
55 select HAVE_DMA_CONTIGUOUS
56 select HAVE_DYNAMIC_FTRACE
57 select HAVE_EXIT_THREAD
59 select HAVE_FTRACE_MCOUNT_RECORD
60 select HAVE_FUNCTION_GRAPH_TRACER
61 select HAVE_FUNCTION_TRACER
63 select HAVE_IOREMAP_PROT
64 select HAVE_IRQ_EXIT_ON_IRQ_STACK
65 select HAVE_IRQ_TIME_ACCOUNTING
67 select HAVE_KRETPROBES
68 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
69 select HAVE_MEMBLOCK_NODE_MAP
70 select HAVE_MOD_ARCH_SPECIFIC
73 select HAVE_PERF_EVENTS
74 select HAVE_REGS_AND_STACK_ACCESS_API
76 select HAVE_STACKPROTECTOR
77 select HAVE_SYSCALL_TRACEPOINTS
78 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
79 select HAVE_GENERIC_VDSO
80 select IRQ_FORCED_THREADING
82 select MODULES_USE_ELF_RELA if MODULES && 64BIT
83 select MODULES_USE_ELF_REL if MODULES
84 select PERF_USE_VMALLOC
86 select SYSCTL_EXCEPTION_TRACE
88 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
90 menu "Machine selection"
97 bool "Generic board-agnostic MIPS kernel"
101 select CLKSRC_MIPS_GIC
103 select CPU_MIPSR2_IRQ_VI
104 select CPU_MIPSR2_IRQ_EI
106 select DMA_PERDEV_COHERENT
110 select MIPS_AUTO_PFN_OFFSET
111 select MIPS_CPU_SCACHE
113 select MIPS_L1_CACHE_SHIFT_7
114 select NO_EXCEPT_FILL
115 select PCI_DRIVERS_GENERIC
119 select SYS_HAS_CPU_MIPS32_R1
120 select SYS_HAS_CPU_MIPS32_R2
121 select SYS_HAS_CPU_MIPS32_R6
122 select SYS_HAS_CPU_MIPS64_R1
123 select SYS_HAS_CPU_MIPS64_R2
124 select SYS_HAS_CPU_MIPS64_R6
125 select SYS_SUPPORTS_32BIT_KERNEL
126 select SYS_SUPPORTS_64BIT_KERNEL
127 select SYS_SUPPORTS_BIG_ENDIAN
128 select SYS_SUPPORTS_HIGHMEM
129 select SYS_SUPPORTS_LITTLE_ENDIAN
130 select SYS_SUPPORTS_MICROMIPS
131 select SYS_SUPPORTS_MIPS_CPS
132 select SYS_SUPPORTS_MIPS16
133 select SYS_SUPPORTS_MULTITHREADING
134 select SYS_SUPPORTS_RELOCATABLE
135 select SYS_SUPPORTS_SMARTMIPS
136 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
137 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
138 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
139 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
140 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
141 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
145 Select this to build a kernel which aims to support multiple boards,
146 generally using a flattened device tree passed from the bootloader
147 using the boot protocol defined in the UHI (Unified Hosting
148 Interface) specification.
151 bool "Alchemy processor based machines"
152 select PHYS_ADDR_T_64BIT
156 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
157 select SYS_HAS_CPU_MIPS32_R1
158 select SYS_SUPPORTS_32BIT_KERNEL
159 select SYS_SUPPORTS_APM_EMULATION
161 select SYS_SUPPORTS_ZBOOT
165 bool "Texas Instruments AR7"
167 select DMA_NONCOHERENT
171 select NO_EXCEPT_FILL
173 select SYS_HAS_CPU_MIPS32_R1
174 select SYS_HAS_EARLY_PRINTK
175 select SYS_SUPPORTS_32BIT_KERNEL
176 select SYS_SUPPORTS_LITTLE_ENDIAN
177 select SYS_SUPPORTS_MIPS16
178 select SYS_SUPPORTS_ZBOOT_UART16550
183 Support for the Texas Instruments AR7 System-on-a-Chip
184 family: TNETD7100, 7200 and 7300.
187 bool "Atheros AR231x/AR531x SoC support"
190 select DMA_NONCOHERENT
193 select SYS_HAS_CPU_MIPS32_R1
194 select SYS_SUPPORTS_BIG_ENDIAN
195 select SYS_SUPPORTS_32BIT_KERNEL
196 select SYS_HAS_EARLY_PRINTK
198 Support for Atheros AR231x and Atheros AR531x based boards
201 bool "Atheros AR71XX/AR724X/AR913X based boards"
202 select ARCH_HAS_RESET_CONTROLLER
206 select DMA_NONCOHERENT
213 select SYS_HAS_CPU_MIPS32_R2
214 select SYS_HAS_EARLY_PRINTK
215 select SYS_SUPPORTS_32BIT_KERNEL
216 select SYS_SUPPORTS_BIG_ENDIAN
217 select SYS_SUPPORTS_MIPS16
218 select SYS_SUPPORTS_ZBOOT_UART_PROM
220 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
222 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
225 bool "Broadcom Generic BMIPS kernel"
226 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
227 select ARCH_HAS_PHYS_TO_DMA
229 select NO_EXCEPT_FILL
235 select BCM6345_L1_IRQ
236 select BCM7038_L1_IRQ
237 select BCM7120_L2_IRQ
238 select BRCMSTB_L2_IRQ
240 select DMA_NONCOHERENT
241 select SYS_SUPPORTS_32BIT_KERNEL
242 select SYS_SUPPORTS_LITTLE_ENDIAN
243 select SYS_SUPPORTS_BIG_ENDIAN
244 select SYS_SUPPORTS_HIGHMEM
245 select SYS_HAS_CPU_BMIPS32_3300
246 select SYS_HAS_CPU_BMIPS4350
247 select SYS_HAS_CPU_BMIPS4380
248 select SYS_HAS_CPU_BMIPS5000
250 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
251 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
252 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
253 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
254 select HARDIRQS_SW_RESEND
256 Build a generic DT-based kernel image that boots on select
257 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
258 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
259 must be set appropriately for your board.
262 bool "Broadcom BCM47XX based boards"
266 select DMA_NONCOHERENT
269 select SYS_HAS_CPU_MIPS32_R1
270 select NO_EXCEPT_FILL
271 select SYS_SUPPORTS_32BIT_KERNEL
272 select SYS_SUPPORTS_LITTLE_ENDIAN
273 select SYS_SUPPORTS_MIPS16
274 select SYS_SUPPORTS_ZBOOT
275 select SYS_HAS_EARLY_PRINTK
276 select USE_GENERIC_EARLY_PRINTK_8250
278 select LEDS_GPIO_REGISTER
281 select BCM47XX_SSB if !BCM47XX_BCMA
283 Support for BCM47XX based boards
286 bool "Broadcom BCM63XX based boards"
291 select DMA_NONCOHERENT
293 select SYS_SUPPORTS_32BIT_KERNEL
294 select SYS_SUPPORTS_BIG_ENDIAN
295 select SYS_HAS_EARLY_PRINTK
299 select MIPS_L1_CACHE_SHIFT_4
302 Support for BCM63XX based boards
309 select DMA_NONCOHERENT
315 select PCI_GT64XXX_PCI0
316 select SYS_HAS_CPU_NEVADA
317 select SYS_HAS_EARLY_PRINTK
318 select SYS_SUPPORTS_32BIT_KERNEL
319 select SYS_SUPPORTS_64BIT_KERNEL
320 select SYS_SUPPORTS_LITTLE_ENDIAN
321 select USE_GENERIC_EARLY_PRINTK_8250
323 config MACH_DECSTATION
327 select CEVT_R4K if CPU_R4X00
329 select CSRC_R4K if CPU_R4X00
330 select CPU_DADDI_WORKAROUNDS if 64BIT
331 select CPU_R4000_WORKAROUNDS if 64BIT
332 select CPU_R4400_WORKAROUNDS if 64BIT
333 select DMA_NONCOHERENT
336 select SYS_HAS_CPU_R3000
337 select SYS_HAS_CPU_R4X00
338 select SYS_SUPPORTS_32BIT_KERNEL
339 select SYS_SUPPORTS_64BIT_KERNEL
340 select SYS_SUPPORTS_LITTLE_ENDIAN
341 select SYS_SUPPORTS_128HZ
342 select SYS_SUPPORTS_256HZ
343 select SYS_SUPPORTS_1024HZ
344 select MIPS_L1_CACHE_SHIFT_4
346 This enables support for DEC's MIPS based workstations. For details
347 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
348 DECstation porting pages on <http://decstation.unix-ag.org/>.
350 If you have one of the following DECstation Models you definitely
351 want to choose R4xx0 for the CPU Type:
358 otherwise choose R3000.
361 bool "Jazz family of machines"
362 select ARCH_MIGHT_HAVE_PC_PARPORT
363 select ARCH_MIGHT_HAVE_PC_SERIO
366 select ARCH_MAY_HAVE_PC_FDC
369 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
370 select GENERIC_ISA_DMA
371 select HAVE_PCSPKR_PLATFORM
376 select SYS_HAS_CPU_R4X00
377 select SYS_SUPPORTS_32BIT_KERNEL
378 select SYS_SUPPORTS_64BIT_KERNEL
379 select SYS_SUPPORTS_100HZ
381 This a family of machines based on the MIPS R4030 chipset which was
382 used by several vendors to build RISC/os and Windows NT workstations.
383 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
384 Olivetti M700-10 workstations.
387 bool "Ingenic SoC based machines"
388 select SYS_SUPPORTS_32BIT_KERNEL
389 select SYS_SUPPORTS_LITTLE_ENDIAN
390 select SYS_SUPPORTS_ZBOOT_UART16550
391 select CPU_SUPPORTS_HUGEPAGES
392 select DMA_NONCOHERENT
397 select GENERIC_IRQ_CHIP
398 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
403 bool "Lantiq based platforms"
404 select DMA_NONCOHERENT
408 select SYS_HAS_CPU_MIPS32_R1
409 select SYS_HAS_CPU_MIPS32_R2
410 select SYS_SUPPORTS_BIG_ENDIAN
411 select SYS_SUPPORTS_32BIT_KERNEL
412 select SYS_SUPPORTS_MIPS16
413 select SYS_SUPPORTS_MULTITHREADING
414 select SYS_SUPPORTS_VPE_LOADER
415 select SYS_HAS_EARLY_PRINTK
422 select PINCTRL_LANTIQ
423 select ARCH_HAS_RESET_CONTROLLER
424 select RESET_CONTROLLER
427 bool "LASAT Networks platforms"
431 select DMA_NONCOHERENT
432 select SYS_HAS_EARLY_PRINTK
435 select PCI_GT64XXX_PCI0
437 select R5000_CPU_SCACHE
438 select SYS_HAS_CPU_R5000
439 select SYS_SUPPORTS_32BIT_KERNEL
440 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
441 select SYS_SUPPORTS_LITTLE_ENDIAN
443 config MACH_LOONGSON32
444 bool "Loongson-1 family of machines"
445 select SYS_SUPPORTS_ZBOOT
447 This enables support for the Loongson-1 family of machines.
449 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
450 the Institute of Computing Technology (ICT), Chinese Academy of
453 config MACH_LOONGSON64
454 bool "Loongson-2/3 family of machines"
455 select SYS_SUPPORTS_ZBOOT
457 This enables the support of Loongson-2/3 family of machines.
459 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
460 family of multi-core CPUs. They are both 64-bit general-purpose
461 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
462 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
463 in the People's Republic of China. The chief architect is Professor
466 config MACH_PISTACHIO
467 bool "IMG Pistachio SoC based boards"
471 select CLKSRC_MIPS_GIC
474 select DMA_NONCOHERENT
479 select MIPS_CPU_SCACHE
483 select SYS_HAS_CPU_MIPS32_R2
484 select SYS_SUPPORTS_32BIT_KERNEL
485 select SYS_SUPPORTS_LITTLE_ENDIAN
486 select SYS_SUPPORTS_MIPS_CPS
487 select SYS_SUPPORTS_MULTITHREADING
488 select SYS_SUPPORTS_RELOCATABLE
489 select SYS_SUPPORTS_ZBOOT
490 select SYS_HAS_EARLY_PRINTK
491 select USE_GENERIC_EARLY_PRINTK_8250
494 This enables support for the IMG Pistachio SoC platform.
497 bool "MIPS Malta board"
498 select ARCH_MAY_HAVE_PC_FDC
499 select ARCH_MIGHT_HAVE_PC_PARPORT
500 select ARCH_MIGHT_HAVE_PC_SERIO
505 select CLKSRC_MIPS_GIC
508 select DMA_MAYBE_COHERENT
509 select GENERIC_ISA_DMA
510 select HAVE_PCSPKR_PLATFORM
517 select MIPS_CPU_SCACHE
519 select MIPS_L1_CACHE_SHIFT_6
521 select PCI_GT64XXX_PCI0
524 select SYS_HAS_CPU_MIPS32_R1
525 select SYS_HAS_CPU_MIPS32_R2
526 select SYS_HAS_CPU_MIPS32_R3_5
527 select SYS_HAS_CPU_MIPS32_R5
528 select SYS_HAS_CPU_MIPS32_R6
529 select SYS_HAS_CPU_MIPS64_R1
530 select SYS_HAS_CPU_MIPS64_R2
531 select SYS_HAS_CPU_MIPS64_R6
532 select SYS_HAS_CPU_NEVADA
533 select SYS_HAS_CPU_RM7000
534 select SYS_SUPPORTS_32BIT_KERNEL
535 select SYS_SUPPORTS_64BIT_KERNEL
536 select SYS_SUPPORTS_BIG_ENDIAN
537 select SYS_SUPPORTS_HIGHMEM
538 select SYS_SUPPORTS_LITTLE_ENDIAN
539 select SYS_SUPPORTS_MICROMIPS
540 select SYS_SUPPORTS_MIPS16
541 select SYS_SUPPORTS_MIPS_CMP
542 select SYS_SUPPORTS_MIPS_CPS
543 select SYS_SUPPORTS_MULTITHREADING
544 select SYS_SUPPORTS_RELOCATABLE
545 select SYS_SUPPORTS_SMARTMIPS
546 select SYS_SUPPORTS_VPE_LOADER
547 select SYS_SUPPORTS_ZBOOT
549 select ZONE_DMA32 if 64BIT
551 This enables support for the MIPS Technologies Malta evaluation
555 bool "Microchip PIC32 Family"
557 This enables support for the Microchip PIC32 family of platforms.
559 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
563 bool "NEC EMMA2RH Mark-eins board"
567 This enables support for the NEC Electronics Mark-eins boards.
570 bool "NEC VR4100 series based machines"
573 select SYS_HAS_CPU_VR41XX
574 select SYS_SUPPORTS_MIPS16
578 bool "NXP STB220 board"
581 Support for NXP Semiconductors STB220 Development Board.
588 Support for NXP Semiconductors STB225 Development Board.
591 bool "PMC-Sierra MSP chipsets"
594 select DMA_NONCOHERENT
596 select NO_EXCEPT_FILL
598 select SYS_HAS_CPU_MIPS32_R1
599 select SYS_HAS_CPU_MIPS32_R2
600 select SYS_SUPPORTS_32BIT_KERNEL
601 select SYS_SUPPORTS_BIG_ENDIAN
602 select SYS_SUPPORTS_MIPS16
605 select SERIAL_8250_CONSOLE
606 select USB_EHCI_BIG_ENDIAN_MMIO
607 select USB_EHCI_BIG_ENDIAN_DESC
609 This adds support for the PMC-Sierra family of Multi-Service
610 Processor System-On-A-Chips. These parts include a number
611 of integrated peripherals, interfaces and DSPs in addition to
612 a variety of MIPS cores.
615 bool "Ralink based machines"
619 select DMA_NONCOHERENT
622 select SYS_HAS_CPU_MIPS32_R1
623 select SYS_HAS_CPU_MIPS32_R2
624 select SYS_SUPPORTS_32BIT_KERNEL
625 select SYS_SUPPORTS_LITTLE_ENDIAN
626 select SYS_SUPPORTS_MIPS16
627 select SYS_HAS_EARLY_PRINTK
629 select ARCH_HAS_RESET_CONTROLLER
630 select RESET_CONTROLLER
633 bool "SGI IP22 (Indy/Indigo2)"
636 select ARCH_MIGHT_HAVE_PC_SERIO
640 select DEFAULT_SGI_PARTITION
641 select DMA_NONCOHERENT
645 select IP22_CPU_SCACHE
647 select GENERIC_ISA_DMA_SUPPORT_BROKEN
649 select SGI_HAS_INDYDOG
655 select SYS_HAS_CPU_R4X00
656 select SYS_HAS_CPU_R5000
658 # Disable EARLY_PRINTK for now since it leads to overwritten prom
659 # memory during early boot on some machines.
661 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
662 # for a more details discussion
664 # select SYS_HAS_EARLY_PRINTK
665 select SYS_SUPPORTS_32BIT_KERNEL
666 select SYS_SUPPORTS_64BIT_KERNEL
667 select SYS_SUPPORTS_BIG_ENDIAN
668 select MIPS_L1_CACHE_SHIFT_7
670 This are the SGI Indy, Challenge S and Indigo2, as well as certain
671 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
672 that runs on these, say Y here.
675 bool "SGI IP27 (Origin200/2000)"
676 select ARCH_HAS_PHYS_TO_DMA
680 select DEFAULT_SGI_PARTITION
681 select SYS_HAS_EARLY_PRINTK
684 select IRQ_DOMAIN_HIERARCHY
685 select NR_CPUS_DEFAULT_64
686 select PCI_DRIVERS_GENERIC
687 select PCI_XTALK_BRIDGE
688 select SYS_HAS_CPU_R10000
689 select SYS_SUPPORTS_64BIT_KERNEL
690 select SYS_SUPPORTS_BIG_ENDIAN
691 select SYS_SUPPORTS_NUMA
692 select SYS_SUPPORTS_SMP
693 select MIPS_L1_CACHE_SHIFT_7
695 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
696 workstations. To compile a Linux kernel that runs on these, say Y
700 bool "SGI IP28 (Indigo2 R10k)"
703 select ARCH_MIGHT_HAVE_PC_SERIO
707 select DEFAULT_SGI_PARTITION
708 select DMA_NONCOHERENT
709 select GENERIC_ISA_DMA_SUPPORT_BROKEN
715 select SGI_HAS_INDYDOG
721 select SYS_HAS_CPU_R10000
723 # Disable EARLY_PRINTK for now since it leads to overwritten prom
724 # memory during early boot on some machines.
726 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
727 # for a more details discussion
729 # select SYS_HAS_EARLY_PRINTK
730 select SYS_SUPPORTS_64BIT_KERNEL
731 select SYS_SUPPORTS_BIG_ENDIAN
732 select MIPS_L1_CACHE_SHIFT_7
734 This is the SGI Indigo2 with R10000 processor. To compile a Linux
735 kernel that runs on these, say Y here.
739 select ARCH_HAS_PHYS_TO_DMA
745 select DMA_NONCOHERENT
748 select R5000_CPU_SCACHE
749 select RM7000_CPU_SCACHE
750 select SYS_HAS_CPU_R5000
751 select SYS_HAS_CPU_R10000 if BROKEN
752 select SYS_HAS_CPU_RM7000
753 select SYS_HAS_CPU_NEVADA
754 select SYS_SUPPORTS_64BIT_KERNEL
755 select SYS_SUPPORTS_BIG_ENDIAN
757 If you want this kernel to run on SGI O2 workstation, say Y here.
760 bool "Sibyte BCM91120C-CRhine"
762 select SIBYTE_BCM1120
764 select SYS_HAS_CPU_SB1
765 select SYS_SUPPORTS_BIG_ENDIAN
766 select SYS_SUPPORTS_LITTLE_ENDIAN
769 bool "Sibyte BCM91120x-Carmel"
771 select SIBYTE_BCM1120
773 select SYS_HAS_CPU_SB1
774 select SYS_SUPPORTS_BIG_ENDIAN
775 select SYS_SUPPORTS_LITTLE_ENDIAN
778 bool "Sibyte BCM91125C-CRhone"
780 select SIBYTE_BCM1125
782 select SYS_HAS_CPU_SB1
783 select SYS_SUPPORTS_BIG_ENDIAN
784 select SYS_SUPPORTS_HIGHMEM
785 select SYS_SUPPORTS_LITTLE_ENDIAN
788 bool "Sibyte BCM91125E-Rhone"
790 select SIBYTE_BCM1125H
792 select SYS_HAS_CPU_SB1
793 select SYS_SUPPORTS_BIG_ENDIAN
794 select SYS_SUPPORTS_LITTLE_ENDIAN
797 bool "Sibyte BCM91250A-SWARM"
799 select HAVE_PATA_PLATFORM
802 select SYS_HAS_CPU_SB1
803 select SYS_SUPPORTS_BIG_ENDIAN
804 select SYS_SUPPORTS_HIGHMEM
805 select SYS_SUPPORTS_LITTLE_ENDIAN
806 select ZONE_DMA32 if 64BIT
807 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
809 config SIBYTE_LITTLESUR
810 bool "Sibyte BCM91250C2-LittleSur"
812 select HAVE_PATA_PLATFORM
815 select SYS_HAS_CPU_SB1
816 select SYS_SUPPORTS_BIG_ENDIAN
817 select SYS_SUPPORTS_HIGHMEM
818 select SYS_SUPPORTS_LITTLE_ENDIAN
819 select ZONE_DMA32 if 64BIT
821 config SIBYTE_SENTOSA
822 bool "Sibyte BCM91250E-Sentosa"
826 select SYS_HAS_CPU_SB1
827 select SYS_SUPPORTS_BIG_ENDIAN
828 select SYS_SUPPORTS_LITTLE_ENDIAN
829 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
832 bool "Sibyte BCM91480B-BigSur"
834 select NR_CPUS_DEFAULT_4
835 select SIBYTE_BCM1x80
837 select SYS_HAS_CPU_SB1
838 select SYS_SUPPORTS_BIG_ENDIAN
839 select SYS_SUPPORTS_HIGHMEM
840 select SYS_SUPPORTS_LITTLE_ENDIAN
841 select ZONE_DMA32 if 64BIT
842 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
845 bool "SNI RM200/300/400"
846 select FW_ARC if CPU_LITTLE_ENDIAN
847 select FW_ARC32 if CPU_LITTLE_ENDIAN
848 select FW_SNIPROM if CPU_BIG_ENDIAN
849 select ARCH_MAY_HAVE_PC_FDC
850 select ARCH_MIGHT_HAVE_PC_PARPORT
851 select ARCH_MIGHT_HAVE_PC_SERIO
855 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
856 select DMA_NONCOHERENT
857 select GENERIC_ISA_DMA
859 select HAVE_PCSPKR_PLATFORM
865 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
866 select SYS_HAS_CPU_R4X00
867 select SYS_HAS_CPU_R5000
868 select SYS_HAS_CPU_R10000
869 select R5000_CPU_SCACHE
870 select SYS_HAS_EARLY_PRINTK
871 select SYS_SUPPORTS_32BIT_KERNEL
872 select SYS_SUPPORTS_64BIT_KERNEL
873 select SYS_SUPPORTS_BIG_ENDIAN
874 select SYS_SUPPORTS_HIGHMEM
875 select SYS_SUPPORTS_LITTLE_ENDIAN
877 The SNI RM200/300/400 are MIPS-based machines manufactured by
878 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
879 Technology and now in turn merged with Fujitsu. Say Y here to
880 support this machine type.
883 bool "Toshiba TX39 series based machines"
886 bool "Toshiba TX49 series based machines"
888 config MIKROTIK_RB532
889 bool "Mikrotik RB532 boards"
892 select DMA_NONCOHERENT
895 select SYS_HAS_CPU_MIPS32_R1
896 select SYS_SUPPORTS_32BIT_KERNEL
897 select SYS_SUPPORTS_LITTLE_ENDIAN
901 select MIPS_L1_CACHE_SHIFT_4
903 Support the Mikrotik(tm) RouterBoard 532 series,
904 based on the IDT RC32434 SoC.
906 config CAVIUM_OCTEON_SOC
907 bool "Cavium Networks Octeon SoC based boards"
909 select ARCH_HAS_PHYS_TO_DMA
911 select PHYS_ADDR_T_64BIT
912 select SYS_SUPPORTS_64BIT_KERNEL
913 select SYS_SUPPORTS_BIG_ENDIAN
915 select EDAC_ATOMIC_SCRUB
916 select SYS_SUPPORTS_LITTLE_ENDIAN
917 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
918 select SYS_HAS_EARLY_PRINTK
919 select SYS_HAS_CPU_CAVIUM_OCTEON
926 select ARCH_SPARSEMEM_ENABLE
927 select SYS_SUPPORTS_SMP
928 select NR_CPUS_DEFAULT_64
929 select MIPS_NR_CPU_NR_MAP_1024
931 select MTD_COMPLEX_MAPPINGS
933 select SYS_SUPPORTS_RELOCATABLE
935 This option supports all of the Octeon reference boards from Cavium
936 Networks. It builds a kernel that dynamically determines the Octeon
937 CPU type and supports all known board reference implementations.
938 Some of the supported boards are:
945 Say Y here for most Octeon reference boards.
948 bool "Netlogic XLR/XLS based systems"
951 select SYS_HAS_CPU_XLR
952 select SYS_SUPPORTS_SMP
955 select SYS_SUPPORTS_32BIT_KERNEL
956 select SYS_SUPPORTS_64BIT_KERNEL
957 select PHYS_ADDR_T_64BIT
958 select SYS_SUPPORTS_BIG_ENDIAN
959 select SYS_SUPPORTS_HIGHMEM
960 select NR_CPUS_DEFAULT_32
964 select ZONE_DMA32 if 64BIT
966 select SYS_HAS_EARLY_PRINTK
967 select SYS_SUPPORTS_ZBOOT
968 select SYS_SUPPORTS_ZBOOT_UART16550
970 Support for systems based on Netlogic XLR and XLS processors.
971 Say Y here if you have a XLR or XLS based board.
974 bool "Netlogic XLP based systems"
977 select SYS_HAS_CPU_XLP
978 select SYS_SUPPORTS_SMP
980 select SYS_SUPPORTS_32BIT_KERNEL
981 select SYS_SUPPORTS_64BIT_KERNEL
982 select PHYS_ADDR_T_64BIT
984 select SYS_SUPPORTS_BIG_ENDIAN
985 select SYS_SUPPORTS_LITTLE_ENDIAN
986 select SYS_SUPPORTS_HIGHMEM
987 select NR_CPUS_DEFAULT_32
991 select ZONE_DMA32 if 64BIT
993 select SYS_HAS_EARLY_PRINTK
995 select SYS_SUPPORTS_ZBOOT
996 select SYS_SUPPORTS_ZBOOT_UART16550
998 This board is based on Netlogic XLP Processor.
999 Say Y here if you have a XLP based board.
1001 config MIPS_PARAVIRT
1002 bool "Para-Virtualized guest system"
1005 select SYS_SUPPORTS_64BIT_KERNEL
1006 select SYS_SUPPORTS_32BIT_KERNEL
1007 select SYS_SUPPORTS_BIG_ENDIAN
1008 select SYS_SUPPORTS_SMP
1009 select NR_CPUS_DEFAULT_4
1010 select SYS_HAS_EARLY_PRINTK
1011 select SYS_HAS_CPU_MIPS32_R2
1012 select SYS_HAS_CPU_MIPS64_R2
1013 select SYS_HAS_CPU_CAVIUM_OCTEON
1015 select SWAP_IO_SPACE
1017 This option supports guest running under ????
1021 source "arch/mips/alchemy/Kconfig"
1022 source "arch/mips/ath25/Kconfig"
1023 source "arch/mips/ath79/Kconfig"
1024 source "arch/mips/bcm47xx/Kconfig"
1025 source "arch/mips/bcm63xx/Kconfig"
1026 source "arch/mips/bmips/Kconfig"
1027 source "arch/mips/generic/Kconfig"
1028 source "arch/mips/jazz/Kconfig"
1029 source "arch/mips/jz4740/Kconfig"
1030 source "arch/mips/lantiq/Kconfig"
1031 source "arch/mips/lasat/Kconfig"
1032 source "arch/mips/pic32/Kconfig"
1033 source "arch/mips/pistachio/Kconfig"
1034 source "arch/mips/pmcs-msp71xx/Kconfig"
1035 source "arch/mips/ralink/Kconfig"
1036 source "arch/mips/sgi-ip27/Kconfig"
1037 source "arch/mips/sibyte/Kconfig"
1038 source "arch/mips/txx9/Kconfig"
1039 source "arch/mips/vr41xx/Kconfig"
1040 source "arch/mips/cavium-octeon/Kconfig"
1041 source "arch/mips/loongson32/Kconfig"
1042 source "arch/mips/loongson64/Kconfig"
1043 source "arch/mips/netlogic/Kconfig"
1044 source "arch/mips/paravirt/Kconfig"
1048 config GENERIC_HWEIGHT
1052 config GENERIC_CALIBRATE_DELAY
1056 config SCHED_OMIT_FRAME_POINTER
1061 # Select some configuration options automatically based on user selections.
1066 config ARCH_MAY_HAVE_PC_FDC
1102 config MIPS_CLOCK_VSYSCALL
1103 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1112 config ARCH_SUPPORTS_UPROBES
1115 config DMA_MAYBE_COHERENT
1116 select ARCH_HAS_DMA_COHERENCE_H
1117 select DMA_NONCOHERENT
1120 config DMA_PERDEV_COHERENT
1122 select ARCH_HAS_SETUP_DMA_OPS
1123 select DMA_NONCOHERENT
1125 config DMA_NONCOHERENT
1128 # MIPS allows mixing "slightly different" Cacheability and Coherency
1129 # Attribute bits. It is believed that the uncached access through
1130 # KSEG1 and the implementation specific "uncached accelerated" used
1131 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1132 # significant advantages.
1134 select ARCH_HAS_DMA_WRITE_COMBINE
1135 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1136 select ARCH_HAS_UNCACHED_SEGMENT
1137 select NEED_DMA_MAP_STATE
1138 select ARCH_HAS_DMA_COHERENT_TO_PFN
1139 select DMA_NONCOHERENT_CACHE_SYNC
1141 config SYS_HAS_EARLY_PRINTK
1144 config SYS_SUPPORTS_HOTPLUG_CPU
1147 config MIPS_BONITO64
1162 config NO_IOPORT_MAP
1167 default y if !CPU_HAS_LOAD_STORE_LR
1169 config GENERIC_ISA_DMA
1171 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1174 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1176 select GENERIC_ISA_DMA
1181 config HOLES_IN_ZONE
1184 config SYS_SUPPORTS_RELOCATABLE
1187 Selected if the platform supports relocating the kernel.
1188 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1189 to allow access to command line and entropy sources.
1191 config MIPS_CBPF_JIT
1193 depends on BPF_JIT && HAVE_CBPF_JIT
1195 config MIPS_EBPF_JIT
1197 depends on BPF_JIT && HAVE_EBPF_JIT
1201 # Endianness selection. Sufficiently obscure so many users don't know what to
1202 # answer,so we try hard to limit the available choices. Also the use of a
1203 # choice statement should be more obvious to the user.
1206 prompt "Endianness selection"
1208 Some MIPS machines can be configured for either little or big endian
1209 byte order. These modes require different kernels and a different
1210 Linux distribution. In general there is one preferred byteorder for a
1211 particular system but some systems are just as commonly used in the
1212 one or the other endianness.
1214 config CPU_BIG_ENDIAN
1216 depends on SYS_SUPPORTS_BIG_ENDIAN
1218 config CPU_LITTLE_ENDIAN
1219 bool "Little endian"
1220 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1227 config SYS_SUPPORTS_APM_EMULATION
1230 config SYS_SUPPORTS_BIG_ENDIAN
1233 config SYS_SUPPORTS_LITTLE_ENDIAN
1236 config SYS_SUPPORTS_HUGETLBFS
1238 depends on CPU_SUPPORTS_HUGEPAGES
1241 config MIPS_HUGE_TLB_SUPPORT
1242 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1259 config PCI_GT64XXX_PCI0
1262 config PCI_XTALK_BRIDGE
1265 config NO_EXCEPT_FILL
1272 select DMA_NONCOHERENT
1274 select SWAP_IO_SPACE
1275 select SYS_HAS_CPU_R5500
1276 select SYS_SUPPORTS_32BIT_KERNEL
1277 select SYS_SUPPORTS_64BIT_KERNEL
1278 select SYS_SUPPORTS_BIG_ENDIAN
1285 select DMA_NONCOHERENT
1286 select SYS_HAS_CPU_MIPS32_R2
1287 select SYS_SUPPORTS_32BIT_KERNEL
1288 select SYS_SUPPORTS_LITTLE_ENDIAN
1289 select SYS_SUPPORTS_BIG_ENDIAN
1290 select SYS_SUPPORTS_MIPS16
1291 select CPU_MIPSR2_IRQ_VI
1300 config SWAP_IO_SPACE
1303 config SGI_HAS_INDYDOG
1315 config SGI_HAS_ZILOG
1318 config SGI_HAS_I8042
1321 config DEFAULT_SGI_PARTITION
1333 config MIPS_L1_CACHE_SHIFT_4
1336 config MIPS_L1_CACHE_SHIFT_5
1339 config MIPS_L1_CACHE_SHIFT_6
1342 config MIPS_L1_CACHE_SHIFT_7
1345 config MIPS_L1_CACHE_SHIFT
1347 default "7" if MIPS_L1_CACHE_SHIFT_7
1348 default "6" if MIPS_L1_CACHE_SHIFT_6
1349 default "5" if MIPS_L1_CACHE_SHIFT_5
1350 default "4" if MIPS_L1_CACHE_SHIFT_4
1353 config HAVE_STD_PC_SERIAL_PORT
1357 bool "ARC console support"
1358 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1362 depends on MACH_JAZZ || SNI_RM || SGI_IP32
1367 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
1376 menu "CPU selection"
1382 config CPU_LOONGSON3
1383 bool "Loongson 3 CPU"
1384 depends on SYS_HAS_CPU_LOONGSON3
1385 select ARCH_HAS_PHYS_TO_DMA
1386 select CPU_SUPPORTS_64BIT_KERNEL
1387 select CPU_SUPPORTS_HIGHMEM
1388 select CPU_SUPPORTS_HUGEPAGES
1389 select CPU_HAS_LOAD_STORE_LR
1390 select WEAK_ORDERING
1391 select WEAK_REORDERING_BEYOND_LLSC
1392 select MIPS_PGD_C0_CONTEXT
1393 select MIPS_L1_CACHE_SHIFT_6
1397 The Loongson 3 processor implements the MIPS64R2 instruction
1398 set with many extensions.
1400 config LOONGSON3_ENHANCEMENT
1401 bool "New Loongson 3 CPU Enhancements"
1404 select CPU_HAS_PREFETCH
1405 depends on CPU_LOONGSON3
1407 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
1408 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1409 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
1410 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1411 Fast TLB refill support, etc.
1413 This option enable those enhancements which are not probed at run
1414 time. If you want a generic kernel to run on all Loongson 3 machines,
1415 please say 'N' here. If you want a high-performance kernel to run on
1416 new Loongson 3 machines only, please say 'Y' here.
1418 config CPU_LOONGSON3_WORKAROUNDS
1419 bool "Old Loongson 3 LLSC Workarounds"
1421 depends on CPU_LOONGSON3
1423 Loongson 3 processors have the llsc issues which require workarounds.
1424 Without workarounds the system may hang unexpectedly.
1426 Newer Loongson 3 will fix these issues and no workarounds are needed.
1427 The workarounds have no significant side effect on them but may
1428 decrease the performance of the system so this option should be
1429 disabled unless the kernel is intended to be run on old systems.
1431 If unsure, please say Y.
1433 config CPU_LOONGSON2E
1435 depends on SYS_HAS_CPU_LOONGSON2E
1436 select CPU_LOONGSON2
1438 The Loongson 2E processor implements the MIPS III instruction set
1439 with many extensions.
1441 It has an internal FPGA northbridge, which is compatible to
1444 config CPU_LOONGSON2F
1446 depends on SYS_HAS_CPU_LOONGSON2F
1447 select CPU_LOONGSON2
1450 The Loongson 2F processor implements the MIPS III instruction set
1451 with many extensions.
1453 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1454 have a similar programming interface with FPGA northbridge used in
1457 config CPU_LOONGSON1B
1459 depends on SYS_HAS_CPU_LOONGSON1B
1460 select CPU_LOONGSON1
1461 select LEDS_GPIO_REGISTER
1463 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1464 Release 1 instruction set and part of the MIPS32 Release 2
1467 config CPU_LOONGSON1C
1469 depends on SYS_HAS_CPU_LOONGSON1C
1470 select CPU_LOONGSON1
1471 select LEDS_GPIO_REGISTER
1473 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1474 Release 1 instruction set and part of the MIPS32 Release 2
1477 config CPU_MIPS32_R1
1478 bool "MIPS32 Release 1"
1479 depends on SYS_HAS_CPU_MIPS32_R1
1480 select CPU_HAS_PREFETCH
1481 select CPU_HAS_LOAD_STORE_LR
1482 select CPU_SUPPORTS_32BIT_KERNEL
1483 select CPU_SUPPORTS_HIGHMEM
1485 Choose this option to build a kernel for release 1 or later of the
1486 MIPS32 architecture. Most modern embedded systems with a 32-bit
1487 MIPS processor are based on a MIPS32 processor. If you know the
1488 specific type of processor in your system, choose those that one
1489 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1490 Release 2 of the MIPS32 architecture is available since several
1491 years so chances are you even have a MIPS32 Release 2 processor
1492 in which case you should choose CPU_MIPS32_R2 instead for better
1495 config CPU_MIPS32_R2
1496 bool "MIPS32 Release 2"
1497 depends on SYS_HAS_CPU_MIPS32_R2
1498 select CPU_HAS_PREFETCH
1499 select CPU_HAS_LOAD_STORE_LR
1500 select CPU_SUPPORTS_32BIT_KERNEL
1501 select CPU_SUPPORTS_HIGHMEM
1502 select CPU_SUPPORTS_MSA
1505 Choose this option to build a kernel for release 2 or later of the
1506 MIPS32 architecture. Most modern embedded systems with a 32-bit
1507 MIPS processor are based on a MIPS32 processor. If you know the
1508 specific type of processor in your system, choose those that one
1509 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1511 config CPU_MIPS32_R6
1512 bool "MIPS32 Release 6"
1513 depends on SYS_HAS_CPU_MIPS32_R6
1514 select CPU_HAS_PREFETCH
1515 select CPU_SUPPORTS_32BIT_KERNEL
1516 select CPU_SUPPORTS_HIGHMEM
1517 select CPU_SUPPORTS_MSA
1519 select MIPS_O32_FP64_SUPPORT
1521 Choose this option to build a kernel for release 6 or later of the
1522 MIPS32 architecture. New MIPS processors, starting with the Warrior
1523 family, are based on a MIPS32r6 processor. If you own an older
1524 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1526 config CPU_MIPS64_R1
1527 bool "MIPS64 Release 1"
1528 depends on SYS_HAS_CPU_MIPS64_R1
1529 select CPU_HAS_PREFETCH
1530 select CPU_HAS_LOAD_STORE_LR
1531 select CPU_SUPPORTS_32BIT_KERNEL
1532 select CPU_SUPPORTS_64BIT_KERNEL
1533 select CPU_SUPPORTS_HIGHMEM
1534 select CPU_SUPPORTS_HUGEPAGES
1536 Choose this option to build a kernel for release 1 or later of the
1537 MIPS64 architecture. Many modern embedded systems with a 64-bit
1538 MIPS processor are based on a MIPS64 processor. If you know the
1539 specific type of processor in your system, choose those that one
1540 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1541 Release 2 of the MIPS64 architecture is available since several
1542 years so chances are you even have a MIPS64 Release 2 processor
1543 in which case you should choose CPU_MIPS64_R2 instead for better
1546 config CPU_MIPS64_R2
1547 bool "MIPS64 Release 2"
1548 depends on SYS_HAS_CPU_MIPS64_R2
1549 select CPU_HAS_PREFETCH
1550 select CPU_HAS_LOAD_STORE_LR
1551 select CPU_SUPPORTS_32BIT_KERNEL
1552 select CPU_SUPPORTS_64BIT_KERNEL
1553 select CPU_SUPPORTS_HIGHMEM
1554 select CPU_SUPPORTS_HUGEPAGES
1555 select CPU_SUPPORTS_MSA
1558 Choose this option to build a kernel for release 2 or later of the
1559 MIPS64 architecture. Many modern embedded systems with a 64-bit
1560 MIPS processor are based on a MIPS64 processor. If you know the
1561 specific type of processor in your system, choose those that one
1562 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1564 config CPU_MIPS64_R6
1565 bool "MIPS64 Release 6"
1566 depends on SYS_HAS_CPU_MIPS64_R6
1567 select CPU_HAS_PREFETCH
1568 select CPU_SUPPORTS_32BIT_KERNEL
1569 select CPU_SUPPORTS_64BIT_KERNEL
1570 select CPU_SUPPORTS_HIGHMEM
1571 select CPU_SUPPORTS_HUGEPAGES
1572 select CPU_SUPPORTS_MSA
1573 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1576 Choose this option to build a kernel for release 6 or later of the
1577 MIPS64 architecture. New MIPS processors, starting with the Warrior
1578 family, are based on a MIPS64r6 processor. If you own an older
1579 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1583 depends on SYS_HAS_CPU_R3000
1585 select CPU_HAS_LOAD_STORE_LR
1587 select CPU_SUPPORTS_32BIT_KERNEL
1588 select CPU_SUPPORTS_HIGHMEM
1590 Please make sure to pick the right CPU type. Linux/MIPS is not
1591 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1592 *not* work on R4000 machines and vice versa. However, since most
1593 of the supported machines have an R4000 (or similar) CPU, R4x00
1594 might be a safe bet. If the resulting kernel does not work,
1595 try to recompile with R3000.
1599 depends on SYS_HAS_CPU_TX39XX
1600 select CPU_SUPPORTS_32BIT_KERNEL
1601 select CPU_HAS_LOAD_STORE_LR
1606 depends on SYS_HAS_CPU_VR41XX
1607 select CPU_SUPPORTS_32BIT_KERNEL
1608 select CPU_SUPPORTS_64BIT_KERNEL
1609 select CPU_HAS_LOAD_STORE_LR
1611 The options selects support for the NEC VR4100 series of processors.
1612 Only choose this option if you have one of these processors as a
1613 kernel built with this option will not run on any other type of
1614 processor or vice versa.
1618 depends on SYS_HAS_CPU_R4X00
1619 select CPU_SUPPORTS_32BIT_KERNEL
1620 select CPU_SUPPORTS_64BIT_KERNEL
1621 select CPU_SUPPORTS_HUGEPAGES
1622 select CPU_HAS_LOAD_STORE_LR
1624 MIPS Technologies R4000-series processors other than 4300, including
1625 the R4000, R4400, R4600, and 4700.
1629 depends on SYS_HAS_CPU_TX49XX
1630 select CPU_HAS_PREFETCH
1631 select CPU_HAS_LOAD_STORE_LR
1632 select CPU_SUPPORTS_32BIT_KERNEL
1633 select CPU_SUPPORTS_64BIT_KERNEL
1634 select CPU_SUPPORTS_HUGEPAGES
1638 depends on SYS_HAS_CPU_R5000
1639 select CPU_SUPPORTS_32BIT_KERNEL
1640 select CPU_SUPPORTS_64BIT_KERNEL
1641 select CPU_SUPPORTS_HUGEPAGES
1642 select CPU_HAS_LOAD_STORE_LR
1644 MIPS Technologies R5000-series processors other than the Nevada.
1648 depends on SYS_HAS_CPU_R5500
1649 select CPU_SUPPORTS_32BIT_KERNEL
1650 select CPU_SUPPORTS_64BIT_KERNEL
1651 select CPU_SUPPORTS_HUGEPAGES
1652 select CPU_HAS_LOAD_STORE_LR
1654 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1659 depends on SYS_HAS_CPU_NEVADA
1660 select CPU_SUPPORTS_32BIT_KERNEL
1661 select CPU_SUPPORTS_64BIT_KERNEL
1662 select CPU_SUPPORTS_HUGEPAGES
1663 select CPU_HAS_LOAD_STORE_LR
1665 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1669 depends on SYS_HAS_CPU_R10000
1670 select CPU_HAS_PREFETCH
1671 select CPU_HAS_LOAD_STORE_LR
1672 select CPU_SUPPORTS_32BIT_KERNEL
1673 select CPU_SUPPORTS_64BIT_KERNEL
1674 select CPU_SUPPORTS_HIGHMEM
1675 select CPU_SUPPORTS_HUGEPAGES
1677 MIPS Technologies R10000-series processors.
1681 depends on SYS_HAS_CPU_RM7000
1682 select CPU_HAS_PREFETCH
1683 select CPU_HAS_LOAD_STORE_LR
1684 select CPU_SUPPORTS_32BIT_KERNEL
1685 select CPU_SUPPORTS_64BIT_KERNEL
1686 select CPU_SUPPORTS_HIGHMEM
1687 select CPU_SUPPORTS_HUGEPAGES
1691 depends on SYS_HAS_CPU_SB1
1692 select CPU_HAS_LOAD_STORE_LR
1693 select CPU_SUPPORTS_32BIT_KERNEL
1694 select CPU_SUPPORTS_64BIT_KERNEL
1695 select CPU_SUPPORTS_HIGHMEM
1696 select CPU_SUPPORTS_HUGEPAGES
1697 select WEAK_ORDERING
1699 config CPU_CAVIUM_OCTEON
1700 bool "Cavium Octeon processor"
1701 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1702 select CPU_HAS_PREFETCH
1703 select CPU_HAS_LOAD_STORE_LR
1704 select CPU_SUPPORTS_64BIT_KERNEL
1705 select WEAK_ORDERING
1706 select CPU_SUPPORTS_HIGHMEM
1707 select CPU_SUPPORTS_HUGEPAGES
1708 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1709 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1710 select MIPS_L1_CACHE_SHIFT_7
1713 The Cavium Octeon processor is a highly integrated chip containing
1714 many ethernet hardware widgets for networking tasks. The processor
1715 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1716 Full details can be found at http://www.caviumnetworks.com.
1719 bool "Broadcom BMIPS"
1720 depends on SYS_HAS_CPU_BMIPS
1722 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1723 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1724 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1725 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1726 select CPU_SUPPORTS_32BIT_KERNEL
1727 select DMA_NONCOHERENT
1729 select SWAP_IO_SPACE
1730 select WEAK_ORDERING
1731 select CPU_SUPPORTS_HIGHMEM
1732 select CPU_HAS_PREFETCH
1733 select CPU_HAS_LOAD_STORE_LR
1734 select CPU_SUPPORTS_CPUFREQ
1735 select MIPS_EXTERNAL_TIMER
1737 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1740 bool "Netlogic XLR SoC"
1741 depends on SYS_HAS_CPU_XLR
1742 select CPU_HAS_LOAD_STORE_LR
1743 select CPU_SUPPORTS_32BIT_KERNEL
1744 select CPU_SUPPORTS_64BIT_KERNEL
1745 select CPU_SUPPORTS_HIGHMEM
1746 select CPU_SUPPORTS_HUGEPAGES
1747 select WEAK_ORDERING
1748 select WEAK_REORDERING_BEYOND_LLSC
1750 Netlogic Microsystems XLR/XLS processors.
1753 bool "Netlogic XLP SoC"
1754 depends on SYS_HAS_CPU_XLP
1755 select CPU_SUPPORTS_32BIT_KERNEL
1756 select CPU_SUPPORTS_64BIT_KERNEL
1757 select CPU_SUPPORTS_HIGHMEM
1758 select WEAK_ORDERING
1759 select WEAK_REORDERING_BEYOND_LLSC
1760 select CPU_HAS_PREFETCH
1761 select CPU_HAS_LOAD_STORE_LR
1763 select CPU_SUPPORTS_HUGEPAGES
1764 select MIPS_ASID_BITS_VARIABLE
1766 Netlogic Microsystems XLP processors.
1769 config CPU_MIPS32_3_5_FEATURES
1770 bool "MIPS32 Release 3.5 Features"
1771 depends on SYS_HAS_CPU_MIPS32_R3_5
1772 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1774 Choose this option to build a kernel for release 2 or later of the
1775 MIPS32 architecture including features from the 3.5 release such as
1776 support for Enhanced Virtual Addressing (EVA).
1778 config CPU_MIPS32_3_5_EVA
1779 bool "Enhanced Virtual Addressing (EVA)"
1780 depends on CPU_MIPS32_3_5_FEATURES
1784 Choose this option if you want to enable the Enhanced Virtual
1785 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1786 One of its primary benefits is an increase in the maximum size
1787 of lowmem (up to 3GB). If unsure, say 'N' here.
1789 config CPU_MIPS32_R5_FEATURES
1790 bool "MIPS32 Release 5 Features"
1791 depends on SYS_HAS_CPU_MIPS32_R5
1792 depends on CPU_MIPS32_R2
1794 Choose this option to build a kernel for release 2 or later of the
1795 MIPS32 architecture including features from release 5 such as
1796 support for Extended Physical Addressing (XPA).
1798 config CPU_MIPS32_R5_XPA
1799 bool "Extended Physical Addressing (XPA)"
1800 depends on CPU_MIPS32_R5_FEATURES
1802 depends on !PAGE_SIZE_4KB
1803 depends on SYS_SUPPORTS_HIGHMEM
1806 select PHYS_ADDR_T_64BIT
1809 Choose this option if you want to enable the Extended Physical
1810 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1811 benefit is to increase physical addressing equal to or greater
1812 than 40 bits. Note that this has the side effect of turning on
1813 64-bit addressing which in turn makes the PTEs 64-bit in size.
1814 If unsure, say 'N' here.
1817 config CPU_NOP_WORKAROUNDS
1820 config CPU_JUMP_WORKAROUNDS
1823 config CPU_LOONGSON2F_WORKAROUNDS
1824 bool "Loongson 2F Workarounds"
1826 select CPU_NOP_WORKAROUNDS
1827 select CPU_JUMP_WORKAROUNDS
1829 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1830 require workarounds. Without workarounds the system may hang
1831 unexpectedly. For more information please refer to the gas
1832 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1834 Loongson 2F03 and later have fixed these issues and no workarounds
1835 are needed. The workarounds have no significant side effect on them
1836 but may decrease the performance of the system so this option should
1837 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1840 If unsure, please say Y.
1841 endif # CPU_LOONGSON2F
1843 config SYS_SUPPORTS_ZBOOT
1845 select HAVE_KERNEL_GZIP
1846 select HAVE_KERNEL_BZIP2
1847 select HAVE_KERNEL_LZ4
1848 select HAVE_KERNEL_LZMA
1849 select HAVE_KERNEL_LZO
1850 select HAVE_KERNEL_XZ
1852 config SYS_SUPPORTS_ZBOOT_UART16550
1854 select SYS_SUPPORTS_ZBOOT
1856 config SYS_SUPPORTS_ZBOOT_UART_PROM
1858 select SYS_SUPPORTS_ZBOOT
1860 config CPU_LOONGSON2
1862 select CPU_SUPPORTS_32BIT_KERNEL
1863 select CPU_SUPPORTS_64BIT_KERNEL
1864 select CPU_SUPPORTS_HIGHMEM
1865 select CPU_SUPPORTS_HUGEPAGES
1866 select ARCH_HAS_PHYS_TO_DMA
1867 select CPU_HAS_LOAD_STORE_LR
1869 config CPU_LOONGSON1
1873 select CPU_HAS_PREFETCH
1874 select CPU_HAS_LOAD_STORE_LR
1875 select CPU_SUPPORTS_32BIT_KERNEL
1876 select CPU_SUPPORTS_HIGHMEM
1877 select CPU_SUPPORTS_CPUFREQ
1879 config CPU_BMIPS32_3300
1880 select SMP_UP if SMP
1883 config CPU_BMIPS4350
1885 select SYS_SUPPORTS_SMP
1886 select SYS_SUPPORTS_HOTPLUG_CPU
1888 config CPU_BMIPS4380
1890 select MIPS_L1_CACHE_SHIFT_6
1891 select SYS_SUPPORTS_SMP
1892 select SYS_SUPPORTS_HOTPLUG_CPU
1895 config CPU_BMIPS5000
1897 select MIPS_CPU_SCACHE
1898 select MIPS_L1_CACHE_SHIFT_7
1899 select SYS_SUPPORTS_SMP
1900 select SYS_SUPPORTS_HOTPLUG_CPU
1903 config SYS_HAS_CPU_LOONGSON3
1905 select CPU_SUPPORTS_CPUFREQ
1908 config SYS_HAS_CPU_LOONGSON2E
1911 config SYS_HAS_CPU_LOONGSON2F
1913 select CPU_SUPPORTS_CPUFREQ
1914 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1915 select CPU_SUPPORTS_UNCACHED_ACCELERATED
1917 config SYS_HAS_CPU_LOONGSON1B
1920 config SYS_HAS_CPU_LOONGSON1C
1923 config SYS_HAS_CPU_MIPS32_R1
1926 config SYS_HAS_CPU_MIPS32_R2
1929 config SYS_HAS_CPU_MIPS32_R3_5
1932 config SYS_HAS_CPU_MIPS32_R5
1934 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1936 config SYS_HAS_CPU_MIPS32_R6
1938 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1940 config SYS_HAS_CPU_MIPS64_R1
1943 config SYS_HAS_CPU_MIPS64_R2
1946 config SYS_HAS_CPU_MIPS64_R6
1948 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1950 config SYS_HAS_CPU_R3000
1953 config SYS_HAS_CPU_TX39XX
1956 config SYS_HAS_CPU_VR41XX
1959 config SYS_HAS_CPU_R4X00
1962 config SYS_HAS_CPU_TX49XX
1965 config SYS_HAS_CPU_R5000
1968 config SYS_HAS_CPU_R5500
1971 config SYS_HAS_CPU_NEVADA
1974 config SYS_HAS_CPU_R10000
1976 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1978 config SYS_HAS_CPU_RM7000
1981 config SYS_HAS_CPU_SB1
1984 config SYS_HAS_CPU_CAVIUM_OCTEON
1987 config SYS_HAS_CPU_BMIPS
1990 config SYS_HAS_CPU_BMIPS32_3300
1992 select SYS_HAS_CPU_BMIPS
1994 config SYS_HAS_CPU_BMIPS4350
1996 select SYS_HAS_CPU_BMIPS
1998 config SYS_HAS_CPU_BMIPS4380
2000 select SYS_HAS_CPU_BMIPS
2002 config SYS_HAS_CPU_BMIPS5000
2004 select SYS_HAS_CPU_BMIPS
2005 select ARCH_HAS_SYNC_DMA_FOR_CPU
2007 config SYS_HAS_CPU_XLR
2010 config SYS_HAS_CPU_XLP
2014 # CPU may reorder R->R, R->W, W->R, W->W
2015 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2017 config WEAK_ORDERING
2021 # CPU may reorder reads and writes beyond LL/SC
2022 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2024 config WEAK_REORDERING_BEYOND_LLSC
2029 # These two indicate any level of the MIPS32 and MIPS64 architecture
2033 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
2037 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
2040 # These indicate the revision of the architecture
2044 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2048 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2054 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2056 select HAVE_ARCH_BITREVERSE
2057 select MIPS_ASID_BITS_VARIABLE
2058 select MIPS_CRC_SUPPORT
2061 config TARGET_ISA_REV
2063 default 1 if CPU_MIPSR1
2064 default 2 if CPU_MIPSR2
2065 default 6 if CPU_MIPSR6
2068 Reflects the ISA revision being targeted by the kernel build. This
2069 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2077 config SYS_SUPPORTS_32BIT_KERNEL
2079 config SYS_SUPPORTS_64BIT_KERNEL
2081 config CPU_SUPPORTS_32BIT_KERNEL
2083 config CPU_SUPPORTS_64BIT_KERNEL
2085 config CPU_SUPPORTS_CPUFREQ
2087 config CPU_SUPPORTS_ADDRWINCFG
2089 config CPU_SUPPORTS_HUGEPAGES
2091 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2092 config CPU_SUPPORTS_UNCACHED_ACCELERATED
2094 config MIPS_PGD_C0_CONTEXT
2096 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2099 # Set to y for ptrace access to watch registers.
2101 config HARDWARE_WATCHPOINTS
2103 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2108 prompt "Kernel code model"
2110 You should only select this option if you have a workload that
2111 actually benefits from 64-bit processing or if your machine has
2112 large memory. You will only be presented a single option in this
2113 menu if your system does not support both 32-bit and 64-bit kernels.
2116 bool "32-bit kernel"
2117 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2120 Select this option if you want to build a 32-bit kernel.
2123 bool "64-bit kernel"
2124 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2126 Select this option if you want to build a 64-bit kernel.
2131 bool "KVM Guest Kernel"
2132 depends on BROKEN_ON_SMP
2134 Select this option if building a guest kernel for KVM (Trap & Emulate)
2137 config KVM_GUEST_TIMER_FREQ
2138 int "Count/Compare Timer Frequency (MHz)"
2139 depends on KVM_GUEST
2142 Set this to non-zero if building a guest kernel for KVM to skip RTC
2143 emulation when determining guest CPU Frequency. Instead, the guest's
2144 timer frequency is specified directly.
2146 config MIPS_VA_BITS_48
2147 bool "48 bits virtual memory"
2150 Support a maximum at least 48 bits of application virtual
2151 memory. Default is 40 bits or less, depending on the CPU.
2152 For page sizes 16k and above, this option results in a small
2153 memory overhead for page tables. For 4k page size, a fourth
2154 level of page tables is added which imposes both a memory
2155 overhead as well as slower TLB fault handling.
2160 prompt "Kernel page size"
2161 default PAGE_SIZE_4KB
2163 config PAGE_SIZE_4KB
2165 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
2167 This option select the standard 4kB Linux page size. On some
2168 R3000-family processors this is the only available page size. Using
2169 4kB page size will minimize memory consumption and is therefore
2170 recommended for low memory systems.
2172 config PAGE_SIZE_8KB
2174 depends on CPU_CAVIUM_OCTEON
2175 depends on !MIPS_VA_BITS_48
2177 Using 8kB page size will result in higher performance kernel at
2178 the price of higher memory consumption. This option is available
2179 only on cnMIPS processors. Note that you will need a suitable Linux
2180 distribution to support this.
2182 config PAGE_SIZE_16KB
2184 depends on !CPU_R3000 && !CPU_TX39XX
2186 Using 16kB page size will result in higher performance kernel at
2187 the price of higher memory consumption. This option is available on
2188 all non-R3000 family processors. Note that you will need a suitable
2189 Linux distribution to support this.
2191 config PAGE_SIZE_32KB
2193 depends on CPU_CAVIUM_OCTEON
2194 depends on !MIPS_VA_BITS_48
2196 Using 32kB page size will result in higher performance kernel at
2197 the price of higher memory consumption. This option is available
2198 only on cnMIPS cores. Note that you will need a suitable Linux
2199 distribution to support this.
2201 config PAGE_SIZE_64KB
2203 depends on !CPU_R3000 && !CPU_TX39XX
2205 Using 64kB page size will result in higher performance kernel at
2206 the price of higher memory consumption. This option is available on
2207 all non-R3000 family processor. Not that at the time of this
2208 writing this option is still high experimental.
2212 config FORCE_MAX_ZONEORDER
2213 int "Maximum zone order"
2214 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2215 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2216 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2217 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2218 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2219 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2223 The kernel memory allocator divides physically contiguous memory
2224 blocks into "zones", where each zone is a power of two number of
2225 pages. This option selects the largest power of two that the kernel
2226 keeps in the memory allocator. If you need to allocate very large
2227 blocks of physically contiguous memory, then you may need to
2228 increase this value.
2230 This config option is actually maximum order plus one. For example,
2231 a value of 11 means that the largest free memory block is 2^10 pages.
2233 The page size is not necessarily 4KB. Keep this in mind
2234 when choosing a value for this option.
2239 config IP22_CPU_SCACHE
2244 # Support for a MIPS32 / MIPS64 style S-caches
2246 config MIPS_CPU_SCACHE
2250 config R5000_CPU_SCACHE
2254 config RM7000_CPU_SCACHE
2258 config SIBYTE_DMA_PAGEOPS
2259 bool "Use DMA to clear/copy pages"
2262 Instead of using the CPU to zero and copy pages, use a Data Mover
2263 channel. These DMA channels are otherwise unused by the standard
2264 SiByte Linux port. Seems to give a small performance benefit.
2266 config CPU_HAS_PREFETCH
2269 config CPU_GENERIC_DUMP_TLB
2271 default y if !(CPU_R3000 || CPU_TX39XX)
2273 config MIPS_FP_SUPPORT
2274 bool "Floating Point support" if EXPERT
2277 Select y to include support for floating point in the kernel
2278 including initialization of FPU hardware, FP context save & restore
2279 and emulation of an FPU where necessary. Without this support any
2280 userland program attempting to use floating point instructions will
2283 If you know that your userland will not attempt to use floating point
2284 instructions then you can say n here to shrink the kernel a little.
2288 config CPU_R2300_FPU
2290 depends on MIPS_FP_SUPPORT
2291 default y if CPU_R3000 || CPU_TX39XX
2298 depends on MIPS_FP_SUPPORT
2299 default y if !CPU_R2300_FPU
2301 config CPU_R4K_CACHE_TLB
2303 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2306 bool "MIPS MT SMP support (1 TC on each available VPE)"
2308 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2309 select CPU_MIPSR2_IRQ_VI
2310 select CPU_MIPSR2_IRQ_EI
2315 select SYS_SUPPORTS_SMP
2316 select SYS_SUPPORTS_SCHED_SMT
2317 select MIPS_PERF_SHARED_TC_COUNTERS
2319 This is a kernel model which is known as SMVP. This is supported
2320 on cores with the MT ASE and uses the available VPEs to implement
2321 virtual processors which supports SMP. This is equivalent to the
2322 Intel Hyperthreading feature. For further information go to
2323 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2329 bool "SMT (multithreading) scheduler support"
2330 depends on SYS_SUPPORTS_SCHED_SMT
2333 SMT scheduler support improves the CPU scheduler's decision making
2334 when dealing with MIPS MT enabled cores at a cost of slightly
2335 increased overhead in some places. If unsure say N here.
2337 config SYS_SUPPORTS_SCHED_SMT
2340 config SYS_SUPPORTS_MULTITHREADING
2343 config MIPS_MT_FPAFF
2344 bool "Dynamic FPU affinity for FP-intensive threads"
2346 depends on MIPS_MT_SMP
2348 config MIPSR2_TO_R6_EMULATOR
2349 bool "MIPS R2-to-R6 emulator"
2350 depends on CPU_MIPSR6
2351 depends on MIPS_FP_SUPPORT
2354 Choose this option if you want to run non-R6 MIPS userland code.
2355 Even if you say 'Y' here, the emulator will still be disabled by
2356 default. You can enable it using the 'mipsr2emu' kernel option.
2357 The only reason this is a build-time option is to save ~14K from the
2360 config SYS_SUPPORTS_VPE_LOADER
2362 depends on SYS_SUPPORTS_MULTITHREADING
2364 Indicates that the platform supports the VPE loader, and provides
2367 config MIPS_VPE_LOADER
2368 bool "VPE loader support."
2369 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2370 select CPU_MIPSR2_IRQ_VI
2371 select CPU_MIPSR2_IRQ_EI
2374 Includes a loader for loading an elf relocatable object
2375 onto another VPE and running it.
2377 config MIPS_VPE_LOADER_CMP
2380 depends on MIPS_VPE_LOADER && MIPS_CMP
2382 config MIPS_VPE_LOADER_MT
2385 depends on MIPS_VPE_LOADER && !MIPS_CMP
2387 config MIPS_VPE_LOADER_TOM
2388 bool "Load VPE program into memory hidden from linux"
2389 depends on MIPS_VPE_LOADER
2392 The loader can use memory that is present but has been hidden from
2393 Linux using the kernel command line option "mem=xxMB". It's up to
2394 you to ensure the amount you put in the option and the space your
2395 program requires is less or equal to the amount physically present.
2397 config MIPS_VPE_APSP_API
2398 bool "Enable support for AP/SP API (RTLX)"
2399 depends on MIPS_VPE_LOADER
2401 config MIPS_VPE_APSP_API_CMP
2404 depends on MIPS_VPE_APSP_API && MIPS_CMP
2406 config MIPS_VPE_APSP_API_MT
2409 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2412 bool "MIPS CMP framework support (DEPRECATED)"
2413 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2416 select SYS_SUPPORTS_SMP
2417 select WEAK_ORDERING
2420 Select this if you are using a bootloader which implements the "CMP
2421 framework" protocol (ie. YAMON) and want your kernel to make use of
2422 its ability to start secondary CPUs.
2424 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2428 bool "MIPS Coherent Processing System support"
2429 depends on SYS_SUPPORTS_MIPS_CPS
2431 select MIPS_CPS_PM if HOTPLUG_CPU
2433 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2434 select SYS_SUPPORTS_HOTPLUG_CPU
2435 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2436 select SYS_SUPPORTS_SMP
2437 select WEAK_ORDERING
2439 Select this if you wish to run an SMP kernel across multiple cores
2440 within a MIPS Coherent Processing System. When this option is
2441 enabled the kernel will probe for other cores and boot them with
2442 no external assistance. It is safe to enable this when hardware
2443 support is unavailable.
2456 config SB1_PASS_2_WORKAROUNDS
2458 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2461 config SB1_PASS_2_1_WORKAROUNDS
2463 depends on CPU_SB1 && CPU_SB1_PASS_2
2467 prompt "SmartMIPS or microMIPS ASE support"
2469 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2472 Select this if you want neither microMIPS nor SmartMIPS support
2474 config CPU_HAS_SMARTMIPS
2475 depends on SYS_SUPPORTS_SMARTMIPS
2478 SmartMIPS is a extension of the MIPS32 architecture aimed at
2479 increased security at both hardware and software level for
2480 smartcards. Enabling this option will allow proper use of the
2481 SmartMIPS instructions by Linux applications. However a kernel with
2482 this option will not work on a MIPS core without SmartMIPS core. If
2483 you don't know you probably don't have SmartMIPS and should say N
2486 config CPU_MICROMIPS
2487 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2490 When this option is enabled the kernel will be built using the
2496 bool "Support for the MIPS SIMD Architecture"
2497 depends on CPU_SUPPORTS_MSA
2498 depends on MIPS_FP_SUPPORT
2499 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2501 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2502 and a set of SIMD instructions to operate on them. When this option
2503 is enabled the kernel will support allocating & switching MSA
2504 vector register contexts. If you know that your kernel will only be
2505 running on CPUs which do not support MSA or that your userland will
2506 not be making use of it then you may wish to say N here to reduce
2507 the size & complexity of your kernel.
2520 config CPU_HAS_LOAD_STORE_LR
2523 CPU has support for unaligned load and store instructions:
2524 LWL, LWR, SWL, SWR (Load/store word left/right).
2525 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
2528 # Vectored interrupt mode is an R2 feature
2530 config CPU_MIPSR2_IRQ_VI
2534 # Extended interrupt mode is an R2 feature
2536 config CPU_MIPSR2_IRQ_EI
2541 depends on !CPU_R3000
2547 config CPU_DADDI_WORKAROUNDS
2550 config CPU_R4000_WORKAROUNDS
2552 select CPU_R4400_WORKAROUNDS
2554 config CPU_R4400_WORKAROUNDS
2557 config MIPS_ASID_SHIFT
2559 default 6 if CPU_R3000 || CPU_TX39XX
2562 config MIPS_ASID_BITS
2564 default 0 if MIPS_ASID_BITS_VARIABLE
2565 default 6 if CPU_R3000 || CPU_TX39XX
2568 config MIPS_ASID_BITS_VARIABLE
2571 config MIPS_CRC_SUPPORT
2575 # - Highmem only makes sense for the 32-bit kernel.
2576 # - The current highmem code will only work properly on physically indexed
2577 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2578 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2579 # moment we protect the user and offer the highmem option only on machines
2580 # where it's known to be safe. This will not offer highmem on a few systems
2581 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2582 # indexed CPUs but we're playing safe.
2583 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2584 # know they might have memory configurations that could make use of highmem
2588 bool "High Memory Support"
2589 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2591 config CPU_SUPPORTS_HIGHMEM
2594 config SYS_SUPPORTS_HIGHMEM
2597 config SYS_SUPPORTS_SMARTMIPS
2600 config SYS_SUPPORTS_MICROMIPS
2603 config SYS_SUPPORTS_MIPS16
2606 This option must be set if a kernel might be executed on a MIPS16-
2607 enabled CPU even if MIPS16 is not actually being used. In other
2608 words, it makes the kernel MIPS16-tolerant.
2610 config CPU_SUPPORTS_MSA
2613 config ARCH_FLATMEM_ENABLE
2615 depends on !NUMA && !CPU_LOONGSON2
2617 config ARCH_DISCONTIGMEM_ENABLE
2619 default y if SGI_IP27
2621 Say Y to support efficient handling of discontiguous physical memory,
2622 for architectures which are either NUMA (Non-Uniform Memory Access)
2623 or have huge holes in the physical address space for other reasons.
2624 See <file:Documentation/vm/numa.rst> for more.
2626 config ARCH_SPARSEMEM_ENABLE
2628 select SPARSEMEM_STATIC
2632 depends on SYS_SUPPORTS_NUMA
2634 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2635 Access). This option improves performance on systems with more
2636 than two nodes; on two node systems it is generally better to
2637 leave it disabled; on single node systems disable this option
2640 config SYS_SUPPORTS_NUMA
2644 bool "Relocatable kernel"
2645 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
2647 This builds a kernel image that retains relocation information
2648 so it can be loaded someplace besides the default 1MB.
2649 The relocations make the kernel binary about 15% larger,
2650 but are discarded at runtime
2652 config RELOCATION_TABLE_SIZE
2653 hex "Relocation table size"
2654 depends on RELOCATABLE
2655 range 0x0 0x01000000
2656 default "0x00100000"
2658 A table of relocation data will be appended to the kernel binary
2659 and parsed at boot to fix up the relocated kernel.
2661 This option allows the amount of space reserved for the table to be
2662 adjusted, although the default of 1Mb should be ok in most cases.
2664 The build will fail and a valid size suggested if this is too small.
2666 If unsure, leave at the default value.
2668 config RANDOMIZE_BASE
2669 bool "Randomize the address of the kernel image"
2670 depends on RELOCATABLE
2672 Randomizes the physical and virtual address at which the
2673 kernel image is loaded, as a security feature that
2674 deters exploit attempts relying on knowledge of the location
2675 of kernel internals.
2677 Entropy is generated using any coprocessor 0 registers available.
2679 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2683 config RANDOMIZE_BASE_MAX_OFFSET
2684 hex "Maximum kASLR offset" if EXPERT
2685 depends on RANDOMIZE_BASE
2686 range 0x0 0x40000000 if EVA || 64BIT
2687 range 0x0 0x08000000
2688 default "0x01000000"
2690 When kASLR is active, this provides the maximum offset that will
2691 be applied to the kernel image. It should be set according to the
2692 amount of physical RAM available in the target system minus
2693 PHYSICAL_START and must be a power of 2.
2695 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2696 EVA or 64-bit. The default is 16Mb.
2701 depends on NEED_MULTIPLE_NODES
2703 config HW_PERF_EVENTS
2704 bool "Enable hardware performance counter support for perf events"
2705 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
2708 Enable hardware performance counter support for perf events. If
2709 disabled, perf events will use software events only.
2712 bool "Multi-Processing support"
2713 depends on SYS_SUPPORTS_SMP
2715 This enables support for systems with more than one CPU. If you have
2716 a system with only one CPU, say N. If you have a system with more
2717 than one CPU, say Y.
2719 If you say N here, the kernel will run on uni- and multiprocessor
2720 machines, but will use only one CPU of a multiprocessor machine. If
2721 you say Y here, the kernel will run on many, but not all,
2722 uniprocessor machines. On a uniprocessor machine, the kernel
2723 will run faster if you say N here.
2725 People using multiprocessor machines who say Y here should also say
2726 Y to "Enhanced Real Time Clock Support", below.
2728 See also the SMP-HOWTO available at
2729 <http://www.tldp.org/docs.html#howto>.
2731 If you don't know what to do here, say N.
2734 bool "Support for hot-pluggable CPUs"
2735 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2737 Say Y here to allow turning CPUs off and on. CPUs can be
2738 controlled through /sys/devices/system/cpu.
2739 (Note: power management support will enable this option
2740 automatically on SMP systems. )
2741 Say N if you want to disable CPU hotplug.
2746 config SYS_SUPPORTS_MIPS_CMP
2749 config SYS_SUPPORTS_MIPS_CPS
2752 config SYS_SUPPORTS_SMP
2755 config NR_CPUS_DEFAULT_4
2758 config NR_CPUS_DEFAULT_8
2761 config NR_CPUS_DEFAULT_16
2764 config NR_CPUS_DEFAULT_32
2767 config NR_CPUS_DEFAULT_64
2771 int "Maximum number of CPUs (2-256)"
2774 default "4" if NR_CPUS_DEFAULT_4
2775 default "8" if NR_CPUS_DEFAULT_8
2776 default "16" if NR_CPUS_DEFAULT_16
2777 default "32" if NR_CPUS_DEFAULT_32
2778 default "64" if NR_CPUS_DEFAULT_64
2780 This allows you to specify the maximum number of CPUs which this
2781 kernel will support. The maximum supported value is 32 for 32-bit
2782 kernel and 64 for 64-bit kernels; the minimum value which makes
2783 sense is 1 for Qemu (useful only for kernel debugging purposes)
2784 and 2 for all others.
2786 This is purely to save memory - each supported CPU adds
2787 approximately eight kilobytes to the kernel image. For best
2788 performance should round up your number of processors to the next
2791 config MIPS_PERF_SHARED_TC_COUNTERS
2794 config MIPS_NR_CPU_NR_MAP_1024
2797 config MIPS_NR_CPU_NR_MAP
2800 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2801 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2804 # Timer Interrupt Frequency Configuration
2808 prompt "Timer frequency"
2811 Allows the configuration of the timer frequency.
2814 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2817 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2820 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2823 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2826 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2829 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2832 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2835 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2839 config SYS_SUPPORTS_24HZ
2842 config SYS_SUPPORTS_48HZ
2845 config SYS_SUPPORTS_100HZ
2848 config SYS_SUPPORTS_128HZ
2851 config SYS_SUPPORTS_250HZ
2854 config SYS_SUPPORTS_256HZ
2857 config SYS_SUPPORTS_1000HZ
2860 config SYS_SUPPORTS_1024HZ
2863 config SYS_SUPPORTS_ARBIT_HZ
2865 default y if !SYS_SUPPORTS_24HZ && \
2866 !SYS_SUPPORTS_48HZ && \
2867 !SYS_SUPPORTS_100HZ && \
2868 !SYS_SUPPORTS_128HZ && \
2869 !SYS_SUPPORTS_250HZ && \
2870 !SYS_SUPPORTS_256HZ && \
2871 !SYS_SUPPORTS_1000HZ && \
2872 !SYS_SUPPORTS_1024HZ
2878 default 100 if HZ_100
2879 default 128 if HZ_128
2880 default 250 if HZ_250
2881 default 256 if HZ_256
2882 default 1000 if HZ_1000
2883 default 1024 if HZ_1024
2886 def_bool HIGH_RES_TIMERS
2889 bool "Kexec system call"
2892 kexec is a system call that implements the ability to shutdown your
2893 current kernel, and to start another kernel. It is like a reboot
2894 but it is independent of the system firmware. And like a reboot
2895 you can start any kernel with it, not just Linux.
2897 The name comes from the similarity to the exec system call.
2899 It is an ongoing process to be certain the hardware in a machine
2900 is properly shutdown, so do not be surprised if this code does not
2901 initially work for you. As of this writing the exact hardware
2902 interface is strongly in flux, so no good recommendation can be
2906 bool "Kernel crash dumps"
2908 Generate crash dump after being started by kexec.
2909 This should be normally only set in special crash dump kernels
2910 which are loaded in the main kernel with kexec-tools into
2911 a specially reserved region and then later executed after
2912 a crash by kdump/kexec. The crash dump kernel must be compiled
2913 to a memory address not used by the main kernel or firmware using
2916 config PHYSICAL_START
2917 hex "Physical address where the kernel is loaded"
2918 default "0xffffffff84000000"
2919 depends on CRASH_DUMP
2921 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2922 If you plan to use kernel for capturing the crash dump change
2923 this value to start of the reserved region (the "X" value as
2924 specified in the "crashkernel=YM@XM" command line boot parameter
2925 passed to the panic-ed kernel).
2928 bool "Enable seccomp to safely compute untrusted bytecode"
2932 This kernel feature is useful for number crunching applications
2933 that may need to compute untrusted bytecode during their
2934 execution. By using pipes or other transports made available to
2935 the process as file descriptors supporting the read/write
2936 syscalls, it's possible to isolate those applications in
2937 their own address space using seccomp. Once seccomp is
2938 enabled via /proc/<pid>/seccomp, it cannot be disabled
2939 and the task is only allowed to execute a few safe syscalls
2940 defined by each seccomp mode.
2942 If unsure, say Y. Only embedded should say N here.
2944 config MIPS_O32_FP64_SUPPORT
2945 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2946 depends on 32BIT || MIPS32_O32
2948 When this is enabled, the kernel will support use of 64-bit floating
2949 point registers with binaries using the O32 ABI along with the
2950 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2951 32-bit MIPS systems this support is at the cost of increasing the
2952 size and complexity of the compiled FPU emulator. Thus if you are
2953 running a MIPS32 system and know that none of your userland binaries
2954 will require 64-bit floating point, you may wish to reduce the size
2955 of your kernel & potentially improve FP emulation performance by
2958 Although binutils currently supports use of this flag the details
2959 concerning its effect upon the O32 ABI in userland are still being
2960 worked on. In order to avoid userland becoming dependant upon current
2961 behaviour before the details have been finalised, this option should
2962 be considered experimental and only enabled by those working upon
2970 select OF_EARLY_FLATTREE
2980 prompt "Kernel appended dtb support" if USE_OF
2981 default MIPS_NO_APPENDED_DTB
2983 config MIPS_NO_APPENDED_DTB
2986 Do not enable appended dtb support.
2988 config MIPS_ELF_APPENDED_DTB
2991 With this option, the boot code will look for a device tree binary
2992 DTB) included in the vmlinux ELF section .appended_dtb. By default
2993 it is empty and the DTB can be appended using binutils command
2996 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2998 This is meant as a backward compatiblity convenience for those
2999 systems with a bootloader that can't be upgraded to accommodate
3000 the documented boot protocol using a device tree.
3002 config MIPS_RAW_APPENDED_DTB
3003 bool "vmlinux.bin or vmlinuz.bin"
3005 With this option, the boot code will look for a device tree binary
3006 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3007 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3009 This is meant as a backward compatibility convenience for those
3010 systems with a bootloader that can't be upgraded to accommodate
3011 the documented boot protocol using a device tree.
3013 Beware that there is very little in terms of protection against
3014 this option being confused by leftover garbage in memory that might
3015 look like a DTB header after a reboot if no actual DTB is appended
3016 to vmlinux.bin. Do not leave this option active in a production kernel
3017 if you don't intend to always append a DTB.
3021 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3022 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3025 default MIPS_CMDLINE_FROM_BOOTLOADER
3027 config MIPS_CMDLINE_FROM_DTB
3029 bool "Dtb kernel arguments if available"
3031 config MIPS_CMDLINE_DTB_EXTEND
3033 bool "Extend dtb kernel arguments with bootloader arguments"
3035 config MIPS_CMDLINE_FROM_BOOTLOADER
3036 bool "Bootloader kernel arguments if available"
3038 config MIPS_CMDLINE_BUILTIN_EXTEND
3039 depends on CMDLINE_BOOL
3040 bool "Extend builtin kernel arguments with bootloader arguments"
3045 config LOCKDEP_SUPPORT
3049 config STACKTRACE_SUPPORT
3053 config PGTABLE_LEVELS
3055 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3056 default 3 if 64BIT && !PAGE_SIZE_64KB
3059 config MIPS_AUTO_PFN_OFFSET
3062 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3064 config PCI_DRIVERS_GENERIC
3065 select PCI_DOMAINS_GENERIC if PCI
3068 config PCI_DRIVERS_LEGACY
3069 def_bool !PCI_DRIVERS_GENERIC
3070 select NO_GENERIC_PCI_IOPORT_MAP
3071 select PCI_DOMAINS if PCI
3074 # ISA support is now enabled via select. Too many systems still have the one
3075 # or other ISA chip on the board that users don't know about so don't expect
3076 # users to choose the right thing ...
3082 bool "TURBOchannel support"
3083 depends on MACH_DECSTATION
3085 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3086 processors. TURBOchannel programming specifications are available
3088 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3090 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3091 Linux driver support status is documented at:
3092 <http://www.linux-mips.org/wiki/DECstation>
3098 config ARCH_MMAP_RND_BITS_MIN
3102 config ARCH_MMAP_RND_BITS_MAX
3106 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3109 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3116 select MIPS_EXTERNAL_TIMER
3129 config MIPS32_COMPAT
3135 config SYSVIPC_COMPAT
3139 bool "Kernel support for o32 binaries"
3141 select ARCH_WANT_OLD_COMPAT_IPC
3143 select MIPS32_COMPAT
3144 select SYSVIPC_COMPAT if SYSVIPC
3146 Select this option if you want to run o32 binaries. These are pure
3147 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3148 existing binaries are in this format.
3153 bool "Kernel support for n32 binaries"
3155 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3157 select MIPS32_COMPAT
3158 select SYSVIPC_COMPAT if SYSVIPC
3160 Select this option if you want to run n32 binaries. These are
3161 64-bit binaries using 32-bit quantities for addressing and certain
3162 data that would normally be 64-bit. They are used in special
3169 default y if MIPS32_O32 || MIPS32_N32
3172 menu "Power management options"
3174 config ARCH_HIBERNATION_POSSIBLE
3176 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3178 config ARCH_SUSPEND_POSSIBLE
3180 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3182 source "kernel/power/Kconfig"
3186 config MIPS_EXTERNAL_TIMER
3189 menu "CPU Power Management"
3191 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3192 source "drivers/cpufreq/Kconfig"
3195 source "drivers/cpuidle/Kconfig"
3199 source "drivers/firmware/Kconfig"
3201 source "arch/mips/kvm/Kconfig"