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[linux.git] / arch / mips / alchemy / devboards / db1300.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * DBAu1300 init and platform device setup.
4  *
5  * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
6  */
7
8 #include <linux/clk.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/gpio.h>
11 #include <linux/gpio_keys.h>
12 #include <linux/init.h>
13 #include <linux/input.h>        /* KEY_* codes */
14 #include <linux/i2c.h>
15 #include <linux/io.h>
16 #include <linux/leds.h>
17 #include <linux/interrupt.h>
18 #include <linux/ata_platform.h>
19 #include <linux/mmc/host.h>
20 #include <linux/module.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/platnand.h>
23 #include <linux/platform_device.h>
24 #include <linux/smsc911x.h>
25 #include <linux/wm97xx.h>
26
27 #include <asm/mach-au1x00/au1000.h>
28 #include <asm/mach-au1x00/gpio-au1300.h>
29 #include <asm/mach-au1x00/au1100_mmc.h>
30 #include <asm/mach-au1x00/au1200fb.h>
31 #include <asm/mach-au1x00/au1xxx_dbdma.h>
32 #include <asm/mach-au1x00/au1xxx_psc.h>
33 #include <asm/mach-db1x00/bcsr.h>
34 #include <asm/mach-au1x00/prom.h>
35
36 #include "platform.h"
37
38 /* FPGA (external mux) interrupt sources */
39 #define DB1300_FIRST_INT        (ALCHEMY_GPIC_INT_LAST + 1)
40 #define DB1300_IDE_INT          (DB1300_FIRST_INT + 0)
41 #define DB1300_ETH_INT          (DB1300_FIRST_INT + 1)
42 #define DB1300_CF_INT           (DB1300_FIRST_INT + 2)
43 #define DB1300_VIDEO_INT        (DB1300_FIRST_INT + 4)
44 #define DB1300_HDMI_INT         (DB1300_FIRST_INT + 5)
45 #define DB1300_DC_INT           (DB1300_FIRST_INT + 6)
46 #define DB1300_FLASH_INT        (DB1300_FIRST_INT + 7)
47 #define DB1300_CF_INSERT_INT    (DB1300_FIRST_INT + 8)
48 #define DB1300_CF_EJECT_INT     (DB1300_FIRST_INT + 9)
49 #define DB1300_AC97_INT         (DB1300_FIRST_INT + 10)
50 #define DB1300_AC97_PEN_INT     (DB1300_FIRST_INT + 11)
51 #define DB1300_SD1_INSERT_INT   (DB1300_FIRST_INT + 12)
52 #define DB1300_SD1_EJECT_INT    (DB1300_FIRST_INT + 13)
53 #define DB1300_OTG_VBUS_OC_INT  (DB1300_FIRST_INT + 14)
54 #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
55 #define DB1300_LAST_INT         (DB1300_FIRST_INT + 15)
56
57 /* SMSC9210 CS */
58 #define DB1300_ETH_PHYS_ADDR    0x19000000
59 #define DB1300_ETH_PHYS_END     0x197fffff
60
61 /* ATA CS */
62 #define DB1300_IDE_PHYS_ADDR    0x18800000
63 #define DB1300_IDE_REG_SHIFT    5
64 #define DB1300_IDE_PHYS_LEN     (16 << DB1300_IDE_REG_SHIFT)
65
66 /* NAND CS */
67 #define DB1300_NAND_PHYS_ADDR   0x20000000
68 #define DB1300_NAND_PHYS_END    0x20000fff
69
70
71 static struct i2c_board_info db1300_i2c_devs[] __initdata = {
72         { I2C_BOARD_INFO("wm8731", 0x1b), },    /* I2S audio codec */
73         { I2C_BOARD_INFO("ne1619", 0x2d), },    /* adm1025-compat hwmon */
74 };
75
76 /* multifunction pins to assign to GPIO controller */
77 static int db1300_gpio_pins[] __initdata = {
78         AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1,
79         AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX,
80         AU1300_PIN_EXTCLK1,
81         -1,     /* terminator */
82 };
83
84 /* multifunction pins to assign to device functions */
85 static int db1300_dev_pins[] __initdata = {
86         /* wake-from-str pins 0-3 */
87         AU1300_PIN_WAKE0,
88         /* external clock sources for PSC0 */
89         AU1300_PIN_EXTCLK0,
90         /* 8bit MMC interface on SD0: 6-9 */
91         AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6,
92         AU1300_PIN_SD0DAT7,
93         /* UART1 pins: 11-18 */
94         AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR,
95         AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR,
96         AU1300_PIN_U1RX, AU1300_PIN_U1TX,
97         /* UART0 pins: 19-24 */
98         AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR,
99         AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR,
100         /* UART2: 25-26 */
101         AU1300_PIN_U2RX, AU1300_PIN_U2TX,
102         /* UART3: 27-28 */
103         AU1300_PIN_U3RX, AU1300_PIN_U3TX,
104         /* LCD controller PWMs, ext pixclock: 30-31 */
105         AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN,
106         /* SD1 interface: 32-37 */
107         AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2,
108         AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK,
109         /* SD2 interface: 38-43 */
110         AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2,
111         AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK,
112         /* PSC0/1 clocks: 44-45 */
113         AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK,
114         /* PSCs: 46-49/50-53/54-57/58-61 */
115         AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0,
116         AU1300_PIN_PSC0D1,
117         AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0,
118         AU1300_PIN_PSC1D1,
119         AU1300_PIN_PSC2SYNC0,                       AU1300_PIN_PSC2D0,
120         AU1300_PIN_PSC2D1,
121         AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0,
122         AU1300_PIN_PSC3D1,
123         /* PCMCIA interface: 62-70 */
124         AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16,
125         AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT,
126         AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW,
127         /* camera interface H/V sync inputs: 71-72 */
128         AU1300_PIN_CIMLS, AU1300_PIN_CIMFS,
129         /* PSC2/3 clocks: 73-74 */
130         AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK,
131         -1,     /* terminator */
132 };
133
134 static void __init db1300_gpio_config(void)
135 {
136         int *i;
137
138         i = &db1300_dev_pins[0];
139         while (*i != -1)
140                 au1300_pinfunc_to_dev(*i++);
141
142         i = &db1300_gpio_pins[0];
143         while (*i != -1)
144                 au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */
145
146         au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
147 }
148
149 /**********************************************************************/
150
151 static u64 au1300_all_dmamask = DMA_BIT_MASK(32);
152
153 static void au1300_nand_cmd_ctrl(struct nand_chip *this, int cmd,
154                                  unsigned int ctrl)
155 {
156         unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W;
157
158         ioaddr &= 0xffffff00;
159
160         if (ctrl & NAND_CLE) {
161                 ioaddr += MEM_STNAND_CMD;
162         } else if (ctrl & NAND_ALE) {
163                 ioaddr += MEM_STNAND_ADDR;
164         } else {
165                 /* assume we want to r/w real data  by default */
166                 ioaddr += MEM_STNAND_DATA;
167         }
168         this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr;
169         if (cmd != NAND_CMD_NONE) {
170                 __raw_writeb(cmd, this->legacy.IO_ADDR_W);
171                 wmb();
172         }
173 }
174
175 static int au1300_nand_device_ready(struct nand_chip *this)
176 {
177         return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
178 }
179
180 static struct mtd_partition db1300_nand_parts[] = {
181         {
182                 .name   = "NAND FS 0",
183                 .offset = 0,
184                 .size   = 8 * 1024 * 1024,
185         },
186         {
187                 .name   = "NAND FS 1",
188                 .offset = MTDPART_OFS_APPEND,
189                 .size   = MTDPART_SIZ_FULL
190         },
191 };
192
193 struct platform_nand_data db1300_nand_platdata = {
194         .chip = {
195                 .nr_chips       = 1,
196                 .chip_offset    = 0,
197                 .nr_partitions  = ARRAY_SIZE(db1300_nand_parts),
198                 .partitions     = db1300_nand_parts,
199                 .chip_delay     = 20,
200         },
201         .ctrl = {
202                 .dev_ready      = au1300_nand_device_ready,
203                 .cmd_ctrl       = au1300_nand_cmd_ctrl,
204         },
205 };
206
207 static struct resource db1300_nand_res[] = {
208         [0] = {
209                 .start  = DB1300_NAND_PHYS_ADDR,
210                 .end    = DB1300_NAND_PHYS_ADDR + 0xff,
211                 .flags  = IORESOURCE_MEM,
212         },
213 };
214
215 static struct platform_device db1300_nand_dev = {
216         .name           = "gen_nand",
217         .num_resources  = ARRAY_SIZE(db1300_nand_res),
218         .resource       = db1300_nand_res,
219         .id             = -1,
220         .dev            = {
221                 .platform_data = &db1300_nand_platdata,
222         }
223 };
224
225 /**********************************************************************/
226
227 static struct resource db1300_eth_res[] = {
228         [0] = {
229                 .start          = DB1300_ETH_PHYS_ADDR,
230                 .end            = DB1300_ETH_PHYS_END,
231                 .flags          = IORESOURCE_MEM,
232         },
233         [1] = {
234                 .start          = DB1300_ETH_INT,
235                 .end            = DB1300_ETH_INT,
236                 .flags          = IORESOURCE_IRQ,
237         },
238 };
239
240 static struct smsc911x_platform_config db1300_eth_config = {
241         .phy_interface          = PHY_INTERFACE_MODE_MII,
242         .irq_polarity           = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
243         .irq_type               = SMSC911X_IRQ_TYPE_PUSH_PULL,
244         .flags                  = SMSC911X_USE_32BIT,
245 };
246
247 static struct platform_device db1300_eth_dev = {
248         .name                   = "smsc911x",
249         .id                     = -1,
250         .num_resources          = ARRAY_SIZE(db1300_eth_res),
251         .resource               = db1300_eth_res,
252         .dev = {
253                 .platform_data  = &db1300_eth_config,
254         },
255 };
256
257 /**********************************************************************/
258
259 static struct resource au1300_psc1_res[] = {
260         [0] = {
261                 .start  = AU1300_PSC1_PHYS_ADDR,
262                 .end    = AU1300_PSC1_PHYS_ADDR + 0x0fff,
263                 .flags  = IORESOURCE_MEM,
264         },
265         [1] = {
266                 .start  = AU1300_PSC1_INT,
267                 .end    = AU1300_PSC1_INT,
268                 .flags  = IORESOURCE_IRQ,
269         },
270         [2] = {
271                 .start  = AU1300_DSCR_CMD0_PSC1_TX,
272                 .end    = AU1300_DSCR_CMD0_PSC1_TX,
273                 .flags  = IORESOURCE_DMA,
274         },
275         [3] = {
276                 .start  = AU1300_DSCR_CMD0_PSC1_RX,
277                 .end    = AU1300_DSCR_CMD0_PSC1_RX,
278                 .flags  = IORESOURCE_DMA,
279         },
280 };
281
282 static struct platform_device db1300_ac97_dev = {
283         .name           = "au1xpsc_ac97",
284         .id             = 1,    /* PSC ID. match with AC97 codec ID! */
285         .num_resources  = ARRAY_SIZE(au1300_psc1_res),
286         .resource       = au1300_psc1_res,
287 };
288
289 /**********************************************************************/
290
291 static struct resource au1300_psc2_res[] = {
292         [0] = {
293                 .start  = AU1300_PSC2_PHYS_ADDR,
294                 .end    = AU1300_PSC2_PHYS_ADDR + 0x0fff,
295                 .flags  = IORESOURCE_MEM,
296         },
297         [1] = {
298                 .start  = AU1300_PSC2_INT,
299                 .end    = AU1300_PSC2_INT,
300                 .flags  = IORESOURCE_IRQ,
301         },
302         [2] = {
303                 .start  = AU1300_DSCR_CMD0_PSC2_TX,
304                 .end    = AU1300_DSCR_CMD0_PSC2_TX,
305                 .flags  = IORESOURCE_DMA,
306         },
307         [3] = {
308                 .start  = AU1300_DSCR_CMD0_PSC2_RX,
309                 .end    = AU1300_DSCR_CMD0_PSC2_RX,
310                 .flags  = IORESOURCE_DMA,
311         },
312 };
313
314 static struct platform_device db1300_i2s_dev = {
315         .name           = "au1xpsc_i2s",
316         .id             = 2,    /* PSC ID */
317         .num_resources  = ARRAY_SIZE(au1300_psc2_res),
318         .resource       = au1300_psc2_res,
319 };
320
321 /**********************************************************************/
322
323 static struct resource au1300_psc3_res[] = {
324         [0] = {
325                 .start  = AU1300_PSC3_PHYS_ADDR,
326                 .end    = AU1300_PSC3_PHYS_ADDR + 0x0fff,
327                 .flags  = IORESOURCE_MEM,
328         },
329         [1] = {
330                 .start  = AU1300_PSC3_INT,
331                 .end    = AU1300_PSC3_INT,
332                 .flags  = IORESOURCE_IRQ,
333         },
334         [2] = {
335                 .start  = AU1300_DSCR_CMD0_PSC3_TX,
336                 .end    = AU1300_DSCR_CMD0_PSC3_TX,
337                 .flags  = IORESOURCE_DMA,
338         },
339         [3] = {
340                 .start  = AU1300_DSCR_CMD0_PSC3_RX,
341                 .end    = AU1300_DSCR_CMD0_PSC3_RX,
342                 .flags  = IORESOURCE_DMA,
343         },
344 };
345
346 static struct platform_device db1300_i2c_dev = {
347         .name           = "au1xpsc_smbus",
348         .id             = 0,    /* bus number */
349         .num_resources  = ARRAY_SIZE(au1300_psc3_res),
350         .resource       = au1300_psc3_res,
351 };
352
353 /**********************************************************************/
354
355 /* proper key assignments when facing the LCD panel.  For key assignments
356  * according to the schematics swap up with down and left with right.
357  * I chose to use it to emulate the arrow keys of a keyboard.
358  */
359 static struct gpio_keys_button db1300_5waysw_arrowkeys[] = {
360         {
361                 .code                   = KEY_DOWN,
362                 .gpio                   = AU1300_PIN_LCDPWM0,
363                 .type                   = EV_KEY,
364                 .debounce_interval      = 1,
365                 .active_low             = 1,
366                 .desc                   = "5waysw-down",
367         },
368         {
369                 .code                   = KEY_UP,
370                 .gpio                   = AU1300_PIN_PSC2SYNC1,
371                 .type                   = EV_KEY,
372                 .debounce_interval      = 1,
373                 .active_low             = 1,
374                 .desc                   = "5waysw-up",
375         },
376         {
377                 .code                   = KEY_RIGHT,
378                 .gpio                   = AU1300_PIN_WAKE3,
379                 .type                   = EV_KEY,
380                 .debounce_interval      = 1,
381                 .active_low             = 1,
382                 .desc                   = "5waysw-right",
383         },
384         {
385                 .code                   = KEY_LEFT,
386                 .gpio                   = AU1300_PIN_WAKE2,
387                 .type                   = EV_KEY,
388                 .debounce_interval      = 1,
389                 .active_low             = 1,
390                 .desc                   = "5waysw-left",
391         },
392         {
393                 .code                   = KEY_ENTER,
394                 .gpio                   = AU1300_PIN_WAKE1,
395                 .type                   = EV_KEY,
396                 .debounce_interval      = 1,
397                 .active_low             = 1,
398                 .desc                   = "5waysw-push",
399         },
400 };
401
402 static struct gpio_keys_platform_data db1300_5waysw_data = {
403         .buttons        = db1300_5waysw_arrowkeys,
404         .nbuttons       = ARRAY_SIZE(db1300_5waysw_arrowkeys),
405         .rep            = 1,
406         .name           = "db1300-5wayswitch",
407 };
408
409 static struct platform_device db1300_5waysw_dev = {
410         .name           = "gpio-keys",
411         .dev    = {
412                 .platform_data  = &db1300_5waysw_data,
413         },
414 };
415
416 /**********************************************************************/
417
418 static struct pata_platform_info db1300_ide_info = {
419         .ioport_shift   = DB1300_IDE_REG_SHIFT,
420 };
421
422 #define IDE_ALT_START   (14 << DB1300_IDE_REG_SHIFT)
423 static struct resource db1300_ide_res[] = {
424         [0] = {
425                 .start  = DB1300_IDE_PHYS_ADDR,
426                 .end    = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1,
427                 .flags  = IORESOURCE_MEM,
428         },
429         [1] = {
430                 .start  = DB1300_IDE_PHYS_ADDR + IDE_ALT_START,
431                 .end    = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1,
432                 .flags  = IORESOURCE_MEM,
433         },
434         [2] = {
435                 .start  = DB1300_IDE_INT,
436                 .end    = DB1300_IDE_INT,
437                 .flags  = IORESOURCE_IRQ,
438         },
439 };
440
441 static struct platform_device db1300_ide_dev = {
442         .dev    = {
443                 .dma_mask               = &au1300_all_dmamask,
444                 .coherent_dma_mask      = DMA_BIT_MASK(32),
445                 .platform_data  = &db1300_ide_info,
446         },
447         .name           = "pata_platform",
448         .resource       = db1300_ide_res,
449         .num_resources  = ARRAY_SIZE(db1300_ide_res),
450 };
451
452 /**********************************************************************/
453
454 static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
455 {
456         disable_irq_nosync(irq);
457         return IRQ_WAKE_THREAD;
458 }
459
460 static irqreturn_t db1300_mmc_cdfn(int irq, void *ptr)
461 {
462         void (*mmc_cd)(struct mmc_host *, unsigned long);
463
464         /* link against CONFIG_MMC=m.  We can only be called once MMC core has
465          * initialized the controller, so symbol_get() should always succeed.
466          */
467         mmc_cd = symbol_get(mmc_detect_change);
468         mmc_cd(ptr, msecs_to_jiffies(200));
469         symbol_put(mmc_detect_change);
470
471         msleep(100);    /* debounce */
472         if (irq == DB1300_SD1_INSERT_INT)
473                 enable_irq(DB1300_SD1_EJECT_INT);
474         else
475                 enable_irq(DB1300_SD1_INSERT_INT);
476
477         return IRQ_HANDLED;
478 }
479
480 static int db1300_mmc_card_readonly(void *mmc_host)
481 {
482         /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
483         return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP;
484 }
485
486 static int db1300_mmc_card_inserted(void *mmc_host)
487 {
488         return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */
489 }
490
491 static int db1300_mmc_cd_setup(void *mmc_host, int en)
492 {
493         int ret;
494
495         if (en) {
496                 ret = request_threaded_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd,
497                                 db1300_mmc_cdfn, 0, "sd_insert", mmc_host);
498                 if (ret)
499                         goto out;
500
501                 ret = request_threaded_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd,
502                                 db1300_mmc_cdfn, 0, "sd_eject", mmc_host);
503                 if (ret) {
504                         free_irq(DB1300_SD1_INSERT_INT, mmc_host);
505                         goto out;
506                 }
507
508                 if (db1300_mmc_card_inserted(mmc_host))
509                         enable_irq(DB1300_SD1_EJECT_INT);
510                 else
511                         enable_irq(DB1300_SD1_INSERT_INT);
512
513         } else {
514                 free_irq(DB1300_SD1_INSERT_INT, mmc_host);
515                 free_irq(DB1300_SD1_EJECT_INT, mmc_host);
516         }
517         ret = 0;
518 out:
519         return ret;
520 }
521
522 static void db1300_mmcled_set(struct led_classdev *led,
523                               enum led_brightness brightness)
524 {
525         if (brightness != LED_OFF)
526                 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
527         else
528                 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
529 }
530
531 static struct led_classdev db1300_mmc_led = {
532         .brightness_set = db1300_mmcled_set,
533 };
534
535 struct au1xmmc_platform_data db1300_sd1_platdata = {
536         .cd_setup       = db1300_mmc_cd_setup,
537         .card_inserted  = db1300_mmc_card_inserted,
538         .card_readonly  = db1300_mmc_card_readonly,
539         .led            = &db1300_mmc_led,
540 };
541
542 static struct resource au1300_sd1_res[] = {
543         [0] = {
544                 .start  = AU1300_SD1_PHYS_ADDR,
545                 .end    = AU1300_SD1_PHYS_ADDR,
546                 .flags  = IORESOURCE_MEM,
547         },
548         [1] = {
549                 .start  = AU1300_SD1_INT,
550                 .end    = AU1300_SD1_INT,
551                 .flags  = IORESOURCE_IRQ,
552         },
553         [2] = {
554                 .start  = AU1300_DSCR_CMD0_SDMS_TX1,
555                 .end    = AU1300_DSCR_CMD0_SDMS_TX1,
556                 .flags  = IORESOURCE_DMA,
557         },
558         [3] = {
559                 .start  = AU1300_DSCR_CMD0_SDMS_RX1,
560                 .end    = AU1300_DSCR_CMD0_SDMS_RX1,
561                 .flags  = IORESOURCE_DMA,
562         },
563 };
564
565 static struct platform_device db1300_sd1_dev = {
566         .dev = {
567                 .dma_mask               = &au1300_all_dmamask,
568                 .coherent_dma_mask      = DMA_BIT_MASK(32),
569                 .platform_data          = &db1300_sd1_platdata,
570         },
571         .name           = "au1xxx-mmc",
572         .id             = 1,
573         .resource       = au1300_sd1_res,
574         .num_resources  = ARRAY_SIZE(au1300_sd1_res),
575 };
576
577 /**********************************************************************/
578
579 static int db1300_movinand_inserted(void *mmc_host)
580 {
581         return 0; /* disable for now, it doesn't work yet */
582 }
583
584 static int db1300_movinand_readonly(void *mmc_host)
585 {
586         return 0;
587 }
588
589 static void db1300_movinand_led_set(struct led_classdev *led,
590                                     enum led_brightness brightness)
591 {
592         if (brightness != LED_OFF)
593                 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
594         else
595                 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
596 }
597
598 static struct led_classdev db1300_movinand_led = {
599         .brightness_set         = db1300_movinand_led_set,
600 };
601
602 struct au1xmmc_platform_data db1300_sd0_platdata = {
603         .card_inserted          = db1300_movinand_inserted,
604         .card_readonly          = db1300_movinand_readonly,
605         .led                    = &db1300_movinand_led,
606         .mask_host_caps         = MMC_CAP_NEEDS_POLL,
607 };
608
609 static struct resource au1300_sd0_res[] = {
610         [0] = {
611                 .start  = AU1100_SD0_PHYS_ADDR,
612                 .end    = AU1100_SD0_PHYS_ADDR,
613                 .flags  = IORESOURCE_MEM,
614         },
615         [1] = {
616                 .start  = AU1300_SD0_INT,
617                 .end    = AU1300_SD0_INT,
618                 .flags  = IORESOURCE_IRQ,
619         },
620         [2] = {
621                 .start  = AU1300_DSCR_CMD0_SDMS_TX0,
622                 .end    = AU1300_DSCR_CMD0_SDMS_TX0,
623                 .flags  = IORESOURCE_DMA,
624         },
625         [3] = {
626                 .start  = AU1300_DSCR_CMD0_SDMS_RX0,
627                 .end    = AU1300_DSCR_CMD0_SDMS_RX0,
628                 .flags  = IORESOURCE_DMA,
629         },
630 };
631
632 static struct platform_device db1300_sd0_dev = {
633         .dev = {
634                 .dma_mask               = &au1300_all_dmamask,
635                 .coherent_dma_mask      = DMA_BIT_MASK(32),
636                 .platform_data          = &db1300_sd0_platdata,
637         },
638         .name           = "au1xxx-mmc",
639         .id             = 0,
640         .resource       = au1300_sd0_res,
641         .num_resources  = ARRAY_SIZE(au1300_sd0_res),
642 };
643
644 /**********************************************************************/
645
646 static struct platform_device db1300_wm9715_dev = {
647         .name           = "wm9712-codec",
648         .id             = 1,    /* ID of PSC for AC97 audio, see asoc glue! */
649 };
650
651 static struct platform_device db1300_ac97dma_dev = {
652         .name           = "au1xpsc-pcm",
653         .id             = 1,    /* PSC ID */
654 };
655
656 static struct platform_device db1300_i2sdma_dev = {
657         .name           = "au1xpsc-pcm",
658         .id             = 2,    /* PSC ID */
659 };
660
661 static struct platform_device db1300_sndac97_dev = {
662         .name           = "db1300-ac97",
663         .dev = {
664                 .dma_mask               = &au1300_all_dmamask,
665                 .coherent_dma_mask      = DMA_BIT_MASK(32),
666         },
667 };
668
669 static struct platform_device db1300_sndi2s_dev = {
670         .name           = "db1300-i2s",
671         .dev = {
672                 .dma_mask               = &au1300_all_dmamask,
673                 .coherent_dma_mask      = DMA_BIT_MASK(32),
674         },
675 };
676
677 /**********************************************************************/
678
679 static int db1300fb_panel_index(void)
680 {
681         return 9;       /* DB1300_800x480 */
682 }
683
684 static int db1300fb_panel_init(void)
685 {
686         /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
687         bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD,
688                              BCSR_BOARD_LCDBL);
689         return 0;
690 }
691
692 static int db1300fb_panel_shutdown(void)
693 {
694         /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
695         bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL,
696                              BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD);
697         return 0;
698 }
699
700 static struct au1200fb_platdata db1300fb_pd = {
701         .panel_index    = db1300fb_panel_index,
702         .panel_init     = db1300fb_panel_init,
703         .panel_shutdown = db1300fb_panel_shutdown,
704 };
705
706 static struct resource au1300_lcd_res[] = {
707         [0] = {
708                 .start  = AU1200_LCD_PHYS_ADDR,
709                 .end    = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
710                 .flags  = IORESOURCE_MEM,
711         },
712         [1] = {
713                 .start  = AU1300_LCD_INT,
714                 .end    = AU1300_LCD_INT,
715                 .flags  = IORESOURCE_IRQ,
716         }
717 };
718
719
720 static struct platform_device db1300_lcd_dev = {
721         .name           = "au1200-lcd",
722         .id             = 0,
723         .dev = {
724                 .dma_mask               = &au1300_all_dmamask,
725                 .coherent_dma_mask      = DMA_BIT_MASK(32),
726                 .platform_data          = &db1300fb_pd,
727         },
728         .num_resources  = ARRAY_SIZE(au1300_lcd_res),
729         .resource       = au1300_lcd_res,
730 };
731
732 /**********************************************************************/
733
734 static void db1300_wm97xx_irqen(struct wm97xx *wm, int enable)
735 {
736         if (enable)
737                 enable_irq(DB1300_AC97_PEN_INT);
738         else
739                 disable_irq_nosync(DB1300_AC97_PEN_INT);
740 }
741
742 static struct wm97xx_mach_ops db1300_wm97xx_ops = {
743         .irq_enable     = db1300_wm97xx_irqen,
744         .irq_gpio       = WM97XX_GPIO_3,
745 };
746
747 static int db1300_wm97xx_probe(struct platform_device *pdev)
748 {
749         struct wm97xx *wm = platform_get_drvdata(pdev);
750
751         /* external pendown indicator */
752         wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN,
753                            WM97XX_GPIO_POL_LOW, WM97XX_GPIO_STICKY,
754                            WM97XX_GPIO_WAKE);
755
756         /* internal "virtual" pendown gpio */
757         wm97xx_config_gpio(wm, WM97XX_GPIO_3, WM97XX_GPIO_OUT,
758                            WM97XX_GPIO_POL_LOW, WM97XX_GPIO_NOTSTICKY,
759                            WM97XX_GPIO_NOWAKE);
760
761         wm->pen_irq = DB1300_AC97_PEN_INT;
762
763         return wm97xx_register_mach_ops(wm, &db1300_wm97xx_ops);
764 }
765
766 static struct platform_driver db1300_wm97xx_driver = {
767         .driver.name    = "wm97xx-touch",
768         .driver.owner   = THIS_MODULE,
769         .probe          = db1300_wm97xx_probe,
770 };
771
772 /**********************************************************************/
773
774 static struct platform_device *db1300_dev[] __initdata = {
775         &db1300_eth_dev,
776         &db1300_i2c_dev,
777         &db1300_5waysw_dev,
778         &db1300_nand_dev,
779         &db1300_ide_dev,
780         &db1300_sd0_dev,
781         &db1300_sd1_dev,
782         &db1300_lcd_dev,
783         &db1300_ac97_dev,
784         &db1300_i2s_dev,
785         &db1300_wm9715_dev,
786         &db1300_ac97dma_dev,
787         &db1300_i2sdma_dev,
788         &db1300_sndac97_dev,
789         &db1300_sndi2s_dev,
790 };
791
792 int __init db1300_dev_setup(void)
793 {
794         int swapped, cpldirq;
795         struct clk *c;
796
797         /* setup CPLD IRQ muxer */
798         cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1);
799         irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH);
800         bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq);
801
802         /* insert/eject IRQs: one always triggers so don't enable them
803          * when doing request_irq() on them.  DB1200 has this bug too.
804          */
805         irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN);
806         irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN);
807         irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN);
808         irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN);
809
810         /*
811          * setup board
812          */
813         prom_get_ethernet_addr(&db1300_eth_config.mac[0]);
814
815         i2c_register_board_info(0, db1300_i2c_devs,
816                                 ARRAY_SIZE(db1300_i2c_devs));
817
818         if (platform_driver_register(&db1300_wm97xx_driver))
819                 pr_warn("DB1300: failed to init touch pen irq support!\n");
820
821         /* Audio PSC clock is supplied by codecs (PSC1, 2) */
822         __raw_writel(PSC_SEL_CLK_SERCLK,
823             (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
824         wmb();
825         __raw_writel(PSC_SEL_CLK_SERCLK,
826             (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
827         wmb();
828         /* I2C driver wants 50MHz, get as close as possible */
829         c = clk_get(NULL, "psc3_intclk");
830         if (!IS_ERR(c)) {
831                 clk_set_rate(c, 50000000);
832                 clk_prepare_enable(c);
833                 clk_put(c);
834         }
835         __raw_writel(PSC_SEL_CLK_INTCLK,
836             (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
837         wmb();
838
839         /* enable power to USB ports */
840         bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR);
841
842         /* although it is socket #0, it uses the CPLD bits which previous boards
843          * have used for socket #1.
844          */
845         db1x_register_pcmcia_socket(
846                 AU1000_PCMCIA_ATTR_PHYS_ADDR,
847                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1,
848                 AU1000_PCMCIA_MEM_PHYS_ADDR,
849                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x00400000 - 1,
850                 AU1000_PCMCIA_IO_PHYS_ADDR,
851                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x00010000 - 1,
852                 DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1);
853
854         swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
855         db1x_register_norflash(64 << 20, 2, swapped);
856
857         return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
858 }
859
860
861 int __init db1300_board_setup(void)
862 {
863         unsigned short whoami;
864
865         bcsr_init(DB1300_BCSR_PHYS_ADDR,
866                   DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS);
867
868         whoami = bcsr_read(BCSR_WHOAMI);
869         if (BCSR_WHOAMI_BOARD(whoami) != BCSR_WHOAMI_DB1300)
870                 return -ENODEV;
871
872         db1300_gpio_config();
873
874         printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t"
875                 "BoardID %d   CPLD Rev %d   DaughtercardID %d\n",
876                 BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami),
877                 BCSR_WHOAMI_DCID(whoami));
878
879         /* enable UARTs, YAMON only enables #2 */
880         alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
881         alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
882         alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);
883
884         return 0;
885 }