arch/mips/jz4740/time.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
   4  *  JZ4740 platform time support
   5  */
   6
   7 #include <linux/clk.h>
   8 #include <linux/clk-provider.h>
   9 #include <linux/interrupt.h>
  10 #include <linux/kernel.h>
  11 #include <linux/time.h>
  12
  13 #include <linux/clockchips.h>
  14 #include <linux/sched_clock.h>
  15
  16 #include <asm/mach-jz4740/irq.h>
  17 #include <asm/mach-jz4740/timer.h>
  18 #include <asm/time.h>
  19
  20 #define TIMER_CLOCKEVENT 0
  21 #define TIMER_CLOCKSOURCE 1
  22
  23 static uint16_t jz4740_jiffies_per_tick;
  24
  25 static u64 jz4740_clocksource_read(struct clocksource *cs)
  26 {
  27         return jz4740_timer_get_count(TIMER_CLOCKSOURCE);
  28 }
  29
  30 static struct clocksource jz4740_clocksource = {
  31         .name = "jz4740-timer",
  32         .rating = 200,
  33         .read = jz4740_clocksource_read,
  34         .mask = CLOCKSOURCE_MASK(16),
  35         .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  36 };
  37
  38 static u64 notrace jz4740_read_sched_clock(void)
  39 {
  40         return jz4740_timer_get_count(TIMER_CLOCKSOURCE);
  41 }
  42
  43 static irqreturn_t jz4740_clockevent_irq(int irq, void *devid)
  44 {
  45         struct clock_event_device *cd = devid;
  46
  47         jz4740_timer_ack_full(TIMER_CLOCKEVENT);
  48
  49         if (!clockevent_state_periodic(cd))
  50                 jz4740_timer_disable(TIMER_CLOCKEVENT);
  51
  52         cd->event_handler(cd);
  53
  54         return IRQ_HANDLED;
  55 }
  56
  57 static int jz4740_clockevent_set_periodic(struct clock_event_device *evt)
  58 {
  59         jz4740_timer_set_count(TIMER_CLOCKEVENT, 0);
  60         jz4740_timer_set_period(TIMER_CLOCKEVENT, jz4740_jiffies_per_tick);
  61         jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
  62         jz4740_timer_enable(TIMER_CLOCKEVENT);
  63
  64         return 0;
  65 }
  66
  67 static int jz4740_clockevent_resume(struct clock_event_device *evt)
  68 {
  69         jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
  70         jz4740_timer_enable(TIMER_CLOCKEVENT);
  71
  72         return 0;
  73 }
  74
  75 static int jz4740_clockevent_shutdown(struct clock_event_device *evt)
  76 {
  77         jz4740_timer_disable(TIMER_CLOCKEVENT);
  78
  79         return 0;
  80 }
  81
  82 static int jz4740_clockevent_set_next(unsigned long evt,
  83         struct clock_event_device *cd)
  84 {
  85         jz4740_timer_set_count(TIMER_CLOCKEVENT, 0);
  86         jz4740_timer_set_period(TIMER_CLOCKEVENT, evt);
  87         jz4740_timer_enable(TIMER_CLOCKEVENT);
  88
  89         return 0;
  90 }
  91
  92 static struct clock_event_device jz4740_clockevent = {
  93         .name = "jz4740-timer",
  94         .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
  95         .set_next_event = jz4740_clockevent_set_next,
  96         .set_state_shutdown = jz4740_clockevent_shutdown,
  97         .set_state_periodic = jz4740_clockevent_set_periodic,
  98         .set_state_oneshot = jz4740_clockevent_shutdown,
  99         .tick_resume = jz4740_clockevent_resume,
 100         .rating = 200,
 101 #ifdef CONFIG_MACH_JZ4740
 102         .irq = JZ4740_IRQ_TCU0,
 103 #endif
 104 #if defined(CONFIG_MACH_JZ4770) || defined(CONFIG_MACH_JZ4780)
 105         .irq = JZ4780_IRQ_TCU2,
 106 #endif
 107 };
 108
 109 static struct irqaction timer_irqaction = {
 110         .handler        = jz4740_clockevent_irq,
 111         .flags          = IRQF_PERCPU | IRQF_TIMER,
 112         .name           = "jz4740-timerirq",
 113         .dev_id         = &jz4740_clockevent,
 114 };
 115
 116 void __init plat_time_init(void)
 117 {
 118         int ret;
 119         uint32_t clk_rate;
 120         uint16_t ctrl;
 121         struct clk *ext_clk;
 122
 123         of_clk_init(NULL);
 124         jz4740_timer_init();
 125
 126         ext_clk = clk_get(NULL, "ext");
 127         if (IS_ERR(ext_clk))
 128                 panic("unable to get ext clock");
 129         clk_rate = clk_get_rate(ext_clk) >> 4;
 130         clk_put(ext_clk);
 131
 132         jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);
 133
 134         clockevent_set_clock(&jz4740_clockevent, clk_rate);
 135         jz4740_clockevent.min_delta_ns = clockevent_delta2ns(100, &jz4740_clockevent);
 136         jz4740_clockevent.min_delta_ticks = 100;
 137         jz4740_clockevent.max_delta_ns = clockevent_delta2ns(0xffff, &jz4740_clockevent);
 138         jz4740_clockevent.max_delta_ticks = 0xffff;
 139         jz4740_clockevent.cpumask = cpumask_of(0);
 140
 141         clockevents_register_device(&jz4740_clockevent);
 142
 143         ret = clocksource_register_hz(&jz4740_clocksource, clk_rate);
 144
 145         if (ret)
 146                 printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
 147
 148         sched_clock_register(jz4740_read_sched_clock, 16, clk_rate);
 149
 150         setup_irq(jz4740_clockevent.irq, &timer_irqaction);
 151
 152         ctrl = JZ_TIMER_CTRL_PRESCALE_16 | JZ_TIMER_CTRL_SRC_EXT;
 153
 154         jz4740_timer_set_ctrl(TIMER_CLOCKEVENT, ctrl);
 155         jz4740_timer_set_ctrl(TIMER_CLOCKSOURCE, ctrl);
 156
 157         jz4740_timer_set_period(TIMER_CLOCKEVENT, jz4740_jiffies_per_tick);
 158         jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
 159
 160         jz4740_timer_set_period(TIMER_CLOCKSOURCE, 0xffff);
 161
 162         jz4740_timer_enable(TIMER_CLOCKEVENT);
 163         jz4740_timer_enable(TIMER_CLOCKSOURCE);
 164 }