1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2015 Imagination Technologies
4 * Author: Alex Smith <alex.smith@imgtec.com>
7 #include <asm/sgidefs.h>
9 #if _MIPS_SIM != _MIPS_SIM_ABI64 && defined(CONFIG_64BIT)
11 /* Building 32-bit VDSO for the 64-bit kernel. Fake a 32-bit Kconfig. */
13 #define CONFIG_32BIT 1
15 #include <asm-generic/atomic64.h>
25 static inline unsigned long get_vdso_base(void)
30 * We can't use cpu_has_mips_r6 since it needs the cpu_data[]
33 #ifdef CONFIG_CPU_MIPSR6
35 * lapc <symbol> is an alias to addiupc reg, <symbol> - .
37 * We can't use addiupc because there is no label-label
38 * support for the addiupc reloc
40 __asm__("lapc %0, _start \n"
44 * Get the base load address of the VDSO. We have to avoid generating
45 * relocations and references to the GOT because ld.so does not peform
46 * relocations on the VDSO. We use the current offset from the VDSO base
47 * and perform a PC-relative branch which gives the absolute address in
48 * ra, and take the difference. The assembler chokes on
49 * "li %0, _start - .", so embed the offset as a word and branch over
59 " .word _start - . \n"
61 " " STR(PTR_ADDU) " %0, $31, %0 \n"
66 #endif /* CONFIG_CPU_MIPSR6 */
71 static inline const union mips_vdso_data *get_vdso_data(void)
73 return (const union mips_vdso_data *)(get_vdso_base() - PAGE_SIZE);
76 #ifdef CONFIG_CLKSRC_MIPS_GIC
78 static inline void __iomem *get_gic(const union mips_vdso_data *data)
80 return (void __iomem *)data - PAGE_SIZE;
83 #endif /* CONFIG_CLKSRC_MIPS_GIC */
85 #endif /* __ASSEMBLY__ */