2 * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation
4 * Provide default implementations of the DMA mapping callbacks for
5 * directly mapped busses.
8 #include <linux/device.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/dma-debug.h>
11 #include <linux/gfp.h>
12 #include <linux/memblock.h>
13 #include <linux/export.h>
14 #include <linux/pci.h>
17 #include <asm/machdep.h>
18 #include <asm/swiotlb.h>
19 #include <asm/iommu.h>
22 * Generic direct DMA implementation
24 * This implementation supports a per-device offset that can be applied if
25 * the address at which memory is visible to devices is not 0. Platform code
26 * can set archdata.dma_data to an unsigned long holding the offset. By
27 * default the offset is PCI_DRAM_OFFSET.
30 static u64 __maybe_unused get_pfn_limit(struct device *dev)
32 u64 pfn = (dev->coherent_dma_mask >> PAGE_SHIFT) + 1;
33 struct dev_archdata __maybe_unused *sd = &dev->archdata;
36 if (sd->max_direct_dma_addr && dev->dma_ops == &powerpc_swiotlb_dma_ops)
37 pfn = min_t(u64, pfn, sd->max_direct_dma_addr >> PAGE_SHIFT);
43 int dma_nommu_dma_supported(struct device *dev, u64 mask)
46 u64 limit = get_dma_offset(dev) + (memblock_end_of_DRAM() - 1);
48 /* Limit fits in the mask, we are good */
54 * Freescale gets another chance via ZONE_DMA, however
55 * that will have to be refined if/when they support iommus
66 #ifndef CONFIG_NOT_COHERENT_CACHE
67 void *__dma_nommu_alloc_coherent(struct device *dev, size_t size,
68 dma_addr_t *dma_handle, gfp_t flag,
73 int node = dev_to_node(dev);
75 u64 pfn = get_pfn_limit(dev);
79 * This code should be OK on other platforms, but we have drivers that
80 * don't set coherent_dma_mask. As a workaround we just ifdef it. This
81 * whole routine needs some serious cleanup.
84 zone = dma_pfn_limit_to_zone(pfn);
86 dev_err(dev, "%s: No suitable zone for pfn %#llx\n",
92 #ifdef CONFIG_ZONE_DMA
98 #endif /* CONFIG_FSL_SOC */
100 page = alloc_pages_node(node, flag, get_order(size));
103 ret = page_address(page);
104 memset(ret, 0, size);
105 *dma_handle = __pa(ret) + get_dma_offset(dev);
110 void __dma_nommu_free_coherent(struct device *dev, size_t size,
111 void *vaddr, dma_addr_t dma_handle,
114 free_pages((unsigned long)vaddr, get_order(size));
116 #endif /* !CONFIG_NOT_COHERENT_CACHE */
118 int dma_nommu_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
119 void *cpu_addr, dma_addr_t handle, size_t size,
124 #ifdef CONFIG_NOT_COHERENT_CACHE
125 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
126 pfn = __dma_get_coherent_pfn((unsigned long)cpu_addr);
128 pfn = page_to_pfn(virt_to_page(cpu_addr));
130 return remap_pfn_range(vma, vma->vm_start,
132 vma->vm_end - vma->vm_start,
136 int dma_nommu_map_sg(struct device *dev, struct scatterlist *sgl,
137 int nents, enum dma_data_direction direction,
140 struct scatterlist *sg;
143 for_each_sg(sgl, sg, nents, i) {
144 sg->dma_address = sg_phys(sg) + get_dma_offset(dev);
145 sg->dma_length = sg->length;
147 if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
150 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
156 static void dma_nommu_unmap_sg(struct device *dev, struct scatterlist *sgl,
157 int nents, enum dma_data_direction direction,
160 struct scatterlist *sg;
163 for_each_sg(sgl, sg, nents, i)
164 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
167 u64 dma_nommu_get_required_mask(struct device *dev)
171 end = memblock_end_of_DRAM() + get_dma_offset(dev);
173 mask = 1ULL << (fls64(end) - 1);
179 dma_addr_t dma_nommu_map_page(struct device *dev, struct page *page,
180 unsigned long offset, size_t size,
181 enum dma_data_direction dir, unsigned long attrs)
183 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
184 __dma_sync_page(page, offset, size, dir);
186 return page_to_phys(page) + offset + get_dma_offset(dev);
189 static inline void dma_nommu_unmap_page(struct device *dev,
190 dma_addr_t dma_address,
192 enum dma_data_direction direction,
195 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
196 __dma_sync(bus_to_virt(dma_address), size, direction);
199 #ifdef CONFIG_NOT_COHERENT_CACHE
200 static inline void dma_nommu_sync_sg(struct device *dev,
201 struct scatterlist *sgl, int nents,
202 enum dma_data_direction direction)
204 struct scatterlist *sg;
207 for_each_sg(sgl, sg, nents, i)
208 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
211 static inline void dma_nommu_sync_single(struct device *dev,
212 dma_addr_t dma_handle, size_t size,
213 enum dma_data_direction direction)
215 __dma_sync(bus_to_virt(dma_handle), size, direction);
219 const struct dma_map_ops dma_nommu_ops = {
220 .alloc = __dma_nommu_alloc_coherent,
221 .free = __dma_nommu_free_coherent,
222 .mmap = dma_nommu_mmap_coherent,
223 .map_sg = dma_nommu_map_sg,
224 .unmap_sg = dma_nommu_unmap_sg,
225 .dma_supported = dma_nommu_dma_supported,
226 .map_page = dma_nommu_map_page,
227 .unmap_page = dma_nommu_unmap_page,
228 .get_required_mask = dma_nommu_get_required_mask,
229 #ifdef CONFIG_NOT_COHERENT_CACHE
230 .sync_single_for_cpu = dma_nommu_sync_single,
231 .sync_single_for_device = dma_nommu_sync_single,
232 .sync_sg_for_cpu = dma_nommu_sync_sg,
233 .sync_sg_for_device = dma_nommu_sync_sg,
236 EXPORT_SYMBOL(dma_nommu_ops);
238 int dma_set_mask(struct device *dev, u64 dma_mask)
240 if (ppc_md.dma_set_mask)
241 return ppc_md.dma_set_mask(dev, dma_mask);
243 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
245 *dev->dma_mask = dma_mask;
248 EXPORT_SYMBOL(dma_set_mask);
250 static int __init dma_init(void)
253 dma_debug_add_bus(&vio_bus_type);
258 fs_initcall(dma_init);