arch/powerpc/kernel/setup-common.c

   1 /*
   2  * Common boot and setup code for both 32-bit and 64-bit.
   3  * Extracted from arch/powerpc/kernel/setup_64.c.
   4  *
   5  * Copyright (C) 2001 PPC64 Team, IBM Corp
   6  *
   7  *      This program is free software; you can redistribute it and/or
   8  *      modify it under the terms of the GNU General Public License
   9  *      as published by the Free Software Foundation; either version
  10  *      2 of the License, or (at your option) any later version.
  11  */
  12
  13 #undef DEBUG
  14
  15 #include <linux/export.h>
  16 #include <linux/string.h>
  17 #include <linux/sched.h>
  18 #include <linux/init.h>
  19 #include <linux/kernel.h>
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/initrd.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/ioport.h>
  26 #include <linux/console.h>
  27 #include <linux/screen_info.h>
  28 #include <linux/root_dev.h>
  29 #include <linux/notifier.h>
  30 #include <linux/cpu.h>
  31 #include <linux/unistd.h>
  32 #include <linux/serial.h>
  33 #include <linux/serial_8250.h>
  34 #include <linux/percpu.h>
  35 #include <linux/memblock.h>
  36 #include <linux/of_platform.h>
  37 #include <linux/hugetlb.h>
  38 #include <asm/debugfs.h>
  39 #include <asm/io.h>
  40 #include <asm/paca.h>
  41 #include <asm/prom.h>
  42 #include <asm/processor.h>
  43 #include <asm/vdso_datapage.h>
  44 #include <asm/pgtable.h>
  45 #include <asm/smp.h>
  46 #include <asm/elf.h>
  47 #include <asm/machdep.h>
  48 #include <asm/time.h>
  49 #include <asm/cputable.h>
  50 #include <asm/sections.h>
  51 #include <asm/firmware.h>
  52 #include <asm/btext.h>
  53 #include <asm/nvram.h>
  54 #include <asm/setup.h>
  55 #include <asm/rtas.h>
  56 #include <asm/iommu.h>
  57 #include <asm/serial.h>
  58 #include <asm/cache.h>
  59 #include <asm/page.h>
  60 #include <asm/mmu.h>
  61 #include <asm/xmon.h>
  62 #include <asm/cputhreads.h>
  63 #include <mm/mmu_decl.h>
  64 #include <asm/fadump.h>
  65 #include <asm/udbg.h>
  66 #include <asm/hugetlb.h>
  67 #include <asm/livepatch.h>
  68 #include <asm/mmu_context.h>
  69 #include <asm/cpu_has_feature.h>
  70
  71 #include "setup.h"
  72
  73 #ifdef DEBUG
  74 #include <asm/udbg.h>
  75 #define DBG(fmt...) udbg_printf(fmt)
  76 #else
  77 #define DBG(fmt...)
  78 #endif
  79
  80 /* The main machine-dep calls structure
  81  */
  82 struct machdep_calls ppc_md;
  83 EXPORT_SYMBOL(ppc_md);
  84 struct machdep_calls *machine_id;
  85 EXPORT_SYMBOL(machine_id);
  86
  87 int boot_cpuid = -1;
  88 EXPORT_SYMBOL_GPL(boot_cpuid);
  89
  90 /*
  91  * These are used in binfmt_elf.c to put aux entries on the stack
  92  * for each elf executable being started.
  93  */
  94 int dcache_bsize;
  95 int icache_bsize;
  96 int ucache_bsize;
  97
  98
  99 unsigned long klimit = (unsigned long) _end;
 100
 101 /*
 102  * This still seems to be needed... -- paulus
 103  */
 104 struct screen_info screen_info = {
 105         .orig_x = 0,
 106         .orig_y = 25,
 107         .orig_video_cols = 80,
 108         .orig_video_lines = 25,
 109         .orig_video_isVGA = 1,
 110         .orig_video_points = 16
 111 };
 112 #if defined(CONFIG_FB_VGA16_MODULE)
 113 EXPORT_SYMBOL(screen_info);
 114 #endif
 115
 116 /* Variables required to store legacy IO irq routing */
 117 int of_i8042_kbd_irq;
 118 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
 119 int of_i8042_aux_irq;
 120 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
 121
 122 #ifdef __DO_IRQ_CANON
 123 /* XXX should go elsewhere eventually */
 124 int ppc_do_canonicalize_irqs;
 125 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
 126 #endif
 127
 128 #ifdef CONFIG_CRASH_CORE
 129 /* This keeps a track of which one is the crashing cpu. */
 130 int crashing_cpu = -1;
 131 #endif
 132
 133 /* also used by kexec */
 134 void machine_shutdown(void)
 135 {
 136 #ifdef CONFIG_FA_DUMP
 137         /*
 138          * if fadump is active, cleanup the fadump registration before we
 139          * shutdown.
 140          */
 141         fadump_cleanup();
 142 #endif
 143
 144         if (ppc_md.machine_shutdown)
 145                 ppc_md.machine_shutdown();
 146 }
 147
 148 static void machine_hang(void)
 149 {
 150         pr_emerg("System Halted, OK to turn off power\n");
 151         local_irq_disable();
 152         while (1)
 153                 ;
 154 }
 155
 156 void machine_restart(char *cmd)
 157 {
 158         machine_shutdown();
 159         if (ppc_md.restart)
 160                 ppc_md.restart(cmd);
 161
 162         smp_send_stop();
 163
 164         do_kernel_restart(cmd);
 165         mdelay(1000);
 166
 167         machine_hang();
 168 }
 169
 170 void machine_power_off(void)
 171 {
 172         machine_shutdown();
 173         if (pm_power_off)
 174                 pm_power_off();
 175
 176         smp_send_stop();
 177         machine_hang();
 178 }
 179 /* Used by the G5 thermal driver */
 180 EXPORT_SYMBOL_GPL(machine_power_off);
 181
 182 void (*pm_power_off)(void);
 183 EXPORT_SYMBOL_GPL(pm_power_off);
 184
 185 void machine_halt(void)
 186 {
 187         machine_shutdown();
 188         if (ppc_md.halt)
 189                 ppc_md.halt();
 190
 191         smp_send_stop();
 192         machine_hang();
 193 }
 194
 195
 196 #ifdef CONFIG_TAU
 197 extern u32 cpu_temp(unsigned long cpu);
 198 extern u32 cpu_temp_both(unsigned long cpu);
 199 #endif /* CONFIG_TAU */
 200
 201 #ifdef CONFIG_SMP
 202 DEFINE_PER_CPU(unsigned int, cpu_pvr);
 203 #endif
 204
 205 static void show_cpuinfo_summary(struct seq_file *m)
 206 {
 207         struct device_node *root;
 208         const char *model = NULL;
 209 #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
 210         unsigned long bogosum = 0;
 211         int i;
 212         for_each_online_cpu(i)
 213                 bogosum += loops_per_jiffy;
 214         seq_printf(m, "total bogomips\t: %lu.%02lu\n",
 215                    bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
 216 #endif /* CONFIG_SMP && CONFIG_PPC32 */
 217         seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
 218         if (ppc_md.name)
 219                 seq_printf(m, "platform\t: %s\n", ppc_md.name);
 220         root = of_find_node_by_path("/");
 221         if (root)
 222                 model = of_get_property(root, "model", NULL);
 223         if (model)
 224                 seq_printf(m, "model\t\t: %s\n", model);
 225         of_node_put(root);
 226
 227         if (ppc_md.show_cpuinfo != NULL)
 228                 ppc_md.show_cpuinfo(m);
 229
 230 #ifdef CONFIG_PPC32
 231         /* Display the amount of memory */
 232         seq_printf(m, "Memory\t\t: %d MB\n",
 233                    (unsigned int)(total_memory / (1024 * 1024)));
 234 #endif
 235 }
 236
 237 static int show_cpuinfo(struct seq_file *m, void *v)
 238 {
 239         unsigned long cpu_id = (unsigned long)v - 1;
 240         unsigned int pvr;
 241         unsigned long proc_freq;
 242         unsigned short maj;
 243         unsigned short min;
 244
 245 #ifdef CONFIG_SMP
 246         pvr = per_cpu(cpu_pvr, cpu_id);
 247 #else
 248         pvr = mfspr(SPRN_PVR);
 249 #endif
 250         maj = (pvr >> 8) & 0xFF;
 251         min = pvr & 0xFF;
 252
 253         seq_printf(m, "processor\t: %lu\n", cpu_id);
 254         seq_printf(m, "cpu\t\t: ");
 255
 256         if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
 257                 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
 258         else
 259                 seq_printf(m, "unknown (%08x)", pvr);
 260
 261 #ifdef CONFIG_ALTIVEC
 262         if (cpu_has_feature(CPU_FTR_ALTIVEC))
 263                 seq_printf(m, ", altivec supported");
 264 #endif /* CONFIG_ALTIVEC */
 265
 266         seq_printf(m, "\n");
 267
 268 #ifdef CONFIG_TAU
 269         if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
 270 #ifdef CONFIG_TAU_AVERAGE
 271                 /* more straightforward, but potentially misleading */
 272                 seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
 273                            cpu_temp(cpu_id));
 274 #else
 275                 /* show the actual temp sensor range */
 276                 u32 temp;
 277                 temp = cpu_temp_both(cpu_id);
 278                 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
 279                            temp & 0xff, temp >> 16);
 280 #endif
 281         }
 282 #endif /* CONFIG_TAU */
 283
 284         /*
 285          * Platforms that have variable clock rates, should implement
 286          * the method ppc_md.get_proc_freq() that reports the clock
 287          * rate of a given cpu. The rest can use ppc_proc_freq to
 288          * report the clock rate that is same across all cpus.
 289          */
 290         if (ppc_md.get_proc_freq)
 291                 proc_freq = ppc_md.get_proc_freq(cpu_id);
 292         else
 293                 proc_freq = ppc_proc_freq;
 294
 295         if (proc_freq)
 296                 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
 297                            proc_freq / 1000000, proc_freq % 1000000);
 298
 299         if (ppc_md.show_percpuinfo != NULL)
 300                 ppc_md.show_percpuinfo(m, cpu_id);
 301
 302         /* If we are a Freescale core do a simple check so
 303          * we dont have to keep adding cases in the future */
 304         if (PVR_VER(pvr) & 0x8000) {
 305                 switch (PVR_VER(pvr)) {
 306                 case 0x8000:    /* 7441/7450/7451, Voyager */
 307                 case 0x8001:    /* 7445/7455, Apollo 6 */
 308                 case 0x8002:    /* 7447/7457, Apollo 7 */
 309                 case 0x8003:    /* 7447A, Apollo 7 PM */
 310                 case 0x8004:    /* 7448, Apollo 8 */
 311                 case 0x800c:    /* 7410, Nitro */
 312                         maj = ((pvr >> 8) & 0xF);
 313                         min = PVR_MIN(pvr);
 314                         break;
 315                 default:        /* e500/book-e */
 316                         maj = PVR_MAJ(pvr);
 317                         min = PVR_MIN(pvr);
 318                         break;
 319                 }
 320         } else {
 321                 switch (PVR_VER(pvr)) {
 322                         case 0x0020:    /* 403 family */
 323                                 maj = PVR_MAJ(pvr) + 1;
 324                                 min = PVR_MIN(pvr);
 325                                 break;
 326                         case 0x1008:    /* 740P/750P ?? */
 327                                 maj = ((pvr >> 8) & 0xFF) - 1;
 328                                 min = pvr & 0xFF;
 329                                 break;
 330                         case 0x004e: /* POWER9 bits 12-15 give chip type */
 331                                 maj = (pvr >> 8) & 0x0F;
 332                                 min = pvr & 0xFF;
 333                                 break;
 334                         default:
 335                                 maj = (pvr >> 8) & 0xFF;
 336                                 min = pvr & 0xFF;
 337                                 break;
 338                 }
 339         }
 340
 341         seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
 342                    maj, min, PVR_VER(pvr), PVR_REV(pvr));
 343
 344 #ifdef CONFIG_PPC32
 345         seq_printf(m, "bogomips\t: %lu.%02lu\n",
 346                    loops_per_jiffy / (500000/HZ),
 347                    (loops_per_jiffy / (5000/HZ)) % 100);
 348 #endif
 349         seq_printf(m, "\n");
 350
 351         /* If this is the last cpu, print the summary */
 352         if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
 353                 show_cpuinfo_summary(m);
 354
 355         return 0;
 356 }
 357
 358 static void *c_start(struct seq_file *m, loff_t *pos)
 359 {
 360         if (*pos == 0)  /* just in case, cpu 0 is not the first */
 361                 *pos = cpumask_first(cpu_online_mask);
 362         else
 363                 *pos = cpumask_next(*pos - 1, cpu_online_mask);
 364         if ((*pos) < nr_cpu_ids)
 365                 return (void *)(unsigned long)(*pos + 1);
 366         return NULL;
 367 }
 368
 369 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 370 {
 371         (*pos)++;
 372         return c_start(m, pos);
 373 }
 374
 375 static void c_stop(struct seq_file *m, void *v)
 376 {
 377 }
 378
 379 const struct seq_operations cpuinfo_op = {
 380         .start  = c_start,
 381         .next   = c_next,
 382         .stop   = c_stop,
 383         .show   = show_cpuinfo,
 384 };
 385
 386 void __init check_for_initrd(void)
 387 {
 388 #ifdef CONFIG_BLK_DEV_INITRD
 389         DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
 390             initrd_start, initrd_end);
 391
 392         /* If we were passed an initrd, set the ROOT_DEV properly if the values
 393          * look sensible. If not, clear initrd reference.
 394          */
 395         if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
 396             initrd_end > initrd_start)
 397                 ROOT_DEV = Root_RAM0;
 398         else
 399                 initrd_start = initrd_end = 0;
 400
 401         if (initrd_start)
 402                 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
 403
 404         DBG(" <- check_for_initrd()\n");
 405 #endif /* CONFIG_BLK_DEV_INITRD */
 406 }
 407
 408 #ifdef CONFIG_SMP
 409
 410 int threads_per_core, threads_per_subcore, threads_shift;
 411 cpumask_t threads_core_mask;
 412 EXPORT_SYMBOL_GPL(threads_per_core);
 413 EXPORT_SYMBOL_GPL(threads_per_subcore);
 414 EXPORT_SYMBOL_GPL(threads_shift);
 415 EXPORT_SYMBOL_GPL(threads_core_mask);
 416
 417 static void __init cpu_init_thread_core_maps(int tpc)
 418 {
 419         int i;
 420
 421         threads_per_core = tpc;
 422         threads_per_subcore = tpc;
 423         cpumask_clear(&threads_core_mask);
 424
 425         /* This implementation only supports power of 2 number of threads
 426          * for simplicity and performance
 427          */
 428         threads_shift = ilog2(tpc);
 429         BUG_ON(tpc != (1 << threads_shift));
 430
 431         for (i = 0; i < tpc; i++)
 432                 cpumask_set_cpu(i, &threads_core_mask);
 433
 434         printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
 435                tpc, tpc > 1 ? "s" : "");
 436         printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
 437 }
 438
 439
 440 u32 *cpu_to_phys_id = NULL;
 441
 442 /**
 443  * setup_cpu_maps - initialize the following cpu maps:
 444  *                  cpu_possible_mask
 445  *                  cpu_present_mask
 446  *
 447  * Having the possible map set up early allows us to restrict allocations
 448  * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
 449  *
 450  * We do not initialize the online map here; cpus set their own bits in
 451  * cpu_online_mask as they come up.
 452  *
 453  * This function is valid only for Open Firmware systems.  finish_device_tree
 454  * must be called before using this.
 455  *
 456  * While we're here, we may as well set the "physical" cpu ids in the paca.
 457  *
 458  * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
 459  */
 460 void __init smp_setup_cpu_maps(void)
 461 {
 462         struct device_node *dn;
 463         int cpu = 0;
 464         int nthreads = 1;
 465
 466         DBG("smp_setup_cpu_maps()\n");
 467
 468         cpu_to_phys_id = __va(memblock_alloc(nr_cpu_ids * sizeof(u32),
 469                                                         __alignof__(u32)));
 470         memset(cpu_to_phys_id, 0, nr_cpu_ids * sizeof(u32));
 471
 472         for_each_node_by_type(dn, "cpu") {
 473                 const __be32 *intserv;
 474                 __be32 cpu_be;
 475                 int j, len;
 476
 477                 DBG("  * %pOF...\n", dn);
 478
 479                 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
 480                                 &len);
 481                 if (intserv) {
 482                         DBG("    ibm,ppc-interrupt-server#s -> %d threads\n",
 483                             nthreads);
 484                 } else {
 485                         DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
 486                         intserv = of_get_property(dn, "reg", &len);
 487                         if (!intserv) {
 488                                 cpu_be = cpu_to_be32(cpu);
 489                                 /* XXX: what is this? uninitialized?? */
 490                                 intserv = &cpu_be;      /* assume logical == phys */
 491                                 len = 4;
 492                         }
 493                 }
 494
 495                 nthreads = len / sizeof(int);
 496
 497                 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
 498                         bool avail;
 499
 500                         DBG("    thread %d -> cpu %d (hard id %d)\n",
 501                             j, cpu, be32_to_cpu(intserv[j]));
 502
 503                         avail = of_device_is_available(dn);
 504                         if (!avail)
 505                                 avail = !of_property_match_string(dn,
 506                                                 "enable-method", "spin-table");
 507
 508                         set_cpu_present(cpu, avail);
 509                         set_cpu_possible(cpu, true);
 510                         cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
 511                         cpu++;
 512                 }
 513
 514                 if (cpu >= nr_cpu_ids) {
 515                         of_node_put(dn);
 516                         break;
 517                 }
 518         }
 519
 520         /* If no SMT supported, nthreads is forced to 1 */
 521         if (!cpu_has_feature(CPU_FTR_SMT)) {
 522                 DBG("  SMT disabled ! nthreads forced to 1\n");
 523                 nthreads = 1;
 524         }
 525
 526 #ifdef CONFIG_PPC64
 527         /*
 528          * On pSeries LPAR, we need to know how many cpus
 529          * could possibly be added to this partition.
 530          */
 531         if (firmware_has_feature(FW_FEATURE_LPAR) &&
 532             (dn = of_find_node_by_path("/rtas"))) {
 533                 int num_addr_cell, num_size_cell, maxcpus;
 534                 const __be32 *ireg;
 535
 536                 num_addr_cell = of_n_addr_cells(dn);
 537                 num_size_cell = of_n_size_cells(dn);
 538
 539                 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
 540
 541                 if (!ireg)
 542                         goto out;
 543
 544                 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
 545
 546                 /* Double maxcpus for processors which have SMT capability */
 547                 if (cpu_has_feature(CPU_FTR_SMT))
 548                         maxcpus *= nthreads;
 549
 550                 if (maxcpus > nr_cpu_ids) {
 551                         printk(KERN_WARNING
 552                                "Partition configured for %d cpus, "
 553                                "operating system maximum is %u.\n",
 554                                maxcpus, nr_cpu_ids);
 555                         maxcpus = nr_cpu_ids;
 556                 } else
 557                         printk(KERN_INFO "Partition configured for %d cpus.\n",
 558                                maxcpus);
 559
 560                 for (cpu = 0; cpu < maxcpus; cpu++)
 561                         set_cpu_possible(cpu, true);
 562         out:
 563                 of_node_put(dn);
 564         }
 565         vdso_data->processorCount = num_present_cpus();
 566 #endif /* CONFIG_PPC64 */
 567
 568         /* Initialize CPU <=> thread mapping/
 569          *
 570          * WARNING: We assume that the number of threads is the same for
 571          * every CPU in the system. If that is not the case, then some code
 572          * here will have to be reworked
 573          */
 574         cpu_init_thread_core_maps(nthreads);
 575
 576         /* Now that possible cpus are set, set nr_cpu_ids for later use */
 577         setup_nr_cpu_ids();
 578
 579         free_unused_pacas();
 580
 581         for_each_possible_cpu(cpu) {
 582                 if (cpu == smp_processor_id())
 583                         continue;
 584                 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
 585         }
 586 }
 587 #endif /* CONFIG_SMP */
 588
 589 #ifdef CONFIG_PCSPKR_PLATFORM
 590 static __init int add_pcspkr(void)
 591 {
 592         struct device_node *np;
 593         struct platform_device *pd;
 594         int ret;
 595
 596         np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
 597         of_node_put(np);
 598         if (!np)
 599                 return -ENODEV;
 600
 601         pd = platform_device_alloc("pcspkr", -1);
 602         if (!pd)
 603                 return -ENOMEM;
 604
 605         ret = platform_device_add(pd);
 606         if (ret)
 607                 platform_device_put(pd);
 608
 609         return ret;
 610 }
 611 device_initcall(add_pcspkr);
 612 #endif  /* CONFIG_PCSPKR_PLATFORM */
 613
 614 void probe_machine(void)
 615 {
 616         extern struct machdep_calls __machine_desc_start;
 617         extern struct machdep_calls __machine_desc_end;
 618         unsigned int i;
 619
 620         /*
 621          * Iterate all ppc_md structures until we find the proper
 622          * one for the current machine type
 623          */
 624         DBG("Probing machine type ...\n");
 625
 626         /*
 627          * Check ppc_md is empty, if not we have a bug, ie, we setup an
 628          * entry before probe_machine() which will be overwritten
 629          */
 630         for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
 631                 if (((void **)&ppc_md)[i]) {
 632                         printk(KERN_ERR "Entry %d in ppc_md non empty before"
 633                                " machine probe !\n", i);
 634                 }
 635         }
 636
 637         for (machine_id = &__machine_desc_start;
 638              machine_id < &__machine_desc_end;
 639              machine_id++) {
 640                 DBG("  %s ...", machine_id->name);
 641                 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
 642                 if (ppc_md.probe()) {
 643                         DBG(" match !\n");
 644                         break;
 645                 }
 646                 DBG("\n");
 647         }
 648         /* What can we do if we didn't find ? */
 649         if (machine_id >= &__machine_desc_end) {
 650                 DBG("No suitable machine found !\n");
 651                 for (;;);
 652         }
 653
 654         printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
 655 }
 656
 657 /* Match a class of boards, not a specific device configuration. */
 658 int check_legacy_ioport(unsigned long base_port)
 659 {
 660         struct device_node *parent, *np = NULL;
 661         int ret = -ENODEV;
 662
 663         switch(base_port) {
 664         case I8042_DATA_REG:
 665                 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
 666                         np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
 667                 if (np) {
 668                         parent = of_get_parent(np);
 669
 670                         of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
 671                         if (!of_i8042_kbd_irq)
 672                                 of_i8042_kbd_irq = 1;
 673
 674                         of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
 675                         if (!of_i8042_aux_irq)
 676                                 of_i8042_aux_irq = 12;
 677
 678                         of_node_put(np);
 679                         np = parent;
 680                         break;
 681                 }
 682                 np = of_find_node_by_type(NULL, "8042");
 683                 /* Pegasos has no device_type on its 8042 node, look for the
 684                  * name instead */
 685                 if (!np)
 686                         np = of_find_node_by_name(NULL, "8042");
 687                 if (np) {
 688                         of_i8042_kbd_irq = 1;
 689                         of_i8042_aux_irq = 12;
 690                 }
 691                 break;
 692         case FDC_BASE: /* FDC1 */
 693                 np = of_find_node_by_type(NULL, "fdc");
 694                 break;
 695         default:
 696                 /* ipmi is supposed to fail here */
 697                 break;
 698         }
 699         if (!np)
 700                 return ret;
 701         parent = of_get_parent(np);
 702         if (parent) {
 703                 if (strcmp(parent->type, "isa") == 0)
 704                         ret = 0;
 705                 of_node_put(parent);
 706         }
 707         of_node_put(np);
 708         return ret;
 709 }
 710 EXPORT_SYMBOL(check_legacy_ioport);
 711
 712 static int ppc_panic_event(struct notifier_block *this,
 713                              unsigned long event, void *ptr)
 714 {
 715         /*
 716          * If firmware-assisted dump has been registered then trigger
 717          * firmware-assisted dump and let firmware handle everything else.
 718          */
 719         crash_fadump(NULL, ptr);
 720         ppc_md.panic(ptr);  /* May not return */
 721         return NOTIFY_DONE;
 722 }
 723
 724 static struct notifier_block ppc_panic_block = {
 725         .notifier_call = ppc_panic_event,
 726         .priority = INT_MIN /* may not return; must be done last */
 727 };
 728
 729 void __init setup_panic(void)
 730 {
 731         if (!ppc_md.panic)
 732                 return;
 733         atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
 734 }
 735
 736 #ifdef CONFIG_CHECK_CACHE_COHERENCY
 737 /*
 738  * For platforms that have configurable cache-coherency.  This function
 739  * checks that the cache coherency setting of the kernel matches the setting
 740  * left by the firmware, as indicated in the device tree.  Since a mismatch
 741  * will eventually result in DMA failures, we print * and error and call
 742  * BUG() in that case.
 743  */
 744
 745 #ifdef CONFIG_NOT_COHERENT_CACHE
 746 #define KERNEL_COHERENCY        0
 747 #else
 748 #define KERNEL_COHERENCY        1
 749 #endif
 750
 751 static int __init check_cache_coherency(void)
 752 {
 753         struct device_node *np;
 754         const void *prop;
 755         int devtree_coherency;
 756
 757         np = of_find_node_by_path("/");
 758         prop = of_get_property(np, "coherency-off", NULL);
 759         of_node_put(np);
 760
 761         devtree_coherency = prop ? 0 : 1;
 762
 763         if (devtree_coherency != KERNEL_COHERENCY) {
 764                 printk(KERN_ERR
 765                         "kernel coherency:%s != device tree_coherency:%s\n",
 766                         KERNEL_COHERENCY ? "on" : "off",
 767                         devtree_coherency ? "on" : "off");
 768                 BUG();
 769         }
 770
 771         return 0;
 772 }
 773
 774 late_initcall(check_cache_coherency);
 775 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
 776
 777 #ifdef CONFIG_DEBUG_FS
 778 struct dentry *powerpc_debugfs_root;
 779 EXPORT_SYMBOL(powerpc_debugfs_root);
 780
 781 static int powerpc_debugfs_init(void)
 782 {
 783         powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
 784
 785         return powerpc_debugfs_root == NULL;
 786 }
 787 arch_initcall(powerpc_debugfs_init);
 788 #endif
 789
 790 void ppc_printk_progress(char *s, unsigned short hex)
 791 {
 792         pr_info("%s\n", s);
 793 }
 794
 795 void arch_setup_pdev_archdata(struct platform_device *pdev)
 796 {
 797         pdev->archdata.dma_mask = DMA_BIT_MASK(32);
 798         pdev->dev.dma_mask = &pdev->archdata.dma_mask;
 799         set_dma_ops(&pdev->dev, &dma_nommu_ops);
 800 }
 801
 802 static __init void print_system_info(void)
 803 {
 804         pr_info("-----------------------------------------------------\n");
 805 #ifdef CONFIG_PPC_BOOK3S_64
 806         pr_info("ppc64_pft_size    = 0x%llx\n", ppc64_pft_size);
 807 #endif
 808 #ifdef CONFIG_PPC_STD_MMU_32
 809         pr_info("Hash_size         = 0x%lx\n", Hash_size);
 810 #endif
 811         pr_info("phys_mem_size     = 0x%llx\n",
 812                 (unsigned long long)memblock_phys_mem_size());
 813
 814         pr_info("dcache_bsize      = 0x%x\n", dcache_bsize);
 815         pr_info("icache_bsize      = 0x%x\n", icache_bsize);
 816         if (ucache_bsize != 0)
 817                 pr_info("ucache_bsize      = 0x%x\n", ucache_bsize);
 818
 819         pr_info("cpu_features      = 0x%016lx\n", cur_cpu_spec->cpu_features);
 820         pr_info("  possible        = 0x%016lx\n",
 821                 (unsigned long)CPU_FTRS_POSSIBLE);
 822         pr_info("  always          = 0x%016lx\n",
 823                 (unsigned long)CPU_FTRS_ALWAYS);
 824         pr_info("cpu_user_features = 0x%08x 0x%08x\n",
 825                 cur_cpu_spec->cpu_user_features,
 826                 cur_cpu_spec->cpu_user_features2);
 827         pr_info("mmu_features      = 0x%08x\n", cur_cpu_spec->mmu_features);
 828 #ifdef CONFIG_PPC64
 829         pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
 830 #endif
 831
 832 #ifdef CONFIG_PPC_BOOK3S_64
 833         if (htab_address)
 834                 pr_info("htab_address      = 0x%p\n", htab_address);
 835         if (htab_hash_mask)
 836                 pr_info("htab_hash_mask    = 0x%lx\n", htab_hash_mask);
 837 #endif
 838 #ifdef CONFIG_PPC_STD_MMU_32
 839         if (Hash)
 840                 pr_info("Hash              = 0x%p\n", Hash);
 841         if (Hash_mask)
 842                 pr_info("Hash_mask         = 0x%lx\n", Hash_mask);
 843 #endif
 844
 845         if (PHYSICAL_START > 0)
 846                 pr_info("physical_start    = 0x%llx\n",
 847                        (unsigned long long)PHYSICAL_START);
 848         pr_info("-----------------------------------------------------\n");
 849 }
 850
 851 /*
 852  * Called into from start_kernel this initializes memblock, which is used
 853  * to manage page allocation until mem_init is called.
 854  */
 855 void __init setup_arch(char **cmdline_p)
 856 {
 857         *cmdline_p = boot_command_line;
 858
 859         /* Set a half-reasonable default so udelay does something sensible */
 860         loops_per_jiffy = 500000000 / HZ;
 861
 862         /* Unflatten the device-tree passed by prom_init or kexec */
 863         unflatten_device_tree();
 864
 865         /*
 866          * Initialize cache line/block info from device-tree (on ppc64) or
 867          * just cputable (on ppc32).
 868          */
 869         initialize_cache_info();
 870
 871         /* Initialize RTAS if available. */
 872         rtas_initialize();
 873
 874         /* Check if we have an initrd provided via the device-tree. */
 875         check_for_initrd();
 876
 877         /* Probe the machine type, establish ppc_md. */
 878         probe_machine();
 879
 880         /* Setup panic notifier if requested by the platform. */
 881         setup_panic();
 882
 883         /*
 884          * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
 885          * it from their respective probe() function.
 886          */
 887         setup_power_save();
 888
 889         /* Discover standard serial ports. */
 890         find_legacy_serial_ports();
 891
 892         /* Register early console with the printk subsystem. */
 893         register_early_udbg_console();
 894
 895         /* Setup the various CPU maps based on the device-tree. */
 896         smp_setup_cpu_maps();
 897
 898         /* Initialize xmon. */
 899         xmon_setup();
 900
 901         /* Check the SMT related command line arguments (ppc64). */
 902         check_smt_enabled();
 903
 904         /* Parse memory topology */
 905         mem_topology_setup();
 906
 907         /* On BookE, setup per-core TLB data structures. */
 908         setup_tlb_core_data();
 909
 910         /*
 911          * Release secondary cpus out of their spinloops at 0x60 now that
 912          * we can map physical -> logical CPU ids.
 913          *
 914          * Freescale Book3e parts spin in a loop provided by firmware,
 915          * so smp_release_cpus() does nothing for them.
 916          */
 917 #ifdef CONFIG_SMP
 918         smp_release_cpus();
 919 #endif
 920
 921         /* Print various info about the machine that has been gathered so far. */
 922         print_system_info();
 923
 924         /* Reserve large chunks of memory for use by CMA for KVM. */
 925         kvm_cma_reserve();
 926
 927         klp_init_thread_info(&init_thread_info);
 928
 929         init_mm.start_code = (unsigned long)_stext;
 930         init_mm.end_code = (unsigned long) _etext;
 931         init_mm.end_data = (unsigned long) _edata;
 932         init_mm.brk = klimit;
 933
 934 #ifdef CONFIG_PPC_MM_SLICES
 935 #ifdef CONFIG_PPC64
 936         if (!radix_enabled())
 937                 init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW_USER64;
 938 #else
 939 #error  "context.addr_limit not initialized."
 940 #endif
 941 #endif
 942
 943 #ifdef CONFIG_SPAPR_TCE_IOMMU
 944         mm_iommu_init(&init_mm);
 945 #endif
 946         irqstack_early_init();
 947         exc_lvl_early_init();
 948         emergency_stack_init();
 949
 950         initmem_init();
 951
 952 #ifdef CONFIG_DUMMY_CONSOLE
 953         conswitchp = &dummy_con;
 954 #endif
 955         if (ppc_md.setup_arch)
 956                 ppc_md.setup_arch();
 957
 958         paging_init();
 959
 960         /* Initialize the MMU context management stuff. */
 961         mmu_context_init();
 962
 963 #ifdef CONFIG_PPC64
 964         /* Interrupt code needs to be 64K-aligned. */
 965         if ((unsigned long)_stext & 0xffff)
 966                 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
 967                       (unsigned long)_stext);
 968 #endif
 969 }