2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright SUSE Linux Products GmbH 2009
17 * Authors: Alexander Graf <agraf@suse.de>
20 #include <linux/types.h>
21 #include <linux/string.h>
22 #include <linux/kvm.h>
23 #include <linux/kvm_host.h>
24 #include <linux/highmem.h>
26 #include <asm/tlbflush.h>
27 #include <asm/kvm_ppc.h>
28 #include <asm/kvm_book3s.h>
29 #include <asm/book3s/64/mmu-hash.h>
31 /* #define DEBUG_MMU */
34 #define dprintk(X...) printk(KERN_INFO X)
36 #define dprintk(X...) do { } while(0)
39 static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
41 unsigned long msr = vcpu->arch.intr_msr;
42 unsigned long cur_msr = kvmppc_get_msr(vcpu);
44 /* If transactional, change to suspend mode on IRQ delivery */
45 if (MSR_TM_TRANSACTIONAL(cur_msr))
48 msr |= cur_msr & MSR_TS_MASK;
50 kvmppc_set_msr(vcpu, msr);
53 static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
54 struct kvm_vcpu *vcpu,
58 u64 esid = GET_ESID(eaddr);
59 u64 esid_1t = GET_ESID_1T(eaddr);
61 for (i = 0; i < vcpu->arch.slb_nr; i++) {
64 if (!vcpu->arch.slb[i].valid)
67 if (vcpu->arch.slb[i].tb)
70 if (vcpu->arch.slb[i].esid == cmp_esid)
71 return &vcpu->arch.slb[i];
74 dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n",
75 eaddr, esid, esid_1t);
76 for (i = 0; i < vcpu->arch.slb_nr; i++) {
77 if (vcpu->arch.slb[i].vsid)
78 dprintk(" %d: %c%c%c %llx %llx\n", i,
79 vcpu->arch.slb[i].valid ? 'v' : ' ',
80 vcpu->arch.slb[i].large ? 'l' : ' ',
81 vcpu->arch.slb[i].tb ? 't' : ' ',
82 vcpu->arch.slb[i].esid,
83 vcpu->arch.slb[i].vsid);
89 static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe)
91 return slbe->tb ? SID_SHIFT_1T : SID_SHIFT;
94 static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe)
96 return (1ul << kvmppc_slb_sid_shift(slbe)) - 1;
99 static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr)
101 eaddr &= kvmppc_slb_offset_mask(slb);
103 return (eaddr >> VPN_SHIFT) |
104 ((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT));
107 static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
110 struct kvmppc_slb *slb;
112 slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
116 return kvmppc_slb_calc_vpn(slb, eaddr);
119 static int mmu_pagesize(int mmu_pg)
130 static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
132 return mmu_pagesize(slbe->base_page_size);
135 static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
137 int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
139 return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p);
142 static hva_t kvmppc_mmu_book3s_64_get_pteg(struct kvm_vcpu *vcpu,
143 struct kvmppc_slb *slbe, gva_t eaddr,
146 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
147 u64 hash, pteg, htabsize;
152 htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);
154 vpn = kvmppc_slb_calc_vpn(slbe, eaddr);
155 ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M;
156 hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize);
159 hash &= ((1ULL << 39ULL) - 1ULL);
163 pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
166 dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
167 page, vcpu_book3s->sdr1, pteg, slbe->vsid);
169 /* When running a PAPR guest, SDR1 contains a HVA address instead
171 if (vcpu->arch.papr_enabled)
174 r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
176 if (kvm_is_error_hva(r))
178 return r | (pteg & ~PAGE_MASK);
181 static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
183 int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
186 avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
187 avpn |= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p);
190 avpn >>= ((80 - p) - 56) - 8; /* 16 - p */
198 * Return page size encoded in the second word of a HPTE, or
199 * -1 for an invalid encoding for the base page size indicated by
200 * the SLB entry. This doesn't handle mixed pagesize segments yet.
202 static int decode_pagesize(struct kvmppc_slb *slbe, u64 r)
204 switch (slbe->base_page_size) {
206 if ((r & 0xf000) == 0x1000)
210 if ((r & 0xff000) == 0)
217 static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
218 struct kvmppc_pte *gpte, bool data,
221 struct kvmppc_slb *slbe;
233 ulong mp_ea = vcpu->arch.magic_page_ea;
235 /* Magic page override */
236 if (unlikely(mp_ea) &&
237 unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
238 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
240 gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
241 gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff);
242 gpte->raddr &= KVM_PAM;
243 gpte->may_execute = true;
244 gpte->may_read = true;
245 gpte->may_write = true;
246 gpte->page_size = MMU_PAGE_4K;
247 gpte->wimg = HPTE_R_M;
252 slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
256 avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
257 v_val = avpn & HPTE_V_AVPN;
260 v_val |= SLB_VSID_B_1T;
262 v_val |= HPTE_V_LARGE;
263 v_val |= HPTE_V_VALID;
265 v_mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_LARGE | HPTE_V_VALID |
268 pgsize = slbe->large ? MMU_PAGE_16M : MMU_PAGE_4K;
270 mutex_lock(&vcpu->kvm->arch.hpt_mutex);
273 ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu, slbe, eaddr, second);
274 if (kvm_is_error_hva(ptegp))
277 if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
278 printk_ratelimited(KERN_ERR
279 "KVM: Can't copy data from 0x%lx!\n", ptegp);
283 if ((kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Kp)
285 else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Ks)
288 for (i=0; i<16; i+=2) {
289 u64 pte0 = be64_to_cpu(pteg[i]);
290 u64 pte1 = be64_to_cpu(pteg[i + 1]);
292 /* Check all relevant fields of 1st dword */
293 if ((pte0 & v_mask) == v_val) {
294 /* If large page bit is set, check pgsize encoding */
296 (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
297 pgsize = decode_pagesize(slbe, pte1);
309 v_val |= HPTE_V_SECONDARY;
314 v = be64_to_cpu(pteg[i]);
315 r = be64_to_cpu(pteg[i+1]);
316 pp = (r & HPTE_R_PP) | key;
321 gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
323 eaddr_mask = (1ull << mmu_pagesize(pgsize)) - 1;
324 gpte->raddr = (r & HPTE_R_RPN & ~eaddr_mask) | (eaddr & eaddr_mask);
325 gpte->page_size = pgsize;
326 gpte->may_execute = ((r & HPTE_R_N) ? false : true);
327 if (unlikely(vcpu->arch.disable_kernel_nx) &&
328 !(kvmppc_get_msr(vcpu) & MSR_PR))
329 gpte->may_execute = true;
330 gpte->may_read = false;
331 gpte->may_write = false;
332 gpte->wimg = r & HPTE_R_WIMG;
339 gpte->may_write = true;
345 gpte->may_read = true;
349 dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
351 eaddr, avpn, gpte->vpage, gpte->raddr);
353 /* Update PTE R and C bits, so the guest's swapper knows we used the
355 if (gpte->may_read && !(r & HPTE_R_R)) {
357 * Set the accessed flag.
358 * We have to write this back with a single byte write
359 * because another vcpu may be accessing this on
360 * non-PAPR platforms such as mac99, and this is
361 * what real hardware does.
363 char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64));
365 put_user(r >> 8, addr + 6);
367 if (iswrite && gpte->may_write && !(r & HPTE_R_C)) {
368 /* Set the dirty flag */
369 /* Use a single byte write */
370 char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64));
372 put_user(r, addr + 7);
375 mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
377 if (!gpte->may_read || (iswrite && !gpte->may_write))
382 mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
386 dprintk("KVM MMU: Trigger segment fault\n");
390 static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
394 struct kvmppc_slb *slbe;
396 dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);
399 esid_1t = GET_ESID_1T(rb);
402 if (slb_nr > vcpu->arch.slb_nr)
405 slbe = &vcpu->arch.slb[slb_nr];
407 slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
408 slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0;
409 slbe->esid = slbe->tb ? esid_1t : esid;
410 slbe->vsid = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16);
411 slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
412 slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0;
413 slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0;
414 slbe->nx = (rs & SLB_VSID_N) ? 1 : 0;
415 slbe->class = (rs & SLB_VSID_C) ? 1 : 0;
417 slbe->base_page_size = MMU_PAGE_4K;
419 if (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE) {
420 switch (rs & SLB_VSID_LP) {
422 slbe->base_page_size = MMU_PAGE_16M;
425 slbe->base_page_size = MMU_PAGE_64K;
429 slbe->base_page_size = MMU_PAGE_16M;
432 slbe->orige = rb & (ESID_MASK | SLB_ESID_V);
435 /* Map the new segment */
436 kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
439 static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
441 struct kvmppc_slb *slbe;
443 if (slb_nr > vcpu->arch.slb_nr)
446 slbe = &vcpu->arch.slb[slb_nr];
451 static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
453 struct kvmppc_slb *slbe;
455 if (slb_nr > vcpu->arch.slb_nr)
458 slbe = &vcpu->arch.slb[slb_nr];
463 static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
465 struct kvmppc_slb *slbe;
468 dprintk("KVM MMU: slbie(0x%llx)\n", ea);
470 slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
475 dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);
481 seg_size = 1ull << kvmppc_slb_sid_shift(slbe);
482 kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size);
485 static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
489 dprintk("KVM MMU: slbia()\n");
491 for (i = 1; i < vcpu->arch.slb_nr; i++) {
492 vcpu->arch.slb[i].valid = false;
493 vcpu->arch.slb[i].orige = 0;
494 vcpu->arch.slb[i].origv = 0;
497 if (kvmppc_get_msr(vcpu) & MSR_IR) {
498 kvmppc_mmu_flush_segments(vcpu);
499 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
503 static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
509 * According to Book3 2.01 mtsrin is implemented as:
511 * The SLB entry specified by (RB)32:35 is loaded from register
514 * SLBE Bit Source SLB Field
516 * 0:31 0x0000_0000 ESID-0:31
517 * 32:35 (RB)32:35 ESID-32:35
519 * 37:61 0x00_0000|| 0b0 VSID-0:24
520 * 62:88 (RS)37:63 VSID-25:51
521 * 89:91 (RS)33:35 Ks Kp N
522 * 92 (RS)36 L ((RS)36 must be 0b0)
526 dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
529 rb |= (srnum & 0xf) << 28;
530 /* Set the valid bit */
536 rs |= (value & 0xfffffff) << 12;
538 rs |= ((value >> 28) & 0x7) << 9;
540 kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
543 static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
546 u64 mask = 0xFFFFFFFFFULL;
550 dprintk("KVM MMU: tlbie(0x%lx)\n", va);
553 * The tlbie instruction changed behaviour starting with
554 * POWER6. POWER6 and later don't have the large page flag
555 * in the instruction but in the RB value, along with bits
556 * indicating page and segment sizes.
558 if (vcpu->arch.hflags & BOOK3S_HFLAG_NEW_TLBIE) {
559 /* POWER6 or later */
560 if (va & 1) { /* L bit */
561 if ((va & 0xf000) == 0x1000)
562 mask = 0xFFFFFFFF0ULL; /* 64k page */
564 mask = 0xFFFFFF000ULL; /* 16M page */
567 /* older processors, e.g. PPC970 */
569 mask = 0xFFFFFF000ULL;
571 /* flush this VA on all vcpus */
572 kvm_for_each_vcpu(i, v, vcpu->kvm)
573 kvmppc_mmu_pte_vflush(v, va >> 12, mask);
576 #ifdef CONFIG_PPC_64K_PAGES
577 static int segment_contains_magic_page(struct kvm_vcpu *vcpu, ulong esid)
579 ulong mp_ea = vcpu->arch.magic_page_ea;
581 return mp_ea && !(kvmppc_get_msr(vcpu) & MSR_PR) &&
582 (mp_ea >> SID_SHIFT) == esid;
586 static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
589 ulong ea = esid << SID_SHIFT;
590 struct kvmppc_slb *slb;
592 ulong mp_ea = vcpu->arch.magic_page_ea;
593 int pagesize = MMU_PAGE_64K;
594 u64 msr = kvmppc_get_msr(vcpu);
596 if (msr & (MSR_DR|MSR_IR)) {
597 slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
600 pagesize = slb->base_page_size;
602 gvsid <<= SID_SHIFT_1T - SID_SHIFT;
603 gvsid |= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1);
609 switch (msr & (MSR_DR|MSR_IR)) {
611 gvsid = VSID_REAL | esid;
614 gvsid |= VSID_REAL_IR;
617 gvsid |= VSID_REAL_DR;
629 #ifdef CONFIG_PPC_64K_PAGES
631 * Mark this as a 64k segment if the host is using
632 * 64k pages, the host MMU supports 64k pages and
633 * the guest segment page size is >= 64k,
634 * but not if this segment contains the magic page.
636 if (pagesize >= MMU_PAGE_64K &&
637 mmu_psize_defs[MMU_PAGE_64K].shift &&
638 !segment_contains_magic_page(vcpu, esid))
642 if (kvmppc_get_msr(vcpu) & MSR_PR)
649 /* Catch magic page case */
650 if (unlikely(mp_ea) &&
651 unlikely(esid == (mp_ea >> SID_SHIFT)) &&
652 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
653 *vsid = VSID_REAL | esid;
660 static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
662 return (to_book3s(vcpu)->hid[5] & 0x80);
665 void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
667 struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
670 mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
671 mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
672 mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
673 mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
674 mmu->slbie = kvmppc_mmu_book3s_64_slbie;
675 mmu->slbia = kvmppc_mmu_book3s_64_slbia;
676 mmu->xlate = kvmppc_mmu_book3s_64_xlate;
677 mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
678 mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
679 mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
680 mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
681 mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;
683 vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;