2 * Page table handling routines for radix page table.
4 * Copyright 2015-2016, Aneesh Kumar K.V, IBM Corporation.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 #include <linux/sched.h>
12 #include <linux/memblock.h>
13 #include <linux/of_fdt.h>
15 #include <asm/pgtable.h>
16 #include <asm/pgalloc.h>
18 #include <asm/machdep.h>
20 #include <asm/firmware.h>
22 #include <trace/events/thp.h>
24 static int native_update_partition_table(u64 patb1)
26 partition_tb->patb1 = cpu_to_be64(patb1);
30 static __ref void *early_alloc_pgtable(unsigned long size)
34 pt = __va(memblock_alloc_base(size, size, MEMBLOCK_ALLOC_ANYWHERE));
40 int radix__map_kernel_page(unsigned long ea, unsigned long pa,
42 unsigned int map_page_size)
49 * Make sure task size is correct as per the max adddr
51 BUILD_BUG_ON(TASK_SIZE_USER64 > RADIX_PGTABLE_RANGE);
52 if (slab_is_available()) {
53 pgdp = pgd_offset_k(ea);
54 pudp = pud_alloc(&init_mm, pgdp, ea);
57 if (map_page_size == PUD_SIZE) {
61 pmdp = pmd_alloc(&init_mm, pudp, ea);
64 if (map_page_size == PMD_SIZE) {
68 ptep = pte_alloc_kernel(pmdp, ea);
72 pgdp = pgd_offset_k(ea);
73 if (pgd_none(*pgdp)) {
74 pudp = early_alloc_pgtable(PUD_TABLE_SIZE);
76 pgd_populate(&init_mm, pgdp, pudp);
78 pudp = pud_offset(pgdp, ea);
79 if (map_page_size == PUD_SIZE) {
83 if (pud_none(*pudp)) {
84 pmdp = early_alloc_pgtable(PMD_TABLE_SIZE);
86 pud_populate(&init_mm, pudp, pmdp);
88 pmdp = pmd_offset(pudp, ea);
89 if (map_page_size == PMD_SIZE) {
93 if (!pmd_present(*pmdp)) {
94 ptep = early_alloc_pgtable(PAGE_SIZE);
96 pmd_populate_kernel(&init_mm, pmdp, ptep);
98 ptep = pte_offset_kernel(pmdp, ea);
102 set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT, flags));
107 static void __init radix_init_pgtable(void)
110 u64 base, end, start_addr;
111 unsigned long rts_field;
112 struct memblock_region *reg;
113 unsigned long linear_page_size;
115 /* We don't support slb for radix */
118 * Create the linear mapping, using standard page size for now
121 for_each_memblock(memory, reg) {
123 start_addr = reg->base;
126 if (loop_count < 1 && mmu_psize_defs[MMU_PAGE_1G].shift)
127 linear_page_size = PUD_SIZE;
128 else if (loop_count < 2 && mmu_psize_defs[MMU_PAGE_2M].shift)
129 linear_page_size = PMD_SIZE;
131 linear_page_size = PAGE_SIZE;
133 base = _ALIGN_UP(start_addr, linear_page_size);
134 end = _ALIGN_DOWN(reg->base + reg->size, linear_page_size);
136 pr_info("Mapping range 0x%lx - 0x%lx with 0x%lx\n",
137 (unsigned long)base, (unsigned long)end,
141 radix__map_kernel_page((unsigned long)__va(base),
144 base += linear_page_size;
147 * map the rest using lower page size
149 if (end < reg->base + reg->size) {
156 * Allocate Partition table and process table for the
159 BUILD_BUG_ON_MSG((PRTB_SIZE_SHIFT > 23), "Process table size too large.");
160 process_tb = early_alloc_pgtable(1UL << PRTB_SIZE_SHIFT);
162 * Fill in the process table.
163 * we support 52 bits, hence 52-28 = 24, 11000
165 rts_field = 3ull << PPC_BITLSHIFT(2);
166 process_tb->prtb0 = cpu_to_be64(rts_field | __pa(init_mm.pgd) | RADIX_PGD_INDEX_SIZE);
168 * Fill in the partition table. We are suppose to use effective address
169 * of process table here. But our linear mapping also enable us to use
170 * physical address here.
172 ppc_md.update_partition_table(__pa(process_tb) | (PRTB_SIZE_SHIFT - 12) | PATB_GR);
173 pr_info("Process table %p and radix root for kernel: %p\n", process_tb, init_mm.pgd);
176 static void __init radix_init_partition_table(void)
178 unsigned long rts_field;
180 * we support 52 bits, hence 52-28 = 24, 11000
182 rts_field = 3ull << PPC_BITLSHIFT(2);
184 BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 24), "Partition table size too large.");
185 partition_tb = early_alloc_pgtable(1UL << PATB_SIZE_SHIFT);
186 partition_tb->patb0 = cpu_to_be64(rts_field | __pa(init_mm.pgd) |
187 RADIX_PGD_INDEX_SIZE | PATB_HR);
188 printk("Partition table %p\n", partition_tb);
190 memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE);
192 * update partition table control register,
195 mtspr(SPRN_PTCR, __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
198 void __init radix_init_native(void)
200 ppc_md.update_partition_table = native_update_partition_table;
203 static int __init get_idx_from_shift(unsigned int shift)
224 static int __init radix_dt_scan_page_sizes(unsigned long node,
225 const char *uname, int depth,
232 const char *type = of_get_flat_dt_prop(node, "device_type", NULL);
234 /* We are scanning "cpu" nodes only */
235 if (type == NULL || strcmp(type, "cpu") != 0)
238 prop = of_get_flat_dt_prop(node, "ibm,processor-radix-AP-encodings", &size);
242 pr_info("Page sizes from device-tree:\n");
243 for (; size >= 4; size -= 4, ++prop) {
245 struct mmu_psize_def *def;
247 /* top 3 bit is AP encoding */
248 shift = be32_to_cpu(prop[0]) & ~(0xe << 28);
249 ap = be32_to_cpu(prop[0]) >> 29;
250 pr_info("Page size sift = %d AP=0x%x\n", shift, ap);
252 idx = get_idx_from_shift(shift);
256 def = &mmu_psize_defs[idx];
262 cur_cpu_spec->mmu_features &= ~MMU_FTR_NO_SLBIE_B;
266 static void __init radix_init_page_sizes(void)
271 * Try to find the available page sizes in the device-tree
273 rc = of_scan_flat_dt(radix_dt_scan_page_sizes, NULL);
274 if (rc != 0) /* Found */
277 * let's assume we have page 4k and 64k support
279 mmu_psize_defs[MMU_PAGE_4K].shift = 12;
280 mmu_psize_defs[MMU_PAGE_4K].ap = 0x0;
282 mmu_psize_defs[MMU_PAGE_64K].shift = 16;
283 mmu_psize_defs[MMU_PAGE_64K].ap = 0x5;
285 #ifdef CONFIG_SPARSEMEM_VMEMMAP
286 if (mmu_psize_defs[MMU_PAGE_2M].shift) {
288 * map vmemmap using 2M if available
290 mmu_vmemmap_psize = MMU_PAGE_2M;
292 #endif /* CONFIG_SPARSEMEM_VMEMMAP */
296 void __init radix__early_init_mmu(void)
300 * setup LPCR UPRT based on mmu_features
302 lpcr = mfspr(SPRN_LPCR);
303 mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
305 #ifdef CONFIG_PPC_64K_PAGES
306 /* PAGE_SIZE mappings */
307 mmu_virtual_psize = MMU_PAGE_64K;
309 mmu_virtual_psize = MMU_PAGE_4K;
312 #ifdef CONFIG_SPARSEMEM_VMEMMAP
313 /* vmemmap mapping */
314 mmu_vmemmap_psize = mmu_virtual_psize;
317 * initialize page table size
319 __pte_index_size = RADIX_PTE_INDEX_SIZE;
320 __pmd_index_size = RADIX_PMD_INDEX_SIZE;
321 __pud_index_size = RADIX_PUD_INDEX_SIZE;
322 __pgd_index_size = RADIX_PGD_INDEX_SIZE;
323 __pmd_cache_index = RADIX_PMD_INDEX_SIZE;
324 __pte_table_size = RADIX_PTE_TABLE_SIZE;
325 __pmd_table_size = RADIX_PMD_TABLE_SIZE;
326 __pud_table_size = RADIX_PUD_TABLE_SIZE;
327 __pgd_table_size = RADIX_PGD_TABLE_SIZE;
329 __pmd_val_bits = RADIX_PMD_VAL_BITS;
330 __pud_val_bits = RADIX_PUD_VAL_BITS;
331 __pgd_val_bits = RADIX_PGD_VAL_BITS;
333 __kernel_virt_start = RADIX_KERN_VIRT_START;
334 __kernel_virt_size = RADIX_KERN_VIRT_SIZE;
335 __vmalloc_start = RADIX_VMALLOC_START;
336 __vmalloc_end = RADIX_VMALLOC_END;
337 vmemmap = (struct page *)RADIX_VMEMMAP_BASE;
338 ioremap_bot = IOREMAP_BASE;
340 * For now radix also use the same frag size
342 __pte_frag_nr = H_PTE_FRAG_NR;
343 __pte_frag_size_shift = H_PTE_FRAG_SIZE_SHIFT;
345 radix_init_page_sizes();
346 if (!firmware_has_feature(FW_FEATURE_LPAR))
347 radix_init_partition_table();
349 radix_init_pgtable();
352 void radix__early_init_mmu_secondary(void)
356 * setup LPCR UPRT based on mmu_features
358 lpcr = mfspr(SPRN_LPCR);
359 mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
361 * update partition table control register, 64 K size.
363 if (!firmware_has_feature(FW_FEATURE_LPAR))
365 __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
368 void radix__setup_initial_memory_limit(phys_addr_t first_memblock_base,
369 phys_addr_t first_memblock_size)
371 /* We don't currently support the first MEMBLOCK not mapping 0
372 * physical on those processors
374 BUG_ON(first_memblock_base != 0);
376 * We limit the allocation that depend on ppc64_rma_size
377 * to first_memblock_size. We also clamp it to 1GB to
378 * avoid some funky things such as RTAS bugs.
380 * On radix config we really don't have a limitation
381 * on real mode access. But keeping it as above works
384 ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000);
386 * Finally limit subsequent allocations. We really don't want
387 * to limit the memblock allocations to rma_size. FIXME!! should
388 * we even limit at all ?
390 memblock_set_current_limit(first_memblock_base + first_memblock_size);
393 #ifdef CONFIG_SPARSEMEM_VMEMMAP
394 int __meminit radix__vmemmap_create_mapping(unsigned long start,
395 unsigned long page_size,
398 /* Create a PTE encoding */
399 unsigned long flags = _PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_KERNEL_RW;
401 BUG_ON(radix__map_kernel_page(start, phys, __pgprot(flags), page_size));
405 #ifdef CONFIG_MEMORY_HOTPLUG
406 void radix__vmemmap_remove_mapping(unsigned long start, unsigned long page_size)
408 /* FIXME!! intel does more. We should free page tables mapping vmemmap ? */
413 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
415 unsigned long radix__pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,
416 pmd_t *pmdp, unsigned long clr,
421 #ifdef CONFIG_DEBUG_VM
422 WARN_ON(!radix__pmd_trans_huge(*pmdp));
423 assert_spin_locked(&mm->page_table_lock);
426 old = radix__pte_update(mm, addr, (pte_t *)pmdp, clr, set, 1);
427 trace_hugepage_update(addr, old, clr, set);
432 pmd_t radix__pmdp_collapse_flush(struct vm_area_struct *vma, unsigned long address,
438 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
439 VM_BUG_ON(radix__pmd_trans_huge(*pmdp));
441 * khugepaged calls this for normal pmd
445 /*FIXME!! Verify whether we need this kick below */
446 kick_all_cpus_sync();
447 flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
452 * For us pgtable_t is pte_t *. Inorder to save the deposisted
453 * page table, we consider the allocated page table as a list
454 * head. On withdraw we need to make sure we zero out the used
455 * list_head memory area.
457 void radix__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
460 struct list_head *lh = (struct list_head *) pgtable;
462 assert_spin_locked(pmd_lockptr(mm, pmdp));
465 if (!pmd_huge_pte(mm, pmdp))
468 list_add(lh, (struct list_head *) pmd_huge_pte(mm, pmdp));
469 pmd_huge_pte(mm, pmdp) = pgtable;
472 pgtable_t radix__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
476 struct list_head *lh;
478 assert_spin_locked(pmd_lockptr(mm, pmdp));
481 pgtable = pmd_huge_pte(mm, pmdp);
482 lh = (struct list_head *) pgtable;
484 pmd_huge_pte(mm, pmdp) = NULL;
486 pmd_huge_pte(mm, pmdp) = (pgtable_t) lh->next;
489 ptep = (pte_t *) pgtable;
497 pmd_t radix__pmdp_huge_get_and_clear(struct mm_struct *mm,
498 unsigned long addr, pmd_t *pmdp)
503 old = radix__pmd_hugepage_update(mm, addr, pmdp, ~0UL, 0);
504 old_pmd = __pmd(old);
506 * Serialize against find_linux_pte_or_hugepte which does lock-less
507 * lookup in page tables with local interrupts disabled. For huge pages
508 * it casts pmd_t to pte_t. Since format of pte_t is different from
509 * pmd_t we want to prevent transit from pmd pointing to page table
510 * to pmd pointing to huge page (and back) while interrupts are disabled.
511 * We clear pmd to possibly replace it with page table pointer in
512 * different code paths. So make sure we wait for the parallel
513 * find_linux_pte_or_hugepage to finish.
515 kick_all_cpus_sync();
519 int radix__has_transparent_hugepage(void)
521 /* For radix 2M at PMD level means thp */
522 if (mmu_psize_defs[MMU_PAGE_2M].shift == PMD_SHIFT)
526 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */