2 * arch/powerpc/platforms/powermac/low_i2c.c
4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 * The linux i2c layer isn't completely suitable for our needs for various
12 * reasons ranging from too late initialisation to semantics not perfectly
13 * matching some requirements of the apple platform functions etc...
15 * This file thus provides a simple low level unified i2c interface for
16 * powermac that covers the various types of i2c busses used in Apple machines.
17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
18 * banging busses found on older chipsets in earlier machines if we ever need
21 * The drivers in this file are synchronous/blocking. In addition, the
22 * keywest one is fairly slow due to the use of msleep instead of interrupts
23 * as the interrupt is currently used by i2c-keywest. In the long run, we
24 * might want to get rid of those high-level interfaces to linux i2c layer
25 * either completely (converting all drivers) or replacing them all with a
26 * single stub driver on top of this one. Once done, the interrupt will be
27 * available for our use.
33 #include <linux/types.h>
34 #include <linux/sched.h>
35 #include <linux/init.h>
36 #include <linux/export.h>
37 #include <linux/adb.h>
38 #include <linux/pmu.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/platform_device.h>
42 #include <linux/interrupt.h>
43 #include <linux/timer.h>
44 #include <linux/mutex.h>
45 #include <linux/i2c.h>
46 #include <linux/slab.h>
47 #include <asm/keylargo.h>
48 #include <asm/uninorth.h>
51 #include <asm/machdep.h>
53 #include <asm/pmac_pfunc.h>
54 #include <asm/pmac_low_i2c.h>
57 #define DBG(x...) do {\
58 printk(KERN_DEBUG "low_i2c:" x); \
65 #define DBG_LOW(x...) do {\
66 printk(KERN_DEBUG "low_i2c:" x); \
73 static int pmac_i2c_force_poll = 1;
76 * A bus structure. Each bus in the system has such a structure associated.
80 struct list_head link;
81 struct device_node *controller;
82 struct device_node *busnode;
85 struct i2c_adapter adapter;
87 int channel; /* some hosts have multiple */
88 int mode; /* current mode */
91 int polled; /* open mode */
92 struct platform_device *platform_dev;
93 struct lock_class_key lock_key;
96 int (*open)(struct pmac_i2c_bus *bus);
97 void (*close)(struct pmac_i2c_bus *bus);
98 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
99 u32 subaddr, u8 *data, int len);
102 static LIST_HEAD(pmac_i2c_busses);
105 * Keywest implementation
108 struct pmac_i2c_host_kw
110 struct mutex mutex; /* Access mutex for use by
112 void __iomem *base; /* register base address */
113 int bsteps; /* register stepping */
114 int speed; /* speed */
122 struct completion complete;
124 struct timer_list timeout_timer;
127 /* Register indices */
139 /* The Tumbler audio equalizer can be really slow sometimes */
140 #define KW_POLL_TIMEOUT (2*HZ)
143 #define KW_I2C_MODE_100KHZ 0x00
144 #define KW_I2C_MODE_50KHZ 0x01
145 #define KW_I2C_MODE_25KHZ 0x02
146 #define KW_I2C_MODE_DUMB 0x00
147 #define KW_I2C_MODE_STANDARD 0x04
148 #define KW_I2C_MODE_STANDARDSUB 0x08
149 #define KW_I2C_MODE_COMBINED 0x0C
150 #define KW_I2C_MODE_MODE_MASK 0x0C
151 #define KW_I2C_MODE_CHAN_MASK 0xF0
153 /* Control register */
154 #define KW_I2C_CTL_AAK 0x01
155 #define KW_I2C_CTL_XADDR 0x02
156 #define KW_I2C_CTL_STOP 0x04
157 #define KW_I2C_CTL_START 0x08
159 /* Status register */
160 #define KW_I2C_STAT_BUSY 0x01
161 #define KW_I2C_STAT_LAST_AAK 0x02
162 #define KW_I2C_STAT_LAST_RW 0x04
163 #define KW_I2C_STAT_SDA 0x08
164 #define KW_I2C_STAT_SCL 0x10
166 /* IER & ISR registers */
167 #define KW_I2C_IRQ_DATA 0x01
168 #define KW_I2C_IRQ_ADDR 0x02
169 #define KW_I2C_IRQ_STOP 0x04
170 #define KW_I2C_IRQ_START 0x08
171 #define KW_I2C_IRQ_MASK 0x0F
173 /* State machine states */
183 #define WRONG_STATE(name) do {\
184 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
186 name, __kw_state_names[host->state], isr); \
189 static const char *__kw_state_names[] = {
198 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
200 return readb(host->base + (((unsigned int)reg) << host->bsteps));
203 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
206 writeb(val, host->base + (((unsigned)reg) << host->bsteps));
207 (void)__kw_read_reg(host, reg_subaddr);
210 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
211 #define kw_read_reg(reg) __kw_read_reg(host, reg)
213 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
218 for (i = 0; i < 1000; i++) {
219 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
223 /* This code is used with the timebase frozen, we cannot rely
224 * on udelay nor schedule when in polled mode !
225 * For now, just use a bogus loop....
228 for (j = 1; j < 100000; j++)
236 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
238 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
239 host->state = state_stop;
240 host->result = result;
244 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
248 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
249 __kw_state_names[host->state], isr);
251 if (host->state == state_idle) {
252 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
253 " interrupt, ignoring\n");
254 kw_write_reg(reg_isr, isr);
259 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
261 if (host->state != state_stop) {
262 kw_i2c_do_stop(host, -EIO);
265 ack = kw_read_reg(reg_status);
266 if (ack & KW_I2C_STAT_BUSY)
267 kw_write_reg(reg_status, 0);
268 host->state = state_idle;
269 kw_write_reg(reg_ier, 0x00);
271 complete(&host->complete);
275 if (isr & KW_I2C_IRQ_ADDR) {
276 ack = kw_read_reg(reg_status);
277 if (host->state != state_addr) {
278 WRONG_STATE("KW_I2C_IRQ_ADDR");
279 kw_i2c_do_stop(host, -EIO);
281 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
282 host->result = -ENXIO;
283 host->state = state_stop;
284 DBG_LOW("KW: NAK on address\n");
287 kw_i2c_do_stop(host, 0);
289 host->state = state_read;
291 kw_write_reg(reg_control,
294 host->state = state_write;
295 kw_write_reg(reg_data, *(host->data++));
299 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
302 if (isr & KW_I2C_IRQ_DATA) {
303 if (host->state == state_read) {
304 *(host->data++) = kw_read_reg(reg_data);
306 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
308 host->state = state_stop;
309 else if (host->len == 1)
310 kw_write_reg(reg_control, 0);
311 } else if (host->state == state_write) {
312 ack = kw_read_reg(reg_status);
313 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
314 DBG_LOW("KW: nack on data write\n");
315 host->result = -EFBIG;
316 host->state = state_stop;
317 } else if (host->len) {
318 kw_write_reg(reg_data, *(host->data++));
321 kw_i2c_do_stop(host, 0);
323 WRONG_STATE("KW_I2C_IRQ_DATA");
324 if (host->state != state_stop)
325 kw_i2c_do_stop(host, -EIO);
327 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
330 if (isr & KW_I2C_IRQ_STOP) {
331 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
332 if (host->state != state_stop) {
333 WRONG_STATE("KW_I2C_IRQ_STOP");
336 host->state = state_idle;
338 complete(&host->complete);
341 /* Below should only happen in manual mode which we don't use ... */
342 if (isr & KW_I2C_IRQ_START)
343 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
347 /* Interrupt handler */
348 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
350 struct pmac_i2c_host_kw *host = dev_id;
353 spin_lock_irqsave(&host->lock, flags);
354 del_timer(&host->timeout_timer);
355 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
356 if (host->state != state_idle) {
357 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
358 add_timer(&host->timeout_timer);
360 spin_unlock_irqrestore(&host->lock, flags);
364 static void kw_i2c_timeout(struct timer_list *t)
366 struct pmac_i2c_host_kw *host = from_timer(host, t, timeout_timer);
369 spin_lock_irqsave(&host->lock, flags);
372 * If the timer is pending, that means we raced with the
373 * irq, in which case we just return
375 if (timer_pending(&host->timeout_timer))
378 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
379 if (host->state != state_idle) {
380 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
381 add_timer(&host->timeout_timer);
384 spin_unlock_irqrestore(&host->lock, flags);
387 static int kw_i2c_open(struct pmac_i2c_bus *bus)
389 struct pmac_i2c_host_kw *host = bus->hostdata;
390 mutex_lock(&host->mutex);
394 static void kw_i2c_close(struct pmac_i2c_bus *bus)
396 struct pmac_i2c_host_kw *host = bus->hostdata;
397 mutex_unlock(&host->mutex);
400 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
401 u32 subaddr, u8 *data, int len)
403 struct pmac_i2c_host_kw *host = bus->hostdata;
404 u8 mode_reg = host->speed;
405 int use_irq = host->irq && !bus->polled;
407 /* Setup mode & subaddress if any */
409 case pmac_i2c_mode_dumb:
411 case pmac_i2c_mode_std:
412 mode_reg |= KW_I2C_MODE_STANDARD;
416 case pmac_i2c_mode_stdsub:
417 mode_reg |= KW_I2C_MODE_STANDARDSUB;
421 case pmac_i2c_mode_combined:
422 mode_reg |= KW_I2C_MODE_COMBINED;
428 /* Setup channel & clear pending irqs */
429 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
430 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
431 kw_write_reg(reg_status, 0);
433 /* Set up address and r/w bit, strip possible stale bus number from
436 kw_write_reg(reg_addr, addrdir & 0xff);
438 /* Set up the sub address */
439 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
440 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
441 kw_write_reg(reg_subaddr, subaddr);
443 /* Prepare for async operations */
446 host->state = state_addr;
448 host->rw = (addrdir & 1);
449 host->polled = bus->polled;
451 /* Enable interrupt if not using polled mode and interrupt is
455 /* Clear completion */
456 reinit_completion(&host->complete);
457 /* Ack stale interrupts */
458 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
460 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
461 add_timer(&host->timeout_timer);
462 /* Enable emission */
463 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
466 /* Start sending address */
467 kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
469 /* Wait for completion */
471 wait_for_completion(&host->complete);
473 while(host->state != state_idle) {
476 u8 isr = kw_i2c_wait_interrupt(host);
477 spin_lock_irqsave(&host->lock, flags);
478 kw_i2c_handle_interrupt(host, isr);
479 spin_unlock_irqrestore(&host->lock, flags);
483 /* Disable emission */
484 kw_write_reg(reg_ier, 0);
489 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
491 struct pmac_i2c_host_kw *host;
492 const u32 *psteps, *prate, *addrp;
495 host = kzalloc(sizeof(*host), GFP_KERNEL);
497 printk(KERN_ERR "low_i2c: Can't allocate host for %pOF\n",
502 /* Apple is kind enough to provide a valid AAPL,address property
503 * on all i2c keywest nodes so far ... we would have to fallback
504 * to macio parsing if that wasn't the case
506 addrp = of_get_property(np, "AAPL,address", NULL);
508 printk(KERN_ERR "low_i2c: Can't find address for %pOF\n",
513 mutex_init(&host->mutex);
514 init_completion(&host->complete);
515 spin_lock_init(&host->lock);
516 timer_setup(&host->timeout_timer, kw_i2c_timeout, 0);
518 psteps = of_get_property(np, "AAPL,address-step", NULL);
519 steps = psteps ? (*psteps) : 0x10;
520 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
522 /* Select interface rate */
523 host->speed = KW_I2C_MODE_25KHZ;
524 prate = of_get_property(np, "AAPL,i2c-rate", NULL);
525 if (prate) switch(*prate) {
527 host->speed = KW_I2C_MODE_100KHZ;
530 host->speed = KW_I2C_MODE_50KHZ;
533 host->speed = KW_I2C_MODE_25KHZ;
536 host->irq = irq_of_parse_and_map(np, 0);
539 "low_i2c: Failed to map interrupt for %pOF\n",
542 host->base = ioremap((*addrp), 0x1000);
543 if (host->base == NULL) {
544 printk(KERN_ERR "low_i2c: Can't map registers for %pOF\n",
550 /* Make sure IRQ is disabled */
551 kw_write_reg(reg_ier, 0);
553 /* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't
554 * want that interrupt disabled between the 2 passes of driver
555 * suspend or we'll have issues running the pfuncs
557 if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND,
558 "keywest i2c", host))
561 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %pOF\n",
562 *addrp, host->irq, np);
568 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
569 struct device_node *controller,
570 struct device_node *busnode,
573 struct pmac_i2c_bus *bus;
575 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
579 bus->controller = of_node_get(controller);
580 bus->busnode = of_node_get(busnode);
581 bus->type = pmac_i2c_bus_keywest;
582 bus->hostdata = host;
583 bus->channel = channel;
584 bus->mode = pmac_i2c_mode_std;
585 bus->open = kw_i2c_open;
586 bus->close = kw_i2c_close;
587 bus->xfer = kw_i2c_xfer;
588 mutex_init(&bus->mutex);
589 lockdep_set_class(&bus->mutex, &bus->lock_key);
590 if (controller == busnode)
591 bus->flags = pmac_i2c_multibus;
592 list_add(&bus->link, &pmac_i2c_busses);
594 printk(KERN_INFO " channel %d bus %s\n", channel,
595 (controller == busnode) ? "<multibus>" : busnode->full_name);
598 static void __init kw_i2c_probe(void)
600 struct device_node *np, *child, *parent;
602 /* Probe keywest-i2c busses */
603 for_each_compatible_node(np, "i2c","keywest-i2c") {
604 struct pmac_i2c_host_kw *host;
607 /* Found one, init a host structure */
608 host = kw_i2c_host_init(np);
612 /* Now check if we have a multibus setup (old style) or if we
613 * have proper bus nodes. Note that the "new" way (proper bus
614 * nodes) might cause us to not create some busses that are
615 * kept hidden in the device-tree. In the future, we might
616 * want to work around that by creating busses without a node
619 child = of_get_next_child(np, NULL);
620 multibus = !child || strcmp(child->name, "i2c-bus");
623 /* For a multibus setup, we get the bus count based on the
629 parent = of_get_parent(np);
632 chans = parent->name[0] == 'u' ? 2 : 1;
633 for (i = 0; i < chans; i++)
634 kw_i2c_add(host, np, np, i);
637 (child = of_get_next_child(np, child)) != NULL;) {
638 const u32 *reg = of_get_property(child,
642 kw_i2c_add(host, np, child, *reg);
655 #ifdef CONFIG_ADB_PMU
658 * i2c command block to the PMU
671 static void pmu_i2c_complete(struct adb_request *req)
676 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
677 u32 subaddr, u8 *data, int len)
679 struct adb_request *req = bus->hostdata;
680 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
681 struct completion comp;
682 int read = addrdir & 1;
686 /* For now, limit ourselves to 16 bytes transfers */
690 init_completion(&comp);
692 for (retry = 0; retry < 16; retry++) {
693 memset(req, 0, sizeof(struct adb_request));
694 hdr->bus = bus->channel;
698 case pmac_i2c_mode_std:
701 hdr->address = addrdir;
702 hdr->mode = PMU_I2C_MODE_SIMPLE;
704 case pmac_i2c_mode_stdsub:
705 case pmac_i2c_mode_combined:
708 hdr->address = addrdir & 0xfe;
709 hdr->comb_addr = addrdir;
710 hdr->sub_addr = subaddr;
711 if (bus->mode == pmac_i2c_mode_stdsub)
712 hdr->mode = PMU_I2C_MODE_STDSUB;
714 hdr->mode = PMU_I2C_MODE_COMBINED;
720 reinit_completion(&comp);
721 req->data[0] = PMU_I2C_CMD;
722 req->reply[0] = 0xff;
723 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
724 req->done = pmu_i2c_complete;
727 memcpy(hdr->data, data, len);
730 rc = pmu_queue_request(req);
733 wait_for_completion(&comp);
734 if (req->reply[0] == PMU_I2C_STATUS_OK)
738 if (req->reply[0] != PMU_I2C_STATUS_OK)
741 for (retry = 0; retry < 16; retry++) {
742 memset(req, 0, sizeof(struct adb_request));
744 /* I know that looks like a lot, slow as hell, but darwin
745 * does it so let's be on the safe side for now
749 hdr->bus = PMU_I2C_BUS_STATUS;
751 reinit_completion(&comp);
752 req->data[0] = PMU_I2C_CMD;
753 req->reply[0] = 0xff;
755 req->done = pmu_i2c_complete;
757 rc = pmu_queue_request(req);
760 wait_for_completion(&comp);
762 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
764 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
765 int rlen = req->reply_len - 1;
768 printk(KERN_WARNING "low_i2c: PMU returned %d"
769 " bytes, expected %d !\n", rlen, len);
773 memcpy(data, &req->reply[1], len);
780 static void __init pmu_i2c_probe(void)
782 struct pmac_i2c_bus *bus;
783 struct device_node *busnode;
789 /* There might or might not be a "pmu-i2c" node, we use that
790 * or via-pmu itself, whatever we find. I haven't seen a machine
791 * with separate bus nodes, so we assume a multibus setup
793 busnode = of_find_node_by_name(NULL, "pmu-i2c");
795 busnode = of_find_node_by_name(NULL, "via-pmu");
799 printk(KERN_INFO "PMU i2c %pOF\n", busnode);
802 * We add bus 1 and 2 only for now, bus 0 is "special"
804 for (channel = 1; channel <= 2; channel++) {
805 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
806 bus = kzalloc(sz, GFP_KERNEL);
810 bus->controller = busnode;
811 bus->busnode = busnode;
812 bus->type = pmac_i2c_bus_pmu;
813 bus->channel = channel;
814 bus->mode = pmac_i2c_mode_std;
815 bus->hostdata = bus + 1;
816 bus->xfer = pmu_i2c_xfer;
817 mutex_init(&bus->mutex);
818 lockdep_set_class(&bus->mutex, &bus->lock_key);
819 bus->flags = pmac_i2c_multibus;
820 list_add(&bus->link, &pmac_i2c_busses);
822 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
826 #endif /* CONFIG_ADB_PMU */
835 #ifdef CONFIG_PMAC_SMU
837 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
842 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
843 u32 subaddr, u8 *data, int len)
845 struct smu_i2c_cmd *cmd = bus->hostdata;
846 struct completion comp;
847 int read = addrdir & 1;
850 if ((read && len > SMU_I2C_READ_MAX) ||
851 ((!read) && len > SMU_I2C_WRITE_MAX))
854 memset(cmd, 0, sizeof(struct smu_i2c_cmd));
855 cmd->info.bus = bus->channel;
856 cmd->info.devaddr = addrdir;
857 cmd->info.datalen = len;
860 case pmac_i2c_mode_std:
863 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
865 case pmac_i2c_mode_stdsub:
866 case pmac_i2c_mode_combined:
867 if (subsize > 3 || subsize < 1)
869 cmd->info.sublen = subsize;
870 /* that's big-endian only but heh ! */
871 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
873 if (bus->mode == pmac_i2c_mode_stdsub)
874 cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
876 cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
882 memcpy(cmd->info.data, data, len);
884 init_completion(&comp);
885 cmd->done = smu_i2c_complete;
887 rc = smu_queue_i2c(cmd);
890 wait_for_completion(&comp);
894 memcpy(data, cmd->info.data, len);
895 return rc < 0 ? rc : 0;
898 static void __init smu_i2c_probe(void)
900 struct device_node *controller, *busnode;
901 struct pmac_i2c_bus *bus;
908 controller = of_find_node_by_name(NULL, "smu-i2c-control");
909 if (controller == NULL)
910 controller = of_find_node_by_name(NULL, "smu");
911 if (controller == NULL)
914 printk(KERN_INFO "SMU i2c %pOF\n", controller);
916 /* Look for childs, note that they might not be of the right
917 * type as older device trees mix i2c busses and other things
921 (busnode = of_get_next_child(controller, busnode)) != NULL;) {
922 if (strcmp(busnode->type, "i2c") &&
923 strcmp(busnode->type, "i2c-bus"))
925 reg = of_get_property(busnode, "reg", NULL);
929 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
930 bus = kzalloc(sz, GFP_KERNEL);
934 bus->controller = controller;
935 bus->busnode = of_node_get(busnode);
936 bus->type = pmac_i2c_bus_smu;
938 bus->mode = pmac_i2c_mode_std;
939 bus->hostdata = bus + 1;
940 bus->xfer = smu_i2c_xfer;
941 mutex_init(&bus->mutex);
942 lockdep_set_class(&bus->mutex, &bus->lock_key);
944 list_add(&bus->link, &pmac_i2c_busses);
946 printk(KERN_INFO " channel %x bus %pOF\n",
947 bus->channel, busnode);
951 #endif /* CONFIG_PMAC_SMU */
960 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
962 struct device_node *p = of_node_get(node);
963 struct device_node *prev = NULL;
964 struct pmac_i2c_bus *bus;
967 list_for_each_entry(bus, &pmac_i2c_busses, link) {
968 if (p == bus->busnode) {
969 if (prev && bus->flags & pmac_i2c_multibus) {
971 reg = of_get_property(prev, "reg",
975 if (((*reg) >> 8) != bus->channel)
985 p = of_get_parent(p);
989 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
991 u8 pmac_i2c_get_dev_addr(struct device_node *device)
993 const u32 *reg = of_get_property(device, "reg", NULL);
998 return (*reg) & 0xff;
1000 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
1002 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
1004 return bus->controller;
1006 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
1008 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
1010 return bus->busnode;
1012 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1014 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1018 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1020 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1024 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1026 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1028 return bus->channel;
1030 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1033 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1035 return &bus->adapter;
1037 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1039 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1041 struct pmac_i2c_bus *bus;
1043 list_for_each_entry(bus, &pmac_i2c_busses, link)
1044 if (&bus->adapter == adapter)
1048 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1050 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1052 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1056 return (&bus->adapter == adapter);
1058 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1060 int pmac_low_i2c_lock(struct device_node *np)
1062 struct pmac_i2c_bus *bus, *found = NULL;
1064 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1065 if (np == bus->controller) {
1072 return pmac_i2c_open(bus, 0);
1074 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1076 int pmac_low_i2c_unlock(struct device_node *np)
1078 struct pmac_i2c_bus *bus, *found = NULL;
1080 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1081 if (np == bus->controller) {
1088 pmac_i2c_close(bus);
1091 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1094 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1098 mutex_lock(&bus->mutex);
1099 bus->polled = polled || pmac_i2c_force_poll;
1101 bus->mode = pmac_i2c_mode_std;
1102 if (bus->open && (rc = bus->open(bus)) != 0) {
1104 mutex_unlock(&bus->mutex);
1109 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1111 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1113 WARN_ON(!bus->opened);
1117 mutex_unlock(&bus->mutex);
1119 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1121 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1123 WARN_ON(!bus->opened);
1125 /* Report me if you see the error below as there might be a new
1126 * "combined4" mode that I need to implement for the SMU bus
1128 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1129 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1130 " bus %pOF !\n", mode, bus->busnode);
1137 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1139 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1140 u32 subaddr, u8 *data, int len)
1144 WARN_ON(!bus->opened);
1146 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1147 " %d bytes, bus %pOF\n", bus->channel, addrdir, bus->mode, subsize,
1148 subaddr, len, bus->busnode);
1150 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1154 DBG("xfer error %d\n", rc);
1158 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1160 /* some quirks for platform function decoding */
1162 pmac_i2c_quirk_invmask = 0x00000001u,
1163 pmac_i2c_quirk_skip = 0x00000002u,
1166 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1169 struct pmac_i2c_bus *bus;
1170 struct device_node *np;
1171 static struct whitelist_ent {
1176 /* XXX Study device-tree's & apple drivers are get the quirks
1179 /* Workaround: It seems that running the clockspreading
1180 * properties on the eMac will cause lockups during boot.
1181 * The machine seems to work fine without that. So for now,
1182 * let's make sure i2c-hwclock doesn't match about "imic"
1183 * clocks and we'll figure out if we really need to do
1184 * something special about those later.
1186 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1187 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1188 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1189 { "i2c-cpu-voltage", NULL, 0},
1190 { "temp-monitor", NULL, 0 },
1191 { "supply-monitor", NULL, 0 },
1195 /* Only some devices need to have platform functions instanciated
1196 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1197 * on Xserve, if we ever do a driver for them, will use their own
1198 * platform function instance
1200 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1202 (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1203 struct whitelist_ent *p;
1204 /* If multibus, check if device is on that bus */
1205 if (bus->flags & pmac_i2c_multibus)
1206 if (bus != pmac_i2c_find_bus(np))
1208 for (p = whitelist; p->name != NULL; p++) {
1209 if (strcmp(np->name, p->name))
1211 if (p->compatible &&
1212 !of_device_is_compatible(np, p->compatible))
1214 if (p->quirks & pmac_i2c_quirk_skip)
1216 callback(np, p->quirks);
1223 #define MAX_I2C_DATA 64
1225 struct pmac_i2c_pf_inst
1227 struct pmac_i2c_bus *bus;
1229 u8 buffer[MAX_I2C_DATA];
1230 u8 scratch[MAX_I2C_DATA];
1235 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1237 struct pmac_i2c_pf_inst *inst;
1238 struct pmac_i2c_bus *bus;
1240 bus = pmac_i2c_find_bus(func->node);
1242 printk(KERN_ERR "low_i2c: Can't find bus for %pOF (pfunc)\n",
1246 if (pmac_i2c_open(bus, 0)) {
1247 printk(KERN_ERR "low_i2c: Can't open i2c bus for %pOF (pfunc)\n",
1252 /* XXX might need GFP_ATOMIC when called during the suspend process,
1253 * but then, there are already lots of issues with suspending when
1254 * near OOM that need to be resolved, the allocator itself should
1255 * probably make GFP_NOIO implicit during suspend
1257 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1259 pmac_i2c_close(bus);
1263 inst->addr = pmac_i2c_get_dev_addr(func->node);
1264 inst->quirks = (int)(long)func->driver_data;
1268 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1270 struct pmac_i2c_pf_inst *inst = instdata;
1274 pmac_i2c_close(inst->bus);
1278 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1280 struct pmac_i2c_pf_inst *inst = instdata;
1283 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1287 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1289 struct pmac_i2c_pf_inst *inst = instdata;
1291 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1295 /* This function is used to do the masking & OR'ing for the "rmw" type
1296 * callbacks. Ze should apply the mask and OR in the values in the
1297 * buffer before writing back. The problem is that it seems that
1298 * various darwin drivers implement the mask/or differently, thus
1299 * we need to check the quirks first
1301 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1302 u32 len, const u8 *mask, const u8 *val)
1306 if (inst->quirks & pmac_i2c_quirk_invmask) {
1307 for (i = 0; i < len; i ++)
1308 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1310 for (i = 0; i < len; i ++)
1311 inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1312 | (val[i] & mask[i]);
1316 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1317 u32 totallen, const u8 *maskdata,
1318 const u8 *valuedata)
1320 struct pmac_i2c_pf_inst *inst = instdata;
1322 if (masklen > inst->bytes || valuelen > inst->bytes ||
1323 totallen > inst->bytes || valuelen > masklen)
1326 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1328 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1329 inst->scratch, totallen);
1332 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1334 struct pmac_i2c_pf_inst *inst = instdata;
1337 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1341 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1344 struct pmac_i2c_pf_inst *inst = instdata;
1346 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1347 subaddr, (u8 *)data, len);
1350 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1352 struct pmac_i2c_pf_inst *inst = instdata;
1354 return pmac_i2c_setmode(inst->bus, mode);
1357 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1358 u32 valuelen, u32 totallen, const u8 *maskdata,
1359 const u8 *valuedata)
1361 struct pmac_i2c_pf_inst *inst = instdata;
1363 if (masklen > inst->bytes || valuelen > inst->bytes ||
1364 totallen > inst->bytes || valuelen > masklen)
1367 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1369 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1370 subaddr, inst->scratch, totallen);
1373 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1375 const u8 *valuedata)
1377 struct pmac_i2c_pf_inst *inst = instdata;
1380 /* Get return value pointer, it's assumed to be a u32 */
1381 if (!args || !args->count || !args->u[0].p)
1385 if (len > inst->bytes)
1388 for (i = 0, match = 1; match && i < len; i ++)
1389 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1391 *args->u[0].p = match;
1395 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1397 msleep((duration + 999) / 1000);
1402 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1403 .begin = pmac_i2c_do_begin,
1404 .end = pmac_i2c_do_end,
1405 .read_i2c = pmac_i2c_do_read,
1406 .write_i2c = pmac_i2c_do_write,
1407 .rmw_i2c = pmac_i2c_do_rmw,
1408 .read_i2c_sub = pmac_i2c_do_read_sub,
1409 .write_i2c_sub = pmac_i2c_do_write_sub,
1410 .rmw_i2c_sub = pmac_i2c_do_rmw_sub,
1411 .set_i2c_mode = pmac_i2c_do_set_mode,
1412 .mask_and_compare = pmac_i2c_do_mask_and_comp,
1413 .delay = pmac_i2c_do_delay,
1416 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1418 DBG("dev_create(%pOF)\n", np);
1420 pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1421 (void *)(long)quirks);
1424 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1426 DBG("dev_create(%pOF)\n", np);
1428 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1431 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1433 DBG("dev_suspend(%pOF)\n", np);
1434 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1437 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1439 DBG("dev_resume(%pOF)\n", np);
1440 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1443 void pmac_pfunc_i2c_suspend(void)
1445 pmac_i2c_devscan(pmac_i2c_dev_suspend);
1448 void pmac_pfunc_i2c_resume(void)
1450 pmac_i2c_devscan(pmac_i2c_dev_resume);
1454 * Initialize us: probe all i2c busses on the machine, instantiate
1455 * busses and platform functions as needed.
1457 /* This is non-static as it might be called early by smp code */
1458 int __init pmac_i2c_init(void)
1460 static int i2c_inited;
1466 /* Probe keywest-i2c busses */
1469 #ifdef CONFIG_ADB_PMU
1470 /* Probe PMU i2c busses */
1474 #ifdef CONFIG_PMAC_SMU
1475 /* Probe SMU i2c busses */
1479 /* Now add plaform functions for some known devices */
1480 pmac_i2c_devscan(pmac_i2c_dev_create);
1484 machine_arch_initcall(powermac, pmac_i2c_init);
1486 /* Since pmac_i2c_init can be called too early for the platform device
1487 * registration, we need to do it at a later time. In our case, subsys
1488 * happens to fit well, though I agree it's a bit of a hack...
1490 static int __init pmac_i2c_create_platform_devices(void)
1492 struct pmac_i2c_bus *bus;
1495 /* In the case where we are initialized from smp_init(), we must
1496 * not use the timer (and thus the irq). It's safe from now on
1499 pmac_i2c_force_poll = 0;
1501 /* Create platform devices */
1502 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1504 platform_device_alloc("i2c-powermac", i++);
1505 if (bus->platform_dev == NULL)
1507 bus->platform_dev->dev.platform_data = bus;
1508 bus->platform_dev->dev.of_node = bus->busnode;
1509 platform_device_add(bus->platform_dev);
1512 /* Now call platform "init" functions */
1513 pmac_i2c_devscan(pmac_i2c_dev_init);
1517 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);