arch/powerpc/platforms/pseries/setup.c

   1 /*
   2  *  64-bit pSeries and RS/6000 setup code.
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  *  Modified by PPC64 Team, IBM Corp
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 /*
  16  * bootup setup stuff..
  17  */
  18
  19 #include <linux/cpu.h>
  20 #include <linux/errno.h>
  21 #include <linux/sched.h>
  22 #include <linux/kernel.h>
  23 #include <linux/mm.h>
  24 #include <linux/stddef.h>
  25 #include <linux/unistd.h>
  26 #include <linux/user.h>
  27 #include <linux/tty.h>
  28 #include <linux/major.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/reboot.h>
  31 #include <linux/init.h>
  32 #include <linux/ioport.h>
  33 #include <linux/console.h>
  34 #include <linux/pci.h>
  35 #include <linux/utsname.h>
  36 #include <linux/adb.h>
  37 #include <linux/export.h>
  38 #include <linux/delay.h>
  39 #include <linux/irq.h>
  40 #include <linux/seq_file.h>
  41 #include <linux/root_dev.h>
  42 #include <linux/of.h>
  43 #include <linux/of_pci.h>
  44
  45 #include <asm/mmu.h>
  46 #include <asm/processor.h>
  47 #include <asm/io.h>
  48 #include <asm/pgtable.h>
  49 #include <asm/prom.h>
  50 #include <asm/rtas.h>
  51 #include <asm/pci-bridge.h>
  52 #include <asm/iommu.h>
  53 #include <asm/dma.h>
  54 #include <asm/machdep.h>
  55 #include <asm/irq.h>
  56 #include <asm/time.h>
  57 #include <asm/nvram.h>
  58 #include <asm/pmc.h>
  59 #include <asm/xics.h>
  60 #include <asm/xive.h>
  61 #include <asm/ppc-pci.h>
  62 #include <asm/i8259.h>
  63 #include <asm/udbg.h>
  64 #include <asm/smp.h>
  65 #include <asm/firmware.h>
  66 #include <asm/eeh.h>
  67 #include <asm/reg.h>
  68 #include <asm/plpar_wrappers.h>
  69 #include <asm/kexec.h>
  70 #include <asm/isa-bridge.h>
  71 #include <asm/security_features.h>
  72
  73 #include "pseries.h"
  74
  75 int CMO_PrPSP = -1;
  76 int CMO_SecPSP = -1;
  77 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
  78 EXPORT_SYMBOL(CMO_PageSize);
  79
  80 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
  81
  82 static void pSeries_show_cpuinfo(struct seq_file *m)
  83 {
  84         struct device_node *root;
  85         const char *model = "";
  86
  87         root = of_find_node_by_path("/");
  88         if (root)
  89                 model = of_get_property(root, "model", NULL);
  90         seq_printf(m, "machine\t\t: CHRP %s\n", model);
  91         of_node_put(root);
  92         if (radix_enabled())
  93                 seq_printf(m, "MMU\t\t: Radix\n");
  94         else
  95                 seq_printf(m, "MMU\t\t: Hash\n");
  96 }
  97
  98 /* Initialize firmware assisted non-maskable interrupts if
  99  * the firmware supports this feature.
 100  */
 101 static void __init fwnmi_init(void)
 102 {
 103         unsigned long system_reset_addr, machine_check_addr;
 104
 105         int ibm_nmi_register = rtas_token("ibm,nmi-register");
 106         if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
 107                 return;
 108
 109         /* If the kernel's not linked at zero we point the firmware at low
 110          * addresses anyway, and use a trampoline to get to the real code. */
 111         system_reset_addr  = __pa(system_reset_fwnmi) - PHYSICAL_START;
 112         machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
 113
 114         if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
 115                                 machine_check_addr))
 116                 fwnmi_active = 1;
 117 }
 118
 119 static void pseries_8259_cascade(struct irq_desc *desc)
 120 {
 121         struct irq_chip *chip = irq_desc_get_chip(desc);
 122         unsigned int cascade_irq = i8259_irq();
 123
 124         if (cascade_irq)
 125                 generic_handle_irq(cascade_irq);
 126
 127         chip->irq_eoi(&desc->irq_data);
 128 }
 129
 130 static void __init pseries_setup_i8259_cascade(void)
 131 {
 132         struct device_node *np, *old, *found = NULL;
 133         unsigned int cascade;
 134         const u32 *addrp;
 135         unsigned long intack = 0;
 136         int naddr;
 137
 138         for_each_node_by_type(np, "interrupt-controller") {
 139                 if (of_device_is_compatible(np, "chrp,iic")) {
 140                         found = np;
 141                         break;
 142                 }
 143         }
 144
 145         if (found == NULL) {
 146                 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
 147                 return;
 148         }
 149
 150         cascade = irq_of_parse_and_map(found, 0);
 151         if (!cascade) {
 152                 printk(KERN_ERR "pic: failed to map cascade interrupt");
 153                 return;
 154         }
 155         pr_debug("pic: cascade mapped to irq %d\n", cascade);
 156
 157         for (old = of_node_get(found); old != NULL ; old = np) {
 158                 np = of_get_parent(old);
 159                 of_node_put(old);
 160                 if (np == NULL)
 161                         break;
 162                 if (strcmp(np->name, "pci") != 0)
 163                         continue;
 164                 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
 165                 if (addrp == NULL)
 166                         continue;
 167                 naddr = of_n_addr_cells(np);
 168                 intack = addrp[naddr-1];
 169                 if (naddr > 1)
 170                         intack |= ((unsigned long)addrp[naddr-2]) << 32;
 171         }
 172         if (intack)
 173                 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
 174         i8259_init(found, intack);
 175         of_node_put(found);
 176         irq_set_chained_handler(cascade, pseries_8259_cascade);
 177 }
 178
 179 static void __init pseries_init_irq(void)
 180 {
 181         /* Try using a XIVE if available, otherwise use a XICS */
 182         if (!xive_spapr_init()) {
 183                 xics_init();
 184                 pseries_setup_i8259_cascade();
 185         }
 186 }
 187
 188 static void pseries_lpar_enable_pmcs(void)
 189 {
 190         unsigned long set, reset;
 191
 192         set = 1UL << 63;
 193         reset = 0;
 194         plpar_hcall_norets(H_PERFMON, set, reset);
 195 }
 196
 197 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
 198 {
 199         struct of_reconfig_data *rd = data;
 200         struct device_node *parent, *np = rd->dn;
 201         struct pci_dn *pdn;
 202         int err = NOTIFY_OK;
 203
 204         switch (action) {
 205         case OF_RECONFIG_ATTACH_NODE:
 206                 parent = of_get_parent(np);
 207                 pdn = parent ? PCI_DN(parent) : NULL;
 208                 if (pdn)
 209                         pci_add_device_node_info(pdn->phb, np);
 210
 211                 of_node_put(parent);
 212                 break;
 213         case OF_RECONFIG_DETACH_NODE:
 214                 pdn = PCI_DN(np);
 215                 if (pdn)
 216                         list_del(&pdn->list);
 217                 break;
 218         default:
 219                 err = NOTIFY_DONE;
 220                 break;
 221         }
 222         return err;
 223 }
 224
 225 static struct notifier_block pci_dn_reconfig_nb = {
 226         .notifier_call = pci_dn_reconfig_notifier,
 227 };
 228
 229 struct kmem_cache *dtl_cache;
 230
 231 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
 232 /*
 233  * Allocate space for the dispatch trace log for all possible cpus
 234  * and register the buffers with the hypervisor.  This is used for
 235  * computing time stolen by the hypervisor.
 236  */
 237 static int alloc_dispatch_logs(void)
 238 {
 239         int cpu, ret;
 240         struct paca_struct *pp;
 241         struct dtl_entry *dtl;
 242
 243         if (!firmware_has_feature(FW_FEATURE_SPLPAR))
 244                 return 0;
 245
 246         if (!dtl_cache)
 247                 return 0;
 248
 249         for_each_possible_cpu(cpu) {
 250                 pp = paca_ptrs[cpu];
 251                 dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
 252                 if (!dtl) {
 253                         pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
 254                                 cpu);
 255                         pr_warn("Stolen time statistics will be unreliable\n");
 256                         break;
 257                 }
 258
 259                 pp->dtl_ridx = 0;
 260                 pp->dispatch_log = dtl;
 261                 pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
 262                 pp->dtl_curr = dtl;
 263         }
 264
 265         /* Register the DTL for the current (boot) cpu */
 266         dtl = get_paca()->dispatch_log;
 267         get_paca()->dtl_ridx = 0;
 268         get_paca()->dtl_curr = dtl;
 269         get_paca()->lppaca_ptr->dtl_idx = 0;
 270
 271         /* hypervisor reads buffer length from this field */
 272         dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
 273         ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
 274         if (ret)
 275                 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
 276                        "with %d\n", smp_processor_id(),
 277                        hard_smp_processor_id(), ret);
 278         get_paca()->lppaca_ptr->dtl_enable_mask = 2;
 279
 280         return 0;
 281 }
 282 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 283 static inline int alloc_dispatch_logs(void)
 284 {
 285         return 0;
 286 }
 287 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 288
 289 static int alloc_dispatch_log_kmem_cache(void)
 290 {
 291         dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
 292                                                 DISPATCH_LOG_BYTES, 0, NULL);
 293         if (!dtl_cache) {
 294                 pr_warn("Failed to create dispatch trace log buffer cache\n");
 295                 pr_warn("Stolen time statistics will be unreliable\n");
 296                 return 0;
 297         }
 298
 299         return alloc_dispatch_logs();
 300 }
 301 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
 302
 303 static void pseries_lpar_idle(void)
 304 {
 305         /*
 306          * Default handler to go into low thread priority and possibly
 307          * low power mode by ceding processor to hypervisor
 308          */
 309
 310         /* Indicate to hypervisor that we are idle. */
 311         get_lppaca()->idle = 1;
 312
 313         /*
 314          * Yield the processor to the hypervisor.  We return if
 315          * an external interrupt occurs (which are driven prior
 316          * to returning here) or if a prod occurs from another
 317          * processor. When returning here, external interrupts
 318          * are enabled.
 319          */
 320         cede_processor();
 321
 322         get_lppaca()->idle = 0;
 323 }
 324
 325 /*
 326  * Enable relocation on during exceptions. This has partition wide scope and
 327  * may take a while to complete, if it takes longer than one second we will
 328  * just give up rather than wasting any more time on this - if that turns out
 329  * to ever be a problem in practice we can move this into a kernel thread to
 330  * finish off the process later in boot.
 331  */
 332 void pseries_enable_reloc_on_exc(void)
 333 {
 334         long rc;
 335         unsigned int delay, total_delay = 0;
 336
 337         while (1) {
 338                 rc = enable_reloc_on_exceptions();
 339                 if (!H_IS_LONG_BUSY(rc)) {
 340                         if (rc == H_P2) {
 341                                 pr_info("Relocation on exceptions not"
 342                                         " supported\n");
 343                         } else if (rc != H_SUCCESS) {
 344                                 pr_warn("Unable to enable relocation"
 345                                         " on exceptions: %ld\n", rc);
 346                         }
 347                         break;
 348                 }
 349
 350                 delay = get_longbusy_msecs(rc);
 351                 total_delay += delay;
 352                 if (total_delay > 1000) {
 353                         pr_warn("Warning: Giving up waiting to enable "
 354                                 "relocation on exceptions (%u msec)!\n",
 355                                 total_delay);
 356                         return;
 357                 }
 358
 359                 mdelay(delay);
 360         }
 361 }
 362 EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
 363
 364 void pseries_disable_reloc_on_exc(void)
 365 {
 366         long rc;
 367
 368         while (1) {
 369                 rc = disable_reloc_on_exceptions();
 370                 if (!H_IS_LONG_BUSY(rc))
 371                         break;
 372                 mdelay(get_longbusy_msecs(rc));
 373         }
 374         if (rc != H_SUCCESS)
 375                 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n",
 376                         rc);
 377 }
 378 EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
 379
 380 #ifdef CONFIG_KEXEC_CORE
 381 static void pSeries_machine_kexec(struct kimage *image)
 382 {
 383         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 384                 pseries_disable_reloc_on_exc();
 385
 386         default_machine_kexec(image);
 387 }
 388 #endif
 389
 390 #ifdef __LITTLE_ENDIAN__
 391 void pseries_big_endian_exceptions(void)
 392 {
 393         long rc;
 394
 395         while (1) {
 396                 rc = enable_big_endian_exceptions();
 397                 if (!H_IS_LONG_BUSY(rc))
 398                         break;
 399                 mdelay(get_longbusy_msecs(rc));
 400         }
 401
 402         /*
 403          * At this point it is unlikely panic() will get anything
 404          * out to the user, since this is called very late in kexec
 405          * but at least this will stop us from continuing on further
 406          * and creating an even more difficult to debug situation.
 407          *
 408          * There is a known problem when kdump'ing, if cpus are offline
 409          * the above call will fail. Rather than panicking again, keep
 410          * going and hope the kdump kernel is also little endian, which
 411          * it usually is.
 412          */
 413         if (rc && !kdump_in_progress())
 414                 panic("Could not enable big endian exceptions");
 415 }
 416
 417 void pseries_little_endian_exceptions(void)
 418 {
 419         long rc;
 420
 421         while (1) {
 422                 rc = enable_little_endian_exceptions();
 423                 if (!H_IS_LONG_BUSY(rc))
 424                         break;
 425                 mdelay(get_longbusy_msecs(rc));
 426         }
 427         if (rc) {
 428                 ppc_md.progress("H_SET_MODE LE exception fail", 0);
 429                 panic("Could not enable little endian exceptions");
 430         }
 431 }
 432 #endif
 433
 434 static void __init find_and_init_phbs(void)
 435 {
 436         struct device_node *node;
 437         struct pci_controller *phb;
 438         struct device_node *root = of_find_node_by_path("/");
 439
 440         for_each_child_of_node(root, node) {
 441                 if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
 442                                            strcmp(node->type, "pciex") != 0))
 443                         continue;
 444
 445                 phb = pcibios_alloc_controller(node);
 446                 if (!phb)
 447                         continue;
 448                 rtas_setup_phb(phb);
 449                 pci_process_bridge_OF_ranges(phb, node, 0);
 450                 isa_bridge_find_early(phb);
 451                 phb->controller_ops = pseries_pci_controller_ops;
 452         }
 453
 454         of_node_put(root);
 455
 456         /*
 457          * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
 458          * in chosen.
 459          */
 460         of_pci_check_probe_only();
 461 }
 462
 463 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
 464 {
 465         /*
 466          * The features below are disabled by default, so we instead look to see
 467          * if firmware has *enabled* them, and set them if so.
 468          */
 469         if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
 470                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
 471
 472         if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
 473                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
 474
 475         if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
 476                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
 477
 478         if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
 479                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
 480
 481         if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
 482                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
 483
 484         if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
 485                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
 486
 487         /*
 488          * The features below are enabled by default, so we instead look to see
 489          * if firmware has *disabled* them, and clear them if so.
 490          */
 491         if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
 492                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
 493
 494         if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
 495                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
 496
 497         if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
 498                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 499 }
 500
 501 void pseries_setup_rfi_flush(void)
 502 {
 503         struct h_cpu_char_result result;
 504         enum l1d_flush_type types;
 505         bool enable;
 506         long rc;
 507
 508         /*
 509          * Set features to the defaults assumed by init_cpu_char_feature_flags()
 510          * so it can set/clear again any features that might have changed after
 511          * migration, and in case the hypercall fails and it is not even called.
 512          */
 513         powerpc_security_features = SEC_FTR_DEFAULT;
 514
 515         rc = plpar_get_cpu_characteristics(&result);
 516         if (rc == H_SUCCESS)
 517                 init_cpu_char_feature_flags(&result);
 518
 519         /*
 520          * We're the guest so this doesn't apply to us, clear it to simplify
 521          * handling of it elsewhere.
 522          */
 523         security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
 524
 525         types = L1D_FLUSH_FALLBACK;
 526
 527         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 528                 types |= L1D_FLUSH_MTTRIG;
 529
 530         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 531                 types |= L1D_FLUSH_ORI;
 532
 533         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 534                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
 535
 536         setup_rfi_flush(types, enable);
 537 }
 538
 539 #ifdef CONFIG_PCI_IOV
 540 enum rtas_iov_fw_value_map {
 541         NUM_RES_PROPERTY  = 0, /* Number of Resources */
 542         LOW_INT           = 1, /* Lowest 32 bits of Address */
 543         START_OF_ENTRIES  = 2, /* Always start of entry */
 544         APERTURE_PROPERTY = 2, /* Start of entry+ to  Aperture Size */
 545         WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */
 546         NEXT_ENTRY        = 7  /* Go to next entry on array */
 547 };
 548
 549 enum get_iov_fw_value_index {
 550         BAR_ADDRS     = 1,    /*  Get Bar Address */
 551         APERTURE_SIZE = 2,    /*  Get Aperture Size */
 552         WDW_SIZE      = 3     /*  Get Window Size */
 553 };
 554
 555 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno,
 556                                          enum get_iov_fw_value_index value)
 557 {
 558         const int *indexes;
 559         struct device_node *dn = pci_device_to_OF_node(dev);
 560         int i, num_res, ret = 0;
 561
 562         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 563         if (!indexes)
 564                 return  0;
 565
 566         /*
 567          * First element in the array is the number of Bars
 568          * returned.  Search through the list to find the matching
 569          * bar
 570          */
 571         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 572         if (resno >= num_res)
 573                 return 0; /* or an errror */
 574
 575         i = START_OF_ENTRIES + NEXT_ENTRY * resno;
 576         switch (value) {
 577         case BAR_ADDRS:
 578                 ret = of_read_number(&indexes[i], 2);
 579                 break;
 580         case APERTURE_SIZE:
 581                 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 582                 break;
 583         case WDW_SIZE:
 584                 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 585                 break;
 586         }
 587
 588         return ret;
 589 }
 590
 591 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes)
 592 {
 593         struct resource *res;
 594         resource_size_t base, size;
 595         int i, r, num_res;
 596
 597         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 598         num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS);
 599         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 600              i += NEXT_ENTRY, r++) {
 601                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 602                 base = of_read_number(&indexes[i], 2);
 603                 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 604                 res->flags = pci_parse_of_flags(of_read_number
 605                                                 (&indexes[i + LOW_INT], 1), 0);
 606                 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED);
 607                 res->name = pci_name(dev);
 608                 res->start = base;
 609                 res->end = base + size - 1;
 610         }
 611 }
 612
 613 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes)
 614 {
 615         struct resource *res, *root, *conflict;
 616         resource_size_t base, size;
 617         int i, r, num_res;
 618
 619         /*
 620          * First element in the array is the number of Bars
 621          * returned.  Search through the list to find the matching
 622          * bars assign them from firmware into resources structure.
 623          */
 624         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 625         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 626              i += NEXT_ENTRY, r++) {
 627                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 628                 base = of_read_number(&indexes[i], 2);
 629                 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 630                 res->name = pci_name(dev);
 631                 res->start = base;
 632                 res->end = base + size - 1;
 633                 root = &iomem_resource;
 634                 dev_dbg(&dev->dev,
 635                         "pSeries IOV BAR %d: trying firmware assignment %pR\n",
 636                          r + PCI_IOV_RESOURCES, res);
 637                 conflict = request_resource_conflict(root, res);
 638                 if (conflict) {
 639                         dev_info(&dev->dev,
 640                                  "BAR %d: %pR conflicts with %s %pR\n",
 641                                  r + PCI_IOV_RESOURCES, res,
 642                                  conflict->name, conflict);
 643                         res->flags |= IORESOURCE_UNSET;
 644                 }
 645         }
 646 }
 647
 648 static void pseries_pci_fixup_resources(struct pci_dev *pdev)
 649 {
 650         const int *indexes;
 651         struct device_node *dn = pci_device_to_OF_node(pdev);
 652
 653         /*Firmware must support open sriov otherwise dont configure*/
 654         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 655         if (!indexes)
 656                 return;
 657         /* Assign the addresses from device tree*/
 658         of_pci_set_vf_bar_size(pdev, indexes);
 659 }
 660
 661 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev)
 662 {
 663         const int *indexes;
 664         struct device_node *dn = pci_device_to_OF_node(pdev);
 665
 666         if (!pdev->is_physfn || pdev->is_added)
 667                 return;
 668         /*Firmware must support open sriov otherwise dont configure*/
 669         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 670         if (!indexes)
 671                 return;
 672         /* Assign the addresses from device tree*/
 673         of_pci_parse_iov_addrs(pdev, indexes);
 674 }
 675
 676 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev,
 677                                                           int resno)
 678 {
 679         const __be32 *reg;
 680         struct device_node *dn = pci_device_to_OF_node(pdev);
 681
 682         /*Firmware must support open sriov otherwise report regular alignment*/
 683         reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL);
 684         if (!reg)
 685                 return pci_iov_resource_size(pdev, resno);
 686
 687         if (!pdev->is_physfn)
 688                 return 0;
 689         return pseries_get_iov_fw_value(pdev,
 690                                         resno - PCI_IOV_RESOURCES,
 691                                         APERTURE_SIZE);
 692 }
 693 #endif
 694
 695 static void __init pSeries_setup_arch(void)
 696 {
 697         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 698
 699         /* Discover PIC type and setup ppc_md accordingly */
 700         smp_init_pseries();
 701
 702
 703         /* openpic global configuration register (64-bit format). */
 704         /* openpic Interrupt Source Unit pointer (64-bit format). */
 705         /* python0 facility area (mmio) (64-bit format) REAL address. */
 706
 707         /* init to some ~sane value until calibrate_delay() runs */
 708         loops_per_jiffy = 50000000;
 709
 710         fwnmi_init();
 711
 712         pseries_setup_rfi_flush();
 713
 714         /* By default, only probe PCI (can be overridden by rtas_pci) */
 715         pci_add_flags(PCI_PROBE_ONLY);
 716
 717         /* Find and initialize PCI host bridges */
 718         init_pci_config_tokens();
 719         find_and_init_phbs();
 720         of_reconfig_notifier_register(&pci_dn_reconfig_nb);
 721
 722         pSeries_nvram_init();
 723
 724         if (firmware_has_feature(FW_FEATURE_LPAR)) {
 725                 vpa_init(boot_cpuid);
 726                 ppc_md.power_save = pseries_lpar_idle;
 727                 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
 728 #ifdef CONFIG_PCI_IOV
 729                 ppc_md.pcibios_fixup_resources =
 730                         pseries_pci_fixup_resources;
 731                 ppc_md.pcibios_fixup_sriov =
 732                         pseries_pci_fixup_iov_resources;
 733                 ppc_md.pcibios_iov_resource_alignment =
 734                         pseries_pci_iov_resource_alignment;
 735 #endif
 736         } else {
 737                 /* No special idle routine */
 738                 ppc_md.enable_pmcs = power4_enable_pmcs;
 739         }
 740
 741         ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
 742 }
 743
 744 static void pseries_panic(char *str)
 745 {
 746         panic_flush_kmsg_end();
 747         rtas_os_term(str);
 748 }
 749
 750 static int __init pSeries_init_panel(void)
 751 {
 752         /* Manually leave the kernel version on the panel. */
 753 #ifdef __BIG_ENDIAN__
 754         ppc_md.progress("Linux ppc64\n", 0);
 755 #else
 756         ppc_md.progress("Linux ppc64le\n", 0);
 757 #endif
 758         ppc_md.progress(init_utsname()->version, 0);
 759
 760         return 0;
 761 }
 762 machine_arch_initcall(pseries, pSeries_init_panel);
 763
 764 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
 765 {
 766         return plpar_hcall_norets(H_SET_DABR, dabr);
 767 }
 768
 769 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
 770 {
 771         /* Have to set at least one bit in the DABRX according to PAPR */
 772         if (dabrx == 0 && dabr == 0)
 773                 dabrx = DABRX_USER;
 774         /* PAPR says we can only set kernel and user bits */
 775         dabrx &= DABRX_KERNEL | DABRX_USER;
 776
 777         return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
 778 }
 779
 780 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
 781 {
 782         /* PAPR says we can't set HYP */
 783         dawrx &= ~DAWRX_HYP;
 784
 785         return  plpar_set_watchpoint0(dawr, dawrx);
 786 }
 787
 788 #define CMO_CHARACTERISTICS_TOKEN 44
 789 #define CMO_MAXLENGTH 1026
 790
 791 void pSeries_coalesce_init(void)
 792 {
 793         struct hvcall_mpp_x_data mpp_x_data;
 794
 795         if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
 796                 powerpc_firmware_features |= FW_FEATURE_XCMO;
 797         else
 798                 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
 799 }
 800
 801 /**
 802  * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
 803  * handle that here. (Stolen from parse_system_parameter_string)
 804  */
 805 static void pSeries_cmo_feature_init(void)
 806 {
 807         char *ptr, *key, *value, *end;
 808         int call_status;
 809         int page_order = IOMMU_PAGE_SHIFT_4K;
 810
 811         pr_debug(" -> fw_cmo_feature_init()\n");
 812         spin_lock(&rtas_data_buf_lock);
 813         memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
 814         call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
 815                                 NULL,
 816                                 CMO_CHARACTERISTICS_TOKEN,
 817                                 __pa(rtas_data_buf),
 818                                 RTAS_DATA_BUF_SIZE);
 819
 820         if (call_status != 0) {
 821                 spin_unlock(&rtas_data_buf_lock);
 822                 pr_debug("CMO not available\n");
 823                 pr_debug(" <- fw_cmo_feature_init()\n");
 824                 return;
 825         }
 826
 827         end = rtas_data_buf + CMO_MAXLENGTH - 2;
 828         ptr = rtas_data_buf + 2;        /* step over strlen value */
 829         key = value = ptr;
 830
 831         while (*ptr && (ptr <= end)) {
 832                 /* Separate the key and value by replacing '=' with '\0' and
 833                  * point the value at the string after the '='
 834                  */
 835                 if (ptr[0] == '=') {
 836                         ptr[0] = '\0';
 837                         value = ptr + 1;
 838                 } else if (ptr[0] == '\0' || ptr[0] == ',') {
 839                         /* Terminate the string containing the key/value pair */
 840                         ptr[0] = '\0';
 841
 842                         if (key == value) {
 843                                 pr_debug("Malformed key/value pair\n");
 844                                 /* Never found a '=', end processing */
 845                                 break;
 846                         }
 847
 848                         if (0 == strcmp(key, "CMOPageSize"))
 849                                 page_order = simple_strtol(value, NULL, 10);
 850                         else if (0 == strcmp(key, "PrPSP"))
 851                                 CMO_PrPSP = simple_strtol(value, NULL, 10);
 852                         else if (0 == strcmp(key, "SecPSP"))
 853                                 CMO_SecPSP = simple_strtol(value, NULL, 10);
 854                         value = key = ptr + 1;
 855                 }
 856                 ptr++;
 857         }
 858
 859         /* Page size is returned as the power of 2 of the page size,
 860          * convert to the page size in bytes before returning
 861          */
 862         CMO_PageSize = 1 << page_order;
 863         pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
 864
 865         if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
 866                 pr_info("CMO enabled\n");
 867                 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 868                          CMO_SecPSP);
 869                 powerpc_firmware_features |= FW_FEATURE_CMO;
 870                 pSeries_coalesce_init();
 871         } else
 872                 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 873                          CMO_SecPSP);
 874         spin_unlock(&rtas_data_buf_lock);
 875         pr_debug(" <- fw_cmo_feature_init()\n");
 876 }
 877
 878 /*
 879  * Early initialization.  Relocation is on but do not reference unbolted pages
 880  */
 881 static void __init pseries_init(void)
 882 {
 883         pr_debug(" -> pseries_init()\n");
 884
 885 #ifdef CONFIG_HVC_CONSOLE
 886         if (firmware_has_feature(FW_FEATURE_LPAR))
 887                 hvc_vio_init_early();
 888 #endif
 889         if (firmware_has_feature(FW_FEATURE_XDABR))
 890                 ppc_md.set_dabr = pseries_set_xdabr;
 891         else if (firmware_has_feature(FW_FEATURE_DABR))
 892                 ppc_md.set_dabr = pseries_set_dabr;
 893
 894         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 895                 ppc_md.set_dawr = pseries_set_dawr;
 896
 897         pSeries_cmo_feature_init();
 898         iommu_init_early_pSeries();
 899
 900         pr_debug(" <- pseries_init()\n");
 901 }
 902
 903 /**
 904  * pseries_power_off - tell firmware about how to power off the system.
 905  *
 906  * This function calls either the power-off rtas token in normal cases
 907  * or the ibm,power-off-ups token (if present & requested) in case of
 908  * a power failure. If power-off token is used, power on will only be
 909  * possible with power button press. If ibm,power-off-ups token is used
 910  * it will allow auto poweron after power is restored.
 911  */
 912 static void pseries_power_off(void)
 913 {
 914         int rc;
 915         int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
 916
 917         if (rtas_flash_term_hook)
 918                 rtas_flash_term_hook(SYS_POWER_OFF);
 919
 920         if (rtas_poweron_auto == 0 ||
 921                 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
 922                 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
 923                 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
 924         } else {
 925                 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
 926                 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
 927         }
 928         for (;;);
 929 }
 930
 931 static int __init pSeries_probe(void)
 932 {
 933         const char *dtype = of_get_property(of_root, "device_type", NULL);
 934
 935         if (dtype == NULL)
 936                 return 0;
 937         if (strcmp(dtype, "chrp"))
 938                 return 0;
 939
 940         /* Cell blades firmware claims to be chrp while it's not. Until this
 941          * is fixed, we need to avoid those here.
 942          */
 943         if (of_machine_is_compatible("IBM,CPBW-1.0") ||
 944             of_machine_is_compatible("IBM,CBEA"))
 945                 return 0;
 946
 947         pm_power_off = pseries_power_off;
 948
 949         pr_debug("Machine is%s LPAR !\n",
 950                  (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
 951
 952         pseries_init();
 953
 954         return 1;
 955 }
 956
 957 static int pSeries_pci_probe_mode(struct pci_bus *bus)
 958 {
 959         if (firmware_has_feature(FW_FEATURE_LPAR))
 960                 return PCI_PROBE_DEVTREE;
 961         return PCI_PROBE_NORMAL;
 962 }
 963
 964 struct pci_controller_ops pseries_pci_controller_ops = {
 965         .probe_mode             = pSeries_pci_probe_mode,
 966 };
 967
 968 define_machine(pseries) {
 969         .name                   = "pSeries",
 970         .probe                  = pSeries_probe,
 971         .setup_arch             = pSeries_setup_arch,
 972         .init_IRQ               = pseries_init_irq,
 973         .show_cpuinfo           = pSeries_show_cpuinfo,
 974         .log_error              = pSeries_log_error,
 975         .pcibios_fixup          = pSeries_final_fixup,
 976         .restart                = rtas_restart,
 977         .halt                   = rtas_halt,
 978         .panic                  = pseries_panic,
 979         .get_boot_time          = rtas_get_boot_time,
 980         .get_rtc_time           = rtas_get_rtc_time,
 981         .set_rtc_time           = rtas_set_rtc_time,
 982         .calibrate_decr         = generic_calibrate_decr,
 983         .progress               = rtas_progress,
 984         .system_reset_exception = pSeries_system_reset_exception,
 985         .machine_check_exception = pSeries_machine_check_exception,
 986 #ifdef CONFIG_KEXEC_CORE
 987         .machine_kexec          = pSeries_machine_kexec,
 988         .kexec_cpu_down         = pseries_kexec_cpu_down,
 989 #endif
 990 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 991         .memory_block_size      = pseries_memory_block_size,
 992 #endif
 993 };