3 * Copyright IBM Corp. 1999, 2000
4 * Author(s): Hartmut Penner (hp@de.ibm.com)
5 * Ulrich Weigand (weigand@de.ibm.com)
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Derived from "include/asm-i386/pgtable.h"
11 #ifndef _ASM_S390_PGTABLE_H
12 #define _ASM_S390_PGTABLE_H
15 * The Linux memory management assumes a three-level page table setup. For
16 * s390 31 bit we "fold" the mid level into the top-level page table, so
17 * that we physically have the same two-level page table as the s390 mmu
18 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
19 * the hardware provides (region first and region second tables are not
22 * The "pgd_xxx()" functions are trivial for a folded two-level
23 * setup: the pgd is never bad, and a pmd always exists (as it's folded
26 * This file contains the functions and defines necessary to modify and use
27 * the S390 page table tree.
30 #include <linux/sched.h>
31 #include <linux/mm_types.h>
32 #include <linux/page-flags.h>
36 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
37 extern void paging_init(void);
38 extern void vmem_map_init(void);
41 * The S390 doesn't have any external MMU info: the kernel page
42 * tables contain all the necessary information.
44 #define update_mmu_cache(vma, address, ptep) do { } while (0)
45 #define update_mmu_cache_pmd(vma, address, ptep) do { } while (0)
48 * ZERO_PAGE is a global shared page that is always zero; used
49 * for zero-mapped memory areas etc..
52 extern unsigned long empty_zero_page;
53 extern unsigned long zero_page_mask;
55 #define ZERO_PAGE(vaddr) \
56 (virt_to_page((void *)(empty_zero_page + \
57 (((unsigned long)(vaddr)) &zero_page_mask))))
58 #define __HAVE_COLOR_ZERO_PAGE
60 /* TODO: s390 cannot support io_remap_pfn_range... */
61 #endif /* !__ASSEMBLY__ */
64 * PMD_SHIFT determines the size of the area a second-level page
66 * PGDIR_SHIFT determines what a third-level page table entry can map
71 # define PGDIR_SHIFT 20
72 #else /* CONFIG_64BIT */
75 # define PGDIR_SHIFT 42
76 #endif /* CONFIG_64BIT */
78 #define PMD_SIZE (1UL << PMD_SHIFT)
79 #define PMD_MASK (~(PMD_SIZE-1))
80 #define PUD_SIZE (1UL << PUD_SHIFT)
81 #define PUD_MASK (~(PUD_SIZE-1))
82 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
83 #define PGDIR_MASK (~(PGDIR_SIZE-1))
86 * entries per page directory level: the S390 is two-level, so
87 * we don't really have any PMD directory physically.
88 * for S390 segment-table entries are combined to one PGD
89 * that leads to 1024 pte per pgd
91 #define PTRS_PER_PTE 256
93 #define PTRS_PER_PMD 1
94 #define PTRS_PER_PUD 1
95 #else /* CONFIG_64BIT */
96 #define PTRS_PER_PMD 2048
97 #define PTRS_PER_PUD 2048
98 #endif /* CONFIG_64BIT */
99 #define PTRS_PER_PGD 2048
101 #define FIRST_USER_ADDRESS 0
103 #define pte_ERROR(e) \
104 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
105 #define pmd_ERROR(e) \
106 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
107 #define pud_ERROR(e) \
108 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
109 #define pgd_ERROR(e) \
110 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
114 * The vmalloc and module area will always be on the topmost area of the kernel
115 * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc and modules.
116 * On 64 bit kernels we have a 2GB area at the top of the vmalloc area where
117 * modules will reside. That makes sure that inter module branches always
118 * happen without trampolines and in addition the placement within a 2GB frame
119 * is branch prediction unit friendly.
121 extern unsigned long VMALLOC_START;
122 extern unsigned long VMALLOC_END;
123 extern struct page *vmemmap;
125 #define VMEM_MAX_PHYS ((unsigned long) vmemmap)
128 extern unsigned long MODULES_VADDR;
129 extern unsigned long MODULES_END;
130 #define MODULES_VADDR MODULES_VADDR
131 #define MODULES_END MODULES_END
132 #define MODULES_LEN (1UL << 31)
136 * A 31 bit pagetable entry of S390 has following format:
139 * 00000000001111111111222222222233
140 * 01234567890123456789012345678901
142 * I Page-Invalid Bit: Page is not available for address-translation
143 * P Page-Protection Bit: Store access not possible for page
145 * A 31 bit segmenttable entry of S390 has following format:
146 * | P-table origin | |PTL
148 * 00000000001111111111222222222233
149 * 01234567890123456789012345678901
151 * I Segment-Invalid Bit: Segment is not available for address-translation
152 * C Common-Segment Bit: Segment is not private (PoP 3-30)
153 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
155 * The 31 bit segmenttable origin of S390 has following format:
157 * |S-table origin | | STL |
159 * 00000000001111111111222222222233
160 * 01234567890123456789012345678901
162 * X Space-Switch event:
163 * G Segment-Invalid Bit: *
164 * P Private-Space Bit: Segment is not private (PoP 3-30)
165 * S Storage-Alteration:
166 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
168 * A 64 bit pagetable entry of S390 has following format:
170 * 0000000000111111111122222222223333333333444444444455555555556666
171 * 0123456789012345678901234567890123456789012345678901234567890123
173 * I Page-Invalid Bit: Page is not available for address-translation
174 * P Page-Protection Bit: Store access not possible for page
175 * C Change-bit override: HW is not required to set change bit
177 * A 64 bit segmenttable entry of S390 has following format:
178 * | P-table origin | TT
179 * 0000000000111111111122222222223333333333444444444455555555556666
180 * 0123456789012345678901234567890123456789012345678901234567890123
182 * I Segment-Invalid Bit: Segment is not available for address-translation
183 * C Common-Segment Bit: Segment is not private (PoP 3-30)
184 * P Page-Protection Bit: Store access not possible for page
187 * A 64 bit region table entry of S390 has following format:
188 * | S-table origin | TF TTTL
189 * 0000000000111111111122222222223333333333444444444455555555556666
190 * 0123456789012345678901234567890123456789012345678901234567890123
192 * I Segment-Invalid Bit: Segment is not available for address-translation
197 * The 64 bit regiontable origin of S390 has following format:
198 * | region table origon | DTTL
199 * 0000000000111111111122222222223333333333444444444455555555556666
200 * 0123456789012345678901234567890123456789012345678901234567890123
202 * X Space-Switch event:
203 * G Segment-Invalid Bit:
204 * P Private-Space Bit:
205 * S Storage-Alteration:
209 * A storage key has the following format:
213 * F : fetch protection bit
218 /* Hardware bits in the page table entry */
219 #define _PAGE_CO 0x100 /* HW Change-bit override */
220 #define _PAGE_PROTECT 0x200 /* HW read-only bit */
221 #define _PAGE_INVALID 0x400 /* HW invalid bit */
222 #define _PAGE_LARGE 0x800 /* Bit to mark a large pte */
224 /* Software bits in the page table entry */
225 #define _PAGE_PRESENT 0x001 /* SW pte present bit */
226 #define _PAGE_TYPE 0x002 /* SW pte type bit */
227 #define _PAGE_YOUNG 0x004 /* SW pte young bit */
228 #define _PAGE_DIRTY 0x008 /* SW pte dirty bit */
229 #define _PAGE_READ 0x010 /* SW pte read bit */
230 #define _PAGE_WRITE 0x020 /* SW pte write bit */
231 #define _PAGE_SPECIAL 0x040 /* SW associated with special page */
232 #define _PAGE_UNUSED 0x080 /* SW bit for pgste usage state */
233 #define __HAVE_ARCH_PTE_SPECIAL
235 /* Set of bits not changed in pte_modify */
236 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_CO | \
237 _PAGE_DIRTY | _PAGE_YOUNG)
240 * handle_pte_fault uses pte_present, pte_none and pte_file to find out the
241 * pte type WITHOUT holding the page table lock. The _PAGE_PRESENT bit
242 * is used to distinguish present from not-present ptes. It is changed only
243 * with the page table lock held.
245 * The following table gives the different possible bit combinations for
246 * the pte hardware and software bits in the last 12 bits of a pte:
255 * prot-none, clean, old .11...000001
256 * prot-none, clean, young .11...000101
257 * prot-none, dirty, old .10...001001
258 * prot-none, dirty, young .10...001101
259 * read-only, clean, old .11...010001
260 * read-only, clean, young .01...010101
261 * read-only, dirty, old .11...011001
262 * read-only, dirty, young .01...011101
263 * read-write, clean, old .11...110001
264 * read-write, clean, young .01...110101
265 * read-write, dirty, old .10...111001
266 * read-write, dirty, young .00...111101
268 * pte_present is true for the bit pattern .xx...xxxxx1, (pte & 0x001) == 0x001
269 * pte_none is true for the bit pattern .10...xxxx00, (pte & 0x603) == 0x400
270 * pte_file is true for the bit pattern .11...xxxxx0, (pte & 0x601) == 0x600
271 * pte_swap is true for the bit pattern .10...xxxx10, (pte & 0x603) == 0x402
276 /* Bits in the segment table address-space-control-element */
277 #define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
278 #define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
279 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
280 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
281 #define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
283 /* Bits in the segment table entry */
284 #define _SEGMENT_ENTRY_BITS 0x7fffffffUL /* Valid segment table bits */
285 #define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
286 #define _SEGMENT_ENTRY_PROTECT 0x200 /* page protection bit */
287 #define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
288 #define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
289 #define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
291 #define _SEGMENT_ENTRY_DIRTY 0 /* No sw dirty bit for 31-bit */
292 #define _SEGMENT_ENTRY_YOUNG 0 /* No sw young bit for 31-bit */
293 #define _SEGMENT_ENTRY_READ 0 /* No sw read bit for 31-bit */
294 #define _SEGMENT_ENTRY_WRITE 0 /* No sw write bit for 31-bit */
295 #define _SEGMENT_ENTRY_LARGE 0 /* No large pages for 31-bit */
296 #define _SEGMENT_ENTRY_BITS_LARGE 0
297 #define _SEGMENT_ENTRY_ORIGIN_LARGE 0
299 #define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
300 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
303 * Segment table entry encoding (I = invalid, R = read-only bit):
305 * prot-none ..1...1.....
306 * read-only ..1...0.....
307 * read-write ..0...0.....
311 /* Page status table bits for virtualization */
312 #define PGSTE_ACC_BITS 0xf0000000UL
313 #define PGSTE_FP_BIT 0x08000000UL
314 #define PGSTE_PCL_BIT 0x00800000UL
315 #define PGSTE_HR_BIT 0x00400000UL
316 #define PGSTE_HC_BIT 0x00200000UL
317 #define PGSTE_GR_BIT 0x00040000UL
318 #define PGSTE_GC_BIT 0x00020000UL
319 #define PGSTE_UC_BIT 0x00008000UL /* user dirty (migration) */
320 #define PGSTE_IN_BIT 0x00004000UL /* IPTE notify bit */
322 #else /* CONFIG_64BIT */
324 /* Bits in the segment/region table address-space-control-element */
325 #define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
326 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
327 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
328 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
329 #define _ASCE_REAL_SPACE 0x20 /* real space control */
330 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
331 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
332 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
333 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
334 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
335 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
337 /* Bits in the region table entry */
338 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
339 #define _REGION_ENTRY_PROTECT 0x200 /* region protection bit */
340 #define _REGION_ENTRY_INVALID 0x20 /* invalid region table entry */
341 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
342 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
343 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
344 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
345 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
347 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
348 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INVALID)
349 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
350 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INVALID)
351 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
352 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INVALID)
354 #define _REGION3_ENTRY_LARGE 0x400 /* RTTE-format control, large page */
355 #define _REGION3_ENTRY_RO 0x200 /* page protection bit */
356 #define _REGION3_ENTRY_CO 0x100 /* change-recording override */
358 /* Bits in the segment table entry */
359 #define _SEGMENT_ENTRY_BITS 0xfffffffffffffe33UL
360 #define _SEGMENT_ENTRY_BITS_LARGE 0xfffffffffff0ff33UL
361 #define _SEGMENT_ENTRY_ORIGIN_LARGE ~0xfffffUL /* large page address */
362 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
363 #define _SEGMENT_ENTRY_PROTECT 0x200 /* page protection bit */
364 #define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
366 #define _SEGMENT_ENTRY (0)
367 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
369 #define _SEGMENT_ENTRY_DIRTY 0x2000 /* SW segment dirty bit */
370 #define _SEGMENT_ENTRY_YOUNG 0x1000 /* SW segment young bit */
371 #define _SEGMENT_ENTRY_SPLIT 0x0800 /* THP splitting bit */
372 #define _SEGMENT_ENTRY_LARGE 0x0400 /* STE-format control, large page */
373 #define _SEGMENT_ENTRY_CO 0x0100 /* change-recording override */
374 #define _SEGMENT_ENTRY_READ 0x0002 /* SW segment read bit */
375 #define _SEGMENT_ENTRY_WRITE 0x0001 /* SW segment write bit */
378 * Segment table entry encoding (R = read-only, I = invalid, y = young bit):
380 * prot-none, clean, old 00..1...1...00
381 * prot-none, clean, young 01..1...1...00
382 * prot-none, dirty, old 10..1...1...00
383 * prot-none, dirty, young 11..1...1...00
384 * read-only, clean, old 00..1...1...01
385 * read-only, clean, young 01..1...0...01
386 * read-only, dirty, old 10..1...1...01
387 * read-only, dirty, young 11..1...0...01
388 * read-write, clean, old 00..1...1...11
389 * read-write, clean, young 01..1...0...11
390 * read-write, dirty, old 10..0...1...11
391 * read-write, dirty, young 11..0...0...11
392 * The segment table origin is used to distinguish empty (origin==0) from
393 * read-write, old segment table entries (origin!=0)
396 #define _SEGMENT_ENTRY_SPLIT_BIT 11 /* THP splitting bit number */
398 /* Page status table bits for virtualization */
399 #define PGSTE_ACC_BITS 0xf000000000000000UL
400 #define PGSTE_FP_BIT 0x0800000000000000UL
401 #define PGSTE_PCL_BIT 0x0080000000000000UL
402 #define PGSTE_HR_BIT 0x0040000000000000UL
403 #define PGSTE_HC_BIT 0x0020000000000000UL
404 #define PGSTE_GR_BIT 0x0004000000000000UL
405 #define PGSTE_GC_BIT 0x0002000000000000UL
406 #define PGSTE_UC_BIT 0x0000800000000000UL /* user dirty (migration) */
407 #define PGSTE_IN_BIT 0x0000400000000000UL /* IPTE notify bit */
409 #endif /* CONFIG_64BIT */
411 /* Guest Page State used for virtualization */
412 #define _PGSTE_GPS_ZERO 0x0000000080000000UL
413 #define _PGSTE_GPS_USAGE_MASK 0x0000000003000000UL
414 #define _PGSTE_GPS_USAGE_STABLE 0x0000000000000000UL
415 #define _PGSTE_GPS_USAGE_UNUSED 0x0000000001000000UL
418 * A user page table pointer has the space-switch-event bit, the
419 * private-space-control bit and the storage-alteration-event-control
420 * bit set. A kernel page table pointer doesn't need them.
422 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
426 * Page protection definitions.
428 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_INVALID)
429 #define PAGE_READ __pgprot(_PAGE_PRESENT | _PAGE_READ | \
430 _PAGE_INVALID | _PAGE_PROTECT)
431 #define PAGE_WRITE __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
432 _PAGE_INVALID | _PAGE_PROTECT)
434 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
435 _PAGE_YOUNG | _PAGE_DIRTY)
436 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
437 _PAGE_YOUNG | _PAGE_DIRTY)
438 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_YOUNG | \
442 * On s390 the page table entry has an invalid bit and a read-only bit.
443 * Read permission implies execute permission and write permission
444 * implies read permission.
447 #define __P000 PAGE_NONE
448 #define __P001 PAGE_READ
449 #define __P010 PAGE_READ
450 #define __P011 PAGE_READ
451 #define __P100 PAGE_READ
452 #define __P101 PAGE_READ
453 #define __P110 PAGE_READ
454 #define __P111 PAGE_READ
456 #define __S000 PAGE_NONE
457 #define __S001 PAGE_READ
458 #define __S010 PAGE_WRITE
459 #define __S011 PAGE_WRITE
460 #define __S100 PAGE_READ
461 #define __S101 PAGE_READ
462 #define __S110 PAGE_WRITE
463 #define __S111 PAGE_WRITE
466 * Segment entry (large page) protection definitions.
468 #define SEGMENT_NONE __pgprot(_SEGMENT_ENTRY_INVALID | \
469 _SEGMENT_ENTRY_PROTECT)
470 #define SEGMENT_READ __pgprot(_SEGMENT_ENTRY_PROTECT | \
472 #define SEGMENT_WRITE __pgprot(_SEGMENT_ENTRY_READ | \
473 _SEGMENT_ENTRY_WRITE)
475 static inline int mm_has_pgste(struct mm_struct *mm)
478 if (unlikely(mm->context.has_pgste))
484 static inline int mm_use_skey(struct mm_struct *mm)
487 if (mm->context.use_skey)
494 * pgd/pmd/pte query functions
498 static inline int pgd_present(pgd_t pgd) { return 1; }
499 static inline int pgd_none(pgd_t pgd) { return 0; }
500 static inline int pgd_bad(pgd_t pgd) { return 0; }
502 static inline int pud_present(pud_t pud) { return 1; }
503 static inline int pud_none(pud_t pud) { return 0; }
504 static inline int pud_large(pud_t pud) { return 0; }
505 static inline int pud_bad(pud_t pud) { return 0; }
507 #else /* CONFIG_64BIT */
509 static inline int pgd_present(pgd_t pgd)
511 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
513 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
516 static inline int pgd_none(pgd_t pgd)
518 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
520 return (pgd_val(pgd) & _REGION_ENTRY_INVALID) != 0UL;
523 static inline int pgd_bad(pgd_t pgd)
526 * With dynamic page table levels the pgd can be a region table
527 * entry or a segment table entry. Check for the bit that are
528 * invalid for either table entry.
531 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INVALID &
532 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
533 return (pgd_val(pgd) & mask) != 0;
536 static inline int pud_present(pud_t pud)
538 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
540 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
543 static inline int pud_none(pud_t pud)
545 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
547 return (pud_val(pud) & _REGION_ENTRY_INVALID) != 0UL;
550 static inline int pud_large(pud_t pud)
552 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3)
554 return !!(pud_val(pud) & _REGION3_ENTRY_LARGE);
557 static inline int pud_bad(pud_t pud)
560 * With dynamic page table levels the pud can be a region table
561 * entry or a segment table entry. Check for the bit that are
562 * invalid for either table entry.
565 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INVALID &
566 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
567 return (pud_val(pud) & mask) != 0;
570 #endif /* CONFIG_64BIT */
572 static inline int pmd_present(pmd_t pmd)
574 return pmd_val(pmd) != _SEGMENT_ENTRY_INVALID;
577 static inline int pmd_none(pmd_t pmd)
579 return pmd_val(pmd) == _SEGMENT_ENTRY_INVALID;
582 static inline int pmd_large(pmd_t pmd)
584 return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) != 0;
587 static inline int pmd_pfn(pmd_t pmd)
589 unsigned long origin_mask;
591 origin_mask = _SEGMENT_ENTRY_ORIGIN;
593 origin_mask = _SEGMENT_ENTRY_ORIGIN_LARGE;
594 return (pmd_val(pmd) & origin_mask) >> PAGE_SHIFT;
597 static inline int pmd_bad(pmd_t pmd)
600 return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS_LARGE) != 0;
601 return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS) != 0;
604 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
605 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
606 unsigned long addr, pmd_t *pmdp);
608 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
609 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
610 unsigned long address, pmd_t *pmdp,
611 pmd_t entry, int dirty);
613 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
614 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
615 unsigned long address, pmd_t *pmdp);
617 #define __HAVE_ARCH_PMD_WRITE
618 static inline int pmd_write(pmd_t pmd)
620 return (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE) != 0;
623 static inline int pmd_dirty(pmd_t pmd)
627 dirty = (pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY) != 0;
631 static inline int pmd_young(pmd_t pmd)
635 young = (pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG) != 0;
639 static inline int pte_present(pte_t pte)
641 /* Bit pattern: (pte & 0x001) == 0x001 */
642 return (pte_val(pte) & _PAGE_PRESENT) != 0;
645 static inline int pte_none(pte_t pte)
647 /* Bit pattern: pte == 0x400 */
648 return pte_val(pte) == _PAGE_INVALID;
651 static inline int pte_swap(pte_t pte)
653 /* Bit pattern: (pte & 0x603) == 0x402 */
654 return (pte_val(pte) & (_PAGE_INVALID | _PAGE_PROTECT |
655 _PAGE_TYPE | _PAGE_PRESENT))
656 == (_PAGE_INVALID | _PAGE_TYPE);
659 static inline int pte_file(pte_t pte)
661 /* Bit pattern: (pte & 0x601) == 0x600 */
662 return (pte_val(pte) & (_PAGE_INVALID | _PAGE_PROTECT | _PAGE_PRESENT))
663 == (_PAGE_INVALID | _PAGE_PROTECT);
666 static inline int pte_special(pte_t pte)
668 return (pte_val(pte) & _PAGE_SPECIAL);
671 #define __HAVE_ARCH_PTE_SAME
672 static inline int pte_same(pte_t a, pte_t b)
674 return pte_val(a) == pte_val(b);
677 static inline pgste_t pgste_get_lock(pte_t *ptep)
679 unsigned long new = 0;
687 " nihh %0,0xff7f\n" /* clear PCL bit in old */
688 " oihh %1,0x0080\n" /* set PCL bit in new */
691 : "=&d" (old), "=&d" (new), "=Q" (ptep[PTRS_PER_PTE])
692 : "Q" (ptep[PTRS_PER_PTE]) : "cc", "memory");
697 static inline void pgste_set_unlock(pte_t *ptep, pgste_t pgste)
701 " nihh %1,0xff7f\n" /* clear PCL bit */
703 : "=Q" (ptep[PTRS_PER_PTE])
704 : "d" (pgste_val(pgste)), "Q" (ptep[PTRS_PER_PTE])
710 static inline pgste_t pgste_get(pte_t *ptep)
712 unsigned long pgste = 0;
714 pgste = *(unsigned long *)(ptep + PTRS_PER_PTE);
716 return __pgste(pgste);
719 static inline void pgste_set(pte_t *ptep, pgste_t pgste)
722 *(pgste_t *)(ptep + PTRS_PER_PTE) = pgste;
726 static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste,
727 struct mm_struct *mm)
730 unsigned long address, bits, skey;
732 if (!mm_use_skey(mm) || pte_val(*ptep) & _PAGE_INVALID)
734 address = pte_val(*ptep) & PAGE_MASK;
735 skey = (unsigned long) page_get_storage_key(address);
736 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
737 /* Transfer page changed & referenced bit to guest bits in pgste */
738 pgste_val(pgste) |= bits << 48; /* GR bit & GC bit */
739 /* Copy page access key and fetch protection bit to pgste */
740 pgste_val(pgste) &= ~(PGSTE_ACC_BITS | PGSTE_FP_BIT);
741 pgste_val(pgste) |= (skey & (_PAGE_ACC_BITS | _PAGE_FP_BIT)) << 56;
747 static inline void pgste_set_key(pte_t *ptep, pgste_t pgste, pte_t entry,
748 struct mm_struct *mm)
751 unsigned long address;
754 if (!mm_use_skey(mm) || pte_val(entry) & _PAGE_INVALID)
756 VM_BUG_ON(!(pte_val(*ptep) & _PAGE_INVALID));
757 address = pte_val(entry) & PAGE_MASK;
759 * Set page access key and fetch protection bit from pgste.
760 * The guest C/R information is still in the PGSTE, set real
763 nkey = (pgste_val(pgste) & (PGSTE_ACC_BITS | PGSTE_FP_BIT)) >> 56;
764 nkey |= (pgste_val(pgste) & (PGSTE_GR_BIT | PGSTE_GC_BIT)) >> 48;
765 page_set_storage_key(address, nkey, 0);
769 static inline pgste_t pgste_set_pte(pte_t *ptep, pgste_t pgste, pte_t entry)
771 if ((pte_val(entry) & _PAGE_PRESENT) &&
772 (pte_val(entry) & _PAGE_WRITE) &&
773 !(pte_val(entry) & _PAGE_INVALID)) {
774 if (!MACHINE_HAS_ESOP) {
776 * Without enhanced suppression-on-protection force
777 * the dirty bit on for all writable ptes.
779 pte_val(entry) |= _PAGE_DIRTY;
780 pte_val(entry) &= ~_PAGE_PROTECT;
782 if (!(pte_val(entry) & _PAGE_PROTECT))
783 /* This pte allows write access, set user-dirty */
784 pgste_val(pgste) |= PGSTE_UC_BIT;
791 * struct gmap_struct - guest address space
792 * @mm: pointer to the parent mm_struct
793 * @table: pointer to the page directory
794 * @asce: address space control element for gmap page table
795 * @crst_list: list of all crst tables used in the guest address space
796 * @pfault_enabled: defines if pfaults are applicable for the guest
799 struct list_head list;
800 struct mm_struct *mm;
801 unsigned long *table;
804 struct list_head crst_list;
809 * struct gmap_rmap - reverse mapping for segment table entries
810 * @gmap: pointer to the gmap_struct
811 * @entry: pointer to a segment table entry
812 * @vmaddr: virtual address in the guest address space
815 struct list_head list;
817 unsigned long *entry;
818 unsigned long vmaddr;
822 * struct gmap_pgtable - gmap information attached to a page table
823 * @vmaddr: address of the 1MB segment in the process virtual memory
824 * @mapper: list of segment table entries mapping a page table
826 struct gmap_pgtable {
827 unsigned long vmaddr;
828 struct list_head mapper;
832 * struct gmap_notifier - notify function block for page invalidation
833 * @notifier_call: address of callback function
835 struct gmap_notifier {
836 struct list_head list;
837 void (*notifier_call)(struct gmap *gmap, unsigned long address);
840 struct gmap *gmap_alloc(struct mm_struct *mm);
841 void gmap_free(struct gmap *gmap);
842 void gmap_enable(struct gmap *gmap);
843 void gmap_disable(struct gmap *gmap);
844 int gmap_map_segment(struct gmap *gmap, unsigned long from,
845 unsigned long to, unsigned long len);
846 int gmap_unmap_segment(struct gmap *gmap, unsigned long to, unsigned long len);
847 unsigned long __gmap_translate(unsigned long address, struct gmap *);
848 unsigned long gmap_translate(unsigned long address, struct gmap *);
849 unsigned long __gmap_fault(unsigned long address, struct gmap *);
850 unsigned long gmap_fault(unsigned long address, struct gmap *);
851 void gmap_discard(unsigned long from, unsigned long to, struct gmap *);
852 void __gmap_zap(unsigned long address, struct gmap *);
853 bool gmap_test_and_clear_dirty(unsigned long address, struct gmap *);
856 void gmap_register_ipte_notifier(struct gmap_notifier *);
857 void gmap_unregister_ipte_notifier(struct gmap_notifier *);
858 int gmap_ipte_notify(struct gmap *, unsigned long start, unsigned long len);
859 void gmap_do_ipte_notify(struct mm_struct *, pte_t *);
861 static inline pgste_t pgste_ipte_notify(struct mm_struct *mm,
862 pte_t *ptep, pgste_t pgste)
865 if (pgste_val(pgste) & PGSTE_IN_BIT) {
866 pgste_val(pgste) &= ~PGSTE_IN_BIT;
867 gmap_do_ipte_notify(mm, ptep);
874 * Certain architectures need to do special things when PTEs
875 * within a page table are directly modified. Thus, the following
876 * hook is made available.
878 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
879 pte_t *ptep, pte_t entry)
883 if (mm_has_pgste(mm)) {
884 pgste = pgste_get_lock(ptep);
885 pgste_val(pgste) &= ~_PGSTE_GPS_ZERO;
886 pgste_set_key(ptep, pgste, entry, mm);
887 pgste = pgste_set_pte(ptep, pgste, entry);
888 pgste_set_unlock(ptep, pgste);
890 if (!(pte_val(entry) & _PAGE_INVALID) && MACHINE_HAS_EDAT1)
891 pte_val(entry) |= _PAGE_CO;
897 * query functions pte_write/pte_dirty/pte_young only work if
898 * pte_present() is true. Undefined behaviour if not..
900 static inline int pte_write(pte_t pte)
902 return (pte_val(pte) & _PAGE_WRITE) != 0;
905 static inline int pte_dirty(pte_t pte)
907 return (pte_val(pte) & _PAGE_DIRTY) != 0;
910 static inline int pte_young(pte_t pte)
912 return (pte_val(pte) & _PAGE_YOUNG) != 0;
915 #define __HAVE_ARCH_PTE_UNUSED
916 static inline int pte_unused(pte_t pte)
918 return pte_val(pte) & _PAGE_UNUSED;
922 * pgd/pmd/pte modification functions
925 static inline void pgd_clear(pgd_t *pgd)
928 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
929 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
933 static inline void pud_clear(pud_t *pud)
936 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
937 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
941 static inline void pmd_clear(pmd_t *pmdp)
943 pmd_val(*pmdp) = _SEGMENT_ENTRY_INVALID;
946 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
948 pte_val(*ptep) = _PAGE_INVALID;
952 * The following pte modification functions only work if
953 * pte_present() is true. Undefined behaviour if not..
955 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
957 pte_val(pte) &= _PAGE_CHG_MASK;
958 pte_val(pte) |= pgprot_val(newprot);
960 * newprot for PAGE_NONE, PAGE_READ and PAGE_WRITE has the
961 * invalid bit set, clear it again for readable, young pages
963 if ((pte_val(pte) & _PAGE_YOUNG) && (pte_val(pte) & _PAGE_READ))
964 pte_val(pte) &= ~_PAGE_INVALID;
966 * newprot for PAGE_READ and PAGE_WRITE has the page protection
967 * bit set, clear it again for writable, dirty pages
969 if ((pte_val(pte) & _PAGE_DIRTY) && (pte_val(pte) & _PAGE_WRITE))
970 pte_val(pte) &= ~_PAGE_PROTECT;
974 static inline pte_t pte_wrprotect(pte_t pte)
976 pte_val(pte) &= ~_PAGE_WRITE;
977 pte_val(pte) |= _PAGE_PROTECT;
981 static inline pte_t pte_mkwrite(pte_t pte)
983 pte_val(pte) |= _PAGE_WRITE;
984 if (pte_val(pte) & _PAGE_DIRTY)
985 pte_val(pte) &= ~_PAGE_PROTECT;
989 static inline pte_t pte_mkclean(pte_t pte)
991 pte_val(pte) &= ~_PAGE_DIRTY;
992 pte_val(pte) |= _PAGE_PROTECT;
996 static inline pte_t pte_mkdirty(pte_t pte)
998 pte_val(pte) |= _PAGE_DIRTY;
999 if (pte_val(pte) & _PAGE_WRITE)
1000 pte_val(pte) &= ~_PAGE_PROTECT;
1004 static inline pte_t pte_mkold(pte_t pte)
1006 pte_val(pte) &= ~_PAGE_YOUNG;
1007 pte_val(pte) |= _PAGE_INVALID;
1011 static inline pte_t pte_mkyoung(pte_t pte)
1013 pte_val(pte) |= _PAGE_YOUNG;
1014 if (pte_val(pte) & _PAGE_READ)
1015 pte_val(pte) &= ~_PAGE_INVALID;
1019 static inline pte_t pte_mkspecial(pte_t pte)
1021 pte_val(pte) |= _PAGE_SPECIAL;
1025 #ifdef CONFIG_HUGETLB_PAGE
1026 static inline pte_t pte_mkhuge(pte_t pte)
1028 pte_val(pte) |= _PAGE_LARGE;
1033 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
1035 unsigned long pto = (unsigned long) ptep;
1037 #ifndef CONFIG_64BIT
1038 /* pto in ESA mode must point to the start of the segment table */
1041 /* Invalidation + global TLB flush for the pte */
1044 : "=m" (*ptep) : "m" (*ptep), "a" (pto), "a" (address));
1047 static inline void __ptep_ipte_local(unsigned long address, pte_t *ptep)
1049 unsigned long pto = (unsigned long) ptep;
1051 #ifndef CONFIG_64BIT
1052 /* pto in ESA mode must point to the start of the segment table */
1055 /* Invalidation + local TLB flush for the pte */
1057 " .insn rrf,0xb2210000,%2,%3,0,1"
1058 : "=m" (*ptep) : "m" (*ptep), "a" (pto), "a" (address));
1061 static inline void ptep_flush_direct(struct mm_struct *mm,
1062 unsigned long address, pte_t *ptep)
1066 if (pte_val(*ptep) & _PAGE_INVALID)
1068 active = (mm == current->active_mm) ? 1 : 0;
1069 count = atomic_add_return(0x10000, &mm->context.attach_count);
1070 if (MACHINE_HAS_TLB_LC && (count & 0xffff) <= active &&
1071 cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id())))
1072 __ptep_ipte_local(address, ptep);
1074 __ptep_ipte(address, ptep);
1075 atomic_sub(0x10000, &mm->context.attach_count);
1078 static inline void ptep_flush_lazy(struct mm_struct *mm,
1079 unsigned long address, pte_t *ptep)
1083 if (pte_val(*ptep) & _PAGE_INVALID)
1085 active = (mm == current->active_mm) ? 1 : 0;
1086 count = atomic_add_return(0x10000, &mm->context.attach_count);
1087 if ((count & 0xffff) <= active) {
1088 pte_val(*ptep) |= _PAGE_INVALID;
1089 mm->context.flush_mm = 1;
1091 __ptep_ipte(address, ptep);
1092 atomic_sub(0x10000, &mm->context.attach_count);
1096 * Get (and clear) the user dirty bit for a pte.
1098 static inline int ptep_test_and_clear_user_dirty(struct mm_struct *mm,
1106 if (!mm_has_pgste(mm))
1108 pgste = pgste_get_lock(ptep);
1109 dirty = !!(pgste_val(pgste) & PGSTE_UC_BIT);
1110 pgste_val(pgste) &= ~PGSTE_UC_BIT;
1112 if (dirty && (pte_val(pte) & _PAGE_PRESENT)) {
1113 pgste = pgste_ipte_notify(mm, ptep, pgste);
1114 __ptep_ipte(addr, ptep);
1115 if (MACHINE_HAS_ESOP || !(pte_val(pte) & _PAGE_WRITE))
1116 pte_val(pte) |= _PAGE_PROTECT;
1118 pte_val(pte) |= _PAGE_INVALID;
1121 pgste_set_unlock(ptep, pgste);
1125 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1126 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
1127 unsigned long addr, pte_t *ptep)
1133 if (mm_has_pgste(vma->vm_mm)) {
1134 pgste = pgste_get_lock(ptep);
1135 pgste = pgste_ipte_notify(vma->vm_mm, ptep, pgste);
1138 oldpte = pte = *ptep;
1139 ptep_flush_direct(vma->vm_mm, addr, ptep);
1140 young = pte_young(pte);
1141 pte = pte_mkold(pte);
1143 if (mm_has_pgste(vma->vm_mm)) {
1144 pgste = pgste_update_all(&oldpte, pgste, vma->vm_mm);
1145 pgste = pgste_set_pte(ptep, pgste, pte);
1146 pgste_set_unlock(ptep, pgste);
1153 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1154 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
1155 unsigned long address, pte_t *ptep)
1157 return ptep_test_and_clear_young(vma, address, ptep);
1161 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
1162 * both clear the TLB for the unmapped pte. The reason is that
1163 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
1164 * to modify an active pte. The sequence is
1165 * 1) ptep_get_and_clear
1167 * 3) flush_tlb_range
1168 * On s390 the tlb needs to get flushed with the modification of the pte
1169 * if the pte is active. The only way how this can be implemented is to
1170 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
1173 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1174 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
1175 unsigned long address, pte_t *ptep)
1180 if (mm_has_pgste(mm)) {
1181 pgste = pgste_get_lock(ptep);
1182 pgste = pgste_ipte_notify(mm, ptep, pgste);
1186 ptep_flush_lazy(mm, address, ptep);
1187 pte_val(*ptep) = _PAGE_INVALID;
1189 if (mm_has_pgste(mm)) {
1190 pgste = pgste_update_all(&pte, pgste, mm);
1191 pgste_set_unlock(ptep, pgste);
1196 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1197 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
1198 unsigned long address,
1204 if (mm_has_pgste(mm)) {
1205 pgste = pgste_get_lock(ptep);
1206 pgste_ipte_notify(mm, ptep, pgste);
1210 ptep_flush_lazy(mm, address, ptep);
1212 if (mm_has_pgste(mm)) {
1213 pgste = pgste_update_all(&pte, pgste, mm);
1214 pgste_set(ptep, pgste);
1219 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
1220 unsigned long address,
1221 pte_t *ptep, pte_t pte)
1225 if (mm_has_pgste(mm)) {
1226 pgste = pgste_get(ptep);
1227 pgste_set_key(ptep, pgste, pte, mm);
1228 pgste = pgste_set_pte(ptep, pgste, pte);
1229 pgste_set_unlock(ptep, pgste);
1234 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
1235 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
1236 unsigned long address, pte_t *ptep)
1241 if (mm_has_pgste(vma->vm_mm)) {
1242 pgste = pgste_get_lock(ptep);
1243 pgste = pgste_ipte_notify(vma->vm_mm, ptep, pgste);
1247 ptep_flush_direct(vma->vm_mm, address, ptep);
1248 pte_val(*ptep) = _PAGE_INVALID;
1250 if (mm_has_pgste(vma->vm_mm)) {
1251 if ((pgste_val(pgste) & _PGSTE_GPS_USAGE_MASK) ==
1252 _PGSTE_GPS_USAGE_UNUSED)
1253 pte_val(pte) |= _PAGE_UNUSED;
1254 pgste = pgste_update_all(&pte, pgste, vma->vm_mm);
1255 pgste_set_unlock(ptep, pgste);
1261 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
1262 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
1263 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
1264 * cannot be accessed while the batched unmap is running. In this case
1265 * full==1 and a simple pte_clear is enough. See tlb.h.
1267 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1268 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1269 unsigned long address,
1270 pte_t *ptep, int full)
1275 if (!full && mm_has_pgste(mm)) {
1276 pgste = pgste_get_lock(ptep);
1277 pgste = pgste_ipte_notify(mm, ptep, pgste);
1282 ptep_flush_lazy(mm, address, ptep);
1283 pte_val(*ptep) = _PAGE_INVALID;
1285 if (!full && mm_has_pgste(mm)) {
1286 pgste = pgste_update_all(&pte, pgste, mm);
1287 pgste_set_unlock(ptep, pgste);
1292 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1293 static inline pte_t ptep_set_wrprotect(struct mm_struct *mm,
1294 unsigned long address, pte_t *ptep)
1299 if (pte_write(pte)) {
1300 if (mm_has_pgste(mm)) {
1301 pgste = pgste_get_lock(ptep);
1302 pgste = pgste_ipte_notify(mm, ptep, pgste);
1305 ptep_flush_lazy(mm, address, ptep);
1306 pte = pte_wrprotect(pte);
1308 if (mm_has_pgste(mm)) {
1309 pgste = pgste_set_pte(ptep, pgste, pte);
1310 pgste_set_unlock(ptep, pgste);
1317 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1318 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1319 unsigned long address, pte_t *ptep,
1320 pte_t entry, int dirty)
1324 if (pte_same(*ptep, entry))
1326 if (mm_has_pgste(vma->vm_mm)) {
1327 pgste = pgste_get_lock(ptep);
1328 pgste = pgste_ipte_notify(vma->vm_mm, ptep, pgste);
1331 ptep_flush_direct(vma->vm_mm, address, ptep);
1333 if (mm_has_pgste(vma->vm_mm)) {
1334 pgste_set_key(ptep, pgste, entry, vma->vm_mm);
1335 pgste = pgste_set_pte(ptep, pgste, entry);
1336 pgste_set_unlock(ptep, pgste);
1343 * Conversion functions: convert a page and protection to a page entry,
1344 * and a page entry and page directory to the page they refer to.
1346 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1349 pte_val(__pte) = physpage + pgprot_val(pgprot);
1350 return pte_mkyoung(__pte);
1353 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1355 unsigned long physpage = page_to_phys(page);
1356 pte_t __pte = mk_pte_phys(physpage, pgprot);
1358 if (pte_write(__pte) && PageDirty(page))
1359 __pte = pte_mkdirty(__pte);
1363 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1364 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1365 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1366 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1368 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1369 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1371 #ifndef CONFIG_64BIT
1373 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1374 #define pud_deref(pmd) ({ BUG(); 0UL; })
1375 #define pgd_deref(pmd) ({ BUG(); 0UL; })
1377 #define pud_offset(pgd, address) ((pud_t *) pgd)
1378 #define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
1380 #else /* CONFIG_64BIT */
1382 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1383 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1384 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1386 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
1388 pud_t *pud = (pud_t *) pgd;
1389 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1390 pud = (pud_t *) pgd_deref(*pgd);
1391 return pud + pud_index(address);
1394 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1396 pmd_t *pmd = (pmd_t *) pud;
1397 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1398 pmd = (pmd_t *) pud_deref(*pud);
1399 return pmd + pmd_index(address);
1402 #endif /* CONFIG_64BIT */
1404 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1405 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1406 #define pte_page(x) pfn_to_page(pte_pfn(x))
1408 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
1410 /* Find an entry in the lowest level page table.. */
1411 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1412 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1413 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1414 #define pte_unmap(pte) do { } while (0)
1416 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLB_PAGE)
1417 static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1420 * pgprot is PAGE_NONE, PAGE_READ, or PAGE_WRITE (see __Pxxx / __Sxxx)
1421 * Convert to segment table entry format.
1423 if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1424 return pgprot_val(SEGMENT_NONE);
1425 if (pgprot_val(pgprot) == pgprot_val(PAGE_READ))
1426 return pgprot_val(SEGMENT_READ);
1427 return pgprot_val(SEGMENT_WRITE);
1430 static inline pmd_t pmd_wrprotect(pmd_t pmd)
1432 pmd_val(pmd) &= ~_SEGMENT_ENTRY_WRITE;
1433 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1437 static inline pmd_t pmd_mkwrite(pmd_t pmd)
1439 pmd_val(pmd) |= _SEGMENT_ENTRY_WRITE;
1440 if (pmd_large(pmd) && !(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1442 pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1446 static inline pmd_t pmd_mkclean(pmd_t pmd)
1448 if (pmd_large(pmd)) {
1449 pmd_val(pmd) &= ~_SEGMENT_ENTRY_DIRTY;
1450 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1455 static inline pmd_t pmd_mkdirty(pmd_t pmd)
1457 if (pmd_large(pmd)) {
1458 pmd_val(pmd) |= _SEGMENT_ENTRY_DIRTY;
1459 if (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE)
1460 pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1465 static inline pmd_t pmd_mkyoung(pmd_t pmd)
1467 if (pmd_large(pmd)) {
1468 pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1469 if (pmd_val(pmd) & _SEGMENT_ENTRY_READ)
1470 pmd_val(pmd) &= ~_SEGMENT_ENTRY_INVALID;
1475 static inline pmd_t pmd_mkold(pmd_t pmd)
1477 if (pmd_large(pmd)) {
1478 pmd_val(pmd) &= ~_SEGMENT_ENTRY_YOUNG;
1479 pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1484 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
1486 if (pmd_large(pmd)) {
1487 pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN_LARGE |
1488 _SEGMENT_ENTRY_DIRTY | _SEGMENT_ENTRY_YOUNG |
1489 _SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_SPLIT;
1490 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1491 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1492 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1493 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG))
1494 pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1497 pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN;
1498 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1502 static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
1505 pmd_val(__pmd) = physpage + massage_pgprot_pmd(pgprot);
1509 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HUGETLB_PAGE */
1511 static inline void __pmdp_csp(pmd_t *pmdp)
1513 register unsigned long reg2 asm("2") = pmd_val(*pmdp);
1514 register unsigned long reg3 asm("3") = pmd_val(*pmdp) |
1515 _SEGMENT_ENTRY_INVALID;
1516 register unsigned long reg4 asm("4") = ((unsigned long) pmdp) + 5;
1521 : "d" (reg2), "d" (reg3), "d" (reg4), "m" (*pmdp) : "cc");
1524 static inline void __pmdp_idte(unsigned long address, pmd_t *pmdp)
1528 sto = (unsigned long) pmdp - pmd_index(address) * sizeof(pmd_t);
1530 " .insn rrf,0xb98e0000,%2,%3,0,0"
1532 : "m" (*pmdp), "a" (sto), "a" ((address & HPAGE_MASK))
1536 static inline void __pmdp_idte_local(unsigned long address, pmd_t *pmdp)
1540 sto = (unsigned long) pmdp - pmd_index(address) * sizeof(pmd_t);
1542 " .insn rrf,0xb98e0000,%2,%3,0,1"
1544 : "m" (*pmdp), "a" (sto), "a" ((address & HPAGE_MASK))
1548 static inline void pmdp_flush_direct(struct mm_struct *mm,
1549 unsigned long address, pmd_t *pmdp)
1553 if (pmd_val(*pmdp) & _SEGMENT_ENTRY_INVALID)
1555 if (!MACHINE_HAS_IDTE) {
1559 active = (mm == current->active_mm) ? 1 : 0;
1560 count = atomic_add_return(0x10000, &mm->context.attach_count);
1561 if (MACHINE_HAS_TLB_LC && (count & 0xffff) <= active &&
1562 cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id())))
1563 __pmdp_idte_local(address, pmdp);
1565 __pmdp_idte(address, pmdp);
1566 atomic_sub(0x10000, &mm->context.attach_count);
1569 static inline void pmdp_flush_lazy(struct mm_struct *mm,
1570 unsigned long address, pmd_t *pmdp)
1574 if (pmd_val(*pmdp) & _SEGMENT_ENTRY_INVALID)
1576 active = (mm == current->active_mm) ? 1 : 0;
1577 count = atomic_add_return(0x10000, &mm->context.attach_count);
1578 if ((count & 0xffff) <= active) {
1579 pmd_val(*pmdp) |= _SEGMENT_ENTRY_INVALID;
1580 mm->context.flush_mm = 1;
1581 } else if (MACHINE_HAS_IDTE)
1582 __pmdp_idte(address, pmdp);
1585 atomic_sub(0x10000, &mm->context.attach_count);
1588 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1590 #define __HAVE_ARCH_PGTABLE_DEPOSIT
1591 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
1594 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1595 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
1597 static inline int pmd_trans_splitting(pmd_t pmd)
1599 return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) &&
1600 (pmd_val(pmd) & _SEGMENT_ENTRY_SPLIT);
1603 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1604 pmd_t *pmdp, pmd_t entry)
1609 static inline pmd_t pmd_mkhuge(pmd_t pmd)
1611 pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;
1612 pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1613 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1617 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1618 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1619 unsigned long address, pmd_t *pmdp)
1624 pmdp_flush_direct(vma->vm_mm, address, pmdp);
1625 *pmdp = pmd_mkold(pmd);
1626 return pmd_young(pmd);
1629 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR
1630 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
1631 unsigned long address, pmd_t *pmdp)
1635 pmdp_flush_direct(mm, address, pmdp);
1640 #define __HAVE_ARCH_PMDP_CLEAR_FLUSH
1641 static inline pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
1642 unsigned long address, pmd_t *pmdp)
1644 return pmdp_get_and_clear(vma->vm_mm, address, pmdp);
1647 #define __HAVE_ARCH_PMDP_INVALIDATE
1648 static inline void pmdp_invalidate(struct vm_area_struct *vma,
1649 unsigned long address, pmd_t *pmdp)
1651 pmdp_flush_direct(vma->vm_mm, address, pmdp);
1654 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1655 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1656 unsigned long address, pmd_t *pmdp)
1660 if (pmd_write(pmd)) {
1661 pmdp_flush_direct(mm, address, pmdp);
1662 set_pmd_at(mm, address, pmdp, pmd_wrprotect(pmd));
1666 #define pfn_pmd(pfn, pgprot) mk_pmd_phys(__pa((pfn) << PAGE_SHIFT), (pgprot))
1667 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1669 static inline int pmd_trans_huge(pmd_t pmd)
1671 return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE;
1674 static inline int has_transparent_hugepage(void)
1676 return MACHINE_HAS_HPAGE ? 1 : 0;
1678 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1681 * 31 bit swap entry format:
1682 * A page-table entry has some bits we have to treat in a special way.
1683 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
1684 * exception will occur instead of a page translation exception. The
1685 * specifiation exception has the bad habit not to store necessary
1686 * information in the lowcore.
1687 * Bits 21, 22, 30 and 31 are used to indicate the page type.
1688 * A swap pte is indicated by bit pattern (pte & 0x603) == 0x402
1689 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
1690 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
1691 * plus 24 for the offset.
1692 * 0| offset |0110|o|type |00|
1693 * 0 0000000001111111111 2222 2 22222 33
1694 * 0 1234567890123456789 0123 4 56789 01
1696 * 64 bit swap entry format:
1697 * A page-table entry has some bits we have to treat in a special way.
1698 * Bits 52 and bit 55 have to be zero, otherwise an specification
1699 * exception will occur instead of a page translation exception. The
1700 * specifiation exception has the bad habit not to store necessary
1701 * information in the lowcore.
1702 * Bits 53, 54, 62 and 63 are used to indicate the page type.
1703 * A swap pte is indicated by bit pattern (pte & 0x603) == 0x402
1704 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
1705 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
1706 * plus 56 for the offset.
1707 * | offset |0110|o|type |00|
1708 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1709 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1711 #ifndef CONFIG_64BIT
1712 #define __SWP_OFFSET_MASK (~0UL >> 12)
1714 #define __SWP_OFFSET_MASK (~0UL >> 11)
1716 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1719 offset &= __SWP_OFFSET_MASK;
1720 pte_val(pte) = _PAGE_INVALID | _PAGE_TYPE | ((type & 0x1f) << 2) |
1721 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
1725 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
1726 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
1727 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
1729 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1730 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1732 #ifndef CONFIG_64BIT
1733 # define PTE_FILE_MAX_BITS 26
1734 #else /* CONFIG_64BIT */
1735 # define PTE_FILE_MAX_BITS 59
1736 #endif /* CONFIG_64BIT */
1738 #define pte_to_pgoff(__pte) \
1739 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
1741 #define pgoff_to_pte(__off) \
1742 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
1743 | _PAGE_INVALID | _PAGE_PROTECT })
1745 #endif /* !__ASSEMBLY__ */
1747 #define kern_addr_valid(addr) (1)
1749 extern int vmem_add_mapping(unsigned long start, unsigned long size);
1750 extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1751 extern int s390_enable_sie(void);
1752 extern void s390_enable_skey(void);
1755 * No page table caches to initialise
1757 static inline void pgtable_cache_init(void) { }
1758 static inline void check_pgt_cache(void) { }
1760 #include <asm-generic/pgtable.h>
1762 #endif /* _S390_PAGE_H */