1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 1991,1992 Linus Torvalds
5 * entry_32.S contains the system-call and low-level fault and trap handling routines.
7 * Stack layout while running C code:
8 * ptrace needs to have all registers on the stack.
9 * If the order here is changed, it needs to be
10 * updated in fork.c:copy_process(), signal.c:do_signal(),
11 * ptrace.c and ptrace.h
23 * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS
32 #include <linux/linkage.h>
33 #include <linux/err.h>
34 #include <asm/thread_info.h>
35 #include <asm/irqflags.h>
36 #include <asm/errno.h>
37 #include <asm/segment.h>
39 #include <asm/percpu.h>
40 #include <asm/processor-flags.h>
41 #include <asm/irq_vectors.h>
42 #include <asm/cpufeatures.h>
43 #include <asm/alternative-asm.h>
46 #include <asm/frame.h>
48 .section .entry.text, "ax"
51 * We use macros for low-level operations which need to be overridden
52 * for paravirtualization. The following will never clobber any registers:
53 * INTERRUPT_RETURN (aka. "iret")
54 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
55 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
57 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
58 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
59 * Allowing a register to be clobbered can shrink the paravirt replacement
60 * enough to patch inline, increasing performance.
64 # define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF
66 # define preempt_stop(clobbers)
67 # define resume_kernel restore_all
70 .macro TRACE_IRQS_IRET
71 #ifdef CONFIG_TRACE_IRQFLAGS
72 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off?
80 * User gs save/restore
82 * %gs is used for userland TLS and kernel only uses it for stack
83 * canary which is required to be at %gs:20 by gcc. Read the comment
84 * at the top of stackprotector.h for more info.
86 * Local labels 98 and 99 are used.
88 #ifdef CONFIG_X86_32_LAZY_GS
90 /* unfortunately push/pop can't be no-op */
95 addl $(4 + \pop), %esp
100 /* all the rest are no-op */
107 .macro REG_TO_PTGS reg
109 .macro SET_KERNEL_GS reg
112 #else /* CONFIG_X86_32_LAZY_GS */
125 .pushsection .fixup, "ax"
129 _ASM_EXTABLE(98b, 99b)
133 98: mov PT_GS(%esp), %gs
136 .pushsection .fixup, "ax"
137 99: movl $0, PT_GS(%esp)
140 _ASM_EXTABLE(98b, 99b)
146 .macro REG_TO_PTGS reg
147 movl \reg, PT_GS(%esp)
149 .macro SET_KERNEL_GS reg
150 movl $(__KERNEL_STACK_CANARY), \reg
154 #endif /* CONFIG_X86_32_LAZY_GS */
156 .macro SAVE_ALL pt_regs_ax=%eax
169 movl $(__USER_DS), %edx
172 movl $(__KERNEL_PERCPU), %edx
178 * This is a sneaky trick to help the unwinder find pt_regs on the stack. The
179 * frame pointer is replaced with an encoded pointer to pt_regs. The encoding
180 * is just clearing the MSB, which makes it an invalid stack address and is also
181 * a signal to the unwinder that it's a pt_regs pointer in disguise.
183 * NOTE: This macro must be used *after* SAVE_ALL because it corrupts the
186 .macro ENCODE_FRAME_POINTER
187 #ifdef CONFIG_FRAME_POINTER
189 andl $0x7fffffff, %ebp
193 .macro RESTORE_INT_REGS
203 .macro RESTORE_REGS pop=0
209 .pushsection .fixup, "ax"
227 ENTRY(__switch_to_asm)
229 * Save callee-saved registers
230 * This must match the order in struct inactive_task_frame
238 movl %esp, TASK_threadsp(%eax)
239 movl TASK_threadsp(%edx), %esp
241 #ifdef CONFIG_CC_STACKPROTECTOR
242 movl TASK_stack_canary(%edx), %ebx
243 movl %ebx, PER_CPU_VAR(stack_canary)+stack_canary_offset
246 /* restore callee-saved registers */
256 * The unwinder expects the last frame on the stack to always be at the same
257 * offset from the end of the page, which allows it to validate the stack.
258 * Calling schedule_tail() directly would break that convention because its an
259 * asmlinkage function so its argument has to be pushed on the stack. This
260 * wrapper creates a proper "end of stack" frame header before the call.
262 ENTRY(schedule_tail_wrapper)
271 ENDPROC(schedule_tail_wrapper)
273 * A newly forked process directly context switches into this address.
275 * eax: prev task we switched from
276 * ebx: kernel thread func (NULL for user thread)
277 * edi: kernel thread arg
280 call schedule_tail_wrapper
283 jnz 1f /* kernel threads are uncommon */
286 /* When we fork, we trace the syscall return in the child, too. */
288 call syscall_return_slowpath
295 * A kernel thread is allowed to return here after successfully
296 * calling do_execve(). Exit to userspace to complete the execve()
299 movl $0, PT_EAX(%esp)
304 * Return to user mode is not as complex as all this looks,
305 * but we want the default path for a system call return to
306 * go as quickly as possible which is why some of this is
307 * less clear than it otherwise should be.
310 # userspace resumption stub bypassing syscall exit tracing
313 preempt_stop(CLBR_ANY)
316 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS
317 movb PT_CS(%esp), %al
318 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax
321 * We can be coming here from child spawned by kernel_thread().
323 movl PT_CS(%esp), %eax
324 andl $SEGMENT_RPL_MASK, %eax
327 jb resume_kernel # not returning to v8086 or userspace
329 ENTRY(resume_userspace)
330 DISABLE_INTERRUPTS(CLBR_ANY)
333 call prepare_exit_to_usermode
335 END(ret_from_exception)
337 #ifdef CONFIG_PREEMPT
339 DISABLE_INTERRUPTS(CLBR_ANY)
341 cmpl $0, PER_CPU_VAR(__preempt_count)
343 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ?
345 call preempt_schedule_irq
350 GLOBAL(__begin_SYSENTER_singlestep_region)
352 * All code from here through __end_SYSENTER_singlestep_region is subject
353 * to being single-stepped if a user program sets TF and executes SYSENTER.
354 * There is absolutely nothing that we can do to prevent this from happening
355 * (thanks Intel!). To keep our handling of this situation as simple as
356 * possible, we handle TF just like AC and NT, except that our #DB handler
357 * will ignore all of the single-step traps generated in this range.
362 * Xen doesn't set %esp to be precisely what the normal SYSENTER
363 * entry point expects, so fix it up before using the normal path.
365 ENTRY(xen_sysenter_target)
366 addl $5*4, %esp /* remove xen-provided frame */
367 jmp .Lsysenter_past_esp
371 * 32-bit SYSENTER entry.
373 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
374 * if X86_FEATURE_SEP is available. This is the preferred system call
375 * entry on 32-bit systems.
377 * The SYSENTER instruction, in principle, should *only* occur in the
378 * vDSO. In practice, a small number of Android devices were shipped
379 * with a copy of Bionic that inlined a SYSENTER instruction. This
380 * never happened in any of Google's Bionic versions -- it only happened
381 * in a narrow range of Intel-provided versions.
383 * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs.
384 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
385 * SYSENTER does not save anything on the stack,
386 * and does not save old EIP (!!!), ESP, or EFLAGS.
388 * To avoid losing track of EFLAGS.VM (and thus potentially corrupting
389 * user and/or vm86 state), we explicitly disable the SYSENTER
390 * instruction in vm86 mode by reprogramming the MSRs.
393 * eax system call number
402 ENTRY(entry_SYSENTER_32)
403 movl TSS_sysenter_sp0(%esp), %esp
405 pushl $__USER_DS /* pt_regs->ss */
406 pushl %ebp /* pt_regs->sp (stashed in bp) */
407 pushfl /* pt_regs->flags (except IF = 0) */
408 orl $X86_EFLAGS_IF, (%esp) /* Fix IF */
409 pushl $__USER_CS /* pt_regs->cs */
410 pushl $0 /* pt_regs->ip = 0 (placeholder) */
411 pushl %eax /* pt_regs->orig_ax */
412 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */
415 * SYSENTER doesn't filter flags, so we need to clear NT, AC
416 * and TF ourselves. To save a few cycles, we can check whether
417 * either was set instead of doing an unconditional popfq.
418 * This needs to happen before enabling interrupts so that
419 * we don't get preempted with NT set.
421 * If TF is set, we will single-step all the way to here -- do_debug
422 * will ignore all the traps. (Yes, this is slow, but so is
423 * single-stepping in general. This allows us to avoid having
424 * a more complicated code to handle the case where a user program
425 * forces us to single-step through the SYSENTER entry code.)
427 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
428 * out-of-line as an optimization: NT is unlikely to be set in the
429 * majority of the cases and instead of polluting the I$ unnecessarily,
430 * we're keeping that code behind a branch which will predict as
431 * not-taken and therefore its instructions won't be fetched.
433 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp)
434 jnz .Lsysenter_fix_flags
435 .Lsysenter_flags_fixed:
438 * User mode is traced as though IRQs are on, and SYSENTER
444 call do_fast_syscall_32
445 /* XEN PV guests always use IRET path */
446 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
447 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
449 /* Opportunistic SYSEXIT */
450 TRACE_IRQS_ON /* User mode traces as IRQs on. */
451 movl PT_EIP(%esp), %edx /* pt_regs->ip */
452 movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */
453 1: mov PT_FS(%esp), %fs
455 popl %ebx /* pt_regs->bx */
456 addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */
457 popl %esi /* pt_regs->si */
458 popl %edi /* pt_regs->di */
459 popl %ebp /* pt_regs->bp */
460 popl %eax /* pt_regs->ax */
463 * Restore all flags except IF. (We restore IF separately because
464 * STI gives a one-instruction window in which we won't be interrupted,
465 * whereas POPF does not.)
467 addl $PT_EFLAGS-PT_DS, %esp /* point esp at pt_regs->flags */
468 btr $X86_EFLAGS_IF_BIT, (%esp)
472 * Return back to the vDSO, which will pop ecx and edx.
473 * Don't bother with DS and ES (they already contain __USER_DS).
478 .pushsection .fixup, "ax"
479 2: movl $0, PT_FS(%esp)
485 .Lsysenter_fix_flags:
486 pushl $X86_EFLAGS_FIXED
488 jmp .Lsysenter_flags_fixed
489 GLOBAL(__end_SYSENTER_singlestep_region)
490 ENDPROC(entry_SYSENTER_32)
493 * 32-bit legacy system call entry.
495 * 32-bit x86 Linux system calls traditionally used the INT $0x80
496 * instruction. INT $0x80 lands here.
498 * This entry point can be used by any 32-bit perform system calls.
499 * Instances of INT $0x80 can be found inline in various programs and
500 * libraries. It is also used by the vDSO's __kernel_vsyscall
501 * fallback for hardware that doesn't support a faster entry method.
502 * Restarted 32-bit system calls also fall back to INT $0x80
503 * regardless of what instruction was originally used to do the system
504 * call. (64-bit programs can use INT $0x80 as well, but they can
505 * only run on 64-bit kernels and therefore land in
506 * entry_INT80_compat.)
508 * This is considered a slow path. It is not used by most libc
509 * implementations on modern hardware except during process startup.
512 * eax system call number
520 ENTRY(entry_INT80_32)
522 pushl %eax /* pt_regs->orig_ax */
523 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */
526 * User mode is traced as though IRQs are on, and the interrupt gate
532 call do_int80_syscall_32
537 .Lrestore_all_notrace:
538 #ifdef CONFIG_X86_ESPFIX32
539 ALTERNATIVE "jmp .Lrestore_nocheck", "", X86_BUG_ESPFIX
541 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
543 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we
544 * are returning to the kernel.
545 * See comments in process.c:copy_thread() for details.
547 movb PT_OLDSS(%esp), %ah
548 movb PT_CS(%esp), %al
549 andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
550 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax
551 je .Lldt_ss # returning to user-space with LDT SS
554 RESTORE_REGS 4 # skip orig_eax/error_code
558 .section .fixup, "ax"
560 pushl $0 # no error code
564 _ASM_EXTABLE(.Lirq_return, iret_exc)
566 #ifdef CONFIG_X86_ESPFIX32
569 * Setup and switch to ESPFIX stack
571 * We're returning to userspace with a 16 bit stack. The CPU will not
572 * restore the high word of ESP for us on executing iret... This is an
573 * "official" bug of all the x86-compatible CPUs, which we can work
574 * around to make dosemu and wine happy. We do this by preloading the
575 * high word of ESP with the high word of the userspace ESP while
576 * compensating for the offset by changing to the ESPFIX segment with
577 * a base address that matches for the difference.
579 #define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8)
580 mov %esp, %edx /* load kernel esp */
581 mov PT_OLDESP(%esp), %eax /* load userspace esp */
582 mov %dx, %ax /* eax: new kernel esp */
583 sub %eax, %edx /* offset (low word is 0) */
585 mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */
586 mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */
588 pushl %eax /* new kernel esp */
590 * Disable interrupts, but do not irqtrace this section: we
591 * will soon execute iret and the tracer was already set to
592 * the irqstate after the IRET:
594 DISABLE_INTERRUPTS(CLBR_ANY)
595 lss (%esp), %esp /* switch to espfix segment */
596 jmp .Lrestore_nocheck
598 ENDPROC(entry_INT80_32)
600 .macro FIXUP_ESPFIX_STACK
602 * Switch back for ESPFIX stack to the normal zerobased stack
604 * We can't call C functions using the ESPFIX stack. This code reads
605 * the high word of the segment base from the GDT and swiches to the
606 * normal stack and adjusts ESP with the matching offset.
608 #ifdef CONFIG_X86_ESPFIX32
609 /* fixup the stack */
610 mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */
611 mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */
613 addl %esp, %eax /* the adjusted stack pointer */
616 lss (%esp), %esp /* switch to the normal stack segment */
619 .macro UNWIND_ESPFIX_STACK
620 #ifdef CONFIG_X86_ESPFIX32
622 /* see if on espfix stack */
623 cmpw $__ESPFIX_SS, %ax
625 movl $__KERNEL_DS, %eax
628 /* switch to normal stack */
635 * Build the entry stubs with some assembler magic.
636 * We pack 1 stub into every 8-byte block.
639 ENTRY(irq_entries_start)
640 vector=FIRST_EXTERNAL_VECTOR
641 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
642 pushl $(~vector+0x80) /* Note: always in signed byte range */
647 END(irq_entries_start)
650 * the CPU automatically disables interrupts when executing an IRQ vector,
651 * so IRQ-flags tracing has to follow that:
653 .p2align CONFIG_X86_L1_CACHE_SHIFT
656 addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */
663 ENDPROC(common_interrupt)
665 #define BUILD_INTERRUPT3(name, nr, fn) \
670 ENCODE_FRAME_POINTER; \
677 #define BUILD_INTERRUPT(name, nr) \
678 BUILD_INTERRUPT3(name, nr, smp_##name); \
680 /* The include is where all of the SMP etc. interrupts come from */
681 #include <asm/entry_arch.h>
683 ENTRY(coprocessor_error)
686 pushl $do_coprocessor_error
688 END(coprocessor_error)
690 ENTRY(simd_coprocessor_error)
693 #ifdef CONFIG_X86_INVD_BUG
694 /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
695 ALTERNATIVE "pushl $do_general_protection", \
696 "pushl $do_simd_coprocessor_error", \
699 pushl $do_simd_coprocessor_error
702 END(simd_coprocessor_error)
704 ENTRY(device_not_available)
706 pushl $-1 # mark this as an int
707 pushl $do_device_not_available
709 END(device_not_available)
711 #ifdef CONFIG_PARAVIRT
714 _ASM_EXTABLE(native_iret, iret_exc)
739 ENTRY(coprocessor_segment_overrun)
742 pushl $do_coprocessor_segment_overrun
744 END(coprocessor_segment_overrun)
748 pushl $do_invalid_TSS
752 ENTRY(segment_not_present)
754 pushl $do_segment_not_present
756 END(segment_not_present)
760 pushl $do_stack_segment
764 ENTRY(alignment_check)
766 pushl $do_alignment_check
772 pushl $0 # no error code
773 pushl $do_divide_error
777 #ifdef CONFIG_X86_MCE
781 pushl machine_check_vector
786 ENTRY(spurious_interrupt_bug)
789 pushl $do_spurious_interrupt_bug
791 END(spurious_interrupt_bug)
794 ENTRY(xen_hypervisor_callback)
795 pushl $-1 /* orig_ax = -1 => not a system call */
801 * Check to see if we got the event in the critical
802 * region in xen_iret_direct, after we've reenabled
803 * events and checked for pending events. This simulates
804 * iret instruction's behaviour where it delivers a
805 * pending interrupt when enabling interrupts:
807 movl PT_EIP(%esp), %eax
808 cmpl $xen_iret_start_crit, %eax
810 cmpl $xen_iret_end_crit, %eax
813 jmp xen_iret_crit_fixup
817 call xen_evtchn_do_upcall
818 #ifndef CONFIG_PREEMPT
819 call xen_maybe_preempt_hcall
822 ENDPROC(xen_hypervisor_callback)
825 * Hypervisor uses this for application faults while it executes.
826 * We get here for two reasons:
827 * 1. Fault while reloading DS, ES, FS or GS
828 * 2. Fault while executing IRET
829 * Category 1 we fix up by reattempting the load, and zeroing the segment
830 * register if the load fails.
831 * Category 2 we fix up by jumping to do_iret_error. We cannot use the
832 * normal Linux return path in this case because if we use the IRET hypercall
833 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
834 * We distinguish between categories by maintaining a status value in EAX.
836 ENTRY(xen_failsafe_callback)
843 /* EAX == 0 => Category 1 (Bad segment)
844 EAX != 0 => Category 2 (Bad IRET) */
850 5: pushl $-1 /* orig_ax = -1 => not a system call */
853 jmp ret_from_exception
855 .section .fixup, "ax"
873 ENDPROC(xen_failsafe_callback)
875 BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
876 xen_evtchn_do_upcall)
878 #endif /* CONFIG_XEN */
880 #if IS_ENABLED(CONFIG_HYPERV)
882 BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
883 hyperv_vector_handler)
885 #endif /* CONFIG_HYPERV */
895 /* the function address is in %gs's slot on the stack */
908 movl $(__KERNEL_PERCPU), %ecx
912 movl PT_GS(%esp), %edi # get the function address
913 movl PT_ORIG_EAX(%esp), %edx # get the error code
914 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
917 movl $(__USER_DS), %ecx
921 movl %esp, %eax # pt_regs pointer
923 jmp ret_from_exception
924 END(common_exception)
928 * #DB can happen at the first instruction of
929 * entry_SYSENTER_32 or in Xen's SYSENTER prologue. If this
930 * happens, then we will be running on a very small stack. We
931 * need to detect this condition and switch to the thread
932 * stack before calling any C code at all.
934 * If you edit this code, keep in mind that NMIs can happen in here.
937 pushl $-1 # mark this as an int
940 xorl %edx, %edx # error code 0
941 movl %esp, %eax # pt_regs pointer
943 /* Are we currently on the SYSENTER stack? */
944 movl PER_CPU_VAR(cpu_entry_area), %ecx
945 addl $CPU_ENTRY_AREA_tss + TSS_STRUCT_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx
946 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
947 cmpl $SIZEOF_SYSENTER_stack, %ecx
948 jb .Ldebug_from_sysenter_stack
952 jmp ret_from_exception
954 .Ldebug_from_sysenter_stack:
955 /* We're on the SYSENTER stack. Switch off. */
957 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
961 jmp ret_from_exception
965 * NMI is doubly nasty. It can happen on the first instruction of
966 * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning
967 * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32
968 * switched stacks. We handle both conditions by simply checking whether we
969 * interrupted kernel code running on the SYSENTER stack.
973 #ifdef CONFIG_X86_ESPFIX32
976 cmpw $__ESPFIX_SS, %ax
978 je .Lnmi_espfix_stack
981 pushl %eax # pt_regs->orig_ax
984 xorl %edx, %edx # zero error code
985 movl %esp, %eax # pt_regs pointer
987 /* Are we currently on the SYSENTER stack? */
988 movl PER_CPU_VAR(cpu_entry_area), %ecx
989 addl $CPU_ENTRY_AREA_tss + TSS_STRUCT_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx
990 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
991 cmpl $SIZEOF_SYSENTER_stack, %ecx
992 jb .Lnmi_from_sysenter_stack
994 /* Not on SYSENTER stack. */
996 jmp .Lrestore_all_notrace
998 .Lnmi_from_sysenter_stack:
1000 * We're on the SYSENTER stack. Switch off. No one (not even debug)
1001 * is using the thread stack right now, so it's safe for us to use it.
1004 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1007 jmp .Lrestore_all_notrace
1009 #ifdef CONFIG_X86_ESPFIX32
1012 * create the pointer to lss back
1017 /* copy the iret frame of 12 bytes */
1023 ENCODE_FRAME_POINTER
1024 FIXUP_ESPFIX_STACK # %eax == %esp
1025 xorl %edx, %edx # zero error code
1028 lss 12+4(%esp), %esp # back to espfix stack
1035 pushl $-1 # mark this as an int
1037 ENCODE_FRAME_POINTER
1039 xorl %edx, %edx # zero error code
1040 movl %esp, %eax # pt_regs pointer
1042 jmp ret_from_exception
1045 ENTRY(general_protection)
1046 pushl $do_general_protection
1047 jmp common_exception
1048 END(general_protection)
1050 #ifdef CONFIG_KVM_GUEST
1051 ENTRY(async_page_fault)
1053 pushl $do_async_page_fault
1054 jmp common_exception
1055 END(async_page_fault)
1058 ENTRY(rewind_stack_do_exit)
1059 /* Prevent any naive code from trying to unwind to our caller. */
1062 movl PER_CPU_VAR(cpu_current_top_of_stack), %esi
1063 leal -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%esi), %esp
1067 END(rewind_stack_do_exit)