1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/x86_64/entry.S
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
7 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
9 * entry.S contains the system-call and fault low-level handling routines.
11 * Some of this is documented in Documentation/x86/entry_64.txt
13 * A note on terminology:
14 * - iret frame: Architecture defined interrupt frame from SS to RIP
15 * at the top of the kernel process stack.
18 * - ENTRY/END: Define functions in the symbol table.
19 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
20 * - idtentry: Define exception entry points.
22 #include <linux/linkage.h>
23 #include <asm/segment.h>
24 #include <asm/cache.h>
25 #include <asm/errno.h>
27 #include <asm/asm-offsets.h>
29 #include <asm/unistd.h>
30 #include <asm/thread_info.h>
31 #include <asm/hw_irq.h>
32 #include <asm/page_types.h>
33 #include <asm/irqflags.h>
34 #include <asm/paravirt.h>
35 #include <asm/percpu.h>
38 #include <asm/pgtable_types.h>
39 #include <asm/export.h>
40 #include <asm/frame.h>
41 #include <linux/err.h>
44 .section .entry.text, "ax"
46 #ifdef CONFIG_PARAVIRT
47 ENTRY(native_usergs_sysret64)
51 END(native_usergs_sysret64)
52 #endif /* CONFIG_PARAVIRT */
54 .macro TRACE_IRQS_IRETQ
55 #ifdef CONFIG_TRACE_IRQFLAGS
56 bt $9, EFLAGS(%rsp) /* interrupts off? */
64 * When dynamic function tracer is enabled it will add a breakpoint
65 * to all locations that it is about to modify, sync CPUs, update
66 * all the code, sync CPUs, then remove the breakpoints. In this time
67 * if lockdep is enabled, it might jump back into the debug handler
68 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
70 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
71 * make sure the stack pointer does not get reset back to the top
72 * of the debug stack, and instead just reuses the current stack.
74 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
76 .macro TRACE_IRQS_OFF_DEBUG
77 call debug_stack_set_zero
79 call debug_stack_reset
82 .macro TRACE_IRQS_ON_DEBUG
83 call debug_stack_set_zero
85 call debug_stack_reset
88 .macro TRACE_IRQS_IRETQ_DEBUG
89 bt $9, EFLAGS(%rsp) /* interrupts off? */
96 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
97 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
98 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
102 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
104 * This is the only entry point used for 64-bit system calls. The
105 * hardware interface is reasonably well designed and the register to
106 * argument mapping Linux uses fits well with the registers that are
107 * available when SYSCALL is used.
109 * SYSCALL instructions can be found inlined in libc implementations as
110 * well as some other programs and libraries. There are also a handful
111 * of SYSCALL instructions in the vDSO used, for example, as a
112 * clock_gettimeofday fallback.
114 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
115 * then loads new ss, cs, and rip from previously programmed MSRs.
116 * rflags gets masked by a value from another MSR (so CLD and CLAC
117 * are not needed). SYSCALL does not save anything on the stack
118 * and does not change rsp.
120 * Registers on entry:
121 * rax system call number
123 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
127 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
130 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
132 * Only called from user space.
134 * When user can change pt_regs->foo always force IRET. That is because
135 * it deals with uncanonical addresses better. SYSRET has trouble
136 * with them due to bugs in both AMD and Intel CPUs.
139 .pushsection .entry_trampoline, "ax"
142 * The code in here gets remapped into cpu_entry_area's trampoline. This means
143 * that the assembler and linker have the wrong idea as to where this code
144 * lives (and, in fact, it's mapped more than once, so it's not even at a
145 * fixed address). So we can't reference any symbols outside the entry
146 * trampoline and expect it to work.
148 * Instead, we carefully abuse %rip-relative addressing.
149 * _entry_trampoline(%rip) refers to the start of the remapped) entry
150 * trampoline. We can thus find cpu_entry_area with this macro:
153 #define CPU_ENTRY_AREA \
154 _entry_trampoline - CPU_ENTRY_AREA_entry_trampoline(%rip)
156 /* The top word of the SYSENTER stack is hot and is usable as scratch space. */
157 #define RSP_SCRATCH CPU_ENTRY_AREA_tss + TSS_STRUCT_SYSENTER_stack + \
158 SIZEOF_SYSENTER_stack - 8 + CPU_ENTRY_AREA
160 ENTRY(entry_SYSCALL_64_trampoline)
164 /* Stash the user RSP. */
165 movq %rsp, RSP_SCRATCH
167 /* Load the top of the task stack into RSP */
168 movq CPU_ENTRY_AREA_tss + TSS_sp1 + CPU_ENTRY_AREA, %rsp
170 /* Start building the simulated IRET frame. */
171 pushq $__USER_DS /* pt_regs->ss */
172 pushq RSP_SCRATCH /* pt_regs->sp */
173 pushq %r11 /* pt_regs->flags */
174 pushq $__USER_CS /* pt_regs->cs */
175 pushq %rcx /* pt_regs->ip */
178 * x86 lacks a near absolute jump, and we can't jump to the real
179 * entry text with a relative jump. We could push the target
180 * address and then use retq, but this destroys the pipeline on
181 * many CPUs (wasting over 20 cycles on Sandy Bridge). Instead,
182 * spill RDI and restore it in a second-stage trampoline.
185 movq $entry_SYSCALL_64_stage2, %rdi
187 END(entry_SYSCALL_64_trampoline)
191 ENTRY(entry_SYSCALL_64_stage2)
194 jmp entry_SYSCALL_64_after_hwframe
195 END(entry_SYSCALL_64_stage2)
197 ENTRY(entry_SYSCALL_64)
200 * Interrupts are off on entry.
201 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
202 * it is too small to ever cause noticeable irq latency.
206 movq %rsp, PER_CPU_VAR(rsp_scratch)
207 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
211 /* Construct struct pt_regs on stack */
212 pushq $__USER_DS /* pt_regs->ss */
213 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
214 pushq %r11 /* pt_regs->flags */
215 pushq $__USER_CS /* pt_regs->cs */
216 pushq %rcx /* pt_regs->ip */
217 GLOBAL(entry_SYSCALL_64_after_hwframe)
218 pushq %rax /* pt_regs->orig_ax */
219 pushq %rdi /* pt_regs->di */
220 pushq %rsi /* pt_regs->si */
221 pushq %rdx /* pt_regs->dx */
222 pushq %rcx /* pt_regs->cx */
223 pushq $-ENOSYS /* pt_regs->ax */
224 pushq %r8 /* pt_regs->r8 */
225 pushq %r9 /* pt_regs->r9 */
226 pushq %r10 /* pt_regs->r10 */
227 pushq %r11 /* pt_regs->r11 */
228 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
229 UNWIND_HINT_REGS extra=0
232 * If we need to do entry work or if we guess we'll need to do
233 * exit work, go straight to the slow path.
235 movq PER_CPU_VAR(current_task), %r11
236 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
237 jnz entry_SYSCALL64_slow_path
239 entry_SYSCALL_64_fastpath:
241 * Easy case: enable interrupts and issue the syscall. If the syscall
242 * needs pt_regs, we'll call a stub that disables interrupts again
243 * and jumps to the slow path.
246 ENABLE_INTERRUPTS(CLBR_NONE)
247 #if __SYSCALL_MASK == ~0
248 cmpq $__NR_syscall_max, %rax
250 andl $__SYSCALL_MASK, %eax
251 cmpl $__NR_syscall_max, %eax
253 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
257 * This call instruction is handled specially in stub_ptregs_64.
258 * It might end up jumping to the slow path. If it jumps, RAX
259 * and all argument registers are clobbered.
261 call *sys_call_table(, %rax, 8)
262 .Lentry_SYSCALL_64_after_fastpath_call:
268 * If we get here, then we know that pt_regs is clean for SYSRET64.
269 * If we see that no exit work is required (which we are required
270 * to check with IRQs off), then we can go straight to SYSRET64.
272 DISABLE_INTERRUPTS(CLBR_ANY)
274 movq PER_CPU_VAR(current_task), %r11
275 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
279 TRACE_IRQS_ON /* user mode is traced as IRQs on */
281 movq EFLAGS(%rsp), %r11
282 addq $6*8, %rsp /* skip extra regs -- they were preserved */
284 jmp .Lpop_c_regs_except_rcx_r11_and_sysret
288 * The fast path looked good when we started, but something changed
289 * along the way and we need to switch to the slow path. Calling
290 * raise(3) will trigger this, for example. IRQs are off.
293 ENABLE_INTERRUPTS(CLBR_ANY)
296 call syscall_return_slowpath /* returns with IRQs disabled */
297 jmp return_from_SYSCALL_64
299 entry_SYSCALL64_slow_path:
303 call do_syscall_64 /* returns with IRQs disabled */
305 return_from_SYSCALL_64:
306 TRACE_IRQS_IRETQ /* we're about to change IF */
309 * Try to use SYSRET instead of IRET if we're returning to
310 * a completely clean 64-bit userspace context. If we're not,
311 * go to the slow exit path.
316 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */
317 jne swapgs_restore_regs_and_return_to_usermode
320 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
321 * in kernel space. This essentially lets the user take over
322 * the kernel, since userspace controls RSP.
324 * If width of "canonical tail" ever becomes variable, this will need
325 * to be updated to remain correct on both old and new CPUs.
327 * Change top bits to match most significant bit (47th or 56th bit
328 * depending on paging mode) in the address.
330 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
331 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
333 /* If this changed %rcx, it was not canonical */
335 jne swapgs_restore_regs_and_return_to_usermode
337 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
338 jne swapgs_restore_regs_and_return_to_usermode
341 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
342 jne swapgs_restore_regs_and_return_to_usermode
345 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
346 * restore RF properly. If the slowpath sets it for whatever reason, we
347 * need to restore it correctly.
349 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
350 * trap from userspace immediately after SYSRET. This would cause an
351 * infinite loop whenever #DB happens with register state that satisfies
352 * the opportunistic SYSRET conditions. For example, single-stepping
355 * movq $stuck_here, %rcx
360 * would never get past 'stuck_here'.
362 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
363 jnz swapgs_restore_regs_and_return_to_usermode
365 /* nothing to check for RSP */
367 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
368 jne swapgs_restore_regs_and_return_to_usermode
371 * We win! This label is here just for ease of understanding
372 * perf profiles. Nothing jumps here.
374 syscall_return_via_sysret:
375 /* rcx and r11 are already restored (see code above) */
378 .Lpop_c_regs_except_rcx_r11_and_sysret:
379 popq %rsi /* skip r11 */
384 popq %rsi /* skip rcx */
389 * Now all regs are restored except RSP and RDI.
390 * Save old stack pointer and switch to trampoline stack.
393 movq PER_CPU_VAR(cpu_tss + TSS_sp0), %rsp
395 pushq RSP-RDI(%rdi) /* RSP */
396 pushq (%rdi) /* RDI */
399 * We are on the trampoline stack. All regs except RDI are live.
400 * We can do future final exit work right here.
406 END(entry_SYSCALL_64)
408 ENTRY(stub_ptregs_64)
410 * Syscalls marked as needing ptregs land here.
411 * If we are on the fast path, we need to save the extra regs,
412 * which we achieve by trying again on the slow path. If we are on
413 * the slow path, the extra regs are already saved.
415 * RAX stores a pointer to the C function implementing the syscall.
418 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
422 * Called from fast path -- disable IRQs again, pop return address
423 * and jump to slow path
425 DISABLE_INTERRUPTS(CLBR_ANY)
428 UNWIND_HINT_REGS extra=0
429 jmp entry_SYSCALL64_slow_path
432 jmp *%rax /* Called from C */
435 .macro ptregs_stub func
438 leaq \func(%rip), %rax
443 /* Instantiate ptregs_stub for each ptregs-using syscall */
444 #define __SYSCALL_64_QUAL_(sym)
445 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
446 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
447 #include <asm/syscalls_64.h>
453 ENTRY(__switch_to_asm)
456 * Save callee-saved registers
457 * This must match the order in inactive_task_frame
467 movq %rsp, TASK_threadsp(%rdi)
468 movq TASK_threadsp(%rsi), %rsp
470 #ifdef CONFIG_CC_STACKPROTECTOR
471 movq TASK_stack_canary(%rsi), %rbx
472 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
475 /* restore callee-saved registers */
487 * A newly forked process directly context switches into this address.
489 * rax: prev task we switched from
490 * rbx: kernel thread func (NULL for user thread)
491 * r12: kernel thread arg
496 call schedule_tail /* rdi: 'prev' task parameter */
498 testq %rbx, %rbx /* from kernel_thread? */
499 jnz 1f /* kernel threads are uncommon */
504 call syscall_return_slowpath /* returns with IRQs disabled */
505 TRACE_IRQS_ON /* user mode is traced as IRQS on */
506 jmp swapgs_restore_regs_and_return_to_usermode
513 * A kernel thread is allowed to return here after successfully
514 * calling do_execve(). Exit to userspace to complete the execve()
522 * Build the entry stubs with some assembler magic.
523 * We pack 1 stub into every 8-byte block.
526 ENTRY(irq_entries_start)
527 vector=FIRST_EXTERNAL_VECTOR
528 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
529 UNWIND_HINT_IRET_REGS
530 pushq $(~vector+0x80) /* Note: always in signed byte range */
535 END(irq_entries_start)
537 .macro DEBUG_ENTRY_ASSERT_IRQS_OFF
538 #ifdef CONFIG_DEBUG_ENTRY
541 testl $X86_EFLAGS_IF, %eax
550 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers
551 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone.
552 * Requires kernel GSBASE.
554 * The invariant is that, if irq_count != -1, then the IRQ stack is in use.
556 .macro ENTER_IRQ_STACK regs=1 old_rsp
557 DEBUG_ENTRY_ASSERT_IRQS_OFF
561 UNWIND_HINT_REGS base=\old_rsp
564 incl PER_CPU_VAR(irq_count)
565 jnz .Lirq_stack_push_old_rsp_\@
568 * Right now, if we just incremented irq_count to zero, we've
569 * claimed the IRQ stack but we haven't switched to it yet.
571 * If anything is added that can interrupt us here without using IST,
572 * it must be *extremely* careful to limit its stack usage. This
573 * could include kprobes and a hypothetical future IST-less #DB
576 * The OOPS unwinder relies on the word at the top of the IRQ
577 * stack linking back to the previous RSP for the entire time we're
578 * on the IRQ stack. For this to work reliably, we need to write
579 * it before we actually move ourselves to the IRQ stack.
582 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8)
583 movq PER_CPU_VAR(irq_stack_ptr), %rsp
585 #ifdef CONFIG_DEBUG_ENTRY
587 * If the first movq above becomes wrong due to IRQ stack layout
588 * changes, the only way we'll notice is if we try to unwind right
589 * here. Assert that we set up the stack right to catch this type
592 cmpq -8(%rsp), \old_rsp
593 je .Lirq_stack_okay\@
598 .Lirq_stack_push_old_rsp_\@:
602 UNWIND_HINT_REGS indirect=1
607 * Undoes ENTER_IRQ_STACK.
609 .macro LEAVE_IRQ_STACK regs=1
610 DEBUG_ENTRY_ASSERT_IRQS_OFF
611 /* We need to be off the IRQ stack before decrementing irq_count. */
619 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming
620 * the irq stack but we're not on it.
623 decl PER_CPU_VAR(irq_count)
627 * Interrupt entry/exit.
629 * Interrupt entry points save only callee clobbered registers in fast path.
631 * Entry runs with interrupts off.
634 /* 0(%rsp): ~(interrupt number) */
635 .macro interrupt func
638 testb $3, CS-ORIG_RAX(%rsp)
641 call switch_to_thread_stack
644 ALLOC_PT_GPREGS_ON_STACK
653 * IRQ from user mode.
655 * We need to tell lockdep that IRQs are off. We can't do this until
656 * we fix gsbase, and we should do it before enter_from_user_mode
657 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
658 * the simplest way to handle it is to just call it twice if
659 * we enter from user mode. There's no reason to optimize this since
660 * TRACE_IRQS_OFF is a no-op if lockdep is off.
664 CALL_enter_from_user_mode
667 ENTER_IRQ_STACK old_rsp=%rdi
668 /* We entered an interrupt context - irqs are off: */
671 call \func /* rdi points to pt_regs */
675 * The interrupt stubs push (~vector+0x80) onto the stack and
676 * then jump to common_interrupt.
678 .p2align CONFIG_X86_L1_CACHE_SHIFT
681 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
683 /* 0(%rsp): old RSP */
685 DISABLE_INTERRUPTS(CLBR_ANY)
693 /* Interrupt came from user space */
696 call prepare_exit_to_usermode
699 GLOBAL(swapgs_restore_regs_and_return_to_usermode)
700 #ifdef CONFIG_DEBUG_ENTRY
701 /* Assert that pt_regs indicates user mode. */
718 * The stack is now user RDI, orig_ax, RIP, CS, EFLAGS, RSP, SS.
719 * Save old stack pointer and switch to trampoline stack.
722 movq PER_CPU_VAR(cpu_tss + TSS_sp0), %rsp
724 /* Copy the IRET frame to the trampoline stack. */
725 pushq 6*8(%rdi) /* SS */
726 pushq 5*8(%rdi) /* RSP */
727 pushq 4*8(%rdi) /* EFLAGS */
728 pushq 3*8(%rdi) /* CS */
729 pushq 2*8(%rdi) /* RIP */
731 /* Push user RDI on the trampoline stack. */
735 * We are on the trampoline stack. All regs except RDI are live.
736 * We can do future final exit work right here.
745 /* Returning to kernel space */
747 #ifdef CONFIG_PREEMPT
748 /* Interrupts are off */
749 /* Check if we need preemption */
750 bt $9, EFLAGS(%rsp) /* were interrupts off? */
752 0: cmpl $0, PER_CPU_VAR(__preempt_count)
754 call preempt_schedule_irq
759 * The iretq could re-enable interrupts:
763 GLOBAL(restore_regs_and_return_to_kernel)
764 #ifdef CONFIG_DEBUG_ENTRY
765 /* Assert that pt_regs indicates kernel mode. */
773 addq $8, %rsp /* skip regs->orig_ax */
777 UNWIND_HINT_IRET_REGS
779 * Are we returning to a stack segment from the LDT? Note: in
780 * 64-bit mode SS:RSP on the exception stack is always valid.
782 #ifdef CONFIG_X86_ESPFIX64
783 testb $4, (SS-RIP)(%rsp)
784 jnz native_irq_return_ldt
787 .global native_irq_return_iret
788 native_irq_return_iret:
790 * This may fault. Non-paranoid faults on return to userspace are
791 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
792 * Double-faults due to espfix64 are handled in do_double_fault.
793 * Other faults here are fatal.
797 #ifdef CONFIG_X86_ESPFIX64
798 native_irq_return_ldt:
800 * We are running with user GSBASE. All GPRs contain their user
801 * values. We have a percpu ESPFIX stack that is eight slots
802 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
803 * of the ESPFIX stack.
805 * We clobber RAX and RDI in this code. We stash RDI on the
806 * normal stack and RAX on the ESPFIX stack.
808 * The ESPFIX stack layout we set up looks like this:
810 * --- top of ESPFIX stack ---
815 * RIP <-- RSP points here when we're done
816 * RAX <-- espfix_waddr points here
817 * --- bottom of ESPFIX stack ---
820 pushq %rdi /* Stash user RDI */
822 movq PER_CPU_VAR(espfix_waddr), %rdi
823 movq %rax, (0*8)(%rdi) /* user RAX */
824 movq (1*8)(%rsp), %rax /* user RIP */
825 movq %rax, (1*8)(%rdi)
826 movq (2*8)(%rsp), %rax /* user CS */
827 movq %rax, (2*8)(%rdi)
828 movq (3*8)(%rsp), %rax /* user RFLAGS */
829 movq %rax, (3*8)(%rdi)
830 movq (5*8)(%rsp), %rax /* user SS */
831 movq %rax, (5*8)(%rdi)
832 movq (4*8)(%rsp), %rax /* user RSP */
833 movq %rax, (4*8)(%rdi)
834 /* Now RAX == RSP. */
836 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
837 popq %rdi /* Restore user RDI */
840 * espfix_stack[31:16] == 0. The page tables are set up such that
841 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
842 * espfix_waddr for any X. That is, there are 65536 RO aliases of
843 * the same page. Set up RSP so that RSP[31:16] contains the
844 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
845 * still points to an RO alias of the ESPFIX stack.
847 orq PER_CPU_VAR(espfix_stack), %rax
850 UNWIND_HINT_IRET_REGS offset=8
853 * At this point, we cannot write to the stack any more, but we can
856 popq %rax /* Restore user RAX */
859 * RSP now points to an ordinary IRET frame, except that the page
860 * is read-only and RSP[31:16] are preloaded with the userspace
861 * values. We can now IRET back to userspace.
863 jmp native_irq_return_iret
865 END(common_interrupt)
870 .macro apicinterrupt3 num sym do_sym
872 UNWIND_HINT_IRET_REGS
881 /* Make sure APIC interrupt handlers end up in the irqentry section: */
882 #define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
883 #define POP_SECTION_IRQENTRY .popsection
885 .macro apicinterrupt num sym do_sym
886 PUSH_SECTION_IRQENTRY
887 apicinterrupt3 \num \sym \do_sym
892 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
893 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
897 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
900 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
901 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
903 #ifdef CONFIG_HAVE_KVM
904 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
905 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
906 apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi
909 #ifdef CONFIG_X86_MCE_THRESHOLD
910 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
913 #ifdef CONFIG_X86_MCE_AMD
914 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
917 #ifdef CONFIG_X86_THERMAL_VECTOR
918 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
922 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
923 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
924 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
927 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
928 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
930 #ifdef CONFIG_IRQ_WORK
931 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
935 * Exception entry points.
937 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
940 * Switch to the thread stack. This is called with the IRET frame and
941 * orig_ax on the stack. (That is, RDI..R12 are not on the stack and
942 * space has not been allocated for them.)
944 ENTRY(switch_to_thread_stack)
949 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
950 UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI
952 pushq 7*8(%rdi) /* regs->ss */
953 pushq 6*8(%rdi) /* regs->rsp */
954 pushq 5*8(%rdi) /* regs->eflags */
955 pushq 4*8(%rdi) /* regs->cs */
956 pushq 3*8(%rdi) /* regs->ip */
957 pushq 2*8(%rdi) /* regs->orig_ax */
958 pushq 8(%rdi) /* return address */
963 END(switch_to_thread_stack)
965 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
967 UNWIND_HINT_IRET_REGS offset=\has_error_code*8
970 .if \shift_ist != -1 && \paranoid == 0
971 .error "using shift_ist requires paranoid=1"
976 .if \has_error_code == 0
977 pushq $-1 /* ORIG_RAX: no syscall to restart */
980 ALLOC_PT_GPREGS_ON_STACK
983 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
984 jnz .Lfrom_usermode_switch_stack_\@
993 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
997 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
1003 movq %rsp, %rdi /* pt_regs pointer */
1006 movq ORIG_RAX(%rsp), %rsi /* get error code */
1007 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
1009 xorl %esi, %esi /* no error code */
1012 .if \shift_ist != -1
1013 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1018 .if \shift_ist != -1
1019 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1022 /* these procedures expect "no swapgs" flag in ebx */
1031 * Entry from userspace. Switch stacks and treat it
1032 * as a normal entry. This means that paranoid handlers
1033 * run in real process context if user_mode(regs).
1035 .Lfrom_usermode_switch_stack_\@:
1038 movq %rsp, %rdi /* pt_regs pointer */
1041 movq ORIG_RAX(%rsp), %rsi /* get error code */
1042 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
1044 xorl %esi, %esi /* no error code */
1049 jmp error_exit /* %ebx: no swapgs flag */
1054 idtentry divide_error do_divide_error has_error_code=0
1055 idtentry overflow do_overflow has_error_code=0
1056 idtentry bounds do_bounds has_error_code=0
1057 idtentry invalid_op do_invalid_op has_error_code=0
1058 idtentry device_not_available do_device_not_available has_error_code=0
1059 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1060 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1061 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1062 idtentry segment_not_present do_segment_not_present has_error_code=1
1063 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1064 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1065 idtentry alignment_check do_alignment_check has_error_code=1
1066 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1070 * Reload gs selector with exception handling
1073 ENTRY(native_load_gs_index)
1076 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1080 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
1085 ENDPROC(native_load_gs_index)
1086 EXPORT_SYMBOL(native_load_gs_index)
1088 _ASM_EXTABLE(.Lgs_change, bad_gs)
1089 .section .fixup, "ax"
1090 /* running with kernelgs */
1092 SWAPGS /* switch back to user gs */
1094 /* This can't be a string because the preprocessor needs to see it. */
1095 movl $__USER_DS, %eax
1098 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
1104 /* Call softirq on interrupt stack. Interrupts are off. */
1105 ENTRY(do_softirq_own_stack)
1108 ENTER_IRQ_STACK regs=0 old_rsp=%r11
1110 LEAVE_IRQ_STACK regs=0
1113 ENDPROC(do_softirq_own_stack)
1116 idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1119 * A note on the "critical region" in our callback handler.
1120 * We want to avoid stacking callback handlers due to events occurring
1121 * during handling of the last event. To do this, we keep events disabled
1122 * until we've done all processing. HOWEVER, we must enable events before
1123 * popping the stack frame (can't be done atomically) and so it would still
1124 * be possible to get enough handler activations to overflow the stack.
1125 * Although unlikely, bugs of that kind are hard to track down, so we'd
1126 * like to avoid the possibility.
1127 * So, on entry to the handler we detect whether we interrupted an
1128 * existing activation in its critical region -- if so, we pop the current
1129 * activation and restart the handler using the previous one.
1131 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
1134 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1135 * see the correct pointer to the pt_regs
1138 movq %rdi, %rsp /* we don't return, adjust the stack frame */
1141 ENTER_IRQ_STACK old_rsp=%r10
1142 call xen_evtchn_do_upcall
1145 #ifndef CONFIG_PREEMPT
1146 call xen_maybe_preempt_hcall
1149 END(xen_do_hypervisor_callback)
1152 * Hypervisor uses this for application faults while it executes.
1153 * We get here for two reasons:
1154 * 1. Fault while reloading DS, ES, FS or GS
1155 * 2. Fault while executing IRET
1156 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1157 * registers that could be reloaded and zeroed the others.
1158 * Category 2 we fix up by killing the current process. We cannot use the
1159 * normal Linux return path in this case because if we use the IRET hypercall
1160 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1161 * We distinguish between categories by comparing each saved segment register
1162 * with its current contents: any discrepancy means we in category 1.
1164 ENTRY(xen_failsafe_callback)
1167 cmpw %cx, 0x10(%rsp)
1170 cmpw %cx, 0x18(%rsp)
1173 cmpw %cx, 0x20(%rsp)
1176 cmpw %cx, 0x28(%rsp)
1178 /* All segments match their saved values => Category 2 (Bad IRET). */
1183 UNWIND_HINT_IRET_REGS offset=8
1184 jmp general_protection
1185 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1189 UNWIND_HINT_IRET_REGS
1190 pushq $-1 /* orig_ax = -1 => not a system call */
1191 ALLOC_PT_GPREGS_ON_STACK
1194 ENCODE_FRAME_POINTER
1196 END(xen_failsafe_callback)
1198 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1199 xen_hvm_callback_vector xen_evtchn_do_upcall
1201 #endif /* CONFIG_XEN */
1203 #if IS_ENABLED(CONFIG_HYPERV)
1204 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1205 hyperv_callback_vector hyperv_vector_handler
1206 #endif /* CONFIG_HYPERV */
1208 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1209 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1210 idtentry stack_segment do_stack_segment has_error_code=1
1213 idtentry xennmi do_nmi has_error_code=0
1214 idtentry xendebug do_debug has_error_code=0
1215 idtentry xenint3 do_int3 has_error_code=0
1218 idtentry general_protection do_general_protection has_error_code=1
1219 idtentry page_fault do_page_fault has_error_code=1
1221 #ifdef CONFIG_KVM_GUEST
1222 idtentry async_page_fault do_async_page_fault has_error_code=1
1225 #ifdef CONFIG_X86_MCE
1226 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1230 * Save all registers in pt_regs, and switch gs if needed.
1231 * Use slow, but surefire "are we in kernel?" check.
1232 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1234 ENTRY(paranoid_entry)
1239 ENCODE_FRAME_POINTER 8
1241 movl $MSR_GS_BASE, %ecx
1244 js 1f /* negative -> in kernel */
1251 * "Paranoid" exit path from exception stack. This is invoked
1252 * only on return from non-NMI IST interrupts that came
1253 * from kernel space.
1255 * We may be returning to very strange contexts (e.g. very early
1256 * in syscall entry), so checking for preemption here would
1257 * be complicated. Fortunately, we there's no good reason
1258 * to try to handle preemption here.
1260 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1262 ENTRY(paranoid_exit)
1264 DISABLE_INTERRUPTS(CLBR_ANY)
1265 TRACE_IRQS_OFF_DEBUG
1266 testl %ebx, %ebx /* swapgs needed? */
1267 jnz .Lparanoid_exit_no_swapgs
1270 jmp .Lparanoid_exit_restore
1271 .Lparanoid_exit_no_swapgs:
1272 TRACE_IRQS_IRETQ_DEBUG
1273 .Lparanoid_exit_restore:
1274 jmp restore_regs_and_return_to_kernel
1278 * Save all registers in pt_regs, and switch gs if needed.
1279 * Return: EBX=0: came from user mode; EBX=1: otherwise
1286 ENCODE_FRAME_POINTER 8
1288 testb $3, CS+8(%rsp)
1289 jz .Lerror_kernelspace
1292 * We entered from user mode or we're pretending to have entered
1293 * from user mode due to an IRET fault.
1297 .Lerror_entry_from_usermode_after_swapgs:
1298 /* Put us onto the real thread stack. */
1299 popq %r12 /* save return addr in %12 */
1300 movq %rsp, %rdi /* arg0 = pt_regs pointer */
1302 movq %rax, %rsp /* switch stack */
1303 ENCODE_FRAME_POINTER
1307 * We need to tell lockdep that IRQs are off. We can't do this until
1308 * we fix gsbase, and we should do it before enter_from_user_mode
1309 * (which can take locks).
1312 CALL_enter_from_user_mode
1320 * There are two places in the kernel that can potentially fault with
1321 * usergs. Handle them here. B stepping K8s sometimes report a
1322 * truncated RIP for IRET exceptions returning to compat mode. Check
1323 * for these here too.
1325 .Lerror_kernelspace:
1327 leaq native_irq_return_iret(%rip), %rcx
1328 cmpq %rcx, RIP+8(%rsp)
1330 movl %ecx, %eax /* zero extend */
1331 cmpq %rax, RIP+8(%rsp)
1333 cmpq $.Lgs_change, RIP+8(%rsp)
1334 jne .Lerror_entry_done
1337 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1338 * gsbase and proceed. We'll fix up the exception and land in
1339 * .Lgs_change's error handler with kernel gsbase.
1342 jmp .Lerror_entry_done
1345 /* Fix truncated RIP */
1346 movq %rcx, RIP+8(%rsp)
1351 * We came from an IRET to user mode, so we have user gsbase.
1352 * Switch to kernel gsbase:
1357 * Pretend that the exception came from user mode: set up pt_regs
1358 * as if we faulted immediately after IRET and clear EBX so that
1359 * error_exit knows that we will be returning to user mode.
1365 jmp .Lerror_entry_from_usermode_after_swapgs
1370 * On entry, EBX is a "return to kernel mode" flag:
1371 * 1: already in kernel mode, don't need SWAPGS
1372 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1376 DISABLE_INTERRUPTS(CLBR_ANY)
1384 * Runs on exception stack. Xen PV does not go through this path at all,
1385 * so we can use real assembly here.
1388 UNWIND_HINT_IRET_REGS
1391 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1392 * the iretq it performs will take us out of NMI context.
1393 * This means that we can have nested NMIs where the next
1394 * NMI is using the top of the stack of the previous NMI. We
1395 * can't let it execute because the nested NMI will corrupt the
1396 * stack of the previous NMI. NMI handlers are not re-entrant
1399 * To handle this case we do the following:
1400 * Check the a special location on the stack that contains
1401 * a variable that is set when NMIs are executing.
1402 * The interrupted task's stack is also checked to see if it
1404 * If the variable is not set and the stack is not the NMI
1406 * o Set the special variable on the stack
1407 * o Copy the interrupt frame into an "outermost" location on the
1409 * o Copy the interrupt frame into an "iret" location on the stack
1410 * o Continue processing the NMI
1411 * If the variable is set or the previous stack is the NMI stack:
1412 * o Modify the "iret" location to jump to the repeat_nmi
1413 * o return back to the first NMI
1415 * Now on exit of the first NMI, we first clear the stack variable
1416 * The NMI stack will tell any nested NMIs at that point that it is
1417 * nested. Then we pop the stack normally with iret, and if there was
1418 * a nested NMI that updated the copy interrupt stack frame, a
1419 * jump will be made to the repeat_nmi code that will handle the second
1422 * However, espfix prevents us from directly returning to userspace
1423 * with a single IRET instruction. Similarly, IRET to user mode
1424 * can fault. We therefore handle NMIs from user space like
1425 * other IST entries.
1430 /* Use %rdx as our temp variable throughout */
1433 testb $3, CS-RIP+8(%rsp)
1434 jz .Lnmi_from_kernel
1437 * NMI from user mode. We need to run on the thread stack, but we
1438 * can't go through the normal entry paths: NMIs are masked, and
1439 * we don't want to enable interrupts, because then we'll end
1440 * up in an awkward situation in which IRQs are on but NMIs
1443 * We also must not push anything to the stack before switching
1444 * stacks lest we corrupt the "NMI executing" variable.
1450 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1451 UNWIND_HINT_IRET_REGS base=%rdx offset=8
1452 pushq 5*8(%rdx) /* pt_regs->ss */
1453 pushq 4*8(%rdx) /* pt_regs->rsp */
1454 pushq 3*8(%rdx) /* pt_regs->flags */
1455 pushq 2*8(%rdx) /* pt_regs->cs */
1456 pushq 1*8(%rdx) /* pt_regs->rip */
1457 UNWIND_HINT_IRET_REGS
1458 pushq $-1 /* pt_regs->orig_ax */
1459 pushq %rdi /* pt_regs->di */
1460 pushq %rsi /* pt_regs->si */
1461 pushq (%rdx) /* pt_regs->dx */
1462 pushq %rcx /* pt_regs->cx */
1463 pushq %rax /* pt_regs->ax */
1464 pushq %r8 /* pt_regs->r8 */
1465 pushq %r9 /* pt_regs->r9 */
1466 pushq %r10 /* pt_regs->r10 */
1467 pushq %r11 /* pt_regs->r11 */
1468 pushq %rbx /* pt_regs->rbx */
1469 pushq %rbp /* pt_regs->rbp */
1470 pushq %r12 /* pt_regs->r12 */
1471 pushq %r13 /* pt_regs->r13 */
1472 pushq %r14 /* pt_regs->r14 */
1473 pushq %r15 /* pt_regs->r15 */
1475 ENCODE_FRAME_POINTER
1478 * At this point we no longer need to worry about stack damage
1479 * due to nesting -- we're on the normal thread stack and we're
1480 * done with the NMI stack.
1488 * Return back to user mode. We must *not* do the normal exit
1489 * work, because we don't want to enable interrupts.
1491 jmp swapgs_restore_regs_and_return_to_usermode
1495 * Here's what our stack frame will look like:
1496 * +---------------------------------------------------------+
1498 * | original Return RSP |
1499 * | original RFLAGS |
1502 * +---------------------------------------------------------+
1503 * | temp storage for rdx |
1504 * +---------------------------------------------------------+
1505 * | "NMI executing" variable |
1506 * +---------------------------------------------------------+
1507 * | iret SS } Copied from "outermost" frame |
1508 * | iret Return RSP } on each loop iteration; overwritten |
1509 * | iret RFLAGS } by a nested NMI to force another |
1510 * | iret CS } iteration if needed. |
1512 * +---------------------------------------------------------+
1513 * | outermost SS } initialized in first_nmi; |
1514 * | outermost Return RSP } will not be changed before |
1515 * | outermost RFLAGS } NMI processing is done. |
1516 * | outermost CS } Copied to "iret" frame on each |
1517 * | outermost RIP } iteration. |
1518 * +---------------------------------------------------------+
1520 * +---------------------------------------------------------+
1522 * The "original" frame is used by hardware. Before re-enabling
1523 * NMIs, we need to be done with it, and we need to leave enough
1524 * space for the asm code here.
1526 * We return by executing IRET while RSP points to the "iret" frame.
1527 * That will either return for real or it will loop back into NMI
1530 * The "outermost" frame is copied to the "iret" frame on each
1531 * iteration of the loop, so each iteration starts with the "iret"
1532 * frame pointing to the final return target.
1536 * Determine whether we're a nested NMI.
1538 * If we interrupted kernel code between repeat_nmi and
1539 * end_repeat_nmi, then we are a nested NMI. We must not
1540 * modify the "iret" frame because it's being written by
1541 * the outer NMI. That's okay; the outer NMI handler is
1542 * about to about to call do_nmi anyway, so we can just
1543 * resume the outer NMI.
1546 movq $repeat_nmi, %rdx
1549 movq $end_repeat_nmi, %rdx
1555 * Now check "NMI executing". If it's set, then we're nested.
1556 * This will not detect if we interrupted an outer NMI just
1563 * Now test if the previous stack was an NMI stack. This covers
1564 * the case where we interrupt an outer NMI after it clears
1565 * "NMI executing" but before IRET. We need to be careful, though:
1566 * there is one case in which RSP could point to the NMI stack
1567 * despite there being no NMI active: naughty userspace controls
1568 * RSP at the very beginning of the SYSCALL targets. We can
1569 * pull a fast one on naughty userspace, though: we program
1570 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1571 * if it controls the kernel's RSP. We set DF before we clear
1575 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1576 cmpq %rdx, 4*8(%rsp)
1577 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1580 subq $EXCEPTION_STKSZ, %rdx
1581 cmpq %rdx, 4*8(%rsp)
1582 /* If it is below the NMI stack, it is a normal NMI */
1585 /* Ah, it is within the NMI stack. */
1587 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1588 jz first_nmi /* RSP was user controlled. */
1590 /* This is a nested NMI. */
1594 * Modify the "iret" frame to point to repeat_nmi, forcing another
1595 * iteration of NMI handling.
1598 leaq -10*8(%rsp), %rdx
1605 /* Put stack back */
1611 /* We are returning to kernel mode, so this cannot result in a fault. */
1618 /* Make room for "NMI executing". */
1621 /* Leave room for the "iret" frame */
1624 /* Copy the "original" frame to the "outermost" frame */
1628 UNWIND_HINT_IRET_REGS
1630 /* Everything up to here is safe from nested NMIs */
1632 #ifdef CONFIG_DEBUG_ENTRY
1634 * For ease of testing, unmask NMIs right away. Disabled by
1635 * default because IRET is very expensive.
1638 pushq %rsp /* RSP (minus 8 because of the previous push) */
1639 addq $8, (%rsp) /* Fix up RSP */
1641 pushq $__KERNEL_CS /* CS */
1643 iretq /* continues at repeat_nmi below */
1644 UNWIND_HINT_IRET_REGS
1650 * If there was a nested NMI, the first NMI's iret will return
1651 * here. But NMIs are still enabled and we can take another
1652 * nested NMI. The nested NMI checks the interrupted RIP to see
1653 * if it is between repeat_nmi and end_repeat_nmi, and if so
1654 * it will just return, as we are about to repeat an NMI anyway.
1655 * This makes it safe to copy to the stack frame that a nested
1658 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1659 * we're repeating an NMI, gsbase has the same value that it had on
1660 * the first iteration. paranoid_entry will load the kernel
1661 * gsbase if needed before we call do_nmi. "NMI executing"
1664 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1667 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1668 * here must not modify the "iret" frame while we're writing to
1669 * it or it will end up containing garbage.
1679 * Everything below this point can be preempted by a nested NMI.
1680 * If this happens, then the inner NMI will change the "iret"
1681 * frame to point back to repeat_nmi.
1683 pushq $-1 /* ORIG_RAX: no syscall to restart */
1684 ALLOC_PT_GPREGS_ON_STACK
1687 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1688 * as we should not be calling schedule in NMI context.
1689 * Even with normal interrupts enabled. An NMI should not be
1690 * setting NEED_RESCHED or anything that normal interrupts and
1691 * exceptions might do.
1696 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1701 testl %ebx, %ebx /* swapgs needed? */
1710 * Skip orig_ax and the "outermost" frame to point RSP at the "iret"
1711 * at the "iret" frame.
1716 * Clear "NMI executing". Set DF first so that we can easily
1717 * distinguish the remaining code between here and IRET from
1718 * the SYSCALL entry and exit paths.
1720 * We arguably should just inspect RIP instead, but I (Andy) wrote
1721 * this code when I had the misapprehension that Xen PV supported
1722 * NMIs, and Xen PV would break that approach.
1725 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1728 * iretq reads the "iret" frame and exits the NMI stack in a
1729 * single instruction. We are returning to kernel mode, so this
1730 * cannot result in a fault. Similarly, we don't need to worry
1731 * about espfix64 on the way back to kernel mode.
1736 ENTRY(ignore_sysret)
1742 ENTRY(rewind_stack_do_exit)
1744 /* Prevent any naive code from trying to unwind to our caller. */
1747 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1748 leaq -PTREGS_SIZE(%rax), %rsp
1749 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
1752 END(rewind_stack_do_exit)