1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PARAVIRT_H
3 #define _ASM_X86_PARAVIRT_H
4 /* Various instructions on x86 need to be replaced for
5 * para-virtualization: those hooks are defined here. */
8 #include <asm/pgtable_types.h>
11 #include <asm/paravirt_types.h>
14 #include <linux/bug.h>
15 #include <linux/types.h>
16 #include <linux/cpumask.h>
17 #include <asm/frame.h>
19 static inline void load_sp0(unsigned long sp0)
21 PVOP_VCALL1(pv_cpu_ops.load_sp0, sp0);
24 /* The paravirtualized CPUID instruction. */
25 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
26 unsigned int *ecx, unsigned int *edx)
28 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
32 * These special macros can be used to get or set a debugging register
34 static inline unsigned long paravirt_get_debugreg(int reg)
36 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
38 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
39 static inline void set_debugreg(unsigned long val, int reg)
41 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
44 static inline unsigned long read_cr0(void)
46 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
49 static inline void write_cr0(unsigned long x)
51 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
54 static inline unsigned long read_cr2(void)
56 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
59 static inline void write_cr2(unsigned long x)
61 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
64 static inline unsigned long __read_cr3(void)
66 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
69 static inline void write_cr3(unsigned long x)
71 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
74 static inline void __write_cr4(unsigned long x)
76 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
80 static inline unsigned long read_cr8(void)
82 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
85 static inline void write_cr8(unsigned long x)
87 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
91 static inline void arch_safe_halt(void)
93 PVOP_VCALL0(pv_irq_ops.safe_halt);
96 static inline void halt(void)
98 PVOP_VCALL0(pv_irq_ops.halt);
101 static inline void wbinvd(void)
103 PVOP_VCALL0(pv_cpu_ops.wbinvd);
106 #define get_kernel_rpl() (pv_info.kernel_rpl)
108 static inline u64 paravirt_read_msr(unsigned msr)
110 return PVOP_CALL1(u64, pv_cpu_ops.read_msr, msr);
113 static inline void paravirt_write_msr(unsigned msr,
114 unsigned low, unsigned high)
116 PVOP_VCALL3(pv_cpu_ops.write_msr, msr, low, high);
119 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
121 return PVOP_CALL2(u64, pv_cpu_ops.read_msr_safe, msr, err);
124 static inline int paravirt_write_msr_safe(unsigned msr,
125 unsigned low, unsigned high)
127 return PVOP_CALL3(int, pv_cpu_ops.write_msr_safe, msr, low, high);
130 #define rdmsr(msr, val1, val2) \
132 u64 _l = paravirt_read_msr(msr); \
137 #define wrmsr(msr, val1, val2) \
139 paravirt_write_msr(msr, val1, val2); \
142 #define rdmsrl(msr, val) \
144 val = paravirt_read_msr(msr); \
147 static inline void wrmsrl(unsigned msr, u64 val)
149 wrmsr(msr, (u32)val, (u32)(val>>32));
152 #define wrmsr_safe(msr, a, b) paravirt_write_msr_safe(msr, a, b)
154 /* rdmsr with exception handling */
155 #define rdmsr_safe(msr, a, b) \
158 u64 _l = paravirt_read_msr_safe(msr, &_err); \
164 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
168 *p = paravirt_read_msr_safe(msr, &err);
172 static inline unsigned long long paravirt_sched_clock(void)
174 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
178 extern struct static_key paravirt_steal_enabled;
179 extern struct static_key paravirt_steal_rq_enabled;
181 static inline u64 paravirt_steal_clock(int cpu)
183 return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
186 static inline unsigned long long paravirt_read_pmc(int counter)
188 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
191 #define rdpmc(counter, low, high) \
193 u64 _l = paravirt_read_pmc(counter); \
198 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
200 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
202 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
205 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
207 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
210 static inline void load_TR_desc(void)
212 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
214 static inline void load_gdt(const struct desc_ptr *dtr)
216 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
218 static inline void load_idt(const struct desc_ptr *dtr)
220 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
222 static inline void set_ldt(const void *addr, unsigned entries)
224 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
226 static inline unsigned long paravirt_store_tr(void)
228 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
230 #define store_tr(tr) ((tr) = paravirt_store_tr())
231 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
233 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
237 static inline void load_gs_index(unsigned int gs)
239 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
243 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
246 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
249 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
250 void *desc, int type)
252 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
255 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
257 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
259 static inline void set_iopl_mask(unsigned mask)
261 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
264 /* The paravirtualized I/O functions */
265 static inline void slow_down_io(void)
267 pv_cpu_ops.io_delay();
268 #ifdef REALLY_SLOW_IO
269 pv_cpu_ops.io_delay();
270 pv_cpu_ops.io_delay();
271 pv_cpu_ops.io_delay();
275 static inline void paravirt_activate_mm(struct mm_struct *prev,
276 struct mm_struct *next)
278 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
281 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
282 struct mm_struct *mm)
284 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
287 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
289 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
292 static inline void __flush_tlb(void)
294 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
296 static inline void __flush_tlb_global(void)
298 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
300 static inline void __flush_tlb_single(unsigned long addr)
302 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
305 static inline void flush_tlb_others(const struct cpumask *cpumask,
306 const struct flush_tlb_info *info)
308 PVOP_VCALL2(pv_mmu_ops.flush_tlb_others, cpumask, info);
311 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
313 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
316 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
318 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
321 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
323 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
325 static inline void paravirt_release_pte(unsigned long pfn)
327 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
330 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
332 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
335 static inline void paravirt_release_pmd(unsigned long pfn)
337 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
340 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
342 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
344 static inline void paravirt_release_pud(unsigned long pfn)
346 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
349 static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long pfn)
351 PVOP_VCALL2(pv_mmu_ops.alloc_p4d, mm, pfn);
354 static inline void paravirt_release_p4d(unsigned long pfn)
356 PVOP_VCALL1(pv_mmu_ops.release_p4d, pfn);
359 static inline pte_t __pte(pteval_t val)
363 if (sizeof(pteval_t) > sizeof(long))
364 ret = PVOP_CALLEE2(pteval_t,
366 val, (u64)val >> 32);
368 ret = PVOP_CALLEE1(pteval_t,
372 return (pte_t) { .pte = ret };
375 static inline pteval_t pte_val(pte_t pte)
379 if (sizeof(pteval_t) > sizeof(long))
380 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
381 pte.pte, (u64)pte.pte >> 32);
383 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
389 static inline pgd_t __pgd(pgdval_t val)
393 if (sizeof(pgdval_t) > sizeof(long))
394 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
395 val, (u64)val >> 32);
397 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
400 return (pgd_t) { ret };
403 static inline pgdval_t pgd_val(pgd_t pgd)
407 if (sizeof(pgdval_t) > sizeof(long))
408 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
409 pgd.pgd, (u64)pgd.pgd >> 32);
411 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
417 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
418 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
423 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
426 return (pte_t) { .pte = ret };
429 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
430 pte_t *ptep, pte_t pte)
432 if (sizeof(pteval_t) > sizeof(long))
434 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
436 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
437 mm, addr, ptep, pte.pte);
440 static inline void set_pte(pte_t *ptep, pte_t pte)
442 if (sizeof(pteval_t) > sizeof(long))
443 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
444 pte.pte, (u64)pte.pte >> 32);
446 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
450 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
451 pte_t *ptep, pte_t pte)
453 if (sizeof(pteval_t) > sizeof(long))
455 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
457 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
460 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
462 pmdval_t val = native_pmd_val(pmd);
464 if (sizeof(pmdval_t) > sizeof(long))
465 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
467 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
470 #if CONFIG_PGTABLE_LEVELS >= 3
471 static inline pmd_t __pmd(pmdval_t val)
475 if (sizeof(pmdval_t) > sizeof(long))
476 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
477 val, (u64)val >> 32);
479 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
482 return (pmd_t) { ret };
485 static inline pmdval_t pmd_val(pmd_t pmd)
489 if (sizeof(pmdval_t) > sizeof(long))
490 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
491 pmd.pmd, (u64)pmd.pmd >> 32);
493 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
499 static inline void set_pud(pud_t *pudp, pud_t pud)
501 pudval_t val = native_pud_val(pud);
503 if (sizeof(pudval_t) > sizeof(long))
504 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
505 val, (u64)val >> 32);
507 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
510 #if CONFIG_PGTABLE_LEVELS >= 4
511 static inline pud_t __pud(pudval_t val)
515 if (sizeof(pudval_t) > sizeof(long))
516 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
517 val, (u64)val >> 32);
519 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
522 return (pud_t) { ret };
525 static inline pudval_t pud_val(pud_t pud)
529 if (sizeof(pudval_t) > sizeof(long))
530 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
531 pud.pud, (u64)pud.pud >> 32);
533 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
539 static inline void pud_clear(pud_t *pudp)
541 set_pud(pudp, __pud(0));
544 static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
546 p4dval_t val = native_p4d_val(p4d);
548 if (sizeof(p4dval_t) > sizeof(long))
549 PVOP_VCALL3(pv_mmu_ops.set_p4d, p4dp,
550 val, (u64)val >> 32);
552 PVOP_VCALL2(pv_mmu_ops.set_p4d, p4dp,
556 #if CONFIG_PGTABLE_LEVELS >= 5
558 static inline p4d_t __p4d(p4dval_t val)
560 p4dval_t ret = PVOP_CALLEE1(p4dval_t, pv_mmu_ops.make_p4d, val);
562 return (p4d_t) { ret };
565 static inline p4dval_t p4d_val(p4d_t p4d)
567 return PVOP_CALLEE1(p4dval_t, pv_mmu_ops.p4d_val, p4d.p4d);
570 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
572 pgdval_t val = native_pgd_val(pgd);
574 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp, val);
577 static inline void pgd_clear(pgd_t *pgdp)
579 set_pgd(pgdp, __pgd(0));
582 #endif /* CONFIG_PGTABLE_LEVELS == 5 */
584 static inline void p4d_clear(p4d_t *p4dp)
586 set_p4d(p4dp, __p4d(0));
589 #endif /* CONFIG_PGTABLE_LEVELS == 4 */
591 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */
593 #ifdef CONFIG_X86_PAE
594 /* Special-case pte-setting operations for PAE, which can't update a
595 64-bit pte atomically */
596 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
598 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
599 pte.pte, pte.pte >> 32);
602 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
605 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
608 static inline void pmd_clear(pmd_t *pmdp)
610 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
612 #else /* !CONFIG_X86_PAE */
613 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
618 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
621 set_pte_at(mm, addr, ptep, __pte(0));
624 static inline void pmd_clear(pmd_t *pmdp)
626 set_pmd(pmdp, __pmd(0));
628 #endif /* CONFIG_X86_PAE */
630 #define __HAVE_ARCH_START_CONTEXT_SWITCH
631 static inline void arch_start_context_switch(struct task_struct *prev)
633 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
636 static inline void arch_end_context_switch(struct task_struct *next)
638 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
641 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
642 static inline void arch_enter_lazy_mmu_mode(void)
644 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
647 static inline void arch_leave_lazy_mmu_mode(void)
649 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
652 static inline void arch_flush_lazy_mmu_mode(void)
654 PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
657 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
658 phys_addr_t phys, pgprot_t flags)
660 pv_mmu_ops.set_fixmap(idx, phys, flags);
663 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
665 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
668 PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
671 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
673 PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
676 static __always_inline void pv_wait(u8 *ptr, u8 val)
678 PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
681 static __always_inline void pv_kick(int cpu)
683 PVOP_VCALL1(pv_lock_ops.kick, cpu);
686 static __always_inline bool pv_vcpu_is_preempted(long cpu)
688 return PVOP_CALLEE1(bool, pv_lock_ops.vcpu_is_preempted, cpu);
691 #endif /* SMP && PARAVIRT_SPINLOCKS */
694 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
695 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
697 /* save and restore all caller-save registers, except return value */
698 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
699 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
701 #define PV_FLAGS_ARG "0"
702 #define PV_EXTRA_CLOBBERS
703 #define PV_VEXTRA_CLOBBERS
705 /* save and restore all caller-save registers, except return value */
706 #define PV_SAVE_ALL_CALLER_REGS \
715 #define PV_RESTORE_ALL_CALLER_REGS \
725 /* We save some registers, but all of them, that's too much. We clobber all
726 * caller saved registers but the argument parameter */
727 #define PV_SAVE_REGS "pushq %%rdi;"
728 #define PV_RESTORE_REGS "popq %%rdi;"
729 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
730 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
731 #define PV_FLAGS_ARG "D"
735 * Generate a thunk around a function which saves all caller-save
736 * registers except for the return value. This allows C functions to
737 * be called from assembler code where fewer than normal registers are
738 * available. It may also help code generation around calls from C
739 * code if the common case doesn't use many registers.
741 * When a callee is wrapped in a thunk, the caller can assume that all
742 * arg regs and all scratch registers are preserved across the
743 * call. The return value in rax/eax will not be saved, even for void
746 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func
747 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
748 extern typeof(func) __raw_callee_save_##func; \
750 asm(".pushsection .text;" \
751 ".globl " PV_THUNK_NAME(func) ";" \
752 ".type " PV_THUNK_NAME(func) ", @function;" \
753 PV_THUNK_NAME(func) ":" \
755 PV_SAVE_ALL_CALLER_REGS \
757 PV_RESTORE_ALL_CALLER_REGS \
762 /* Get a reference to a callee-save function */
763 #define PV_CALLEE_SAVE(func) \
764 ((struct paravirt_callee_save) { __raw_callee_save_##func })
766 /* Promise that "func" already uses the right calling convention */
767 #define __PV_IS_CALLEE_SAVE(func) \
768 ((struct paravirt_callee_save) { func })
770 static inline notrace unsigned long arch_local_save_flags(void)
772 return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
775 static inline notrace void arch_local_irq_restore(unsigned long f)
777 PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
780 static inline notrace void arch_local_irq_disable(void)
782 PVOP_VCALLEE0(pv_irq_ops.irq_disable);
785 static inline notrace void arch_local_irq_enable(void)
787 PVOP_VCALLEE0(pv_irq_ops.irq_enable);
790 static inline notrace unsigned long arch_local_irq_save(void)
794 f = arch_local_save_flags();
795 arch_local_irq_disable();
800 /* Make sure as little as possible of this mess escapes. */
815 extern void default_banner(void);
817 #else /* __ASSEMBLY__ */
819 #define _PVSITE(ptype, clobbers, ops, word, algn) \
823 .pushsection .parainstructions,"a"; \
832 #define COND_PUSH(set, mask, reg) \
833 .if ((~(set)) & mask); push %reg; .endif
834 #define COND_POP(set, mask, reg) \
835 .if ((~(set)) & mask); pop %reg; .endif
839 #define PV_SAVE_REGS(set) \
840 COND_PUSH(set, CLBR_RAX, rax); \
841 COND_PUSH(set, CLBR_RCX, rcx); \
842 COND_PUSH(set, CLBR_RDX, rdx); \
843 COND_PUSH(set, CLBR_RSI, rsi); \
844 COND_PUSH(set, CLBR_RDI, rdi); \
845 COND_PUSH(set, CLBR_R8, r8); \
846 COND_PUSH(set, CLBR_R9, r9); \
847 COND_PUSH(set, CLBR_R10, r10); \
848 COND_PUSH(set, CLBR_R11, r11)
849 #define PV_RESTORE_REGS(set) \
850 COND_POP(set, CLBR_R11, r11); \
851 COND_POP(set, CLBR_R10, r10); \
852 COND_POP(set, CLBR_R9, r9); \
853 COND_POP(set, CLBR_R8, r8); \
854 COND_POP(set, CLBR_RDI, rdi); \
855 COND_POP(set, CLBR_RSI, rsi); \
856 COND_POP(set, CLBR_RDX, rdx); \
857 COND_POP(set, CLBR_RCX, rcx); \
858 COND_POP(set, CLBR_RAX, rax)
860 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
861 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
862 #define PARA_INDIRECT(addr) *addr(%rip)
864 #define PV_SAVE_REGS(set) \
865 COND_PUSH(set, CLBR_EAX, eax); \
866 COND_PUSH(set, CLBR_EDI, edi); \
867 COND_PUSH(set, CLBR_ECX, ecx); \
868 COND_PUSH(set, CLBR_EDX, edx)
869 #define PV_RESTORE_REGS(set) \
870 COND_POP(set, CLBR_EDX, edx); \
871 COND_POP(set, CLBR_ECX, ecx); \
872 COND_POP(set, CLBR_EDI, edi); \
873 COND_POP(set, CLBR_EAX, eax)
875 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
876 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
877 #define PARA_INDIRECT(addr) *%cs:addr
880 #define INTERRUPT_RETURN \
881 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
882 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
884 #define DISABLE_INTERRUPTS(clobbers) \
885 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
886 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
887 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
888 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
890 #define ENABLE_INTERRUPTS(clobbers) \
891 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
892 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
893 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
894 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
897 #define GET_CR0_INTO_EAX \
898 push %ecx; push %edx; \
899 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
901 #else /* !CONFIG_X86_32 */
904 * If swapgs is used while the userspace stack is still current,
905 * there's no way to call a pvop. The PV replacement *must* be
906 * inlined, or the swapgs instruction must be trapped and emulated.
908 #define SWAPGS_UNSAFE_STACK \
909 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
913 * Note: swapgs is very special, and in practise is either going to be
914 * implemented with a single "swapgs" instruction or something very
915 * special. Either way, we don't need to save any registers for
919 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
920 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
923 #define GET_CR2_INTO_RAX \
924 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
926 #define USERGS_SYSRET64 \
927 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
929 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
931 #ifdef CONFIG_DEBUG_ENTRY
932 #define SAVE_FLAGS(clobbers) \
933 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_save_fl), clobbers, \
934 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
935 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_save_fl); \
936 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
939 #endif /* CONFIG_X86_32 */
941 #endif /* __ASSEMBLY__ */
942 #else /* CONFIG_PARAVIRT */
943 # define default_banner x86_init_noop
945 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
946 struct mm_struct *mm)
950 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
953 #endif /* __ASSEMBLY__ */
954 #endif /* !CONFIG_PARAVIRT */
955 #endif /* _ASM_X86_PARAVIRT_H */