2 * Thermal throttle event support code (such as syslog messaging and rate
3 * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
5 * This allows consistent reporting of CPU thermal throttle events.
7 * Maintains a counter in /sys that keeps track of the number of thermal
8 * events, such that the user knows how bad the thermal problem might be
9 * (since the logging to syslog and mcelog is rate limited).
11 * Author: Dmitriy Zavin (dmitriyz@google.com)
13 * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
14 * Inspired by Ross Biro's and Al Borchers' counter code.
16 #include <linux/interrupt.h>
17 #include <linux/notifier.h>
18 #include <linux/jiffies.h>
19 #include <linux/kernel.h>
20 #include <linux/percpu.h>
21 #include <linux/export.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/smp.h>
25 #include <linux/cpu.h>
27 #include <asm/processor.h>
31 #include <asm/trace/irq_vectors.h>
33 /* How long to wait between reporting thermal events */
34 #define CHECK_INTERVAL (300 * HZ)
36 #define THERMAL_THROTTLING_EVENT 0
37 #define POWER_LIMIT_EVENT 1
40 * Current thermal event state:
42 struct _thermal_state {
47 unsigned long last_count;
50 struct thermal_state {
51 struct _thermal_state core_throttle;
52 struct _thermal_state core_power_limit;
53 struct _thermal_state package_throttle;
54 struct _thermal_state package_power_limit;
55 struct _thermal_state core_thresh0;
56 struct _thermal_state core_thresh1;
57 struct _thermal_state pkg_thresh0;
58 struct _thermal_state pkg_thresh1;
61 /* Callback to handle core threshold interrupts */
62 int (*platform_thermal_notify)(__u64 msr_val);
63 EXPORT_SYMBOL(platform_thermal_notify);
65 /* Callback to handle core package threshold_interrupts */
66 int (*platform_thermal_package_notify)(__u64 msr_val);
67 EXPORT_SYMBOL_GPL(platform_thermal_package_notify);
69 /* Callback support of rate control, return true, if
70 * callback has rate control */
71 bool (*platform_thermal_package_rate_control)(void);
72 EXPORT_SYMBOL_GPL(platform_thermal_package_rate_control);
75 static DEFINE_PER_CPU(struct thermal_state, thermal_state);
77 static atomic_t therm_throt_en = ATOMIC_INIT(0);
79 static u32 lvtthmr_init __read_mostly;
82 #define define_therm_throt_device_one_ro(_name) \
83 static DEVICE_ATTR(_name, 0444, \
84 therm_throt_device_show_##_name, \
87 #define define_therm_throt_device_show_func(event, name) \
89 static ssize_t therm_throt_device_show_##event##_##name( \
91 struct device_attribute *attr, \
94 unsigned int cpu = dev->id; \
97 preempt_disable(); /* CPU hotplug */ \
98 if (cpu_online(cpu)) { \
99 ret = sprintf(buf, "%lu\n", \
100 per_cpu(thermal_state, cpu).event.name); \
108 define_therm_throt_device_show_func(core_throttle, count);
109 define_therm_throt_device_one_ro(core_throttle_count);
111 define_therm_throt_device_show_func(core_power_limit, count);
112 define_therm_throt_device_one_ro(core_power_limit_count);
114 define_therm_throt_device_show_func(package_throttle, count);
115 define_therm_throt_device_one_ro(package_throttle_count);
117 define_therm_throt_device_show_func(package_power_limit, count);
118 define_therm_throt_device_one_ro(package_power_limit_count);
120 static struct attribute *thermal_throttle_attrs[] = {
121 &dev_attr_core_throttle_count.attr,
125 static struct attribute_group thermal_attr_group = {
126 .attrs = thermal_throttle_attrs,
127 .name = "thermal_throttle"
129 #endif /* CONFIG_SYSFS */
132 #define PACKAGE_LEVEL 1
135 * therm_throt_process - Process thermal throttling event from interrupt
136 * @curr: Whether the condition is current or not (boolean), since the
137 * thermal interrupt normally gets called both when the thermal
138 * event begins and once the event has ended.
140 * This function is called by the thermal interrupt after the
141 * IRQ has been acknowledged.
143 * It will take care of rate limiting and printing messages to the syslog.
145 * Returns: 0 : Event should NOT be further logged, i.e. still in
146 * "timeout" from previous log message.
147 * 1 : Event should be logged further, and a message has been
148 * printed to the syslog.
150 static int therm_throt_process(bool new_event, int event, int level)
152 struct _thermal_state *state;
153 unsigned int this_cpu = smp_processor_id();
156 struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
158 now = get_jiffies_64();
159 if (level == CORE_LEVEL) {
160 if (event == THERMAL_THROTTLING_EVENT)
161 state = &pstate->core_throttle;
162 else if (event == POWER_LIMIT_EVENT)
163 state = &pstate->core_power_limit;
166 } else if (level == PACKAGE_LEVEL) {
167 if (event == THERMAL_THROTTLING_EVENT)
168 state = &pstate->package_throttle;
169 else if (event == POWER_LIMIT_EVENT)
170 state = &pstate->package_power_limit;
176 old_event = state->new_event;
177 state->new_event = new_event;
182 if (time_before64(now, state->next_check) &&
183 state->count != state->last_count)
186 state->next_check = now + CHECK_INTERVAL;
187 state->last_count = state->count;
189 /* if we just entered the thermal event */
191 if (event == THERMAL_THROTTLING_EVENT)
192 pr_crit("CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
194 level == CORE_LEVEL ? "Core" : "Package",
199 if (event == THERMAL_THROTTLING_EVENT)
200 pr_info("CPU%d: %s temperature/speed normal\n", this_cpu,
201 level == CORE_LEVEL ? "Core" : "Package");
208 static int thresh_event_valid(int level, int event)
210 struct _thermal_state *state;
211 unsigned int this_cpu = smp_processor_id();
212 struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
213 u64 now = get_jiffies_64();
215 if (level == PACKAGE_LEVEL)
216 state = (event == 0) ? &pstate->pkg_thresh0 :
217 &pstate->pkg_thresh1;
219 state = (event == 0) ? &pstate->core_thresh0 :
220 &pstate->core_thresh1;
222 if (time_before64(now, state->next_check))
225 state->next_check = now + CHECK_INTERVAL;
230 static bool int_pln_enable;
231 static int __init int_pln_enable_setup(char *s)
233 int_pln_enable = true;
237 __setup("int_pln_enable", int_pln_enable_setup);
240 /* Add/Remove thermal_throttle interface for CPU device: */
241 static int thermal_throttle_add_dev(struct device *dev, unsigned int cpu)
244 struct cpuinfo_x86 *c = &cpu_data(cpu);
246 err = sysfs_create_group(&dev->kobj, &thermal_attr_group);
250 if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
251 err = sysfs_add_file_to_group(&dev->kobj,
252 &dev_attr_core_power_limit_count.attr,
253 thermal_attr_group.name);
254 if (cpu_has(c, X86_FEATURE_PTS)) {
255 err = sysfs_add_file_to_group(&dev->kobj,
256 &dev_attr_package_throttle_count.attr,
257 thermal_attr_group.name);
258 if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
259 err = sysfs_add_file_to_group(&dev->kobj,
260 &dev_attr_package_power_limit_count.attr,
261 thermal_attr_group.name);
267 static void thermal_throttle_remove_dev(struct device *dev)
269 sysfs_remove_group(&dev->kobj, &thermal_attr_group);
272 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
273 static int thermal_throttle_online(unsigned int cpu)
275 struct device *dev = get_cpu_device(cpu);
277 return thermal_throttle_add_dev(dev, cpu);
280 static int thermal_throttle_offline(unsigned int cpu)
282 struct device *dev = get_cpu_device(cpu);
284 thermal_throttle_remove_dev(dev);
288 static __init int thermal_throttle_init_device(void)
292 if (!atomic_read(&therm_throt_en))
295 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/therm:online",
296 thermal_throttle_online,
297 thermal_throttle_offline);
298 return ret < 0 ? ret : 0;
300 device_initcall(thermal_throttle_init_device);
302 #endif /* CONFIG_SYSFS */
304 static void notify_package_thresholds(__u64 msr_val)
306 bool notify_thres_0 = false;
307 bool notify_thres_1 = false;
309 if (!platform_thermal_package_notify)
312 /* lower threshold check */
313 if (msr_val & THERM_LOG_THRESHOLD0)
314 notify_thres_0 = true;
315 /* higher threshold check */
316 if (msr_val & THERM_LOG_THRESHOLD1)
317 notify_thres_1 = true;
319 if (!notify_thres_0 && !notify_thres_1)
322 if (platform_thermal_package_rate_control &&
323 platform_thermal_package_rate_control()) {
324 /* Rate control is implemented in callback */
325 platform_thermal_package_notify(msr_val);
329 /* lower threshold reached */
330 if (notify_thres_0 && thresh_event_valid(PACKAGE_LEVEL, 0))
331 platform_thermal_package_notify(msr_val);
332 /* higher threshold reached */
333 if (notify_thres_1 && thresh_event_valid(PACKAGE_LEVEL, 1))
334 platform_thermal_package_notify(msr_val);
337 static void notify_thresholds(__u64 msr_val)
339 /* check whether the interrupt handler is defined;
340 * otherwise simply return
342 if (!platform_thermal_notify)
345 /* lower threshold reached */
346 if ((msr_val & THERM_LOG_THRESHOLD0) &&
347 thresh_event_valid(CORE_LEVEL, 0))
348 platform_thermal_notify(msr_val);
349 /* higher threshold reached */
350 if ((msr_val & THERM_LOG_THRESHOLD1) &&
351 thresh_event_valid(CORE_LEVEL, 1))
352 platform_thermal_notify(msr_val);
355 /* Thermal transition interrupt handler */
356 static void intel_thermal_interrupt(void)
360 if (static_cpu_has(X86_FEATURE_HWP))
361 wrmsrl_safe(MSR_HWP_STATUS, 0);
363 rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
365 /* Check for violation of core thermal thresholds*/
366 notify_thresholds(msr_val);
368 if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
369 THERMAL_THROTTLING_EVENT,
371 mce_log_therm_throt_event(msr_val);
373 if (this_cpu_has(X86_FEATURE_PLN) && int_pln_enable)
374 therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
378 if (this_cpu_has(X86_FEATURE_PTS)) {
379 rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
380 /* check violations of package thermal thresholds */
381 notify_package_thresholds(msr_val);
382 therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
383 THERMAL_THROTTLING_EVENT,
385 if (this_cpu_has(X86_FEATURE_PLN) && int_pln_enable)
386 therm_throt_process(msr_val &
387 PACKAGE_THERM_STATUS_POWER_LIMIT,
393 static void unexpected_thermal_interrupt(void)
395 pr_err("CPU%d: Unexpected LVT thermal interrupt!\n",
399 static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
401 static inline void __smp_thermal_interrupt(void)
403 inc_irq_stat(irq_thermal_count);
404 smp_thermal_vector();
407 asmlinkage __visible void smp_thermal_interrupt(struct pt_regs *regs)
410 __smp_thermal_interrupt();
414 asmlinkage __visible void smp_trace_thermal_interrupt(struct pt_regs *regs)
417 trace_thermal_apic_entry(THERMAL_APIC_VECTOR);
418 __smp_thermal_interrupt();
419 trace_thermal_apic_exit(THERMAL_APIC_VECTOR);
423 /* Thermal monitoring depends on APIC, ACPI and clock modulation */
424 static int intel_thermal_supported(struct cpuinfo_x86 *c)
426 if (!boot_cpu_has(X86_FEATURE_APIC))
428 if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
433 void __init mcheck_intel_therm_init(void)
436 * This function is only called on boot CPU. Save the init thermal
437 * LVT value on BSP and use that value to restore APs' thermal LVT
438 * entry BIOS programmed later
440 if (intel_thermal_supported(&boot_cpu_data))
441 lvtthmr_init = apic_read(APIC_LVTTHMR);
444 void intel_init_thermal(struct cpuinfo_x86 *c)
446 unsigned int cpu = smp_processor_id();
450 if (!intel_thermal_supported(c))
454 * First check if its enabled already, in which case there might
455 * be some SMM goo which handles it, so we can't even put a handler
456 * since it might be delivered via SMI already:
458 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
462 * The initial value of thermal LVT entries on all APs always reads
463 * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
464 * sequence to them and LVT registers are reset to 0s except for
465 * the mask bits which are set to 1s when APs receive INIT IPI.
466 * If BIOS takes over the thermal interrupt and sets its interrupt
467 * delivery mode to SMI (not fixed), it restores the value that the
468 * BIOS has programmed on AP based on BSP's info we saved since BIOS
469 * is always setting the same value for all threads/cores.
471 if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
472 apic_write(APIC_LVTTHMR, lvtthmr_init);
475 if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
476 if (system_state == SYSTEM_BOOTING)
477 pr_debug("CPU%d: Thermal monitoring handled by SMI\n", cpu);
481 /* early Pentium M models use different method for enabling TM2 */
482 if (cpu_has(c, X86_FEATURE_TM2)) {
483 if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
484 rdmsr(MSR_THERM2_CTL, l, h);
485 if (l & MSR_THERM2_CTL_TM_SELECT)
487 } else if (l & MSR_IA32_MISC_ENABLE_TM2)
491 /* We'll mask the thermal vector in the lapic till we're ready: */
492 h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
493 apic_write(APIC_LVTTHMR, h);
495 rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
496 if (cpu_has(c, X86_FEATURE_PLN) && !int_pln_enable)
497 wrmsr(MSR_IA32_THERM_INTERRUPT,
498 (l | (THERM_INT_LOW_ENABLE
499 | THERM_INT_HIGH_ENABLE)) & ~THERM_INT_PLN_ENABLE, h);
500 else if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
501 wrmsr(MSR_IA32_THERM_INTERRUPT,
502 l | (THERM_INT_LOW_ENABLE
503 | THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h);
505 wrmsr(MSR_IA32_THERM_INTERRUPT,
506 l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);
508 if (cpu_has(c, X86_FEATURE_PTS)) {
509 rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
510 if (cpu_has(c, X86_FEATURE_PLN) && !int_pln_enable)
511 wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
512 (l | (PACKAGE_THERM_INT_LOW_ENABLE
513 | PACKAGE_THERM_INT_HIGH_ENABLE))
514 & ~PACKAGE_THERM_INT_PLN_ENABLE, h);
515 else if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
516 wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
517 l | (PACKAGE_THERM_INT_LOW_ENABLE
518 | PACKAGE_THERM_INT_HIGH_ENABLE
519 | PACKAGE_THERM_INT_PLN_ENABLE), h);
521 wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
522 l | (PACKAGE_THERM_INT_LOW_ENABLE
523 | PACKAGE_THERM_INT_HIGH_ENABLE), h);
526 smp_thermal_vector = intel_thermal_interrupt;
528 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
529 wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
531 /* Unmask the thermal vector: */
532 l = apic_read(APIC_LVTTHMR);
533 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
535 pr_info_once("CPU0: Thermal monitoring enabled (%s)\n",
536 tm2 ? "TM2" : "TM1");
538 /* enable thermal throttle processing */
539 atomic_set(&therm_throt_en, 1);