2 * AMD CPU Microcode Update Driver for Linux
4 * This driver allows to upgrade microcode on F10h AMD
7 * Copyright (C) 2008-2011 Advanced Micro Devices Inc.
8 * 2013-2016 Borislav Petkov <bp@alien8.de>
10 * Author: Peter Oruba <peter.oruba@amd.com>
13 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
16 * Copyright (C) 2013 Advanced Micro Devices, Inc.
18 * Author: Jacob Shin <jacob.shin@amd.com>
19 * Fixes: Borislav Petkov <bp@suse.de>
21 * Licensed under the terms of the GNU General Public
22 * License version 2. See file COPYING for details.
24 #define pr_fmt(fmt) "microcode: " fmt
26 #include <linux/earlycpio.h>
27 #include <linux/firmware.h>
28 #include <linux/uaccess.h>
29 #include <linux/vmalloc.h>
30 #include <linux/initrd.h>
31 #include <linux/kernel.h>
32 #include <linux/pci.h>
34 #include <asm/microcode_amd.h>
35 #include <asm/microcode.h>
36 #include <asm/processor.h>
37 #include <asm/setup.h>
41 static struct equiv_cpu_entry *equiv_cpu_table;
44 * This points to the current valid container of microcode patches which we will
45 * save from the initrd/builtin before jettisoning its contents.
52 static u32 ucode_new_rev;
53 static u8 amd_ucode_patch[PATCH_MAX_SIZE];
54 static u16 this_equiv_id;
57 * Microcode patch container file is prepended to the initrd in cpio
58 * format. See Documentation/x86/early-microcode.txt
61 ucode_path[] __maybe_unused = "kernel/x86/microcode/AuthenticAMD.bin";
63 static size_t compute_container_size(u8 *data, u32 total_size)
66 u32 *header = (u32 *)data;
68 if (header[0] != UCODE_MAGIC ||
69 header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
70 header[2] == 0) /* size */
73 size = header[2] + CONTAINER_HDR_SZ;
82 if (header[0] != UCODE_UCODE_TYPE)
86 * Sanity-check patch size.
88 patch_size = header[1];
89 if (patch_size > PATCH_MAX_SIZE)
92 size += patch_size + SECTION_HDR_SIZE;
93 data += patch_size + SECTION_HDR_SIZE;
94 total_size -= patch_size + SECTION_HDR_SIZE;
100 static inline u16 find_equiv_id(struct equiv_cpu_entry *equiv_cpu_table,
105 if (!equiv_cpu_table)
108 while (equiv_cpu_table[i].installed_cpu != 0) {
109 if (sig == equiv_cpu_table[i].installed_cpu)
110 return equiv_cpu_table[i].equiv_cpu;
118 * This scans the ucode blob for the proper container as we can have multiple
119 * containers glued together. Returns the equivalence ID from the equivalence
120 * table or 0 if none found.
123 find_proper_container(u8 *ucode, size_t size, struct container *ret_cont)
125 struct container ret = { NULL, 0 };
126 u32 eax, ebx, ecx, edx;
127 struct equiv_cpu_entry *eq;
135 header = (u32 *)data;
138 /* find equiv cpu table */
139 if (header[0] != UCODE_MAGIC ||
140 header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
141 header[2] == 0) /* size */
146 native_cpuid(&eax, &ebx, &ecx, &edx);
149 eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ);
153 /* Advance past the container header */
154 offset = header[2] + CONTAINER_HDR_SZ;
158 eq_id = find_equiv_id(eq, eax);
160 ret.size = compute_container_size(ret.data, left + offset);
163 * truncate how much we need to iterate over in the
164 * ucode update loop below
166 left = ret.size - offset;
173 * support multiple container files appended together. if this
174 * one does not have a matching equivalent cpu entry, we fast
175 * forward to the next container file.
178 header = (u32 *)data;
180 if (header[0] == UCODE_MAGIC &&
181 header[1] == UCODE_EQUIV_CPU_TABLE_TYPE)
184 offset = header[1] + SECTION_HDR_SIZE;
189 /* mark where the next microcode container file starts */
190 offset = data - (u8 *)ucode;
197 static int __apply_microcode_amd(struct microcode_amd *mc_amd)
201 native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
203 /* verify patch application was successful */
204 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
205 if (rev != mc_amd->hdr.patch_id)
212 * Early load occurs before we can vmalloc(). So we look for the microcode
213 * patch container file in initrd, traverse equivalent cpu table, look for a
214 * matching microcode patch, and update, all in initrd memory in place.
215 * When vmalloc() is available for use later -- on 64-bit during first AP load,
216 * and on 32-bit during save_microcode_in_initrd_amd() -- we can call
217 * load_microcode_amd() to save equivalent cpu table and microcode patches in
218 * kernel heap memory.
220 * Returns true if container found (sets @ret_cont), false otherwise.
222 static bool apply_microcode_early_amd(void *ucode, size_t size, bool save_patch,
223 struct container *ret_cont)
225 u8 (*patch)[PATCH_MAX_SIZE];
226 u32 rev, *header, *new_rev;
227 struct container ret;
233 new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
234 patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch);
236 new_rev = &ucode_new_rev;
237 patch = &amd_ucode_patch;
240 if (check_current_patch_level(&rev, true))
243 eq_id = find_proper_container(ucode, size, &ret);
247 this_equiv_id = eq_id;
248 header = (u32 *)ret.data;
250 /* We're pointing to an equiv table, skip over it. */
251 data = ret.data + header[2] + CONTAINER_HDR_SZ;
252 left = ret.size - (header[2] + CONTAINER_HDR_SZ);
255 struct microcode_amd *mc;
257 header = (u32 *)data;
258 if (header[0] != UCODE_UCODE_TYPE || /* type */
259 header[1] == 0) /* size */
262 mc = (struct microcode_amd *)(data + SECTION_HDR_SIZE);
264 if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id) {
266 if (!__apply_microcode_amd(mc)) {
267 rev = mc->hdr.patch_id;
271 memcpy(patch, mc, min_t(u32, header[1], PATCH_MAX_SIZE));
275 offset = header[1] + SECTION_HDR_SIZE;
286 static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family)
289 char fw_name[36] = "amd-ucode/microcode_amd.bin";
292 snprintf(fw_name, sizeof(fw_name),
293 "amd-ucode/microcode_amd_fam%.2xh.bin", family);
295 return get_builtin_firmware(cp, fw_name);
301 void __init load_ucode_amd_bsp(unsigned int family)
303 struct ucode_cpu_info *uci;
304 u32 eax, ebx, ecx, edx;
309 if (IS_ENABLED(CONFIG_X86_32)) {
310 uci = (struct ucode_cpu_info *)__pa_nodebug(ucode_cpu_info);
311 path = (const char *)__pa_nodebug(ucode_path);
314 uci = ucode_cpu_info;
319 if (!get_builtin_microcode(&cp, family))
320 cp = find_microcode_in_initrd(path, use_pa);
322 if (!(cp.data && cp.size))
325 /* Get BSP's CPUID.EAX(1), needed in load_microcode_amd() */
328 native_cpuid(&eax, &ebx, &ecx, &edx);
329 uci->cpu_sig.sig = eax;
331 apply_microcode_early_amd(cp.data, cp.size, true, NULL);
336 * On 32-bit, since AP's early load occurs before paging is turned on, we
337 * cannot traverse cpu_equiv_table and microcode_cache in kernel heap memory.
338 * So during cold boot, AP will apply_ucode_in_initrd() just like the BSP.
339 * In save_microcode_in_initrd_amd() BSP's patch is copied to amd_ucode_patch,
340 * which is used upon resume from suspend.
342 void load_ucode_amd_ap(unsigned int family)
344 struct microcode_amd *mc;
347 mc = (struct microcode_amd *)__pa_nodebug(amd_ucode_patch);
348 if (mc->hdr.patch_id && mc->hdr.processor_rev_id) {
349 __apply_microcode_amd(mc);
353 if (!get_builtin_microcode(&cp, family))
354 cp = find_microcode_in_initrd((const char *)__pa_nodebug(ucode_path), true);
356 if (!(cp.data && cp.size))
360 * This would set amd_ucode_patch above so that the following APs can
361 * use it directly instead of going down this path again.
363 apply_microcode_early_amd(cp.data, cp.size, true, NULL);
366 void load_ucode_amd_ap(unsigned int family)
368 struct equiv_cpu_entry *eq;
369 struct microcode_amd *mc;
373 /* 64-bit runs with paging enabled, thus early==false. */
374 if (check_current_patch_level(&rev, false))
377 /* First AP hasn't cached it yet, go through the blob. */
379 struct cpio_data cp = { NULL, 0, "" };
385 if (!get_builtin_microcode(&cp, family)) {
386 #ifdef CONFIG_BLK_DEV_INITRD
388 cp = find_cpio_data(ucode_path, (void *)initrd_start,
389 initrd_end - initrd_start, NULL);
391 if (!(cp.data && cp.size)) {
393 * Mark it so that other APs do not scan again
394 * for no real reason and slow down boot
402 if (!apply_microcode_early_amd(cp.data, cp.size, false, &cont)) {
408 eax = cpuid_eax(0x00000001);
409 eq = (struct equiv_cpu_entry *)(cont.data + CONTAINER_HDR_SZ);
411 eq_id = find_equiv_id(eq, eax);
415 if (eq_id == this_equiv_id) {
416 mc = (struct microcode_amd *)amd_ucode_patch;
418 if (mc && rev < mc->hdr.patch_id) {
419 if (!__apply_microcode_amd(mc))
420 ucode_new_rev = mc->hdr.patch_id;
426 * AP has a different equivalence ID than BSP, looks like
427 * mixed-steppings silicon so go through the ucode blob anew.
432 #endif /* CONFIG_X86_32 */
434 static enum ucode_state
435 load_microcode_amd(int cpu, u8 family, const u8 *data, size_t size);
437 int __init save_microcode_in_initrd_amd(unsigned int fam)
439 enum ucode_state ret;
444 if (IS_ENABLED(CONFIG_X86_32) && (cont.size != -1)) {
445 struct cpio_data cp = { NULL, 0, "" };
447 #ifdef CONFIG_BLK_DEV_INITRD
448 cp = find_cpio_data(ucode_path, (void *)initrd_start,
449 initrd_end - initrd_start, NULL);
452 if (!(cp.data && cp.size)) {
457 eq_id = find_proper_container(cp.data, cp.size, &cont);
467 ret = load_microcode_amd(smp_processor_id(), fam, cont.data, cont.size);
472 * This will be freed any msec now, stash patches for the current
473 * family and switch to patch cache for cpu hotplug, etc later.
481 void reload_ucode_amd(void)
483 struct microcode_amd *mc;
487 * early==false because this is a syscore ->resume path and by
488 * that time paging is long enabled.
490 if (check_current_patch_level(&rev, false))
493 mc = (struct microcode_amd *)amd_ucode_patch;
497 if (rev < mc->hdr.patch_id) {
498 if (!__apply_microcode_amd(mc)) {
499 ucode_new_rev = mc->hdr.patch_id;
500 pr_info("reload patch_level=0x%08x\n", ucode_new_rev);
504 static u16 __find_equiv_id(unsigned int cpu)
506 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
507 return find_equiv_id(equiv_cpu_table, uci->cpu_sig.sig);
510 static u32 find_cpu_family_by_equiv_cpu(u16 equiv_cpu)
514 BUG_ON(!equiv_cpu_table);
516 while (equiv_cpu_table[i].equiv_cpu != 0) {
517 if (equiv_cpu == equiv_cpu_table[i].equiv_cpu)
518 return equiv_cpu_table[i].installed_cpu;
525 * a small, trivial cache of per-family ucode patches
527 static struct ucode_patch *cache_find_patch(u16 equiv_cpu)
529 struct ucode_patch *p;
531 list_for_each_entry(p, µcode_cache, plist)
532 if (p->equiv_cpu == equiv_cpu)
537 static void update_cache(struct ucode_patch *new_patch)
539 struct ucode_patch *p;
541 list_for_each_entry(p, µcode_cache, plist) {
542 if (p->equiv_cpu == new_patch->equiv_cpu) {
543 if (p->patch_id >= new_patch->patch_id)
544 /* we already have the latest patch */
547 list_replace(&p->plist, &new_patch->plist);
553 /* no patch found, add it */
554 list_add_tail(&new_patch->plist, µcode_cache);
557 static void free_cache(void)
559 struct ucode_patch *p, *tmp;
561 list_for_each_entry_safe(p, tmp, µcode_cache, plist) {
562 __list_del(p->plist.prev, p->plist.next);
568 static struct ucode_patch *find_patch(unsigned int cpu)
572 equiv_id = __find_equiv_id(cpu);
576 return cache_find_patch(equiv_id);
579 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
581 struct cpuinfo_x86 *c = &cpu_data(cpu);
582 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
583 struct ucode_patch *p;
585 csig->sig = cpuid_eax(0x00000001);
586 csig->rev = c->microcode;
589 * a patch could have been loaded early, set uci->mc so that
590 * mc_bp_resume() can call apply_microcode()
593 if (p && (p->patch_id == csig->rev))
596 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
601 static unsigned int verify_patch_size(u8 family, u32 patch_size,
606 #define F1XH_MPB_MAX_SIZE 2048
607 #define F14H_MPB_MAX_SIZE 1824
608 #define F15H_MPB_MAX_SIZE 4096
609 #define F16H_MPB_MAX_SIZE 3458
613 max_size = F14H_MPB_MAX_SIZE;
616 max_size = F15H_MPB_MAX_SIZE;
619 max_size = F16H_MPB_MAX_SIZE;
622 max_size = F1XH_MPB_MAX_SIZE;
626 if (patch_size > min_t(u32, size, max_size)) {
627 pr_err("patch size mismatch\n");
635 * Those patch levels cannot be updated to newer ones and thus should be final.
637 static u32 final_levels[] = {
641 0, /* T-101 terminator */
645 * Check the current patch level on this CPU.
647 * @rev: Use it to return the patch level. It is set to 0 in the case of
651 * - true: if update should stop
654 bool check_current_patch_level(u32 *rev, bool early)
660 native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
662 if (IS_ENABLED(CONFIG_X86_32) && early)
663 levels = (u32 *)__pa_nodebug(&final_levels);
665 levels = final_levels;
667 for (i = 0; levels[i]; i++) {
668 if (lvl == levels[i]) {
681 static int apply_microcode_amd(int cpu)
683 struct cpuinfo_x86 *c = &cpu_data(cpu);
684 struct microcode_amd *mc_amd;
685 struct ucode_cpu_info *uci;
686 struct ucode_patch *p;
689 BUG_ON(raw_smp_processor_id() != cpu);
691 uci = ucode_cpu_info + cpu;
700 if (check_current_patch_level(&rev, false))
703 /* need to apply patch? */
704 if (rev >= mc_amd->hdr.patch_id) {
706 uci->cpu_sig.rev = rev;
710 if (__apply_microcode_amd(mc_amd)) {
711 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
712 cpu, mc_amd->hdr.patch_id);
715 pr_info("CPU%d: new patch_level=0x%08x\n", cpu,
716 mc_amd->hdr.patch_id);
718 uci->cpu_sig.rev = mc_amd->hdr.patch_id;
719 c->microcode = mc_amd->hdr.patch_id;
724 static int install_equiv_cpu_table(const u8 *buf)
726 unsigned int *ibuf = (unsigned int *)buf;
727 unsigned int type = ibuf[1];
728 unsigned int size = ibuf[2];
730 if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
731 pr_err("empty section/"
732 "invalid type field in container file section header\n");
736 equiv_cpu_table = vmalloc(size);
737 if (!equiv_cpu_table) {
738 pr_err("failed to allocate equivalent CPU table\n");
742 memcpy(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
744 /* add header length */
745 return size + CONTAINER_HDR_SZ;
748 static void free_equiv_cpu_table(void)
750 vfree(equiv_cpu_table);
751 equiv_cpu_table = NULL;
754 static void cleanup(void)
756 free_equiv_cpu_table();
761 * We return the current size even if some of the checks failed so that
762 * we can skip over the next patch. If we return a negative value, we
763 * signal a grave error like a memory allocation has failed and the
764 * driver cannot continue functioning normally. In such cases, we tear
765 * down everything we've used up so far and exit.
767 static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover)
769 struct microcode_header_amd *mc_hdr;
770 struct ucode_patch *patch;
771 unsigned int patch_size, crnt_size, ret;
775 patch_size = *(u32 *)(fw + 4);
776 crnt_size = patch_size + SECTION_HDR_SIZE;
777 mc_hdr = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE);
778 proc_id = mc_hdr->processor_rev_id;
780 proc_fam = find_cpu_family_by_equiv_cpu(proc_id);
782 pr_err("No patch family for equiv ID: 0x%04x\n", proc_id);
786 /* check if patch is for the current family */
787 proc_fam = ((proc_fam >> 8) & 0xf) + ((proc_fam >> 20) & 0xff);
788 if (proc_fam != family)
791 if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
792 pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n",
797 ret = verify_patch_size(family, patch_size, leftover);
799 pr_err("Patch-ID 0x%08x: size mismatch.\n", mc_hdr->patch_id);
803 patch = kzalloc(sizeof(*patch), GFP_KERNEL);
805 pr_err("Patch allocation failure.\n");
809 patch->data = kmemdup(fw + SECTION_HDR_SIZE, patch_size, GFP_KERNEL);
811 pr_err("Patch data allocation failure.\n");
816 INIT_LIST_HEAD(&patch->plist);
817 patch->patch_id = mc_hdr->patch_id;
818 patch->equiv_cpu = proc_id;
820 pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n",
821 __func__, patch->patch_id, proc_id);
823 /* ... and add to cache. */
829 static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
832 enum ucode_state ret = UCODE_ERROR;
833 unsigned int leftover;
838 offset = install_equiv_cpu_table(data);
840 pr_err("failed to create equivalent cpu table\n");
844 leftover = size - offset;
846 if (*(u32 *)fw != UCODE_UCODE_TYPE) {
847 pr_err("invalid type field in container file section header\n");
848 free_equiv_cpu_table();
853 crnt_size = verify_and_add_patch(family, fw, leftover);
858 leftover -= crnt_size;
864 static enum ucode_state
865 load_microcode_amd(int cpu, u8 family, const u8 *data, size_t size)
867 enum ucode_state ret;
869 /* free old equiv table */
870 free_equiv_cpu_table();
872 ret = __load_microcode_amd(family, data, size);
878 /* save BSP's matching patch for early load */
879 if (cpu_data(cpu).cpu_index == boot_cpu_data.cpu_index) {
880 struct ucode_patch *p = find_patch(cpu);
882 memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
883 memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data),
892 * AMD microcode firmware naming convention, up to family 15h they are in
895 * amd-ucode/microcode_amd.bin
897 * This legacy file is always smaller than 2K in size.
899 * Beginning with family 15h, they are in family-specific firmware files:
901 * amd-ucode/microcode_amd_fam15h.bin
902 * amd-ucode/microcode_amd_fam16h.bin
905 * These might be larger than 2K.
907 static enum ucode_state request_microcode_amd(int cpu, struct device *device,
910 char fw_name[36] = "amd-ucode/microcode_amd.bin";
911 struct cpuinfo_x86 *c = &cpu_data(cpu);
912 enum ucode_state ret = UCODE_NFOUND;
913 const struct firmware *fw;
915 /* reload ucode container only on the boot cpu */
916 if (!refresh_fw || c->cpu_index != boot_cpu_data.cpu_index)
920 snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
922 if (request_firmware_direct(&fw, (const char *)fw_name, device)) {
923 pr_debug("failed to load file %s\n", fw_name);
928 if (*(u32 *)fw->data != UCODE_MAGIC) {
929 pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
933 ret = load_microcode_amd(cpu, c->x86, fw->data, fw->size);
936 release_firmware(fw);
942 static enum ucode_state
943 request_microcode_user(int cpu, const void __user *buf, size_t size)
948 static void microcode_fini_cpu_amd(int cpu)
950 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
955 static struct microcode_ops microcode_amd_ops = {
956 .request_microcode_user = request_microcode_user,
957 .request_microcode_fw = request_microcode_amd,
958 .collect_cpu_info = collect_cpu_info_amd,
959 .apply_microcode = apply_microcode_amd,
960 .microcode_fini_cpu = microcode_fini_cpu_amd,
963 struct microcode_ops * __init init_amd_microcode(void)
965 struct cpuinfo_x86 *c = &boot_cpu_data;
967 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
968 pr_warn("AMD CPU family 0x%x not supported\n", c->x86);
973 pr_info_once("microcode updated early to new patch_level=0x%08x\n",
976 return µcode_amd_ops;
979 void __exit exit_amd_microcode(void)