1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/init.h>
6 #include <asm/processor-cyrix.h>
7 #include <asm/processor-flags.h>
14 cyrix_get_arr(unsigned int reg, unsigned long *base,
15 unsigned long *size, mtrr_type * type)
17 unsigned char arr, ccr3, rcr, shift;
20 arr = CX86_ARR_BASE + (reg << 1) + reg; /* avoid multiplication by 3 */
22 local_irq_save(flags);
24 ccr3 = getCx86(CX86_CCR3);
25 setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
26 ((unsigned char *)base)[3] = getCx86(arr);
27 ((unsigned char *)base)[2] = getCx86(arr + 1);
28 ((unsigned char *)base)[1] = getCx86(arr + 2);
29 rcr = getCx86(CX86_RCR_BASE + reg);
30 setCx86(CX86_CCR3, ccr3); /* disable MAPEN */
32 local_irq_restore(flags);
34 shift = ((unsigned char *) base)[1] & 0x0f;
38 * Power of two, at least 4K on ARR0-ARR6, 256K on ARR7
39 * Note: shift==0xf means 4G, this is unsupported.
42 *size = (reg < 7 ? 0x1UL : 0x40UL) << (shift - 1);
46 /* Bit 0 is Cache Enable on ARR7, Cache Disable on ARR0-ARR6 */
50 *type = MTRR_TYPE_UNCACHABLE;
53 *type = MTRR_TYPE_WRBACK;
56 *type = MTRR_TYPE_WRCOMB;
60 *type = MTRR_TYPE_WRTHROUGH;
66 *type = MTRR_TYPE_UNCACHABLE;
69 *type = MTRR_TYPE_WRCOMB;
72 *type = MTRR_TYPE_WRBACK;
76 *type = MTRR_TYPE_WRTHROUGH;
83 * cyrix_get_free_region - get a free ARR.
85 * @base: the starting (base) address of the region.
86 * @size: the size (in bytes) of the region.
88 * Returns: the index of the region on success, else -1 on error.
91 cyrix_get_free_region(unsigned long base, unsigned long size, int replace_reg)
93 unsigned long lbase, lsize;
97 switch (replace_reg) {
101 /* Else, fall through */
112 /* If we are to set up a region >32M then look at ARR7 immediately */
114 cyrix_get_arr(7, &lbase, &lsize, <ype);
117 /* Else try ARR0-ARR6 first */
119 for (i = 0; i < 7; i++) {
120 cyrix_get_arr(i, &lbase, &lsize, <ype);
125 * ARR0-ARR6 isn't free
126 * try ARR7 but its size must be at least 256K
128 cyrix_get_arr(i, &lbase, &lsize, <ype);
129 if ((lsize == 0) && (size >= 0x40))
135 static u32 cr4, ccr3;
137 static void prepare_set(void)
141 /* Save value of CR4 and clear Page Global Enable (bit 7) */
142 if (boot_cpu_has(X86_FEATURE_PGE)) {
144 __write_cr4(cr4 & ~X86_CR4_PGE);
148 * Disable and flush caches.
149 * Note that wbinvd flushes the TLBs as a side-effect
151 cr0 = read_cr0() | X86_CR0_CD;
156 /* Cyrix ARRs - everything else was excluded at the top */
157 ccr3 = getCx86(CX86_CCR3);
159 /* Cyrix ARRs - everything else was excluded at the top */
160 setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10);
163 static void post_set(void)
165 /* Flush caches and TLBs */
168 /* Cyrix ARRs - everything else was excluded at the top */
169 setCx86(CX86_CCR3, ccr3);
172 write_cr0(read_cr0() & ~X86_CR0_CD);
174 /* Restore value of CR4 */
175 if (boot_cpu_has(X86_FEATURE_PGE))
179 static void cyrix_set_arr(unsigned int reg, unsigned long base,
180 unsigned long size, mtrr_type type)
182 unsigned char arr, arr_type, arr_size;
184 arr = CX86_ARR_BASE + (reg << 1) + reg; /* avoid multiplication by 3 */
186 /* count down from 32M (ARR0-ARR6) or from 2G (ARR7) */
190 size &= 0x7fff; /* make sure arr_size <= 14 */
191 for (arr_size = 0; size; arr_size++, size >>= 1)
196 case MTRR_TYPE_UNCACHABLE:
199 case MTRR_TYPE_WRCOMB:
202 case MTRR_TYPE_WRTHROUGH:
211 case MTRR_TYPE_UNCACHABLE:
214 case MTRR_TYPE_WRCOMB:
217 case MTRR_TYPE_WRTHROUGH:
229 setCx86(arr + 0, ((unsigned char *)&base)[3]);
230 setCx86(arr + 1, ((unsigned char *)&base)[2]);
231 setCx86(arr + 2, (((unsigned char *)&base)[1]) | arr_size);
232 setCx86(CX86_RCR_BASE + reg, arr_type);
243 static arr_state_t arr_state[8] = {
244 {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL},
245 {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}
248 static unsigned char ccr_state[7] = { 0, 0, 0, 0, 0, 0, 0 };
250 static void cyrix_set_all(void)
256 /* the CCRs are not contiguous */
257 for (i = 0; i < 4; i++)
258 setCx86(CX86_CCR0 + i, ccr_state[i]);
260 setCx86(CX86_CCR4 + i, ccr_state[i]);
262 for (i = 0; i < 8; i++) {
263 cyrix_set_arr(i, arr_state[i].base,
264 arr_state[i].size, arr_state[i].type);
270 static const struct mtrr_ops cyrix_mtrr_ops = {
271 .vendor = X86_VENDOR_CYRIX,
272 .set_all = cyrix_set_all,
273 .set = cyrix_set_arr,
274 .get = cyrix_get_arr,
275 .get_free_region = cyrix_get_free_region,
276 .validate_add_page = generic_validate_add_page,
277 .have_wrcomb = positive_have_wrcomb,
280 int __init cyrix_init_mtrr(void)
282 set_mtrr_ops(&cyrix_mtrr_ops);