arch/x86/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
   4  *
   5  *    MandrakeSoft S.A.
   6  *    43, rue d'Aboukir
   7  *    75002 Paris - France
   8  *    http://www.linux-mandrake.com/
   9  *    http://www.mandrakesoft.com/
  10  *
  11  *  This library is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU Lesser General Public
  13  *  License as published by the Free Software Foundation; either
  14  *  version 2 of the License, or (at your option) any later version.
  15  *
  16  *  This library is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  Lesser General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU Lesser General Public
  22  *  License along with this library; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  *  Yunhong Jiang <yunhong.jiang@intel.com>
  26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  27  *  Based on Xen 3.1 code.
  28  */
  29
  30 #include <linux/kvm_host.h>
  31 #include <linux/kvm.h>
  32 #include <linux/mm.h>
  33 #include <linux/highmem.h>
  34 #include <linux/smp.h>
  35 #include <linux/hrtimer.h>
  36 #include <linux/io.h>
  37 #include <linux/slab.h>
  38 #include <linux/export.h>
  39 #include <linux/nospec.h>
  40 #include <asm/processor.h>
  41 #include <asm/page.h>
  42 #include <asm/current.h>
  43 #include <trace/events/kvm.h>
  44
  45 #include "ioapic.h"
  46 #include "lapic.h"
  47 #include "irq.h"
  48
  49 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
  50                 bool line_status);
  51
  52 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
  53                                           unsigned long addr,
  54                                           unsigned long length)
  55 {
  56         unsigned long result = 0;
  57
  58         switch (ioapic->ioregsel) {
  59         case IOAPIC_REG_VERSION:
  60                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  61                           | (IOAPIC_VERSION_ID & 0xff));
  62                 break;
  63
  64         case IOAPIC_REG_APIC_ID:
  65         case IOAPIC_REG_ARB_ID:
  66                 result = ((ioapic->id & 0xf) << 24);
  67                 break;
  68
  69         default:
  70                 {
  71                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  72                         u64 redir_content = ~0ULL;
  73
  74                         if (redir_index < IOAPIC_NUM_PINS) {
  75                                 u32 index = array_index_nospec(
  76                                         redir_index, IOAPIC_NUM_PINS);
  77
  78                                 redir_content = ioapic->redirtbl[index].bits;
  79                         }
  80
  81                         result = (ioapic->ioregsel & 0x1) ?
  82                             (redir_content >> 32) & 0xffffffff :
  83                             redir_content & 0xffffffff;
  84                         break;
  85                 }
  86         }
  87
  88         return result;
  89 }
  90
  91 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
  92 {
  93         ioapic->rtc_status.pending_eoi = 0;
  94         bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPU_ID);
  95 }
  96
  97 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
  98
  99 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
 100 {
 101         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
 102                 kvm_rtc_eoi_tracking_restore_all(ioapic);
 103 }
 104
 105 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 106 {
 107         bool new_val, old_val;
 108         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 109         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 110         union kvm_ioapic_redirect_entry *e;
 111
 112         e = &ioapic->redirtbl[RTC_GSI];
 113         if (!kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT,
 114                                  e->fields.dest_id,
 115                                  kvm_lapic_irq_dest_mode(!!e->fields.dest_mode)))
 116                 return;
 117
 118         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
 119         old_val = test_bit(vcpu->vcpu_id, dest_map->map);
 120
 121         if (new_val == old_val)
 122                 return;
 123
 124         if (new_val) {
 125                 __set_bit(vcpu->vcpu_id, dest_map->map);
 126                 dest_map->vectors[vcpu->vcpu_id] = e->fields.vector;
 127                 ioapic->rtc_status.pending_eoi++;
 128         } else {
 129                 __clear_bit(vcpu->vcpu_id, dest_map->map);
 130                 ioapic->rtc_status.pending_eoi--;
 131                 rtc_status_pending_eoi_check_valid(ioapic);
 132         }
 133 }
 134
 135 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 136 {
 137         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 138
 139         spin_lock(&ioapic->lock);
 140         __rtc_irq_eoi_tracking_restore_one(vcpu);
 141         spin_unlock(&ioapic->lock);
 142 }
 143
 144 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 145 {
 146         struct kvm_vcpu *vcpu;
 147         int i;
 148
 149         if (RTC_GSI >= IOAPIC_NUM_PINS)
 150                 return;
 151
 152         rtc_irq_eoi_tracking_reset(ioapic);
 153         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
 154             __rtc_irq_eoi_tracking_restore_one(vcpu);
 155 }
 156
 157 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu,
 158                         int vector)
 159 {
 160         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 161
 162         /* RTC special handling */
 163         if (test_bit(vcpu->vcpu_id, dest_map->map) &&
 164             (vector == dest_map->vectors[vcpu->vcpu_id]) &&
 165             (test_and_clear_bit(vcpu->vcpu_id,
 166                                 ioapic->rtc_status.dest_map.map))) {
 167                 --ioapic->rtc_status.pending_eoi;
 168                 rtc_status_pending_eoi_check_valid(ioapic);
 169         }
 170 }
 171
 172 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
 173 {
 174         if (ioapic->rtc_status.pending_eoi > 0)
 175                 return true; /* coalesced */
 176
 177         return false;
 178 }
 179
 180 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
 181                 int irq_level, bool line_status)
 182 {
 183         union kvm_ioapic_redirect_entry entry;
 184         u32 mask = 1 << irq;
 185         u32 old_irr;
 186         int edge, ret;
 187
 188         entry = ioapic->redirtbl[irq];
 189         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
 190
 191         if (!irq_level) {
 192                 ioapic->irr &= ~mask;
 193                 ret = 1;
 194                 goto out;
 195         }
 196
 197         /*
 198          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
 199          * this only happens if a previous edge has not been delivered due
 200          * to masking.  For level interrupts, the remote_irr field tells
 201          * us if the interrupt is waiting for an EOI.
 202          *
 203          * RTC is special: it is edge-triggered, but userspace likes to know
 204          * if it has been already ack-ed via EOI because coalesced RTC
 205          * interrupts lead to time drift in Windows guests.  So we track
 206          * EOI manually for the RTC interrupt.
 207          */
 208         if (irq == RTC_GSI && line_status &&
 209                 rtc_irq_check_coalesced(ioapic)) {
 210                 ret = 0;
 211                 goto out;
 212         }
 213
 214         old_irr = ioapic->irr;
 215         ioapic->irr |= mask;
 216         if (edge) {
 217                 ioapic->irr_delivered &= ~mask;
 218                 if (old_irr == ioapic->irr) {
 219                         ret = 0;
 220                         goto out;
 221                 }
 222         }
 223
 224         ret = ioapic_service(ioapic, irq, line_status);
 225
 226 out:
 227         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
 228         return ret;
 229 }
 230
 231 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
 232 {
 233         u32 idx;
 234
 235         rtc_irq_eoi_tracking_reset(ioapic);
 236         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
 237                 ioapic_set_irq(ioapic, idx, 1, true);
 238
 239         kvm_rtc_eoi_tracking_restore_all(ioapic);
 240 }
 241
 242
 243 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
 244 {
 245         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 246         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 247         union kvm_ioapic_redirect_entry *e;
 248         int index;
 249
 250         spin_lock(&ioapic->lock);
 251
 252         /* Make sure we see any missing RTC EOI */
 253         if (test_bit(vcpu->vcpu_id, dest_map->map))
 254                 __set_bit(dest_map->vectors[vcpu->vcpu_id],
 255                           ioapic_handled_vectors);
 256
 257         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
 258                 e = &ioapic->redirtbl[index];
 259                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
 260                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
 261                     index == RTC_GSI) {
 262                         u16 dm = kvm_lapic_irq_dest_mode(!!e->fields.dest_mode);
 263
 264                         if (kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT,
 265                                                 e->fields.dest_id, dm) ||
 266                             kvm_apic_pending_eoi(vcpu, e->fields.vector))
 267                                 __set_bit(e->fields.vector,
 268                                           ioapic_handled_vectors);
 269                 }
 270         }
 271         spin_unlock(&ioapic->lock);
 272 }
 273
 274 void kvm_arch_post_irq_ack_notifier_list_update(struct kvm *kvm)
 275 {
 276         if (!ioapic_in_kernel(kvm))
 277                 return;
 278         kvm_make_scan_ioapic_request(kvm);
 279 }
 280
 281 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 282 {
 283         unsigned index;
 284         bool mask_before, mask_after;
 285         union kvm_ioapic_redirect_entry *e;
 286         unsigned long vcpu_bitmap;
 287         int old_remote_irr, old_delivery_status, old_dest_id, old_dest_mode;
 288
 289         switch (ioapic->ioregsel) {
 290         case IOAPIC_REG_VERSION:
 291                 /* Writes are ignored. */
 292                 break;
 293
 294         case IOAPIC_REG_APIC_ID:
 295                 ioapic->id = (val >> 24) & 0xf;
 296                 break;
 297
 298         case IOAPIC_REG_ARB_ID:
 299                 break;
 300
 301         default:
 302                 index = (ioapic->ioregsel - 0x10) >> 1;
 303
 304                 if (index >= IOAPIC_NUM_PINS)
 305                         return;
 306                 index = array_index_nospec(index, IOAPIC_NUM_PINS);
 307                 e = &ioapic->redirtbl[index];
 308                 mask_before = e->fields.mask;
 309                 /* Preserve read-only fields */
 310                 old_remote_irr = e->fields.remote_irr;
 311                 old_delivery_status = e->fields.delivery_status;
 312                 old_dest_id = e->fields.dest_id;
 313                 old_dest_mode = e->fields.dest_mode;
 314                 if (ioapic->ioregsel & 1) {
 315                         e->bits &= 0xffffffff;
 316                         e->bits |= (u64) val << 32;
 317                 } else {
 318                         e->bits &= ~0xffffffffULL;
 319                         e->bits |= (u32) val;
 320                 }
 321                 e->fields.remote_irr = old_remote_irr;
 322                 e->fields.delivery_status = old_delivery_status;
 323
 324                 /*
 325                  * Some OSes (Linux, Xen) assume that Remote IRR bit will
 326                  * be cleared by IOAPIC hardware when the entry is configured
 327                  * as edge-triggered. This behavior is used to simulate an
 328                  * explicit EOI on IOAPICs that don't have the EOI register.
 329                  */
 330                 if (e->fields.trig_mode == IOAPIC_EDGE_TRIG)
 331                         e->fields.remote_irr = 0;
 332
 333                 mask_after = e->fields.mask;
 334                 if (mask_before != mask_after)
 335                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
 336                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
 337                     && ioapic->irr & (1 << index))
 338                         ioapic_service(ioapic, index, false);
 339                 if (e->fields.delivery_mode == APIC_DM_FIXED) {
 340                         struct kvm_lapic_irq irq;
 341
 342                         irq.shorthand = APIC_DEST_NOSHORT;
 343                         irq.vector = e->fields.vector;
 344                         irq.delivery_mode = e->fields.delivery_mode << 8;
 345                         irq.dest_id = e->fields.dest_id;
 346                         irq.dest_mode =
 347                             kvm_lapic_irq_dest_mode(!!e->fields.dest_mode);
 348                         bitmap_zero(&vcpu_bitmap, 16);
 349                         kvm_bitmap_or_dest_vcpus(ioapic->kvm, &irq,
 350                                                  &vcpu_bitmap);
 351                         if (old_dest_mode != e->fields.dest_mode ||
 352                             old_dest_id != e->fields.dest_id) {
 353                                 /*
 354                                  * Update vcpu_bitmap with vcpus specified in
 355                                  * the previous request as well. This is done to
 356                                  * keep ioapic_handled_vectors synchronized.
 357                                  */
 358                                 irq.dest_id = old_dest_id;
 359                                 irq.dest_mode =
 360                                     kvm_lapic_irq_dest_mode(
 361                                         !!e->fields.dest_mode);
 362                                 kvm_bitmap_or_dest_vcpus(ioapic->kvm, &irq,
 363                                                          &vcpu_bitmap);
 364                         }
 365                         kvm_make_scan_ioapic_request_mask(ioapic->kvm,
 366                                                           &vcpu_bitmap);
 367                 } else {
 368                         kvm_make_scan_ioapic_request(ioapic->kvm);
 369                 }
 370                 break;
 371         }
 372 }
 373
 374 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
 375 {
 376         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 377         struct kvm_lapic_irq irqe;
 378         int ret;
 379
 380         if (entry->fields.mask ||
 381             (entry->fields.trig_mode == IOAPIC_LEVEL_TRIG &&
 382             entry->fields.remote_irr))
 383                 return -1;
 384
 385         irqe.dest_id = entry->fields.dest_id;
 386         irqe.vector = entry->fields.vector;
 387         irqe.dest_mode = kvm_lapic_irq_dest_mode(!!entry->fields.dest_mode);
 388         irqe.trig_mode = entry->fields.trig_mode;
 389         irqe.delivery_mode = entry->fields.delivery_mode << 8;
 390         irqe.level = 1;
 391         irqe.shorthand = APIC_DEST_NOSHORT;
 392         irqe.msi_redir_hint = false;
 393
 394         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
 395                 ioapic->irr_delivered |= 1 << irq;
 396
 397         if (irq == RTC_GSI && line_status) {
 398                 /*
 399                  * pending_eoi cannot ever become negative (see
 400                  * rtc_status_pending_eoi_check_valid) and the caller
 401                  * ensures that it is only called if it is >= zero, namely
 402                  * if rtc_irq_check_coalesced returns false).
 403                  */
 404                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
 405                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
 406                                                &ioapic->rtc_status.dest_map);
 407                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
 408         } else
 409                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
 410
 411         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
 412                 entry->fields.remote_irr = 1;
 413
 414         return ret;
 415 }
 416
 417 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
 418                        int level, bool line_status)
 419 {
 420         int ret, irq_level;
 421
 422         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
 423
 424         spin_lock(&ioapic->lock);
 425         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
 426                                          irq_source_id, level);
 427         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
 428
 429         spin_unlock(&ioapic->lock);
 430
 431         return ret;
 432 }
 433
 434 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
 435 {
 436         int i;
 437
 438         spin_lock(&ioapic->lock);
 439         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 440                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
 441         spin_unlock(&ioapic->lock);
 442 }
 443
 444 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
 445 {
 446         int i;
 447         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
 448                                                  eoi_inject.work);
 449         spin_lock(&ioapic->lock);
 450         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 451                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 452
 453                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
 454                         continue;
 455
 456                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
 457                         ioapic_service(ioapic, i, false);
 458         }
 459         spin_unlock(&ioapic->lock);
 460 }
 461
 462 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
 463 static void kvm_ioapic_update_eoi_one(struct kvm_vcpu *vcpu,
 464                                       struct kvm_ioapic *ioapic,
 465                                       int trigger_mode,
 466                                       int pin)
 467 {
 468         struct kvm_lapic *apic = vcpu->arch.apic;
 469         union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[pin];
 470
 471         /*
 472          * We are dropping lock while calling ack notifiers because ack
 473          * notifier callbacks for assigned devices call into IOAPIC
 474          * recursively. Since remote_irr is cleared only after call
 475          * to notifiers if the same vector will be delivered while lock
 476          * is dropped it will be put into irr and will be delivered
 477          * after ack notifier returns.
 478          */
 479         spin_unlock(&ioapic->lock);
 480         kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, pin);
 481         spin_lock(&ioapic->lock);
 482
 483         if (trigger_mode != IOAPIC_LEVEL_TRIG ||
 484             kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
 485                 return;
 486
 487         ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 488         ent->fields.remote_irr = 0;
 489         if (!ent->fields.mask && (ioapic->irr & (1 << pin))) {
 490                 ++ioapic->irq_eoi[pin];
 491                 if (ioapic->irq_eoi[pin] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
 492                         /*
 493                          * Real hardware does not deliver the interrupt
 494                          * immediately during eoi broadcast, and this
 495                          * lets a buggy guest make slow progress
 496                          * even if it does not correctly handle a
 497                          * level-triggered interrupt.  Emulate this
 498                          * behavior if we detect an interrupt storm.
 499                          */
 500                         schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
 501                         ioapic->irq_eoi[pin] = 0;
 502                         trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
 503                 } else {
 504                         ioapic_service(ioapic, pin, false);
 505                 }
 506         } else {
 507                 ioapic->irq_eoi[pin] = 0;
 508         }
 509 }
 510
 511 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
 512 {
 513         int i;
 514         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 515
 516         spin_lock(&ioapic->lock);
 517         rtc_irq_eoi(ioapic, vcpu, vector);
 518         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 519                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 520
 521                 if (ent->fields.vector != vector)
 522                         continue;
 523                 kvm_ioapic_update_eoi_one(vcpu, ioapic, trigger_mode, i);
 524         }
 525         spin_unlock(&ioapic->lock);
 526 }
 527
 528 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
 529 {
 530         return container_of(dev, struct kvm_ioapic, dev);
 531 }
 532
 533 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
 534 {
 535         return ((addr >= ioapic->base_address &&
 536                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 537 }
 538
 539 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 540                                 gpa_t addr, int len, void *val)
 541 {
 542         struct kvm_ioapic *ioapic = to_ioapic(this);
 543         u32 result;
 544         if (!ioapic_in_range(ioapic, addr))
 545                 return -EOPNOTSUPP;
 546
 547         ASSERT(!(addr & 0xf));  /* check alignment */
 548
 549         addr &= 0xff;
 550         spin_lock(&ioapic->lock);
 551         switch (addr) {
 552         case IOAPIC_REG_SELECT:
 553                 result = ioapic->ioregsel;
 554                 break;
 555
 556         case IOAPIC_REG_WINDOW:
 557                 result = ioapic_read_indirect(ioapic, addr, len);
 558                 break;
 559
 560         default:
 561                 result = 0;
 562                 break;
 563         }
 564         spin_unlock(&ioapic->lock);
 565
 566         switch (len) {
 567         case 8:
 568                 *(u64 *) val = result;
 569                 break;
 570         case 1:
 571         case 2:
 572         case 4:
 573                 memcpy(val, (char *)&result, len);
 574                 break;
 575         default:
 576                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 577         }
 578         return 0;
 579 }
 580
 581 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 582                                  gpa_t addr, int len, const void *val)
 583 {
 584         struct kvm_ioapic *ioapic = to_ioapic(this);
 585         u32 data;
 586         if (!ioapic_in_range(ioapic, addr))
 587                 return -EOPNOTSUPP;
 588
 589         ASSERT(!(addr & 0xf));  /* check alignment */
 590
 591         switch (len) {
 592         case 8:
 593         case 4:
 594                 data = *(u32 *) val;
 595                 break;
 596         case 2:
 597                 data = *(u16 *) val;
 598                 break;
 599         case 1:
 600                 data = *(u8  *) val;
 601                 break;
 602         default:
 603                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 604                 return 0;
 605         }
 606
 607         addr &= 0xff;
 608         spin_lock(&ioapic->lock);
 609         switch (addr) {
 610         case IOAPIC_REG_SELECT:
 611                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
 612                 break;
 613
 614         case IOAPIC_REG_WINDOW:
 615                 ioapic_write_indirect(ioapic, data);
 616                 break;
 617
 618         default:
 619                 break;
 620         }
 621         spin_unlock(&ioapic->lock);
 622         return 0;
 623 }
 624
 625 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 626 {
 627         int i;
 628
 629         cancel_delayed_work_sync(&ioapic->eoi_inject);
 630         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 631                 ioapic->redirtbl[i].fields.mask = 1;
 632         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 633         ioapic->ioregsel = 0;
 634         ioapic->irr = 0;
 635         ioapic->irr_delivered = 0;
 636         ioapic->id = 0;
 637         memset(ioapic->irq_eoi, 0x00, sizeof(ioapic->irq_eoi));
 638         rtc_irq_eoi_tracking_reset(ioapic);
 639 }
 640
 641 static const struct kvm_io_device_ops ioapic_mmio_ops = {
 642         .read     = ioapic_mmio_read,
 643         .write    = ioapic_mmio_write,
 644 };
 645
 646 int kvm_ioapic_init(struct kvm *kvm)
 647 {
 648         struct kvm_ioapic *ioapic;
 649         int ret;
 650
 651         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL_ACCOUNT);
 652         if (!ioapic)
 653                 return -ENOMEM;
 654         spin_lock_init(&ioapic->lock);
 655         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
 656         kvm->arch.vioapic = ioapic;
 657         kvm_ioapic_reset(ioapic);
 658         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
 659         ioapic->kvm = kvm;
 660         mutex_lock(&kvm->slots_lock);
 661         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
 662                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
 663         mutex_unlock(&kvm->slots_lock);
 664         if (ret < 0) {
 665                 kvm->arch.vioapic = NULL;
 666                 kfree(ioapic);
 667         }
 668
 669         return ret;
 670 }
 671
 672 void kvm_ioapic_destroy(struct kvm *kvm)
 673 {
 674         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 675
 676         if (!ioapic)
 677                 return;
 678
 679         cancel_delayed_work_sync(&ioapic->eoi_inject);
 680         mutex_lock(&kvm->slots_lock);
 681         kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
 682         mutex_unlock(&kvm->slots_lock);
 683         kvm->arch.vioapic = NULL;
 684         kfree(ioapic);
 685 }
 686
 687 void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 688 {
 689         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 690
 691         spin_lock(&ioapic->lock);
 692         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
 693         state->irr &= ~ioapic->irr_delivered;
 694         spin_unlock(&ioapic->lock);
 695 }
 696
 697 void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 698 {
 699         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 700
 701         spin_lock(&ioapic->lock);
 702         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
 703         ioapic->irr = 0;
 704         ioapic->irr_delivered = 0;
 705         kvm_make_scan_ioapic_request(kvm);
 706         kvm_ioapic_inject_all(ioapic, state->irr);
 707         spin_unlock(&ioapic->lock);
 708 }