2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
32 #include <linux/clocksource.h>
33 #include <linux/interrupt.h>
34 #include <linux/kvm.h>
36 #include <linux/vmalloc.h>
37 #include <linux/module.h>
38 #include <linux/mman.h>
39 #include <linux/highmem.h>
40 #include <linux/iommu.h>
41 #include <linux/intel-iommu.h>
42 #include <linux/cpufreq.h>
43 #include <linux/user-return-notifier.h>
44 #include <linux/srcu.h>
45 #include <linux/slab.h>
46 #include <linux/perf_event.h>
47 #include <linux/uaccess.h>
48 #include <linux/hash.h>
49 #include <linux/pci.h>
50 #include <linux/timekeeper_internal.h>
51 #include <linux/pvclock_gtod.h>
52 #include <trace/events/kvm.h>
54 #define CREATE_TRACE_POINTS
57 #include <asm/debugreg.h>
63 #include <asm/fpu-internal.h> /* Ugh! */
65 #include <asm/pvclock.h>
66 #include <asm/div64.h>
68 #define MAX_IO_MSRS 256
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
72 #define emul_to_vcpu(ctxt) \
73 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
76 * - enable syscall per default because its emulated by KVM
77 * - enable LME and LMA per default on 64 bit KVM
81 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
83 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
90 static void process_nmi(struct kvm_vcpu *vcpu);
91 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
93 struct kvm_x86_ops *kvm_x86_ops;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
96 static bool ignore_msrs = 0;
97 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
99 unsigned int min_timer_period_us = 500;
100 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
102 bool kvm_has_tsc_control;
103 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
104 u32 kvm_max_guest_tsc_khz;
105 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
107 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
108 static u32 tsc_tolerance_ppm = 250;
109 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
111 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
112 unsigned int lapic_timer_advance_ns = 0;
113 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
115 static bool backwards_tsc_observed = false;
117 #define KVM_NR_SHARED_MSRS 16
119 struct kvm_shared_msrs_global {
121 u32 msrs[KVM_NR_SHARED_MSRS];
124 struct kvm_shared_msrs {
125 struct user_return_notifier urn;
127 struct kvm_shared_msr_values {
130 } values[KVM_NR_SHARED_MSRS];
133 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
134 static struct kvm_shared_msrs __percpu *shared_msrs;
136 struct kvm_stats_debugfs_item debugfs_entries[] = {
137 { "pf_fixed", VCPU_STAT(pf_fixed) },
138 { "pf_guest", VCPU_STAT(pf_guest) },
139 { "tlb_flush", VCPU_STAT(tlb_flush) },
140 { "invlpg", VCPU_STAT(invlpg) },
141 { "exits", VCPU_STAT(exits) },
142 { "io_exits", VCPU_STAT(io_exits) },
143 { "mmio_exits", VCPU_STAT(mmio_exits) },
144 { "signal_exits", VCPU_STAT(signal_exits) },
145 { "irq_window", VCPU_STAT(irq_window_exits) },
146 { "nmi_window", VCPU_STAT(nmi_window_exits) },
147 { "halt_exits", VCPU_STAT(halt_exits) },
148 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
149 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
150 { "hypercalls", VCPU_STAT(hypercalls) },
151 { "request_irq", VCPU_STAT(request_irq_exits) },
152 { "irq_exits", VCPU_STAT(irq_exits) },
153 { "host_state_reload", VCPU_STAT(host_state_reload) },
154 { "efer_reload", VCPU_STAT(efer_reload) },
155 { "fpu_reload", VCPU_STAT(fpu_reload) },
156 { "insn_emulation", VCPU_STAT(insn_emulation) },
157 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
158 { "irq_injections", VCPU_STAT(irq_injections) },
159 { "nmi_injections", VCPU_STAT(nmi_injections) },
160 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
161 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
162 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
163 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
164 { "mmu_flooded", VM_STAT(mmu_flooded) },
165 { "mmu_recycled", VM_STAT(mmu_recycled) },
166 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
167 { "mmu_unsync", VM_STAT(mmu_unsync) },
168 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
169 { "largepages", VM_STAT(lpages) },
173 u64 __read_mostly host_xcr0;
175 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
177 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
180 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
181 vcpu->arch.apf.gfns[i] = ~0;
184 static void kvm_on_user_return(struct user_return_notifier *urn)
187 struct kvm_shared_msrs *locals
188 = container_of(urn, struct kvm_shared_msrs, urn);
189 struct kvm_shared_msr_values *values;
191 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
192 values = &locals->values[slot];
193 if (values->host != values->curr) {
194 wrmsrl(shared_msrs_global.msrs[slot], values->host);
195 values->curr = values->host;
198 locals->registered = false;
199 user_return_notifier_unregister(urn);
202 static void shared_msr_update(unsigned slot, u32 msr)
205 unsigned int cpu = smp_processor_id();
206 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
208 /* only read, and nobody should modify it at this time,
209 * so don't need lock */
210 if (slot >= shared_msrs_global.nr) {
211 printk(KERN_ERR "kvm: invalid MSR slot!");
214 rdmsrl_safe(msr, &value);
215 smsr->values[slot].host = value;
216 smsr->values[slot].curr = value;
219 void kvm_define_shared_msr(unsigned slot, u32 msr)
221 BUG_ON(slot >= KVM_NR_SHARED_MSRS);
222 if (slot >= shared_msrs_global.nr)
223 shared_msrs_global.nr = slot + 1;
224 shared_msrs_global.msrs[slot] = msr;
225 /* we need ensured the shared_msr_global have been updated */
228 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
230 static void kvm_shared_msr_cpu_online(void)
234 for (i = 0; i < shared_msrs_global.nr; ++i)
235 shared_msr_update(i, shared_msrs_global.msrs[i]);
238 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
240 unsigned int cpu = smp_processor_id();
241 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
244 if (((value ^ smsr->values[slot].curr) & mask) == 0)
246 smsr->values[slot].curr = value;
247 err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
251 if (!smsr->registered) {
252 smsr->urn.on_user_return = kvm_on_user_return;
253 user_return_notifier_register(&smsr->urn);
254 smsr->registered = true;
258 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
260 static void drop_user_return_notifiers(void)
262 unsigned int cpu = smp_processor_id();
263 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
265 if (smsr->registered)
266 kvm_on_user_return(&smsr->urn);
269 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
271 return vcpu->arch.apic_base;
273 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
275 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
277 u64 old_state = vcpu->arch.apic_base &
278 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
279 u64 new_state = msr_info->data &
280 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
281 u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
282 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
284 if (!msr_info->host_initiated &&
285 ((msr_info->data & reserved_bits) != 0 ||
286 new_state == X2APIC_ENABLE ||
287 (new_state == MSR_IA32_APICBASE_ENABLE &&
288 old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
289 (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
293 kvm_lapic_set_base(vcpu, msr_info->data);
296 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
298 asmlinkage __visible void kvm_spurious_fault(void)
300 /* Fault while not rebooting. We want the trace. */
303 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
305 #define EXCPT_BENIGN 0
306 #define EXCPT_CONTRIBUTORY 1
309 static int exception_class(int vector)
319 return EXCPT_CONTRIBUTORY;
326 #define EXCPT_FAULT 0
328 #define EXCPT_ABORT 2
329 #define EXCPT_INTERRUPT 3
331 static int exception_type(int vector)
335 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
336 return EXCPT_INTERRUPT;
340 /* #DB is trap, as instruction watchpoints are handled elsewhere */
341 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
344 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
347 /* Reserved exceptions will result in fault */
351 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
352 unsigned nr, bool has_error, u32 error_code,
358 kvm_make_request(KVM_REQ_EVENT, vcpu);
360 if (!vcpu->arch.exception.pending) {
362 if (has_error && !is_protmode(vcpu))
364 vcpu->arch.exception.pending = true;
365 vcpu->arch.exception.has_error_code = has_error;
366 vcpu->arch.exception.nr = nr;
367 vcpu->arch.exception.error_code = error_code;
368 vcpu->arch.exception.reinject = reinject;
372 /* to check exception */
373 prev_nr = vcpu->arch.exception.nr;
374 if (prev_nr == DF_VECTOR) {
375 /* triple fault -> shutdown */
376 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
379 class1 = exception_class(prev_nr);
380 class2 = exception_class(nr);
381 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
382 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
383 /* generate double fault per SDM Table 5-5 */
384 vcpu->arch.exception.pending = true;
385 vcpu->arch.exception.has_error_code = true;
386 vcpu->arch.exception.nr = DF_VECTOR;
387 vcpu->arch.exception.error_code = 0;
389 /* replace previous exception with a new one in a hope
390 that instruction re-execution will regenerate lost
395 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
397 kvm_multiple_exception(vcpu, nr, false, 0, false);
399 EXPORT_SYMBOL_GPL(kvm_queue_exception);
401 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
403 kvm_multiple_exception(vcpu, nr, false, 0, true);
405 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
407 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
410 kvm_inject_gp(vcpu, 0);
412 kvm_x86_ops->skip_emulated_instruction(vcpu);
414 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
416 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
418 ++vcpu->stat.pf_guest;
419 vcpu->arch.cr2 = fault->address;
420 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
422 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
424 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
426 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
427 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
429 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
431 return fault->nested_page_fault;
434 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
436 atomic_inc(&vcpu->arch.nmi_queued);
437 kvm_make_request(KVM_REQ_NMI, vcpu);
439 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
441 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
443 kvm_multiple_exception(vcpu, nr, true, error_code, false);
445 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
447 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
449 kvm_multiple_exception(vcpu, nr, true, error_code, true);
451 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
454 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
455 * a #GP and return false.
457 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
459 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
461 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
464 EXPORT_SYMBOL_GPL(kvm_require_cpl);
466 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
468 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
471 kvm_queue_exception(vcpu, UD_VECTOR);
474 EXPORT_SYMBOL_GPL(kvm_require_dr);
477 * This function will be used to read from the physical memory of the currently
478 * running guest. The difference to kvm_read_guest_page is that this function
479 * can read from guest physical or from the guest's guest physical memory.
481 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
482 gfn_t ngfn, void *data, int offset, int len,
485 struct x86_exception exception;
489 ngpa = gfn_to_gpa(ngfn);
490 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
491 if (real_gfn == UNMAPPED_GVA)
494 real_gfn = gpa_to_gfn(real_gfn);
496 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
498 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
500 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
501 void *data, int offset, int len, u32 access)
503 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
504 data, offset, len, access);
508 * Load the pae pdptrs. Return true is they are all valid.
510 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
512 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
513 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
516 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
518 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
519 offset * sizeof(u64), sizeof(pdpte),
520 PFERR_USER_MASK|PFERR_WRITE_MASK);
525 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
526 if (is_present_gpte(pdpte[i]) &&
527 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
534 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
535 __set_bit(VCPU_EXREG_PDPTR,
536 (unsigned long *)&vcpu->arch.regs_avail);
537 __set_bit(VCPU_EXREG_PDPTR,
538 (unsigned long *)&vcpu->arch.regs_dirty);
543 EXPORT_SYMBOL_GPL(load_pdptrs);
545 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
547 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
553 if (is_long_mode(vcpu) || !is_pae(vcpu))
556 if (!test_bit(VCPU_EXREG_PDPTR,
557 (unsigned long *)&vcpu->arch.regs_avail))
560 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
561 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
562 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
563 PFERR_USER_MASK | PFERR_WRITE_MASK);
566 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
572 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
574 unsigned long old_cr0 = kvm_read_cr0(vcpu);
575 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
576 X86_CR0_CD | X86_CR0_NW;
581 if (cr0 & 0xffffffff00000000UL)
585 cr0 &= ~CR0_RESERVED_BITS;
587 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
590 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
593 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
595 if ((vcpu->arch.efer & EFER_LME)) {
600 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
605 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
610 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
613 kvm_x86_ops->set_cr0(vcpu, cr0);
615 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
616 kvm_clear_async_pf_completion_queue(vcpu);
617 kvm_async_pf_hash_reset(vcpu);
620 if ((cr0 ^ old_cr0) & update_bits)
621 kvm_mmu_reset_context(vcpu);
624 EXPORT_SYMBOL_GPL(kvm_set_cr0);
626 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
628 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
630 EXPORT_SYMBOL_GPL(kvm_lmsw);
632 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
634 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
635 !vcpu->guest_xcr0_loaded) {
636 /* kvm_set_xcr() also depends on this */
637 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
638 vcpu->guest_xcr0_loaded = 1;
642 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
644 if (vcpu->guest_xcr0_loaded) {
645 if (vcpu->arch.xcr0 != host_xcr0)
646 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
647 vcpu->guest_xcr0_loaded = 0;
651 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
654 u64 old_xcr0 = vcpu->arch.xcr0;
657 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
658 if (index != XCR_XFEATURE_ENABLED_MASK)
660 if (!(xcr0 & XSTATE_FP))
662 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
666 * Do not allow the guest to set bits that we do not support
667 * saving. However, xcr0 bit 0 is always set, even if the
668 * emulated CPU does not support XSAVE (see fx_init).
670 valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
671 if (xcr0 & ~valid_bits)
674 if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
677 if (xcr0 & XSTATE_AVX512) {
678 if (!(xcr0 & XSTATE_YMM))
680 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
683 kvm_put_guest_xcr0(vcpu);
684 vcpu->arch.xcr0 = xcr0;
686 if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
687 kvm_update_cpuid(vcpu);
691 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
693 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
694 __kvm_set_xcr(vcpu, index, xcr)) {
695 kvm_inject_gp(vcpu, 0);
700 EXPORT_SYMBOL_GPL(kvm_set_xcr);
702 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
704 unsigned long old_cr4 = kvm_read_cr4(vcpu);
705 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
706 X86_CR4_PAE | X86_CR4_SMEP;
707 if (cr4 & CR4_RESERVED_BITS)
710 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
713 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
716 if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
719 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
722 if (is_long_mode(vcpu)) {
723 if (!(cr4 & X86_CR4_PAE))
725 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
726 && ((cr4 ^ old_cr4) & pdptr_bits)
727 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
731 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
732 if (!guest_cpuid_has_pcid(vcpu))
735 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
736 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
740 if (kvm_x86_ops->set_cr4(vcpu, cr4))
743 if (((cr4 ^ old_cr4) & pdptr_bits) ||
744 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
745 kvm_mmu_reset_context(vcpu);
747 if ((cr4 ^ old_cr4) & X86_CR4_SMAP)
748 update_permission_bitmask(vcpu, vcpu->arch.walk_mmu, false);
750 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
751 kvm_update_cpuid(vcpu);
755 EXPORT_SYMBOL_GPL(kvm_set_cr4);
757 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
760 cr3 &= ~CR3_PCID_INVD;
763 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
764 kvm_mmu_sync_roots(vcpu);
765 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
769 if (is_long_mode(vcpu)) {
770 if (cr3 & CR3_L_MODE_RESERVED_BITS)
772 } else if (is_pae(vcpu) && is_paging(vcpu) &&
773 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
776 vcpu->arch.cr3 = cr3;
777 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
778 kvm_mmu_new_cr3(vcpu);
781 EXPORT_SYMBOL_GPL(kvm_set_cr3);
783 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
785 if (cr8 & CR8_RESERVED_BITS)
787 if (irqchip_in_kernel(vcpu->kvm))
788 kvm_lapic_set_tpr(vcpu, cr8);
790 vcpu->arch.cr8 = cr8;
793 EXPORT_SYMBOL_GPL(kvm_set_cr8);
795 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
797 if (irqchip_in_kernel(vcpu->kvm))
798 return kvm_lapic_get_cr8(vcpu);
800 return vcpu->arch.cr8;
802 EXPORT_SYMBOL_GPL(kvm_get_cr8);
804 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
808 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
809 for (i = 0; i < KVM_NR_DB_REGS; i++)
810 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
811 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
815 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
817 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
818 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
821 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
825 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
826 dr7 = vcpu->arch.guest_debug_dr7;
828 dr7 = vcpu->arch.dr7;
829 kvm_x86_ops->set_dr7(vcpu, dr7);
830 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
831 if (dr7 & DR7_BP_EN_MASK)
832 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
835 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
837 u64 fixed = DR6_FIXED_1;
839 if (!guest_cpuid_has_rtm(vcpu))
844 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
848 vcpu->arch.db[dr] = val;
849 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
850 vcpu->arch.eff_db[dr] = val;
855 if (val & 0xffffffff00000000ULL)
857 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
858 kvm_update_dr6(vcpu);
863 if (val & 0xffffffff00000000ULL)
865 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
866 kvm_update_dr7(vcpu);
873 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
875 if (__kvm_set_dr(vcpu, dr, val)) {
876 kvm_inject_gp(vcpu, 0);
881 EXPORT_SYMBOL_GPL(kvm_set_dr);
883 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
887 *val = vcpu->arch.db[dr];
892 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
893 *val = vcpu->arch.dr6;
895 *val = kvm_x86_ops->get_dr6(vcpu);
900 *val = vcpu->arch.dr7;
905 EXPORT_SYMBOL_GPL(kvm_get_dr);
907 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
909 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
913 err = kvm_pmu_read_pmc(vcpu, ecx, &data);
916 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
917 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
920 EXPORT_SYMBOL_GPL(kvm_rdpmc);
923 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
924 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
926 * This list is modified at module load time to reflect the
927 * capabilities of the host cpu. This capabilities test skips MSRs that are
928 * kvm-specific. Those are put in the beginning of the list.
931 #define KVM_SAVE_MSRS_BEGIN 12
932 static u32 msrs_to_save[] = {
933 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
934 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
935 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
936 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
937 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
939 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
942 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
944 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
945 MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
948 static unsigned num_msrs_to_save;
950 static const u32 emulated_msrs[] = {
952 MSR_IA32_TSCDEADLINE,
953 MSR_IA32_MISC_ENABLE,
958 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
960 if (efer & efer_reserved_bits)
963 if (efer & EFER_FFXSR) {
964 struct kvm_cpuid_entry2 *feat;
966 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
967 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
971 if (efer & EFER_SVME) {
972 struct kvm_cpuid_entry2 *feat;
974 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
975 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
981 EXPORT_SYMBOL_GPL(kvm_valid_efer);
983 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
985 u64 old_efer = vcpu->arch.efer;
987 if (!kvm_valid_efer(vcpu, efer))
991 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
995 efer |= vcpu->arch.efer & EFER_LMA;
997 kvm_x86_ops->set_efer(vcpu, efer);
999 /* Update reserved bits */
1000 if ((efer ^ old_efer) & EFER_NX)
1001 kvm_mmu_reset_context(vcpu);
1006 void kvm_enable_efer_bits(u64 mask)
1008 efer_reserved_bits &= ~mask;
1010 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1013 * Writes msr value into into the appropriate "register".
1014 * Returns 0 on success, non-0 otherwise.
1015 * Assumes vcpu_load() was already called.
1017 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1019 switch (msr->index) {
1022 case MSR_KERNEL_GS_BASE:
1025 if (is_noncanonical_address(msr->data))
1028 case MSR_IA32_SYSENTER_EIP:
1029 case MSR_IA32_SYSENTER_ESP:
1031 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1032 * non-canonical address is written on Intel but not on
1033 * AMD (which ignores the top 32-bits, because it does
1034 * not implement 64-bit SYSENTER).
1036 * 64-bit code should hence be able to write a non-canonical
1037 * value on AMD. Making the address canonical ensures that
1038 * vmentry does not fail on Intel after writing a non-canonical
1039 * value, and that something deterministic happens if the guest
1040 * invokes 64-bit SYSENTER.
1042 msr->data = get_canonical(msr->data);
1044 return kvm_x86_ops->set_msr(vcpu, msr);
1046 EXPORT_SYMBOL_GPL(kvm_set_msr);
1049 * Adapt set_msr() to msr_io()'s calling convention
1051 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1053 struct msr_data msr;
1057 msr.host_initiated = true;
1058 return kvm_set_msr(vcpu, &msr);
1061 #ifdef CONFIG_X86_64
1062 struct pvclock_gtod_data {
1065 struct { /* extract of a clocksource struct */
1077 static struct pvclock_gtod_data pvclock_gtod_data;
1079 static void update_pvclock_gtod(struct timekeeper *tk)
1081 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1084 boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1086 write_seqcount_begin(&vdata->seq);
1088 /* copy pvclock gtod data */
1089 vdata->clock.vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;
1090 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
1091 vdata->clock.mask = tk->tkr_mono.mask;
1092 vdata->clock.mult = tk->tkr_mono.mult;
1093 vdata->clock.shift = tk->tkr_mono.shift;
1095 vdata->boot_ns = boot_ns;
1096 vdata->nsec_base = tk->tkr_mono.xtime_nsec;
1098 write_seqcount_end(&vdata->seq);
1102 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1105 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1106 * vcpu_enter_guest. This function is only called from
1107 * the physical CPU that is running vcpu.
1109 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1112 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1116 struct pvclock_wall_clock wc;
1117 struct timespec boot;
1122 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1127 ++version; /* first time write, random junk */
1131 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1134 * The guest calculates current wall clock time by adding
1135 * system time (updated by kvm_guest_time_update below) to the
1136 * wall clock specified here. guest system time equals host
1137 * system time for us, thus we must fill in host boot time here.
1141 if (kvm->arch.kvmclock_offset) {
1142 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1143 boot = timespec_sub(boot, ts);
1145 wc.sec = boot.tv_sec;
1146 wc.nsec = boot.tv_nsec;
1147 wc.version = version;
1149 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1152 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1155 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1157 uint32_t quotient, remainder;
1159 /* Don't try to replace with do_div(), this one calculates
1160 * "(dividend << 32) / divisor" */
1162 : "=a" (quotient), "=d" (remainder)
1163 : "0" (0), "1" (dividend), "r" (divisor) );
1167 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1168 s8 *pshift, u32 *pmultiplier)
1175 tps64 = base_khz * 1000LL;
1176 scaled64 = scaled_khz * 1000LL;
1177 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1182 tps32 = (uint32_t)tps64;
1183 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1184 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1192 *pmultiplier = div_frac(scaled64, tps32);
1194 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1195 __func__, base_khz, scaled_khz, shift, *pmultiplier);
1198 static inline u64 get_kernel_ns(void)
1200 return ktime_get_boot_ns();
1203 #ifdef CONFIG_X86_64
1204 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1207 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1208 static unsigned long max_tsc_khz;
1210 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1212 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1213 vcpu->arch.virtual_tsc_shift);
1216 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1218 u64 v = (u64)khz * (1000000 + ppm);
1223 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1225 u32 thresh_lo, thresh_hi;
1226 int use_scaling = 0;
1228 /* tsc_khz can be zero if TSC calibration fails */
1229 if (this_tsc_khz == 0)
1232 /* Compute a scale to convert nanoseconds in TSC cycles */
1233 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1234 &vcpu->arch.virtual_tsc_shift,
1235 &vcpu->arch.virtual_tsc_mult);
1236 vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1239 * Compute the variation in TSC rate which is acceptable
1240 * within the range of tolerance and decide if the
1241 * rate being applied is within that bounds of the hardware
1242 * rate. If so, no scaling or compensation need be done.
1244 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1245 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1246 if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1247 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1250 kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1253 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1255 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1256 vcpu->arch.virtual_tsc_mult,
1257 vcpu->arch.virtual_tsc_shift);
1258 tsc += vcpu->arch.this_tsc_write;
1262 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1264 #ifdef CONFIG_X86_64
1266 struct kvm_arch *ka = &vcpu->kvm->arch;
1267 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1269 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1270 atomic_read(&vcpu->kvm->online_vcpus));
1273 * Once the masterclock is enabled, always perform request in
1274 * order to update it.
1276 * In order to enable masterclock, the host clocksource must be TSC
1277 * and the vcpus need to have matched TSCs. When that happens,
1278 * perform request to enable masterclock.
1280 if (ka->use_master_clock ||
1281 (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1282 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1284 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1285 atomic_read(&vcpu->kvm->online_vcpus),
1286 ka->use_master_clock, gtod->clock.vclock_mode);
1290 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1292 u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1293 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1296 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1298 struct kvm *kvm = vcpu->kvm;
1299 u64 offset, ns, elapsed;
1300 unsigned long flags;
1303 bool already_matched;
1304 u64 data = msr->data;
1306 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1307 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1308 ns = get_kernel_ns();
1309 elapsed = ns - kvm->arch.last_tsc_nsec;
1311 if (vcpu->arch.virtual_tsc_khz) {
1314 /* n.b - signed multiplication and division required */
1315 usdiff = data - kvm->arch.last_tsc_write;
1316 #ifdef CONFIG_X86_64
1317 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1319 /* do_div() only does unsigned */
1320 asm("1: idivl %[divisor]\n"
1321 "2: xor %%edx, %%edx\n"
1322 " movl $0, %[faulted]\n"
1324 ".section .fixup,\"ax\"\n"
1325 "4: movl $1, %[faulted]\n"
1329 _ASM_EXTABLE(1b, 4b)
1331 : "=A"(usdiff), [faulted] "=r" (faulted)
1332 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1335 do_div(elapsed, 1000);
1340 /* idivl overflow => difference is larger than USEC_PER_SEC */
1342 usdiff = USEC_PER_SEC;
1344 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1347 * Special case: TSC write with a small delta (1 second) of virtual
1348 * cycle time against real time is interpreted as an attempt to
1349 * synchronize the CPU.
1351 * For a reliable TSC, we can match TSC offsets, and for an unstable
1352 * TSC, we add elapsed time in this computation. We could let the
1353 * compensation code attempt to catch up if we fall behind, but
1354 * it's better to try to match offsets from the beginning.
1356 if (usdiff < USEC_PER_SEC &&
1357 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1358 if (!check_tsc_unstable()) {
1359 offset = kvm->arch.cur_tsc_offset;
1360 pr_debug("kvm: matched tsc offset for %llu\n", data);
1362 u64 delta = nsec_to_cycles(vcpu, elapsed);
1364 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1365 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1368 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1371 * We split periods of matched TSC writes into generations.
1372 * For each generation, we track the original measured
1373 * nanosecond time, offset, and write, so if TSCs are in
1374 * sync, we can match exact offset, and if not, we can match
1375 * exact software computation in compute_guest_tsc()
1377 * These values are tracked in kvm->arch.cur_xxx variables.
1379 kvm->arch.cur_tsc_generation++;
1380 kvm->arch.cur_tsc_nsec = ns;
1381 kvm->arch.cur_tsc_write = data;
1382 kvm->arch.cur_tsc_offset = offset;
1384 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1385 kvm->arch.cur_tsc_generation, data);
1389 * We also track th most recent recorded KHZ, write and time to
1390 * allow the matching interval to be extended at each write.
1392 kvm->arch.last_tsc_nsec = ns;
1393 kvm->arch.last_tsc_write = data;
1394 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1396 vcpu->arch.last_guest_tsc = data;
1398 /* Keep track of which generation this VCPU has synchronized to */
1399 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1400 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1401 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1403 if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1404 update_ia32_tsc_adjust_msr(vcpu, offset);
1405 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1406 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1408 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1410 kvm->arch.nr_vcpus_matched_tsc = 0;
1411 } else if (!already_matched) {
1412 kvm->arch.nr_vcpus_matched_tsc++;
1415 kvm_track_tsc_matching(vcpu);
1416 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1419 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1421 #ifdef CONFIG_X86_64
1423 static cycle_t read_tsc(void)
1429 * Empirically, a fence (of type that depends on the CPU)
1430 * before rdtsc is enough to ensure that rdtsc is ordered
1431 * with respect to loads. The various CPU manuals are unclear
1432 * as to whether rdtsc can be reordered with later loads,
1433 * but no one has ever seen it happen.
1436 ret = (cycle_t)vget_cycles();
1438 last = pvclock_gtod_data.clock.cycle_last;
1440 if (likely(ret >= last))
1444 * GCC likes to generate cmov here, but this branch is extremely
1445 * predictable (it's just a funciton of time and the likely is
1446 * very likely) and there's a data dependence, so force GCC
1447 * to generate a branch instead. I don't barrier() because
1448 * we don't actually need a barrier, and if this function
1449 * ever gets inlined it will generate worse code.
1455 static inline u64 vgettsc(cycle_t *cycle_now)
1458 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1460 *cycle_now = read_tsc();
1462 v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1463 return v * gtod->clock.mult;
1466 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1468 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1474 seq = read_seqcount_begin(>od->seq);
1475 mode = gtod->clock.vclock_mode;
1476 ns = gtod->nsec_base;
1477 ns += vgettsc(cycle_now);
1478 ns >>= gtod->clock.shift;
1479 ns += gtod->boot_ns;
1480 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1486 /* returns true if host is using tsc clocksource */
1487 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1489 /* checked again under seqlock below */
1490 if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1493 return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1499 * Assuming a stable TSC across physical CPUS, and a stable TSC
1500 * across virtual CPUs, the following condition is possible.
1501 * Each numbered line represents an event visible to both
1502 * CPUs at the next numbered event.
1504 * "timespecX" represents host monotonic time. "tscX" represents
1507 * VCPU0 on CPU0 | VCPU1 on CPU1
1509 * 1. read timespec0,tsc0
1510 * 2. | timespec1 = timespec0 + N
1512 * 3. transition to guest | transition to guest
1513 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1514 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1515 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1517 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1520 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1522 * - 0 < N - M => M < N
1524 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1525 * always the case (the difference between two distinct xtime instances
1526 * might be smaller then the difference between corresponding TSC reads,
1527 * when updating guest vcpus pvclock areas).
1529 * To avoid that problem, do not allow visibility of distinct
1530 * system_timestamp/tsc_timestamp values simultaneously: use a master
1531 * copy of host monotonic time values. Update that master copy
1534 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1538 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1540 #ifdef CONFIG_X86_64
1541 struct kvm_arch *ka = &kvm->arch;
1543 bool host_tsc_clocksource, vcpus_matched;
1545 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1546 atomic_read(&kvm->online_vcpus));
1549 * If the host uses TSC clock, then passthrough TSC as stable
1552 host_tsc_clocksource = kvm_get_time_and_clockread(
1553 &ka->master_kernel_ns,
1554 &ka->master_cycle_now);
1556 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1557 && !backwards_tsc_observed
1558 && !ka->boot_vcpu_runs_old_kvmclock;
1560 if (ka->use_master_clock)
1561 atomic_set(&kvm_guest_has_master_clock, 1);
1563 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1564 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1569 static void kvm_gen_update_masterclock(struct kvm *kvm)
1571 #ifdef CONFIG_X86_64
1573 struct kvm_vcpu *vcpu;
1574 struct kvm_arch *ka = &kvm->arch;
1576 spin_lock(&ka->pvclock_gtod_sync_lock);
1577 kvm_make_mclock_inprogress_request(kvm);
1578 /* no guest entries from this point */
1579 pvclock_update_vm_gtod_copy(kvm);
1581 kvm_for_each_vcpu(i, vcpu, kvm)
1582 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1584 /* guest entries allowed */
1585 kvm_for_each_vcpu(i, vcpu, kvm)
1586 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1588 spin_unlock(&ka->pvclock_gtod_sync_lock);
1592 static int kvm_guest_time_update(struct kvm_vcpu *v)
1594 unsigned long flags, this_tsc_khz;
1595 struct kvm_vcpu_arch *vcpu = &v->arch;
1596 struct kvm_arch *ka = &v->kvm->arch;
1598 u64 tsc_timestamp, host_tsc;
1599 struct pvclock_vcpu_time_info guest_hv_clock;
1601 bool use_master_clock;
1607 * If the host uses TSC clock, then passthrough TSC as stable
1610 spin_lock(&ka->pvclock_gtod_sync_lock);
1611 use_master_clock = ka->use_master_clock;
1612 if (use_master_clock) {
1613 host_tsc = ka->master_cycle_now;
1614 kernel_ns = ka->master_kernel_ns;
1616 spin_unlock(&ka->pvclock_gtod_sync_lock);
1618 /* Keep irq disabled to prevent changes to the clock */
1619 local_irq_save(flags);
1620 this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1621 if (unlikely(this_tsc_khz == 0)) {
1622 local_irq_restore(flags);
1623 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1626 if (!use_master_clock) {
1627 host_tsc = native_read_tsc();
1628 kernel_ns = get_kernel_ns();
1631 tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1634 * We may have to catch up the TSC to match elapsed wall clock
1635 * time for two reasons, even if kvmclock is used.
1636 * 1) CPU could have been running below the maximum TSC rate
1637 * 2) Broken TSC compensation resets the base at each VCPU
1638 * entry to avoid unknown leaps of TSC even when running
1639 * again on the same CPU. This may cause apparent elapsed
1640 * time to disappear, and the guest to stand still or run
1643 if (vcpu->tsc_catchup) {
1644 u64 tsc = compute_guest_tsc(v, kernel_ns);
1645 if (tsc > tsc_timestamp) {
1646 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1647 tsc_timestamp = tsc;
1651 local_irq_restore(flags);
1653 if (!vcpu->pv_time_enabled)
1656 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1657 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1658 &vcpu->hv_clock.tsc_shift,
1659 &vcpu->hv_clock.tsc_to_system_mul);
1660 vcpu->hw_tsc_khz = this_tsc_khz;
1663 /* With all the info we got, fill in the values */
1664 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1665 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1666 vcpu->last_guest_tsc = tsc_timestamp;
1668 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1669 &guest_hv_clock, sizeof(guest_hv_clock))))
1672 /* This VCPU is paused, but it's legal for a guest to read another
1673 * VCPU's kvmclock, so we really have to follow the specification where
1674 * it says that version is odd if data is being modified, and even after
1677 * Version field updates must be kept separate. This is because
1678 * kvm_write_guest_cached might use a "rep movs" instruction, and
1679 * writes within a string instruction are weakly ordered. So there
1680 * are three writes overall.
1682 * As a small optimization, only write the version field in the first
1683 * and third write. The vcpu->pv_time cache is still valid, because the
1684 * version field is the first in the struct.
1686 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1688 vcpu->hv_clock.version = guest_hv_clock.version + 1;
1689 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1691 sizeof(vcpu->hv_clock.version));
1695 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1696 pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1698 if (vcpu->pvclock_set_guest_stopped_request) {
1699 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1700 vcpu->pvclock_set_guest_stopped_request = false;
1703 /* If the host uses TSC clocksource, then it is stable */
1704 if (use_master_clock)
1705 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1707 vcpu->hv_clock.flags = pvclock_flags;
1709 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1711 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1713 sizeof(vcpu->hv_clock));
1717 vcpu->hv_clock.version++;
1718 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1720 sizeof(vcpu->hv_clock.version));
1725 * kvmclock updates which are isolated to a given vcpu, such as
1726 * vcpu->cpu migration, should not allow system_timestamp from
1727 * the rest of the vcpus to remain static. Otherwise ntp frequency
1728 * correction applies to one vcpu's system_timestamp but not
1731 * So in those cases, request a kvmclock update for all vcpus.
1732 * We need to rate-limit these requests though, as they can
1733 * considerably slow guests that have a large number of vcpus.
1734 * The time for a remote vcpu to update its kvmclock is bound
1735 * by the delay we use to rate-limit the updates.
1738 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1740 static void kvmclock_update_fn(struct work_struct *work)
1743 struct delayed_work *dwork = to_delayed_work(work);
1744 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1745 kvmclock_update_work);
1746 struct kvm *kvm = container_of(ka, struct kvm, arch);
1747 struct kvm_vcpu *vcpu;
1749 kvm_for_each_vcpu(i, vcpu, kvm) {
1750 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1751 kvm_vcpu_kick(vcpu);
1755 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1757 struct kvm *kvm = v->kvm;
1759 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1760 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1761 KVMCLOCK_UPDATE_DELAY);
1764 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1766 static void kvmclock_sync_fn(struct work_struct *work)
1768 struct delayed_work *dwork = to_delayed_work(work);
1769 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1770 kvmclock_sync_work);
1771 struct kvm *kvm = container_of(ka, struct kvm, arch);
1773 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1774 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1775 KVMCLOCK_SYNC_PERIOD);
1778 static bool msr_mtrr_valid(unsigned msr)
1781 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1782 case MSR_MTRRfix64K_00000:
1783 case MSR_MTRRfix16K_80000:
1784 case MSR_MTRRfix16K_A0000:
1785 case MSR_MTRRfix4K_C0000:
1786 case MSR_MTRRfix4K_C8000:
1787 case MSR_MTRRfix4K_D0000:
1788 case MSR_MTRRfix4K_D8000:
1789 case MSR_MTRRfix4K_E0000:
1790 case MSR_MTRRfix4K_E8000:
1791 case MSR_MTRRfix4K_F0000:
1792 case MSR_MTRRfix4K_F8000:
1793 case MSR_MTRRdefType:
1794 case MSR_IA32_CR_PAT:
1802 static bool valid_pat_type(unsigned t)
1804 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1807 static bool valid_mtrr_type(unsigned t)
1809 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1812 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1817 if (!msr_mtrr_valid(msr))
1820 if (msr == MSR_IA32_CR_PAT) {
1821 for (i = 0; i < 8; i++)
1822 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1825 } else if (msr == MSR_MTRRdefType) {
1828 return valid_mtrr_type(data & 0xff);
1829 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1830 for (i = 0; i < 8 ; i++)
1831 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1836 /* variable MTRRs */
1837 WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
1839 mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
1840 if ((msr & 1) == 0) {
1842 if (!valid_mtrr_type(data & 0xff))
1849 kvm_inject_gp(vcpu, 0);
1855 EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
1857 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1859 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1861 if (!kvm_mtrr_valid(vcpu, msr, data))
1864 if (msr == MSR_MTRRdefType) {
1865 vcpu->arch.mtrr_state.def_type = data;
1866 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1867 } else if (msr == MSR_MTRRfix64K_00000)
1869 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1870 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1871 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1872 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1873 else if (msr == MSR_IA32_CR_PAT)
1874 vcpu->arch.pat = data;
1875 else { /* Variable MTRRs */
1876 int idx, is_mtrr_mask;
1879 idx = (msr - 0x200) / 2;
1880 is_mtrr_mask = msr - 0x200 - 2 * idx;
1883 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1886 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1890 kvm_mmu_reset_context(vcpu);
1894 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1896 u64 mcg_cap = vcpu->arch.mcg_cap;
1897 unsigned bank_num = mcg_cap & 0xff;
1900 case MSR_IA32_MCG_STATUS:
1901 vcpu->arch.mcg_status = data;
1903 case MSR_IA32_MCG_CTL:
1904 if (!(mcg_cap & MCG_CTL_P))
1906 if (data != 0 && data != ~(u64)0)
1908 vcpu->arch.mcg_ctl = data;
1911 if (msr >= MSR_IA32_MC0_CTL &&
1912 msr < MSR_IA32_MCx_CTL(bank_num)) {
1913 u32 offset = msr - MSR_IA32_MC0_CTL;
1914 /* only 0 or all 1s can be written to IA32_MCi_CTL
1915 * some Linux kernels though clear bit 10 in bank 4 to
1916 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1917 * this to avoid an uncatched #GP in the guest
1919 if ((offset & 0x3) == 0 &&
1920 data != 0 && (data | (1 << 10)) != ~(u64)0)
1922 vcpu->arch.mce_banks[offset] = data;
1930 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1932 struct kvm *kvm = vcpu->kvm;
1933 int lm = is_long_mode(vcpu);
1934 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1935 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1936 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1937 : kvm->arch.xen_hvm_config.blob_size_32;
1938 u32 page_num = data & ~PAGE_MASK;
1939 u64 page_addr = data & PAGE_MASK;
1944 if (page_num >= blob_size)
1947 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1952 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1961 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1963 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1966 static bool kvm_hv_msr_partition_wide(u32 msr)
1970 case HV_X64_MSR_GUEST_OS_ID:
1971 case HV_X64_MSR_HYPERCALL:
1972 case HV_X64_MSR_REFERENCE_TSC:
1973 case HV_X64_MSR_TIME_REF_COUNT:
1981 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1983 struct kvm *kvm = vcpu->kvm;
1986 case HV_X64_MSR_GUEST_OS_ID:
1987 kvm->arch.hv_guest_os_id = data;
1988 /* setting guest os id to zero disables hypercall page */
1989 if (!kvm->arch.hv_guest_os_id)
1990 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1992 case HV_X64_MSR_HYPERCALL: {
1997 /* if guest os id is not set hypercall should remain disabled */
1998 if (!kvm->arch.hv_guest_os_id)
2000 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
2001 kvm->arch.hv_hypercall = data;
2004 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
2005 addr = gfn_to_hva(kvm, gfn);
2006 if (kvm_is_error_hva(addr))
2008 kvm_x86_ops->patch_hypercall(vcpu, instructions);
2009 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
2010 if (__copy_to_user((void __user *)addr, instructions, 4))
2012 kvm->arch.hv_hypercall = data;
2013 mark_page_dirty(kvm, gfn);
2016 case HV_X64_MSR_REFERENCE_TSC: {
2018 HV_REFERENCE_TSC_PAGE tsc_ref;
2019 memset(&tsc_ref, 0, sizeof(tsc_ref));
2020 kvm->arch.hv_tsc_page = data;
2021 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
2023 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
2024 if (kvm_write_guest(kvm, gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
2025 &tsc_ref, sizeof(tsc_ref)))
2027 mark_page_dirty(kvm, gfn);
2031 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
2032 "data 0x%llx\n", msr, data);
2038 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2041 case HV_X64_MSR_APIC_ASSIST_PAGE: {
2045 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
2046 vcpu->arch.hv_vapic = data;
2047 if (kvm_lapic_enable_pv_eoi(vcpu, 0))
2051 gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
2052 addr = gfn_to_hva(vcpu->kvm, gfn);
2053 if (kvm_is_error_hva(addr))
2055 if (__clear_user((void __user *)addr, PAGE_SIZE))
2057 vcpu->arch.hv_vapic = data;
2058 mark_page_dirty(vcpu->kvm, gfn);
2059 if (kvm_lapic_enable_pv_eoi(vcpu, gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
2063 case HV_X64_MSR_EOI:
2064 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
2065 case HV_X64_MSR_ICR:
2066 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
2067 case HV_X64_MSR_TPR:
2068 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
2070 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
2071 "data 0x%llx\n", msr, data);
2078 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2080 gpa_t gpa = data & ~0x3f;
2082 /* Bits 2:5 are reserved, Should be zero */
2086 vcpu->arch.apf.msr_val = data;
2088 if (!(data & KVM_ASYNC_PF_ENABLED)) {
2089 kvm_clear_async_pf_completion_queue(vcpu);
2090 kvm_async_pf_hash_reset(vcpu);
2094 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2098 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2099 kvm_async_pf_wakeup_all(vcpu);
2103 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2105 vcpu->arch.pv_time_enabled = false;
2108 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2112 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2115 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2116 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2117 vcpu->arch.st.accum_steal = delta;
2120 static void record_steal_time(struct kvm_vcpu *vcpu)
2122 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2125 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2126 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2129 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2130 vcpu->arch.st.steal.version += 2;
2131 vcpu->arch.st.accum_steal = 0;
2133 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2134 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2137 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2140 u32 msr = msr_info->index;
2141 u64 data = msr_info->data;
2144 case MSR_AMD64_NB_CFG:
2145 case MSR_IA32_UCODE_REV:
2146 case MSR_IA32_UCODE_WRITE:
2147 case MSR_VM_HSAVE_PA:
2148 case MSR_AMD64_PATCH_LOADER:
2149 case MSR_AMD64_BU_CFG2:
2153 return set_efer(vcpu, data);
2155 data &= ~(u64)0x40; /* ignore flush filter disable */
2156 data &= ~(u64)0x100; /* ignore ignne emulation enable */
2157 data &= ~(u64)0x8; /* ignore TLB cache disable */
2158 data &= ~(u64)0x40000; /* ignore Mc status write enable */
2160 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2165 case MSR_FAM10H_MMIO_CONF_BASE:
2167 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2172 case MSR_IA32_DEBUGCTLMSR:
2174 /* We support the non-activated case already */
2176 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2177 /* Values other than LBR and BTF are vendor-specific,
2178 thus reserved and should throw a #GP */
2181 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2184 case 0x200 ... 0x2ff:
2185 return set_msr_mtrr(vcpu, msr, data);
2186 case MSR_IA32_APICBASE:
2187 return kvm_set_apic_base(vcpu, msr_info);
2188 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2189 return kvm_x2apic_msr_write(vcpu, msr, data);
2190 case MSR_IA32_TSCDEADLINE:
2191 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2193 case MSR_IA32_TSC_ADJUST:
2194 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2195 if (!msr_info->host_initiated) {
2196 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2197 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2199 vcpu->arch.ia32_tsc_adjust_msr = data;
2202 case MSR_IA32_MISC_ENABLE:
2203 vcpu->arch.ia32_misc_enable_msr = data;
2205 case MSR_KVM_WALL_CLOCK_NEW:
2206 case MSR_KVM_WALL_CLOCK:
2207 vcpu->kvm->arch.wall_clock = data;
2208 kvm_write_wall_clock(vcpu->kvm, data);
2210 case MSR_KVM_SYSTEM_TIME_NEW:
2211 case MSR_KVM_SYSTEM_TIME: {
2213 struct kvm_arch *ka = &vcpu->kvm->arch;
2215 kvmclock_reset(vcpu);
2217 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2218 bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2220 if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2221 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2224 ka->boot_vcpu_runs_old_kvmclock = tmp;
2227 vcpu->arch.time = data;
2228 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2230 /* we verify if the enable bit is set... */
2234 gpa_offset = data & ~(PAGE_MASK | 1);
2236 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2237 &vcpu->arch.pv_time, data & ~1ULL,
2238 sizeof(struct pvclock_vcpu_time_info)))
2239 vcpu->arch.pv_time_enabled = false;
2241 vcpu->arch.pv_time_enabled = true;
2245 case MSR_KVM_ASYNC_PF_EN:
2246 if (kvm_pv_enable_async_pf(vcpu, data))
2249 case MSR_KVM_STEAL_TIME:
2251 if (unlikely(!sched_info_on()))
2254 if (data & KVM_STEAL_RESERVED_MASK)
2257 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2258 data & KVM_STEAL_VALID_BITS,
2259 sizeof(struct kvm_steal_time)))
2262 vcpu->arch.st.msr_val = data;
2264 if (!(data & KVM_MSR_ENABLED))
2267 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2270 accumulate_steal_time(vcpu);
2273 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2276 case MSR_KVM_PV_EOI_EN:
2277 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2281 case MSR_IA32_MCG_CTL:
2282 case MSR_IA32_MCG_STATUS:
2283 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2284 return set_msr_mce(vcpu, msr, data);
2286 /* Performance counters are not protected by a CPUID bit,
2287 * so we should check all of them in the generic path for the sake of
2288 * cross vendor migration.
2289 * Writing a zero into the event select MSRs disables them,
2290 * which we perfectly emulate ;-). Any other value should be at least
2291 * reported, some guests depend on them.
2293 case MSR_K7_EVNTSEL0:
2294 case MSR_K7_EVNTSEL1:
2295 case MSR_K7_EVNTSEL2:
2296 case MSR_K7_EVNTSEL3:
2298 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2299 "0x%x data 0x%llx\n", msr, data);
2301 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2302 * so we ignore writes to make it happy.
2304 case MSR_K7_PERFCTR0:
2305 case MSR_K7_PERFCTR1:
2306 case MSR_K7_PERFCTR2:
2307 case MSR_K7_PERFCTR3:
2308 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2309 "0x%x data 0x%llx\n", msr, data);
2311 case MSR_P6_PERFCTR0:
2312 case MSR_P6_PERFCTR1:
2314 case MSR_P6_EVNTSEL0:
2315 case MSR_P6_EVNTSEL1:
2316 if (kvm_pmu_msr(vcpu, msr))
2317 return kvm_pmu_set_msr(vcpu, msr_info);
2319 if (pr || data != 0)
2320 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2321 "0x%x data 0x%llx\n", msr, data);
2323 case MSR_K7_CLK_CTL:
2325 * Ignore all writes to this no longer documented MSR.
2326 * Writes are only relevant for old K7 processors,
2327 * all pre-dating SVM, but a recommended workaround from
2328 * AMD for these chips. It is possible to specify the
2329 * affected processor models on the command line, hence
2330 * the need to ignore the workaround.
2333 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2334 if (kvm_hv_msr_partition_wide(msr)) {
2336 mutex_lock(&vcpu->kvm->lock);
2337 r = set_msr_hyperv_pw(vcpu, msr, data);
2338 mutex_unlock(&vcpu->kvm->lock);
2341 return set_msr_hyperv(vcpu, msr, data);
2343 case MSR_IA32_BBL_CR_CTL3:
2344 /* Drop writes to this legacy MSR -- see rdmsr
2345 * counterpart for further detail.
2347 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2349 case MSR_AMD64_OSVW_ID_LENGTH:
2350 if (!guest_cpuid_has_osvw(vcpu))
2352 vcpu->arch.osvw.length = data;
2354 case MSR_AMD64_OSVW_STATUS:
2355 if (!guest_cpuid_has_osvw(vcpu))
2357 vcpu->arch.osvw.status = data;
2360 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2361 return xen_hvm_config(vcpu, data);
2362 if (kvm_pmu_msr(vcpu, msr))
2363 return kvm_pmu_set_msr(vcpu, msr_info);
2365 vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2369 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2376 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2380 * Reads an msr value (of 'msr_index') into 'pdata'.
2381 * Returns 0 on success, non-0 otherwise.
2382 * Assumes vcpu_load() was already called.
2384 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2386 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2388 EXPORT_SYMBOL_GPL(kvm_get_msr);
2390 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2392 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2394 if (!msr_mtrr_valid(msr))
2397 if (msr == MSR_MTRRdefType)
2398 *pdata = vcpu->arch.mtrr_state.def_type +
2399 (vcpu->arch.mtrr_state.enabled << 10);
2400 else if (msr == MSR_MTRRfix64K_00000)
2402 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2403 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2404 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2405 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2406 else if (msr == MSR_IA32_CR_PAT)
2407 *pdata = vcpu->arch.pat;
2408 else { /* Variable MTRRs */
2409 int idx, is_mtrr_mask;
2412 idx = (msr - 0x200) / 2;
2413 is_mtrr_mask = msr - 0x200 - 2 * idx;
2416 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2419 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2426 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2429 u64 mcg_cap = vcpu->arch.mcg_cap;
2430 unsigned bank_num = mcg_cap & 0xff;
2433 case MSR_IA32_P5_MC_ADDR:
2434 case MSR_IA32_P5_MC_TYPE:
2437 case MSR_IA32_MCG_CAP:
2438 data = vcpu->arch.mcg_cap;
2440 case MSR_IA32_MCG_CTL:
2441 if (!(mcg_cap & MCG_CTL_P))
2443 data = vcpu->arch.mcg_ctl;
2445 case MSR_IA32_MCG_STATUS:
2446 data = vcpu->arch.mcg_status;
2449 if (msr >= MSR_IA32_MC0_CTL &&
2450 msr < MSR_IA32_MCx_CTL(bank_num)) {
2451 u32 offset = msr - MSR_IA32_MC0_CTL;
2452 data = vcpu->arch.mce_banks[offset];
2461 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2464 struct kvm *kvm = vcpu->kvm;
2467 case HV_X64_MSR_GUEST_OS_ID:
2468 data = kvm->arch.hv_guest_os_id;
2470 case HV_X64_MSR_HYPERCALL:
2471 data = kvm->arch.hv_hypercall;
2473 case HV_X64_MSR_TIME_REF_COUNT: {
2475 div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2478 case HV_X64_MSR_REFERENCE_TSC:
2479 data = kvm->arch.hv_tsc_page;
2482 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2490 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2495 case HV_X64_MSR_VP_INDEX: {
2498 kvm_for_each_vcpu(r, v, vcpu->kvm) {
2506 case HV_X64_MSR_EOI:
2507 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2508 case HV_X64_MSR_ICR:
2509 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2510 case HV_X64_MSR_TPR:
2511 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2512 case HV_X64_MSR_APIC_ASSIST_PAGE:
2513 data = vcpu->arch.hv_vapic;
2516 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2523 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2528 case MSR_IA32_PLATFORM_ID:
2529 case MSR_IA32_EBL_CR_POWERON:
2530 case MSR_IA32_DEBUGCTLMSR:
2531 case MSR_IA32_LASTBRANCHFROMIP:
2532 case MSR_IA32_LASTBRANCHTOIP:
2533 case MSR_IA32_LASTINTFROMIP:
2534 case MSR_IA32_LASTINTTOIP:
2537 case MSR_VM_HSAVE_PA:
2538 case MSR_K7_EVNTSEL0:
2539 case MSR_K7_EVNTSEL1:
2540 case MSR_K7_EVNTSEL2:
2541 case MSR_K7_EVNTSEL3:
2542 case MSR_K7_PERFCTR0:
2543 case MSR_K7_PERFCTR1:
2544 case MSR_K7_PERFCTR2:
2545 case MSR_K7_PERFCTR3:
2546 case MSR_K8_INT_PENDING_MSG:
2547 case MSR_AMD64_NB_CFG:
2548 case MSR_FAM10H_MMIO_CONF_BASE:
2549 case MSR_AMD64_BU_CFG2:
2552 case MSR_P6_PERFCTR0:
2553 case MSR_P6_PERFCTR1:
2554 case MSR_P6_EVNTSEL0:
2555 case MSR_P6_EVNTSEL1:
2556 if (kvm_pmu_msr(vcpu, msr))
2557 return kvm_pmu_get_msr(vcpu, msr, pdata);
2560 case MSR_IA32_UCODE_REV:
2561 data = 0x100000000ULL;
2564 data = 0x500 | KVM_NR_VAR_MTRR;
2566 case 0x200 ... 0x2ff:
2567 return get_msr_mtrr(vcpu, msr, pdata);
2568 case 0xcd: /* fsb frequency */
2572 * MSR_EBC_FREQUENCY_ID
2573 * Conservative value valid for even the basic CPU models.
2574 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2575 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2576 * and 266MHz for model 3, or 4. Set Core Clock
2577 * Frequency to System Bus Frequency Ratio to 1 (bits
2578 * 31:24) even though these are only valid for CPU
2579 * models > 2, however guests may end up dividing or
2580 * multiplying by zero otherwise.
2582 case MSR_EBC_FREQUENCY_ID:
2585 case MSR_IA32_APICBASE:
2586 data = kvm_get_apic_base(vcpu);
2588 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2589 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2591 case MSR_IA32_TSCDEADLINE:
2592 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2594 case MSR_IA32_TSC_ADJUST:
2595 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2597 case MSR_IA32_MISC_ENABLE:
2598 data = vcpu->arch.ia32_misc_enable_msr;
2600 case MSR_IA32_PERF_STATUS:
2601 /* TSC increment by tick */
2603 /* CPU multiplier */
2604 data |= (((uint64_t)4ULL) << 40);
2607 data = vcpu->arch.efer;
2609 case MSR_KVM_WALL_CLOCK:
2610 case MSR_KVM_WALL_CLOCK_NEW:
2611 data = vcpu->kvm->arch.wall_clock;
2613 case MSR_KVM_SYSTEM_TIME:
2614 case MSR_KVM_SYSTEM_TIME_NEW:
2615 data = vcpu->arch.time;
2617 case MSR_KVM_ASYNC_PF_EN:
2618 data = vcpu->arch.apf.msr_val;
2620 case MSR_KVM_STEAL_TIME:
2621 data = vcpu->arch.st.msr_val;
2623 case MSR_KVM_PV_EOI_EN:
2624 data = vcpu->arch.pv_eoi.msr_val;
2626 case MSR_IA32_P5_MC_ADDR:
2627 case MSR_IA32_P5_MC_TYPE:
2628 case MSR_IA32_MCG_CAP:
2629 case MSR_IA32_MCG_CTL:
2630 case MSR_IA32_MCG_STATUS:
2631 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2632 return get_msr_mce(vcpu, msr, pdata);
2633 case MSR_K7_CLK_CTL:
2635 * Provide expected ramp-up count for K7. All other
2636 * are set to zero, indicating minimum divisors for
2639 * This prevents guest kernels on AMD host with CPU
2640 * type 6, model 8 and higher from exploding due to
2641 * the rdmsr failing.
2645 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2646 if (kvm_hv_msr_partition_wide(msr)) {
2648 mutex_lock(&vcpu->kvm->lock);
2649 r = get_msr_hyperv_pw(vcpu, msr, pdata);
2650 mutex_unlock(&vcpu->kvm->lock);
2653 return get_msr_hyperv(vcpu, msr, pdata);
2655 case MSR_IA32_BBL_CR_CTL3:
2656 /* This legacy MSR exists but isn't fully documented in current
2657 * silicon. It is however accessed by winxp in very narrow
2658 * scenarios where it sets bit #19, itself documented as
2659 * a "reserved" bit. Best effort attempt to source coherent
2660 * read data here should the balance of the register be
2661 * interpreted by the guest:
2663 * L2 cache control register 3: 64GB range, 256KB size,
2664 * enabled, latency 0x1, configured
2668 case MSR_AMD64_OSVW_ID_LENGTH:
2669 if (!guest_cpuid_has_osvw(vcpu))
2671 data = vcpu->arch.osvw.length;
2673 case MSR_AMD64_OSVW_STATUS:
2674 if (!guest_cpuid_has_osvw(vcpu))
2676 data = vcpu->arch.osvw.status;
2679 if (kvm_pmu_msr(vcpu, msr))
2680 return kvm_pmu_get_msr(vcpu, msr, pdata);
2682 vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2685 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2693 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2696 * Read or write a bunch of msrs. All parameters are kernel addresses.
2698 * @return number of msrs set successfully.
2700 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2701 struct kvm_msr_entry *entries,
2702 int (*do_msr)(struct kvm_vcpu *vcpu,
2703 unsigned index, u64 *data))
2707 idx = srcu_read_lock(&vcpu->kvm->srcu);
2708 for (i = 0; i < msrs->nmsrs; ++i)
2709 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2711 srcu_read_unlock(&vcpu->kvm->srcu, idx);
2717 * Read or write a bunch of msrs. Parameters are user addresses.
2719 * @return number of msrs set successfully.
2721 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2722 int (*do_msr)(struct kvm_vcpu *vcpu,
2723 unsigned index, u64 *data),
2726 struct kvm_msrs msrs;
2727 struct kvm_msr_entry *entries;
2732 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2736 if (msrs.nmsrs >= MAX_IO_MSRS)
2739 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2740 entries = memdup_user(user_msrs->entries, size);
2741 if (IS_ERR(entries)) {
2742 r = PTR_ERR(entries);
2746 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2751 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2762 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2767 case KVM_CAP_IRQCHIP:
2769 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2770 case KVM_CAP_SET_TSS_ADDR:
2771 case KVM_CAP_EXT_CPUID:
2772 case KVM_CAP_EXT_EMUL_CPUID:
2773 case KVM_CAP_CLOCKSOURCE:
2775 case KVM_CAP_NOP_IO_DELAY:
2776 case KVM_CAP_MP_STATE:
2777 case KVM_CAP_SYNC_MMU:
2778 case KVM_CAP_USER_NMI:
2779 case KVM_CAP_REINJECT_CONTROL:
2780 case KVM_CAP_IRQ_INJECT_STATUS:
2781 case KVM_CAP_IOEVENTFD:
2782 case KVM_CAP_IOEVENTFD_NO_LENGTH:
2784 case KVM_CAP_PIT_STATE2:
2785 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2786 case KVM_CAP_XEN_HVM:
2787 case KVM_CAP_ADJUST_CLOCK:
2788 case KVM_CAP_VCPU_EVENTS:
2789 case KVM_CAP_HYPERV:
2790 case KVM_CAP_HYPERV_VAPIC:
2791 case KVM_CAP_HYPERV_SPIN:
2792 case KVM_CAP_PCI_SEGMENT:
2793 case KVM_CAP_DEBUGREGS:
2794 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2796 case KVM_CAP_ASYNC_PF:
2797 case KVM_CAP_GET_TSC_KHZ:
2798 case KVM_CAP_KVMCLOCK_CTRL:
2799 case KVM_CAP_READONLY_MEM:
2800 case KVM_CAP_HYPERV_TIME:
2801 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2802 case KVM_CAP_TSC_DEADLINE_TIMER:
2803 case KVM_CAP_ENABLE_CAP_VM:
2804 case KVM_CAP_DISABLE_QUIRKS:
2805 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2806 case KVM_CAP_ASSIGN_DEV_IRQ:
2807 case KVM_CAP_PCI_2_3:
2811 case KVM_CAP_COALESCED_MMIO:
2812 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2815 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2817 case KVM_CAP_NR_VCPUS:
2818 r = KVM_SOFT_MAX_VCPUS;
2820 case KVM_CAP_MAX_VCPUS:
2823 case KVM_CAP_NR_MEMSLOTS:
2824 r = KVM_USER_MEM_SLOTS;
2826 case KVM_CAP_PV_MMU: /* obsolete */
2829 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2831 r = iommu_present(&pci_bus_type);
2835 r = KVM_MAX_MCE_BANKS;
2840 case KVM_CAP_TSC_CONTROL:
2841 r = kvm_has_tsc_control;
2851 long kvm_arch_dev_ioctl(struct file *filp,
2852 unsigned int ioctl, unsigned long arg)
2854 void __user *argp = (void __user *)arg;
2858 case KVM_GET_MSR_INDEX_LIST: {
2859 struct kvm_msr_list __user *user_msr_list = argp;
2860 struct kvm_msr_list msr_list;
2864 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2867 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2868 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2871 if (n < msr_list.nmsrs)
2874 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2875 num_msrs_to_save * sizeof(u32)))
2877 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2879 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2884 case KVM_GET_SUPPORTED_CPUID:
2885 case KVM_GET_EMULATED_CPUID: {
2886 struct kvm_cpuid2 __user *cpuid_arg = argp;
2887 struct kvm_cpuid2 cpuid;
2890 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2893 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2899 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2904 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2907 mce_cap = KVM_MCE_CAP_SUPPORTED;
2909 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2921 static void wbinvd_ipi(void *garbage)
2926 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2928 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2931 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2933 /* Address WBINVD may be executed by guest */
2934 if (need_emulate_wbinvd(vcpu)) {
2935 if (kvm_x86_ops->has_wbinvd_exit())
2936 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2937 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2938 smp_call_function_single(vcpu->cpu,
2939 wbinvd_ipi, NULL, 1);
2942 kvm_x86_ops->vcpu_load(vcpu, cpu);
2944 /* Apply any externally detected TSC adjustments (due to suspend) */
2945 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2946 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2947 vcpu->arch.tsc_offset_adjustment = 0;
2948 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2951 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2952 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2953 native_read_tsc() - vcpu->arch.last_host_tsc;
2955 mark_tsc_unstable("KVM discovered backwards TSC");
2956 if (check_tsc_unstable()) {
2957 u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2958 vcpu->arch.last_guest_tsc);
2959 kvm_x86_ops->write_tsc_offset(vcpu, offset);
2960 vcpu->arch.tsc_catchup = 1;
2963 * On a host with synchronized TSC, there is no need to update
2964 * kvmclock on vcpu->cpu migration
2966 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2967 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2968 if (vcpu->cpu != cpu)
2969 kvm_migrate_timers(vcpu);
2973 accumulate_steal_time(vcpu);
2974 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2977 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2979 kvm_x86_ops->vcpu_put(vcpu);
2980 kvm_put_guest_fpu(vcpu);
2981 vcpu->arch.last_host_tsc = native_read_tsc();
2984 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2985 struct kvm_lapic_state *s)
2987 kvm_x86_ops->sync_pir_to_irr(vcpu);
2988 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2993 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2994 struct kvm_lapic_state *s)
2996 kvm_apic_post_state_restore(vcpu, s);
2997 update_cr8_intercept(vcpu);
3002 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3003 struct kvm_interrupt *irq)
3005 if (irq->irq >= KVM_NR_INTERRUPTS)
3007 if (irqchip_in_kernel(vcpu->kvm))
3010 kvm_queue_interrupt(vcpu, irq->irq, false);
3011 kvm_make_request(KVM_REQ_EVENT, vcpu);
3016 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3018 kvm_inject_nmi(vcpu);
3023 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3024 struct kvm_tpr_access_ctl *tac)
3028 vcpu->arch.tpr_access_reporting = !!tac->enabled;
3032 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3036 unsigned bank_num = mcg_cap & 0xff, bank;
3039 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3041 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
3044 vcpu->arch.mcg_cap = mcg_cap;
3045 /* Init IA32_MCG_CTL to all 1s */
3046 if (mcg_cap & MCG_CTL_P)
3047 vcpu->arch.mcg_ctl = ~(u64)0;
3048 /* Init IA32_MCi_CTL to all 1s */
3049 for (bank = 0; bank < bank_num; bank++)
3050 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3055 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3056 struct kvm_x86_mce *mce)
3058 u64 mcg_cap = vcpu->arch.mcg_cap;
3059 unsigned bank_num = mcg_cap & 0xff;
3060 u64 *banks = vcpu->arch.mce_banks;
3062 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3065 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3066 * reporting is disabled
3068 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3069 vcpu->arch.mcg_ctl != ~(u64)0)
3071 banks += 4 * mce->bank;
3073 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3074 * reporting is disabled for the bank
3076 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3078 if (mce->status & MCI_STATUS_UC) {
3079 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3080 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3081 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3084 if (banks[1] & MCI_STATUS_VAL)
3085 mce->status |= MCI_STATUS_OVER;
3086 banks[2] = mce->addr;
3087 banks[3] = mce->misc;
3088 vcpu->arch.mcg_status = mce->mcg_status;
3089 banks[1] = mce->status;
3090 kvm_queue_exception(vcpu, MC_VECTOR);
3091 } else if (!(banks[1] & MCI_STATUS_VAL)
3092 || !(banks[1] & MCI_STATUS_UC)) {
3093 if (banks[1] & MCI_STATUS_VAL)
3094 mce->status |= MCI_STATUS_OVER;
3095 banks[2] = mce->addr;
3096 banks[3] = mce->misc;
3097 banks[1] = mce->status;
3099 banks[1] |= MCI_STATUS_OVER;
3103 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3104 struct kvm_vcpu_events *events)
3107 events->exception.injected =
3108 vcpu->arch.exception.pending &&
3109 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3110 events->exception.nr = vcpu->arch.exception.nr;
3111 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3112 events->exception.pad = 0;
3113 events->exception.error_code = vcpu->arch.exception.error_code;
3115 events->interrupt.injected =
3116 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3117 events->interrupt.nr = vcpu->arch.interrupt.nr;
3118 events->interrupt.soft = 0;
3119 events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3121 events->nmi.injected = vcpu->arch.nmi_injected;
3122 events->nmi.pending = vcpu->arch.nmi_pending != 0;
3123 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3124 events->nmi.pad = 0;
3126 events->sipi_vector = 0; /* never valid when reporting to user space */
3128 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3129 | KVM_VCPUEVENT_VALID_SHADOW);
3130 memset(&events->reserved, 0, sizeof(events->reserved));
3133 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3134 struct kvm_vcpu_events *events)
3136 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3137 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3138 | KVM_VCPUEVENT_VALID_SHADOW))
3142 vcpu->arch.exception.pending = events->exception.injected;
3143 vcpu->arch.exception.nr = events->exception.nr;
3144 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3145 vcpu->arch.exception.error_code = events->exception.error_code;
3147 vcpu->arch.interrupt.pending = events->interrupt.injected;
3148 vcpu->arch.interrupt.nr = events->interrupt.nr;
3149 vcpu->arch.interrupt.soft = events->interrupt.soft;
3150 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3151 kvm_x86_ops->set_interrupt_shadow(vcpu,
3152 events->interrupt.shadow);
3154 vcpu->arch.nmi_injected = events->nmi.injected;
3155 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3156 vcpu->arch.nmi_pending = events->nmi.pending;
3157 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3159 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3160 kvm_vcpu_has_lapic(vcpu))
3161 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3163 kvm_make_request(KVM_REQ_EVENT, vcpu);
3168 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3169 struct kvm_debugregs *dbgregs)
3173 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3174 kvm_get_dr(vcpu, 6, &val);
3176 dbgregs->dr7 = vcpu->arch.dr7;
3178 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3181 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3182 struct kvm_debugregs *dbgregs)
3187 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3188 kvm_update_dr0123(vcpu);
3189 vcpu->arch.dr6 = dbgregs->dr6;
3190 kvm_update_dr6(vcpu);
3191 vcpu->arch.dr7 = dbgregs->dr7;
3192 kvm_update_dr7(vcpu);
3197 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3199 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3201 struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
3202 u64 xstate_bv = xsave->xsave_hdr.xstate_bv;
3206 * Copy legacy XSAVE area, to avoid complications with CPUID
3207 * leaves 0 and 1 in the loop below.
3209 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3212 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3215 * Copy each region from the possibly compacted offset to the
3216 * non-compacted offset.
3218 valid = xstate_bv & ~XSTATE_FPSSE;
3220 u64 feature = valid & -valid;
3221 int index = fls64(feature) - 1;
3222 void *src = get_xsave_addr(xsave, feature);
3225 u32 size, offset, ecx, edx;
3226 cpuid_count(XSTATE_CPUID, index,
3227 &size, &offset, &ecx, &edx);
3228 memcpy(dest + offset, src, size);
3235 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3237 struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
3238 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3242 * Copy legacy XSAVE area, to avoid complications with CPUID
3243 * leaves 0 and 1 in the loop below.
3245 memcpy(xsave, src, XSAVE_HDR_OFFSET);
3247 /* Set XSTATE_BV and possibly XCOMP_BV. */
3248 xsave->xsave_hdr.xstate_bv = xstate_bv;
3250 xsave->xsave_hdr.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3253 * Copy each region from the non-compacted offset to the
3254 * possibly compacted offset.
3256 valid = xstate_bv & ~XSTATE_FPSSE;
3258 u64 feature = valid & -valid;
3259 int index = fls64(feature) - 1;
3260 void *dest = get_xsave_addr(xsave, feature);
3263 u32 size, offset, ecx, edx;
3264 cpuid_count(XSTATE_CPUID, index,
3265 &size, &offset, &ecx, &edx);
3266 memcpy(dest, src + offset, size);
3274 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3275 struct kvm_xsave *guest_xsave)
3277 if (cpu_has_xsave) {
3278 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3279 fill_xsave((u8 *) guest_xsave->region, vcpu);
3281 memcpy(guest_xsave->region,
3282 &vcpu->arch.guest_fpu.state->fxsave,
3283 sizeof(struct i387_fxsave_struct));
3284 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3289 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3290 struct kvm_xsave *guest_xsave)
3293 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3295 if (cpu_has_xsave) {
3297 * Here we allow setting states that are not present in
3298 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3299 * with old userspace.
3301 if (xstate_bv & ~kvm_supported_xcr0())
3303 load_xsave(vcpu, (u8 *)guest_xsave->region);
3305 if (xstate_bv & ~XSTATE_FPSSE)
3307 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3308 guest_xsave->region, sizeof(struct i387_fxsave_struct));
3313 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3314 struct kvm_xcrs *guest_xcrs)
3316 if (!cpu_has_xsave) {
3317 guest_xcrs->nr_xcrs = 0;
3321 guest_xcrs->nr_xcrs = 1;
3322 guest_xcrs->flags = 0;
3323 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3324 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3327 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3328 struct kvm_xcrs *guest_xcrs)
3335 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3338 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3339 /* Only support XCR0 currently */
3340 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3341 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3342 guest_xcrs->xcrs[i].value);
3351 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3352 * stopped by the hypervisor. This function will be called from the host only.
3353 * EINVAL is returned when the host attempts to set the flag for a guest that
3354 * does not support pv clocks.
3356 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3358 if (!vcpu->arch.pv_time_enabled)
3360 vcpu->arch.pvclock_set_guest_stopped_request = true;
3361 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3365 long kvm_arch_vcpu_ioctl(struct file *filp,
3366 unsigned int ioctl, unsigned long arg)
3368 struct kvm_vcpu *vcpu = filp->private_data;
3369 void __user *argp = (void __user *)arg;
3372 struct kvm_lapic_state *lapic;
3373 struct kvm_xsave *xsave;
3374 struct kvm_xcrs *xcrs;
3380 case KVM_GET_LAPIC: {
3382 if (!vcpu->arch.apic)
3384 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3389 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3393 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3398 case KVM_SET_LAPIC: {
3400 if (!vcpu->arch.apic)
3402 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3403 if (IS_ERR(u.lapic))
3404 return PTR_ERR(u.lapic);
3406 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3409 case KVM_INTERRUPT: {
3410 struct kvm_interrupt irq;
3413 if (copy_from_user(&irq, argp, sizeof irq))
3415 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3419 r = kvm_vcpu_ioctl_nmi(vcpu);
3422 case KVM_SET_CPUID: {
3423 struct kvm_cpuid __user *cpuid_arg = argp;
3424 struct kvm_cpuid cpuid;
3427 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3429 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3432 case KVM_SET_CPUID2: {
3433 struct kvm_cpuid2 __user *cpuid_arg = argp;
3434 struct kvm_cpuid2 cpuid;
3437 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3439 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3440 cpuid_arg->entries);
3443 case KVM_GET_CPUID2: {
3444 struct kvm_cpuid2 __user *cpuid_arg = argp;
3445 struct kvm_cpuid2 cpuid;
3448 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3450 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3451 cpuid_arg->entries);
3455 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3461 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3464 r = msr_io(vcpu, argp, do_set_msr, 0);
3466 case KVM_TPR_ACCESS_REPORTING: {
3467 struct kvm_tpr_access_ctl tac;
3470 if (copy_from_user(&tac, argp, sizeof tac))
3472 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3476 if (copy_to_user(argp, &tac, sizeof tac))
3481 case KVM_SET_VAPIC_ADDR: {
3482 struct kvm_vapic_addr va;
3485 if (!irqchip_in_kernel(vcpu->kvm))
3488 if (copy_from_user(&va, argp, sizeof va))
3490 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3493 case KVM_X86_SETUP_MCE: {
3497 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3499 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3502 case KVM_X86_SET_MCE: {
3503 struct kvm_x86_mce mce;
3506 if (copy_from_user(&mce, argp, sizeof mce))
3508 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3511 case KVM_GET_VCPU_EVENTS: {
3512 struct kvm_vcpu_events events;
3514 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3517 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3522 case KVM_SET_VCPU_EVENTS: {
3523 struct kvm_vcpu_events events;
3526 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3529 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3532 case KVM_GET_DEBUGREGS: {
3533 struct kvm_debugregs dbgregs;
3535 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3538 if (copy_to_user(argp, &dbgregs,
3539 sizeof(struct kvm_debugregs)))
3544 case KVM_SET_DEBUGREGS: {
3545 struct kvm_debugregs dbgregs;
3548 if (copy_from_user(&dbgregs, argp,
3549 sizeof(struct kvm_debugregs)))
3552 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3555 case KVM_GET_XSAVE: {
3556 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3561 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3564 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3569 case KVM_SET_XSAVE: {
3570 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3571 if (IS_ERR(u.xsave))
3572 return PTR_ERR(u.xsave);
3574 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3577 case KVM_GET_XCRS: {
3578 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3583 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3586 if (copy_to_user(argp, u.xcrs,
3587 sizeof(struct kvm_xcrs)))
3592 case KVM_SET_XCRS: {
3593 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3595 return PTR_ERR(u.xcrs);
3597 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3600 case KVM_SET_TSC_KHZ: {
3604 user_tsc_khz = (u32)arg;
3606 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3609 if (user_tsc_khz == 0)
3610 user_tsc_khz = tsc_khz;
3612 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3617 case KVM_GET_TSC_KHZ: {
3618 r = vcpu->arch.virtual_tsc_khz;
3621 case KVM_KVMCLOCK_CTRL: {
3622 r = kvm_set_guest_paused(vcpu);
3633 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3635 return VM_FAULT_SIGBUS;
3638 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3642 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3644 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3648 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3651 kvm->arch.ept_identity_map_addr = ident_addr;
3655 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3656 u32 kvm_nr_mmu_pages)
3658 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3661 mutex_lock(&kvm->slots_lock);
3663 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3664 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3666 mutex_unlock(&kvm->slots_lock);
3670 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3672 return kvm->arch.n_max_mmu_pages;
3675 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3680 switch (chip->chip_id) {
3681 case KVM_IRQCHIP_PIC_MASTER:
3682 memcpy(&chip->chip.pic,
3683 &pic_irqchip(kvm)->pics[0],
3684 sizeof(struct kvm_pic_state));
3686 case KVM_IRQCHIP_PIC_SLAVE:
3687 memcpy(&chip->chip.pic,
3688 &pic_irqchip(kvm)->pics[1],
3689 sizeof(struct kvm_pic_state));
3691 case KVM_IRQCHIP_IOAPIC:
3692 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3701 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3706 switch (chip->chip_id) {
3707 case KVM_IRQCHIP_PIC_MASTER:
3708 spin_lock(&pic_irqchip(kvm)->lock);
3709 memcpy(&pic_irqchip(kvm)->pics[0],
3711 sizeof(struct kvm_pic_state));
3712 spin_unlock(&pic_irqchip(kvm)->lock);
3714 case KVM_IRQCHIP_PIC_SLAVE:
3715 spin_lock(&pic_irqchip(kvm)->lock);
3716 memcpy(&pic_irqchip(kvm)->pics[1],
3718 sizeof(struct kvm_pic_state));
3719 spin_unlock(&pic_irqchip(kvm)->lock);
3721 case KVM_IRQCHIP_IOAPIC:
3722 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3728 kvm_pic_update_irq(pic_irqchip(kvm));
3732 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3736 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3737 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3738 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3742 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3746 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3747 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3748 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3749 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3753 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3757 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3758 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3759 sizeof(ps->channels));
3760 ps->flags = kvm->arch.vpit->pit_state.flags;
3761 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3762 memset(&ps->reserved, 0, sizeof(ps->reserved));
3766 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3768 int r = 0, start = 0;
3769 u32 prev_legacy, cur_legacy;
3770 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3771 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3772 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3773 if (!prev_legacy && cur_legacy)
3775 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3776 sizeof(kvm->arch.vpit->pit_state.channels));
3777 kvm->arch.vpit->pit_state.flags = ps->flags;
3778 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3779 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3783 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3784 struct kvm_reinject_control *control)
3786 if (!kvm->arch.vpit)
3788 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3789 kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3790 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3795 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3796 * @kvm: kvm instance
3797 * @log: slot id and address to which we copy the log
3799 * Steps 1-4 below provide general overview of dirty page logging. See
3800 * kvm_get_dirty_log_protect() function description for additional details.
3802 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3803 * always flush the TLB (step 4) even if previous step failed and the dirty
3804 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3805 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3806 * writes will be marked dirty for next log read.
3808 * 1. Take a snapshot of the bit and clear it if needed.
3809 * 2. Write protect the corresponding page.
3810 * 3. Copy the snapshot to the userspace.
3811 * 4. Flush TLB's if needed.
3813 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3815 bool is_dirty = false;
3818 mutex_lock(&kvm->slots_lock);
3821 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3823 if (kvm_x86_ops->flush_log_dirty)
3824 kvm_x86_ops->flush_log_dirty(kvm);
3826 r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3829 * All the TLBs can be flushed out of mmu lock, see the comments in
3830 * kvm_mmu_slot_remove_write_access().
3832 lockdep_assert_held(&kvm->slots_lock);
3834 kvm_flush_remote_tlbs(kvm);
3836 mutex_unlock(&kvm->slots_lock);
3840 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3843 if (!irqchip_in_kernel(kvm))
3846 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3847 irq_event->irq, irq_event->level,
3852 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3853 struct kvm_enable_cap *cap)
3861 case KVM_CAP_DISABLE_QUIRKS:
3862 kvm->arch.disabled_quirks = cap->args[0];
3872 long kvm_arch_vm_ioctl(struct file *filp,
3873 unsigned int ioctl, unsigned long arg)
3875 struct kvm *kvm = filp->private_data;
3876 void __user *argp = (void __user *)arg;
3879 * This union makes it completely explicit to gcc-3.x
3880 * that these two variables' stack usage should be
3881 * combined, not added together.
3884 struct kvm_pit_state ps;
3885 struct kvm_pit_state2 ps2;
3886 struct kvm_pit_config pit_config;
3890 case KVM_SET_TSS_ADDR:
3891 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3893 case KVM_SET_IDENTITY_MAP_ADDR: {
3897 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3899 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3902 case KVM_SET_NR_MMU_PAGES:
3903 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3905 case KVM_GET_NR_MMU_PAGES:
3906 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3908 case KVM_CREATE_IRQCHIP: {
3909 struct kvm_pic *vpic;
3911 mutex_lock(&kvm->lock);
3914 goto create_irqchip_unlock;
3916 if (atomic_read(&kvm->online_vcpus))
3917 goto create_irqchip_unlock;
3919 vpic = kvm_create_pic(kvm);
3921 r = kvm_ioapic_init(kvm);
3923 mutex_lock(&kvm->slots_lock);
3924 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3926 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3928 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3930 mutex_unlock(&kvm->slots_lock);
3932 goto create_irqchip_unlock;
3935 goto create_irqchip_unlock;
3937 kvm->arch.vpic = vpic;
3939 r = kvm_setup_default_irq_routing(kvm);
3941 mutex_lock(&kvm->slots_lock);
3942 mutex_lock(&kvm->irq_lock);
3943 kvm_ioapic_destroy(kvm);
3944 kvm_destroy_pic(kvm);
3945 mutex_unlock(&kvm->irq_lock);
3946 mutex_unlock(&kvm->slots_lock);
3948 create_irqchip_unlock:
3949 mutex_unlock(&kvm->lock);
3952 case KVM_CREATE_PIT:
3953 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3955 case KVM_CREATE_PIT2:
3957 if (copy_from_user(&u.pit_config, argp,
3958 sizeof(struct kvm_pit_config)))
3961 mutex_lock(&kvm->slots_lock);
3964 goto create_pit_unlock;
3966 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3970 mutex_unlock(&kvm->slots_lock);
3972 case KVM_GET_IRQCHIP: {
3973 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3974 struct kvm_irqchip *chip;
3976 chip = memdup_user(argp, sizeof(*chip));
3983 if (!irqchip_in_kernel(kvm))
3984 goto get_irqchip_out;
3985 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3987 goto get_irqchip_out;
3989 if (copy_to_user(argp, chip, sizeof *chip))
3990 goto get_irqchip_out;
3996 case KVM_SET_IRQCHIP: {
3997 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3998 struct kvm_irqchip *chip;
4000 chip = memdup_user(argp, sizeof(*chip));
4007 if (!irqchip_in_kernel(kvm))
4008 goto set_irqchip_out;
4009 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4011 goto set_irqchip_out;
4019 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4022 if (!kvm->arch.vpit)
4024 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4028 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4035 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4038 if (!kvm->arch.vpit)
4040 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4043 case KVM_GET_PIT2: {
4045 if (!kvm->arch.vpit)
4047 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4051 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4056 case KVM_SET_PIT2: {
4058 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4061 if (!kvm->arch.vpit)
4063 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4066 case KVM_REINJECT_CONTROL: {
4067 struct kvm_reinject_control control;
4069 if (copy_from_user(&control, argp, sizeof(control)))
4071 r = kvm_vm_ioctl_reinject(kvm, &control);
4074 case KVM_XEN_HVM_CONFIG: {
4076 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4077 sizeof(struct kvm_xen_hvm_config)))
4080 if (kvm->arch.xen_hvm_config.flags)
4085 case KVM_SET_CLOCK: {
4086 struct kvm_clock_data user_ns;
4091 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4099 local_irq_disable();
4100 now_ns = get_kernel_ns();
4101 delta = user_ns.clock - now_ns;
4103 kvm->arch.kvmclock_offset = delta;
4104 kvm_gen_update_masterclock(kvm);
4107 case KVM_GET_CLOCK: {
4108 struct kvm_clock_data user_ns;
4111 local_irq_disable();
4112 now_ns = get_kernel_ns();
4113 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4116 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4119 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4124 case KVM_ENABLE_CAP: {
4125 struct kvm_enable_cap cap;
4128 if (copy_from_user(&cap, argp, sizeof(cap)))
4130 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4134 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4140 static void kvm_init_msr_list(void)
4145 /* skip the first msrs in the list. KVM-specific */
4146 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
4147 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4151 * Even MSRs that are valid in the host may not be exposed
4152 * to the guests in some cases. We could work around this
4153 * in VMX with the generic MSR save/load machinery, but it
4154 * is not really worthwhile since it will really only
4155 * happen with nested virtualization.
4157 switch (msrs_to_save[i]) {
4158 case MSR_IA32_BNDCFGS:
4159 if (!kvm_x86_ops->mpx_supported())
4167 msrs_to_save[j] = msrs_to_save[i];
4170 num_msrs_to_save = j;
4173 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4181 if (!(vcpu->arch.apic &&
4182 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4183 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4194 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4201 if (!(vcpu->arch.apic &&
4202 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4204 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4206 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4216 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4217 struct kvm_segment *var, int seg)
4219 kvm_x86_ops->set_segment(vcpu, var, seg);
4222 void kvm_get_segment(struct kvm_vcpu *vcpu,
4223 struct kvm_segment *var, int seg)
4225 kvm_x86_ops->get_segment(vcpu, var, seg);
4228 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4229 struct x86_exception *exception)
4233 BUG_ON(!mmu_is_nested(vcpu));
4235 /* NPT walks are always user-walks */
4236 access |= PFERR_USER_MASK;
4237 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4242 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4243 struct x86_exception *exception)
4245 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4246 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4249 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4250 struct x86_exception *exception)
4252 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4253 access |= PFERR_FETCH_MASK;
4254 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4257 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4258 struct x86_exception *exception)
4260 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4261 access |= PFERR_WRITE_MASK;
4262 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4265 /* uses this to access any guest's mapped memory without checking CPL */
4266 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4267 struct x86_exception *exception)
4269 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4272 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4273 struct kvm_vcpu *vcpu, u32 access,
4274 struct x86_exception *exception)
4277 int r = X86EMUL_CONTINUE;
4280 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4282 unsigned offset = addr & (PAGE_SIZE-1);
4283 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4286 if (gpa == UNMAPPED_GVA)
4287 return X86EMUL_PROPAGATE_FAULT;
4288 ret = kvm_read_guest_page(vcpu->kvm, gpa >> PAGE_SHIFT, data,
4291 r = X86EMUL_IO_NEEDED;
4303 /* used for instruction fetching */
4304 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4305 gva_t addr, void *val, unsigned int bytes,
4306 struct x86_exception *exception)
4308 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4309 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4313 /* Inline kvm_read_guest_virt_helper for speed. */
4314 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4316 if (unlikely(gpa == UNMAPPED_GVA))
4317 return X86EMUL_PROPAGATE_FAULT;
4319 offset = addr & (PAGE_SIZE-1);
4320 if (WARN_ON(offset + bytes > PAGE_SIZE))
4321 bytes = (unsigned)PAGE_SIZE - offset;
4322 ret = kvm_read_guest_page(vcpu->kvm, gpa >> PAGE_SHIFT, val,
4324 if (unlikely(ret < 0))
4325 return X86EMUL_IO_NEEDED;
4327 return X86EMUL_CONTINUE;
4330 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4331 gva_t addr, void *val, unsigned int bytes,
4332 struct x86_exception *exception)
4334 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4335 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4337 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4340 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4342 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4343 gva_t addr, void *val, unsigned int bytes,
4344 struct x86_exception *exception)
4346 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4347 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4350 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4351 gva_t addr, void *val,
4353 struct x86_exception *exception)
4355 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4357 int r = X86EMUL_CONTINUE;
4360 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4363 unsigned offset = addr & (PAGE_SIZE-1);
4364 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4367 if (gpa == UNMAPPED_GVA)
4368 return X86EMUL_PROPAGATE_FAULT;
4369 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4371 r = X86EMUL_IO_NEEDED;
4382 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4384 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4385 gpa_t *gpa, struct x86_exception *exception,
4388 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4389 | (write ? PFERR_WRITE_MASK : 0);
4391 if (vcpu_match_mmio_gva(vcpu, gva)
4392 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4393 vcpu->arch.access, access)) {
4394 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4395 (gva & (PAGE_SIZE - 1));
4396 trace_vcpu_match_mmio(gva, *gpa, write, false);
4400 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4402 if (*gpa == UNMAPPED_GVA)
4405 /* For APIC access vmexit */
4406 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4409 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4410 trace_vcpu_match_mmio(gva, *gpa, write, true);
4417 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4418 const void *val, int bytes)
4422 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4425 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4429 struct read_write_emulator_ops {
4430 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4432 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4433 void *val, int bytes);
4434 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4435 int bytes, void *val);
4436 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4437 void *val, int bytes);
4441 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4443 if (vcpu->mmio_read_completed) {
4444 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4445 vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4446 vcpu->mmio_read_completed = 0;
4453 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4454 void *val, int bytes)
4456 return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4459 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4460 void *val, int bytes)
4462 return emulator_write_phys(vcpu, gpa, val, bytes);
4465 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4467 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4468 return vcpu_mmio_write(vcpu, gpa, bytes, val);
4471 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4472 void *val, int bytes)
4474 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4475 return X86EMUL_IO_NEEDED;
4478 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4479 void *val, int bytes)
4481 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4483 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4484 return X86EMUL_CONTINUE;
4487 static const struct read_write_emulator_ops read_emultor = {
4488 .read_write_prepare = read_prepare,
4489 .read_write_emulate = read_emulate,
4490 .read_write_mmio = vcpu_mmio_read,
4491 .read_write_exit_mmio = read_exit_mmio,
4494 static const struct read_write_emulator_ops write_emultor = {
4495 .read_write_emulate = write_emulate,
4496 .read_write_mmio = write_mmio,
4497 .read_write_exit_mmio = write_exit_mmio,
4501 static int emulator_read_write_onepage(unsigned long addr, void *val,
4503 struct x86_exception *exception,
4504 struct kvm_vcpu *vcpu,
4505 const struct read_write_emulator_ops *ops)
4509 bool write = ops->write;
4510 struct kvm_mmio_fragment *frag;
4512 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4515 return X86EMUL_PROPAGATE_FAULT;
4517 /* For APIC access vmexit */
4521 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4522 return X86EMUL_CONTINUE;
4526 * Is this MMIO handled locally?
4528 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4529 if (handled == bytes)
4530 return X86EMUL_CONTINUE;
4536 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4537 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4541 return X86EMUL_CONTINUE;
4544 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4546 void *val, unsigned int bytes,
4547 struct x86_exception *exception,
4548 const struct read_write_emulator_ops *ops)
4550 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4554 if (ops->read_write_prepare &&
4555 ops->read_write_prepare(vcpu, val, bytes))
4556 return X86EMUL_CONTINUE;
4558 vcpu->mmio_nr_fragments = 0;
4560 /* Crossing a page boundary? */
4561 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4564 now = -addr & ~PAGE_MASK;
4565 rc = emulator_read_write_onepage(addr, val, now, exception,
4568 if (rc != X86EMUL_CONTINUE)
4571 if (ctxt->mode != X86EMUL_MODE_PROT64)
4577 rc = emulator_read_write_onepage(addr, val, bytes, exception,
4579 if (rc != X86EMUL_CONTINUE)
4582 if (!vcpu->mmio_nr_fragments)
4585 gpa = vcpu->mmio_fragments[0].gpa;
4587 vcpu->mmio_needed = 1;
4588 vcpu->mmio_cur_fragment = 0;
4590 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4591 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4592 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4593 vcpu->run->mmio.phys_addr = gpa;
4595 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4598 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4602 struct x86_exception *exception)
4604 return emulator_read_write(ctxt, addr, val, bytes,
4605 exception, &read_emultor);
4608 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4612 struct x86_exception *exception)
4614 return emulator_read_write(ctxt, addr, (void *)val, bytes,
4615 exception, &write_emultor);
4618 #define CMPXCHG_TYPE(t, ptr, old, new) \
4619 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4621 #ifdef CONFIG_X86_64
4622 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4624 # define CMPXCHG64(ptr, old, new) \
4625 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4628 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4633 struct x86_exception *exception)
4635 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4641 /* guests cmpxchg8b have to be emulated atomically */
4642 if (bytes > 8 || (bytes & (bytes - 1)))
4645 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4647 if (gpa == UNMAPPED_GVA ||
4648 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4651 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4654 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4655 if (is_error_page(page))
4658 kaddr = kmap_atomic(page);
4659 kaddr += offset_in_page(gpa);
4662 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4665 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4668 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4671 exchanged = CMPXCHG64(kaddr, old, new);
4676 kunmap_atomic(kaddr);
4677 kvm_release_page_dirty(page);
4680 return X86EMUL_CMPXCHG_FAILED;
4682 mark_page_dirty(vcpu->kvm, gpa >> PAGE_SHIFT);
4683 kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4685 return X86EMUL_CONTINUE;
4688 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4690 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4693 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4695 /* TODO: String I/O for in kernel device */
4698 if (vcpu->arch.pio.in)
4699 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4700 vcpu->arch.pio.size, pd);
4702 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4703 vcpu->arch.pio.port, vcpu->arch.pio.size,
4708 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4709 unsigned short port, void *val,
4710 unsigned int count, bool in)
4712 vcpu->arch.pio.port = port;
4713 vcpu->arch.pio.in = in;
4714 vcpu->arch.pio.count = count;
4715 vcpu->arch.pio.size = size;
4717 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4718 vcpu->arch.pio.count = 0;
4722 vcpu->run->exit_reason = KVM_EXIT_IO;
4723 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4724 vcpu->run->io.size = size;
4725 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4726 vcpu->run->io.count = count;
4727 vcpu->run->io.port = port;
4732 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4733 int size, unsigned short port, void *val,
4736 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4739 if (vcpu->arch.pio.count)
4742 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4745 memcpy(val, vcpu->arch.pio_data, size * count);
4746 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4747 vcpu->arch.pio.count = 0;
4754 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4755 int size, unsigned short port,
4756 const void *val, unsigned int count)
4758 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4760 memcpy(vcpu->arch.pio_data, val, size * count);
4761 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4762 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4765 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4767 return kvm_x86_ops->get_segment_base(vcpu, seg);
4770 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4772 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4775 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4777 if (!need_emulate_wbinvd(vcpu))
4778 return X86EMUL_CONTINUE;
4780 if (kvm_x86_ops->has_wbinvd_exit()) {
4781 int cpu = get_cpu();
4783 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4784 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4785 wbinvd_ipi, NULL, 1);
4787 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4790 return X86EMUL_CONTINUE;
4793 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4795 kvm_x86_ops->skip_emulated_instruction(vcpu);
4796 return kvm_emulate_wbinvd_noskip(vcpu);
4798 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4802 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4804 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4807 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4808 unsigned long *dest)
4810 return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4813 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4814 unsigned long value)
4817 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4820 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4822 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4825 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4827 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4828 unsigned long value;
4832 value = kvm_read_cr0(vcpu);
4835 value = vcpu->arch.cr2;
4838 value = kvm_read_cr3(vcpu);
4841 value = kvm_read_cr4(vcpu);
4844 value = kvm_get_cr8(vcpu);
4847 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4854 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4856 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4861 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4864 vcpu->arch.cr2 = val;
4867 res = kvm_set_cr3(vcpu, val);
4870 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4873 res = kvm_set_cr8(vcpu, val);
4876 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4883 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4885 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4888 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4890 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4893 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4895 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4898 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4900 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4903 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4905 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4908 static unsigned long emulator_get_cached_segment_base(
4909 struct x86_emulate_ctxt *ctxt, int seg)
4911 return get_segment_base(emul_to_vcpu(ctxt), seg);
4914 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4915 struct desc_struct *desc, u32 *base3,
4918 struct kvm_segment var;
4920 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4921 *selector = var.selector;
4924 memset(desc, 0, sizeof(*desc));
4930 set_desc_limit(desc, var.limit);
4931 set_desc_base(desc, (unsigned long)var.base);
4932 #ifdef CONFIG_X86_64
4934 *base3 = var.base >> 32;
4936 desc->type = var.type;
4938 desc->dpl = var.dpl;
4939 desc->p = var.present;
4940 desc->avl = var.avl;
4948 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4949 struct desc_struct *desc, u32 base3,
4952 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4953 struct kvm_segment var;
4955 var.selector = selector;
4956 var.base = get_desc_base(desc);
4957 #ifdef CONFIG_X86_64
4958 var.base |= ((u64)base3) << 32;
4960 var.limit = get_desc_limit(desc);
4962 var.limit = (var.limit << 12) | 0xfff;
4963 var.type = desc->type;
4964 var.dpl = desc->dpl;
4969 var.avl = desc->avl;
4970 var.present = desc->p;
4971 var.unusable = !var.present;
4974 kvm_set_segment(vcpu, &var, seg);
4978 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4979 u32 msr_index, u64 *pdata)
4981 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4984 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4985 u32 msr_index, u64 data)
4987 struct msr_data msr;
4990 msr.index = msr_index;
4991 msr.host_initiated = false;
4992 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4995 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4998 return kvm_pmu_check_pmc(emul_to_vcpu(ctxt), pmc);
5001 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5002 u32 pmc, u64 *pdata)
5004 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
5007 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5009 emul_to_vcpu(ctxt)->arch.halt_request = 1;
5012 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5015 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5017 * CR0.TS may reference the host fpu state, not the guest fpu state,
5018 * so it may be clear at this point.
5023 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5028 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5029 struct x86_instruction_info *info,
5030 enum x86_intercept_stage stage)
5032 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5035 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5036 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5038 kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5041 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5043 return kvm_register_read(emul_to_vcpu(ctxt), reg);
5046 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5048 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5051 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5053 kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5056 static const struct x86_emulate_ops emulate_ops = {
5057 .read_gpr = emulator_read_gpr,
5058 .write_gpr = emulator_write_gpr,
5059 .read_std = kvm_read_guest_virt_system,
5060 .write_std = kvm_write_guest_virt_system,
5061 .fetch = kvm_fetch_guest_virt,
5062 .read_emulated = emulator_read_emulated,
5063 .write_emulated = emulator_write_emulated,
5064 .cmpxchg_emulated = emulator_cmpxchg_emulated,
5065 .invlpg = emulator_invlpg,
5066 .pio_in_emulated = emulator_pio_in_emulated,
5067 .pio_out_emulated = emulator_pio_out_emulated,
5068 .get_segment = emulator_get_segment,
5069 .set_segment = emulator_set_segment,
5070 .get_cached_segment_base = emulator_get_cached_segment_base,
5071 .get_gdt = emulator_get_gdt,
5072 .get_idt = emulator_get_idt,
5073 .set_gdt = emulator_set_gdt,
5074 .set_idt = emulator_set_idt,
5075 .get_cr = emulator_get_cr,
5076 .set_cr = emulator_set_cr,
5077 .cpl = emulator_get_cpl,
5078 .get_dr = emulator_get_dr,
5079 .set_dr = emulator_set_dr,
5080 .set_msr = emulator_set_msr,
5081 .get_msr = emulator_get_msr,
5082 .check_pmc = emulator_check_pmc,
5083 .read_pmc = emulator_read_pmc,
5084 .halt = emulator_halt,
5085 .wbinvd = emulator_wbinvd,
5086 .fix_hypercall = emulator_fix_hypercall,
5087 .get_fpu = emulator_get_fpu,
5088 .put_fpu = emulator_put_fpu,
5089 .intercept = emulator_intercept,
5090 .get_cpuid = emulator_get_cpuid,
5091 .set_nmi_mask = emulator_set_nmi_mask,
5094 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5096 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5098 * an sti; sti; sequence only disable interrupts for the first
5099 * instruction. So, if the last instruction, be it emulated or
5100 * not, left the system with the INT_STI flag enabled, it
5101 * means that the last instruction is an sti. We should not
5102 * leave the flag on in this case. The same goes for mov ss
5104 if (int_shadow & mask)
5106 if (unlikely(int_shadow || mask)) {
5107 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5109 kvm_make_request(KVM_REQ_EVENT, vcpu);
5113 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5115 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5116 if (ctxt->exception.vector == PF_VECTOR)
5117 return kvm_propagate_fault(vcpu, &ctxt->exception);
5119 if (ctxt->exception.error_code_valid)
5120 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5121 ctxt->exception.error_code);
5123 kvm_queue_exception(vcpu, ctxt->exception.vector);
5127 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5129 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5132 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5134 ctxt->eflags = kvm_get_rflags(vcpu);
5135 ctxt->eip = kvm_rip_read(vcpu);
5136 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5137 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
5138 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
5139 cs_db ? X86EMUL_MODE_PROT32 :
5140 X86EMUL_MODE_PROT16;
5141 ctxt->guest_mode = is_guest_mode(vcpu);
5143 init_decode_cache(ctxt);
5144 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5147 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5149 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5152 init_emulate_ctxt(vcpu);
5156 ctxt->_eip = ctxt->eip + inc_eip;
5157 ret = emulate_int_real(ctxt, irq);
5159 if (ret != X86EMUL_CONTINUE)
5160 return EMULATE_FAIL;
5162 ctxt->eip = ctxt->_eip;
5163 kvm_rip_write(vcpu, ctxt->eip);
5164 kvm_set_rflags(vcpu, ctxt->eflags);
5166 if (irq == NMI_VECTOR)
5167 vcpu->arch.nmi_pending = 0;
5169 vcpu->arch.interrupt.pending = false;
5171 return EMULATE_DONE;
5173 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5175 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5177 int r = EMULATE_DONE;
5179 ++vcpu->stat.insn_emulation_fail;
5180 trace_kvm_emulate_insn_failed(vcpu);
5181 if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5182 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5183 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5184 vcpu->run->internal.ndata = 0;
5187 kvm_queue_exception(vcpu, UD_VECTOR);
5192 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5193 bool write_fault_to_shadow_pgtable,
5199 if (emulation_type & EMULTYPE_NO_REEXECUTE)
5202 if (!vcpu->arch.mmu.direct_map) {
5204 * Write permission should be allowed since only
5205 * write access need to be emulated.
5207 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5210 * If the mapping is invalid in guest, let cpu retry
5211 * it to generate fault.
5213 if (gpa == UNMAPPED_GVA)
5218 * Do not retry the unhandleable instruction if it faults on the
5219 * readonly host memory, otherwise it will goto a infinite loop:
5220 * retry instruction -> write #PF -> emulation fail -> retry
5221 * instruction -> ...
5223 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5226 * If the instruction failed on the error pfn, it can not be fixed,
5227 * report the error to userspace.
5229 if (is_error_noslot_pfn(pfn))
5232 kvm_release_pfn_clean(pfn);
5234 /* The instructions are well-emulated on direct mmu. */
5235 if (vcpu->arch.mmu.direct_map) {
5236 unsigned int indirect_shadow_pages;
5238 spin_lock(&vcpu->kvm->mmu_lock);
5239 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5240 spin_unlock(&vcpu->kvm->mmu_lock);
5242 if (indirect_shadow_pages)
5243 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5249 * if emulation was due to access to shadowed page table
5250 * and it failed try to unshadow page and re-enter the
5251 * guest to let CPU execute the instruction.
5253 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5256 * If the access faults on its page table, it can not
5257 * be fixed by unprotecting shadow page and it should
5258 * be reported to userspace.
5260 return !write_fault_to_shadow_pgtable;
5263 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5264 unsigned long cr2, int emulation_type)
5266 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5267 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5269 last_retry_eip = vcpu->arch.last_retry_eip;
5270 last_retry_addr = vcpu->arch.last_retry_addr;
5273 * If the emulation is caused by #PF and it is non-page_table
5274 * writing instruction, it means the VM-EXIT is caused by shadow
5275 * page protected, we can zap the shadow page and retry this
5276 * instruction directly.
5278 * Note: if the guest uses a non-page-table modifying instruction
5279 * on the PDE that points to the instruction, then we will unmap
5280 * the instruction and go to an infinite loop. So, we cache the
5281 * last retried eip and the last fault address, if we meet the eip
5282 * and the address again, we can break out of the potential infinite
5285 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5287 if (!(emulation_type & EMULTYPE_RETRY))
5290 if (x86_page_table_writing_insn(ctxt))
5293 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5296 vcpu->arch.last_retry_eip = ctxt->eip;
5297 vcpu->arch.last_retry_addr = cr2;
5299 if (!vcpu->arch.mmu.direct_map)
5300 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5302 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5307 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5308 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5310 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5319 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5320 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5325 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5327 struct kvm_run *kvm_run = vcpu->run;
5330 * rflags is the old, "raw" value of the flags. The new value has
5331 * not been saved yet.
5333 * This is correct even for TF set by the guest, because "the
5334 * processor will not generate this exception after the instruction
5335 * that sets the TF flag".
5337 if (unlikely(rflags & X86_EFLAGS_TF)) {
5338 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5339 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5341 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5342 kvm_run->debug.arch.exception = DB_VECTOR;
5343 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5344 *r = EMULATE_USER_EXIT;
5346 vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5348 * "Certain debug exceptions may clear bit 0-3. The
5349 * remaining contents of the DR6 register are never
5350 * cleared by the processor".
5352 vcpu->arch.dr6 &= ~15;
5353 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5354 kvm_queue_exception(vcpu, DB_VECTOR);
5359 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5361 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5362 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5363 struct kvm_run *kvm_run = vcpu->run;
5364 unsigned long eip = kvm_get_linear_rip(vcpu);
5365 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5366 vcpu->arch.guest_debug_dr7,
5370 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5371 kvm_run->debug.arch.pc = eip;
5372 kvm_run->debug.arch.exception = DB_VECTOR;
5373 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5374 *r = EMULATE_USER_EXIT;
5379 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5380 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5381 unsigned long eip = kvm_get_linear_rip(vcpu);
5382 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5387 vcpu->arch.dr6 &= ~15;
5388 vcpu->arch.dr6 |= dr6 | DR6_RTM;
5389 kvm_queue_exception(vcpu, DB_VECTOR);
5398 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5405 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5406 bool writeback = true;
5407 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5410 * Clear write_fault_to_shadow_pgtable here to ensure it is
5413 vcpu->arch.write_fault_to_shadow_pgtable = false;
5414 kvm_clear_exception_queue(vcpu);
5416 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5417 init_emulate_ctxt(vcpu);
5420 * We will reenter on the same instruction since
5421 * we do not set complete_userspace_io. This does not
5422 * handle watchpoints yet, those would be handled in
5425 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5428 ctxt->interruptibility = 0;
5429 ctxt->have_exception = false;
5430 ctxt->exception.vector = -1;
5431 ctxt->perm_ok = false;
5433 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5435 r = x86_decode_insn(ctxt, insn, insn_len);
5437 trace_kvm_emulate_insn_start(vcpu);
5438 ++vcpu->stat.insn_emulation;
5439 if (r != EMULATION_OK) {
5440 if (emulation_type & EMULTYPE_TRAP_UD)
5441 return EMULATE_FAIL;
5442 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5444 return EMULATE_DONE;
5445 if (emulation_type & EMULTYPE_SKIP)
5446 return EMULATE_FAIL;
5447 return handle_emulation_failure(vcpu);
5451 if (emulation_type & EMULTYPE_SKIP) {
5452 kvm_rip_write(vcpu, ctxt->_eip);
5453 if (ctxt->eflags & X86_EFLAGS_RF)
5454 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5455 return EMULATE_DONE;
5458 if (retry_instruction(ctxt, cr2, emulation_type))
5459 return EMULATE_DONE;
5461 /* this is needed for vmware backdoor interface to work since it
5462 changes registers values during IO operation */
5463 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5464 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5465 emulator_invalidate_register_cache(ctxt);
5469 r = x86_emulate_insn(ctxt);
5471 if (r == EMULATION_INTERCEPTED)
5472 return EMULATE_DONE;
5474 if (r == EMULATION_FAILED) {
5475 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5477 return EMULATE_DONE;
5479 return handle_emulation_failure(vcpu);
5482 if (ctxt->have_exception) {
5484 if (inject_emulated_exception(vcpu))
5486 } else if (vcpu->arch.pio.count) {
5487 if (!vcpu->arch.pio.in) {
5488 /* FIXME: return into emulator if single-stepping. */
5489 vcpu->arch.pio.count = 0;
5492 vcpu->arch.complete_userspace_io = complete_emulated_pio;
5494 r = EMULATE_USER_EXIT;
5495 } else if (vcpu->mmio_needed) {
5496 if (!vcpu->mmio_is_write)
5498 r = EMULATE_USER_EXIT;
5499 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5500 } else if (r == EMULATION_RESTART)
5506 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5507 toggle_interruptibility(vcpu, ctxt->interruptibility);
5508 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5509 kvm_rip_write(vcpu, ctxt->eip);
5510 if (r == EMULATE_DONE)
5511 kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5512 if (!ctxt->have_exception ||
5513 exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5514 __kvm_set_rflags(vcpu, ctxt->eflags);
5517 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5518 * do nothing, and it will be requested again as soon as
5519 * the shadow expires. But we still need to check here,
5520 * because POPF has no interrupt shadow.
5522 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5523 kvm_make_request(KVM_REQ_EVENT, vcpu);
5525 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5529 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5531 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5533 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5534 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5535 size, port, &val, 1);
5536 /* do not return to emulator after return from userspace */
5537 vcpu->arch.pio.count = 0;
5540 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5542 static void tsc_bad(void *info)
5544 __this_cpu_write(cpu_tsc_khz, 0);
5547 static void tsc_khz_changed(void *data)
5549 struct cpufreq_freqs *freq = data;
5550 unsigned long khz = 0;
5554 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5555 khz = cpufreq_quick_get(raw_smp_processor_id());
5558 __this_cpu_write(cpu_tsc_khz, khz);
5561 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5564 struct cpufreq_freqs *freq = data;
5566 struct kvm_vcpu *vcpu;
5567 int i, send_ipi = 0;
5570 * We allow guests to temporarily run on slowing clocks,
5571 * provided we notify them after, or to run on accelerating
5572 * clocks, provided we notify them before. Thus time never
5575 * However, we have a problem. We can't atomically update
5576 * the frequency of a given CPU from this function; it is
5577 * merely a notifier, which can be called from any CPU.
5578 * Changing the TSC frequency at arbitrary points in time
5579 * requires a recomputation of local variables related to
5580 * the TSC for each VCPU. We must flag these local variables
5581 * to be updated and be sure the update takes place with the
5582 * new frequency before any guests proceed.
5584 * Unfortunately, the combination of hotplug CPU and frequency
5585 * change creates an intractable locking scenario; the order
5586 * of when these callouts happen is undefined with respect to
5587 * CPU hotplug, and they can race with each other. As such,
5588 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5589 * undefined; you can actually have a CPU frequency change take
5590 * place in between the computation of X and the setting of the
5591 * variable. To protect against this problem, all updates of
5592 * the per_cpu tsc_khz variable are done in an interrupt
5593 * protected IPI, and all callers wishing to update the value
5594 * must wait for a synchronous IPI to complete (which is trivial
5595 * if the caller is on the CPU already). This establishes the
5596 * necessary total order on variable updates.
5598 * Note that because a guest time update may take place
5599 * anytime after the setting of the VCPU's request bit, the
5600 * correct TSC value must be set before the request. However,
5601 * to ensure the update actually makes it to any guest which
5602 * starts running in hardware virtualization between the set
5603 * and the acquisition of the spinlock, we must also ping the
5604 * CPU after setting the request bit.
5608 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5610 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5613 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5615 spin_lock(&kvm_lock);
5616 list_for_each_entry(kvm, &vm_list, vm_list) {
5617 kvm_for_each_vcpu(i, vcpu, kvm) {
5618 if (vcpu->cpu != freq->cpu)
5620 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5621 if (vcpu->cpu != smp_processor_id())
5625 spin_unlock(&kvm_lock);
5627 if (freq->old < freq->new && send_ipi) {
5629 * We upscale the frequency. Must make the guest
5630 * doesn't see old kvmclock values while running with
5631 * the new frequency, otherwise we risk the guest sees
5632 * time go backwards.
5634 * In case we update the frequency for another cpu
5635 * (which might be in guest context) send an interrupt
5636 * to kick the cpu out of guest context. Next time
5637 * guest context is entered kvmclock will be updated,
5638 * so the guest will not see stale values.
5640 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5645 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5646 .notifier_call = kvmclock_cpufreq_notifier
5649 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5650 unsigned long action, void *hcpu)
5652 unsigned int cpu = (unsigned long)hcpu;
5656 case CPU_DOWN_FAILED:
5657 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5659 case CPU_DOWN_PREPARE:
5660 smp_call_function_single(cpu, tsc_bad, NULL, 1);
5666 static struct notifier_block kvmclock_cpu_notifier_block = {
5667 .notifier_call = kvmclock_cpu_notifier,
5668 .priority = -INT_MAX
5671 static void kvm_timer_init(void)
5675 max_tsc_khz = tsc_khz;
5677 cpu_notifier_register_begin();
5678 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5679 #ifdef CONFIG_CPU_FREQ
5680 struct cpufreq_policy policy;
5681 memset(&policy, 0, sizeof(policy));
5683 cpufreq_get_policy(&policy, cpu);
5684 if (policy.cpuinfo.max_freq)
5685 max_tsc_khz = policy.cpuinfo.max_freq;
5688 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5689 CPUFREQ_TRANSITION_NOTIFIER);
5691 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5692 for_each_online_cpu(cpu)
5693 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5695 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5696 cpu_notifier_register_done();
5700 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5702 int kvm_is_in_guest(void)
5704 return __this_cpu_read(current_vcpu) != NULL;
5707 static int kvm_is_user_mode(void)
5711 if (__this_cpu_read(current_vcpu))
5712 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5714 return user_mode != 0;
5717 static unsigned long kvm_get_guest_ip(void)
5719 unsigned long ip = 0;
5721 if (__this_cpu_read(current_vcpu))
5722 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5727 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5728 .is_in_guest = kvm_is_in_guest,
5729 .is_user_mode = kvm_is_user_mode,
5730 .get_guest_ip = kvm_get_guest_ip,
5733 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5735 __this_cpu_write(current_vcpu, vcpu);
5737 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5739 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5741 __this_cpu_write(current_vcpu, NULL);
5743 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5745 static void kvm_set_mmio_spte_mask(void)
5748 int maxphyaddr = boot_cpu_data.x86_phys_bits;
5751 * Set the reserved bits and the present bit of an paging-structure
5752 * entry to generate page fault with PFER.RSV = 1.
5754 /* Mask the reserved physical address bits. */
5755 mask = rsvd_bits(maxphyaddr, 51);
5757 /* Bit 62 is always reserved for 32bit host. */
5758 mask |= 0x3ull << 62;
5760 /* Set the present bit. */
5763 #ifdef CONFIG_X86_64
5765 * If reserved bit is not supported, clear the present bit to disable
5768 if (maxphyaddr == 52)
5772 kvm_mmu_set_mmio_spte_mask(mask);
5775 #ifdef CONFIG_X86_64
5776 static void pvclock_gtod_update_fn(struct work_struct *work)
5780 struct kvm_vcpu *vcpu;
5783 spin_lock(&kvm_lock);
5784 list_for_each_entry(kvm, &vm_list, vm_list)
5785 kvm_for_each_vcpu(i, vcpu, kvm)
5786 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5787 atomic_set(&kvm_guest_has_master_clock, 0);
5788 spin_unlock(&kvm_lock);
5791 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5794 * Notification about pvclock gtod data update.
5796 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5799 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5800 struct timekeeper *tk = priv;
5802 update_pvclock_gtod(tk);
5804 /* disable master clock if host does not trust, or does not
5805 * use, TSC clocksource
5807 if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5808 atomic_read(&kvm_guest_has_master_clock) != 0)
5809 queue_work(system_long_wq, &pvclock_gtod_work);
5814 static struct notifier_block pvclock_gtod_notifier = {
5815 .notifier_call = pvclock_gtod_notify,
5819 int kvm_arch_init(void *opaque)
5822 struct kvm_x86_ops *ops = opaque;
5825 printk(KERN_ERR "kvm: already loaded the other module\n");
5830 if (!ops->cpu_has_kvm_support()) {
5831 printk(KERN_ERR "kvm: no hardware support\n");
5835 if (ops->disabled_by_bios()) {
5836 printk(KERN_ERR "kvm: disabled by bios\n");
5842 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5844 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5848 r = kvm_mmu_module_init();
5850 goto out_free_percpu;
5852 kvm_set_mmio_spte_mask();
5856 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5857 PT_DIRTY_MASK, PT64_NX_MASK, 0);
5861 perf_register_guest_info_callbacks(&kvm_guest_cbs);
5864 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5867 #ifdef CONFIG_X86_64
5868 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5874 free_percpu(shared_msrs);
5879 void kvm_arch_exit(void)
5881 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5883 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5884 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5885 CPUFREQ_TRANSITION_NOTIFIER);
5886 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5887 #ifdef CONFIG_X86_64
5888 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5891 kvm_mmu_module_exit();
5892 free_percpu(shared_msrs);
5895 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5897 ++vcpu->stat.halt_exits;
5898 if (irqchip_in_kernel(vcpu->kvm)) {
5899 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5902 vcpu->run->exit_reason = KVM_EXIT_HLT;
5906 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5908 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5910 kvm_x86_ops->skip_emulated_instruction(vcpu);
5911 return kvm_vcpu_halt(vcpu);
5913 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5915 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5917 u64 param, ingpa, outgpa, ret;
5918 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5919 bool fast, longmode;
5922 * hypercall generates UD from non zero cpl and real mode
5925 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5926 kvm_queue_exception(vcpu, UD_VECTOR);
5930 longmode = is_64_bit_mode(vcpu);
5933 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5934 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5935 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5936 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5937 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5938 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5940 #ifdef CONFIG_X86_64
5942 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5943 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5944 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5948 code = param & 0xffff;
5949 fast = (param >> 16) & 0x1;
5950 rep_cnt = (param >> 32) & 0xfff;
5951 rep_idx = (param >> 48) & 0xfff;
5953 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5956 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5957 kvm_vcpu_on_spin(vcpu);
5960 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5964 ret = res | (((u64)rep_done & 0xfff) << 32);
5966 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5968 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5969 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5976 * kvm_pv_kick_cpu_op: Kick a vcpu.
5978 * @apicid - apicid of vcpu to be kicked.
5980 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5982 struct kvm_lapic_irq lapic_irq;
5984 lapic_irq.shorthand = 0;
5985 lapic_irq.dest_mode = 0;
5986 lapic_irq.dest_id = apicid;
5988 lapic_irq.delivery_mode = APIC_DM_REMRD;
5989 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5992 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5994 unsigned long nr, a0, a1, a2, a3, ret;
5995 int op_64_bit, r = 1;
5997 kvm_x86_ops->skip_emulated_instruction(vcpu);
5999 if (kvm_hv_hypercall_enabled(vcpu->kvm))
6000 return kvm_hv_hypercall(vcpu);
6002 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6003 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6004 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6005 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6006 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6008 trace_kvm_hypercall(nr, a0, a1, a2, a3);
6010 op_64_bit = is_64_bit_mode(vcpu);
6019 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6025 case KVM_HC_VAPIC_POLL_IRQ:
6028 case KVM_HC_KICK_CPU:
6029 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6039 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6040 ++vcpu->stat.hypercalls;
6043 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6045 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6047 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6048 char instruction[3];
6049 unsigned long rip = kvm_rip_read(vcpu);
6051 kvm_x86_ops->patch_hypercall(vcpu, instruction);
6053 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6057 * Check if userspace requested an interrupt window, and that the
6058 * interrupt window is open.
6060 * No need to exit to userspace if we already have an interrupt queued.
6062 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6064 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
6065 vcpu->run->request_interrupt_window &&
6066 kvm_arch_interrupt_allowed(vcpu));
6069 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6071 struct kvm_run *kvm_run = vcpu->run;
6073 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6074 kvm_run->cr8 = kvm_get_cr8(vcpu);
6075 kvm_run->apic_base = kvm_get_apic_base(vcpu);
6076 if (irqchip_in_kernel(vcpu->kvm))
6077 kvm_run->ready_for_interrupt_injection = 1;
6079 kvm_run->ready_for_interrupt_injection =
6080 kvm_arch_interrupt_allowed(vcpu) &&
6081 !kvm_cpu_has_interrupt(vcpu) &&
6082 !kvm_event_needs_reinjection(vcpu);
6085 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6089 if (!kvm_x86_ops->update_cr8_intercept)
6092 if (!vcpu->arch.apic)
6095 if (!vcpu->arch.apic->vapic_addr)
6096 max_irr = kvm_lapic_find_highest_irr(vcpu);
6103 tpr = kvm_lapic_get_cr8(vcpu);
6105 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6108 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6112 /* try to reinject previous events if any */
6113 if (vcpu->arch.exception.pending) {
6114 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6115 vcpu->arch.exception.has_error_code,
6116 vcpu->arch.exception.error_code);
6118 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6119 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6122 if (vcpu->arch.exception.nr == DB_VECTOR &&
6123 (vcpu->arch.dr7 & DR7_GD)) {
6124 vcpu->arch.dr7 &= ~DR7_GD;
6125 kvm_update_dr7(vcpu);
6128 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6129 vcpu->arch.exception.has_error_code,
6130 vcpu->arch.exception.error_code,
6131 vcpu->arch.exception.reinject);
6135 if (vcpu->arch.nmi_injected) {
6136 kvm_x86_ops->set_nmi(vcpu);
6140 if (vcpu->arch.interrupt.pending) {
6141 kvm_x86_ops->set_irq(vcpu);
6145 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6146 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6151 /* try to inject new event if pending */
6152 if (vcpu->arch.nmi_pending) {
6153 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6154 --vcpu->arch.nmi_pending;
6155 vcpu->arch.nmi_injected = true;
6156 kvm_x86_ops->set_nmi(vcpu);
6158 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6160 * Because interrupts can be injected asynchronously, we are
6161 * calling check_nested_events again here to avoid a race condition.
6162 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6163 * proposal and current concerns. Perhaps we should be setting
6164 * KVM_REQ_EVENT only on certain events and not unconditionally?
6166 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6167 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6171 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6172 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6174 kvm_x86_ops->set_irq(vcpu);
6180 static void process_nmi(struct kvm_vcpu *vcpu)
6185 * x86 is limited to one NMI running, and one NMI pending after it.
6186 * If an NMI is already in progress, limit further NMIs to just one.
6187 * Otherwise, allow two (and we'll inject the first one immediately).
6189 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6192 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6193 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6194 kvm_make_request(KVM_REQ_EVENT, vcpu);
6197 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6199 u64 eoi_exit_bitmap[4];
6202 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6205 memset(eoi_exit_bitmap, 0, 32);
6208 kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
6209 kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6210 kvm_apic_update_tmr(vcpu, tmr);
6213 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6215 ++vcpu->stat.tlb_flush;
6216 kvm_x86_ops->tlb_flush(vcpu);
6219 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6221 struct page *page = NULL;
6223 if (!irqchip_in_kernel(vcpu->kvm))
6226 if (!kvm_x86_ops->set_apic_access_page_addr)
6229 page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6230 kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6233 * Do not pin apic access page in memory, the MMU notifier
6234 * will call us again if it is migrated or swapped out.
6238 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6240 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6241 unsigned long address)
6244 * The physical address of apic access page is stored in the VMCS.
6245 * Update it when it becomes invalid.
6247 if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6248 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6252 * Returns 1 to let vcpu_run() continue the guest execution loop without
6253 * exiting to the userspace. Otherwise, the value will be returned to the
6256 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6259 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
6260 vcpu->run->request_interrupt_window;
6261 bool req_immediate_exit = false;
6263 if (vcpu->requests) {
6264 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6265 kvm_mmu_unload(vcpu);
6266 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6267 __kvm_migrate_timers(vcpu);
6268 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6269 kvm_gen_update_masterclock(vcpu->kvm);
6270 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6271 kvm_gen_kvmclock_update(vcpu);
6272 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6273 r = kvm_guest_time_update(vcpu);
6277 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6278 kvm_mmu_sync_roots(vcpu);
6279 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6280 kvm_vcpu_flush_tlb(vcpu);
6281 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6282 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6286 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6287 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6291 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6292 vcpu->fpu_active = 0;
6293 kvm_x86_ops->fpu_deactivate(vcpu);
6295 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6296 /* Page is swapped out. Do synthetic halt */
6297 vcpu->arch.apf.halted = true;
6301 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6302 record_steal_time(vcpu);
6303 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6305 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6306 kvm_handle_pmu_event(vcpu);
6307 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6308 kvm_deliver_pmi(vcpu);
6309 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6310 vcpu_scan_ioapic(vcpu);
6311 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6312 kvm_vcpu_reload_apic_access_page(vcpu);
6315 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6316 kvm_apic_accept_events(vcpu);
6317 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6322 if (inject_pending_event(vcpu, req_int_win) != 0)
6323 req_immediate_exit = true;
6324 /* enable NMI/IRQ window open exits if needed */
6325 else if (vcpu->arch.nmi_pending)
6326 kvm_x86_ops->enable_nmi_window(vcpu);
6327 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6328 kvm_x86_ops->enable_irq_window(vcpu);
6330 if (kvm_lapic_enabled(vcpu)) {
6332 * Update architecture specific hints for APIC
6333 * virtual interrupt delivery.
6335 if (kvm_x86_ops->hwapic_irr_update)
6336 kvm_x86_ops->hwapic_irr_update(vcpu,
6337 kvm_lapic_find_highest_irr(vcpu));
6338 update_cr8_intercept(vcpu);
6339 kvm_lapic_sync_to_vapic(vcpu);
6343 r = kvm_mmu_reload(vcpu);
6345 goto cancel_injection;
6350 kvm_x86_ops->prepare_guest_switch(vcpu);
6351 if (vcpu->fpu_active)
6352 kvm_load_guest_fpu(vcpu);
6353 kvm_load_guest_xcr0(vcpu);
6355 vcpu->mode = IN_GUEST_MODE;
6357 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6359 /* We should set ->mode before check ->requests,
6360 * see the comment in make_all_cpus_request.
6362 smp_mb__after_srcu_read_unlock();
6364 local_irq_disable();
6366 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6367 || need_resched() || signal_pending(current)) {
6368 vcpu->mode = OUTSIDE_GUEST_MODE;
6372 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6374 goto cancel_injection;
6377 if (req_immediate_exit)
6378 smp_send_reschedule(vcpu->cpu);
6380 __kvm_guest_enter();
6382 if (unlikely(vcpu->arch.switch_db_regs)) {
6384 set_debugreg(vcpu->arch.eff_db[0], 0);
6385 set_debugreg(vcpu->arch.eff_db[1], 1);
6386 set_debugreg(vcpu->arch.eff_db[2], 2);
6387 set_debugreg(vcpu->arch.eff_db[3], 3);
6388 set_debugreg(vcpu->arch.dr6, 6);
6389 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6392 trace_kvm_entry(vcpu->vcpu_id);
6393 wait_lapic_expire(vcpu);
6394 kvm_x86_ops->run(vcpu);
6397 * Do this here before restoring debug registers on the host. And
6398 * since we do this before handling the vmexit, a DR access vmexit
6399 * can (a) read the correct value of the debug registers, (b) set
6400 * KVM_DEBUGREG_WONT_EXIT again.
6402 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6405 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6406 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6407 for (i = 0; i < KVM_NR_DB_REGS; i++)
6408 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6412 * If the guest has used debug registers, at least dr7
6413 * will be disabled while returning to the host.
6414 * If we don't have active breakpoints in the host, we don't
6415 * care about the messed up debug address registers. But if
6416 * we have some of them active, restore the old state.
6418 if (hw_breakpoint_active())
6419 hw_breakpoint_restore();
6421 vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6424 vcpu->mode = OUTSIDE_GUEST_MODE;
6427 /* Interrupt is enabled by handle_external_intr() */
6428 kvm_x86_ops->handle_external_intr(vcpu);
6433 * We must have an instruction between local_irq_enable() and
6434 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6435 * the interrupt shadow. The stat.exits increment will do nicely.
6436 * But we need to prevent reordering, hence this barrier():
6444 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6447 * Profile KVM exit RIPs:
6449 if (unlikely(prof_on == KVM_PROFILING)) {
6450 unsigned long rip = kvm_rip_read(vcpu);
6451 profile_hit(KVM_PROFILING, (void *)rip);
6454 if (unlikely(vcpu->arch.tsc_always_catchup))
6455 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6457 if (vcpu->arch.apic_attention)
6458 kvm_lapic_sync_from_vapic(vcpu);
6460 r = kvm_x86_ops->handle_exit(vcpu);
6464 kvm_x86_ops->cancel_injection(vcpu);
6465 if (unlikely(vcpu->arch.apic_attention))
6466 kvm_lapic_sync_from_vapic(vcpu);
6471 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6473 if (!kvm_arch_vcpu_runnable(vcpu)) {
6474 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6475 kvm_vcpu_block(vcpu);
6476 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6477 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6481 kvm_apic_accept_events(vcpu);
6482 switch(vcpu->arch.mp_state) {
6483 case KVM_MP_STATE_HALTED:
6484 vcpu->arch.pv.pv_unhalted = false;
6485 vcpu->arch.mp_state =
6486 KVM_MP_STATE_RUNNABLE;
6487 case KVM_MP_STATE_RUNNABLE:
6488 vcpu->arch.apf.halted = false;
6490 case KVM_MP_STATE_INIT_RECEIVED:
6499 static int vcpu_run(struct kvm_vcpu *vcpu)
6502 struct kvm *kvm = vcpu->kvm;
6504 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6507 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6508 !vcpu->arch.apf.halted)
6509 r = vcpu_enter_guest(vcpu);
6511 r = vcpu_block(kvm, vcpu);
6515 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6516 if (kvm_cpu_has_pending_timer(vcpu))
6517 kvm_inject_pending_timer_irqs(vcpu);
6519 if (dm_request_for_irq_injection(vcpu)) {
6521 vcpu->run->exit_reason = KVM_EXIT_INTR;
6522 ++vcpu->stat.request_irq_exits;
6526 kvm_check_async_pf_completion(vcpu);
6528 if (signal_pending(current)) {
6530 vcpu->run->exit_reason = KVM_EXIT_INTR;
6531 ++vcpu->stat.signal_exits;
6534 if (need_resched()) {
6535 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6537 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6541 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6546 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6549 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6550 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6551 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6552 if (r != EMULATE_DONE)
6557 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6559 BUG_ON(!vcpu->arch.pio.count);
6561 return complete_emulated_io(vcpu);
6565 * Implements the following, as a state machine:
6569 * for each mmio piece in the fragment
6577 * for each mmio piece in the fragment
6582 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6584 struct kvm_run *run = vcpu->run;
6585 struct kvm_mmio_fragment *frag;
6588 BUG_ON(!vcpu->mmio_needed);
6590 /* Complete previous fragment */
6591 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6592 len = min(8u, frag->len);
6593 if (!vcpu->mmio_is_write)
6594 memcpy(frag->data, run->mmio.data, len);
6596 if (frag->len <= 8) {
6597 /* Switch to the next fragment. */
6599 vcpu->mmio_cur_fragment++;
6601 /* Go forward to the next mmio piece. */
6607 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6608 vcpu->mmio_needed = 0;
6610 /* FIXME: return into emulator if single-stepping. */
6611 if (vcpu->mmio_is_write)
6613 vcpu->mmio_read_completed = 1;
6614 return complete_emulated_io(vcpu);
6617 run->exit_reason = KVM_EXIT_MMIO;
6618 run->mmio.phys_addr = frag->gpa;
6619 if (vcpu->mmio_is_write)
6620 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6621 run->mmio.len = min(8u, frag->len);
6622 run->mmio.is_write = vcpu->mmio_is_write;
6623 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6628 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6633 if (!tsk_used_math(current) && init_fpu(current))
6636 if (vcpu->sigset_active)
6637 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6639 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6640 kvm_vcpu_block(vcpu);
6641 kvm_apic_accept_events(vcpu);
6642 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6647 /* re-sync apic's tpr */
6648 if (!irqchip_in_kernel(vcpu->kvm)) {
6649 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6655 if (unlikely(vcpu->arch.complete_userspace_io)) {
6656 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6657 vcpu->arch.complete_userspace_io = NULL;
6662 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6667 post_kvm_run_save(vcpu);
6668 if (vcpu->sigset_active)
6669 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6674 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6676 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6678 * We are here if userspace calls get_regs() in the middle of
6679 * instruction emulation. Registers state needs to be copied
6680 * back from emulation context to vcpu. Userspace shouldn't do
6681 * that usually, but some bad designed PV devices (vmware
6682 * backdoor interface) need this to work
6684 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6685 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6687 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6688 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6689 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6690 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6691 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6692 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6693 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6694 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6695 #ifdef CONFIG_X86_64
6696 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6697 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6698 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6699 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6700 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6701 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6702 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6703 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6706 regs->rip = kvm_rip_read(vcpu);
6707 regs->rflags = kvm_get_rflags(vcpu);
6712 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6714 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6715 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6717 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6718 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6719 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6720 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6721 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6722 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6723 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6724 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6725 #ifdef CONFIG_X86_64
6726 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6727 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6728 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6729 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6730 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6731 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6732 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6733 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6736 kvm_rip_write(vcpu, regs->rip);
6737 kvm_set_rflags(vcpu, regs->rflags);
6739 vcpu->arch.exception.pending = false;
6741 kvm_make_request(KVM_REQ_EVENT, vcpu);
6746 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6748 struct kvm_segment cs;
6750 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6754 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6756 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6757 struct kvm_sregs *sregs)
6761 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6762 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6763 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6764 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6765 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6766 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6768 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6769 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6771 kvm_x86_ops->get_idt(vcpu, &dt);
6772 sregs->idt.limit = dt.size;
6773 sregs->idt.base = dt.address;
6774 kvm_x86_ops->get_gdt(vcpu, &dt);
6775 sregs->gdt.limit = dt.size;
6776 sregs->gdt.base = dt.address;
6778 sregs->cr0 = kvm_read_cr0(vcpu);
6779 sregs->cr2 = vcpu->arch.cr2;
6780 sregs->cr3 = kvm_read_cr3(vcpu);
6781 sregs->cr4 = kvm_read_cr4(vcpu);
6782 sregs->cr8 = kvm_get_cr8(vcpu);
6783 sregs->efer = vcpu->arch.efer;
6784 sregs->apic_base = kvm_get_apic_base(vcpu);
6786 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6788 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6789 set_bit(vcpu->arch.interrupt.nr,
6790 (unsigned long *)sregs->interrupt_bitmap);
6795 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6796 struct kvm_mp_state *mp_state)
6798 kvm_apic_accept_events(vcpu);
6799 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6800 vcpu->arch.pv.pv_unhalted)
6801 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6803 mp_state->mp_state = vcpu->arch.mp_state;
6808 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6809 struct kvm_mp_state *mp_state)
6811 if (!kvm_vcpu_has_lapic(vcpu) &&
6812 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6815 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6816 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6817 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6819 vcpu->arch.mp_state = mp_state->mp_state;
6820 kvm_make_request(KVM_REQ_EVENT, vcpu);
6824 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6825 int reason, bool has_error_code, u32 error_code)
6827 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6830 init_emulate_ctxt(vcpu);
6832 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6833 has_error_code, error_code);
6836 return EMULATE_FAIL;
6838 kvm_rip_write(vcpu, ctxt->eip);
6839 kvm_set_rflags(vcpu, ctxt->eflags);
6840 kvm_make_request(KVM_REQ_EVENT, vcpu);
6841 return EMULATE_DONE;
6843 EXPORT_SYMBOL_GPL(kvm_task_switch);
6845 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6846 struct kvm_sregs *sregs)
6848 struct msr_data apic_base_msr;
6849 int mmu_reset_needed = 0;
6850 int pending_vec, max_bits, idx;
6853 if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6856 dt.size = sregs->idt.limit;
6857 dt.address = sregs->idt.base;
6858 kvm_x86_ops->set_idt(vcpu, &dt);
6859 dt.size = sregs->gdt.limit;
6860 dt.address = sregs->gdt.base;
6861 kvm_x86_ops->set_gdt(vcpu, &dt);
6863 vcpu->arch.cr2 = sregs->cr2;
6864 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6865 vcpu->arch.cr3 = sregs->cr3;
6866 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6868 kvm_set_cr8(vcpu, sregs->cr8);
6870 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6871 kvm_x86_ops->set_efer(vcpu, sregs->efer);
6872 apic_base_msr.data = sregs->apic_base;
6873 apic_base_msr.host_initiated = true;
6874 kvm_set_apic_base(vcpu, &apic_base_msr);
6876 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6877 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6878 vcpu->arch.cr0 = sregs->cr0;
6880 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6881 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6882 if (sregs->cr4 & X86_CR4_OSXSAVE)
6883 kvm_update_cpuid(vcpu);
6885 idx = srcu_read_lock(&vcpu->kvm->srcu);
6886 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6887 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6888 mmu_reset_needed = 1;
6890 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6892 if (mmu_reset_needed)
6893 kvm_mmu_reset_context(vcpu);
6895 max_bits = KVM_NR_INTERRUPTS;
6896 pending_vec = find_first_bit(
6897 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6898 if (pending_vec < max_bits) {
6899 kvm_queue_interrupt(vcpu, pending_vec, false);
6900 pr_debug("Set back pending irq %d\n", pending_vec);
6903 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6904 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6905 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6906 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6907 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6908 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6910 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6911 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6913 update_cr8_intercept(vcpu);
6915 /* Older userspace won't unhalt the vcpu on reset. */
6916 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6917 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6919 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6921 kvm_make_request(KVM_REQ_EVENT, vcpu);
6926 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6927 struct kvm_guest_debug *dbg)
6929 unsigned long rflags;
6932 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6934 if (vcpu->arch.exception.pending)
6936 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6937 kvm_queue_exception(vcpu, DB_VECTOR);
6939 kvm_queue_exception(vcpu, BP_VECTOR);
6943 * Read rflags as long as potentially injected trace flags are still
6946 rflags = kvm_get_rflags(vcpu);
6948 vcpu->guest_debug = dbg->control;
6949 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6950 vcpu->guest_debug = 0;
6952 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6953 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6954 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6955 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6957 for (i = 0; i < KVM_NR_DB_REGS; i++)
6958 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6960 kvm_update_dr7(vcpu);
6962 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6963 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6964 get_segment_base(vcpu, VCPU_SREG_CS);
6967 * Trigger an rflags update that will inject or remove the trace
6970 kvm_set_rflags(vcpu, rflags);
6972 kvm_x86_ops->update_db_bp_intercept(vcpu);
6982 * Translate a guest virtual address to a guest physical address.
6984 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6985 struct kvm_translation *tr)
6987 unsigned long vaddr = tr->linear_address;
6991 idx = srcu_read_lock(&vcpu->kvm->srcu);
6992 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6993 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6994 tr->physical_address = gpa;
6995 tr->valid = gpa != UNMAPPED_GVA;
7002 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7004 struct i387_fxsave_struct *fxsave =
7005 &vcpu->arch.guest_fpu.state->fxsave;
7007 memcpy(fpu->fpr, fxsave->st_space, 128);
7008 fpu->fcw = fxsave->cwd;
7009 fpu->fsw = fxsave->swd;
7010 fpu->ftwx = fxsave->twd;
7011 fpu->last_opcode = fxsave->fop;
7012 fpu->last_ip = fxsave->rip;
7013 fpu->last_dp = fxsave->rdp;
7014 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7019 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7021 struct i387_fxsave_struct *fxsave =
7022 &vcpu->arch.guest_fpu.state->fxsave;
7024 memcpy(fxsave->st_space, fpu->fpr, 128);
7025 fxsave->cwd = fpu->fcw;
7026 fxsave->swd = fpu->fsw;
7027 fxsave->twd = fpu->ftwx;
7028 fxsave->fop = fpu->last_opcode;
7029 fxsave->rip = fpu->last_ip;
7030 fxsave->rdp = fpu->last_dp;
7031 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7036 int fx_init(struct kvm_vcpu *vcpu)
7040 err = fpu_alloc(&vcpu->arch.guest_fpu);
7044 fpu_finit(&vcpu->arch.guest_fpu);
7046 vcpu->arch.guest_fpu.state->xsave.xsave_hdr.xcomp_bv =
7047 host_xcr0 | XSTATE_COMPACTION_ENABLED;
7050 * Ensure guest xcr0 is valid for loading
7052 vcpu->arch.xcr0 = XSTATE_FP;
7054 vcpu->arch.cr0 |= X86_CR0_ET;
7058 EXPORT_SYMBOL_GPL(fx_init);
7060 static void fx_free(struct kvm_vcpu *vcpu)
7062 fpu_free(&vcpu->arch.guest_fpu);
7065 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7067 if (vcpu->guest_fpu_loaded)
7071 * Restore all possible states in the guest,
7072 * and assume host would use all available bits.
7073 * Guest xcr0 would be loaded later.
7075 kvm_put_guest_xcr0(vcpu);
7076 vcpu->guest_fpu_loaded = 1;
7077 __kernel_fpu_begin();
7078 fpu_restore_checking(&vcpu->arch.guest_fpu);
7082 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7084 kvm_put_guest_xcr0(vcpu);
7086 if (!vcpu->guest_fpu_loaded)
7089 vcpu->guest_fpu_loaded = 0;
7090 fpu_save_init(&vcpu->arch.guest_fpu);
7092 ++vcpu->stat.fpu_reload;
7093 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7097 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7099 kvmclock_reset(vcpu);
7101 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7103 kvm_x86_ops->vcpu_free(vcpu);
7106 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7109 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7110 printk_once(KERN_WARNING
7111 "kvm: SMP vm created on host with unstable TSC; "
7112 "guest TSC will not be reliable\n");
7113 return kvm_x86_ops->vcpu_create(kvm, id);
7116 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7120 vcpu->arch.mtrr_state.have_fixed = 1;
7121 r = vcpu_load(vcpu);
7124 kvm_vcpu_reset(vcpu);
7125 kvm_mmu_setup(vcpu);
7131 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7133 struct msr_data msr;
7134 struct kvm *kvm = vcpu->kvm;
7136 if (vcpu_load(vcpu))
7139 msr.index = MSR_IA32_TSC;
7140 msr.host_initiated = true;
7141 kvm_write_tsc(vcpu, &msr);
7144 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7145 KVMCLOCK_SYNC_PERIOD);
7148 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7151 vcpu->arch.apf.msr_val = 0;
7153 r = vcpu_load(vcpu);
7155 kvm_mmu_unload(vcpu);
7159 kvm_x86_ops->vcpu_free(vcpu);
7162 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
7164 atomic_set(&vcpu->arch.nmi_queued, 0);
7165 vcpu->arch.nmi_pending = 0;
7166 vcpu->arch.nmi_injected = false;
7167 kvm_clear_interrupt_queue(vcpu);
7168 kvm_clear_exception_queue(vcpu);
7170 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7171 kvm_update_dr0123(vcpu);
7172 vcpu->arch.dr6 = DR6_INIT;
7173 kvm_update_dr6(vcpu);
7174 vcpu->arch.dr7 = DR7_FIXED_1;
7175 kvm_update_dr7(vcpu);
7179 kvm_make_request(KVM_REQ_EVENT, vcpu);
7180 vcpu->arch.apf.msr_val = 0;
7181 vcpu->arch.st.msr_val = 0;
7183 kvmclock_reset(vcpu);
7185 kvm_clear_async_pf_completion_queue(vcpu);
7186 kvm_async_pf_hash_reset(vcpu);
7187 vcpu->arch.apf.halted = false;
7189 kvm_pmu_reset(vcpu);
7191 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7192 vcpu->arch.regs_avail = ~0;
7193 vcpu->arch.regs_dirty = ~0;
7195 kvm_x86_ops->vcpu_reset(vcpu);
7198 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7200 struct kvm_segment cs;
7202 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7203 cs.selector = vector << 8;
7204 cs.base = vector << 12;
7205 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7206 kvm_rip_write(vcpu, 0);
7209 int kvm_arch_hardware_enable(void)
7212 struct kvm_vcpu *vcpu;
7217 bool stable, backwards_tsc = false;
7219 kvm_shared_msr_cpu_online();
7220 ret = kvm_x86_ops->hardware_enable();
7224 local_tsc = native_read_tsc();
7225 stable = !check_tsc_unstable();
7226 list_for_each_entry(kvm, &vm_list, vm_list) {
7227 kvm_for_each_vcpu(i, vcpu, kvm) {
7228 if (!stable && vcpu->cpu == smp_processor_id())
7229 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7230 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7231 backwards_tsc = true;
7232 if (vcpu->arch.last_host_tsc > max_tsc)
7233 max_tsc = vcpu->arch.last_host_tsc;
7239 * Sometimes, even reliable TSCs go backwards. This happens on
7240 * platforms that reset TSC during suspend or hibernate actions, but
7241 * maintain synchronization. We must compensate. Fortunately, we can
7242 * detect that condition here, which happens early in CPU bringup,
7243 * before any KVM threads can be running. Unfortunately, we can't
7244 * bring the TSCs fully up to date with real time, as we aren't yet far
7245 * enough into CPU bringup that we know how much real time has actually
7246 * elapsed; our helper function, get_kernel_ns() will be using boot
7247 * variables that haven't been updated yet.
7249 * So we simply find the maximum observed TSC above, then record the
7250 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7251 * the adjustment will be applied. Note that we accumulate
7252 * adjustments, in case multiple suspend cycles happen before some VCPU
7253 * gets a chance to run again. In the event that no KVM threads get a
7254 * chance to run, we will miss the entire elapsed period, as we'll have
7255 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7256 * loose cycle time. This isn't too big a deal, since the loss will be
7257 * uniform across all VCPUs (not to mention the scenario is extremely
7258 * unlikely). It is possible that a second hibernate recovery happens
7259 * much faster than a first, causing the observed TSC here to be
7260 * smaller; this would require additional padding adjustment, which is
7261 * why we set last_host_tsc to the local tsc observed here.
7263 * N.B. - this code below runs only on platforms with reliable TSC,
7264 * as that is the only way backwards_tsc is set above. Also note
7265 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7266 * have the same delta_cyc adjustment applied if backwards_tsc
7267 * is detected. Note further, this adjustment is only done once,
7268 * as we reset last_host_tsc on all VCPUs to stop this from being
7269 * called multiple times (one for each physical CPU bringup).
7271 * Platforms with unreliable TSCs don't have to deal with this, they
7272 * will be compensated by the logic in vcpu_load, which sets the TSC to
7273 * catchup mode. This will catchup all VCPUs to real time, but cannot
7274 * guarantee that they stay in perfect synchronization.
7276 if (backwards_tsc) {
7277 u64 delta_cyc = max_tsc - local_tsc;
7278 backwards_tsc_observed = true;
7279 list_for_each_entry(kvm, &vm_list, vm_list) {
7280 kvm_for_each_vcpu(i, vcpu, kvm) {
7281 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7282 vcpu->arch.last_host_tsc = local_tsc;
7283 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7287 * We have to disable TSC offset matching.. if you were
7288 * booting a VM while issuing an S4 host suspend....
7289 * you may have some problem. Solving this issue is
7290 * left as an exercise to the reader.
7292 kvm->arch.last_tsc_nsec = 0;
7293 kvm->arch.last_tsc_write = 0;
7300 void kvm_arch_hardware_disable(void)
7302 kvm_x86_ops->hardware_disable();
7303 drop_user_return_notifiers();
7306 int kvm_arch_hardware_setup(void)
7310 r = kvm_x86_ops->hardware_setup();
7314 kvm_init_msr_list();
7318 void kvm_arch_hardware_unsetup(void)
7320 kvm_x86_ops->hardware_unsetup();
7323 void kvm_arch_check_processor_compat(void *rtn)
7325 kvm_x86_ops->check_processor_compatibility(rtn);
7328 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7330 return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
7333 struct static_key kvm_no_apic_vcpu __read_mostly;
7335 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7341 BUG_ON(vcpu->kvm == NULL);
7344 vcpu->arch.pv.pv_unhalted = false;
7345 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7346 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7347 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7349 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7351 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7356 vcpu->arch.pio_data = page_address(page);
7358 kvm_set_tsc_khz(vcpu, max_tsc_khz);
7360 r = kvm_mmu_create(vcpu);
7362 goto fail_free_pio_data;
7364 if (irqchip_in_kernel(kvm)) {
7365 r = kvm_create_lapic(vcpu);
7367 goto fail_mmu_destroy;
7369 static_key_slow_inc(&kvm_no_apic_vcpu);
7371 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7373 if (!vcpu->arch.mce_banks) {
7375 goto fail_free_lapic;
7377 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7379 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7381 goto fail_free_mce_banks;
7386 goto fail_free_wbinvd_dirty_mask;
7388 vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7389 vcpu->arch.pv_time_enabled = false;
7391 vcpu->arch.guest_supported_xcr0 = 0;
7392 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7394 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7396 kvm_async_pf_hash_reset(vcpu);
7400 fail_free_wbinvd_dirty_mask:
7401 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7402 fail_free_mce_banks:
7403 kfree(vcpu->arch.mce_banks);
7405 kvm_free_lapic(vcpu);
7407 kvm_mmu_destroy(vcpu);
7409 free_page((unsigned long)vcpu->arch.pio_data);
7414 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7418 kvm_pmu_destroy(vcpu);
7419 kfree(vcpu->arch.mce_banks);
7420 kvm_free_lapic(vcpu);
7421 idx = srcu_read_lock(&vcpu->kvm->srcu);
7422 kvm_mmu_destroy(vcpu);
7423 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7424 free_page((unsigned long)vcpu->arch.pio_data);
7425 if (!irqchip_in_kernel(vcpu->kvm))
7426 static_key_slow_dec(&kvm_no_apic_vcpu);
7429 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7431 kvm_x86_ops->sched_in(vcpu, cpu);
7434 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7439 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7440 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7441 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7442 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7443 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7445 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7446 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7447 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7448 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7449 &kvm->arch.irq_sources_bitmap);
7451 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7452 mutex_init(&kvm->arch.apic_map_lock);
7453 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7455 pvclock_update_vm_gtod_copy(kvm);
7457 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7458 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7463 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7466 r = vcpu_load(vcpu);
7468 kvm_mmu_unload(vcpu);
7472 static void kvm_free_vcpus(struct kvm *kvm)
7475 struct kvm_vcpu *vcpu;
7478 * Unpin any mmu pages first.
7480 kvm_for_each_vcpu(i, vcpu, kvm) {
7481 kvm_clear_async_pf_completion_queue(vcpu);
7482 kvm_unload_vcpu_mmu(vcpu);
7484 kvm_for_each_vcpu(i, vcpu, kvm)
7485 kvm_arch_vcpu_free(vcpu);
7487 mutex_lock(&kvm->lock);
7488 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7489 kvm->vcpus[i] = NULL;
7491 atomic_set(&kvm->online_vcpus, 0);
7492 mutex_unlock(&kvm->lock);
7495 void kvm_arch_sync_events(struct kvm *kvm)
7497 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7498 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7499 kvm_free_all_assigned_devices(kvm);
7503 void kvm_arch_destroy_vm(struct kvm *kvm)
7505 if (current->mm == kvm->mm) {
7507 * Free memory regions allocated on behalf of userspace,
7508 * unless the the memory map has changed due to process exit
7511 struct kvm_userspace_memory_region mem;
7512 memset(&mem, 0, sizeof(mem));
7513 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7514 kvm_set_memory_region(kvm, &mem);
7516 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7517 kvm_set_memory_region(kvm, &mem);
7519 mem.slot = TSS_PRIVATE_MEMSLOT;
7520 kvm_set_memory_region(kvm, &mem);
7522 kvm_iommu_unmap_guest(kvm);
7523 kfree(kvm->arch.vpic);
7524 kfree(kvm->arch.vioapic);
7525 kvm_free_vcpus(kvm);
7526 kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7529 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7530 struct kvm_memory_slot *dont)
7534 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7535 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7536 kvfree(free->arch.rmap[i]);
7537 free->arch.rmap[i] = NULL;
7542 if (!dont || free->arch.lpage_info[i - 1] !=
7543 dont->arch.lpage_info[i - 1]) {
7544 kvfree(free->arch.lpage_info[i - 1]);
7545 free->arch.lpage_info[i - 1] = NULL;
7550 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7551 unsigned long npages)
7555 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7560 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7561 slot->base_gfn, level) + 1;
7563 slot->arch.rmap[i] =
7564 kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7565 if (!slot->arch.rmap[i])
7570 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7571 sizeof(*slot->arch.lpage_info[i - 1]));
7572 if (!slot->arch.lpage_info[i - 1])
7575 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7576 slot->arch.lpage_info[i - 1][0].write_count = 1;
7577 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7578 slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7579 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7581 * If the gfn and userspace address are not aligned wrt each
7582 * other, or if explicitly asked to, disable large page
7583 * support for this slot
7585 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7586 !kvm_largepages_enabled()) {
7589 for (j = 0; j < lpages; ++j)
7590 slot->arch.lpage_info[i - 1][j].write_count = 1;
7597 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7598 kvfree(slot->arch.rmap[i]);
7599 slot->arch.rmap[i] = NULL;
7603 kvfree(slot->arch.lpage_info[i - 1]);
7604 slot->arch.lpage_info[i - 1] = NULL;
7609 void kvm_arch_memslots_updated(struct kvm *kvm)
7612 * memslots->generation has been incremented.
7613 * mmio generation may have reached its maximum value.
7615 kvm_mmu_invalidate_mmio_sptes(kvm);
7618 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7619 struct kvm_memory_slot *memslot,
7620 struct kvm_userspace_memory_region *mem,
7621 enum kvm_mr_change change)
7624 * Only private memory slots need to be mapped here since
7625 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7627 if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7628 unsigned long userspace_addr;
7631 * MAP_SHARED to prevent internal slot pages from being moved
7634 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7635 PROT_READ | PROT_WRITE,
7636 MAP_SHARED | MAP_ANONYMOUS, 0);
7638 if (IS_ERR((void *)userspace_addr))
7639 return PTR_ERR((void *)userspace_addr);
7641 memslot->userspace_addr = userspace_addr;
7647 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7648 struct kvm_memory_slot *new)
7650 /* Still write protect RO slot */
7651 if (new->flags & KVM_MEM_READONLY) {
7652 kvm_mmu_slot_remove_write_access(kvm, new);
7657 * Call kvm_x86_ops dirty logging hooks when they are valid.
7659 * kvm_x86_ops->slot_disable_log_dirty is called when:
7661 * - KVM_MR_CREATE with dirty logging is disabled
7662 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7664 * The reason is, in case of PML, we need to set D-bit for any slots
7665 * with dirty logging disabled in order to eliminate unnecessary GPA
7666 * logging in PML buffer (and potential PML buffer full VMEXT). This
7667 * guarantees leaving PML enabled during guest's lifetime won't have
7668 * any additonal overhead from PML when guest is running with dirty
7669 * logging disabled for memory slots.
7671 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7672 * to dirty logging mode.
7674 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7676 * In case of write protect:
7678 * Write protect all pages for dirty logging.
7680 * All the sptes including the large sptes which point to this
7681 * slot are set to readonly. We can not create any new large
7682 * spte on this slot until the end of the logging.
7684 * See the comments in fast_page_fault().
7686 if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7687 if (kvm_x86_ops->slot_enable_log_dirty)
7688 kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7690 kvm_mmu_slot_remove_write_access(kvm, new);
7692 if (kvm_x86_ops->slot_disable_log_dirty)
7693 kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7697 void kvm_arch_commit_memory_region(struct kvm *kvm,
7698 struct kvm_userspace_memory_region *mem,
7699 const struct kvm_memory_slot *old,
7700 enum kvm_mr_change change)
7702 struct kvm_memory_slot *new;
7703 int nr_mmu_pages = 0;
7705 if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7708 ret = vm_munmap(old->userspace_addr,
7709 old->npages * PAGE_SIZE);
7712 "kvm_vm_ioctl_set_memory_region: "
7713 "failed to munmap memory\n");
7716 if (!kvm->arch.n_requested_mmu_pages)
7717 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7720 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7722 /* It's OK to get 'new' slot here as it has already been installed */
7723 new = id_to_memslot(kvm->memslots, mem->slot);
7726 * Dirty logging tracks sptes in 4k granularity, meaning that large
7727 * sptes have to be split. If live migration is successful, the guest
7728 * in the source machine will be destroyed and large sptes will be
7729 * created in the destination. However, if the guest continues to run
7730 * in the source machine (for example if live migration fails), small
7731 * sptes will remain around and cause bad performance.
7733 * Scan sptes if dirty logging has been stopped, dropping those
7734 * which can be collapsed into a single large-page spte. Later
7735 * page faults will create the large-page sptes.
7737 if ((change != KVM_MR_DELETE) &&
7738 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7739 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7740 kvm_mmu_zap_collapsible_sptes(kvm, new);
7743 * Set up write protection and/or dirty logging for the new slot.
7745 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7746 * been zapped so no dirty logging staff is needed for old slot. For
7747 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7748 * new and it's also covered when dealing with the new slot.
7750 if (change != KVM_MR_DELETE)
7751 kvm_mmu_slot_apply_flags(kvm, new);
7754 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7756 kvm_mmu_invalidate_zap_all_pages(kvm);
7759 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7760 struct kvm_memory_slot *slot)
7762 kvm_mmu_invalidate_zap_all_pages(kvm);
7765 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7767 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7768 kvm_x86_ops->check_nested_events(vcpu, false);
7770 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7771 !vcpu->arch.apf.halted)
7772 || !list_empty_careful(&vcpu->async_pf.done)
7773 || kvm_apic_has_events(vcpu)
7774 || vcpu->arch.pv.pv_unhalted
7775 || atomic_read(&vcpu->arch.nmi_queued) ||
7776 (kvm_arch_interrupt_allowed(vcpu) &&
7777 kvm_cpu_has_interrupt(vcpu));
7780 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7782 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7785 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7787 return kvm_x86_ops->interrupt_allowed(vcpu);
7790 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
7792 if (is_64_bit_mode(vcpu))
7793 return kvm_rip_read(vcpu);
7794 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
7795 kvm_rip_read(vcpu));
7797 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
7799 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7801 return kvm_get_linear_rip(vcpu) == linear_rip;
7803 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7805 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7807 unsigned long rflags;
7809 rflags = kvm_x86_ops->get_rflags(vcpu);
7810 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7811 rflags &= ~X86_EFLAGS_TF;
7814 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7816 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7818 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7819 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7820 rflags |= X86_EFLAGS_TF;
7821 kvm_x86_ops->set_rflags(vcpu, rflags);
7824 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7826 __kvm_set_rflags(vcpu, rflags);
7827 kvm_make_request(KVM_REQ_EVENT, vcpu);
7829 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7831 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7835 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7839 r = kvm_mmu_reload(vcpu);
7843 if (!vcpu->arch.mmu.direct_map &&
7844 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7847 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7850 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7852 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7855 static inline u32 kvm_async_pf_next_probe(u32 key)
7857 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7860 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7862 u32 key = kvm_async_pf_hash_fn(gfn);
7864 while (vcpu->arch.apf.gfns[key] != ~0)
7865 key = kvm_async_pf_next_probe(key);
7867 vcpu->arch.apf.gfns[key] = gfn;
7870 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7873 u32 key = kvm_async_pf_hash_fn(gfn);
7875 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7876 (vcpu->arch.apf.gfns[key] != gfn &&
7877 vcpu->arch.apf.gfns[key] != ~0); i++)
7878 key = kvm_async_pf_next_probe(key);
7883 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7885 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7888 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7892 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7894 vcpu->arch.apf.gfns[i] = ~0;
7896 j = kvm_async_pf_next_probe(j);
7897 if (vcpu->arch.apf.gfns[j] == ~0)
7899 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7901 * k lies cyclically in ]i,j]
7903 * |....j i.k.| or |.k..j i...|
7905 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7906 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7911 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7914 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7918 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7919 struct kvm_async_pf *work)
7921 struct x86_exception fault;
7923 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7924 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7926 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7927 (vcpu->arch.apf.send_user_only &&
7928 kvm_x86_ops->get_cpl(vcpu) == 0))
7929 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7930 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7931 fault.vector = PF_VECTOR;
7932 fault.error_code_valid = true;
7933 fault.error_code = 0;
7934 fault.nested_page_fault = false;
7935 fault.address = work->arch.token;
7936 kvm_inject_page_fault(vcpu, &fault);
7940 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7941 struct kvm_async_pf *work)
7943 struct x86_exception fault;
7945 trace_kvm_async_pf_ready(work->arch.token, work->gva);
7946 if (work->wakeup_all)
7947 work->arch.token = ~0; /* broadcast wakeup */
7949 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7951 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7952 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7953 fault.vector = PF_VECTOR;
7954 fault.error_code_valid = true;
7955 fault.error_code = 0;
7956 fault.nested_page_fault = false;
7957 fault.address = work->arch.token;
7958 kvm_inject_page_fault(vcpu, &fault);
7960 vcpu->arch.apf.halted = false;
7961 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7964 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7966 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7969 return !kvm_event_needs_reinjection(vcpu) &&
7970 kvm_x86_ops->interrupt_allowed(vcpu);
7973 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7975 atomic_inc(&kvm->arch.noncoherent_dma_count);
7977 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7979 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7981 atomic_dec(&kvm->arch.noncoherent_dma_count);
7983 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7985 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7987 return atomic_read(&kvm->arch.noncoherent_dma_count);
7989 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7991 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7992 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7993 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7994 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7995 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7996 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7997 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7998 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7999 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8000 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8001 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8002 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8003 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8004 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8005 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);