arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  74 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  75
  76 #define emul_to_vcpu(ctxt) \
  77         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static
  85 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  86 #else
  87 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  88 #endif
  89
  90 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  91 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  92
  93 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  94 static void process_nmi(struct kvm_vcpu *vcpu);
  95 static void enter_smm(struct kvm_vcpu *vcpu);
  96 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  97
  98 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  99 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 100
 101 static bool __read_mostly ignore_msrs = 0;
 102 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 103
 104 unsigned int min_timer_period_us = 500;
 105 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 106
 107 static bool __read_mostly kvmclock_periodic_sync = true;
 108 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 109
 110 bool __read_mostly kvm_has_tsc_control;
 111 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 112 u32  __read_mostly kvm_max_guest_tsc_khz;
 113 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 114 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 115 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 116 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 117 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 118 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 119 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 120
 121 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 122 static u32 __read_mostly tsc_tolerance_ppm = 250;
 123 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 124
 125 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 126 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 127 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 128
 129 static bool __read_mostly vector_hashing = true;
 130 module_param(vector_hashing, bool, S_IRUGO);
 131
 132 static bool __read_mostly backwards_tsc_observed = false;
 133
 134 #define KVM_NR_SHARED_MSRS 16
 135
 136 struct kvm_shared_msrs_global {
 137         int nr;
 138         u32 msrs[KVM_NR_SHARED_MSRS];
 139 };
 140
 141 struct kvm_shared_msrs {
 142         struct user_return_notifier urn;
 143         bool registered;
 144         struct kvm_shared_msr_values {
 145                 u64 host;
 146                 u64 curr;
 147         } values[KVM_NR_SHARED_MSRS];
 148 };
 149
 150 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 151 static struct kvm_shared_msrs __percpu *shared_msrs;
 152
 153 struct kvm_stats_debugfs_item debugfs_entries[] = {
 154         { "pf_fixed", VCPU_STAT(pf_fixed) },
 155         { "pf_guest", VCPU_STAT(pf_guest) },
 156         { "tlb_flush", VCPU_STAT(tlb_flush) },
 157         { "invlpg", VCPU_STAT(invlpg) },
 158         { "exits", VCPU_STAT(exits) },
 159         { "io_exits", VCPU_STAT(io_exits) },
 160         { "mmio_exits", VCPU_STAT(mmio_exits) },
 161         { "signal_exits", VCPU_STAT(signal_exits) },
 162         { "irq_window", VCPU_STAT(irq_window_exits) },
 163         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 164         { "halt_exits", VCPU_STAT(halt_exits) },
 165         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 166         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 167         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 168         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 169         { "hypercalls", VCPU_STAT(hypercalls) },
 170         { "request_irq", VCPU_STAT(request_irq_exits) },
 171         { "irq_exits", VCPU_STAT(irq_exits) },
 172         { "host_state_reload", VCPU_STAT(host_state_reload) },
 173         { "efer_reload", VCPU_STAT(efer_reload) },
 174         { "fpu_reload", VCPU_STAT(fpu_reload) },
 175         { "insn_emulation", VCPU_STAT(insn_emulation) },
 176         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 177         { "irq_injections", VCPU_STAT(irq_injections) },
 178         { "nmi_injections", VCPU_STAT(nmi_injections) },
 179         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 180         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 181         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 182         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 183         { "mmu_flooded", VM_STAT(mmu_flooded) },
 184         { "mmu_recycled", VM_STAT(mmu_recycled) },
 185         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 186         { "mmu_unsync", VM_STAT(mmu_unsync) },
 187         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 188         { "largepages", VM_STAT(lpages) },
 189         { NULL }
 190 };
 191
 192 u64 __read_mostly host_xcr0;
 193
 194 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 195
 196 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 197 {
 198         int i;
 199         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 200                 vcpu->arch.apf.gfns[i] = ~0;
 201 }
 202
 203 static void kvm_on_user_return(struct user_return_notifier *urn)
 204 {
 205         unsigned slot;
 206         struct kvm_shared_msrs *locals
 207                 = container_of(urn, struct kvm_shared_msrs, urn);
 208         struct kvm_shared_msr_values *values;
 209
 210         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 211                 values = &locals->values[slot];
 212                 if (values->host != values->curr) {
 213                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 214                         values->curr = values->host;
 215                 }
 216         }
 217         locals->registered = false;
 218         user_return_notifier_unregister(urn);
 219 }
 220
 221 static void shared_msr_update(unsigned slot, u32 msr)
 222 {
 223         u64 value;
 224         unsigned int cpu = smp_processor_id();
 225         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 226
 227         /* only read, and nobody should modify it at this time,
 228          * so don't need lock */
 229         if (slot >= shared_msrs_global.nr) {
 230                 printk(KERN_ERR "kvm: invalid MSR slot!");
 231                 return;
 232         }
 233         rdmsrl_safe(msr, &value);
 234         smsr->values[slot].host = value;
 235         smsr->values[slot].curr = value;
 236 }
 237
 238 void kvm_define_shared_msr(unsigned slot, u32 msr)
 239 {
 240         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 241         shared_msrs_global.msrs[slot] = msr;
 242         if (slot >= shared_msrs_global.nr)
 243                 shared_msrs_global.nr = slot + 1;
 244 }
 245 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 246
 247 static void kvm_shared_msr_cpu_online(void)
 248 {
 249         unsigned i;
 250
 251         for (i = 0; i < shared_msrs_global.nr; ++i)
 252                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 253 }
 254
 255 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 256 {
 257         unsigned int cpu = smp_processor_id();
 258         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 259         int err;
 260
 261         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 262                 return 0;
 263         smsr->values[slot].curr = value;
 264         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 265         if (err)
 266                 return 1;
 267
 268         if (!smsr->registered) {
 269                 smsr->urn.on_user_return = kvm_on_user_return;
 270                 user_return_notifier_register(&smsr->urn);
 271                 smsr->registered = true;
 272         }
 273         return 0;
 274 }
 275 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 276
 277 static void drop_user_return_notifiers(void)
 278 {
 279         unsigned int cpu = smp_processor_id();
 280         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 281
 282         if (smsr->registered)
 283                 kvm_on_user_return(&smsr->urn);
 284 }
 285
 286 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 287 {
 288         return vcpu->arch.apic_base;
 289 }
 290 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 291
 292 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 293 {
 294         u64 old_state = vcpu->arch.apic_base &
 295                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 296         u64 new_state = msr_info->data &
 297                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 298         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 299                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 300
 301         if (!msr_info->host_initiated &&
 302             ((msr_info->data & reserved_bits) != 0 ||
 303              new_state == X2APIC_ENABLE ||
 304              (new_state == MSR_IA32_APICBASE_ENABLE &&
 305               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 306              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 307               old_state == 0)))
 308                 return 1;
 309
 310         kvm_lapic_set_base(vcpu, msr_info->data);
 311         return 0;
 312 }
 313 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 314
 315 asmlinkage __visible void kvm_spurious_fault(void)
 316 {
 317         /* Fault while not rebooting.  We want the trace. */
 318         BUG();
 319 }
 320 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 321
 322 #define EXCPT_BENIGN            0
 323 #define EXCPT_CONTRIBUTORY      1
 324 #define EXCPT_PF                2
 325
 326 static int exception_class(int vector)
 327 {
 328         switch (vector) {
 329         case PF_VECTOR:
 330                 return EXCPT_PF;
 331         case DE_VECTOR:
 332         case TS_VECTOR:
 333         case NP_VECTOR:
 334         case SS_VECTOR:
 335         case GP_VECTOR:
 336                 return EXCPT_CONTRIBUTORY;
 337         default:
 338                 break;
 339         }
 340         return EXCPT_BENIGN;
 341 }
 342
 343 #define EXCPT_FAULT             0
 344 #define EXCPT_TRAP              1
 345 #define EXCPT_ABORT             2
 346 #define EXCPT_INTERRUPT         3
 347
 348 static int exception_type(int vector)
 349 {
 350         unsigned int mask;
 351
 352         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 353                 return EXCPT_INTERRUPT;
 354
 355         mask = 1 << vector;
 356
 357         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 358         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 359                 return EXCPT_TRAP;
 360
 361         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 362                 return EXCPT_ABORT;
 363
 364         /* Reserved exceptions will result in fault */
 365         return EXCPT_FAULT;
 366 }
 367
 368 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 369                 unsigned nr, bool has_error, u32 error_code,
 370                 bool reinject)
 371 {
 372         u32 prev_nr;
 373         int class1, class2;
 374
 375         kvm_make_request(KVM_REQ_EVENT, vcpu);
 376
 377         if (!vcpu->arch.exception.pending) {
 378         queue:
 379                 if (has_error && !is_protmode(vcpu))
 380                         has_error = false;
 381                 vcpu->arch.exception.pending = true;
 382                 vcpu->arch.exception.has_error_code = has_error;
 383                 vcpu->arch.exception.nr = nr;
 384                 vcpu->arch.exception.error_code = error_code;
 385                 vcpu->arch.exception.reinject = reinject;
 386                 return;
 387         }
 388
 389         /* to check exception */
 390         prev_nr = vcpu->arch.exception.nr;
 391         if (prev_nr == DF_VECTOR) {
 392                 /* triple fault -> shutdown */
 393                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 394                 return;
 395         }
 396         class1 = exception_class(prev_nr);
 397         class2 = exception_class(nr);
 398         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 399                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 400                 /* generate double fault per SDM Table 5-5 */
 401                 vcpu->arch.exception.pending = true;
 402                 vcpu->arch.exception.has_error_code = true;
 403                 vcpu->arch.exception.nr = DF_VECTOR;
 404                 vcpu->arch.exception.error_code = 0;
 405         } else
 406                 /* replace previous exception with a new one in a hope
 407                    that instruction re-execution will regenerate lost
 408                    exception */
 409                 goto queue;
 410 }
 411
 412 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 413 {
 414         kvm_multiple_exception(vcpu, nr, false, 0, false);
 415 }
 416 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 417
 418 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 419 {
 420         kvm_multiple_exception(vcpu, nr, false, 0, true);
 421 }
 422 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 423
 424 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 425 {
 426         if (err)
 427                 kvm_inject_gp(vcpu, 0);
 428         else
 429                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 430 }
 431 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 432
 433 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 434 {
 435         ++vcpu->stat.pf_guest;
 436         vcpu->arch.cr2 = fault->address;
 437         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 438 }
 439 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 440
 441 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 442 {
 443         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 444                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 445         else
 446                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 447
 448         return fault->nested_page_fault;
 449 }
 450
 451 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 452 {
 453         atomic_inc(&vcpu->arch.nmi_queued);
 454         kvm_make_request(KVM_REQ_NMI, vcpu);
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 457
 458 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 459 {
 460         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 461 }
 462 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 463
 464 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 465 {
 466         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 467 }
 468 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 469
 470 /*
 471  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 472  * a #GP and return false.
 473  */
 474 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 475 {
 476         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 477                 return true;
 478         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 479         return false;
 480 }
 481 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 482
 483 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 484 {
 485         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 486                 return true;
 487
 488         kvm_queue_exception(vcpu, UD_VECTOR);
 489         return false;
 490 }
 491 EXPORT_SYMBOL_GPL(kvm_require_dr);
 492
 493 /*
 494  * This function will be used to read from the physical memory of the currently
 495  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 496  * can read from guest physical or from the guest's guest physical memory.
 497  */
 498 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 499                             gfn_t ngfn, void *data, int offset, int len,
 500                             u32 access)
 501 {
 502         struct x86_exception exception;
 503         gfn_t real_gfn;
 504         gpa_t ngpa;
 505
 506         ngpa     = gfn_to_gpa(ngfn);
 507         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 508         if (real_gfn == UNMAPPED_GVA)
 509                 return -EFAULT;
 510
 511         real_gfn = gpa_to_gfn(real_gfn);
 512
 513         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 514 }
 515 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 516
 517 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 518                                void *data, int offset, int len, u32 access)
 519 {
 520         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 521                                        data, offset, len, access);
 522 }
 523
 524 /*
 525  * Load the pae pdptrs.  Return true is they are all valid.
 526  */
 527 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 528 {
 529         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 530         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 531         int i;
 532         int ret;
 533         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 534
 535         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 536                                       offset * sizeof(u64), sizeof(pdpte),
 537                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 538         if (ret < 0) {
 539                 ret = 0;
 540                 goto out;
 541         }
 542         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 543                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 544                     (pdpte[i] &
 545                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 546                         ret = 0;
 547                         goto out;
 548                 }
 549         }
 550         ret = 1;
 551
 552         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 553         __set_bit(VCPU_EXREG_PDPTR,
 554                   (unsigned long *)&vcpu->arch.regs_avail);
 555         __set_bit(VCPU_EXREG_PDPTR,
 556                   (unsigned long *)&vcpu->arch.regs_dirty);
 557 out:
 558
 559         return ret;
 560 }
 561 EXPORT_SYMBOL_GPL(load_pdptrs);
 562
 563 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 564 {
 565         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 566         bool changed = true;
 567         int offset;
 568         gfn_t gfn;
 569         int r;
 570
 571         if (is_long_mode(vcpu) || !is_pae(vcpu))
 572                 return false;
 573
 574         if (!test_bit(VCPU_EXREG_PDPTR,
 575                       (unsigned long *)&vcpu->arch.regs_avail))
 576                 return true;
 577
 578         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 579         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 580         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 581                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 582         if (r < 0)
 583                 goto out;
 584         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 585 out:
 586
 587         return changed;
 588 }
 589
 590 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 591 {
 592         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 593         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 594
 595         cr0 |= X86_CR0_ET;
 596
 597 #ifdef CONFIG_X86_64
 598         if (cr0 & 0xffffffff00000000UL)
 599                 return 1;
 600 #endif
 601
 602         cr0 &= ~CR0_RESERVED_BITS;
 603
 604         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 605                 return 1;
 606
 607         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 608                 return 1;
 609
 610         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 611 #ifdef CONFIG_X86_64
 612                 if ((vcpu->arch.efer & EFER_LME)) {
 613                         int cs_db, cs_l;
 614
 615                         if (!is_pae(vcpu))
 616                                 return 1;
 617                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 618                         if (cs_l)
 619                                 return 1;
 620                 } else
 621 #endif
 622                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 623                                                  kvm_read_cr3(vcpu)))
 624                         return 1;
 625         }
 626
 627         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 628                 return 1;
 629
 630         kvm_x86_ops->set_cr0(vcpu, cr0);
 631
 632         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 633                 kvm_clear_async_pf_completion_queue(vcpu);
 634                 kvm_async_pf_hash_reset(vcpu);
 635         }
 636
 637         if ((cr0 ^ old_cr0) & update_bits)
 638                 kvm_mmu_reset_context(vcpu);
 639
 640         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 641             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 642             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 643                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 644
 645         return 0;
 646 }
 647 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 648
 649 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 650 {
 651         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 652 }
 653 EXPORT_SYMBOL_GPL(kvm_lmsw);
 654
 655 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 656 {
 657         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 658                         !vcpu->guest_xcr0_loaded) {
 659                 /* kvm_set_xcr() also depends on this */
 660                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 661                 vcpu->guest_xcr0_loaded = 1;
 662         }
 663 }
 664
 665 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 666 {
 667         if (vcpu->guest_xcr0_loaded) {
 668                 if (vcpu->arch.xcr0 != host_xcr0)
 669                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 670                 vcpu->guest_xcr0_loaded = 0;
 671         }
 672 }
 673
 674 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 675 {
 676         u64 xcr0 = xcr;
 677         u64 old_xcr0 = vcpu->arch.xcr0;
 678         u64 valid_bits;
 679
 680         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 681         if (index != XCR_XFEATURE_ENABLED_MASK)
 682                 return 1;
 683         if (!(xcr0 & XFEATURE_MASK_FP))
 684                 return 1;
 685         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 686                 return 1;
 687
 688         /*
 689          * Do not allow the guest to set bits that we do not support
 690          * saving.  However, xcr0 bit 0 is always set, even if the
 691          * emulated CPU does not support XSAVE (see fx_init).
 692          */
 693         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 694         if (xcr0 & ~valid_bits)
 695                 return 1;
 696
 697         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 698             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 699                 return 1;
 700
 701         if (xcr0 & XFEATURE_MASK_AVX512) {
 702                 if (!(xcr0 & XFEATURE_MASK_YMM))
 703                         return 1;
 704                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 705                         return 1;
 706         }
 707         vcpu->arch.xcr0 = xcr0;
 708
 709         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 710                 kvm_update_cpuid(vcpu);
 711         return 0;
 712 }
 713
 714 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 715 {
 716         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 717             __kvm_set_xcr(vcpu, index, xcr)) {
 718                 kvm_inject_gp(vcpu, 0);
 719                 return 1;
 720         }
 721         return 0;
 722 }
 723 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 724
 725 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 726 {
 727         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 728         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 729                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 730
 731         if (cr4 & CR4_RESERVED_BITS)
 732                 return 1;
 733
 734         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 735                 return 1;
 736
 737         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 738                 return 1;
 739
 740         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 741                 return 1;
 742
 743         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 744                 return 1;
 745
 746         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 747                 return 1;
 748
 749         if (is_long_mode(vcpu)) {
 750                 if (!(cr4 & X86_CR4_PAE))
 751                         return 1;
 752         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 753                    && ((cr4 ^ old_cr4) & pdptr_bits)
 754                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 755                                    kvm_read_cr3(vcpu)))
 756                 return 1;
 757
 758         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 759                 if (!guest_cpuid_has_pcid(vcpu))
 760                         return 1;
 761
 762                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 763                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 764                         return 1;
 765         }
 766
 767         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 768                 return 1;
 769
 770         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 771             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 772                 kvm_mmu_reset_context(vcpu);
 773
 774         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 775                 kvm_update_cpuid(vcpu);
 776
 777         return 0;
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 780
 781 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 782 {
 783 #ifdef CONFIG_X86_64
 784         cr3 &= ~CR3_PCID_INVD;
 785 #endif
 786
 787         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 788                 kvm_mmu_sync_roots(vcpu);
 789                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 790                 return 0;
 791         }
 792
 793         if (is_long_mode(vcpu)) {
 794                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 795                         return 1;
 796         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 797                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 798                 return 1;
 799
 800         vcpu->arch.cr3 = cr3;
 801         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 802         kvm_mmu_new_cr3(vcpu);
 803         return 0;
 804 }
 805 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 806
 807 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 808 {
 809         if (cr8 & CR8_RESERVED_BITS)
 810                 return 1;
 811         if (lapic_in_kernel(vcpu))
 812                 kvm_lapic_set_tpr(vcpu, cr8);
 813         else
 814                 vcpu->arch.cr8 = cr8;
 815         return 0;
 816 }
 817 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 818
 819 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 820 {
 821         if (lapic_in_kernel(vcpu))
 822                 return kvm_lapic_get_cr8(vcpu);
 823         else
 824                 return vcpu->arch.cr8;
 825 }
 826 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 827
 828 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 829 {
 830         int i;
 831
 832         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 833                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 834                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 835                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 836         }
 837 }
 838
 839 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 840 {
 841         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 842                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 843 }
 844
 845 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 846 {
 847         unsigned long dr7;
 848
 849         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 850                 dr7 = vcpu->arch.guest_debug_dr7;
 851         else
 852                 dr7 = vcpu->arch.dr7;
 853         kvm_x86_ops->set_dr7(vcpu, dr7);
 854         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 855         if (dr7 & DR7_BP_EN_MASK)
 856                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 857 }
 858
 859 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 860 {
 861         u64 fixed = DR6_FIXED_1;
 862
 863         if (!guest_cpuid_has_rtm(vcpu))
 864                 fixed |= DR6_RTM;
 865         return fixed;
 866 }
 867
 868 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 869 {
 870         switch (dr) {
 871         case 0 ... 3:
 872                 vcpu->arch.db[dr] = val;
 873                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 874                         vcpu->arch.eff_db[dr] = val;
 875                 break;
 876         case 4:
 877                 /* fall through */
 878         case 6:
 879                 if (val & 0xffffffff00000000ULL)
 880                         return -1; /* #GP */
 881                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 882                 kvm_update_dr6(vcpu);
 883                 break;
 884         case 5:
 885                 /* fall through */
 886         default: /* 7 */
 887                 if (val & 0xffffffff00000000ULL)
 888                         return -1; /* #GP */
 889                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 890                 kvm_update_dr7(vcpu);
 891                 break;
 892         }
 893
 894         return 0;
 895 }
 896
 897 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 898 {
 899         if (__kvm_set_dr(vcpu, dr, val)) {
 900                 kvm_inject_gp(vcpu, 0);
 901                 return 1;
 902         }
 903         return 0;
 904 }
 905 EXPORT_SYMBOL_GPL(kvm_set_dr);
 906
 907 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 908 {
 909         switch (dr) {
 910         case 0 ... 3:
 911                 *val = vcpu->arch.db[dr];
 912                 break;
 913         case 4:
 914                 /* fall through */
 915         case 6:
 916                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 917                         *val = vcpu->arch.dr6;
 918                 else
 919                         *val = kvm_x86_ops->get_dr6(vcpu);
 920                 break;
 921         case 5:
 922                 /* fall through */
 923         default: /* 7 */
 924                 *val = vcpu->arch.dr7;
 925                 break;
 926         }
 927         return 0;
 928 }
 929 EXPORT_SYMBOL_GPL(kvm_get_dr);
 930
 931 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 932 {
 933         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 934         u64 data;
 935         int err;
 936
 937         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 938         if (err)
 939                 return err;
 940         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 941         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 942         return err;
 943 }
 944 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 945
 946 /*
 947  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 948  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 949  *
 950  * This list is modified at module load time to reflect the
 951  * capabilities of the host cpu. This capabilities test skips MSRs that are
 952  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 953  * may depend on host virtualization features rather than host cpu features.
 954  */
 955
 956 static u32 msrs_to_save[] = {
 957         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 958         MSR_STAR,
 959 #ifdef CONFIG_X86_64
 960         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 961 #endif
 962         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 963         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 964 };
 965
 966 static unsigned num_msrs_to_save;
 967
 968 static u32 emulated_msrs[] = {
 969         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 970         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 971         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 972         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 973         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 974         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 975         HV_X64_MSR_RESET,
 976         HV_X64_MSR_VP_INDEX,
 977         HV_X64_MSR_VP_RUNTIME,
 978         HV_X64_MSR_SCONTROL,
 979         HV_X64_MSR_STIMER0_CONFIG,
 980         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 981         MSR_KVM_PV_EOI_EN,
 982
 983         MSR_IA32_TSC_ADJUST,
 984         MSR_IA32_TSCDEADLINE,
 985         MSR_IA32_MISC_ENABLE,
 986         MSR_IA32_MCG_STATUS,
 987         MSR_IA32_MCG_CTL,
 988         MSR_IA32_MCG_EXT_CTL,
 989         MSR_IA32_SMBASE,
 990 };
 991
 992 static unsigned num_emulated_msrs;
 993
 994 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 995 {
 996         if (efer & efer_reserved_bits)
 997                 return false;
 998
 999         if (efer & EFER_FFXSR) {
1000                 struct kvm_cpuid_entry2 *feat;
1001
1002                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1003                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1004                         return false;
1005         }
1006
1007         if (efer & EFER_SVME) {
1008                 struct kvm_cpuid_entry2 *feat;
1009
1010                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1011                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1012                         return false;
1013         }
1014
1015         return true;
1016 }
1017 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1018
1019 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1020 {
1021         u64 old_efer = vcpu->arch.efer;
1022
1023         if (!kvm_valid_efer(vcpu, efer))
1024                 return 1;
1025
1026         if (is_paging(vcpu)
1027             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1028                 return 1;
1029
1030         efer &= ~EFER_LMA;
1031         efer |= vcpu->arch.efer & EFER_LMA;
1032
1033         kvm_x86_ops->set_efer(vcpu, efer);
1034
1035         /* Update reserved bits */
1036         if ((efer ^ old_efer) & EFER_NX)
1037                 kvm_mmu_reset_context(vcpu);
1038
1039         return 0;
1040 }
1041
1042 void kvm_enable_efer_bits(u64 mask)
1043 {
1044        efer_reserved_bits &= ~mask;
1045 }
1046 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1047
1048 /*
1049  * Writes msr value into into the appropriate "register".
1050  * Returns 0 on success, non-0 otherwise.
1051  * Assumes vcpu_load() was already called.
1052  */
1053 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1054 {
1055         switch (msr->index) {
1056         case MSR_FS_BASE:
1057         case MSR_GS_BASE:
1058         case MSR_KERNEL_GS_BASE:
1059         case MSR_CSTAR:
1060         case MSR_LSTAR:
1061                 if (is_noncanonical_address(msr->data))
1062                         return 1;
1063                 break;
1064         case MSR_IA32_SYSENTER_EIP:
1065         case MSR_IA32_SYSENTER_ESP:
1066                 /*
1067                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1068                  * non-canonical address is written on Intel but not on
1069                  * AMD (which ignores the top 32-bits, because it does
1070                  * not implement 64-bit SYSENTER).
1071                  *
1072                  * 64-bit code should hence be able to write a non-canonical
1073                  * value on AMD.  Making the address canonical ensures that
1074                  * vmentry does not fail on Intel after writing a non-canonical
1075                  * value, and that something deterministic happens if the guest
1076                  * invokes 64-bit SYSENTER.
1077                  */
1078                 msr->data = get_canonical(msr->data);
1079         }
1080         return kvm_x86_ops->set_msr(vcpu, msr);
1081 }
1082 EXPORT_SYMBOL_GPL(kvm_set_msr);
1083
1084 /*
1085  * Adapt set_msr() to msr_io()'s calling convention
1086  */
1087 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1088 {
1089         struct msr_data msr;
1090         int r;
1091
1092         msr.index = index;
1093         msr.host_initiated = true;
1094         r = kvm_get_msr(vcpu, &msr);
1095         if (r)
1096                 return r;
1097
1098         *data = msr.data;
1099         return 0;
1100 }
1101
1102 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1103 {
1104         struct msr_data msr;
1105
1106         msr.data = *data;
1107         msr.index = index;
1108         msr.host_initiated = true;
1109         return kvm_set_msr(vcpu, &msr);
1110 }
1111
1112 #ifdef CONFIG_X86_64
1113 struct pvclock_gtod_data {
1114         seqcount_t      seq;
1115
1116         struct { /* extract of a clocksource struct */
1117                 int vclock_mode;
1118                 cycle_t cycle_last;
1119                 cycle_t mask;
1120                 u32     mult;
1121                 u32     shift;
1122         } clock;
1123
1124         u64             boot_ns;
1125         u64             nsec_base;
1126 };
1127
1128 static struct pvclock_gtod_data pvclock_gtod_data;
1129
1130 static void update_pvclock_gtod(struct timekeeper *tk)
1131 {
1132         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1133         u64 boot_ns;
1134
1135         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1136
1137         write_seqcount_begin(&vdata->seq);
1138
1139         /* copy pvclock gtod data */
1140         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1141         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1142         vdata->clock.mask               = tk->tkr_mono.mask;
1143         vdata->clock.mult               = tk->tkr_mono.mult;
1144         vdata->clock.shift              = tk->tkr_mono.shift;
1145
1146         vdata->boot_ns                  = boot_ns;
1147         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1148
1149         write_seqcount_end(&vdata->seq);
1150 }
1151 #endif
1152
1153 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1154 {
1155         /*
1156          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1157          * vcpu_enter_guest.  This function is only called from
1158          * the physical CPU that is running vcpu.
1159          */
1160         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1161 }
1162
1163 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1164 {
1165         int version;
1166         int r;
1167         struct pvclock_wall_clock wc;
1168         struct timespec64 boot;
1169
1170         if (!wall_clock)
1171                 return;
1172
1173         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1174         if (r)
1175                 return;
1176
1177         if (version & 1)
1178                 ++version;  /* first time write, random junk */
1179
1180         ++version;
1181
1182         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1183                 return;
1184
1185         /*
1186          * The guest calculates current wall clock time by adding
1187          * system time (updated by kvm_guest_time_update below) to the
1188          * wall clock specified here.  guest system time equals host
1189          * system time for us, thus we must fill in host boot time here.
1190          */
1191         getboottime64(&boot);
1192
1193         if (kvm->arch.kvmclock_offset) {
1194                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1195                 boot = timespec64_sub(boot, ts);
1196         }
1197         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1198         wc.nsec = boot.tv_nsec;
1199         wc.version = version;
1200
1201         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1202
1203         version++;
1204         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1205 }
1206
1207 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1208 {
1209         do_shl32_div32(dividend, divisor);
1210         return dividend;
1211 }
1212
1213 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1214                                s8 *pshift, u32 *pmultiplier)
1215 {
1216         uint64_t scaled64;
1217         int32_t  shift = 0;
1218         uint64_t tps64;
1219         uint32_t tps32;
1220
1221         tps64 = base_hz;
1222         scaled64 = scaled_hz;
1223         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1224                 tps64 >>= 1;
1225                 shift--;
1226         }
1227
1228         tps32 = (uint32_t)tps64;
1229         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1230                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1231                         scaled64 >>= 1;
1232                 else
1233                         tps32 <<= 1;
1234                 shift++;
1235         }
1236
1237         *pshift = shift;
1238         *pmultiplier = div_frac(scaled64, tps32);
1239
1240         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1241                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1242 }
1243
1244 #ifdef CONFIG_X86_64
1245 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1246 #endif
1247
1248 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1249 static unsigned long max_tsc_khz;
1250
1251 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1252 {
1253         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1254                                    vcpu->arch.virtual_tsc_shift);
1255 }
1256
1257 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1258 {
1259         u64 v = (u64)khz * (1000000 + ppm);
1260         do_div(v, 1000000);
1261         return v;
1262 }
1263
1264 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1265 {
1266         u64 ratio;
1267
1268         /* Guest TSC same frequency as host TSC? */
1269         if (!scale) {
1270                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1271                 return 0;
1272         }
1273
1274         /* TSC scaling supported? */
1275         if (!kvm_has_tsc_control) {
1276                 if (user_tsc_khz > tsc_khz) {
1277                         vcpu->arch.tsc_catchup = 1;
1278                         vcpu->arch.tsc_always_catchup = 1;
1279                         return 0;
1280                 } else {
1281                         WARN(1, "user requested TSC rate below hardware speed\n");
1282                         return -1;
1283                 }
1284         }
1285
1286         /* TSC scaling required  - calculate ratio */
1287         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1288                                 user_tsc_khz, tsc_khz);
1289
1290         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1291                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1292                           user_tsc_khz);
1293                 return -1;
1294         }
1295
1296         vcpu->arch.tsc_scaling_ratio = ratio;
1297         return 0;
1298 }
1299
1300 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1301 {
1302         u32 thresh_lo, thresh_hi;
1303         int use_scaling = 0;
1304
1305         /* tsc_khz can be zero if TSC calibration fails */
1306         if (user_tsc_khz == 0) {
1307                 /* set tsc_scaling_ratio to a safe value */
1308                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1309                 return -1;
1310         }
1311
1312         /* Compute a scale to convert nanoseconds in TSC cycles */
1313         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1314                            &vcpu->arch.virtual_tsc_shift,
1315                            &vcpu->arch.virtual_tsc_mult);
1316         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1317
1318         /*
1319          * Compute the variation in TSC rate which is acceptable
1320          * within the range of tolerance and decide if the
1321          * rate being applied is within that bounds of the hardware
1322          * rate.  If so, no scaling or compensation need be done.
1323          */
1324         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1325         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1326         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1327                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1328                 use_scaling = 1;
1329         }
1330         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1331 }
1332
1333 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1334 {
1335         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1336                                       vcpu->arch.virtual_tsc_mult,
1337                                       vcpu->arch.virtual_tsc_shift);
1338         tsc += vcpu->arch.this_tsc_write;
1339         return tsc;
1340 }
1341
1342 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1343 {
1344 #ifdef CONFIG_X86_64
1345         bool vcpus_matched;
1346         struct kvm_arch *ka = &vcpu->kvm->arch;
1347         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1348
1349         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1350                          atomic_read(&vcpu->kvm->online_vcpus));
1351
1352         /*
1353          * Once the masterclock is enabled, always perform request in
1354          * order to update it.
1355          *
1356          * In order to enable masterclock, the host clocksource must be TSC
1357          * and the vcpus need to have matched TSCs.  When that happens,
1358          * perform request to enable masterclock.
1359          */
1360         if (ka->use_master_clock ||
1361             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1362                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1363
1364         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1365                             atomic_read(&vcpu->kvm->online_vcpus),
1366                             ka->use_master_clock, gtod->clock.vclock_mode);
1367 #endif
1368 }
1369
1370 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1371 {
1372         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1373         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1374 }
1375
1376 /*
1377  * Multiply tsc by a fixed point number represented by ratio.
1378  *
1379  * The most significant 64-N bits (mult) of ratio represent the
1380  * integral part of the fixed point number; the remaining N bits
1381  * (frac) represent the fractional part, ie. ratio represents a fixed
1382  * point number (mult + frac * 2^(-N)).
1383  *
1384  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1385  */
1386 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1387 {
1388         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1389 }
1390
1391 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1392 {
1393         u64 _tsc = tsc;
1394         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1395
1396         if (ratio != kvm_default_tsc_scaling_ratio)
1397                 _tsc = __scale_tsc(ratio, tsc);
1398
1399         return _tsc;
1400 }
1401 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1402
1403 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1404 {
1405         u64 tsc;
1406
1407         tsc = kvm_scale_tsc(vcpu, rdtsc());
1408
1409         return target_tsc - tsc;
1410 }
1411
1412 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1413 {
1414         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1415 }
1416 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1417
1418 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1419 {
1420         struct kvm *kvm = vcpu->kvm;
1421         u64 offset, ns, elapsed;
1422         unsigned long flags;
1423         s64 usdiff;
1424         bool matched;
1425         bool already_matched;
1426         u64 data = msr->data;
1427
1428         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1429         offset = kvm_compute_tsc_offset(vcpu, data);
1430         ns = get_kernel_ns();
1431         elapsed = ns - kvm->arch.last_tsc_nsec;
1432
1433         if (vcpu->arch.virtual_tsc_khz) {
1434                 int faulted = 0;
1435
1436                 /* n.b - signed multiplication and division required */
1437                 usdiff = data - kvm->arch.last_tsc_write;
1438 #ifdef CONFIG_X86_64
1439                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1440 #else
1441                 /* do_div() only does unsigned */
1442                 asm("1: idivl %[divisor]\n"
1443                     "2: xor %%edx, %%edx\n"
1444                     "   movl $0, %[faulted]\n"
1445                     "3:\n"
1446                     ".section .fixup,\"ax\"\n"
1447                     "4: movl $1, %[faulted]\n"
1448                     "   jmp  3b\n"
1449                     ".previous\n"
1450
1451                 _ASM_EXTABLE(1b, 4b)
1452
1453                 : "=A"(usdiff), [faulted] "=r" (faulted)
1454                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1455
1456 #endif
1457                 do_div(elapsed, 1000);
1458                 usdiff -= elapsed;
1459                 if (usdiff < 0)
1460                         usdiff = -usdiff;
1461
1462                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1463                 if (faulted)
1464                         usdiff = USEC_PER_SEC;
1465         } else
1466                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1467
1468         /*
1469          * Special case: TSC write with a small delta (1 second) of virtual
1470          * cycle time against real time is interpreted as an attempt to
1471          * synchronize the CPU.
1472          *
1473          * For a reliable TSC, we can match TSC offsets, and for an unstable
1474          * TSC, we add elapsed time in this computation.  We could let the
1475          * compensation code attempt to catch up if we fall behind, but
1476          * it's better to try to match offsets from the beginning.
1477          */
1478         if (usdiff < USEC_PER_SEC &&
1479             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1480                 if (!check_tsc_unstable()) {
1481                         offset = kvm->arch.cur_tsc_offset;
1482                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1483                 } else {
1484                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1485                         data += delta;
1486                         offset = kvm_compute_tsc_offset(vcpu, data);
1487                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1488                 }
1489                 matched = true;
1490                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1491         } else {
1492                 /*
1493                  * We split periods of matched TSC writes into generations.
1494                  * For each generation, we track the original measured
1495                  * nanosecond time, offset, and write, so if TSCs are in
1496                  * sync, we can match exact offset, and if not, we can match
1497                  * exact software computation in compute_guest_tsc()
1498                  *
1499                  * These values are tracked in kvm->arch.cur_xxx variables.
1500                  */
1501                 kvm->arch.cur_tsc_generation++;
1502                 kvm->arch.cur_tsc_nsec = ns;
1503                 kvm->arch.cur_tsc_write = data;
1504                 kvm->arch.cur_tsc_offset = offset;
1505                 matched = false;
1506                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1507                          kvm->arch.cur_tsc_generation, data);
1508         }
1509
1510         /*
1511          * We also track th most recent recorded KHZ, write and time to
1512          * allow the matching interval to be extended at each write.
1513          */
1514         kvm->arch.last_tsc_nsec = ns;
1515         kvm->arch.last_tsc_write = data;
1516         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1517
1518         vcpu->arch.last_guest_tsc = data;
1519
1520         /* Keep track of which generation this VCPU has synchronized to */
1521         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1522         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1523         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1524
1525         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1526                 update_ia32_tsc_adjust_msr(vcpu, offset);
1527         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1528         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1529
1530         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1531         if (!matched) {
1532                 kvm->arch.nr_vcpus_matched_tsc = 0;
1533         } else if (!already_matched) {
1534                 kvm->arch.nr_vcpus_matched_tsc++;
1535         }
1536
1537         kvm_track_tsc_matching(vcpu);
1538         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1539 }
1540
1541 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1542
1543 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1544                                            s64 adjustment)
1545 {
1546         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1547 }
1548
1549 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1550 {
1551         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1552                 WARN_ON(adjustment < 0);
1553         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1554         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1555 }
1556
1557 #ifdef CONFIG_X86_64
1558
1559 static cycle_t read_tsc(void)
1560 {
1561         cycle_t ret = (cycle_t)rdtsc_ordered();
1562         u64 last = pvclock_gtod_data.clock.cycle_last;
1563
1564         if (likely(ret >= last))
1565                 return ret;
1566
1567         /*
1568          * GCC likes to generate cmov here, but this branch is extremely
1569          * predictable (it's just a function of time and the likely is
1570          * very likely) and there's a data dependence, so force GCC
1571          * to generate a branch instead.  I don't barrier() because
1572          * we don't actually need a barrier, and if this function
1573          * ever gets inlined it will generate worse code.
1574          */
1575         asm volatile ("");
1576         return last;
1577 }
1578
1579 static inline u64 vgettsc(cycle_t *cycle_now)
1580 {
1581         long v;
1582         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1583
1584         *cycle_now = read_tsc();
1585
1586         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1587         return v * gtod->clock.mult;
1588 }
1589
1590 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1591 {
1592         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1593         unsigned long seq;
1594         int mode;
1595         u64 ns;
1596
1597         do {
1598                 seq = read_seqcount_begin(&gtod->seq);
1599                 mode = gtod->clock.vclock_mode;
1600                 ns = gtod->nsec_base;
1601                 ns += vgettsc(cycle_now);
1602                 ns >>= gtod->clock.shift;
1603                 ns += gtod->boot_ns;
1604         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1605         *t = ns;
1606
1607         return mode;
1608 }
1609
1610 /* returns true if host is using tsc clocksource */
1611 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1612 {
1613         /* checked again under seqlock below */
1614         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1615                 return false;
1616
1617         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1618 }
1619 #endif
1620
1621 /*
1622  *
1623  * Assuming a stable TSC across physical CPUS, and a stable TSC
1624  * across virtual CPUs, the following condition is possible.
1625  * Each numbered line represents an event visible to both
1626  * CPUs at the next numbered event.
1627  *
1628  * "timespecX" represents host monotonic time. "tscX" represents
1629  * RDTSC value.
1630  *
1631  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1632  *
1633  * 1.  read timespec0,tsc0
1634  * 2.                                   | timespec1 = timespec0 + N
1635  *                                      | tsc1 = tsc0 + M
1636  * 3. transition to guest               | transition to guest
1637  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1638  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1639  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1640  *
1641  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1642  *
1643  *      - ret0 < ret1
1644  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1645  *              ...
1646  *      - 0 < N - M => M < N
1647  *
1648  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1649  * always the case (the difference between two distinct xtime instances
1650  * might be smaller then the difference between corresponding TSC reads,
1651  * when updating guest vcpus pvclock areas).
1652  *
1653  * To avoid that problem, do not allow visibility of distinct
1654  * system_timestamp/tsc_timestamp values simultaneously: use a master
1655  * copy of host monotonic time values. Update that master copy
1656  * in lockstep.
1657  *
1658  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1659  *
1660  */
1661
1662 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1663 {
1664 #ifdef CONFIG_X86_64
1665         struct kvm_arch *ka = &kvm->arch;
1666         int vclock_mode;
1667         bool host_tsc_clocksource, vcpus_matched;
1668
1669         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1670                         atomic_read(&kvm->online_vcpus));
1671
1672         /*
1673          * If the host uses TSC clock, then passthrough TSC as stable
1674          * to the guest.
1675          */
1676         host_tsc_clocksource = kvm_get_time_and_clockread(
1677                                         &ka->master_kernel_ns,
1678                                         &ka->master_cycle_now);
1679
1680         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1681                                 && !backwards_tsc_observed
1682                                 && !ka->boot_vcpu_runs_old_kvmclock;
1683
1684         if (ka->use_master_clock)
1685                 atomic_set(&kvm_guest_has_master_clock, 1);
1686
1687         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1688         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1689                                         vcpus_matched);
1690 #endif
1691 }
1692
1693 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1694 {
1695         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1696 }
1697
1698 static void kvm_gen_update_masterclock(struct kvm *kvm)
1699 {
1700 #ifdef CONFIG_X86_64
1701         int i;
1702         struct kvm_vcpu *vcpu;
1703         struct kvm_arch *ka = &kvm->arch;
1704
1705         spin_lock(&ka->pvclock_gtod_sync_lock);
1706         kvm_make_mclock_inprogress_request(kvm);
1707         /* no guest entries from this point */
1708         pvclock_update_vm_gtod_copy(kvm);
1709
1710         kvm_for_each_vcpu(i, vcpu, kvm)
1711                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1712
1713         /* guest entries allowed */
1714         kvm_for_each_vcpu(i, vcpu, kvm)
1715                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1716
1717         spin_unlock(&ka->pvclock_gtod_sync_lock);
1718 #endif
1719 }
1720
1721 static int kvm_guest_time_update(struct kvm_vcpu *v)
1722 {
1723         unsigned long flags, tgt_tsc_khz;
1724         struct kvm_vcpu_arch *vcpu = &v->arch;
1725         struct kvm_arch *ka = &v->kvm->arch;
1726         s64 kernel_ns;
1727         u64 tsc_timestamp, host_tsc;
1728         struct pvclock_vcpu_time_info guest_hv_clock;
1729         u8 pvclock_flags;
1730         bool use_master_clock;
1731
1732         kernel_ns = 0;
1733         host_tsc = 0;
1734
1735         /*
1736          * If the host uses TSC clock, then passthrough TSC as stable
1737          * to the guest.
1738          */
1739         spin_lock(&ka->pvclock_gtod_sync_lock);
1740         use_master_clock = ka->use_master_clock;
1741         if (use_master_clock) {
1742                 host_tsc = ka->master_cycle_now;
1743                 kernel_ns = ka->master_kernel_ns;
1744         }
1745         spin_unlock(&ka->pvclock_gtod_sync_lock);
1746
1747         /* Keep irq disabled to prevent changes to the clock */
1748         local_irq_save(flags);
1749         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1750         if (unlikely(tgt_tsc_khz == 0)) {
1751                 local_irq_restore(flags);
1752                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1753                 return 1;
1754         }
1755         if (!use_master_clock) {
1756                 host_tsc = rdtsc();
1757                 kernel_ns = get_kernel_ns();
1758         }
1759
1760         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1761
1762         /*
1763          * We may have to catch up the TSC to match elapsed wall clock
1764          * time for two reasons, even if kvmclock is used.
1765          *   1) CPU could have been running below the maximum TSC rate
1766          *   2) Broken TSC compensation resets the base at each VCPU
1767          *      entry to avoid unknown leaps of TSC even when running
1768          *      again on the same CPU.  This may cause apparent elapsed
1769          *      time to disappear, and the guest to stand still or run
1770          *      very slowly.
1771          */
1772         if (vcpu->tsc_catchup) {
1773                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1774                 if (tsc > tsc_timestamp) {
1775                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1776                         tsc_timestamp = tsc;
1777                 }
1778         }
1779
1780         local_irq_restore(flags);
1781
1782         if (!vcpu->pv_time_enabled)
1783                 return 0;
1784
1785         if (kvm_has_tsc_control)
1786                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1787
1788         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1789                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1790                                    &vcpu->hv_clock.tsc_shift,
1791                                    &vcpu->hv_clock.tsc_to_system_mul);
1792                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1793         }
1794
1795         /* With all the info we got, fill in the values */
1796         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1797         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1798         vcpu->last_guest_tsc = tsc_timestamp;
1799
1800         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1801                 &guest_hv_clock, sizeof(guest_hv_clock))))
1802                 return 0;
1803
1804         /* This VCPU is paused, but it's legal for a guest to read another
1805          * VCPU's kvmclock, so we really have to follow the specification where
1806          * it says that version is odd if data is being modified, and even after
1807          * it is consistent.
1808          *
1809          * Version field updates must be kept separate.  This is because
1810          * kvm_write_guest_cached might use a "rep movs" instruction, and
1811          * writes within a string instruction are weakly ordered.  So there
1812          * are three writes overall.
1813          *
1814          * As a small optimization, only write the version field in the first
1815          * and third write.  The vcpu->pv_time cache is still valid, because the
1816          * version field is the first in the struct.
1817          */
1818         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1819
1820         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1821         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1822                                 &vcpu->hv_clock,
1823                                 sizeof(vcpu->hv_clock.version));
1824
1825         smp_wmb();
1826
1827         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1828         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1829
1830         if (vcpu->pvclock_set_guest_stopped_request) {
1831                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1832                 vcpu->pvclock_set_guest_stopped_request = false;
1833         }
1834
1835         /* If the host uses TSC clocksource, then it is stable */
1836         if (use_master_clock)
1837                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1838
1839         vcpu->hv_clock.flags = pvclock_flags;
1840
1841         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1842
1843         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1844                                 &vcpu->hv_clock,
1845                                 sizeof(vcpu->hv_clock));
1846
1847         smp_wmb();
1848
1849         vcpu->hv_clock.version++;
1850         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1851                                 &vcpu->hv_clock,
1852                                 sizeof(vcpu->hv_clock.version));
1853         return 0;
1854 }
1855
1856 /*
1857  * kvmclock updates which are isolated to a given vcpu, such as
1858  * vcpu->cpu migration, should not allow system_timestamp from
1859  * the rest of the vcpus to remain static. Otherwise ntp frequency
1860  * correction applies to one vcpu's system_timestamp but not
1861  * the others.
1862  *
1863  * So in those cases, request a kvmclock update for all vcpus.
1864  * We need to rate-limit these requests though, as they can
1865  * considerably slow guests that have a large number of vcpus.
1866  * The time for a remote vcpu to update its kvmclock is bound
1867  * by the delay we use to rate-limit the updates.
1868  */
1869
1870 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1871
1872 static void kvmclock_update_fn(struct work_struct *work)
1873 {
1874         int i;
1875         struct delayed_work *dwork = to_delayed_work(work);
1876         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1877                                            kvmclock_update_work);
1878         struct kvm *kvm = container_of(ka, struct kvm, arch);
1879         struct kvm_vcpu *vcpu;
1880
1881         kvm_for_each_vcpu(i, vcpu, kvm) {
1882                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1883                 kvm_vcpu_kick(vcpu);
1884         }
1885 }
1886
1887 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1888 {
1889         struct kvm *kvm = v->kvm;
1890
1891         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1892         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1893                                         KVMCLOCK_UPDATE_DELAY);
1894 }
1895
1896 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1897
1898 static void kvmclock_sync_fn(struct work_struct *work)
1899 {
1900         struct delayed_work *dwork = to_delayed_work(work);
1901         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1902                                            kvmclock_sync_work);
1903         struct kvm *kvm = container_of(ka, struct kvm, arch);
1904
1905         if (!kvmclock_periodic_sync)
1906                 return;
1907
1908         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1909         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1910                                         KVMCLOCK_SYNC_PERIOD);
1911 }
1912
1913 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1914 {
1915         u64 mcg_cap = vcpu->arch.mcg_cap;
1916         unsigned bank_num = mcg_cap & 0xff;
1917
1918         switch (msr) {
1919         case MSR_IA32_MCG_STATUS:
1920                 vcpu->arch.mcg_status = data;
1921                 break;
1922         case MSR_IA32_MCG_CTL:
1923                 if (!(mcg_cap & MCG_CTL_P))
1924                         return 1;
1925                 if (data != 0 && data != ~(u64)0)
1926                         return -1;
1927                 vcpu->arch.mcg_ctl = data;
1928                 break;
1929         default:
1930                 if (msr >= MSR_IA32_MC0_CTL &&
1931                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1932                         u32 offset = msr - MSR_IA32_MC0_CTL;
1933                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1934                          * some Linux kernels though clear bit 10 in bank 4 to
1935                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1936                          * this to avoid an uncatched #GP in the guest
1937                          */
1938                         if ((offset & 0x3) == 0 &&
1939                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1940                                 return -1;
1941                         vcpu->arch.mce_banks[offset] = data;
1942                         break;
1943                 }
1944                 return 1;
1945         }
1946         return 0;
1947 }
1948
1949 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1950 {
1951         struct kvm *kvm = vcpu->kvm;
1952         int lm = is_long_mode(vcpu);
1953         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1954                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1955         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1956                 : kvm->arch.xen_hvm_config.blob_size_32;
1957         u32 page_num = data & ~PAGE_MASK;
1958         u64 page_addr = data & PAGE_MASK;
1959         u8 *page;
1960         int r;
1961
1962         r = -E2BIG;
1963         if (page_num >= blob_size)
1964                 goto out;
1965         r = -ENOMEM;
1966         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1967         if (IS_ERR(page)) {
1968                 r = PTR_ERR(page);
1969                 goto out;
1970         }
1971         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1972                 goto out_free;
1973         r = 0;
1974 out_free:
1975         kfree(page);
1976 out:
1977         return r;
1978 }
1979
1980 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1981 {
1982         gpa_t gpa = data & ~0x3f;
1983
1984         /* Bits 2:5 are reserved, Should be zero */
1985         if (data & 0x3c)
1986                 return 1;
1987
1988         vcpu->arch.apf.msr_val = data;
1989
1990         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1991                 kvm_clear_async_pf_completion_queue(vcpu);
1992                 kvm_async_pf_hash_reset(vcpu);
1993                 return 0;
1994         }
1995
1996         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1997                                         sizeof(u32)))
1998                 return 1;
1999
2000         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2001         kvm_async_pf_wakeup_all(vcpu);
2002         return 0;
2003 }
2004
2005 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2006 {
2007         vcpu->arch.pv_time_enabled = false;
2008 }
2009
2010 static void record_steal_time(struct kvm_vcpu *vcpu)
2011 {
2012         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2013                 return;
2014
2015         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2016                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2017                 return;
2018
2019         if (vcpu->arch.st.steal.version & 1)
2020                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2021
2022         vcpu->arch.st.steal.version += 1;
2023
2024         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2025                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2026
2027         smp_wmb();
2028
2029         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2030                 vcpu->arch.st.last_steal;
2031         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2032
2033         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2034                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2035
2036         smp_wmb();
2037
2038         vcpu->arch.st.steal.version += 1;
2039
2040         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2041                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2042 }
2043
2044 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2045 {
2046         bool pr = false;
2047         u32 msr = msr_info->index;
2048         u64 data = msr_info->data;
2049
2050         switch (msr) {
2051         case MSR_AMD64_NB_CFG:
2052         case MSR_IA32_UCODE_REV:
2053         case MSR_IA32_UCODE_WRITE:
2054         case MSR_VM_HSAVE_PA:
2055         case MSR_AMD64_PATCH_LOADER:
2056         case MSR_AMD64_BU_CFG2:
2057                 break;
2058
2059         case MSR_EFER:
2060                 return set_efer(vcpu, data);
2061         case MSR_K7_HWCR:
2062                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2063                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2064                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2065                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2066                 if (data != 0) {
2067                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2068                                     data);
2069                         return 1;
2070                 }
2071                 break;
2072         case MSR_FAM10H_MMIO_CONF_BASE:
2073                 if (data != 0) {
2074                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2075                                     "0x%llx\n", data);
2076                         return 1;
2077                 }
2078                 break;
2079         case MSR_IA32_DEBUGCTLMSR:
2080                 if (!data) {
2081                         /* We support the non-activated case already */
2082                         break;
2083                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2084                         /* Values other than LBR and BTF are vendor-specific,
2085                            thus reserved and should throw a #GP */
2086                         return 1;
2087                 }
2088                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2089                             __func__, data);
2090                 break;
2091         case 0x200 ... 0x2ff:
2092                 return kvm_mtrr_set_msr(vcpu, msr, data);
2093         case MSR_IA32_APICBASE:
2094                 return kvm_set_apic_base(vcpu, msr_info);
2095         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2096                 return kvm_x2apic_msr_write(vcpu, msr, data);
2097         case MSR_IA32_TSCDEADLINE:
2098                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2099                 break;
2100         case MSR_IA32_TSC_ADJUST:
2101                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2102                         if (!msr_info->host_initiated) {
2103                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2104                                 adjust_tsc_offset_guest(vcpu, adj);
2105                         }
2106                         vcpu->arch.ia32_tsc_adjust_msr = data;
2107                 }
2108                 break;
2109         case MSR_IA32_MISC_ENABLE:
2110                 vcpu->arch.ia32_misc_enable_msr = data;
2111                 break;
2112         case MSR_IA32_SMBASE:
2113                 if (!msr_info->host_initiated)
2114                         return 1;
2115                 vcpu->arch.smbase = data;
2116                 break;
2117         case MSR_KVM_WALL_CLOCK_NEW:
2118         case MSR_KVM_WALL_CLOCK:
2119                 vcpu->kvm->arch.wall_clock = data;
2120                 kvm_write_wall_clock(vcpu->kvm, data);
2121                 break;
2122         case MSR_KVM_SYSTEM_TIME_NEW:
2123         case MSR_KVM_SYSTEM_TIME: {
2124                 u64 gpa_offset;
2125                 struct kvm_arch *ka = &vcpu->kvm->arch;
2126
2127                 kvmclock_reset(vcpu);
2128
2129                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2130                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2131
2132                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2133                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2134                                         &vcpu->requests);
2135
2136                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2137                 }
2138
2139                 vcpu->arch.time = data;
2140                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2141
2142                 /* we verify if the enable bit is set... */
2143                 if (!(data & 1))
2144                         break;
2145
2146                 gpa_offset = data & ~(PAGE_MASK | 1);
2147
2148                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2149                      &vcpu->arch.pv_time, data & ~1ULL,
2150                      sizeof(struct pvclock_vcpu_time_info)))
2151                         vcpu->arch.pv_time_enabled = false;
2152                 else
2153                         vcpu->arch.pv_time_enabled = true;
2154
2155                 break;
2156         }
2157         case MSR_KVM_ASYNC_PF_EN:
2158                 if (kvm_pv_enable_async_pf(vcpu, data))
2159                         return 1;
2160                 break;
2161         case MSR_KVM_STEAL_TIME:
2162
2163                 if (unlikely(!sched_info_on()))
2164                         return 1;
2165
2166                 if (data & KVM_STEAL_RESERVED_MASK)
2167                         return 1;
2168
2169                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2170                                                 data & KVM_STEAL_VALID_BITS,
2171                                                 sizeof(struct kvm_steal_time)))
2172                         return 1;
2173
2174                 vcpu->arch.st.msr_val = data;
2175
2176                 if (!(data & KVM_MSR_ENABLED))
2177                         break;
2178
2179                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2180
2181                 break;
2182         case MSR_KVM_PV_EOI_EN:
2183                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2184                         return 1;
2185                 break;
2186
2187         case MSR_IA32_MCG_CTL:
2188         case MSR_IA32_MCG_STATUS:
2189         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2190                 return set_msr_mce(vcpu, msr, data);
2191
2192         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2193         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2194                 pr = true; /* fall through */
2195         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2196         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2197                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2198                         return kvm_pmu_set_msr(vcpu, msr_info);
2199
2200                 if (pr || data != 0)
2201                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2202                                     "0x%x data 0x%llx\n", msr, data);
2203                 break;
2204         case MSR_K7_CLK_CTL:
2205                 /*
2206                  * Ignore all writes to this no longer documented MSR.
2207                  * Writes are only relevant for old K7 processors,
2208                  * all pre-dating SVM, but a recommended workaround from
2209                  * AMD for these chips. It is possible to specify the
2210                  * affected processor models on the command line, hence
2211                  * the need to ignore the workaround.
2212                  */
2213                 break;
2214         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2215         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2216         case HV_X64_MSR_CRASH_CTL:
2217         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2218                 return kvm_hv_set_msr_common(vcpu, msr, data,
2219                                              msr_info->host_initiated);
2220         case MSR_IA32_BBL_CR_CTL3:
2221                 /* Drop writes to this legacy MSR -- see rdmsr
2222                  * counterpart for further detail.
2223                  */
2224                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2225                 break;
2226         case MSR_AMD64_OSVW_ID_LENGTH:
2227                 if (!guest_cpuid_has_osvw(vcpu))
2228                         return 1;
2229                 vcpu->arch.osvw.length = data;
2230                 break;
2231         case MSR_AMD64_OSVW_STATUS:
2232                 if (!guest_cpuid_has_osvw(vcpu))
2233                         return 1;
2234                 vcpu->arch.osvw.status = data;
2235                 break;
2236         default:
2237                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2238                         return xen_hvm_config(vcpu, data);
2239                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2240                         return kvm_pmu_set_msr(vcpu, msr_info);
2241                 if (!ignore_msrs) {
2242                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2243                                     msr, data);
2244                         return 1;
2245                 } else {
2246                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2247                                     msr, data);
2248                         break;
2249                 }
2250         }
2251         return 0;
2252 }
2253 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2254
2255
2256 /*
2257  * Reads an msr value (of 'msr_index') into 'pdata'.
2258  * Returns 0 on success, non-0 otherwise.
2259  * Assumes vcpu_load() was already called.
2260  */
2261 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2262 {
2263         return kvm_x86_ops->get_msr(vcpu, msr);
2264 }
2265 EXPORT_SYMBOL_GPL(kvm_get_msr);
2266
2267 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2268 {
2269         u64 data;
2270         u64 mcg_cap = vcpu->arch.mcg_cap;
2271         unsigned bank_num = mcg_cap & 0xff;
2272
2273         switch (msr) {
2274         case MSR_IA32_P5_MC_ADDR:
2275         case MSR_IA32_P5_MC_TYPE:
2276                 data = 0;
2277                 break;
2278         case MSR_IA32_MCG_CAP:
2279                 data = vcpu->arch.mcg_cap;
2280                 break;
2281         case MSR_IA32_MCG_CTL:
2282                 if (!(mcg_cap & MCG_CTL_P))
2283                         return 1;
2284                 data = vcpu->arch.mcg_ctl;
2285                 break;
2286         case MSR_IA32_MCG_STATUS:
2287                 data = vcpu->arch.mcg_status;
2288                 break;
2289         default:
2290                 if (msr >= MSR_IA32_MC0_CTL &&
2291                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2292                         u32 offset = msr - MSR_IA32_MC0_CTL;
2293                         data = vcpu->arch.mce_banks[offset];
2294                         break;
2295                 }
2296                 return 1;
2297         }
2298         *pdata = data;
2299         return 0;
2300 }
2301
2302 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2303 {
2304         switch (msr_info->index) {
2305         case MSR_IA32_PLATFORM_ID:
2306         case MSR_IA32_EBL_CR_POWERON:
2307         case MSR_IA32_DEBUGCTLMSR:
2308         case MSR_IA32_LASTBRANCHFROMIP:
2309         case MSR_IA32_LASTBRANCHTOIP:
2310         case MSR_IA32_LASTINTFROMIP:
2311         case MSR_IA32_LASTINTTOIP:
2312         case MSR_K8_SYSCFG:
2313         case MSR_K8_TSEG_ADDR:
2314         case MSR_K8_TSEG_MASK:
2315         case MSR_K7_HWCR:
2316         case MSR_VM_HSAVE_PA:
2317         case MSR_K8_INT_PENDING_MSG:
2318         case MSR_AMD64_NB_CFG:
2319         case MSR_FAM10H_MMIO_CONF_BASE:
2320         case MSR_AMD64_BU_CFG2:
2321         case MSR_IA32_PERF_CTL:
2322                 msr_info->data = 0;
2323                 break;
2324         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2325         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2326         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2327         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2328                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2329                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2330                 msr_info->data = 0;
2331                 break;
2332         case MSR_IA32_UCODE_REV:
2333                 msr_info->data = 0x100000000ULL;
2334                 break;
2335         case MSR_MTRRcap:
2336         case 0x200 ... 0x2ff:
2337                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2338         case 0xcd: /* fsb frequency */
2339                 msr_info->data = 3;
2340                 break;
2341                 /*
2342                  * MSR_EBC_FREQUENCY_ID
2343                  * Conservative value valid for even the basic CPU models.
2344                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2345                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2346                  * and 266MHz for model 3, or 4. Set Core Clock
2347                  * Frequency to System Bus Frequency Ratio to 1 (bits
2348                  * 31:24) even though these are only valid for CPU
2349                  * models > 2, however guests may end up dividing or
2350                  * multiplying by zero otherwise.
2351                  */
2352         case MSR_EBC_FREQUENCY_ID:
2353                 msr_info->data = 1 << 24;
2354                 break;
2355         case MSR_IA32_APICBASE:
2356                 msr_info->data = kvm_get_apic_base(vcpu);
2357                 break;
2358         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2359                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2360                 break;
2361         case MSR_IA32_TSCDEADLINE:
2362                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2363                 break;
2364         case MSR_IA32_TSC_ADJUST:
2365                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2366                 break;
2367         case MSR_IA32_MISC_ENABLE:
2368                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2369                 break;
2370         case MSR_IA32_SMBASE:
2371                 if (!msr_info->host_initiated)
2372                         return 1;
2373                 msr_info->data = vcpu->arch.smbase;
2374                 break;
2375         case MSR_IA32_PERF_STATUS:
2376                 /* TSC increment by tick */
2377                 msr_info->data = 1000ULL;
2378                 /* CPU multiplier */
2379                 msr_info->data |= (((uint64_t)4ULL) << 40);
2380                 break;
2381         case MSR_EFER:
2382                 msr_info->data = vcpu->arch.efer;
2383                 break;
2384         case MSR_KVM_WALL_CLOCK:
2385         case MSR_KVM_WALL_CLOCK_NEW:
2386                 msr_info->data = vcpu->kvm->arch.wall_clock;
2387                 break;
2388         case MSR_KVM_SYSTEM_TIME:
2389         case MSR_KVM_SYSTEM_TIME_NEW:
2390                 msr_info->data = vcpu->arch.time;
2391                 break;
2392         case MSR_KVM_ASYNC_PF_EN:
2393                 msr_info->data = vcpu->arch.apf.msr_val;
2394                 break;
2395         case MSR_KVM_STEAL_TIME:
2396                 msr_info->data = vcpu->arch.st.msr_val;
2397                 break;
2398         case MSR_KVM_PV_EOI_EN:
2399                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2400                 break;
2401         case MSR_IA32_P5_MC_ADDR:
2402         case MSR_IA32_P5_MC_TYPE:
2403         case MSR_IA32_MCG_CAP:
2404         case MSR_IA32_MCG_CTL:
2405         case MSR_IA32_MCG_STATUS:
2406         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2407                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2408         case MSR_K7_CLK_CTL:
2409                 /*
2410                  * Provide expected ramp-up count for K7. All other
2411                  * are set to zero, indicating minimum divisors for
2412                  * every field.
2413                  *
2414                  * This prevents guest kernels on AMD host with CPU
2415                  * type 6, model 8 and higher from exploding due to
2416                  * the rdmsr failing.
2417                  */
2418                 msr_info->data = 0x20000000;
2419                 break;
2420         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2421         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2422         case HV_X64_MSR_CRASH_CTL:
2423         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2424                 return kvm_hv_get_msr_common(vcpu,
2425                                              msr_info->index, &msr_info->data);
2426                 break;
2427         case MSR_IA32_BBL_CR_CTL3:
2428                 /* This legacy MSR exists but isn't fully documented in current
2429                  * silicon.  It is however accessed by winxp in very narrow
2430                  * scenarios where it sets bit #19, itself documented as
2431                  * a "reserved" bit.  Best effort attempt to source coherent
2432                  * read data here should the balance of the register be
2433                  * interpreted by the guest:
2434                  *
2435                  * L2 cache control register 3: 64GB range, 256KB size,
2436                  * enabled, latency 0x1, configured
2437                  */
2438                 msr_info->data = 0xbe702111;
2439                 break;
2440         case MSR_AMD64_OSVW_ID_LENGTH:
2441                 if (!guest_cpuid_has_osvw(vcpu))
2442                         return 1;
2443                 msr_info->data = vcpu->arch.osvw.length;
2444                 break;
2445         case MSR_AMD64_OSVW_STATUS:
2446                 if (!guest_cpuid_has_osvw(vcpu))
2447                         return 1;
2448                 msr_info->data = vcpu->arch.osvw.status;
2449                 break;
2450         default:
2451                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2452                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2453                 if (!ignore_msrs) {
2454                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2455                         return 1;
2456                 } else {
2457                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2458                         msr_info->data = 0;
2459                 }
2460                 break;
2461         }
2462         return 0;
2463 }
2464 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2465
2466 /*
2467  * Read or write a bunch of msrs. All parameters are kernel addresses.
2468  *
2469  * @return number of msrs set successfully.
2470  */
2471 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2472                     struct kvm_msr_entry *entries,
2473                     int (*do_msr)(struct kvm_vcpu *vcpu,
2474                                   unsigned index, u64 *data))
2475 {
2476         int i, idx;
2477
2478         idx = srcu_read_lock(&vcpu->kvm->srcu);
2479         for (i = 0; i < msrs->nmsrs; ++i)
2480                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2481                         break;
2482         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2483
2484         return i;
2485 }
2486
2487 /*
2488  * Read or write a bunch of msrs. Parameters are user addresses.
2489  *
2490  * @return number of msrs set successfully.
2491  */
2492 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2493                   int (*do_msr)(struct kvm_vcpu *vcpu,
2494                                 unsigned index, u64 *data),
2495                   int writeback)
2496 {
2497         struct kvm_msrs msrs;
2498         struct kvm_msr_entry *entries;
2499         int r, n;
2500         unsigned size;
2501
2502         r = -EFAULT;
2503         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2504                 goto out;
2505
2506         r = -E2BIG;
2507         if (msrs.nmsrs >= MAX_IO_MSRS)
2508                 goto out;
2509
2510         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2511         entries = memdup_user(user_msrs->entries, size);
2512         if (IS_ERR(entries)) {
2513                 r = PTR_ERR(entries);
2514                 goto out;
2515         }
2516
2517         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2518         if (r < 0)
2519                 goto out_free;
2520
2521         r = -EFAULT;
2522         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2523                 goto out_free;
2524
2525         r = n;
2526
2527 out_free:
2528         kfree(entries);
2529 out:
2530         return r;
2531 }
2532
2533 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2534 {
2535         int r;
2536
2537         switch (ext) {
2538         case KVM_CAP_IRQCHIP:
2539         case KVM_CAP_HLT:
2540         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2541         case KVM_CAP_SET_TSS_ADDR:
2542         case KVM_CAP_EXT_CPUID:
2543         case KVM_CAP_EXT_EMUL_CPUID:
2544         case KVM_CAP_CLOCKSOURCE:
2545         case KVM_CAP_PIT:
2546         case KVM_CAP_NOP_IO_DELAY:
2547         case KVM_CAP_MP_STATE:
2548         case KVM_CAP_SYNC_MMU:
2549         case KVM_CAP_USER_NMI:
2550         case KVM_CAP_REINJECT_CONTROL:
2551         case KVM_CAP_IRQ_INJECT_STATUS:
2552         case KVM_CAP_IOEVENTFD:
2553         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2554         case KVM_CAP_PIT2:
2555         case KVM_CAP_PIT_STATE2:
2556         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2557         case KVM_CAP_XEN_HVM:
2558         case KVM_CAP_ADJUST_CLOCK:
2559         case KVM_CAP_VCPU_EVENTS:
2560         case KVM_CAP_HYPERV:
2561         case KVM_CAP_HYPERV_VAPIC:
2562         case KVM_CAP_HYPERV_SPIN:
2563         case KVM_CAP_HYPERV_SYNIC:
2564         case KVM_CAP_PCI_SEGMENT:
2565         case KVM_CAP_DEBUGREGS:
2566         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2567         case KVM_CAP_XSAVE:
2568         case KVM_CAP_ASYNC_PF:
2569         case KVM_CAP_GET_TSC_KHZ:
2570         case KVM_CAP_KVMCLOCK_CTRL:
2571         case KVM_CAP_READONLY_MEM:
2572         case KVM_CAP_HYPERV_TIME:
2573         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2574         case KVM_CAP_TSC_DEADLINE_TIMER:
2575         case KVM_CAP_ENABLE_CAP_VM:
2576         case KVM_CAP_DISABLE_QUIRKS:
2577         case KVM_CAP_SET_BOOT_CPU_ID:
2578         case KVM_CAP_SPLIT_IRQCHIP:
2579 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2580         case KVM_CAP_ASSIGN_DEV_IRQ:
2581         case KVM_CAP_PCI_2_3:
2582 #endif
2583                 r = 1;
2584                 break;
2585         case KVM_CAP_X86_SMM:
2586                 /* SMBASE is usually relocated above 1M on modern chipsets,
2587                  * and SMM handlers might indeed rely on 4G segment limits,
2588                  * so do not report SMM to be available if real mode is
2589                  * emulated via vm86 mode.  Still, do not go to great lengths
2590                  * to avoid userspace's usage of the feature, because it is a
2591                  * fringe case that is not enabled except via specific settings
2592                  * of the module parameters.
2593                  */
2594                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2595                 break;
2596         case KVM_CAP_COALESCED_MMIO:
2597                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2598                 break;
2599         case KVM_CAP_VAPIC:
2600                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2601                 break;
2602         case KVM_CAP_NR_VCPUS:
2603                 r = KVM_SOFT_MAX_VCPUS;
2604                 break;
2605         case KVM_CAP_MAX_VCPUS:
2606                 r = KVM_MAX_VCPUS;
2607                 break;
2608         case KVM_CAP_NR_MEMSLOTS:
2609                 r = KVM_USER_MEM_SLOTS;
2610                 break;
2611         case KVM_CAP_PV_MMU:    /* obsolete */
2612                 r = 0;
2613                 break;
2614 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2615         case KVM_CAP_IOMMU:
2616                 r = iommu_present(&pci_bus_type);
2617                 break;
2618 #endif
2619         case KVM_CAP_MCE:
2620                 r = KVM_MAX_MCE_BANKS;
2621                 break;
2622         case KVM_CAP_XCRS:
2623                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2624                 break;
2625         case KVM_CAP_TSC_CONTROL:
2626                 r = kvm_has_tsc_control;
2627                 break;
2628         default:
2629                 r = 0;
2630                 break;
2631         }
2632         return r;
2633
2634 }
2635
2636 long kvm_arch_dev_ioctl(struct file *filp,
2637                         unsigned int ioctl, unsigned long arg)
2638 {
2639         void __user *argp = (void __user *)arg;
2640         long r;
2641
2642         switch (ioctl) {
2643         case KVM_GET_MSR_INDEX_LIST: {
2644                 struct kvm_msr_list __user *user_msr_list = argp;
2645                 struct kvm_msr_list msr_list;
2646                 unsigned n;
2647
2648                 r = -EFAULT;
2649                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2650                         goto out;
2651                 n = msr_list.nmsrs;
2652                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2653                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2654                         goto out;
2655                 r = -E2BIG;
2656                 if (n < msr_list.nmsrs)
2657                         goto out;
2658                 r = -EFAULT;
2659                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2660                                  num_msrs_to_save * sizeof(u32)))
2661                         goto out;
2662                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2663                                  &emulated_msrs,
2664                                  num_emulated_msrs * sizeof(u32)))
2665                         goto out;
2666                 r = 0;
2667                 break;
2668         }
2669         case KVM_GET_SUPPORTED_CPUID:
2670         case KVM_GET_EMULATED_CPUID: {
2671                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2672                 struct kvm_cpuid2 cpuid;
2673
2674                 r = -EFAULT;
2675                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2676                         goto out;
2677
2678                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2679                                             ioctl);
2680                 if (r)
2681                         goto out;
2682
2683                 r = -EFAULT;
2684                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2685                         goto out;
2686                 r = 0;
2687                 break;
2688         }
2689         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2690                 r = -EFAULT;
2691                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2692                                  sizeof(kvm_mce_cap_supported)))
2693                         goto out;
2694                 r = 0;
2695                 break;
2696         }
2697         default:
2698                 r = -EINVAL;
2699         }
2700 out:
2701         return r;
2702 }
2703
2704 static void wbinvd_ipi(void *garbage)
2705 {
2706         wbinvd();
2707 }
2708
2709 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2710 {
2711         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2712 }
2713
2714 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2715 {
2716         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2717 }
2718
2719 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2720 {
2721         /* Address WBINVD may be executed by guest */
2722         if (need_emulate_wbinvd(vcpu)) {
2723                 if (kvm_x86_ops->has_wbinvd_exit())
2724                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2725                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2726                         smp_call_function_single(vcpu->cpu,
2727                                         wbinvd_ipi, NULL, 1);
2728         }
2729
2730         kvm_x86_ops->vcpu_load(vcpu, cpu);
2731
2732         /* Apply any externally detected TSC adjustments (due to suspend) */
2733         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2734                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2735                 vcpu->arch.tsc_offset_adjustment = 0;
2736                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2737         }
2738
2739         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2740                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2741                                 rdtsc() - vcpu->arch.last_host_tsc;
2742                 if (tsc_delta < 0)
2743                         mark_tsc_unstable("KVM discovered backwards TSC");
2744
2745                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2746                                 kvm_x86_ops->set_hv_timer(vcpu,
2747                                         kvm_get_lapic_tscdeadline_msr(vcpu)))
2748                         kvm_lapic_switch_to_sw_timer(vcpu);
2749                 if (check_tsc_unstable()) {
2750                         u64 offset = kvm_compute_tsc_offset(vcpu,
2751                                                 vcpu->arch.last_guest_tsc);
2752                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2753                         vcpu->arch.tsc_catchup = 1;
2754                 }
2755                 /*
2756                  * On a host with synchronized TSC, there is no need to update
2757                  * kvmclock on vcpu->cpu migration
2758                  */
2759                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2760                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2761                 if (vcpu->cpu != cpu)
2762                         kvm_migrate_timers(vcpu);
2763                 vcpu->cpu = cpu;
2764         }
2765
2766         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2767 }
2768
2769 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2770 {
2771         kvm_x86_ops->vcpu_put(vcpu);
2772         kvm_put_guest_fpu(vcpu);
2773         vcpu->arch.last_host_tsc = rdtsc();
2774 }
2775
2776 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2777                                     struct kvm_lapic_state *s)
2778 {
2779         if (vcpu->arch.apicv_active)
2780                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2781
2782         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2783
2784         return 0;
2785 }
2786
2787 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2788                                     struct kvm_lapic_state *s)
2789 {
2790         kvm_apic_post_state_restore(vcpu, s);
2791         update_cr8_intercept(vcpu);
2792
2793         return 0;
2794 }
2795
2796 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2797 {
2798         return (!lapic_in_kernel(vcpu) ||
2799                 kvm_apic_accept_pic_intr(vcpu));
2800 }
2801
2802 /*
2803  * if userspace requested an interrupt window, check that the
2804  * interrupt window is open.
2805  *
2806  * No need to exit to userspace if we already have an interrupt queued.
2807  */
2808 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2809 {
2810         return kvm_arch_interrupt_allowed(vcpu) &&
2811                 !kvm_cpu_has_interrupt(vcpu) &&
2812                 !kvm_event_needs_reinjection(vcpu) &&
2813                 kvm_cpu_accept_dm_intr(vcpu);
2814 }
2815
2816 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2817                                     struct kvm_interrupt *irq)
2818 {
2819         if (irq->irq >= KVM_NR_INTERRUPTS)
2820                 return -EINVAL;
2821
2822         if (!irqchip_in_kernel(vcpu->kvm)) {
2823                 kvm_queue_interrupt(vcpu, irq->irq, false);
2824                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2825                 return 0;
2826         }
2827
2828         /*
2829          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2830          * fail for in-kernel 8259.
2831          */
2832         if (pic_in_kernel(vcpu->kvm))
2833                 return -ENXIO;
2834
2835         if (vcpu->arch.pending_external_vector != -1)
2836                 return -EEXIST;
2837
2838         vcpu->arch.pending_external_vector = irq->irq;
2839         kvm_make_request(KVM_REQ_EVENT, vcpu);
2840         return 0;
2841 }
2842
2843 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2844 {
2845         kvm_inject_nmi(vcpu);
2846
2847         return 0;
2848 }
2849
2850 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2851 {
2852         kvm_make_request(KVM_REQ_SMI, vcpu);
2853
2854         return 0;
2855 }
2856
2857 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2858                                            struct kvm_tpr_access_ctl *tac)
2859 {
2860         if (tac->flags)
2861                 return -EINVAL;
2862         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2863         return 0;
2864 }
2865
2866 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2867                                         u64 mcg_cap)
2868 {
2869         int r;
2870         unsigned bank_num = mcg_cap & 0xff, bank;
2871
2872         r = -EINVAL;
2873         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2874                 goto out;
2875         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
2876                 goto out;
2877         r = 0;
2878         vcpu->arch.mcg_cap = mcg_cap;
2879         /* Init IA32_MCG_CTL to all 1s */
2880         if (mcg_cap & MCG_CTL_P)
2881                 vcpu->arch.mcg_ctl = ~(u64)0;
2882         /* Init IA32_MCi_CTL to all 1s */
2883         for (bank = 0; bank < bank_num; bank++)
2884                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2885
2886         if (kvm_x86_ops->setup_mce)
2887                 kvm_x86_ops->setup_mce(vcpu);
2888 out:
2889         return r;
2890 }
2891
2892 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2893                                       struct kvm_x86_mce *mce)
2894 {
2895         u64 mcg_cap = vcpu->arch.mcg_cap;
2896         unsigned bank_num = mcg_cap & 0xff;
2897         u64 *banks = vcpu->arch.mce_banks;
2898
2899         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2900                 return -EINVAL;
2901         /*
2902          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2903          * reporting is disabled
2904          */
2905         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2906             vcpu->arch.mcg_ctl != ~(u64)0)
2907                 return 0;
2908         banks += 4 * mce->bank;
2909         /*
2910          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2911          * reporting is disabled for the bank
2912          */
2913         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2914                 return 0;
2915         if (mce->status & MCI_STATUS_UC) {
2916                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2917                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2918                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2919                         return 0;
2920                 }
2921                 if (banks[1] & MCI_STATUS_VAL)
2922                         mce->status |= MCI_STATUS_OVER;
2923                 banks[2] = mce->addr;
2924                 banks[3] = mce->misc;
2925                 vcpu->arch.mcg_status = mce->mcg_status;
2926                 banks[1] = mce->status;
2927                 kvm_queue_exception(vcpu, MC_VECTOR);
2928         } else if (!(banks[1] & MCI_STATUS_VAL)
2929                    || !(banks[1] & MCI_STATUS_UC)) {
2930                 if (banks[1] & MCI_STATUS_VAL)
2931                         mce->status |= MCI_STATUS_OVER;
2932                 banks[2] = mce->addr;
2933                 banks[3] = mce->misc;
2934                 banks[1] = mce->status;
2935         } else
2936                 banks[1] |= MCI_STATUS_OVER;
2937         return 0;
2938 }
2939
2940 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2941                                                struct kvm_vcpu_events *events)
2942 {
2943         process_nmi(vcpu);
2944         events->exception.injected =
2945                 vcpu->arch.exception.pending &&
2946                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2947         events->exception.nr = vcpu->arch.exception.nr;
2948         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2949         events->exception.pad = 0;
2950         events->exception.error_code = vcpu->arch.exception.error_code;
2951
2952         events->interrupt.injected =
2953                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2954         events->interrupt.nr = vcpu->arch.interrupt.nr;
2955         events->interrupt.soft = 0;
2956         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2957
2958         events->nmi.injected = vcpu->arch.nmi_injected;
2959         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2960         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2961         events->nmi.pad = 0;
2962
2963         events->sipi_vector = 0; /* never valid when reporting to user space */
2964
2965         events->smi.smm = is_smm(vcpu);
2966         events->smi.pending = vcpu->arch.smi_pending;
2967         events->smi.smm_inside_nmi =
2968                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2969         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2970
2971         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2972                          | KVM_VCPUEVENT_VALID_SHADOW
2973                          | KVM_VCPUEVENT_VALID_SMM);
2974         memset(&events->reserved, 0, sizeof(events->reserved));
2975 }
2976
2977 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2978                                               struct kvm_vcpu_events *events)
2979 {
2980         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2981                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2982                               | KVM_VCPUEVENT_VALID_SHADOW
2983                               | KVM_VCPUEVENT_VALID_SMM))
2984                 return -EINVAL;
2985
2986         if (events->exception.injected &&
2987             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
2988                 return -EINVAL;
2989
2990         process_nmi(vcpu);
2991         vcpu->arch.exception.pending = events->exception.injected;
2992         vcpu->arch.exception.nr = events->exception.nr;
2993         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2994         vcpu->arch.exception.error_code = events->exception.error_code;
2995
2996         vcpu->arch.interrupt.pending = events->interrupt.injected;
2997         vcpu->arch.interrupt.nr = events->interrupt.nr;
2998         vcpu->arch.interrupt.soft = events->interrupt.soft;
2999         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3000                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3001                                                   events->interrupt.shadow);
3002
3003         vcpu->arch.nmi_injected = events->nmi.injected;
3004         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3005                 vcpu->arch.nmi_pending = events->nmi.pending;
3006         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3007
3008         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3009             lapic_in_kernel(vcpu))
3010                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3011
3012         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3013                 if (events->smi.smm)
3014                         vcpu->arch.hflags |= HF_SMM_MASK;
3015                 else
3016                         vcpu->arch.hflags &= ~HF_SMM_MASK;
3017                 vcpu->arch.smi_pending = events->smi.pending;
3018                 if (events->smi.smm_inside_nmi)
3019                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3020                 else
3021                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3022                 if (lapic_in_kernel(vcpu)) {
3023                         if (events->smi.latched_init)
3024                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3025                         else
3026                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3027                 }
3028         }
3029
3030         kvm_make_request(KVM_REQ_EVENT, vcpu);
3031
3032         return 0;
3033 }
3034
3035 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3036                                              struct kvm_debugregs *dbgregs)
3037 {
3038         unsigned long val;
3039
3040         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3041         kvm_get_dr(vcpu, 6, &val);
3042         dbgregs->dr6 = val;
3043         dbgregs->dr7 = vcpu->arch.dr7;
3044         dbgregs->flags = 0;
3045         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3046 }
3047
3048 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3049                                             struct kvm_debugregs *dbgregs)
3050 {
3051         if (dbgregs->flags)
3052                 return -EINVAL;
3053
3054         if (dbgregs->dr6 & ~0xffffffffull)
3055                 return -EINVAL;
3056         if (dbgregs->dr7 & ~0xffffffffull)
3057                 return -EINVAL;
3058
3059         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3060         kvm_update_dr0123(vcpu);
3061         vcpu->arch.dr6 = dbgregs->dr6;
3062         kvm_update_dr6(vcpu);
3063         vcpu->arch.dr7 = dbgregs->dr7;
3064         kvm_update_dr7(vcpu);
3065
3066         return 0;
3067 }
3068
3069 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3070
3071 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3072 {
3073         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3074         u64 xstate_bv = xsave->header.xfeatures;
3075         u64 valid;
3076
3077         /*
3078          * Copy legacy XSAVE area, to avoid complications with CPUID
3079          * leaves 0 and 1 in the loop below.
3080          */
3081         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3082
3083         /* Set XSTATE_BV */
3084         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3085
3086         /*
3087          * Copy each region from the possibly compacted offset to the
3088          * non-compacted offset.
3089          */
3090         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3091         while (valid) {
3092                 u64 feature = valid & -valid;
3093                 int index = fls64(feature) - 1;
3094                 void *src = get_xsave_addr(xsave, feature);
3095
3096                 if (src) {
3097                         u32 size, offset, ecx, edx;
3098                         cpuid_count(XSTATE_CPUID, index,
3099                                     &size, &offset, &ecx, &edx);
3100                         memcpy(dest + offset, src, size);
3101                 }
3102
3103                 valid -= feature;
3104         }
3105 }
3106
3107 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3108 {
3109         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3110         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3111         u64 valid;
3112
3113         /*
3114          * Copy legacy XSAVE area, to avoid complications with CPUID
3115          * leaves 0 and 1 in the loop below.
3116          */
3117         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3118
3119         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3120         xsave->header.xfeatures = xstate_bv;
3121         if (boot_cpu_has(X86_FEATURE_XSAVES))
3122                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3123
3124         /*
3125          * Copy each region from the non-compacted offset to the
3126          * possibly compacted offset.
3127          */
3128         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3129         while (valid) {
3130                 u64 feature = valid & -valid;
3131                 int index = fls64(feature) - 1;
3132                 void *dest = get_xsave_addr(xsave, feature);
3133
3134                 if (dest) {
3135                         u32 size, offset, ecx, edx;
3136                         cpuid_count(XSTATE_CPUID, index,
3137                                     &size, &offset, &ecx, &edx);
3138                         memcpy(dest, src + offset, size);
3139                 }
3140
3141                 valid -= feature;
3142         }
3143 }
3144
3145 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3146                                          struct kvm_xsave *guest_xsave)
3147 {
3148         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3149                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3150                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3151         } else {
3152                 memcpy(guest_xsave->region,
3153                         &vcpu->arch.guest_fpu.state.fxsave,
3154                         sizeof(struct fxregs_state));
3155                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3156                         XFEATURE_MASK_FPSSE;
3157         }
3158 }
3159
3160 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3161                                         struct kvm_xsave *guest_xsave)
3162 {
3163         u64 xstate_bv =
3164                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3165
3166         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3167                 /*
3168                  * Here we allow setting states that are not present in
3169                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3170                  * with old userspace.
3171                  */
3172                 if (xstate_bv & ~kvm_supported_xcr0())
3173                         return -EINVAL;
3174                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3175         } else {
3176                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3177                         return -EINVAL;
3178                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3179                         guest_xsave->region, sizeof(struct fxregs_state));
3180         }
3181         return 0;
3182 }
3183
3184 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3185                                         struct kvm_xcrs *guest_xcrs)
3186 {
3187         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3188                 guest_xcrs->nr_xcrs = 0;
3189                 return;
3190         }
3191
3192         guest_xcrs->nr_xcrs = 1;
3193         guest_xcrs->flags = 0;
3194         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3195         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3196 }
3197
3198 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3199                                        struct kvm_xcrs *guest_xcrs)
3200 {
3201         int i, r = 0;
3202
3203         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3204                 return -EINVAL;
3205
3206         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3207                 return -EINVAL;
3208
3209         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3210                 /* Only support XCR0 currently */
3211                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3212                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3213                                 guest_xcrs->xcrs[i].value);
3214                         break;
3215                 }
3216         if (r)
3217                 r = -EINVAL;
3218         return r;
3219 }
3220
3221 /*
3222  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3223  * stopped by the hypervisor.  This function will be called from the host only.
3224  * EINVAL is returned when the host attempts to set the flag for a guest that
3225  * does not support pv clocks.
3226  */
3227 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3228 {
3229         if (!vcpu->arch.pv_time_enabled)
3230                 return -EINVAL;
3231         vcpu->arch.pvclock_set_guest_stopped_request = true;
3232         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3233         return 0;
3234 }
3235
3236 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3237                                      struct kvm_enable_cap *cap)
3238 {
3239         if (cap->flags)
3240                 return -EINVAL;
3241
3242         switch (cap->cap) {
3243         case KVM_CAP_HYPERV_SYNIC:
3244                 return kvm_hv_activate_synic(vcpu);
3245         default:
3246                 return -EINVAL;
3247         }
3248 }
3249
3250 long kvm_arch_vcpu_ioctl(struct file *filp,
3251                          unsigned int ioctl, unsigned long arg)
3252 {
3253         struct kvm_vcpu *vcpu = filp->private_data;
3254         void __user *argp = (void __user *)arg;
3255         int r;
3256         union {
3257                 struct kvm_lapic_state *lapic;
3258                 struct kvm_xsave *xsave;
3259                 struct kvm_xcrs *xcrs;
3260                 void *buffer;
3261         } u;
3262
3263         u.buffer = NULL;
3264         switch (ioctl) {
3265         case KVM_GET_LAPIC: {
3266                 r = -EINVAL;
3267                 if (!lapic_in_kernel(vcpu))
3268                         goto out;
3269                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3270
3271                 r = -ENOMEM;
3272                 if (!u.lapic)
3273                         goto out;
3274                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3275                 if (r)
3276                         goto out;
3277                 r = -EFAULT;
3278                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3279                         goto out;
3280                 r = 0;
3281                 break;
3282         }
3283         case KVM_SET_LAPIC: {
3284                 r = -EINVAL;
3285                 if (!lapic_in_kernel(vcpu))
3286                         goto out;
3287                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3288                 if (IS_ERR(u.lapic))
3289                         return PTR_ERR(u.lapic);
3290
3291                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3292                 break;
3293         }
3294         case KVM_INTERRUPT: {
3295                 struct kvm_interrupt irq;
3296
3297                 r = -EFAULT;
3298                 if (copy_from_user(&irq, argp, sizeof irq))
3299                         goto out;
3300                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3301                 break;
3302         }
3303         case KVM_NMI: {
3304                 r = kvm_vcpu_ioctl_nmi(vcpu);
3305                 break;
3306         }
3307         case KVM_SMI: {
3308                 r = kvm_vcpu_ioctl_smi(vcpu);
3309                 break;
3310         }
3311         case KVM_SET_CPUID: {
3312                 struct kvm_cpuid __user *cpuid_arg = argp;
3313                 struct kvm_cpuid cpuid;
3314
3315                 r = -EFAULT;
3316                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3317                         goto out;
3318                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3319                 break;
3320         }
3321         case KVM_SET_CPUID2: {
3322                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3323                 struct kvm_cpuid2 cpuid;
3324
3325                 r = -EFAULT;
3326                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3327                         goto out;
3328                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3329                                               cpuid_arg->entries);
3330                 break;
3331         }
3332         case KVM_GET_CPUID2: {
3333                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3334                 struct kvm_cpuid2 cpuid;
3335
3336                 r = -EFAULT;
3337                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3338                         goto out;
3339                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3340                                               cpuid_arg->entries);
3341                 if (r)
3342                         goto out;
3343                 r = -EFAULT;
3344                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3345                         goto out;
3346                 r = 0;
3347                 break;
3348         }
3349         case KVM_GET_MSRS:
3350                 r = msr_io(vcpu, argp, do_get_msr, 1);
3351                 break;
3352         case KVM_SET_MSRS:
3353                 r = msr_io(vcpu, argp, do_set_msr, 0);
3354                 break;
3355         case KVM_TPR_ACCESS_REPORTING: {
3356                 struct kvm_tpr_access_ctl tac;
3357
3358                 r = -EFAULT;
3359                 if (copy_from_user(&tac, argp, sizeof tac))
3360                         goto out;
3361                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3362                 if (r)
3363                         goto out;
3364                 r = -EFAULT;
3365                 if (copy_to_user(argp, &tac, sizeof tac))
3366                         goto out;
3367                 r = 0;
3368                 break;
3369         };
3370         case KVM_SET_VAPIC_ADDR: {
3371                 struct kvm_vapic_addr va;
3372
3373                 r = -EINVAL;
3374                 if (!lapic_in_kernel(vcpu))
3375                         goto out;
3376                 r = -EFAULT;
3377                 if (copy_from_user(&va, argp, sizeof va))
3378                         goto out;
3379                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3380                 break;
3381         }
3382         case KVM_X86_SETUP_MCE: {
3383                 u64 mcg_cap;
3384
3385                 r = -EFAULT;
3386                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3387                         goto out;
3388                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3389                 break;
3390         }
3391         case KVM_X86_SET_MCE: {
3392                 struct kvm_x86_mce mce;
3393
3394                 r = -EFAULT;
3395                 if (copy_from_user(&mce, argp, sizeof mce))
3396                         goto out;
3397                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3398                 break;
3399         }
3400         case KVM_GET_VCPU_EVENTS: {
3401                 struct kvm_vcpu_events events;
3402
3403                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3404
3405                 r = -EFAULT;
3406                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3407                         break;
3408                 r = 0;
3409                 break;
3410         }
3411         case KVM_SET_VCPU_EVENTS: {
3412                 struct kvm_vcpu_events events;
3413
3414                 r = -EFAULT;
3415                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3416                         break;
3417
3418                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3419                 break;
3420         }
3421         case KVM_GET_DEBUGREGS: {
3422                 struct kvm_debugregs dbgregs;
3423
3424                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3425
3426                 r = -EFAULT;
3427                 if (copy_to_user(argp, &dbgregs,
3428                                  sizeof(struct kvm_debugregs)))
3429                         break;
3430                 r = 0;
3431                 break;
3432         }
3433         case KVM_SET_DEBUGREGS: {
3434                 struct kvm_debugregs dbgregs;
3435
3436                 r = -EFAULT;
3437                 if (copy_from_user(&dbgregs, argp,
3438                                    sizeof(struct kvm_debugregs)))
3439                         break;
3440
3441                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3442                 break;
3443         }
3444         case KVM_GET_XSAVE: {
3445                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3446                 r = -ENOMEM;
3447                 if (!u.xsave)
3448                         break;
3449
3450                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3451
3452                 r = -EFAULT;
3453                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3454                         break;
3455                 r = 0;
3456                 break;
3457         }
3458         case KVM_SET_XSAVE: {
3459                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3460                 if (IS_ERR(u.xsave))
3461                         return PTR_ERR(u.xsave);
3462
3463                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3464                 break;
3465         }
3466         case KVM_GET_XCRS: {
3467                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3468                 r = -ENOMEM;
3469                 if (!u.xcrs)
3470                         break;
3471
3472                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3473
3474                 r = -EFAULT;
3475                 if (copy_to_user(argp, u.xcrs,
3476                                  sizeof(struct kvm_xcrs)))
3477                         break;
3478                 r = 0;
3479                 break;
3480         }
3481         case KVM_SET_XCRS: {
3482                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3483                 if (IS_ERR(u.xcrs))
3484                         return PTR_ERR(u.xcrs);
3485
3486                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3487                 break;
3488         }
3489         case KVM_SET_TSC_KHZ: {
3490                 u32 user_tsc_khz;
3491
3492                 r = -EINVAL;
3493                 user_tsc_khz = (u32)arg;
3494
3495                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3496                         goto out;
3497
3498                 if (user_tsc_khz == 0)
3499                         user_tsc_khz = tsc_khz;
3500
3501                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3502                         r = 0;
3503
3504                 goto out;
3505         }
3506         case KVM_GET_TSC_KHZ: {
3507                 r = vcpu->arch.virtual_tsc_khz;
3508                 goto out;
3509         }
3510         case KVM_KVMCLOCK_CTRL: {
3511                 r = kvm_set_guest_paused(vcpu);
3512                 goto out;
3513         }
3514         case KVM_ENABLE_CAP: {
3515                 struct kvm_enable_cap cap;
3516
3517                 r = -EFAULT;
3518                 if (copy_from_user(&cap, argp, sizeof(cap)))
3519                         goto out;
3520                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3521                 break;
3522         }
3523         default:
3524                 r = -EINVAL;
3525         }
3526 out:
3527         kfree(u.buffer);
3528         return r;
3529 }
3530
3531 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3532 {
3533         return VM_FAULT_SIGBUS;
3534 }
3535
3536 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3537 {
3538         int ret;
3539
3540         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3541                 return -EINVAL;
3542         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3543         return ret;
3544 }
3545
3546 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3547                                               u64 ident_addr)
3548 {
3549         kvm->arch.ept_identity_map_addr = ident_addr;
3550         return 0;
3551 }
3552
3553 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3554                                           u32 kvm_nr_mmu_pages)
3555 {
3556         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3557                 return -EINVAL;
3558
3559         mutex_lock(&kvm->slots_lock);
3560
3561         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3562         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3563
3564         mutex_unlock(&kvm->slots_lock);
3565         return 0;
3566 }
3567
3568 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3569 {
3570         return kvm->arch.n_max_mmu_pages;
3571 }
3572
3573 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3574 {
3575         int r;
3576
3577         r = 0;
3578         switch (chip->chip_id) {
3579         case KVM_IRQCHIP_PIC_MASTER:
3580                 memcpy(&chip->chip.pic,
3581                         &pic_irqchip(kvm)->pics[0],
3582                         sizeof(struct kvm_pic_state));
3583                 break;
3584         case KVM_IRQCHIP_PIC_SLAVE:
3585                 memcpy(&chip->chip.pic,
3586                         &pic_irqchip(kvm)->pics[1],
3587                         sizeof(struct kvm_pic_state));
3588                 break;
3589         case KVM_IRQCHIP_IOAPIC:
3590                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3591                 break;
3592         default:
3593                 r = -EINVAL;
3594                 break;
3595         }
3596         return r;
3597 }
3598
3599 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3600 {
3601         int r;
3602
3603         r = 0;
3604         switch (chip->chip_id) {
3605         case KVM_IRQCHIP_PIC_MASTER:
3606                 spin_lock(&pic_irqchip(kvm)->lock);
3607                 memcpy(&pic_irqchip(kvm)->pics[0],
3608                         &chip->chip.pic,
3609                         sizeof(struct kvm_pic_state));
3610                 spin_unlock(&pic_irqchip(kvm)->lock);
3611                 break;
3612         case KVM_IRQCHIP_PIC_SLAVE:
3613                 spin_lock(&pic_irqchip(kvm)->lock);
3614                 memcpy(&pic_irqchip(kvm)->pics[1],
3615                         &chip->chip.pic,
3616                         sizeof(struct kvm_pic_state));
3617                 spin_unlock(&pic_irqchip(kvm)->lock);
3618                 break;
3619         case KVM_IRQCHIP_IOAPIC:
3620                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3621                 break;
3622         default:
3623                 r = -EINVAL;
3624                 break;
3625         }
3626         kvm_pic_update_irq(pic_irqchip(kvm));
3627         return r;
3628 }
3629
3630 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3631 {
3632         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3633
3634         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3635
3636         mutex_lock(&kps->lock);
3637         memcpy(ps, &kps->channels, sizeof(*ps));
3638         mutex_unlock(&kps->lock);
3639         return 0;
3640 }
3641
3642 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3643 {
3644         int i;
3645         struct kvm_pit *pit = kvm->arch.vpit;
3646
3647         mutex_lock(&pit->pit_state.lock);
3648         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3649         for (i = 0; i < 3; i++)
3650                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3651         mutex_unlock(&pit->pit_state.lock);
3652         return 0;
3653 }
3654
3655 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3656 {
3657         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3658         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3659                 sizeof(ps->channels));
3660         ps->flags = kvm->arch.vpit->pit_state.flags;
3661         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3662         memset(&ps->reserved, 0, sizeof(ps->reserved));
3663         return 0;
3664 }
3665
3666 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3667 {
3668         int start = 0;
3669         int i;
3670         u32 prev_legacy, cur_legacy;
3671         struct kvm_pit *pit = kvm->arch.vpit;
3672
3673         mutex_lock(&pit->pit_state.lock);
3674         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3675         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3676         if (!prev_legacy && cur_legacy)
3677                 start = 1;
3678         memcpy(&pit->pit_state.channels, &ps->channels,
3679                sizeof(pit->pit_state.channels));
3680         pit->pit_state.flags = ps->flags;
3681         for (i = 0; i < 3; i++)
3682                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3683                                    start && i == 0);
3684         mutex_unlock(&pit->pit_state.lock);
3685         return 0;
3686 }
3687
3688 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3689                                  struct kvm_reinject_control *control)
3690 {
3691         struct kvm_pit *pit = kvm->arch.vpit;
3692
3693         if (!pit)
3694                 return -ENXIO;
3695
3696         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3697          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3698          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3699          */
3700         mutex_lock(&pit->pit_state.lock);
3701         kvm_pit_set_reinject(pit, control->pit_reinject);
3702         mutex_unlock(&pit->pit_state.lock);
3703
3704         return 0;
3705 }
3706
3707 /**
3708  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3709  * @kvm: kvm instance
3710  * @log: slot id and address to which we copy the log
3711  *
3712  * Steps 1-4 below provide general overview of dirty page logging. See
3713  * kvm_get_dirty_log_protect() function description for additional details.
3714  *
3715  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3716  * always flush the TLB (step 4) even if previous step failed  and the dirty
3717  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3718  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3719  * writes will be marked dirty for next log read.
3720  *
3721  *   1. Take a snapshot of the bit and clear it if needed.
3722  *   2. Write protect the corresponding page.
3723  *   3. Copy the snapshot to the userspace.
3724  *   4. Flush TLB's if needed.
3725  */
3726 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3727 {
3728         bool is_dirty = false;
3729         int r;
3730
3731         mutex_lock(&kvm->slots_lock);
3732
3733         /*
3734          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3735          */
3736         if (kvm_x86_ops->flush_log_dirty)
3737                 kvm_x86_ops->flush_log_dirty(kvm);
3738
3739         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3740
3741         /*
3742          * All the TLBs can be flushed out of mmu lock, see the comments in
3743          * kvm_mmu_slot_remove_write_access().
3744          */
3745         lockdep_assert_held(&kvm->slots_lock);
3746         if (is_dirty)
3747                 kvm_flush_remote_tlbs(kvm);
3748
3749         mutex_unlock(&kvm->slots_lock);
3750         return r;
3751 }
3752
3753 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3754                         bool line_status)
3755 {
3756         if (!irqchip_in_kernel(kvm))
3757                 return -ENXIO;
3758
3759         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3760                                         irq_event->irq, irq_event->level,
3761                                         line_status);
3762         return 0;
3763 }
3764
3765 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3766                                    struct kvm_enable_cap *cap)
3767 {
3768         int r;
3769
3770         if (cap->flags)
3771                 return -EINVAL;
3772
3773         switch (cap->cap) {
3774         case KVM_CAP_DISABLE_QUIRKS:
3775                 kvm->arch.disabled_quirks = cap->args[0];
3776                 r = 0;
3777                 break;
3778         case KVM_CAP_SPLIT_IRQCHIP: {
3779                 mutex_lock(&kvm->lock);
3780                 r = -EINVAL;
3781                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3782                         goto split_irqchip_unlock;
3783                 r = -EEXIST;
3784                 if (irqchip_in_kernel(kvm))
3785                         goto split_irqchip_unlock;
3786                 if (kvm->created_vcpus)
3787                         goto split_irqchip_unlock;
3788                 r = kvm_setup_empty_irq_routing(kvm);
3789                 if (r)
3790                         goto split_irqchip_unlock;
3791                 /* Pairs with irqchip_in_kernel. */
3792                 smp_wmb();
3793                 kvm->arch.irqchip_split = true;
3794                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3795                 r = 0;
3796 split_irqchip_unlock:
3797                 mutex_unlock(&kvm->lock);
3798                 break;
3799         }
3800         default:
3801                 r = -EINVAL;
3802                 break;
3803         }
3804         return r;
3805 }
3806
3807 long kvm_arch_vm_ioctl(struct file *filp,
3808                        unsigned int ioctl, unsigned long arg)
3809 {
3810         struct kvm *kvm = filp->private_data;
3811         void __user *argp = (void __user *)arg;
3812         int r = -ENOTTY;
3813         /*
3814          * This union makes it completely explicit to gcc-3.x
3815          * that these two variables' stack usage should be
3816          * combined, not added together.
3817          */
3818         union {
3819                 struct kvm_pit_state ps;
3820                 struct kvm_pit_state2 ps2;
3821                 struct kvm_pit_config pit_config;
3822         } u;
3823
3824         switch (ioctl) {
3825         case KVM_SET_TSS_ADDR:
3826                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3827                 break;
3828         case KVM_SET_IDENTITY_MAP_ADDR: {
3829                 u64 ident_addr;
3830
3831                 r = -EFAULT;
3832                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3833                         goto out;
3834                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3835                 break;
3836         }
3837         case KVM_SET_NR_MMU_PAGES:
3838                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3839                 break;
3840         case KVM_GET_NR_MMU_PAGES:
3841                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3842                 break;
3843         case KVM_CREATE_IRQCHIP: {
3844                 struct kvm_pic *vpic;
3845
3846                 mutex_lock(&kvm->lock);
3847                 r = -EEXIST;
3848                 if (kvm->arch.vpic)
3849                         goto create_irqchip_unlock;
3850                 r = -EINVAL;
3851                 if (kvm->created_vcpus)
3852                         goto create_irqchip_unlock;
3853                 r = -ENOMEM;
3854                 vpic = kvm_create_pic(kvm);
3855                 if (vpic) {
3856                         r = kvm_ioapic_init(kvm);
3857                         if (r) {
3858                                 mutex_lock(&kvm->slots_lock);
3859                                 kvm_destroy_pic(vpic);
3860                                 mutex_unlock(&kvm->slots_lock);
3861                                 goto create_irqchip_unlock;
3862                         }
3863                 } else
3864                         goto create_irqchip_unlock;
3865                 r = kvm_setup_default_irq_routing(kvm);
3866                 if (r) {
3867                         mutex_lock(&kvm->slots_lock);
3868                         mutex_lock(&kvm->irq_lock);
3869                         kvm_ioapic_destroy(kvm);
3870                         kvm_destroy_pic(vpic);
3871                         mutex_unlock(&kvm->irq_lock);
3872                         mutex_unlock(&kvm->slots_lock);
3873                         goto create_irqchip_unlock;
3874                 }
3875                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3876                 smp_wmb();
3877                 kvm->arch.vpic = vpic;
3878         create_irqchip_unlock:
3879                 mutex_unlock(&kvm->lock);
3880                 break;
3881         }
3882         case KVM_CREATE_PIT:
3883                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3884                 goto create_pit;
3885         case KVM_CREATE_PIT2:
3886                 r = -EFAULT;
3887                 if (copy_from_user(&u.pit_config, argp,
3888                                    sizeof(struct kvm_pit_config)))
3889                         goto out;
3890         create_pit:
3891                 mutex_lock(&kvm->lock);
3892                 r = -EEXIST;
3893                 if (kvm->arch.vpit)
3894                         goto create_pit_unlock;
3895                 r = -ENOMEM;
3896                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3897                 if (kvm->arch.vpit)
3898                         r = 0;
3899         create_pit_unlock:
3900                 mutex_unlock(&kvm->lock);
3901                 break;
3902         case KVM_GET_IRQCHIP: {
3903                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3904                 struct kvm_irqchip *chip;
3905
3906                 chip = memdup_user(argp, sizeof(*chip));
3907                 if (IS_ERR(chip)) {
3908                         r = PTR_ERR(chip);
3909                         goto out;
3910                 }
3911
3912                 r = -ENXIO;
3913                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3914                         goto get_irqchip_out;
3915                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3916                 if (r)
3917                         goto get_irqchip_out;
3918                 r = -EFAULT;
3919                 if (copy_to_user(argp, chip, sizeof *chip))
3920                         goto get_irqchip_out;
3921                 r = 0;
3922         get_irqchip_out:
3923                 kfree(chip);
3924                 break;
3925         }
3926         case KVM_SET_IRQCHIP: {
3927                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3928                 struct kvm_irqchip *chip;
3929
3930                 chip = memdup_user(argp, sizeof(*chip));
3931                 if (IS_ERR(chip)) {
3932                         r = PTR_ERR(chip);
3933                         goto out;
3934                 }
3935
3936                 r = -ENXIO;
3937                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3938                         goto set_irqchip_out;
3939                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3940                 if (r)
3941                         goto set_irqchip_out;
3942                 r = 0;
3943         set_irqchip_out:
3944                 kfree(chip);
3945                 break;
3946         }
3947         case KVM_GET_PIT: {
3948                 r = -EFAULT;
3949                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3950                         goto out;
3951                 r = -ENXIO;
3952                 if (!kvm->arch.vpit)
3953                         goto out;
3954                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3955                 if (r)
3956                         goto out;
3957                 r = -EFAULT;
3958                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3959                         goto out;
3960                 r = 0;
3961                 break;
3962         }
3963         case KVM_SET_PIT: {
3964                 r = -EFAULT;
3965                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3966                         goto out;
3967                 r = -ENXIO;
3968                 if (!kvm->arch.vpit)
3969                         goto out;
3970                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3971                 break;
3972         }
3973         case KVM_GET_PIT2: {
3974                 r = -ENXIO;
3975                 if (!kvm->arch.vpit)
3976                         goto out;
3977                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3978                 if (r)
3979                         goto out;
3980                 r = -EFAULT;
3981                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3982                         goto out;
3983                 r = 0;
3984                 break;
3985         }
3986         case KVM_SET_PIT2: {
3987                 r = -EFAULT;
3988                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3989                         goto out;
3990                 r = -ENXIO;
3991                 if (!kvm->arch.vpit)
3992                         goto out;
3993                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3994                 break;
3995         }
3996         case KVM_REINJECT_CONTROL: {
3997                 struct kvm_reinject_control control;
3998                 r =  -EFAULT;
3999                 if (copy_from_user(&control, argp, sizeof(control)))
4000                         goto out;
4001                 r = kvm_vm_ioctl_reinject(kvm, &control);
4002                 break;
4003         }
4004         case KVM_SET_BOOT_CPU_ID:
4005                 r = 0;
4006                 mutex_lock(&kvm->lock);
4007                 if (kvm->created_vcpus)
4008                         r = -EBUSY;
4009                 else
4010                         kvm->arch.bsp_vcpu_id = arg;
4011                 mutex_unlock(&kvm->lock);
4012                 break;
4013         case KVM_XEN_HVM_CONFIG: {
4014                 r = -EFAULT;
4015                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4016                                    sizeof(struct kvm_xen_hvm_config)))
4017                         goto out;
4018                 r = -EINVAL;
4019                 if (kvm->arch.xen_hvm_config.flags)
4020                         goto out;
4021                 r = 0;
4022                 break;
4023         }
4024         case KVM_SET_CLOCK: {
4025                 struct kvm_clock_data user_ns;
4026                 u64 now_ns;
4027                 s64 delta;
4028
4029                 r = -EFAULT;
4030                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4031                         goto out;
4032
4033                 r = -EINVAL;
4034                 if (user_ns.flags)
4035                         goto out;
4036
4037                 r = 0;
4038                 local_irq_disable();
4039                 now_ns = get_kernel_ns();
4040                 delta = user_ns.clock - now_ns;
4041                 local_irq_enable();
4042                 kvm->arch.kvmclock_offset = delta;
4043                 kvm_gen_update_masterclock(kvm);
4044                 break;
4045         }
4046         case KVM_GET_CLOCK: {
4047                 struct kvm_clock_data user_ns;
4048                 u64 now_ns;
4049
4050                 local_irq_disable();
4051                 now_ns = get_kernel_ns();
4052                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4053                 local_irq_enable();
4054                 user_ns.flags = 0;
4055                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4056
4057                 r = -EFAULT;
4058                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4059                         goto out;
4060                 r = 0;
4061                 break;
4062         }
4063         case KVM_ENABLE_CAP: {
4064                 struct kvm_enable_cap cap;
4065
4066                 r = -EFAULT;
4067                 if (copy_from_user(&cap, argp, sizeof(cap)))
4068                         goto out;
4069                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4070                 break;
4071         }
4072         default:
4073                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4074         }
4075 out:
4076         return r;
4077 }
4078
4079 static void kvm_init_msr_list(void)
4080 {
4081         u32 dummy[2];
4082         unsigned i, j;
4083
4084         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4085                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4086                         continue;
4087
4088                 /*
4089                  * Even MSRs that are valid in the host may not be exposed
4090                  * to the guests in some cases.
4091                  */
4092                 switch (msrs_to_save[i]) {
4093                 case MSR_IA32_BNDCFGS:
4094                         if (!kvm_x86_ops->mpx_supported())
4095                                 continue;
4096                         break;
4097                 case MSR_TSC_AUX:
4098                         if (!kvm_x86_ops->rdtscp_supported())
4099                                 continue;
4100                         break;
4101                 default:
4102                         break;
4103                 }
4104
4105                 if (j < i)
4106                         msrs_to_save[j] = msrs_to_save[i];
4107                 j++;
4108         }
4109         num_msrs_to_save = j;
4110
4111         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4112                 switch (emulated_msrs[i]) {
4113                 case MSR_IA32_SMBASE:
4114                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4115                                 continue;
4116                         break;
4117                 default:
4118                         break;
4119                 }
4120
4121                 if (j < i)
4122                         emulated_msrs[j] = emulated_msrs[i];
4123                 j++;
4124         }
4125         num_emulated_msrs = j;
4126 }
4127
4128 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4129                            const void *v)
4130 {
4131         int handled = 0;
4132         int n;
4133
4134         do {
4135                 n = min(len, 8);
4136                 if (!(lapic_in_kernel(vcpu) &&
4137                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4138                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4139                         break;
4140                 handled += n;
4141                 addr += n;
4142                 len -= n;
4143                 v += n;
4144         } while (len);
4145
4146         return handled;
4147 }
4148
4149 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4150 {
4151         int handled = 0;
4152         int n;
4153
4154         do {
4155                 n = min(len, 8);
4156                 if (!(lapic_in_kernel(vcpu) &&
4157                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4158                                          addr, n, v))
4159                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4160                         break;
4161                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4162                 handled += n;
4163                 addr += n;
4164                 len -= n;
4165                 v += n;
4166         } while (len);
4167
4168         return handled;
4169 }
4170
4171 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4172                         struct kvm_segment *var, int seg)
4173 {
4174         kvm_x86_ops->set_segment(vcpu, var, seg);
4175 }
4176
4177 void kvm_get_segment(struct kvm_vcpu *vcpu,
4178                      struct kvm_segment *var, int seg)
4179 {
4180         kvm_x86_ops->get_segment(vcpu, var, seg);
4181 }
4182
4183 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4184                            struct x86_exception *exception)
4185 {
4186         gpa_t t_gpa;
4187
4188         BUG_ON(!mmu_is_nested(vcpu));
4189
4190         /* NPT walks are always user-walks */
4191         access |= PFERR_USER_MASK;
4192         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4193
4194         return t_gpa;
4195 }
4196
4197 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4198                               struct x86_exception *exception)
4199 {
4200         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4201         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4202 }
4203
4204  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4205                                 struct x86_exception *exception)
4206 {
4207         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4208         access |= PFERR_FETCH_MASK;
4209         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4210 }
4211
4212 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4213                                struct x86_exception *exception)
4214 {
4215         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4216         access |= PFERR_WRITE_MASK;
4217         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4218 }
4219
4220 /* uses this to access any guest's mapped memory without checking CPL */
4221 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4222                                 struct x86_exception *exception)
4223 {
4224         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4225 }
4226
4227 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4228                                       struct kvm_vcpu *vcpu, u32 access,
4229                                       struct x86_exception *exception)
4230 {
4231         void *data = val;
4232         int r = X86EMUL_CONTINUE;
4233
4234         while (bytes) {
4235                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4236                                                             exception);
4237                 unsigned offset = addr & (PAGE_SIZE-1);
4238                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4239                 int ret;
4240
4241                 if (gpa == UNMAPPED_GVA)
4242                         return X86EMUL_PROPAGATE_FAULT;
4243                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4244                                                offset, toread);
4245                 if (ret < 0) {
4246                         r = X86EMUL_IO_NEEDED;
4247                         goto out;
4248                 }
4249
4250                 bytes -= toread;
4251                 data += toread;
4252                 addr += toread;
4253         }
4254 out:
4255         return r;
4256 }
4257
4258 /* used for instruction fetching */
4259 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4260                                 gva_t addr, void *val, unsigned int bytes,
4261                                 struct x86_exception *exception)
4262 {
4263         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4264         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4265         unsigned offset;
4266         int ret;
4267
4268         /* Inline kvm_read_guest_virt_helper for speed.  */
4269         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4270                                                     exception);
4271         if (unlikely(gpa == UNMAPPED_GVA))
4272                 return X86EMUL_PROPAGATE_FAULT;
4273
4274         offset = addr & (PAGE_SIZE-1);
4275         if (WARN_ON(offset + bytes > PAGE_SIZE))
4276                 bytes = (unsigned)PAGE_SIZE - offset;
4277         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4278                                        offset, bytes);
4279         if (unlikely(ret < 0))
4280                 return X86EMUL_IO_NEEDED;
4281
4282         return X86EMUL_CONTINUE;
4283 }
4284
4285 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4286                                gva_t addr, void *val, unsigned int bytes,
4287                                struct x86_exception *exception)
4288 {
4289         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4290         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4291
4292         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4293                                           exception);
4294 }
4295 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4296
4297 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4298                                       gva_t addr, void *val, unsigned int bytes,
4299                                       struct x86_exception *exception)
4300 {
4301         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4302         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4303 }
4304
4305 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4306                 unsigned long addr, void *val, unsigned int bytes)
4307 {
4308         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4309         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4310
4311         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4312 }
4313
4314 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4315                                        gva_t addr, void *val,
4316                                        unsigned int bytes,
4317                                        struct x86_exception *exception)
4318 {
4319         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4320         void *data = val;
4321         int r = X86EMUL_CONTINUE;
4322
4323         while (bytes) {
4324                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4325                                                              PFERR_WRITE_MASK,
4326                                                              exception);
4327                 unsigned offset = addr & (PAGE_SIZE-1);
4328                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4329                 int ret;
4330
4331                 if (gpa == UNMAPPED_GVA)
4332                         return X86EMUL_PROPAGATE_FAULT;
4333                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4334                 if (ret < 0) {
4335                         r = X86EMUL_IO_NEEDED;
4336                         goto out;
4337                 }
4338
4339                 bytes -= towrite;
4340                 data += towrite;
4341                 addr += towrite;
4342         }
4343 out:
4344         return r;
4345 }
4346 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4347
4348 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4349                                 gpa_t *gpa, struct x86_exception *exception,
4350                                 bool write)
4351 {
4352         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4353                 | (write ? PFERR_WRITE_MASK : 0);
4354
4355         /*
4356          * currently PKRU is only applied to ept enabled guest so
4357          * there is no pkey in EPT page table for L1 guest or EPT
4358          * shadow page table for L2 guest.
4359          */
4360         if (vcpu_match_mmio_gva(vcpu, gva)
4361             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4362                                  vcpu->arch.access, 0, access)) {
4363                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4364                                         (gva & (PAGE_SIZE - 1));
4365                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4366                 return 1;
4367         }
4368
4369         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4370
4371         if (*gpa == UNMAPPED_GVA)
4372                 return -1;
4373
4374         /* For APIC access vmexit */
4375         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4376                 return 1;
4377
4378         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4379                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4380                 return 1;
4381         }
4382
4383         return 0;
4384 }
4385
4386 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4387                         const void *val, int bytes)
4388 {
4389         int ret;
4390
4391         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4392         if (ret < 0)
4393                 return 0;
4394         kvm_page_track_write(vcpu, gpa, val, bytes);
4395         return 1;
4396 }
4397
4398 struct read_write_emulator_ops {
4399         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4400                                   int bytes);
4401         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4402                                   void *val, int bytes);
4403         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4404                                int bytes, void *val);
4405         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4406                                     void *val, int bytes);
4407         bool write;
4408 };
4409
4410 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4411 {
4412         if (vcpu->mmio_read_completed) {
4413                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4414                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4415                 vcpu->mmio_read_completed = 0;
4416                 return 1;
4417         }
4418
4419         return 0;
4420 }
4421
4422 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4423                         void *val, int bytes)
4424 {
4425         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4426 }
4427
4428 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4429                          void *val, int bytes)
4430 {
4431         return emulator_write_phys(vcpu, gpa, val, bytes);
4432 }
4433
4434 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4435 {
4436         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4437         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4438 }
4439
4440 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4441                           void *val, int bytes)
4442 {
4443         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4444         return X86EMUL_IO_NEEDED;
4445 }
4446
4447 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4448                            void *val, int bytes)
4449 {
4450         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4451
4452         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4453         return X86EMUL_CONTINUE;
4454 }
4455
4456 static const struct read_write_emulator_ops read_emultor = {
4457         .read_write_prepare = read_prepare,
4458         .read_write_emulate = read_emulate,
4459         .read_write_mmio = vcpu_mmio_read,
4460         .read_write_exit_mmio = read_exit_mmio,
4461 };
4462
4463 static const struct read_write_emulator_ops write_emultor = {
4464         .read_write_emulate = write_emulate,
4465         .read_write_mmio = write_mmio,
4466         .read_write_exit_mmio = write_exit_mmio,
4467         .write = true,
4468 };
4469
4470 static int emulator_read_write_onepage(unsigned long addr, void *val,
4471                                        unsigned int bytes,
4472                                        struct x86_exception *exception,
4473                                        struct kvm_vcpu *vcpu,
4474                                        const struct read_write_emulator_ops *ops)
4475 {
4476         gpa_t gpa;
4477         int handled, ret;
4478         bool write = ops->write;
4479         struct kvm_mmio_fragment *frag;
4480
4481         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4482
4483         if (ret < 0)
4484                 return X86EMUL_PROPAGATE_FAULT;
4485
4486         /* For APIC access vmexit */
4487         if (ret)
4488                 goto mmio;
4489
4490         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4491                 return X86EMUL_CONTINUE;
4492
4493 mmio:
4494         /*
4495          * Is this MMIO handled locally?
4496          */
4497         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4498         if (handled == bytes)
4499                 return X86EMUL_CONTINUE;
4500
4501         gpa += handled;
4502         bytes -= handled;
4503         val += handled;
4504
4505         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4506         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4507         frag->gpa = gpa;
4508         frag->data = val;
4509         frag->len = bytes;
4510         return X86EMUL_CONTINUE;
4511 }
4512
4513 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4514                         unsigned long addr,
4515                         void *val, unsigned int bytes,
4516                         struct x86_exception *exception,
4517                         const struct read_write_emulator_ops *ops)
4518 {
4519         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4520         gpa_t gpa;
4521         int rc;
4522
4523         if (ops->read_write_prepare &&
4524                   ops->read_write_prepare(vcpu, val, bytes))
4525                 return X86EMUL_CONTINUE;
4526
4527         vcpu->mmio_nr_fragments = 0;
4528
4529         /* Crossing a page boundary? */
4530         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4531                 int now;
4532
4533                 now = -addr & ~PAGE_MASK;
4534                 rc = emulator_read_write_onepage(addr, val, now, exception,
4535                                                  vcpu, ops);
4536
4537                 if (rc != X86EMUL_CONTINUE)
4538                         return rc;
4539                 addr += now;
4540                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4541                         addr = (u32)addr;
4542                 val += now;
4543                 bytes -= now;
4544         }
4545
4546         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4547                                          vcpu, ops);
4548         if (rc != X86EMUL_CONTINUE)
4549                 return rc;
4550
4551         if (!vcpu->mmio_nr_fragments)
4552                 return rc;
4553
4554         gpa = vcpu->mmio_fragments[0].gpa;
4555
4556         vcpu->mmio_needed = 1;
4557         vcpu->mmio_cur_fragment = 0;
4558
4559         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4560         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4561         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4562         vcpu->run->mmio.phys_addr = gpa;
4563
4564         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4565 }
4566
4567 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4568                                   unsigned long addr,
4569                                   void *val,
4570                                   unsigned int bytes,
4571                                   struct x86_exception *exception)
4572 {
4573         return emulator_read_write(ctxt, addr, val, bytes,
4574                                    exception, &read_emultor);
4575 }
4576
4577 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4578                             unsigned long addr,
4579                             const void *val,
4580                             unsigned int bytes,
4581                             struct x86_exception *exception)
4582 {
4583         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4584                                    exception, &write_emultor);
4585 }
4586
4587 #define CMPXCHG_TYPE(t, ptr, old, new) \
4588         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4589
4590 #ifdef CONFIG_X86_64
4591 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4592 #else
4593 #  define CMPXCHG64(ptr, old, new) \
4594         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4595 #endif
4596
4597 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4598                                      unsigned long addr,
4599                                      const void *old,
4600                                      const void *new,
4601                                      unsigned int bytes,
4602                                      struct x86_exception *exception)
4603 {
4604         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4605         gpa_t gpa;
4606         struct page *page;
4607         char *kaddr;
4608         bool exchanged;
4609
4610         /* guests cmpxchg8b have to be emulated atomically */
4611         if (bytes > 8 || (bytes & (bytes - 1)))
4612                 goto emul_write;
4613
4614         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4615
4616         if (gpa == UNMAPPED_GVA ||
4617             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4618                 goto emul_write;
4619
4620         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4621                 goto emul_write;
4622
4623         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4624         if (is_error_page(page))
4625                 goto emul_write;
4626
4627         kaddr = kmap_atomic(page);
4628         kaddr += offset_in_page(gpa);
4629         switch (bytes) {
4630         case 1:
4631                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4632                 break;
4633         case 2:
4634                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4635                 break;
4636         case 4:
4637                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4638                 break;
4639         case 8:
4640                 exchanged = CMPXCHG64(kaddr, old, new);
4641                 break;
4642         default:
4643                 BUG();
4644         }
4645         kunmap_atomic(kaddr);
4646         kvm_release_page_dirty(page);
4647
4648         if (!exchanged)
4649                 return X86EMUL_CMPXCHG_FAILED;
4650
4651         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4652         kvm_page_track_write(vcpu, gpa, new, bytes);
4653
4654         return X86EMUL_CONTINUE;
4655
4656 emul_write:
4657         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4658
4659         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4660 }
4661
4662 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4663 {
4664         /* TODO: String I/O for in kernel device */
4665         int r;
4666
4667         if (vcpu->arch.pio.in)
4668                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4669                                     vcpu->arch.pio.size, pd);
4670         else
4671                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4672                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4673                                      pd);
4674         return r;
4675 }
4676
4677 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4678                                unsigned short port, void *val,
4679                                unsigned int count, bool in)
4680 {
4681         vcpu->arch.pio.port = port;
4682         vcpu->arch.pio.in = in;
4683         vcpu->arch.pio.count  = count;
4684         vcpu->arch.pio.size = size;
4685
4686         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4687                 vcpu->arch.pio.count = 0;
4688                 return 1;
4689         }
4690
4691         vcpu->run->exit_reason = KVM_EXIT_IO;
4692         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4693         vcpu->run->io.size = size;
4694         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4695         vcpu->run->io.count = count;
4696         vcpu->run->io.port = port;
4697
4698         return 0;
4699 }
4700
4701 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4702                                     int size, unsigned short port, void *val,
4703                                     unsigned int count)
4704 {
4705         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4706         int ret;
4707
4708         if (vcpu->arch.pio.count)
4709                 goto data_avail;
4710
4711         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4712         if (ret) {
4713 data_avail:
4714                 memcpy(val, vcpu->arch.pio_data, size * count);
4715                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4716                 vcpu->arch.pio.count = 0;
4717                 return 1;
4718         }
4719
4720         return 0;
4721 }
4722
4723 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4724                                      int size, unsigned short port,
4725                                      const void *val, unsigned int count)
4726 {
4727         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4728
4729         memcpy(vcpu->arch.pio_data, val, size * count);
4730         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4731         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4732 }
4733
4734 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4735 {
4736         return kvm_x86_ops->get_segment_base(vcpu, seg);
4737 }
4738
4739 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4740 {
4741         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4742 }
4743
4744 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4745 {
4746         if (!need_emulate_wbinvd(vcpu))
4747                 return X86EMUL_CONTINUE;
4748
4749         if (kvm_x86_ops->has_wbinvd_exit()) {
4750                 int cpu = get_cpu();
4751
4752                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4753                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4754                                 wbinvd_ipi, NULL, 1);
4755                 put_cpu();
4756                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4757         } else
4758                 wbinvd();
4759         return X86EMUL_CONTINUE;
4760 }
4761
4762 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4763 {
4764         kvm_x86_ops->skip_emulated_instruction(vcpu);
4765         return kvm_emulate_wbinvd_noskip(vcpu);
4766 }
4767 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4768
4769
4770
4771 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4772 {
4773         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4774 }
4775
4776 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4777                            unsigned long *dest)
4778 {
4779         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4780 }
4781
4782 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4783                            unsigned long value)
4784 {
4785
4786         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4787 }
4788
4789 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4790 {
4791         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4792 }
4793
4794 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4795 {
4796         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4797         unsigned long value;
4798
4799         switch (cr) {
4800         case 0:
4801                 value = kvm_read_cr0(vcpu);
4802                 break;
4803         case 2:
4804                 value = vcpu->arch.cr2;
4805                 break;
4806         case 3:
4807                 value = kvm_read_cr3(vcpu);
4808                 break;
4809         case 4:
4810                 value = kvm_read_cr4(vcpu);
4811                 break;
4812         case 8:
4813                 value = kvm_get_cr8(vcpu);
4814                 break;
4815         default:
4816                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4817                 return 0;
4818         }
4819
4820         return value;
4821 }
4822
4823 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4824 {
4825         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4826         int res = 0;
4827
4828         switch (cr) {
4829         case 0:
4830                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4831                 break;
4832         case 2:
4833                 vcpu->arch.cr2 = val;
4834                 break;
4835         case 3:
4836                 res = kvm_set_cr3(vcpu, val);
4837                 break;
4838         case 4:
4839                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4840                 break;
4841         case 8:
4842                 res = kvm_set_cr8(vcpu, val);
4843                 break;
4844         default:
4845                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4846                 res = -1;
4847         }
4848
4849         return res;
4850 }
4851
4852 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4853 {
4854         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4855 }
4856
4857 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4858 {
4859         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4860 }
4861
4862 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4863 {
4864         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4865 }
4866
4867 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4868 {
4869         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4870 }
4871
4872 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4873 {
4874         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4875 }
4876
4877 static unsigned long emulator_get_cached_segment_base(
4878         struct x86_emulate_ctxt *ctxt, int seg)
4879 {
4880         return get_segment_base(emul_to_vcpu(ctxt), seg);
4881 }
4882
4883 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4884                                  struct desc_struct *desc, u32 *base3,
4885                                  int seg)
4886 {
4887         struct kvm_segment var;
4888
4889         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4890         *selector = var.selector;
4891
4892         if (var.unusable) {
4893                 memset(desc, 0, sizeof(*desc));
4894                 return false;
4895         }
4896
4897         if (var.g)
4898                 var.limit >>= 12;
4899         set_desc_limit(desc, var.limit);
4900         set_desc_base(desc, (unsigned long)var.base);
4901 #ifdef CONFIG_X86_64
4902         if (base3)
4903                 *base3 = var.base >> 32;
4904 #endif
4905         desc->type = var.type;
4906         desc->s = var.s;
4907         desc->dpl = var.dpl;
4908         desc->p = var.present;
4909         desc->avl = var.avl;
4910         desc->l = var.l;
4911         desc->d = var.db;
4912         desc->g = var.g;
4913
4914         return true;
4915 }
4916
4917 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4918                                  struct desc_struct *desc, u32 base3,
4919                                  int seg)
4920 {
4921         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4922         struct kvm_segment var;
4923
4924         var.selector = selector;
4925         var.base = get_desc_base(desc);
4926 #ifdef CONFIG_X86_64
4927         var.base |= ((u64)base3) << 32;
4928 #endif
4929         var.limit = get_desc_limit(desc);
4930         if (desc->g)
4931                 var.limit = (var.limit << 12) | 0xfff;
4932         var.type = desc->type;
4933         var.dpl = desc->dpl;
4934         var.db = desc->d;
4935         var.s = desc->s;
4936         var.l = desc->l;
4937         var.g = desc->g;
4938         var.avl = desc->avl;
4939         var.present = desc->p;
4940         var.unusable = !var.present;
4941         var.padding = 0;
4942
4943         kvm_set_segment(vcpu, &var, seg);
4944         return;
4945 }
4946
4947 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4948                             u32 msr_index, u64 *pdata)
4949 {
4950         struct msr_data msr;
4951         int r;
4952
4953         msr.index = msr_index;
4954         msr.host_initiated = false;
4955         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4956         if (r)
4957                 return r;
4958
4959         *pdata = msr.data;
4960         return 0;
4961 }
4962
4963 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4964                             u32 msr_index, u64 data)
4965 {
4966         struct msr_data msr;
4967
4968         msr.data = data;
4969         msr.index = msr_index;
4970         msr.host_initiated = false;
4971         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4972 }
4973
4974 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4975 {
4976         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4977
4978         return vcpu->arch.smbase;
4979 }
4980
4981 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4982 {
4983         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4984
4985         vcpu->arch.smbase = smbase;
4986 }
4987
4988 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4989                               u32 pmc)
4990 {
4991         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4992 }
4993
4994 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4995                              u32 pmc, u64 *pdata)
4996 {
4997         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4998 }
4999
5000 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5001 {
5002         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5003 }
5004
5005 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5006 {
5007         preempt_disable();
5008         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5009         /*
5010          * CR0.TS may reference the host fpu state, not the guest fpu state,
5011          * so it may be clear at this point.
5012          */
5013         clts();
5014 }
5015
5016 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5017 {
5018         preempt_enable();
5019 }
5020
5021 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5022                               struct x86_instruction_info *info,
5023                               enum x86_intercept_stage stage)
5024 {
5025         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5026 }
5027
5028 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5029                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5030 {
5031         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5032 }
5033
5034 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5035 {
5036         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5037 }
5038
5039 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5040 {
5041         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5042 }
5043
5044 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5045 {
5046         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5047 }
5048
5049 static const struct x86_emulate_ops emulate_ops = {
5050         .read_gpr            = emulator_read_gpr,
5051         .write_gpr           = emulator_write_gpr,
5052         .read_std            = kvm_read_guest_virt_system,
5053         .write_std           = kvm_write_guest_virt_system,
5054         .read_phys           = kvm_read_guest_phys_system,
5055         .fetch               = kvm_fetch_guest_virt,
5056         .read_emulated       = emulator_read_emulated,
5057         .write_emulated      = emulator_write_emulated,
5058         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5059         .invlpg              = emulator_invlpg,
5060         .pio_in_emulated     = emulator_pio_in_emulated,
5061         .pio_out_emulated    = emulator_pio_out_emulated,
5062         .get_segment         = emulator_get_segment,
5063         .set_segment         = emulator_set_segment,
5064         .get_cached_segment_base = emulator_get_cached_segment_base,
5065         .get_gdt             = emulator_get_gdt,
5066         .get_idt             = emulator_get_idt,
5067         .set_gdt             = emulator_set_gdt,
5068         .set_idt             = emulator_set_idt,
5069         .get_cr              = emulator_get_cr,
5070         .set_cr              = emulator_set_cr,
5071         .cpl                 = emulator_get_cpl,
5072         .get_dr              = emulator_get_dr,
5073         .set_dr              = emulator_set_dr,
5074         .get_smbase          = emulator_get_smbase,
5075         .set_smbase          = emulator_set_smbase,
5076         .set_msr             = emulator_set_msr,
5077         .get_msr             = emulator_get_msr,
5078         .check_pmc           = emulator_check_pmc,
5079         .read_pmc            = emulator_read_pmc,
5080         .halt                = emulator_halt,
5081         .wbinvd              = emulator_wbinvd,
5082         .fix_hypercall       = emulator_fix_hypercall,
5083         .get_fpu             = emulator_get_fpu,
5084         .put_fpu             = emulator_put_fpu,
5085         .intercept           = emulator_intercept,
5086         .get_cpuid           = emulator_get_cpuid,
5087         .set_nmi_mask        = emulator_set_nmi_mask,
5088 };
5089
5090 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5091 {
5092         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5093         /*
5094          * an sti; sti; sequence only disable interrupts for the first
5095          * instruction. So, if the last instruction, be it emulated or
5096          * not, left the system with the INT_STI flag enabled, it
5097          * means that the last instruction is an sti. We should not
5098          * leave the flag on in this case. The same goes for mov ss
5099          */
5100         if (int_shadow & mask)
5101                 mask = 0;
5102         if (unlikely(int_shadow || mask)) {
5103                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5104                 if (!mask)
5105                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5106         }
5107 }
5108
5109 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5110 {
5111         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5112         if (ctxt->exception.vector == PF_VECTOR)
5113                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5114
5115         if (ctxt->exception.error_code_valid)
5116                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5117                                       ctxt->exception.error_code);
5118         else
5119                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5120         return false;
5121 }
5122
5123 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5124 {
5125         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5126         int cs_db, cs_l;
5127
5128         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5129
5130         ctxt->eflags = kvm_get_rflags(vcpu);
5131         ctxt->eip = kvm_rip_read(vcpu);
5132         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5133                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5134                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5135                      cs_db                              ? X86EMUL_MODE_PROT32 :
5136                                                           X86EMUL_MODE_PROT16;
5137         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5138         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5139         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5140         ctxt->emul_flags = vcpu->arch.hflags;
5141
5142         init_decode_cache(ctxt);
5143         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5144 }
5145
5146 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5147 {
5148         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5149         int ret;
5150
5151         init_emulate_ctxt(vcpu);
5152
5153         ctxt->op_bytes = 2;
5154         ctxt->ad_bytes = 2;
5155         ctxt->_eip = ctxt->eip + inc_eip;
5156         ret = emulate_int_real(ctxt, irq);
5157
5158         if (ret != X86EMUL_CONTINUE)
5159                 return EMULATE_FAIL;
5160
5161         ctxt->eip = ctxt->_eip;
5162         kvm_rip_write(vcpu, ctxt->eip);
5163         kvm_set_rflags(vcpu, ctxt->eflags);
5164
5165         if (irq == NMI_VECTOR)
5166                 vcpu->arch.nmi_pending = 0;
5167         else
5168                 vcpu->arch.interrupt.pending = false;
5169
5170         return EMULATE_DONE;
5171 }
5172 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5173
5174 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5175 {
5176         int r = EMULATE_DONE;
5177
5178         ++vcpu->stat.insn_emulation_fail;
5179         trace_kvm_emulate_insn_failed(vcpu);
5180         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5181                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5182                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5183                 vcpu->run->internal.ndata = 0;
5184                 r = EMULATE_FAIL;
5185         }
5186         kvm_queue_exception(vcpu, UD_VECTOR);
5187
5188         return r;
5189 }
5190
5191 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5192                                   bool write_fault_to_shadow_pgtable,
5193                                   int emulation_type)
5194 {
5195         gpa_t gpa = cr2;
5196         kvm_pfn_t pfn;
5197
5198         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5199                 return false;
5200
5201         if (!vcpu->arch.mmu.direct_map) {
5202                 /*
5203                  * Write permission should be allowed since only
5204                  * write access need to be emulated.
5205                  */
5206                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5207
5208                 /*
5209                  * If the mapping is invalid in guest, let cpu retry
5210                  * it to generate fault.
5211                  */
5212                 if (gpa == UNMAPPED_GVA)
5213                         return true;
5214         }
5215
5216         /*
5217          * Do not retry the unhandleable instruction if it faults on the
5218          * readonly host memory, otherwise it will goto a infinite loop:
5219          * retry instruction -> write #PF -> emulation fail -> retry
5220          * instruction -> ...
5221          */
5222         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5223
5224         /*
5225          * If the instruction failed on the error pfn, it can not be fixed,
5226          * report the error to userspace.
5227          */
5228         if (is_error_noslot_pfn(pfn))
5229                 return false;
5230
5231         kvm_release_pfn_clean(pfn);
5232
5233         /* The instructions are well-emulated on direct mmu. */
5234         if (vcpu->arch.mmu.direct_map) {
5235                 unsigned int indirect_shadow_pages;
5236
5237                 spin_lock(&vcpu->kvm->mmu_lock);
5238                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5239                 spin_unlock(&vcpu->kvm->mmu_lock);
5240
5241                 if (indirect_shadow_pages)
5242                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5243
5244                 return true;
5245         }
5246
5247         /*
5248          * if emulation was due to access to shadowed page table
5249          * and it failed try to unshadow page and re-enter the
5250          * guest to let CPU execute the instruction.
5251          */
5252         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5253
5254         /*
5255          * If the access faults on its page table, it can not
5256          * be fixed by unprotecting shadow page and it should
5257          * be reported to userspace.
5258          */
5259         return !write_fault_to_shadow_pgtable;
5260 }
5261
5262 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5263                               unsigned long cr2,  int emulation_type)
5264 {
5265         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5266         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5267
5268         last_retry_eip = vcpu->arch.last_retry_eip;
5269         last_retry_addr = vcpu->arch.last_retry_addr;
5270
5271         /*
5272          * If the emulation is caused by #PF and it is non-page_table
5273          * writing instruction, it means the VM-EXIT is caused by shadow
5274          * page protected, we can zap the shadow page and retry this
5275          * instruction directly.
5276          *
5277          * Note: if the guest uses a non-page-table modifying instruction
5278          * on the PDE that points to the instruction, then we will unmap
5279          * the instruction and go to an infinite loop. So, we cache the
5280          * last retried eip and the last fault address, if we meet the eip
5281          * and the address again, we can break out of the potential infinite
5282          * loop.
5283          */
5284         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5285
5286         if (!(emulation_type & EMULTYPE_RETRY))
5287                 return false;
5288
5289         if (x86_page_table_writing_insn(ctxt))
5290                 return false;
5291
5292         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5293                 return false;
5294
5295         vcpu->arch.last_retry_eip = ctxt->eip;
5296         vcpu->arch.last_retry_addr = cr2;
5297
5298         if (!vcpu->arch.mmu.direct_map)
5299                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5300
5301         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5302
5303         return true;
5304 }
5305
5306 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5307 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5308
5309 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5310 {
5311         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5312                 /* This is a good place to trace that we are exiting SMM.  */
5313                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5314
5315                 /* Process a latched INIT or SMI, if any.  */
5316                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5317         }
5318
5319         kvm_mmu_reset_context(vcpu);
5320 }
5321
5322 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5323 {
5324         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5325
5326         vcpu->arch.hflags = emul_flags;
5327
5328         if (changed & HF_SMM_MASK)
5329                 kvm_smm_changed(vcpu);
5330 }
5331
5332 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5333                                 unsigned long *db)
5334 {
5335         u32 dr6 = 0;
5336         int i;
5337         u32 enable, rwlen;
5338
5339         enable = dr7;
5340         rwlen = dr7 >> 16;
5341         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5342                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5343                         dr6 |= (1 << i);
5344         return dr6;
5345 }
5346
5347 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5348 {
5349         struct kvm_run *kvm_run = vcpu->run;
5350
5351         /*
5352          * rflags is the old, "raw" value of the flags.  The new value has
5353          * not been saved yet.
5354          *
5355          * This is correct even for TF set by the guest, because "the
5356          * processor will not generate this exception after the instruction
5357          * that sets the TF flag".
5358          */
5359         if (unlikely(rflags & X86_EFLAGS_TF)) {
5360                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5361                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5362                                                   DR6_RTM;
5363                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5364                         kvm_run->debug.arch.exception = DB_VECTOR;
5365                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5366                         *r = EMULATE_USER_EXIT;
5367                 } else {
5368                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5369                         /*
5370                          * "Certain debug exceptions may clear bit 0-3.  The
5371                          * remaining contents of the DR6 register are never
5372                          * cleared by the processor".
5373                          */
5374                         vcpu->arch.dr6 &= ~15;
5375                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5376                         kvm_queue_exception(vcpu, DB_VECTOR);
5377                 }
5378         }
5379 }
5380
5381 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5382 {
5383         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5384             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5385                 struct kvm_run *kvm_run = vcpu->run;
5386                 unsigned long eip = kvm_get_linear_rip(vcpu);
5387                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5388                                            vcpu->arch.guest_debug_dr7,
5389                                            vcpu->arch.eff_db);
5390
5391                 if (dr6 != 0) {
5392                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5393                         kvm_run->debug.arch.pc = eip;
5394                         kvm_run->debug.arch.exception = DB_VECTOR;
5395                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5396                         *r = EMULATE_USER_EXIT;
5397                         return true;
5398                 }
5399         }
5400
5401         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5402             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5403                 unsigned long eip = kvm_get_linear_rip(vcpu);
5404                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5405                                            vcpu->arch.dr7,
5406                                            vcpu->arch.db);
5407
5408                 if (dr6 != 0) {
5409                         vcpu->arch.dr6 &= ~15;
5410                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5411                         kvm_queue_exception(vcpu, DB_VECTOR);
5412                         *r = EMULATE_DONE;
5413                         return true;
5414                 }
5415         }
5416
5417         return false;
5418 }
5419
5420 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5421                             unsigned long cr2,
5422                             int emulation_type,
5423                             void *insn,
5424                             int insn_len)
5425 {
5426         int r;
5427         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5428         bool writeback = true;
5429         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5430
5431         /*
5432          * Clear write_fault_to_shadow_pgtable here to ensure it is
5433          * never reused.
5434          */
5435         vcpu->arch.write_fault_to_shadow_pgtable = false;
5436         kvm_clear_exception_queue(vcpu);
5437
5438         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5439                 init_emulate_ctxt(vcpu);
5440
5441                 /*
5442                  * We will reenter on the same instruction since
5443                  * we do not set complete_userspace_io.  This does not
5444                  * handle watchpoints yet, those would be handled in
5445                  * the emulate_ops.
5446                  */
5447                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5448                         return r;
5449
5450                 ctxt->interruptibility = 0;
5451                 ctxt->have_exception = false;
5452                 ctxt->exception.vector = -1;
5453                 ctxt->perm_ok = false;
5454
5455                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5456
5457                 r = x86_decode_insn(ctxt, insn, insn_len);
5458
5459                 trace_kvm_emulate_insn_start(vcpu);
5460                 ++vcpu->stat.insn_emulation;
5461                 if (r != EMULATION_OK)  {
5462                         if (emulation_type & EMULTYPE_TRAP_UD)
5463                                 return EMULATE_FAIL;
5464                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5465                                                 emulation_type))
5466                                 return EMULATE_DONE;
5467                         if (emulation_type & EMULTYPE_SKIP)
5468                                 return EMULATE_FAIL;
5469                         return handle_emulation_failure(vcpu);
5470                 }
5471         }
5472
5473         if (emulation_type & EMULTYPE_SKIP) {
5474                 kvm_rip_write(vcpu, ctxt->_eip);
5475                 if (ctxt->eflags & X86_EFLAGS_RF)
5476                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5477                 return EMULATE_DONE;
5478         }
5479
5480         if (retry_instruction(ctxt, cr2, emulation_type))
5481                 return EMULATE_DONE;
5482
5483         /* this is needed for vmware backdoor interface to work since it
5484            changes registers values  during IO operation */
5485         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5486                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5487                 emulator_invalidate_register_cache(ctxt);
5488         }
5489
5490 restart:
5491         r = x86_emulate_insn(ctxt);
5492
5493         if (r == EMULATION_INTERCEPTED)
5494                 return EMULATE_DONE;
5495
5496         if (r == EMULATION_FAILED) {
5497                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5498                                         emulation_type))
5499                         return EMULATE_DONE;
5500
5501                 return handle_emulation_failure(vcpu);
5502         }
5503
5504         if (ctxt->have_exception) {
5505                 r = EMULATE_DONE;
5506                 if (inject_emulated_exception(vcpu))
5507                         return r;
5508         } else if (vcpu->arch.pio.count) {
5509                 if (!vcpu->arch.pio.in) {
5510                         /* FIXME: return into emulator if single-stepping.  */
5511                         vcpu->arch.pio.count = 0;
5512                 } else {
5513                         writeback = false;
5514                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5515                 }
5516                 r = EMULATE_USER_EXIT;
5517         } else if (vcpu->mmio_needed) {
5518                 if (!vcpu->mmio_is_write)
5519                         writeback = false;
5520                 r = EMULATE_USER_EXIT;
5521                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5522         } else if (r == EMULATION_RESTART)
5523                 goto restart;
5524         else
5525                 r = EMULATE_DONE;
5526
5527         if (writeback) {
5528                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5529                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5530                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5531                 if (vcpu->arch.hflags != ctxt->emul_flags)
5532                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5533                 kvm_rip_write(vcpu, ctxt->eip);
5534                 if (r == EMULATE_DONE)
5535                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5536                 if (!ctxt->have_exception ||
5537                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5538                         __kvm_set_rflags(vcpu, ctxt->eflags);
5539
5540                 /*
5541                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5542                  * do nothing, and it will be requested again as soon as
5543                  * the shadow expires.  But we still need to check here,
5544                  * because POPF has no interrupt shadow.
5545                  */
5546                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5547                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5548         } else
5549                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5550
5551         return r;
5552 }
5553 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5554
5555 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5556 {
5557         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5558         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5559                                             size, port, &val, 1);
5560         /* do not return to emulator after return from userspace */
5561         vcpu->arch.pio.count = 0;
5562         return ret;
5563 }
5564 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5565
5566 static void tsc_bad(void *info)
5567 {
5568         __this_cpu_write(cpu_tsc_khz, 0);
5569 }
5570
5571 static void tsc_khz_changed(void *data)
5572 {
5573         struct cpufreq_freqs *freq = data;
5574         unsigned long khz = 0;
5575
5576         if (data)
5577                 khz = freq->new;
5578         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5579                 khz = cpufreq_quick_get(raw_smp_processor_id());
5580         if (!khz)
5581                 khz = tsc_khz;
5582         __this_cpu_write(cpu_tsc_khz, khz);
5583 }
5584
5585 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5586                                      void *data)
5587 {
5588         struct cpufreq_freqs *freq = data;
5589         struct kvm *kvm;
5590         struct kvm_vcpu *vcpu;
5591         int i, send_ipi = 0;
5592
5593         /*
5594          * We allow guests to temporarily run on slowing clocks,
5595          * provided we notify them after, or to run on accelerating
5596          * clocks, provided we notify them before.  Thus time never
5597          * goes backwards.
5598          *
5599          * However, we have a problem.  We can't atomically update
5600          * the frequency of a given CPU from this function; it is
5601          * merely a notifier, which can be called from any CPU.
5602          * Changing the TSC frequency at arbitrary points in time
5603          * requires a recomputation of local variables related to
5604          * the TSC for each VCPU.  We must flag these local variables
5605          * to be updated and be sure the update takes place with the
5606          * new frequency before any guests proceed.
5607          *
5608          * Unfortunately, the combination of hotplug CPU and frequency
5609          * change creates an intractable locking scenario; the order
5610          * of when these callouts happen is undefined with respect to
5611          * CPU hotplug, and they can race with each other.  As such,
5612          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5613          * undefined; you can actually have a CPU frequency change take
5614          * place in between the computation of X and the setting of the
5615          * variable.  To protect against this problem, all updates of
5616          * the per_cpu tsc_khz variable are done in an interrupt
5617          * protected IPI, and all callers wishing to update the value
5618          * must wait for a synchronous IPI to complete (which is trivial
5619          * if the caller is on the CPU already).  This establishes the
5620          * necessary total order on variable updates.
5621          *
5622          * Note that because a guest time update may take place
5623          * anytime after the setting of the VCPU's request bit, the
5624          * correct TSC value must be set before the request.  However,
5625          * to ensure the update actually makes it to any guest which
5626          * starts running in hardware virtualization between the set
5627          * and the acquisition of the spinlock, we must also ping the
5628          * CPU after setting the request bit.
5629          *
5630          */
5631
5632         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5633                 return 0;
5634         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5635                 return 0;
5636
5637         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5638
5639         spin_lock(&kvm_lock);
5640         list_for_each_entry(kvm, &vm_list, vm_list) {
5641                 kvm_for_each_vcpu(i, vcpu, kvm) {
5642                         if (vcpu->cpu != freq->cpu)
5643                                 continue;
5644                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5645                         if (vcpu->cpu != smp_processor_id())
5646                                 send_ipi = 1;
5647                 }
5648         }
5649         spin_unlock(&kvm_lock);
5650
5651         if (freq->old < freq->new && send_ipi) {
5652                 /*
5653                  * We upscale the frequency.  Must make the guest
5654                  * doesn't see old kvmclock values while running with
5655                  * the new frequency, otherwise we risk the guest sees
5656                  * time go backwards.
5657                  *
5658                  * In case we update the frequency for another cpu
5659                  * (which might be in guest context) send an interrupt
5660                  * to kick the cpu out of guest context.  Next time
5661                  * guest context is entered kvmclock will be updated,
5662                  * so the guest will not see stale values.
5663                  */
5664                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5665         }
5666         return 0;
5667 }
5668
5669 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5670         .notifier_call  = kvmclock_cpufreq_notifier
5671 };
5672
5673 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5674                                         unsigned long action, void *hcpu)
5675 {
5676         unsigned int cpu = (unsigned long)hcpu;
5677
5678         switch (action) {
5679                 case CPU_ONLINE:
5680                 case CPU_DOWN_FAILED:
5681                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5682                         break;
5683                 case CPU_DOWN_PREPARE:
5684                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5685                         break;
5686         }
5687         return NOTIFY_OK;
5688 }
5689
5690 static struct notifier_block kvmclock_cpu_notifier_block = {
5691         .notifier_call  = kvmclock_cpu_notifier,
5692         .priority = -INT_MAX
5693 };
5694
5695 static void kvm_timer_init(void)
5696 {
5697         int cpu;
5698
5699         max_tsc_khz = tsc_khz;
5700
5701         cpu_notifier_register_begin();
5702         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5703 #ifdef CONFIG_CPU_FREQ
5704                 struct cpufreq_policy policy;
5705                 memset(&policy, 0, sizeof(policy));
5706                 cpu = get_cpu();
5707                 cpufreq_get_policy(&policy, cpu);
5708                 if (policy.cpuinfo.max_freq)
5709                         max_tsc_khz = policy.cpuinfo.max_freq;
5710                 put_cpu();
5711 #endif
5712                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5713                                           CPUFREQ_TRANSITION_NOTIFIER);
5714         }
5715         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5716         for_each_online_cpu(cpu)
5717                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5718
5719         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5720         cpu_notifier_register_done();
5721
5722 }
5723
5724 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5725
5726 int kvm_is_in_guest(void)
5727 {
5728         return __this_cpu_read(current_vcpu) != NULL;
5729 }
5730
5731 static int kvm_is_user_mode(void)
5732 {
5733         int user_mode = 3;
5734
5735         if (__this_cpu_read(current_vcpu))
5736                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5737
5738         return user_mode != 0;
5739 }
5740
5741 static unsigned long kvm_get_guest_ip(void)
5742 {
5743         unsigned long ip = 0;
5744
5745         if (__this_cpu_read(current_vcpu))
5746                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5747
5748         return ip;
5749 }
5750
5751 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5752         .is_in_guest            = kvm_is_in_guest,
5753         .is_user_mode           = kvm_is_user_mode,
5754         .get_guest_ip           = kvm_get_guest_ip,
5755 };
5756
5757 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5758 {
5759         __this_cpu_write(current_vcpu, vcpu);
5760 }
5761 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5762
5763 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5764 {
5765         __this_cpu_write(current_vcpu, NULL);
5766 }
5767 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5768
5769 static void kvm_set_mmio_spte_mask(void)
5770 {
5771         u64 mask;
5772         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5773
5774         /*
5775          * Set the reserved bits and the present bit of an paging-structure
5776          * entry to generate page fault with PFER.RSV = 1.
5777          */
5778          /* Mask the reserved physical address bits. */
5779         mask = rsvd_bits(maxphyaddr, 51);
5780
5781         /* Bit 62 is always reserved for 32bit host. */
5782         mask |= 0x3ull << 62;
5783
5784         /* Set the present bit. */
5785         mask |= 1ull;
5786
5787 #ifdef CONFIG_X86_64
5788         /*
5789          * If reserved bit is not supported, clear the present bit to disable
5790          * mmio page fault.
5791          */
5792         if (maxphyaddr == 52)
5793                 mask &= ~1ull;
5794 #endif
5795
5796         kvm_mmu_set_mmio_spte_mask(mask);
5797 }
5798
5799 #ifdef CONFIG_X86_64
5800 static void pvclock_gtod_update_fn(struct work_struct *work)
5801 {
5802         struct kvm *kvm;
5803
5804         struct kvm_vcpu *vcpu;
5805         int i;
5806
5807         spin_lock(&kvm_lock);
5808         list_for_each_entry(kvm, &vm_list, vm_list)
5809                 kvm_for_each_vcpu(i, vcpu, kvm)
5810                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5811         atomic_set(&kvm_guest_has_master_clock, 0);
5812         spin_unlock(&kvm_lock);
5813 }
5814
5815 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5816
5817 /*
5818  * Notification about pvclock gtod data update.
5819  */
5820 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5821                                void *priv)
5822 {
5823         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5824         struct timekeeper *tk = priv;
5825
5826         update_pvclock_gtod(tk);
5827
5828         /* disable master clock if host does not trust, or does not
5829          * use, TSC clocksource
5830          */
5831         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5832             atomic_read(&kvm_guest_has_master_clock) != 0)
5833                 queue_work(system_long_wq, &pvclock_gtod_work);
5834
5835         return 0;
5836 }
5837
5838 static struct notifier_block pvclock_gtod_notifier = {
5839         .notifier_call = pvclock_gtod_notify,
5840 };
5841 #endif
5842
5843 int kvm_arch_init(void *opaque)
5844 {
5845         int r;
5846         struct kvm_x86_ops *ops = opaque;
5847
5848         if (kvm_x86_ops) {
5849                 printk(KERN_ERR "kvm: already loaded the other module\n");
5850                 r = -EEXIST;
5851                 goto out;
5852         }
5853
5854         if (!ops->cpu_has_kvm_support()) {
5855                 printk(KERN_ERR "kvm: no hardware support\n");
5856                 r = -EOPNOTSUPP;
5857                 goto out;
5858         }
5859         if (ops->disabled_by_bios()) {
5860                 printk(KERN_ERR "kvm: disabled by bios\n");
5861                 r = -EOPNOTSUPP;
5862                 goto out;
5863         }
5864
5865         r = -ENOMEM;
5866         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5867         if (!shared_msrs) {
5868                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5869                 goto out;
5870         }
5871
5872         r = kvm_mmu_module_init();
5873         if (r)
5874                 goto out_free_percpu;
5875
5876         kvm_set_mmio_spte_mask();
5877
5878         kvm_x86_ops = ops;
5879
5880         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5881                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
5882                         PT_PRESENT_MASK);
5883         kvm_timer_init();
5884
5885         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5886
5887         if (boot_cpu_has(X86_FEATURE_XSAVE))
5888                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5889
5890         kvm_lapic_init();
5891 #ifdef CONFIG_X86_64
5892         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5893 #endif
5894
5895         return 0;
5896
5897 out_free_percpu:
5898         free_percpu(shared_msrs);
5899 out:
5900         return r;
5901 }
5902
5903 void kvm_arch_exit(void)
5904 {
5905         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5906
5907         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5908                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5909                                             CPUFREQ_TRANSITION_NOTIFIER);
5910         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5911 #ifdef CONFIG_X86_64
5912         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5913 #endif
5914         kvm_x86_ops = NULL;
5915         kvm_mmu_module_exit();
5916         free_percpu(shared_msrs);
5917 }
5918
5919 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5920 {
5921         ++vcpu->stat.halt_exits;
5922         if (lapic_in_kernel(vcpu)) {
5923                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5924                 return 1;
5925         } else {
5926                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5927                 return 0;
5928         }
5929 }
5930 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5931
5932 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5933 {
5934         kvm_x86_ops->skip_emulated_instruction(vcpu);
5935         return kvm_vcpu_halt(vcpu);
5936 }
5937 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5938
5939 /*
5940  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5941  *
5942  * @apicid - apicid of vcpu to be kicked.
5943  */
5944 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5945 {
5946         struct kvm_lapic_irq lapic_irq;
5947
5948         lapic_irq.shorthand = 0;
5949         lapic_irq.dest_mode = 0;
5950         lapic_irq.dest_id = apicid;
5951         lapic_irq.msi_redir_hint = false;
5952
5953         lapic_irq.delivery_mode = APIC_DM_REMRD;
5954         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5955 }
5956
5957 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
5958 {
5959         vcpu->arch.apicv_active = false;
5960         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
5961 }
5962
5963 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5964 {
5965         unsigned long nr, a0, a1, a2, a3, ret;
5966         int op_64_bit, r = 1;
5967
5968         kvm_x86_ops->skip_emulated_instruction(vcpu);
5969
5970         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5971                 return kvm_hv_hypercall(vcpu);
5972
5973         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5974         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5975         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5976         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5977         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5978
5979         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5980
5981         op_64_bit = is_64_bit_mode(vcpu);
5982         if (!op_64_bit) {
5983                 nr &= 0xFFFFFFFF;
5984                 a0 &= 0xFFFFFFFF;
5985                 a1 &= 0xFFFFFFFF;
5986                 a2 &= 0xFFFFFFFF;
5987                 a3 &= 0xFFFFFFFF;
5988         }
5989
5990         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5991                 ret = -KVM_EPERM;
5992                 goto out;
5993         }
5994
5995         switch (nr) {
5996         case KVM_HC_VAPIC_POLL_IRQ:
5997                 ret = 0;
5998                 break;
5999         case KVM_HC_KICK_CPU:
6000                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6001                 ret = 0;
6002                 break;
6003         default:
6004                 ret = -KVM_ENOSYS;
6005                 break;
6006         }
6007 out:
6008         if (!op_64_bit)
6009                 ret = (u32)ret;
6010         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6011         ++vcpu->stat.hypercalls;
6012         return r;
6013 }
6014 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6015
6016 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6017 {
6018         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6019         char instruction[3];
6020         unsigned long rip = kvm_rip_read(vcpu);
6021
6022         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6023
6024         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6025 }
6026
6027 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6028 {
6029         return vcpu->run->request_interrupt_window &&
6030                 likely(!pic_in_kernel(vcpu->kvm));
6031 }
6032
6033 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6034 {
6035         struct kvm_run *kvm_run = vcpu->run;
6036
6037         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6038         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6039         kvm_run->cr8 = kvm_get_cr8(vcpu);
6040         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6041         kvm_run->ready_for_interrupt_injection =
6042                 pic_in_kernel(vcpu->kvm) ||
6043                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6044 }
6045
6046 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6047 {
6048         int max_irr, tpr;
6049
6050         if (!kvm_x86_ops->update_cr8_intercept)
6051                 return;
6052
6053         if (!lapic_in_kernel(vcpu))
6054                 return;
6055
6056         if (vcpu->arch.apicv_active)
6057                 return;
6058
6059         if (!vcpu->arch.apic->vapic_addr)
6060                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6061         else
6062                 max_irr = -1;
6063
6064         if (max_irr != -1)
6065                 max_irr >>= 4;
6066
6067         tpr = kvm_lapic_get_cr8(vcpu);
6068
6069         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6070 }
6071
6072 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6073 {
6074         int r;
6075
6076         /* try to reinject previous events if any */
6077         if (vcpu->arch.exception.pending) {
6078                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6079                                         vcpu->arch.exception.has_error_code,
6080                                         vcpu->arch.exception.error_code);
6081
6082                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6083                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6084                                              X86_EFLAGS_RF);
6085
6086                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6087                     (vcpu->arch.dr7 & DR7_GD)) {
6088                         vcpu->arch.dr7 &= ~DR7_GD;
6089                         kvm_update_dr7(vcpu);
6090                 }
6091
6092                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6093                                           vcpu->arch.exception.has_error_code,
6094                                           vcpu->arch.exception.error_code,
6095                                           vcpu->arch.exception.reinject);
6096                 return 0;
6097         }
6098
6099         if (vcpu->arch.nmi_injected) {
6100                 kvm_x86_ops->set_nmi(vcpu);
6101                 return 0;
6102         }
6103
6104         if (vcpu->arch.interrupt.pending) {
6105                 kvm_x86_ops->set_irq(vcpu);
6106                 return 0;
6107         }
6108
6109         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6110                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6111                 if (r != 0)
6112                         return r;
6113         }
6114
6115         /* try to inject new event if pending */
6116         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6117                 vcpu->arch.smi_pending = false;
6118                 enter_smm(vcpu);
6119         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6120                 --vcpu->arch.nmi_pending;
6121                 vcpu->arch.nmi_injected = true;
6122                 kvm_x86_ops->set_nmi(vcpu);
6123         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6124                 /*
6125                  * Because interrupts can be injected asynchronously, we are
6126                  * calling check_nested_events again here to avoid a race condition.
6127                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6128                  * proposal and current concerns.  Perhaps we should be setting
6129                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6130                  */
6131                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6132                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6133                         if (r != 0)
6134                                 return r;
6135                 }
6136                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6137                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6138                                             false);
6139                         kvm_x86_ops->set_irq(vcpu);
6140                 }
6141         }
6142
6143         return 0;
6144 }
6145
6146 static void process_nmi(struct kvm_vcpu *vcpu)
6147 {
6148         unsigned limit = 2;
6149
6150         /*
6151          * x86 is limited to one NMI running, and one NMI pending after it.
6152          * If an NMI is already in progress, limit further NMIs to just one.
6153          * Otherwise, allow two (and we'll inject the first one immediately).
6154          */
6155         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6156                 limit = 1;
6157
6158         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6159         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6160         kvm_make_request(KVM_REQ_EVENT, vcpu);
6161 }
6162
6163 #define put_smstate(type, buf, offset, val)                       \
6164         *(type *)((buf) + (offset) - 0x7e00) = val
6165
6166 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6167 {
6168         u32 flags = 0;
6169         flags |= seg->g       << 23;
6170         flags |= seg->db      << 22;
6171         flags |= seg->l       << 21;
6172         flags |= seg->avl     << 20;
6173         flags |= seg->present << 15;
6174         flags |= seg->dpl     << 13;
6175         flags |= seg->s       << 12;
6176         flags |= seg->type    << 8;
6177         return flags;
6178 }
6179
6180 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6181 {
6182         struct kvm_segment seg;
6183         int offset;
6184
6185         kvm_get_segment(vcpu, &seg, n);
6186         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6187
6188         if (n < 3)
6189                 offset = 0x7f84 + n * 12;
6190         else
6191                 offset = 0x7f2c + (n - 3) * 12;
6192
6193         put_smstate(u32, buf, offset + 8, seg.base);
6194         put_smstate(u32, buf, offset + 4, seg.limit);
6195         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6196 }
6197
6198 #ifdef CONFIG_X86_64
6199 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6200 {
6201         struct kvm_segment seg;
6202         int offset;
6203         u16 flags;
6204
6205         kvm_get_segment(vcpu, &seg, n);
6206         offset = 0x7e00 + n * 16;
6207
6208         flags = enter_smm_get_segment_flags(&seg) >> 8;
6209         put_smstate(u16, buf, offset, seg.selector);
6210         put_smstate(u16, buf, offset + 2, flags);
6211         put_smstate(u32, buf, offset + 4, seg.limit);
6212         put_smstate(u64, buf, offset + 8, seg.base);
6213 }
6214 #endif
6215
6216 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6217 {
6218         struct desc_ptr dt;
6219         struct kvm_segment seg;
6220         unsigned long val;
6221         int i;
6222
6223         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6224         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6225         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6226         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6227
6228         for (i = 0; i < 8; i++)
6229                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6230
6231         kvm_get_dr(vcpu, 6, &val);
6232         put_smstate(u32, buf, 0x7fcc, (u32)val);
6233         kvm_get_dr(vcpu, 7, &val);
6234         put_smstate(u32, buf, 0x7fc8, (u32)val);
6235
6236         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6237         put_smstate(u32, buf, 0x7fc4, seg.selector);
6238         put_smstate(u32, buf, 0x7f64, seg.base);
6239         put_smstate(u32, buf, 0x7f60, seg.limit);
6240         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6241
6242         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6243         put_smstate(u32, buf, 0x7fc0, seg.selector);
6244         put_smstate(u32, buf, 0x7f80, seg.base);
6245         put_smstate(u32, buf, 0x7f7c, seg.limit);
6246         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6247
6248         kvm_x86_ops->get_gdt(vcpu, &dt);
6249         put_smstate(u32, buf, 0x7f74, dt.address);
6250         put_smstate(u32, buf, 0x7f70, dt.size);
6251
6252         kvm_x86_ops->get_idt(vcpu, &dt);
6253         put_smstate(u32, buf, 0x7f58, dt.address);
6254         put_smstate(u32, buf, 0x7f54, dt.size);
6255
6256         for (i = 0; i < 6; i++)
6257                 enter_smm_save_seg_32(vcpu, buf, i);
6258
6259         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6260
6261         /* revision id */
6262         put_smstate(u32, buf, 0x7efc, 0x00020000);
6263         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6264 }
6265
6266 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6267 {
6268 #ifdef CONFIG_X86_64
6269         struct desc_ptr dt;
6270         struct kvm_segment seg;
6271         unsigned long val;
6272         int i;
6273
6274         for (i = 0; i < 16; i++)
6275                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6276
6277         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6278         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6279
6280         kvm_get_dr(vcpu, 6, &val);
6281         put_smstate(u64, buf, 0x7f68, val);
6282         kvm_get_dr(vcpu, 7, &val);
6283         put_smstate(u64, buf, 0x7f60, val);
6284
6285         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6286         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6287         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6288
6289         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6290
6291         /* revision id */
6292         put_smstate(u32, buf, 0x7efc, 0x00020064);
6293
6294         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6295
6296         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6297         put_smstate(u16, buf, 0x7e90, seg.selector);
6298         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6299         put_smstate(u32, buf, 0x7e94, seg.limit);
6300         put_smstate(u64, buf, 0x7e98, seg.base);
6301
6302         kvm_x86_ops->get_idt(vcpu, &dt);
6303         put_smstate(u32, buf, 0x7e84, dt.size);
6304         put_smstate(u64, buf, 0x7e88, dt.address);
6305
6306         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6307         put_smstate(u16, buf, 0x7e70, seg.selector);
6308         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6309         put_smstate(u32, buf, 0x7e74, seg.limit);
6310         put_smstate(u64, buf, 0x7e78, seg.base);
6311
6312         kvm_x86_ops->get_gdt(vcpu, &dt);
6313         put_smstate(u32, buf, 0x7e64, dt.size);
6314         put_smstate(u64, buf, 0x7e68, dt.address);
6315
6316         for (i = 0; i < 6; i++)
6317                 enter_smm_save_seg_64(vcpu, buf, i);
6318 #else
6319         WARN_ON_ONCE(1);
6320 #endif
6321 }
6322
6323 static void enter_smm(struct kvm_vcpu *vcpu)
6324 {
6325         struct kvm_segment cs, ds;
6326         struct desc_ptr dt;
6327         char buf[512];
6328         u32 cr0;
6329
6330         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6331         vcpu->arch.hflags |= HF_SMM_MASK;
6332         memset(buf, 0, 512);
6333         if (guest_cpuid_has_longmode(vcpu))
6334                 enter_smm_save_state_64(vcpu, buf);
6335         else
6336                 enter_smm_save_state_32(vcpu, buf);
6337
6338         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6339
6340         if (kvm_x86_ops->get_nmi_mask(vcpu))
6341                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6342         else
6343                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6344
6345         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6346         kvm_rip_write(vcpu, 0x8000);
6347
6348         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6349         kvm_x86_ops->set_cr0(vcpu, cr0);
6350         vcpu->arch.cr0 = cr0;
6351
6352         kvm_x86_ops->set_cr4(vcpu, 0);
6353
6354         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6355         dt.address = dt.size = 0;
6356         kvm_x86_ops->set_idt(vcpu, &dt);
6357
6358         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6359
6360         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6361         cs.base = vcpu->arch.smbase;
6362
6363         ds.selector = 0;
6364         ds.base = 0;
6365
6366         cs.limit    = ds.limit = 0xffffffff;
6367         cs.type     = ds.type = 0x3;
6368         cs.dpl      = ds.dpl = 0;
6369         cs.db       = ds.db = 0;
6370         cs.s        = ds.s = 1;
6371         cs.l        = ds.l = 0;
6372         cs.g        = ds.g = 1;
6373         cs.avl      = ds.avl = 0;
6374         cs.present  = ds.present = 1;
6375         cs.unusable = ds.unusable = 0;
6376         cs.padding  = ds.padding = 0;
6377
6378         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6379         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6380         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6381         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6382         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6383         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6384
6385         if (guest_cpuid_has_longmode(vcpu))
6386                 kvm_x86_ops->set_efer(vcpu, 0);
6387
6388         kvm_update_cpuid(vcpu);
6389         kvm_mmu_reset_context(vcpu);
6390 }
6391
6392 static void process_smi(struct kvm_vcpu *vcpu)
6393 {
6394         vcpu->arch.smi_pending = true;
6395         kvm_make_request(KVM_REQ_EVENT, vcpu);
6396 }
6397
6398 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6399 {
6400         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6401 }
6402
6403 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6404 {
6405         u64 eoi_exit_bitmap[4];
6406
6407         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6408                 return;
6409
6410         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6411
6412         if (irqchip_split(vcpu->kvm))
6413                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6414         else {
6415                 if (vcpu->arch.apicv_active)
6416                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6417                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6418         }
6419         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6420                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6421         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6422 }
6423
6424 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6425 {
6426         ++vcpu->stat.tlb_flush;
6427         kvm_x86_ops->tlb_flush(vcpu);
6428 }
6429
6430 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6431 {
6432         struct page *page = NULL;
6433
6434         if (!lapic_in_kernel(vcpu))
6435                 return;
6436
6437         if (!kvm_x86_ops->set_apic_access_page_addr)
6438                 return;
6439
6440         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6441         if (is_error_page(page))
6442                 return;
6443         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6444
6445         /*
6446          * Do not pin apic access page in memory, the MMU notifier
6447          * will call us again if it is migrated or swapped out.
6448          */
6449         put_page(page);
6450 }
6451 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6452
6453 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6454                                            unsigned long address)
6455 {
6456         /*
6457          * The physical address of apic access page is stored in the VMCS.
6458          * Update it when it becomes invalid.
6459          */
6460         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6461                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6462 }
6463
6464 /*
6465  * Returns 1 to let vcpu_run() continue the guest execution loop without
6466  * exiting to the userspace.  Otherwise, the value will be returned to the
6467  * userspace.
6468  */
6469 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6470 {
6471         int r;
6472         bool req_int_win =
6473                 dm_request_for_irq_injection(vcpu) &&
6474                 kvm_cpu_accept_dm_intr(vcpu);
6475
6476         bool req_immediate_exit = false;
6477
6478         if (vcpu->requests) {
6479                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6480                         kvm_mmu_unload(vcpu);
6481                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6482                         __kvm_migrate_timers(vcpu);
6483                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6484                         kvm_gen_update_masterclock(vcpu->kvm);
6485                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6486                         kvm_gen_kvmclock_update(vcpu);
6487                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6488                         r = kvm_guest_time_update(vcpu);
6489                         if (unlikely(r))
6490                                 goto out;
6491                 }
6492                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6493                         kvm_mmu_sync_roots(vcpu);
6494                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6495                         kvm_vcpu_flush_tlb(vcpu);
6496                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6497                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6498                         r = 0;
6499                         goto out;
6500                 }
6501                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6502                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6503                         r = 0;
6504                         goto out;
6505                 }
6506                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6507                         vcpu->fpu_active = 0;
6508                         kvm_x86_ops->fpu_deactivate(vcpu);
6509                 }
6510                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6511                         /* Page is swapped out. Do synthetic halt */
6512                         vcpu->arch.apf.halted = true;
6513                         r = 1;
6514                         goto out;
6515                 }
6516                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6517                         record_steal_time(vcpu);
6518                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6519                         process_smi(vcpu);
6520                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6521                         process_nmi(vcpu);
6522                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6523                         kvm_pmu_handle_event(vcpu);
6524                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6525                         kvm_pmu_deliver_pmi(vcpu);
6526                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6527                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6528                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6529                                      vcpu->arch.ioapic_handled_vectors)) {
6530                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6531                                 vcpu->run->eoi.vector =
6532                                                 vcpu->arch.pending_ioapic_eoi;
6533                                 r = 0;
6534                                 goto out;
6535                         }
6536                 }
6537                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6538                         vcpu_scan_ioapic(vcpu);
6539                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6540                         kvm_vcpu_reload_apic_access_page(vcpu);
6541                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6542                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6543                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6544                         r = 0;
6545                         goto out;
6546                 }
6547                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6548                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6549                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6550                         r = 0;
6551                         goto out;
6552                 }
6553                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6554                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6555                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6556                         r = 0;
6557                         goto out;
6558                 }
6559
6560                 /*
6561                  * KVM_REQ_HV_STIMER has to be processed after
6562                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6563                  * depend on the guest clock being up-to-date
6564                  */
6565                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6566                         kvm_hv_process_stimers(vcpu);
6567         }
6568
6569         /*
6570          * KVM_REQ_EVENT is not set when posted interrupts are set by
6571          * VT-d hardware, so we have to update RVI unconditionally.
6572          */
6573         if (kvm_lapic_enabled(vcpu)) {
6574                 /*
6575                  * Update architecture specific hints for APIC
6576                  * virtual interrupt delivery.
6577                  */
6578                 if (vcpu->arch.apicv_active)
6579                         kvm_x86_ops->hwapic_irr_update(vcpu,
6580                                 kvm_lapic_find_highest_irr(vcpu));
6581         }
6582
6583         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6584                 kvm_apic_accept_events(vcpu);
6585                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6586                         r = 1;
6587                         goto out;
6588                 }
6589
6590                 if (inject_pending_event(vcpu, req_int_win) != 0)
6591                         req_immediate_exit = true;
6592                 else {
6593                         /* Enable NMI/IRQ window open exits if needed.
6594                          *
6595                          * SMIs have two cases: 1) they can be nested, and
6596                          * then there is nothing to do here because RSM will
6597                          * cause a vmexit anyway; 2) or the SMI can be pending
6598                          * because inject_pending_event has completed the
6599                          * injection of an IRQ or NMI from the previous vmexit,
6600                          * and then we request an immediate exit to inject the SMI.
6601                          */
6602                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6603                                 req_immediate_exit = true;
6604                         if (vcpu->arch.nmi_pending)
6605                                 kvm_x86_ops->enable_nmi_window(vcpu);
6606                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6607                                 kvm_x86_ops->enable_irq_window(vcpu);
6608                 }
6609
6610                 if (kvm_lapic_enabled(vcpu)) {
6611                         update_cr8_intercept(vcpu);
6612                         kvm_lapic_sync_to_vapic(vcpu);
6613                 }
6614         }
6615
6616         r = kvm_mmu_reload(vcpu);
6617         if (unlikely(r)) {
6618                 goto cancel_injection;
6619         }
6620
6621         preempt_disable();
6622
6623         kvm_x86_ops->prepare_guest_switch(vcpu);
6624         if (vcpu->fpu_active)
6625                 kvm_load_guest_fpu(vcpu);
6626         vcpu->mode = IN_GUEST_MODE;
6627
6628         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6629
6630         /*
6631          * We should set ->mode before check ->requests,
6632          * Please see the comment in kvm_make_all_cpus_request.
6633          * This also orders the write to mode from any reads
6634          * to the page tables done while the VCPU is running.
6635          * Please see the comment in kvm_flush_remote_tlbs.
6636          */
6637         smp_mb__after_srcu_read_unlock();
6638
6639         local_irq_disable();
6640
6641         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6642             || need_resched() || signal_pending(current)) {
6643                 vcpu->mode = OUTSIDE_GUEST_MODE;
6644                 smp_wmb();
6645                 local_irq_enable();
6646                 preempt_enable();
6647                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6648                 r = 1;
6649                 goto cancel_injection;
6650         }
6651
6652         kvm_load_guest_xcr0(vcpu);
6653
6654         if (req_immediate_exit) {
6655                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6656                 smp_send_reschedule(vcpu->cpu);
6657         }
6658
6659         trace_kvm_entry(vcpu->vcpu_id);
6660         wait_lapic_expire(vcpu);
6661         guest_enter_irqoff();
6662
6663         if (unlikely(vcpu->arch.switch_db_regs)) {
6664                 set_debugreg(0, 7);
6665                 set_debugreg(vcpu->arch.eff_db[0], 0);
6666                 set_debugreg(vcpu->arch.eff_db[1], 1);
6667                 set_debugreg(vcpu->arch.eff_db[2], 2);
6668                 set_debugreg(vcpu->arch.eff_db[3], 3);
6669                 set_debugreg(vcpu->arch.dr6, 6);
6670                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6671         }
6672
6673         kvm_x86_ops->run(vcpu);
6674
6675         /*
6676          * Do this here before restoring debug registers on the host.  And
6677          * since we do this before handling the vmexit, a DR access vmexit
6678          * can (a) read the correct value of the debug registers, (b) set
6679          * KVM_DEBUGREG_WONT_EXIT again.
6680          */
6681         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6682                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6683                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6684                 kvm_update_dr0123(vcpu);
6685                 kvm_update_dr6(vcpu);
6686                 kvm_update_dr7(vcpu);
6687                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6688         }
6689
6690         /*
6691          * If the guest has used debug registers, at least dr7
6692          * will be disabled while returning to the host.
6693          * If we don't have active breakpoints in the host, we don't
6694          * care about the messed up debug address registers. But if
6695          * we have some of them active, restore the old state.
6696          */
6697         if (hw_breakpoint_active())
6698                 hw_breakpoint_restore();
6699
6700         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6701
6702         vcpu->mode = OUTSIDE_GUEST_MODE;
6703         smp_wmb();
6704
6705         kvm_put_guest_xcr0(vcpu);
6706
6707         /* Interrupt is enabled by handle_external_intr() */
6708         kvm_x86_ops->handle_external_intr(vcpu);
6709
6710         ++vcpu->stat.exits;
6711
6712         guest_exit_irqoff();
6713
6714         local_irq_enable();
6715         preempt_enable();
6716
6717         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6718
6719         /*
6720          * Profile KVM exit RIPs:
6721          */
6722         if (unlikely(prof_on == KVM_PROFILING)) {
6723                 unsigned long rip = kvm_rip_read(vcpu);
6724                 profile_hit(KVM_PROFILING, (void *)rip);
6725         }
6726
6727         if (unlikely(vcpu->arch.tsc_always_catchup))
6728                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6729
6730         if (vcpu->arch.apic_attention)
6731                 kvm_lapic_sync_from_vapic(vcpu);
6732
6733         r = kvm_x86_ops->handle_exit(vcpu);
6734         return r;
6735
6736 cancel_injection:
6737         kvm_x86_ops->cancel_injection(vcpu);
6738         if (unlikely(vcpu->arch.apic_attention))
6739                 kvm_lapic_sync_from_vapic(vcpu);
6740 out:
6741         return r;
6742 }
6743
6744 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6745 {
6746         if (!kvm_arch_vcpu_runnable(vcpu) &&
6747             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6748                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6749                 kvm_vcpu_block(vcpu);
6750                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6751
6752                 if (kvm_x86_ops->post_block)
6753                         kvm_x86_ops->post_block(vcpu);
6754
6755                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6756                         return 1;
6757         }
6758
6759         kvm_apic_accept_events(vcpu);
6760         switch(vcpu->arch.mp_state) {
6761         case KVM_MP_STATE_HALTED:
6762                 vcpu->arch.pv.pv_unhalted = false;
6763                 vcpu->arch.mp_state =
6764                         KVM_MP_STATE_RUNNABLE;
6765         case KVM_MP_STATE_RUNNABLE:
6766                 vcpu->arch.apf.halted = false;
6767                 break;
6768         case KVM_MP_STATE_INIT_RECEIVED:
6769                 break;
6770         default:
6771                 return -EINTR;
6772                 break;
6773         }
6774         return 1;
6775 }
6776
6777 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6778 {
6779         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6780                 !vcpu->arch.apf.halted);
6781 }
6782
6783 static int vcpu_run(struct kvm_vcpu *vcpu)
6784 {
6785         int r;
6786         struct kvm *kvm = vcpu->kvm;
6787
6788         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6789
6790         for (;;) {
6791                 if (kvm_vcpu_running(vcpu)) {
6792                         r = vcpu_enter_guest(vcpu);
6793                 } else {
6794                         r = vcpu_block(kvm, vcpu);
6795                 }
6796
6797                 if (r <= 0)
6798                         break;
6799
6800                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6801                 if (kvm_cpu_has_pending_timer(vcpu))
6802                         kvm_inject_pending_timer_irqs(vcpu);
6803
6804                 if (dm_request_for_irq_injection(vcpu) &&
6805                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6806                         r = 0;
6807                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6808                         ++vcpu->stat.request_irq_exits;
6809                         break;
6810                 }
6811
6812                 kvm_check_async_pf_completion(vcpu);
6813
6814                 if (signal_pending(current)) {
6815                         r = -EINTR;
6816                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6817                         ++vcpu->stat.signal_exits;
6818                         break;
6819                 }
6820                 if (need_resched()) {
6821                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6822                         cond_resched();
6823                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6824                 }
6825         }
6826
6827         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6828
6829         return r;
6830 }
6831
6832 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6833 {
6834         int r;
6835         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6836         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6837         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6838         if (r != EMULATE_DONE)
6839                 return 0;
6840         return 1;
6841 }
6842
6843 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6844 {
6845         BUG_ON(!vcpu->arch.pio.count);
6846
6847         return complete_emulated_io(vcpu);
6848 }
6849
6850 /*
6851  * Implements the following, as a state machine:
6852  *
6853  * read:
6854  *   for each fragment
6855  *     for each mmio piece in the fragment
6856  *       write gpa, len
6857  *       exit
6858  *       copy data
6859  *   execute insn
6860  *
6861  * write:
6862  *   for each fragment
6863  *     for each mmio piece in the fragment
6864  *       write gpa, len
6865  *       copy data
6866  *       exit
6867  */
6868 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6869 {
6870         struct kvm_run *run = vcpu->run;
6871         struct kvm_mmio_fragment *frag;
6872         unsigned len;
6873
6874         BUG_ON(!vcpu->mmio_needed);
6875
6876         /* Complete previous fragment */
6877         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6878         len = min(8u, frag->len);
6879         if (!vcpu->mmio_is_write)
6880                 memcpy(frag->data, run->mmio.data, len);
6881
6882         if (frag->len <= 8) {
6883                 /* Switch to the next fragment. */
6884                 frag++;
6885                 vcpu->mmio_cur_fragment++;
6886         } else {
6887                 /* Go forward to the next mmio piece. */
6888                 frag->data += len;
6889                 frag->gpa += len;
6890                 frag->len -= len;
6891         }
6892
6893         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6894                 vcpu->mmio_needed = 0;
6895
6896                 /* FIXME: return into emulator if single-stepping.  */
6897                 if (vcpu->mmio_is_write)
6898                         return 1;
6899                 vcpu->mmio_read_completed = 1;
6900                 return complete_emulated_io(vcpu);
6901         }
6902
6903         run->exit_reason = KVM_EXIT_MMIO;
6904         run->mmio.phys_addr = frag->gpa;
6905         if (vcpu->mmio_is_write)
6906                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6907         run->mmio.len = min(8u, frag->len);
6908         run->mmio.is_write = vcpu->mmio_is_write;
6909         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6910         return 0;
6911 }
6912
6913
6914 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6915 {
6916         struct fpu *fpu = &current->thread.fpu;
6917         int r;
6918         sigset_t sigsaved;
6919
6920         fpu__activate_curr(fpu);
6921
6922         if (vcpu->sigset_active)
6923                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6924
6925         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6926                 kvm_vcpu_block(vcpu);
6927                 kvm_apic_accept_events(vcpu);
6928                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6929                 r = -EAGAIN;
6930                 goto out;
6931         }
6932
6933         /* re-sync apic's tpr */
6934         if (!lapic_in_kernel(vcpu)) {
6935                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6936                         r = -EINVAL;
6937                         goto out;
6938                 }
6939         }
6940
6941         if (unlikely(vcpu->arch.complete_userspace_io)) {
6942                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6943                 vcpu->arch.complete_userspace_io = NULL;
6944                 r = cui(vcpu);
6945                 if (r <= 0)
6946                         goto out;
6947         } else
6948                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6949
6950         r = vcpu_run(vcpu);
6951
6952 out:
6953         post_kvm_run_save(vcpu);
6954         if (vcpu->sigset_active)
6955                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6956
6957         return r;
6958 }
6959
6960 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6961 {
6962         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6963                 /*
6964                  * We are here if userspace calls get_regs() in the middle of
6965                  * instruction emulation. Registers state needs to be copied
6966                  * back from emulation context to vcpu. Userspace shouldn't do
6967                  * that usually, but some bad designed PV devices (vmware
6968                  * backdoor interface) need this to work
6969                  */
6970                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6971                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6972         }
6973         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6974         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6975         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6976         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6977         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6978         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6979         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6980         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6981 #ifdef CONFIG_X86_64
6982         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6983         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6984         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6985         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6986         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6987         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6988         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6989         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6990 #endif
6991
6992         regs->rip = kvm_rip_read(vcpu);
6993         regs->rflags = kvm_get_rflags(vcpu);
6994
6995         return 0;
6996 }
6997
6998 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6999 {
7000         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7001         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7002
7003         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7004         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7005         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7006         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7007         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7008         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7009         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7010         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7011 #ifdef CONFIG_X86_64
7012         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7013         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7014         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7015         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7016         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7017         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7018         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7019         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7020 #endif
7021
7022         kvm_rip_write(vcpu, regs->rip);
7023         kvm_set_rflags(vcpu, regs->rflags);
7024
7025         vcpu->arch.exception.pending = false;
7026
7027         kvm_make_request(KVM_REQ_EVENT, vcpu);
7028
7029         return 0;
7030 }
7031
7032 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7033 {
7034         struct kvm_segment cs;
7035
7036         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7037         *db = cs.db;
7038         *l = cs.l;
7039 }
7040 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7041
7042 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7043                                   struct kvm_sregs *sregs)
7044 {
7045         struct desc_ptr dt;
7046
7047         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7048         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7049         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7050         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7051         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7052         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7053
7054         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7055         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7056
7057         kvm_x86_ops->get_idt(vcpu, &dt);
7058         sregs->idt.limit = dt.size;
7059         sregs->idt.base = dt.address;
7060         kvm_x86_ops->get_gdt(vcpu, &dt);
7061         sregs->gdt.limit = dt.size;
7062         sregs->gdt.base = dt.address;
7063
7064         sregs->cr0 = kvm_read_cr0(vcpu);
7065         sregs->cr2 = vcpu->arch.cr2;
7066         sregs->cr3 = kvm_read_cr3(vcpu);
7067         sregs->cr4 = kvm_read_cr4(vcpu);
7068         sregs->cr8 = kvm_get_cr8(vcpu);
7069         sregs->efer = vcpu->arch.efer;
7070         sregs->apic_base = kvm_get_apic_base(vcpu);
7071
7072         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7073
7074         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7075                 set_bit(vcpu->arch.interrupt.nr,
7076                         (unsigned long *)sregs->interrupt_bitmap);
7077
7078         return 0;
7079 }
7080
7081 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7082                                     struct kvm_mp_state *mp_state)
7083 {
7084         kvm_apic_accept_events(vcpu);
7085         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7086                                         vcpu->arch.pv.pv_unhalted)
7087                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7088         else
7089                 mp_state->mp_state = vcpu->arch.mp_state;
7090
7091         return 0;
7092 }
7093
7094 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7095                                     struct kvm_mp_state *mp_state)
7096 {
7097         if (!lapic_in_kernel(vcpu) &&
7098             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7099                 return -EINVAL;
7100
7101         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7102                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7103                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7104         } else
7105                 vcpu->arch.mp_state = mp_state->mp_state;
7106         kvm_make_request(KVM_REQ_EVENT, vcpu);
7107         return 0;
7108 }
7109
7110 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7111                     int reason, bool has_error_code, u32 error_code)
7112 {
7113         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7114         int ret;
7115
7116         init_emulate_ctxt(vcpu);
7117
7118         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7119                                    has_error_code, error_code);
7120
7121         if (ret)
7122                 return EMULATE_FAIL;
7123
7124         kvm_rip_write(vcpu, ctxt->eip);
7125         kvm_set_rflags(vcpu, ctxt->eflags);
7126         kvm_make_request(KVM_REQ_EVENT, vcpu);
7127         return EMULATE_DONE;
7128 }
7129 EXPORT_SYMBOL_GPL(kvm_task_switch);
7130
7131 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7132                                   struct kvm_sregs *sregs)
7133 {
7134         struct msr_data apic_base_msr;
7135         int mmu_reset_needed = 0;
7136         int pending_vec, max_bits, idx;
7137         struct desc_ptr dt;
7138
7139         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7140                 return -EINVAL;
7141
7142         dt.size = sregs->idt.limit;
7143         dt.address = sregs->idt.base;
7144         kvm_x86_ops->set_idt(vcpu, &dt);
7145         dt.size = sregs->gdt.limit;
7146         dt.address = sregs->gdt.base;
7147         kvm_x86_ops->set_gdt(vcpu, &dt);
7148
7149         vcpu->arch.cr2 = sregs->cr2;
7150         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7151         vcpu->arch.cr3 = sregs->cr3;
7152         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7153
7154         kvm_set_cr8(vcpu, sregs->cr8);
7155
7156         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7157         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7158         apic_base_msr.data = sregs->apic_base;
7159         apic_base_msr.host_initiated = true;
7160         kvm_set_apic_base(vcpu, &apic_base_msr);
7161
7162         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7163         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7164         vcpu->arch.cr0 = sregs->cr0;
7165
7166         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7167         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7168         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7169                 kvm_update_cpuid(vcpu);
7170
7171         idx = srcu_read_lock(&vcpu->kvm->srcu);
7172         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7173                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7174                 mmu_reset_needed = 1;
7175         }
7176         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7177
7178         if (mmu_reset_needed)
7179                 kvm_mmu_reset_context(vcpu);
7180
7181         max_bits = KVM_NR_INTERRUPTS;
7182         pending_vec = find_first_bit(
7183                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7184         if (pending_vec < max_bits) {
7185                 kvm_queue_interrupt(vcpu, pending_vec, false);
7186                 pr_debug("Set back pending irq %d\n", pending_vec);
7187         }
7188
7189         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7190         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7191         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7192         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7193         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7194         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7195
7196         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7197         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7198
7199         update_cr8_intercept(vcpu);
7200
7201         /* Older userspace won't unhalt the vcpu on reset. */
7202         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7203             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7204             !is_protmode(vcpu))
7205                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7206
7207         kvm_make_request(KVM_REQ_EVENT, vcpu);
7208
7209         return 0;
7210 }
7211
7212 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7213                                         struct kvm_guest_debug *dbg)
7214 {
7215         unsigned long rflags;
7216         int i, r;
7217
7218         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7219                 r = -EBUSY;
7220                 if (vcpu->arch.exception.pending)
7221                         goto out;
7222                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7223                         kvm_queue_exception(vcpu, DB_VECTOR);
7224                 else
7225                         kvm_queue_exception(vcpu, BP_VECTOR);
7226         }
7227
7228         /*
7229          * Read rflags as long as potentially injected trace flags are still
7230          * filtered out.
7231          */
7232         rflags = kvm_get_rflags(vcpu);
7233
7234         vcpu->guest_debug = dbg->control;
7235         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7236                 vcpu->guest_debug = 0;
7237
7238         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7239                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7240                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7241                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7242         } else {
7243                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7244                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7245         }
7246         kvm_update_dr7(vcpu);
7247
7248         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7249                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7250                         get_segment_base(vcpu, VCPU_SREG_CS);
7251
7252         /*
7253          * Trigger an rflags update that will inject or remove the trace
7254          * flags.
7255          */
7256         kvm_set_rflags(vcpu, rflags);
7257
7258         kvm_x86_ops->update_bp_intercept(vcpu);
7259
7260         r = 0;
7261
7262 out:
7263
7264         return r;
7265 }
7266
7267 /*
7268  * Translate a guest virtual address to a guest physical address.
7269  */
7270 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7271                                     struct kvm_translation *tr)
7272 {
7273         unsigned long vaddr = tr->linear_address;
7274         gpa_t gpa;
7275         int idx;
7276
7277         idx = srcu_read_lock(&vcpu->kvm->srcu);
7278         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7279         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7280         tr->physical_address = gpa;
7281         tr->valid = gpa != UNMAPPED_GVA;
7282         tr->writeable = 1;
7283         tr->usermode = 0;
7284
7285         return 0;
7286 }
7287
7288 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7289 {
7290         struct fxregs_state *fxsave =
7291                         &vcpu->arch.guest_fpu.state.fxsave;
7292
7293         memcpy(fpu->fpr, fxsave->st_space, 128);
7294         fpu->fcw = fxsave->cwd;
7295         fpu->fsw = fxsave->swd;
7296         fpu->ftwx = fxsave->twd;
7297         fpu->last_opcode = fxsave->fop;
7298         fpu->last_ip = fxsave->rip;
7299         fpu->last_dp = fxsave->rdp;
7300         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7301
7302         return 0;
7303 }
7304
7305 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7306 {
7307         struct fxregs_state *fxsave =
7308                         &vcpu->arch.guest_fpu.state.fxsave;
7309
7310         memcpy(fxsave->st_space, fpu->fpr, 128);
7311         fxsave->cwd = fpu->fcw;
7312         fxsave->swd = fpu->fsw;
7313         fxsave->twd = fpu->ftwx;
7314         fxsave->fop = fpu->last_opcode;
7315         fxsave->rip = fpu->last_ip;
7316         fxsave->rdp = fpu->last_dp;
7317         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7318
7319         return 0;
7320 }
7321
7322 static void fx_init(struct kvm_vcpu *vcpu)
7323 {
7324         fpstate_init(&vcpu->arch.guest_fpu.state);
7325         if (boot_cpu_has(X86_FEATURE_XSAVES))
7326                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7327                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7328
7329         /*
7330          * Ensure guest xcr0 is valid for loading
7331          */
7332         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7333
7334         vcpu->arch.cr0 |= X86_CR0_ET;
7335 }
7336
7337 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7338 {
7339         if (vcpu->guest_fpu_loaded)
7340                 return;
7341
7342         /*
7343          * Restore all possible states in the guest,
7344          * and assume host would use all available bits.
7345          * Guest xcr0 would be loaded later.
7346          */
7347         vcpu->guest_fpu_loaded = 1;
7348         __kernel_fpu_begin();
7349         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7350         trace_kvm_fpu(1);
7351 }
7352
7353 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7354 {
7355         if (!vcpu->guest_fpu_loaded) {
7356                 vcpu->fpu_counter = 0;
7357                 return;
7358         }
7359
7360         vcpu->guest_fpu_loaded = 0;
7361         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7362         __kernel_fpu_end();
7363         ++vcpu->stat.fpu_reload;
7364         /*
7365          * If using eager FPU mode, or if the guest is a frequent user
7366          * of the FPU, just leave the FPU active for next time.
7367          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7368          * the FPU in bursts will revert to loading it on demand.
7369          */
7370         if (!use_eager_fpu()) {
7371                 if (++vcpu->fpu_counter < 5)
7372                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7373         }
7374         trace_kvm_fpu(0);
7375 }
7376
7377 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7378 {
7379         kvmclock_reset(vcpu);
7380
7381         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7382         kvm_x86_ops->vcpu_free(vcpu);
7383 }
7384
7385 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7386                                                 unsigned int id)
7387 {
7388         struct kvm_vcpu *vcpu;
7389
7390         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7391                 printk_once(KERN_WARNING
7392                 "kvm: SMP vm created on host with unstable TSC; "
7393                 "guest TSC will not be reliable\n");
7394
7395         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7396
7397         return vcpu;
7398 }
7399
7400 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7401 {
7402         int r;
7403
7404         kvm_vcpu_mtrr_init(vcpu);
7405         r = vcpu_load(vcpu);
7406         if (r)
7407                 return r;
7408         kvm_vcpu_reset(vcpu, false);
7409         kvm_mmu_setup(vcpu);
7410         vcpu_put(vcpu);
7411         return r;
7412 }
7413
7414 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7415 {
7416         struct msr_data msr;
7417         struct kvm *kvm = vcpu->kvm;
7418
7419         if (vcpu_load(vcpu))
7420                 return;
7421         msr.data = 0x0;
7422         msr.index = MSR_IA32_TSC;
7423         msr.host_initiated = true;
7424         kvm_write_tsc(vcpu, &msr);
7425         vcpu_put(vcpu);
7426
7427         if (!kvmclock_periodic_sync)
7428                 return;
7429
7430         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7431                                         KVMCLOCK_SYNC_PERIOD);
7432 }
7433
7434 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7435 {
7436         int r;
7437         vcpu->arch.apf.msr_val = 0;
7438
7439         r = vcpu_load(vcpu);
7440         BUG_ON(r);
7441         kvm_mmu_unload(vcpu);
7442         vcpu_put(vcpu);
7443
7444         kvm_x86_ops->vcpu_free(vcpu);
7445 }
7446
7447 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7448 {
7449         vcpu->arch.hflags = 0;
7450
7451         vcpu->arch.smi_pending = 0;
7452         atomic_set(&vcpu->arch.nmi_queued, 0);
7453         vcpu->arch.nmi_pending = 0;
7454         vcpu->arch.nmi_injected = false;
7455         kvm_clear_interrupt_queue(vcpu);
7456         kvm_clear_exception_queue(vcpu);
7457
7458         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7459         kvm_update_dr0123(vcpu);
7460         vcpu->arch.dr6 = DR6_INIT;
7461         kvm_update_dr6(vcpu);
7462         vcpu->arch.dr7 = DR7_FIXED_1;
7463         kvm_update_dr7(vcpu);
7464
7465         vcpu->arch.cr2 = 0;
7466
7467         kvm_make_request(KVM_REQ_EVENT, vcpu);
7468         vcpu->arch.apf.msr_val = 0;
7469         vcpu->arch.st.msr_val = 0;
7470
7471         kvmclock_reset(vcpu);
7472
7473         kvm_clear_async_pf_completion_queue(vcpu);
7474         kvm_async_pf_hash_reset(vcpu);
7475         vcpu->arch.apf.halted = false;
7476
7477         if (!init_event) {
7478                 kvm_pmu_reset(vcpu);
7479                 vcpu->arch.smbase = 0x30000;
7480         }
7481
7482         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7483         vcpu->arch.regs_avail = ~0;
7484         vcpu->arch.regs_dirty = ~0;
7485
7486         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7487 }
7488
7489 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7490 {
7491         struct kvm_segment cs;
7492
7493         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7494         cs.selector = vector << 8;
7495         cs.base = vector << 12;
7496         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7497         kvm_rip_write(vcpu, 0);
7498 }
7499
7500 int kvm_arch_hardware_enable(void)
7501 {
7502         struct kvm *kvm;
7503         struct kvm_vcpu *vcpu;
7504         int i;
7505         int ret;
7506         u64 local_tsc;
7507         u64 max_tsc = 0;
7508         bool stable, backwards_tsc = false;
7509
7510         kvm_shared_msr_cpu_online();
7511         ret = kvm_x86_ops->hardware_enable();
7512         if (ret != 0)
7513                 return ret;
7514
7515         local_tsc = rdtsc();
7516         stable = !check_tsc_unstable();
7517         list_for_each_entry(kvm, &vm_list, vm_list) {
7518                 kvm_for_each_vcpu(i, vcpu, kvm) {
7519                         if (!stable && vcpu->cpu == smp_processor_id())
7520                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7521                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7522                                 backwards_tsc = true;
7523                                 if (vcpu->arch.last_host_tsc > max_tsc)
7524                                         max_tsc = vcpu->arch.last_host_tsc;
7525                         }
7526                 }
7527         }
7528
7529         /*
7530          * Sometimes, even reliable TSCs go backwards.  This happens on
7531          * platforms that reset TSC during suspend or hibernate actions, but
7532          * maintain synchronization.  We must compensate.  Fortunately, we can
7533          * detect that condition here, which happens early in CPU bringup,
7534          * before any KVM threads can be running.  Unfortunately, we can't
7535          * bring the TSCs fully up to date with real time, as we aren't yet far
7536          * enough into CPU bringup that we know how much real time has actually
7537          * elapsed; our helper function, get_kernel_ns() will be using boot
7538          * variables that haven't been updated yet.
7539          *
7540          * So we simply find the maximum observed TSC above, then record the
7541          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7542          * the adjustment will be applied.  Note that we accumulate
7543          * adjustments, in case multiple suspend cycles happen before some VCPU
7544          * gets a chance to run again.  In the event that no KVM threads get a
7545          * chance to run, we will miss the entire elapsed period, as we'll have
7546          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7547          * loose cycle time.  This isn't too big a deal, since the loss will be
7548          * uniform across all VCPUs (not to mention the scenario is extremely
7549          * unlikely). It is possible that a second hibernate recovery happens
7550          * much faster than a first, causing the observed TSC here to be
7551          * smaller; this would require additional padding adjustment, which is
7552          * why we set last_host_tsc to the local tsc observed here.
7553          *
7554          * N.B. - this code below runs only on platforms with reliable TSC,
7555          * as that is the only way backwards_tsc is set above.  Also note
7556          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7557          * have the same delta_cyc adjustment applied if backwards_tsc
7558          * is detected.  Note further, this adjustment is only done once,
7559          * as we reset last_host_tsc on all VCPUs to stop this from being
7560          * called multiple times (one for each physical CPU bringup).
7561          *
7562          * Platforms with unreliable TSCs don't have to deal with this, they
7563          * will be compensated by the logic in vcpu_load, which sets the TSC to
7564          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7565          * guarantee that they stay in perfect synchronization.
7566          */
7567         if (backwards_tsc) {
7568                 u64 delta_cyc = max_tsc - local_tsc;
7569                 backwards_tsc_observed = true;
7570                 list_for_each_entry(kvm, &vm_list, vm_list) {
7571                         kvm_for_each_vcpu(i, vcpu, kvm) {
7572                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7573                                 vcpu->arch.last_host_tsc = local_tsc;
7574                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7575                         }
7576
7577                         /*
7578                          * We have to disable TSC offset matching.. if you were
7579                          * booting a VM while issuing an S4 host suspend....
7580                          * you may have some problem.  Solving this issue is
7581                          * left as an exercise to the reader.
7582                          */
7583                         kvm->arch.last_tsc_nsec = 0;
7584                         kvm->arch.last_tsc_write = 0;
7585                 }
7586
7587         }
7588         return 0;
7589 }
7590
7591 void kvm_arch_hardware_disable(void)
7592 {
7593         kvm_x86_ops->hardware_disable();
7594         drop_user_return_notifiers();
7595 }
7596
7597 int kvm_arch_hardware_setup(void)
7598 {
7599         int r;
7600
7601         r = kvm_x86_ops->hardware_setup();
7602         if (r != 0)
7603                 return r;
7604
7605         if (kvm_has_tsc_control) {
7606                 /*
7607                  * Make sure the user can only configure tsc_khz values that
7608                  * fit into a signed integer.
7609                  * A min value is not calculated needed because it will always
7610                  * be 1 on all machines.
7611                  */
7612                 u64 max = min(0x7fffffffULL,
7613                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7614                 kvm_max_guest_tsc_khz = max;
7615
7616                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7617         }
7618
7619         kvm_init_msr_list();
7620         return 0;
7621 }
7622
7623 void kvm_arch_hardware_unsetup(void)
7624 {
7625         kvm_x86_ops->hardware_unsetup();
7626 }
7627
7628 void kvm_arch_check_processor_compat(void *rtn)
7629 {
7630         kvm_x86_ops->check_processor_compatibility(rtn);
7631 }
7632
7633 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7634 {
7635         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7636 }
7637 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7638
7639 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7640 {
7641         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7642 }
7643
7644 struct static_key kvm_no_apic_vcpu __read_mostly;
7645 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7646
7647 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7648 {
7649         struct page *page;
7650         struct kvm *kvm;
7651         int r;
7652
7653         BUG_ON(vcpu->kvm == NULL);
7654         kvm = vcpu->kvm;
7655
7656         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7657         vcpu->arch.pv.pv_unhalted = false;
7658         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7659         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7660                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7661         else
7662                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7663
7664         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7665         if (!page) {
7666                 r = -ENOMEM;
7667                 goto fail;
7668         }
7669         vcpu->arch.pio_data = page_address(page);
7670
7671         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7672
7673         r = kvm_mmu_create(vcpu);
7674         if (r < 0)
7675                 goto fail_free_pio_data;
7676
7677         if (irqchip_in_kernel(kvm)) {
7678                 r = kvm_create_lapic(vcpu);
7679                 if (r < 0)
7680                         goto fail_mmu_destroy;
7681         } else
7682                 static_key_slow_inc(&kvm_no_apic_vcpu);
7683
7684         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7685                                        GFP_KERNEL);
7686         if (!vcpu->arch.mce_banks) {
7687                 r = -ENOMEM;
7688                 goto fail_free_lapic;
7689         }
7690         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7691
7692         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7693                 r = -ENOMEM;
7694                 goto fail_free_mce_banks;
7695         }
7696
7697         fx_init(vcpu);
7698
7699         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7700         vcpu->arch.pv_time_enabled = false;
7701
7702         vcpu->arch.guest_supported_xcr0 = 0;
7703         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7704
7705         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7706
7707         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7708
7709         kvm_async_pf_hash_reset(vcpu);
7710         kvm_pmu_init(vcpu);
7711
7712         vcpu->arch.pending_external_vector = -1;
7713
7714         kvm_hv_vcpu_init(vcpu);
7715
7716         return 0;
7717
7718 fail_free_mce_banks:
7719         kfree(vcpu->arch.mce_banks);
7720 fail_free_lapic:
7721         kvm_free_lapic(vcpu);
7722 fail_mmu_destroy:
7723         kvm_mmu_destroy(vcpu);
7724 fail_free_pio_data:
7725         free_page((unsigned long)vcpu->arch.pio_data);
7726 fail:
7727         return r;
7728 }
7729
7730 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7731 {
7732         int idx;
7733
7734         kvm_hv_vcpu_uninit(vcpu);
7735         kvm_pmu_destroy(vcpu);
7736         kfree(vcpu->arch.mce_banks);
7737         kvm_free_lapic(vcpu);
7738         idx = srcu_read_lock(&vcpu->kvm->srcu);
7739         kvm_mmu_destroy(vcpu);
7740         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7741         free_page((unsigned long)vcpu->arch.pio_data);
7742         if (!lapic_in_kernel(vcpu))
7743                 static_key_slow_dec(&kvm_no_apic_vcpu);
7744 }
7745
7746 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7747 {
7748         kvm_x86_ops->sched_in(vcpu, cpu);
7749 }
7750
7751 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7752 {
7753         if (type)
7754                 return -EINVAL;
7755
7756         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7757         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7758         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7759         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7760         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7761
7762         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7763         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7764         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7765         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7766                 &kvm->arch.irq_sources_bitmap);
7767
7768         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7769         mutex_init(&kvm->arch.apic_map_lock);
7770         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7771
7772         pvclock_update_vm_gtod_copy(kvm);
7773
7774         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7775         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7776
7777         kvm_page_track_init(kvm);
7778         kvm_mmu_init_vm(kvm);
7779
7780         if (kvm_x86_ops->vm_init)
7781                 return kvm_x86_ops->vm_init(kvm);
7782
7783         return 0;
7784 }
7785
7786 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7787 {
7788         int r;
7789         r = vcpu_load(vcpu);
7790         BUG_ON(r);
7791         kvm_mmu_unload(vcpu);
7792         vcpu_put(vcpu);
7793 }
7794
7795 static void kvm_free_vcpus(struct kvm *kvm)
7796 {
7797         unsigned int i;
7798         struct kvm_vcpu *vcpu;
7799
7800         /*
7801          * Unpin any mmu pages first.
7802          */
7803         kvm_for_each_vcpu(i, vcpu, kvm) {
7804                 kvm_clear_async_pf_completion_queue(vcpu);
7805                 kvm_unload_vcpu_mmu(vcpu);
7806         }
7807         kvm_for_each_vcpu(i, vcpu, kvm)
7808                 kvm_arch_vcpu_free(vcpu);
7809
7810         mutex_lock(&kvm->lock);
7811         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7812                 kvm->vcpus[i] = NULL;
7813
7814         atomic_set(&kvm->online_vcpus, 0);
7815         mutex_unlock(&kvm->lock);
7816 }
7817
7818 void kvm_arch_sync_events(struct kvm *kvm)
7819 {
7820         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7821         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7822         kvm_free_all_assigned_devices(kvm);
7823         kvm_free_pit(kvm);
7824 }
7825
7826 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7827 {
7828         int i, r;
7829         unsigned long hva;
7830         struct kvm_memslots *slots = kvm_memslots(kvm);
7831         struct kvm_memory_slot *slot, old;
7832
7833         /* Called with kvm->slots_lock held.  */
7834         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7835                 return -EINVAL;
7836
7837         slot = id_to_memslot(slots, id);
7838         if (size) {
7839                 if (slot->npages)
7840                         return -EEXIST;
7841
7842                 /*
7843                  * MAP_SHARED to prevent internal slot pages from being moved
7844                  * by fork()/COW.
7845                  */
7846                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7847                               MAP_SHARED | MAP_ANONYMOUS, 0);
7848                 if (IS_ERR((void *)hva))
7849                         return PTR_ERR((void *)hva);
7850         } else {
7851                 if (!slot->npages)
7852                         return 0;
7853
7854                 hva = 0;
7855         }
7856
7857         old = *slot;
7858         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7859                 struct kvm_userspace_memory_region m;
7860
7861                 m.slot = id | (i << 16);
7862                 m.flags = 0;
7863                 m.guest_phys_addr = gpa;
7864                 m.userspace_addr = hva;
7865                 m.memory_size = size;
7866                 r = __kvm_set_memory_region(kvm, &m);
7867                 if (r < 0)
7868                         return r;
7869         }
7870
7871         if (!size) {
7872                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7873                 WARN_ON(r < 0);
7874         }
7875
7876         return 0;
7877 }
7878 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7879
7880 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7881 {
7882         int r;
7883
7884         mutex_lock(&kvm->slots_lock);
7885         r = __x86_set_memory_region(kvm, id, gpa, size);
7886         mutex_unlock(&kvm->slots_lock);
7887
7888         return r;
7889 }
7890 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7891
7892 void kvm_arch_destroy_vm(struct kvm *kvm)
7893 {
7894         if (current->mm == kvm->mm) {
7895                 /*
7896                  * Free memory regions allocated on behalf of userspace,
7897                  * unless the the memory map has changed due to process exit
7898                  * or fd copying.
7899                  */
7900                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7901                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7902                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7903         }
7904         if (kvm_x86_ops->vm_destroy)
7905                 kvm_x86_ops->vm_destroy(kvm);
7906         kvm_iommu_unmap_guest(kvm);
7907         kfree(kvm->arch.vpic);
7908         kfree(kvm->arch.vioapic);
7909         kvm_free_vcpus(kvm);
7910         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7911         kvm_mmu_uninit_vm(kvm);
7912 }
7913
7914 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7915                            struct kvm_memory_slot *dont)
7916 {
7917         int i;
7918
7919         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7920                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7921                         kvfree(free->arch.rmap[i]);
7922                         free->arch.rmap[i] = NULL;
7923                 }
7924                 if (i == 0)
7925                         continue;
7926
7927                 if (!dont || free->arch.lpage_info[i - 1] !=
7928                              dont->arch.lpage_info[i - 1]) {
7929                         kvfree(free->arch.lpage_info[i - 1]);
7930                         free->arch.lpage_info[i - 1] = NULL;
7931                 }
7932         }
7933
7934         kvm_page_track_free_memslot(free, dont);
7935 }
7936
7937 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7938                             unsigned long npages)
7939 {
7940         int i;
7941
7942         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7943                 struct kvm_lpage_info *linfo;
7944                 unsigned long ugfn;
7945                 int lpages;
7946                 int level = i + 1;
7947
7948                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7949                                       slot->base_gfn, level) + 1;
7950
7951                 slot->arch.rmap[i] =
7952                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7953                 if (!slot->arch.rmap[i])
7954                         goto out_free;
7955                 if (i == 0)
7956                         continue;
7957
7958                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
7959                 if (!linfo)
7960                         goto out_free;
7961
7962                 slot->arch.lpage_info[i - 1] = linfo;
7963
7964                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7965                         linfo[0].disallow_lpage = 1;
7966                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7967                         linfo[lpages - 1].disallow_lpage = 1;
7968                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7969                 /*
7970                  * If the gfn and userspace address are not aligned wrt each
7971                  * other, or if explicitly asked to, disable large page
7972                  * support for this slot
7973                  */
7974                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7975                     !kvm_largepages_enabled()) {
7976                         unsigned long j;
7977
7978                         for (j = 0; j < lpages; ++j)
7979                                 linfo[j].disallow_lpage = 1;
7980                 }
7981         }
7982
7983         if (kvm_page_track_create_memslot(slot, npages))
7984                 goto out_free;
7985
7986         return 0;
7987
7988 out_free:
7989         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7990                 kvfree(slot->arch.rmap[i]);
7991                 slot->arch.rmap[i] = NULL;
7992                 if (i == 0)
7993                         continue;
7994
7995                 kvfree(slot->arch.lpage_info[i - 1]);
7996                 slot->arch.lpage_info[i - 1] = NULL;
7997         }
7998         return -ENOMEM;
7999 }
8000
8001 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8002 {
8003         /*
8004          * memslots->generation has been incremented.
8005          * mmio generation may have reached its maximum value.
8006          */
8007         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8008 }
8009
8010 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8011                                 struct kvm_memory_slot *memslot,
8012                                 const struct kvm_userspace_memory_region *mem,
8013                                 enum kvm_mr_change change)
8014 {
8015         return 0;
8016 }
8017
8018 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8019                                      struct kvm_memory_slot *new)
8020 {
8021         /* Still write protect RO slot */
8022         if (new->flags & KVM_MEM_READONLY) {
8023                 kvm_mmu_slot_remove_write_access(kvm, new);
8024                 return;
8025         }
8026
8027         /*
8028          * Call kvm_x86_ops dirty logging hooks when they are valid.
8029          *
8030          * kvm_x86_ops->slot_disable_log_dirty is called when:
8031          *
8032          *  - KVM_MR_CREATE with dirty logging is disabled
8033          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8034          *
8035          * The reason is, in case of PML, we need to set D-bit for any slots
8036          * with dirty logging disabled in order to eliminate unnecessary GPA
8037          * logging in PML buffer (and potential PML buffer full VMEXT). This
8038          * guarantees leaving PML enabled during guest's lifetime won't have
8039          * any additonal overhead from PML when guest is running with dirty
8040          * logging disabled for memory slots.
8041          *
8042          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8043          * to dirty logging mode.
8044          *
8045          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8046          *
8047          * In case of write protect:
8048          *
8049          * Write protect all pages for dirty logging.
8050          *
8051          * All the sptes including the large sptes which point to this
8052          * slot are set to readonly. We can not create any new large
8053          * spte on this slot until the end of the logging.
8054          *
8055          * See the comments in fast_page_fault().
8056          */
8057         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8058                 if (kvm_x86_ops->slot_enable_log_dirty)
8059                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8060                 else
8061                         kvm_mmu_slot_remove_write_access(kvm, new);
8062         } else {
8063                 if (kvm_x86_ops->slot_disable_log_dirty)
8064                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8065         }
8066 }
8067
8068 void kvm_arch_commit_memory_region(struct kvm *kvm,
8069                                 const struct kvm_userspace_memory_region *mem,
8070                                 const struct kvm_memory_slot *old,
8071                                 const struct kvm_memory_slot *new,
8072                                 enum kvm_mr_change change)
8073 {
8074         int nr_mmu_pages = 0;
8075
8076         if (!kvm->arch.n_requested_mmu_pages)
8077                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8078
8079         if (nr_mmu_pages)
8080                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8081
8082         /*
8083          * Dirty logging tracks sptes in 4k granularity, meaning that large
8084          * sptes have to be split.  If live migration is successful, the guest
8085          * in the source machine will be destroyed and large sptes will be
8086          * created in the destination. However, if the guest continues to run
8087          * in the source machine (for example if live migration fails), small
8088          * sptes will remain around and cause bad performance.
8089          *
8090          * Scan sptes if dirty logging has been stopped, dropping those
8091          * which can be collapsed into a single large-page spte.  Later
8092          * page faults will create the large-page sptes.
8093          */
8094         if ((change != KVM_MR_DELETE) &&
8095                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8096                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8097                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8098
8099         /*
8100          * Set up write protection and/or dirty logging for the new slot.
8101          *
8102          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8103          * been zapped so no dirty logging staff is needed for old slot. For
8104          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8105          * new and it's also covered when dealing with the new slot.
8106          *
8107          * FIXME: const-ify all uses of struct kvm_memory_slot.
8108          */
8109         if (change != KVM_MR_DELETE)
8110                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8111 }
8112
8113 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8114 {
8115         kvm_mmu_invalidate_zap_all_pages(kvm);
8116 }
8117
8118 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8119                                    struct kvm_memory_slot *slot)
8120 {
8121         kvm_mmu_invalidate_zap_all_pages(kvm);
8122 }
8123
8124 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8125 {
8126         if (!list_empty_careful(&vcpu->async_pf.done))
8127                 return true;
8128
8129         if (kvm_apic_has_events(vcpu))
8130                 return true;
8131
8132         if (vcpu->arch.pv.pv_unhalted)
8133                 return true;
8134
8135         if (atomic_read(&vcpu->arch.nmi_queued))
8136                 return true;
8137
8138         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8139                 return true;
8140
8141         if (kvm_arch_interrupt_allowed(vcpu) &&
8142             kvm_cpu_has_interrupt(vcpu))
8143                 return true;
8144
8145         if (kvm_hv_has_stimer_pending(vcpu))
8146                 return true;
8147
8148         return false;
8149 }
8150
8151 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8152 {
8153         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8154                 kvm_x86_ops->check_nested_events(vcpu, false);
8155
8156         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8157 }
8158
8159 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8160 {
8161         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8162 }
8163
8164 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8165 {
8166         return kvm_x86_ops->interrupt_allowed(vcpu);
8167 }
8168
8169 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8170 {
8171         if (is_64_bit_mode(vcpu))
8172                 return kvm_rip_read(vcpu);
8173         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8174                      kvm_rip_read(vcpu));
8175 }
8176 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8177
8178 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8179 {
8180         return kvm_get_linear_rip(vcpu) == linear_rip;
8181 }
8182 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8183
8184 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8185 {
8186         unsigned long rflags;
8187
8188         rflags = kvm_x86_ops->get_rflags(vcpu);
8189         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8190                 rflags &= ~X86_EFLAGS_TF;
8191         return rflags;
8192 }
8193 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8194
8195 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8196 {
8197         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8198             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8199                 rflags |= X86_EFLAGS_TF;
8200         kvm_x86_ops->set_rflags(vcpu, rflags);
8201 }
8202
8203 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8204 {
8205         __kvm_set_rflags(vcpu, rflags);
8206         kvm_make_request(KVM_REQ_EVENT, vcpu);
8207 }
8208 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8209
8210 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8211 {
8212         int r;
8213
8214         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8215               work->wakeup_all)
8216                 return;
8217
8218         r = kvm_mmu_reload(vcpu);
8219         if (unlikely(r))
8220                 return;
8221
8222         if (!vcpu->arch.mmu.direct_map &&
8223               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8224                 return;
8225
8226         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8227 }
8228
8229 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8230 {
8231         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8232 }
8233
8234 static inline u32 kvm_async_pf_next_probe(u32 key)
8235 {
8236         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8237 }
8238
8239 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8240 {
8241         u32 key = kvm_async_pf_hash_fn(gfn);
8242
8243         while (vcpu->arch.apf.gfns[key] != ~0)
8244                 key = kvm_async_pf_next_probe(key);
8245
8246         vcpu->arch.apf.gfns[key] = gfn;
8247 }
8248
8249 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8250 {
8251         int i;
8252         u32 key = kvm_async_pf_hash_fn(gfn);
8253
8254         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8255                      (vcpu->arch.apf.gfns[key] != gfn &&
8256                       vcpu->arch.apf.gfns[key] != ~0); i++)
8257                 key = kvm_async_pf_next_probe(key);
8258
8259         return key;
8260 }
8261
8262 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8263 {
8264         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8265 }
8266
8267 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8268 {
8269         u32 i, j, k;
8270
8271         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8272         while (true) {
8273                 vcpu->arch.apf.gfns[i] = ~0;
8274                 do {
8275                         j = kvm_async_pf_next_probe(j);
8276                         if (vcpu->arch.apf.gfns[j] == ~0)
8277                                 return;
8278                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8279                         /*
8280                          * k lies cyclically in ]i,j]
8281                          * |    i.k.j |
8282                          * |....j i.k.| or  |.k..j i...|
8283                          */
8284                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8285                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8286                 i = j;
8287         }
8288 }
8289
8290 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8291 {
8292
8293         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8294                                       sizeof(val));
8295 }
8296
8297 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8298                                      struct kvm_async_pf *work)
8299 {
8300         struct x86_exception fault;
8301
8302         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8303         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8304
8305         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8306             (vcpu->arch.apf.send_user_only &&
8307              kvm_x86_ops->get_cpl(vcpu) == 0))
8308                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8309         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8310                 fault.vector = PF_VECTOR;
8311                 fault.error_code_valid = true;
8312                 fault.error_code = 0;
8313                 fault.nested_page_fault = false;
8314                 fault.address = work->arch.token;
8315                 kvm_inject_page_fault(vcpu, &fault);
8316         }
8317 }
8318
8319 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8320                                  struct kvm_async_pf *work)
8321 {
8322         struct x86_exception fault;
8323
8324         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8325         if (work->wakeup_all)
8326                 work->arch.token = ~0; /* broadcast wakeup */
8327         else
8328                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8329
8330         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8331             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8332                 fault.vector = PF_VECTOR;
8333                 fault.error_code_valid = true;
8334                 fault.error_code = 0;
8335                 fault.nested_page_fault = false;
8336                 fault.address = work->arch.token;
8337                 kvm_inject_page_fault(vcpu, &fault);
8338         }
8339         vcpu->arch.apf.halted = false;
8340         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8341 }
8342
8343 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8344 {
8345         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8346                 return true;
8347         else
8348                 return !kvm_event_needs_reinjection(vcpu) &&
8349                         kvm_x86_ops->interrupt_allowed(vcpu);
8350 }
8351
8352 void kvm_arch_start_assignment(struct kvm *kvm)
8353 {
8354         atomic_inc(&kvm->arch.assigned_device_count);
8355 }
8356 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8357
8358 void kvm_arch_end_assignment(struct kvm *kvm)
8359 {
8360         atomic_dec(&kvm->arch.assigned_device_count);
8361 }
8362 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8363
8364 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8365 {
8366         return atomic_read(&kvm->arch.assigned_device_count);
8367 }
8368 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8369
8370 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8371 {
8372         atomic_inc(&kvm->arch.noncoherent_dma_count);
8373 }
8374 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8375
8376 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8377 {
8378         atomic_dec(&kvm->arch.noncoherent_dma_count);
8379 }
8380 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8381
8382 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8383 {
8384         return atomic_read(&kvm->arch.noncoherent_dma_count);
8385 }
8386 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8387
8388 bool kvm_arch_has_irq_bypass(void)
8389 {
8390         return kvm_x86_ops->update_pi_irte != NULL;
8391 }
8392
8393 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8394                                       struct irq_bypass_producer *prod)
8395 {
8396         struct kvm_kernel_irqfd *irqfd =
8397                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8398
8399         irqfd->producer = prod;
8400
8401         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8402                                            prod->irq, irqfd->gsi, 1);
8403 }
8404
8405 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8406                                       struct irq_bypass_producer *prod)
8407 {
8408         int ret;
8409         struct kvm_kernel_irqfd *irqfd =
8410                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8411
8412         WARN_ON(irqfd->producer != prod);
8413         irqfd->producer = NULL;
8414
8415         /*
8416          * When producer of consumer is unregistered, we change back to
8417          * remapped mode, so we can re-use the current implementation
8418          * when the irq is masked/disabled or the consumer side (KVM
8419          * int this case doesn't want to receive the interrupts.
8420         */
8421         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8422         if (ret)
8423                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8424                        " fails: %d\n", irqfd->consumer.token, ret);
8425 }
8426
8427 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8428                                    uint32_t guest_irq, bool set)
8429 {
8430         if (!kvm_x86_ops->update_pi_irte)
8431                 return -EINVAL;
8432
8433         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8434 }
8435
8436 bool kvm_vector_hashing_enabled(void)
8437 {
8438         return vector_hashing;
8439 }
8440 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8441
8442 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8443 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8444 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8445 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8446 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8447 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8448 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8449 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8450 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8451 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8452 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8453 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8454 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8455 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8456 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8457 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8458 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8459 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8460 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);