arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 500;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 139 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 141
 142 static bool __read_mostly vector_hashing = true;
 143 module_param(vector_hashing, bool, S_IRUGO);
 144
 145 #define KVM_NR_SHARED_MSRS 16
 146
 147 struct kvm_shared_msrs_global {
 148         int nr;
 149         u32 msrs[KVM_NR_SHARED_MSRS];
 150 };
 151
 152 struct kvm_shared_msrs {
 153         struct user_return_notifier urn;
 154         bool registered;
 155         struct kvm_shared_msr_values {
 156                 u64 host;
 157                 u64 curr;
 158         } values[KVM_NR_SHARED_MSRS];
 159 };
 160
 161 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 162 static struct kvm_shared_msrs __percpu *shared_msrs;
 163
 164 struct kvm_stats_debugfs_item debugfs_entries[] = {
 165         { "pf_fixed", VCPU_STAT(pf_fixed) },
 166         { "pf_guest", VCPU_STAT(pf_guest) },
 167         { "tlb_flush", VCPU_STAT(tlb_flush) },
 168         { "invlpg", VCPU_STAT(invlpg) },
 169         { "exits", VCPU_STAT(exits) },
 170         { "io_exits", VCPU_STAT(io_exits) },
 171         { "mmio_exits", VCPU_STAT(mmio_exits) },
 172         { "signal_exits", VCPU_STAT(signal_exits) },
 173         { "irq_window", VCPU_STAT(irq_window_exits) },
 174         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 175         { "halt_exits", VCPU_STAT(halt_exits) },
 176         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 177         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 178         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 179         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 180         { "hypercalls", VCPU_STAT(hypercalls) },
 181         { "request_irq", VCPU_STAT(request_irq_exits) },
 182         { "irq_exits", VCPU_STAT(irq_exits) },
 183         { "host_state_reload", VCPU_STAT(host_state_reload) },
 184         { "fpu_reload", VCPU_STAT(fpu_reload) },
 185         { "insn_emulation", VCPU_STAT(insn_emulation) },
 186         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 187         { "irq_injections", VCPU_STAT(irq_injections) },
 188         { "nmi_injections", VCPU_STAT(nmi_injections) },
 189         { "req_event", VCPU_STAT(req_event) },
 190         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 191         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 192         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 193         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 194         { "mmu_flooded", VM_STAT(mmu_flooded) },
 195         { "mmu_recycled", VM_STAT(mmu_recycled) },
 196         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 197         { "mmu_unsync", VM_STAT(mmu_unsync) },
 198         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 199         { "largepages", VM_STAT(lpages) },
 200         { "max_mmu_page_hash_collisions",
 201                 VM_STAT(max_mmu_page_hash_collisions) },
 202         { NULL }
 203 };
 204
 205 u64 __read_mostly host_xcr0;
 206
 207 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 208
 209 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 210 {
 211         int i;
 212         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 213                 vcpu->arch.apf.gfns[i] = ~0;
 214 }
 215
 216 static void kvm_on_user_return(struct user_return_notifier *urn)
 217 {
 218         unsigned slot;
 219         struct kvm_shared_msrs *locals
 220                 = container_of(urn, struct kvm_shared_msrs, urn);
 221         struct kvm_shared_msr_values *values;
 222         unsigned long flags;
 223
 224         /*
 225          * Disabling irqs at this point since the following code could be
 226          * interrupted and executed through kvm_arch_hardware_disable()
 227          */
 228         local_irq_save(flags);
 229         if (locals->registered) {
 230                 locals->registered = false;
 231                 user_return_notifier_unregister(urn);
 232         }
 233         local_irq_restore(flags);
 234         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 235                 values = &locals->values[slot];
 236                 if (values->host != values->curr) {
 237                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 238                         values->curr = values->host;
 239                 }
 240         }
 241 }
 242
 243 static void shared_msr_update(unsigned slot, u32 msr)
 244 {
 245         u64 value;
 246         unsigned int cpu = smp_processor_id();
 247         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 248
 249         /* only read, and nobody should modify it at this time,
 250          * so don't need lock */
 251         if (slot >= shared_msrs_global.nr) {
 252                 printk(KERN_ERR "kvm: invalid MSR slot!");
 253                 return;
 254         }
 255         rdmsrl_safe(msr, &value);
 256         smsr->values[slot].host = value;
 257         smsr->values[slot].curr = value;
 258 }
 259
 260 void kvm_define_shared_msr(unsigned slot, u32 msr)
 261 {
 262         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 263         shared_msrs_global.msrs[slot] = msr;
 264         if (slot >= shared_msrs_global.nr)
 265                 shared_msrs_global.nr = slot + 1;
 266 }
 267 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 268
 269 static void kvm_shared_msr_cpu_online(void)
 270 {
 271         unsigned i;
 272
 273         for (i = 0; i < shared_msrs_global.nr; ++i)
 274                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 275 }
 276
 277 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 278 {
 279         unsigned int cpu = smp_processor_id();
 280         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 281         int err;
 282
 283         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 284                 return 0;
 285         smsr->values[slot].curr = value;
 286         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 287         if (err)
 288                 return 1;
 289
 290         if (!smsr->registered) {
 291                 smsr->urn.on_user_return = kvm_on_user_return;
 292                 user_return_notifier_register(&smsr->urn);
 293                 smsr->registered = true;
 294         }
 295         return 0;
 296 }
 297 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 298
 299 static void drop_user_return_notifiers(void)
 300 {
 301         unsigned int cpu = smp_processor_id();
 302         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 303
 304         if (smsr->registered)
 305                 kvm_on_user_return(&smsr->urn);
 306 }
 307
 308 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 309 {
 310         return vcpu->arch.apic_base;
 311 }
 312 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 313
 314 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 315 {
 316         u64 old_state = vcpu->arch.apic_base &
 317                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 318         u64 new_state = msr_info->data &
 319                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 320         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 321                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 322
 323         if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
 324                 return 1;
 325         if (!msr_info->host_initiated &&
 326             ((new_state == MSR_IA32_APICBASE_ENABLE &&
 327               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 328              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 329               old_state == 0)))
 330                 return 1;
 331
 332         kvm_lapic_set_base(vcpu, msr_info->data);
 333         return 0;
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 336
 337 asmlinkage __visible void kvm_spurious_fault(void)
 338 {
 339         /* Fault while not rebooting.  We want the trace. */
 340         BUG();
 341 }
 342 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 343
 344 #define EXCPT_BENIGN            0
 345 #define EXCPT_CONTRIBUTORY      1
 346 #define EXCPT_PF                2
 347
 348 static int exception_class(int vector)
 349 {
 350         switch (vector) {
 351         case PF_VECTOR:
 352                 return EXCPT_PF;
 353         case DE_VECTOR:
 354         case TS_VECTOR:
 355         case NP_VECTOR:
 356         case SS_VECTOR:
 357         case GP_VECTOR:
 358                 return EXCPT_CONTRIBUTORY;
 359         default:
 360                 break;
 361         }
 362         return EXCPT_BENIGN;
 363 }
 364
 365 #define EXCPT_FAULT             0
 366 #define EXCPT_TRAP              1
 367 #define EXCPT_ABORT             2
 368 #define EXCPT_INTERRUPT         3
 369
 370 static int exception_type(int vector)
 371 {
 372         unsigned int mask;
 373
 374         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 375                 return EXCPT_INTERRUPT;
 376
 377         mask = 1 << vector;
 378
 379         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 380         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 381                 return EXCPT_TRAP;
 382
 383         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 384                 return EXCPT_ABORT;
 385
 386         /* Reserved exceptions will result in fault */
 387         return EXCPT_FAULT;
 388 }
 389
 390 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 391                 unsigned nr, bool has_error, u32 error_code,
 392                 bool reinject)
 393 {
 394         u32 prev_nr;
 395         int class1, class2;
 396
 397         kvm_make_request(KVM_REQ_EVENT, vcpu);
 398
 399         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 400         queue:
 401                 if (has_error && !is_protmode(vcpu))
 402                         has_error = false;
 403                 if (reinject) {
 404                         /*
 405                          * On vmentry, vcpu->arch.exception.pending is only
 406                          * true if an event injection was blocked by
 407                          * nested_run_pending.  In that case, however,
 408                          * vcpu_enter_guest requests an immediate exit,
 409                          * and the guest shouldn't proceed far enough to
 410                          * need reinjection.
 411                          */
 412                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 413                         vcpu->arch.exception.injected = true;
 414                 } else {
 415                         vcpu->arch.exception.pending = true;
 416                         vcpu->arch.exception.injected = false;
 417                 }
 418                 vcpu->arch.exception.has_error_code = has_error;
 419                 vcpu->arch.exception.nr = nr;
 420                 vcpu->arch.exception.error_code = error_code;
 421                 return;
 422         }
 423
 424         /* to check exception */
 425         prev_nr = vcpu->arch.exception.nr;
 426         if (prev_nr == DF_VECTOR) {
 427                 /* triple fault -> shutdown */
 428                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 429                 return;
 430         }
 431         class1 = exception_class(prev_nr);
 432         class2 = exception_class(nr);
 433         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 434                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 435                 /*
 436                  * Generate double fault per SDM Table 5-5.  Set
 437                  * exception.pending = true so that the double fault
 438                  * can trigger a nested vmexit.
 439                  */
 440                 vcpu->arch.exception.pending = true;
 441                 vcpu->arch.exception.injected = false;
 442                 vcpu->arch.exception.has_error_code = true;
 443                 vcpu->arch.exception.nr = DF_VECTOR;
 444                 vcpu->arch.exception.error_code = 0;
 445         } else
 446                 /* replace previous exception with a new one in a hope
 447                    that instruction re-execution will regenerate lost
 448                    exception */
 449                 goto queue;
 450 }
 451
 452 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 453 {
 454         kvm_multiple_exception(vcpu, nr, false, 0, false);
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 457
 458 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 459 {
 460         kvm_multiple_exception(vcpu, nr, false, 0, true);
 461 }
 462 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 463
 464 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 465 {
 466         if (err)
 467                 kvm_inject_gp(vcpu, 0);
 468         else
 469                 return kvm_skip_emulated_instruction(vcpu);
 470
 471         return 1;
 472 }
 473 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 474
 475 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 476 {
 477         ++vcpu->stat.pf_guest;
 478         vcpu->arch.exception.nested_apf =
 479                 is_guest_mode(vcpu) && fault->async_page_fault;
 480         if (vcpu->arch.exception.nested_apf)
 481                 vcpu->arch.apf.nested_apf_token = fault->address;
 482         else
 483                 vcpu->arch.cr2 = fault->address;
 484         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 485 }
 486 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 487
 488 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 489 {
 490         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 491                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 492         else
 493                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 494
 495         return fault->nested_page_fault;
 496 }
 497
 498 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 499 {
 500         atomic_inc(&vcpu->arch.nmi_queued);
 501         kvm_make_request(KVM_REQ_NMI, vcpu);
 502 }
 503 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 504
 505 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 506 {
 507         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 508 }
 509 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 510
 511 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 512 {
 513         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 514 }
 515 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 516
 517 /*
 518  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 519  * a #GP and return false.
 520  */
 521 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 522 {
 523         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 524                 return true;
 525         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 526         return false;
 527 }
 528 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 529
 530 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 531 {
 532         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 533                 return true;
 534
 535         kvm_queue_exception(vcpu, UD_VECTOR);
 536         return false;
 537 }
 538 EXPORT_SYMBOL_GPL(kvm_require_dr);
 539
 540 /*
 541  * This function will be used to read from the physical memory of the currently
 542  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 543  * can read from guest physical or from the guest's guest physical memory.
 544  */
 545 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 546                             gfn_t ngfn, void *data, int offset, int len,
 547                             u32 access)
 548 {
 549         struct x86_exception exception;
 550         gfn_t real_gfn;
 551         gpa_t ngpa;
 552
 553         ngpa     = gfn_to_gpa(ngfn);
 554         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 555         if (real_gfn == UNMAPPED_GVA)
 556                 return -EFAULT;
 557
 558         real_gfn = gpa_to_gfn(real_gfn);
 559
 560         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 561 }
 562 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 563
 564 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 565                                void *data, int offset, int len, u32 access)
 566 {
 567         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 568                                        data, offset, len, access);
 569 }
 570
 571 /*
 572  * Load the pae pdptrs.  Return true is they are all valid.
 573  */
 574 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 575 {
 576         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 577         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 578         int i;
 579         int ret;
 580         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 581
 582         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 583                                       offset * sizeof(u64), sizeof(pdpte),
 584                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 585         if (ret < 0) {
 586                 ret = 0;
 587                 goto out;
 588         }
 589         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 590                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 591                     (pdpte[i] &
 592                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 593                         ret = 0;
 594                         goto out;
 595                 }
 596         }
 597         ret = 1;
 598
 599         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 600         __set_bit(VCPU_EXREG_PDPTR,
 601                   (unsigned long *)&vcpu->arch.regs_avail);
 602         __set_bit(VCPU_EXREG_PDPTR,
 603                   (unsigned long *)&vcpu->arch.regs_dirty);
 604 out:
 605
 606         return ret;
 607 }
 608 EXPORT_SYMBOL_GPL(load_pdptrs);
 609
 610 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 611 {
 612         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 613         bool changed = true;
 614         int offset;
 615         gfn_t gfn;
 616         int r;
 617
 618         if (is_long_mode(vcpu) || !is_pae(vcpu))
 619                 return false;
 620
 621         if (!test_bit(VCPU_EXREG_PDPTR,
 622                       (unsigned long *)&vcpu->arch.regs_avail))
 623                 return true;
 624
 625         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 626         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 627         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 628                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 629         if (r < 0)
 630                 goto out;
 631         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 632 out:
 633
 634         return changed;
 635 }
 636 EXPORT_SYMBOL_GPL(pdptrs_changed);
 637
 638 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 639 {
 640         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 641         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 642
 643         cr0 |= X86_CR0_ET;
 644
 645 #ifdef CONFIG_X86_64
 646         if (cr0 & 0xffffffff00000000UL)
 647                 return 1;
 648 #endif
 649
 650         cr0 &= ~CR0_RESERVED_BITS;
 651
 652         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 653                 return 1;
 654
 655         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 656                 return 1;
 657
 658         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 659 #ifdef CONFIG_X86_64
 660                 if ((vcpu->arch.efer & EFER_LME)) {
 661                         int cs_db, cs_l;
 662
 663                         if (!is_pae(vcpu))
 664                                 return 1;
 665                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 666                         if (cs_l)
 667                                 return 1;
 668                 } else
 669 #endif
 670                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 671                                                  kvm_read_cr3(vcpu)))
 672                         return 1;
 673         }
 674
 675         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 676                 return 1;
 677
 678         kvm_x86_ops->set_cr0(vcpu, cr0);
 679
 680         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 681                 kvm_clear_async_pf_completion_queue(vcpu);
 682                 kvm_async_pf_hash_reset(vcpu);
 683         }
 684
 685         if ((cr0 ^ old_cr0) & update_bits)
 686                 kvm_mmu_reset_context(vcpu);
 687
 688         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 689             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 690             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 691                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 692
 693         return 0;
 694 }
 695 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 696
 697 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 698 {
 699         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 700 }
 701 EXPORT_SYMBOL_GPL(kvm_lmsw);
 702
 703 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 704 {
 705         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 706                         !vcpu->guest_xcr0_loaded) {
 707                 /* kvm_set_xcr() also depends on this */
 708                 if (vcpu->arch.xcr0 != host_xcr0)
 709                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 710                 vcpu->guest_xcr0_loaded = 1;
 711         }
 712 }
 713
 714 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 715 {
 716         if (vcpu->guest_xcr0_loaded) {
 717                 if (vcpu->arch.xcr0 != host_xcr0)
 718                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 719                 vcpu->guest_xcr0_loaded = 0;
 720         }
 721 }
 722
 723 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 724 {
 725         u64 xcr0 = xcr;
 726         u64 old_xcr0 = vcpu->arch.xcr0;
 727         u64 valid_bits;
 728
 729         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 730         if (index != XCR_XFEATURE_ENABLED_MASK)
 731                 return 1;
 732         if (!(xcr0 & XFEATURE_MASK_FP))
 733                 return 1;
 734         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 735                 return 1;
 736
 737         /*
 738          * Do not allow the guest to set bits that we do not support
 739          * saving.  However, xcr0 bit 0 is always set, even if the
 740          * emulated CPU does not support XSAVE (see fx_init).
 741          */
 742         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 743         if (xcr0 & ~valid_bits)
 744                 return 1;
 745
 746         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 747             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 748                 return 1;
 749
 750         if (xcr0 & XFEATURE_MASK_AVX512) {
 751                 if (!(xcr0 & XFEATURE_MASK_YMM))
 752                         return 1;
 753                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 754                         return 1;
 755         }
 756         vcpu->arch.xcr0 = xcr0;
 757
 758         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 759                 kvm_update_cpuid(vcpu);
 760         return 0;
 761 }
 762
 763 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 764 {
 765         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 766             __kvm_set_xcr(vcpu, index, xcr)) {
 767                 kvm_inject_gp(vcpu, 0);
 768                 return 1;
 769         }
 770         return 0;
 771 }
 772 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 773
 774 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 775 {
 776         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 777         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 778                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 779
 780         if (cr4 & CR4_RESERVED_BITS)
 781                 return 1;
 782
 783         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 784                 return 1;
 785
 786         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 787                 return 1;
 788
 789         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 790                 return 1;
 791
 792         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 793                 return 1;
 794
 795         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 796                 return 1;
 797
 798         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 799                 return 1;
 800
 801         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 802                 return 1;
 803
 804         if (is_long_mode(vcpu)) {
 805                 if (!(cr4 & X86_CR4_PAE))
 806                         return 1;
 807         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 808                    && ((cr4 ^ old_cr4) & pdptr_bits)
 809                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 810                                    kvm_read_cr3(vcpu)))
 811                 return 1;
 812
 813         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 814                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 815                         return 1;
 816
 817                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 818                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 819                         return 1;
 820         }
 821
 822         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 823                 return 1;
 824
 825         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 826             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 827                 kvm_mmu_reset_context(vcpu);
 828
 829         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 830                 kvm_update_cpuid(vcpu);
 831
 832         return 0;
 833 }
 834 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 835
 836 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 837 {
 838 #ifdef CONFIG_X86_64
 839         cr3 &= ~CR3_PCID_INVD;
 840 #endif
 841
 842         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 843                 kvm_mmu_sync_roots(vcpu);
 844                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 845                 return 0;
 846         }
 847
 848         if (is_long_mode(vcpu) &&
 849             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 62)))
 850                 return 1;
 851         else if (is_pae(vcpu) && is_paging(vcpu) &&
 852                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 853                 return 1;
 854
 855         vcpu->arch.cr3 = cr3;
 856         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 857         kvm_mmu_new_cr3(vcpu);
 858         return 0;
 859 }
 860 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 861
 862 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 863 {
 864         if (cr8 & CR8_RESERVED_BITS)
 865                 return 1;
 866         if (lapic_in_kernel(vcpu))
 867                 kvm_lapic_set_tpr(vcpu, cr8);
 868         else
 869                 vcpu->arch.cr8 = cr8;
 870         return 0;
 871 }
 872 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 873
 874 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 875 {
 876         if (lapic_in_kernel(vcpu))
 877                 return kvm_lapic_get_cr8(vcpu);
 878         else
 879                 return vcpu->arch.cr8;
 880 }
 881 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 882
 883 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 884 {
 885         int i;
 886
 887         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 888                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 889                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 890                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 891         }
 892 }
 893
 894 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 895 {
 896         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 897                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 898 }
 899
 900 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 901 {
 902         unsigned long dr7;
 903
 904         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 905                 dr7 = vcpu->arch.guest_debug_dr7;
 906         else
 907                 dr7 = vcpu->arch.dr7;
 908         kvm_x86_ops->set_dr7(vcpu, dr7);
 909         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 910         if (dr7 & DR7_BP_EN_MASK)
 911                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 912 }
 913
 914 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 915 {
 916         u64 fixed = DR6_FIXED_1;
 917
 918         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 919                 fixed |= DR6_RTM;
 920         return fixed;
 921 }
 922
 923 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 924 {
 925         switch (dr) {
 926         case 0 ... 3:
 927                 vcpu->arch.db[dr] = val;
 928                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 929                         vcpu->arch.eff_db[dr] = val;
 930                 break;
 931         case 4:
 932                 /* fall through */
 933         case 6:
 934                 if (val & 0xffffffff00000000ULL)
 935                         return -1; /* #GP */
 936                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 937                 kvm_update_dr6(vcpu);
 938                 break;
 939         case 5:
 940                 /* fall through */
 941         default: /* 7 */
 942                 if (val & 0xffffffff00000000ULL)
 943                         return -1; /* #GP */
 944                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 945                 kvm_update_dr7(vcpu);
 946                 break;
 947         }
 948
 949         return 0;
 950 }
 951
 952 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 953 {
 954         if (__kvm_set_dr(vcpu, dr, val)) {
 955                 kvm_inject_gp(vcpu, 0);
 956                 return 1;
 957         }
 958         return 0;
 959 }
 960 EXPORT_SYMBOL_GPL(kvm_set_dr);
 961
 962 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 963 {
 964         switch (dr) {
 965         case 0 ... 3:
 966                 *val = vcpu->arch.db[dr];
 967                 break;
 968         case 4:
 969                 /* fall through */
 970         case 6:
 971                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 972                         *val = vcpu->arch.dr6;
 973                 else
 974                         *val = kvm_x86_ops->get_dr6(vcpu);
 975                 break;
 976         case 5:
 977                 /* fall through */
 978         default: /* 7 */
 979                 *val = vcpu->arch.dr7;
 980                 break;
 981         }
 982         return 0;
 983 }
 984 EXPORT_SYMBOL_GPL(kvm_get_dr);
 985
 986 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 987 {
 988         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 989         u64 data;
 990         int err;
 991
 992         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 993         if (err)
 994                 return err;
 995         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 996         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 997         return err;
 998 }
 999 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1000
1001 /*
1002  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1003  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1004  *
1005  * This list is modified at module load time to reflect the
1006  * capabilities of the host cpu. This capabilities test skips MSRs that are
1007  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1008  * may depend on host virtualization features rather than host cpu features.
1009  */
1010
1011 static u32 msrs_to_save[] = {
1012         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1013         MSR_STAR,
1014 #ifdef CONFIG_X86_64
1015         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1016 #endif
1017         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1018         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1019         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1020 };
1021
1022 static unsigned num_msrs_to_save;
1023
1024 static u32 emulated_msrs[] = {
1025         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1026         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1027         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1028         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1029         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1030         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1031         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1032         HV_X64_MSR_RESET,
1033         HV_X64_MSR_VP_INDEX,
1034         HV_X64_MSR_VP_RUNTIME,
1035         HV_X64_MSR_SCONTROL,
1036         HV_X64_MSR_STIMER0_CONFIG,
1037         HV_X64_MSR_APIC_ASSIST_PAGE,
1038         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1039         HV_X64_MSR_TSC_EMULATION_STATUS,
1040
1041         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1042         MSR_KVM_PV_EOI_EN,
1043
1044         MSR_IA32_TSC_ADJUST,
1045         MSR_IA32_TSCDEADLINE,
1046         MSR_IA32_MISC_ENABLE,
1047         MSR_IA32_MCG_STATUS,
1048         MSR_IA32_MCG_CTL,
1049         MSR_IA32_MCG_EXT_CTL,
1050         MSR_IA32_SMBASE,
1051         MSR_SMI_COUNT,
1052         MSR_PLATFORM_INFO,
1053         MSR_MISC_FEATURES_ENABLES,
1054 };
1055
1056 static unsigned num_emulated_msrs;
1057
1058 /*
1059  * List of msr numbers which are used to expose MSR-based features that
1060  * can be used by a hypervisor to validate requested CPU features.
1061  */
1062 static u32 msr_based_features[] = {
1063         MSR_IA32_VMX_BASIC,
1064         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1065         MSR_IA32_VMX_PINBASED_CTLS,
1066         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1067         MSR_IA32_VMX_PROCBASED_CTLS,
1068         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1069         MSR_IA32_VMX_EXIT_CTLS,
1070         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1071         MSR_IA32_VMX_ENTRY_CTLS,
1072         MSR_IA32_VMX_MISC,
1073         MSR_IA32_VMX_CR0_FIXED0,
1074         MSR_IA32_VMX_CR0_FIXED1,
1075         MSR_IA32_VMX_CR4_FIXED0,
1076         MSR_IA32_VMX_CR4_FIXED1,
1077         MSR_IA32_VMX_VMCS_ENUM,
1078         MSR_IA32_VMX_PROCBASED_CTLS2,
1079         MSR_IA32_VMX_EPT_VPID_CAP,
1080         MSR_IA32_VMX_VMFUNC,
1081
1082         MSR_F10H_DECFG,
1083         MSR_IA32_UCODE_REV,
1084 };
1085
1086 static unsigned int num_msr_based_features;
1087
1088 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1089 {
1090         switch (msr->index) {
1091         case MSR_IA32_UCODE_REV:
1092                 rdmsrl(msr->index, msr->data);
1093                 break;
1094         default:
1095                 if (kvm_x86_ops->get_msr_feature(msr))
1096                         return 1;
1097         }
1098         return 0;
1099 }
1100
1101 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1102 {
1103         struct kvm_msr_entry msr;
1104         int r;
1105
1106         msr.index = index;
1107         r = kvm_get_msr_feature(&msr);
1108         if (r)
1109                 return r;
1110
1111         *data = msr.data;
1112
1113         return 0;
1114 }
1115
1116 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1117 {
1118         if (efer & efer_reserved_bits)
1119                 return false;
1120
1121         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1122                         return false;
1123
1124         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1125                         return false;
1126
1127         return true;
1128 }
1129 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1130
1131 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1132 {
1133         u64 old_efer = vcpu->arch.efer;
1134
1135         if (!kvm_valid_efer(vcpu, efer))
1136                 return 1;
1137
1138         if (is_paging(vcpu)
1139             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1140                 return 1;
1141
1142         efer &= ~EFER_LMA;
1143         efer |= vcpu->arch.efer & EFER_LMA;
1144
1145         kvm_x86_ops->set_efer(vcpu, efer);
1146
1147         /* Update reserved bits */
1148         if ((efer ^ old_efer) & EFER_NX)
1149                 kvm_mmu_reset_context(vcpu);
1150
1151         return 0;
1152 }
1153
1154 void kvm_enable_efer_bits(u64 mask)
1155 {
1156        efer_reserved_bits &= ~mask;
1157 }
1158 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1159
1160 /*
1161  * Writes msr value into into the appropriate "register".
1162  * Returns 0 on success, non-0 otherwise.
1163  * Assumes vcpu_load() was already called.
1164  */
1165 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1166 {
1167         switch (msr->index) {
1168         case MSR_FS_BASE:
1169         case MSR_GS_BASE:
1170         case MSR_KERNEL_GS_BASE:
1171         case MSR_CSTAR:
1172         case MSR_LSTAR:
1173                 if (is_noncanonical_address(msr->data, vcpu))
1174                         return 1;
1175                 break;
1176         case MSR_IA32_SYSENTER_EIP:
1177         case MSR_IA32_SYSENTER_ESP:
1178                 /*
1179                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1180                  * non-canonical address is written on Intel but not on
1181                  * AMD (which ignores the top 32-bits, because it does
1182                  * not implement 64-bit SYSENTER).
1183                  *
1184                  * 64-bit code should hence be able to write a non-canonical
1185                  * value on AMD.  Making the address canonical ensures that
1186                  * vmentry does not fail on Intel after writing a non-canonical
1187                  * value, and that something deterministic happens if the guest
1188                  * invokes 64-bit SYSENTER.
1189                  */
1190                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1191         }
1192         return kvm_x86_ops->set_msr(vcpu, msr);
1193 }
1194 EXPORT_SYMBOL_GPL(kvm_set_msr);
1195
1196 /*
1197  * Adapt set_msr() to msr_io()'s calling convention
1198  */
1199 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1200 {
1201         struct msr_data msr;
1202         int r;
1203
1204         msr.index = index;
1205         msr.host_initiated = true;
1206         r = kvm_get_msr(vcpu, &msr);
1207         if (r)
1208                 return r;
1209
1210         *data = msr.data;
1211         return 0;
1212 }
1213
1214 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1215 {
1216         struct msr_data msr;
1217
1218         msr.data = *data;
1219         msr.index = index;
1220         msr.host_initiated = true;
1221         return kvm_set_msr(vcpu, &msr);
1222 }
1223
1224 #ifdef CONFIG_X86_64
1225 struct pvclock_gtod_data {
1226         seqcount_t      seq;
1227
1228         struct { /* extract of a clocksource struct */
1229                 int vclock_mode;
1230                 u64     cycle_last;
1231                 u64     mask;
1232                 u32     mult;
1233                 u32     shift;
1234         } clock;
1235
1236         u64             boot_ns;
1237         u64             nsec_base;
1238         u64             wall_time_sec;
1239 };
1240
1241 static struct pvclock_gtod_data pvclock_gtod_data;
1242
1243 static void update_pvclock_gtod(struct timekeeper *tk)
1244 {
1245         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1246         u64 boot_ns;
1247
1248         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1249
1250         write_seqcount_begin(&vdata->seq);
1251
1252         /* copy pvclock gtod data */
1253         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1254         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1255         vdata->clock.mask               = tk->tkr_mono.mask;
1256         vdata->clock.mult               = tk->tkr_mono.mult;
1257         vdata->clock.shift              = tk->tkr_mono.shift;
1258
1259         vdata->boot_ns                  = boot_ns;
1260         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1261
1262         vdata->wall_time_sec            = tk->xtime_sec;
1263
1264         write_seqcount_end(&vdata->seq);
1265 }
1266 #endif
1267
1268 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1269 {
1270         /*
1271          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1272          * vcpu_enter_guest.  This function is only called from
1273          * the physical CPU that is running vcpu.
1274          */
1275         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1276 }
1277
1278 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1279 {
1280         int version;
1281         int r;
1282         struct pvclock_wall_clock wc;
1283         struct timespec64 boot;
1284
1285         if (!wall_clock)
1286                 return;
1287
1288         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1289         if (r)
1290                 return;
1291
1292         if (version & 1)
1293                 ++version;  /* first time write, random junk */
1294
1295         ++version;
1296
1297         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1298                 return;
1299
1300         /*
1301          * The guest calculates current wall clock time by adding
1302          * system time (updated by kvm_guest_time_update below) to the
1303          * wall clock specified here.  guest system time equals host
1304          * system time for us, thus we must fill in host boot time here.
1305          */
1306         getboottime64(&boot);
1307
1308         if (kvm->arch.kvmclock_offset) {
1309                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1310                 boot = timespec64_sub(boot, ts);
1311         }
1312         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1313         wc.nsec = boot.tv_nsec;
1314         wc.version = version;
1315
1316         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1317
1318         version++;
1319         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1320 }
1321
1322 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1323 {
1324         do_shl32_div32(dividend, divisor);
1325         return dividend;
1326 }
1327
1328 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1329                                s8 *pshift, u32 *pmultiplier)
1330 {
1331         uint64_t scaled64;
1332         int32_t  shift = 0;
1333         uint64_t tps64;
1334         uint32_t tps32;
1335
1336         tps64 = base_hz;
1337         scaled64 = scaled_hz;
1338         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1339                 tps64 >>= 1;
1340                 shift--;
1341         }
1342
1343         tps32 = (uint32_t)tps64;
1344         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1345                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1346                         scaled64 >>= 1;
1347                 else
1348                         tps32 <<= 1;
1349                 shift++;
1350         }
1351
1352         *pshift = shift;
1353         *pmultiplier = div_frac(scaled64, tps32);
1354
1355         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1356                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1357 }
1358
1359 #ifdef CONFIG_X86_64
1360 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1361 #endif
1362
1363 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1364 static unsigned long max_tsc_khz;
1365
1366 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1367 {
1368         u64 v = (u64)khz * (1000000 + ppm);
1369         do_div(v, 1000000);
1370         return v;
1371 }
1372
1373 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1374 {
1375         u64 ratio;
1376
1377         /* Guest TSC same frequency as host TSC? */
1378         if (!scale) {
1379                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1380                 return 0;
1381         }
1382
1383         /* TSC scaling supported? */
1384         if (!kvm_has_tsc_control) {
1385                 if (user_tsc_khz > tsc_khz) {
1386                         vcpu->arch.tsc_catchup = 1;
1387                         vcpu->arch.tsc_always_catchup = 1;
1388                         return 0;
1389                 } else {
1390                         WARN(1, "user requested TSC rate below hardware speed\n");
1391                         return -1;
1392                 }
1393         }
1394
1395         /* TSC scaling required  - calculate ratio */
1396         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1397                                 user_tsc_khz, tsc_khz);
1398
1399         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1400                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1401                           user_tsc_khz);
1402                 return -1;
1403         }
1404
1405         vcpu->arch.tsc_scaling_ratio = ratio;
1406         return 0;
1407 }
1408
1409 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1410 {
1411         u32 thresh_lo, thresh_hi;
1412         int use_scaling = 0;
1413
1414         /* tsc_khz can be zero if TSC calibration fails */
1415         if (user_tsc_khz == 0) {
1416                 /* set tsc_scaling_ratio to a safe value */
1417                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1418                 return -1;
1419         }
1420
1421         /* Compute a scale to convert nanoseconds in TSC cycles */
1422         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1423                            &vcpu->arch.virtual_tsc_shift,
1424                            &vcpu->arch.virtual_tsc_mult);
1425         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1426
1427         /*
1428          * Compute the variation in TSC rate which is acceptable
1429          * within the range of tolerance and decide if the
1430          * rate being applied is within that bounds of the hardware
1431          * rate.  If so, no scaling or compensation need be done.
1432          */
1433         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1434         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1435         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1436                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1437                 use_scaling = 1;
1438         }
1439         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1440 }
1441
1442 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1443 {
1444         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1445                                       vcpu->arch.virtual_tsc_mult,
1446                                       vcpu->arch.virtual_tsc_shift);
1447         tsc += vcpu->arch.this_tsc_write;
1448         return tsc;
1449 }
1450
1451 static inline int gtod_is_based_on_tsc(int mode)
1452 {
1453         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1454 }
1455
1456 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1457 {
1458 #ifdef CONFIG_X86_64
1459         bool vcpus_matched;
1460         struct kvm_arch *ka = &vcpu->kvm->arch;
1461         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1462
1463         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1464                          atomic_read(&vcpu->kvm->online_vcpus));
1465
1466         /*
1467          * Once the masterclock is enabled, always perform request in
1468          * order to update it.
1469          *
1470          * In order to enable masterclock, the host clocksource must be TSC
1471          * and the vcpus need to have matched TSCs.  When that happens,
1472          * perform request to enable masterclock.
1473          */
1474         if (ka->use_master_clock ||
1475             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1476                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1477
1478         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1479                             atomic_read(&vcpu->kvm->online_vcpus),
1480                             ka->use_master_clock, gtod->clock.vclock_mode);
1481 #endif
1482 }
1483
1484 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1485 {
1486         u64 curr_offset = vcpu->arch.tsc_offset;
1487         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1488 }
1489
1490 /*
1491  * Multiply tsc by a fixed point number represented by ratio.
1492  *
1493  * The most significant 64-N bits (mult) of ratio represent the
1494  * integral part of the fixed point number; the remaining N bits
1495  * (frac) represent the fractional part, ie. ratio represents a fixed
1496  * point number (mult + frac * 2^(-N)).
1497  *
1498  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1499  */
1500 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1501 {
1502         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1503 }
1504
1505 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1506 {
1507         u64 _tsc = tsc;
1508         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1509
1510         if (ratio != kvm_default_tsc_scaling_ratio)
1511                 _tsc = __scale_tsc(ratio, tsc);
1512
1513         return _tsc;
1514 }
1515 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1516
1517 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1518 {
1519         u64 tsc;
1520
1521         tsc = kvm_scale_tsc(vcpu, rdtsc());
1522
1523         return target_tsc - tsc;
1524 }
1525
1526 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1527 {
1528         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1529 }
1530 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1531
1532 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1533 {
1534         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1535         vcpu->arch.tsc_offset = offset;
1536 }
1537
1538 static inline bool kvm_check_tsc_unstable(void)
1539 {
1540 #ifdef CONFIG_X86_64
1541         /*
1542          * TSC is marked unstable when we're running on Hyper-V,
1543          * 'TSC page' clocksource is good.
1544          */
1545         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1546                 return false;
1547 #endif
1548         return check_tsc_unstable();
1549 }
1550
1551 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1552 {
1553         struct kvm *kvm = vcpu->kvm;
1554         u64 offset, ns, elapsed;
1555         unsigned long flags;
1556         bool matched;
1557         bool already_matched;
1558         u64 data = msr->data;
1559         bool synchronizing = false;
1560
1561         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1562         offset = kvm_compute_tsc_offset(vcpu, data);
1563         ns = ktime_get_boot_ns();
1564         elapsed = ns - kvm->arch.last_tsc_nsec;
1565
1566         if (vcpu->arch.virtual_tsc_khz) {
1567                 if (data == 0 && msr->host_initiated) {
1568                         /*
1569                          * detection of vcpu initialization -- need to sync
1570                          * with other vCPUs. This particularly helps to keep
1571                          * kvm_clock stable after CPU hotplug
1572                          */
1573                         synchronizing = true;
1574                 } else {
1575                         u64 tsc_exp = kvm->arch.last_tsc_write +
1576                                                 nsec_to_cycles(vcpu, elapsed);
1577                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1578                         /*
1579                          * Special case: TSC write with a small delta (1 second)
1580                          * of virtual cycle time against real time is
1581                          * interpreted as an attempt to synchronize the CPU.
1582                          */
1583                         synchronizing = data < tsc_exp + tsc_hz &&
1584                                         data + tsc_hz > tsc_exp;
1585                 }
1586         }
1587
1588         /*
1589          * For a reliable TSC, we can match TSC offsets, and for an unstable
1590          * TSC, we add elapsed time in this computation.  We could let the
1591          * compensation code attempt to catch up if we fall behind, but
1592          * it's better to try to match offsets from the beginning.
1593          */
1594         if (synchronizing &&
1595             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1596                 if (!kvm_check_tsc_unstable()) {
1597                         offset = kvm->arch.cur_tsc_offset;
1598                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1599                 } else {
1600                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1601                         data += delta;
1602                         offset = kvm_compute_tsc_offset(vcpu, data);
1603                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1604                 }
1605                 matched = true;
1606                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1607         } else {
1608                 /*
1609                  * We split periods of matched TSC writes into generations.
1610                  * For each generation, we track the original measured
1611                  * nanosecond time, offset, and write, so if TSCs are in
1612                  * sync, we can match exact offset, and if not, we can match
1613                  * exact software computation in compute_guest_tsc()
1614                  *
1615                  * These values are tracked in kvm->arch.cur_xxx variables.
1616                  */
1617                 kvm->arch.cur_tsc_generation++;
1618                 kvm->arch.cur_tsc_nsec = ns;
1619                 kvm->arch.cur_tsc_write = data;
1620                 kvm->arch.cur_tsc_offset = offset;
1621                 matched = false;
1622                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1623                          kvm->arch.cur_tsc_generation, data);
1624         }
1625
1626         /*
1627          * We also track th most recent recorded KHZ, write and time to
1628          * allow the matching interval to be extended at each write.
1629          */
1630         kvm->arch.last_tsc_nsec = ns;
1631         kvm->arch.last_tsc_write = data;
1632         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1633
1634         vcpu->arch.last_guest_tsc = data;
1635
1636         /* Keep track of which generation this VCPU has synchronized to */
1637         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1638         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1639         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1640
1641         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1642                 update_ia32_tsc_adjust_msr(vcpu, offset);
1643
1644         kvm_vcpu_write_tsc_offset(vcpu, offset);
1645         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1646
1647         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1648         if (!matched) {
1649                 kvm->arch.nr_vcpus_matched_tsc = 0;
1650         } else if (!already_matched) {
1651                 kvm->arch.nr_vcpus_matched_tsc++;
1652         }
1653
1654         kvm_track_tsc_matching(vcpu);
1655         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1656 }
1657
1658 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1659
1660 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1661                                            s64 adjustment)
1662 {
1663         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1664 }
1665
1666 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1667 {
1668         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1669                 WARN_ON(adjustment < 0);
1670         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1671         adjust_tsc_offset_guest(vcpu, adjustment);
1672 }
1673
1674 #ifdef CONFIG_X86_64
1675
1676 static u64 read_tsc(void)
1677 {
1678         u64 ret = (u64)rdtsc_ordered();
1679         u64 last = pvclock_gtod_data.clock.cycle_last;
1680
1681         if (likely(ret >= last))
1682                 return ret;
1683
1684         /*
1685          * GCC likes to generate cmov here, but this branch is extremely
1686          * predictable (it's just a function of time and the likely is
1687          * very likely) and there's a data dependence, so force GCC
1688          * to generate a branch instead.  I don't barrier() because
1689          * we don't actually need a barrier, and if this function
1690          * ever gets inlined it will generate worse code.
1691          */
1692         asm volatile ("");
1693         return last;
1694 }
1695
1696 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1697 {
1698         long v;
1699         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1700         u64 tsc_pg_val;
1701
1702         switch (gtod->clock.vclock_mode) {
1703         case VCLOCK_HVCLOCK:
1704                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1705                                                   tsc_timestamp);
1706                 if (tsc_pg_val != U64_MAX) {
1707                         /* TSC page valid */
1708                         *mode = VCLOCK_HVCLOCK;
1709                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1710                                 gtod->clock.mask;
1711                 } else {
1712                         /* TSC page invalid */
1713                         *mode = VCLOCK_NONE;
1714                 }
1715                 break;
1716         case VCLOCK_TSC:
1717                 *mode = VCLOCK_TSC;
1718                 *tsc_timestamp = read_tsc();
1719                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1720                         gtod->clock.mask;
1721                 break;
1722         default:
1723                 *mode = VCLOCK_NONE;
1724         }
1725
1726         if (*mode == VCLOCK_NONE)
1727                 *tsc_timestamp = v = 0;
1728
1729         return v * gtod->clock.mult;
1730 }
1731
1732 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1733 {
1734         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1735         unsigned long seq;
1736         int mode;
1737         u64 ns;
1738
1739         do {
1740                 seq = read_seqcount_begin(&gtod->seq);
1741                 ns = gtod->nsec_base;
1742                 ns += vgettsc(tsc_timestamp, &mode);
1743                 ns >>= gtod->clock.shift;
1744                 ns += gtod->boot_ns;
1745         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1746         *t = ns;
1747
1748         return mode;
1749 }
1750
1751 static int do_realtime(struct timespec *ts, u64 *tsc_timestamp)
1752 {
1753         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1754         unsigned long seq;
1755         int mode;
1756         u64 ns;
1757
1758         do {
1759                 seq = read_seqcount_begin(&gtod->seq);
1760                 ts->tv_sec = gtod->wall_time_sec;
1761                 ns = gtod->nsec_base;
1762                 ns += vgettsc(tsc_timestamp, &mode);
1763                 ns >>= gtod->clock.shift;
1764         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1765
1766         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1767         ts->tv_nsec = ns;
1768
1769         return mode;
1770 }
1771
1772 /* returns true if host is using TSC based clocksource */
1773 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1774 {
1775         /* checked again under seqlock below */
1776         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1777                 return false;
1778
1779         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1780                                                       tsc_timestamp));
1781 }
1782
1783 /* returns true if host is using TSC based clocksource */
1784 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1785                                            u64 *tsc_timestamp)
1786 {
1787         /* checked again under seqlock below */
1788         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1789                 return false;
1790
1791         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1792 }
1793 #endif
1794
1795 /*
1796  *
1797  * Assuming a stable TSC across physical CPUS, and a stable TSC
1798  * across virtual CPUs, the following condition is possible.
1799  * Each numbered line represents an event visible to both
1800  * CPUs at the next numbered event.
1801  *
1802  * "timespecX" represents host monotonic time. "tscX" represents
1803  * RDTSC value.
1804  *
1805  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1806  *
1807  * 1.  read timespec0,tsc0
1808  * 2.                                   | timespec1 = timespec0 + N
1809  *                                      | tsc1 = tsc0 + M
1810  * 3. transition to guest               | transition to guest
1811  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1812  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1813  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1814  *
1815  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1816  *
1817  *      - ret0 < ret1
1818  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1819  *              ...
1820  *      - 0 < N - M => M < N
1821  *
1822  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1823  * always the case (the difference between two distinct xtime instances
1824  * might be smaller then the difference between corresponding TSC reads,
1825  * when updating guest vcpus pvclock areas).
1826  *
1827  * To avoid that problem, do not allow visibility of distinct
1828  * system_timestamp/tsc_timestamp values simultaneously: use a master
1829  * copy of host monotonic time values. Update that master copy
1830  * in lockstep.
1831  *
1832  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1833  *
1834  */
1835
1836 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1837 {
1838 #ifdef CONFIG_X86_64
1839         struct kvm_arch *ka = &kvm->arch;
1840         int vclock_mode;
1841         bool host_tsc_clocksource, vcpus_matched;
1842
1843         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1844                         atomic_read(&kvm->online_vcpus));
1845
1846         /*
1847          * If the host uses TSC clock, then passthrough TSC as stable
1848          * to the guest.
1849          */
1850         host_tsc_clocksource = kvm_get_time_and_clockread(
1851                                         &ka->master_kernel_ns,
1852                                         &ka->master_cycle_now);
1853
1854         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1855                                 && !ka->backwards_tsc_observed
1856                                 && !ka->boot_vcpu_runs_old_kvmclock;
1857
1858         if (ka->use_master_clock)
1859                 atomic_set(&kvm_guest_has_master_clock, 1);
1860
1861         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1862         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1863                                         vcpus_matched);
1864 #endif
1865 }
1866
1867 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1868 {
1869         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1870 }
1871
1872 static void kvm_gen_update_masterclock(struct kvm *kvm)
1873 {
1874 #ifdef CONFIG_X86_64
1875         int i;
1876         struct kvm_vcpu *vcpu;
1877         struct kvm_arch *ka = &kvm->arch;
1878
1879         spin_lock(&ka->pvclock_gtod_sync_lock);
1880         kvm_make_mclock_inprogress_request(kvm);
1881         /* no guest entries from this point */
1882         pvclock_update_vm_gtod_copy(kvm);
1883
1884         kvm_for_each_vcpu(i, vcpu, kvm)
1885                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1886
1887         /* guest entries allowed */
1888         kvm_for_each_vcpu(i, vcpu, kvm)
1889                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1890
1891         spin_unlock(&ka->pvclock_gtod_sync_lock);
1892 #endif
1893 }
1894
1895 u64 get_kvmclock_ns(struct kvm *kvm)
1896 {
1897         struct kvm_arch *ka = &kvm->arch;
1898         struct pvclock_vcpu_time_info hv_clock;
1899         u64 ret;
1900
1901         spin_lock(&ka->pvclock_gtod_sync_lock);
1902         if (!ka->use_master_clock) {
1903                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1904                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1905         }
1906
1907         hv_clock.tsc_timestamp = ka->master_cycle_now;
1908         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1909         spin_unlock(&ka->pvclock_gtod_sync_lock);
1910
1911         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1912         get_cpu();
1913
1914         if (__this_cpu_read(cpu_tsc_khz)) {
1915                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1916                                    &hv_clock.tsc_shift,
1917                                    &hv_clock.tsc_to_system_mul);
1918                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1919         } else
1920                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1921
1922         put_cpu();
1923
1924         return ret;
1925 }
1926
1927 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1928 {
1929         struct kvm_vcpu_arch *vcpu = &v->arch;
1930         struct pvclock_vcpu_time_info guest_hv_clock;
1931
1932         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1933                 &guest_hv_clock, sizeof(guest_hv_clock))))
1934                 return;
1935
1936         /* This VCPU is paused, but it's legal for a guest to read another
1937          * VCPU's kvmclock, so we really have to follow the specification where
1938          * it says that version is odd if data is being modified, and even after
1939          * it is consistent.
1940          *
1941          * Version field updates must be kept separate.  This is because
1942          * kvm_write_guest_cached might use a "rep movs" instruction, and
1943          * writes within a string instruction are weakly ordered.  So there
1944          * are three writes overall.
1945          *
1946          * As a small optimization, only write the version field in the first
1947          * and third write.  The vcpu->pv_time cache is still valid, because the
1948          * version field is the first in the struct.
1949          */
1950         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1951
1952         if (guest_hv_clock.version & 1)
1953                 ++guest_hv_clock.version;  /* first time write, random junk */
1954
1955         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1956         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1957                                 &vcpu->hv_clock,
1958                                 sizeof(vcpu->hv_clock.version));
1959
1960         smp_wmb();
1961
1962         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1963         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1964
1965         if (vcpu->pvclock_set_guest_stopped_request) {
1966                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1967                 vcpu->pvclock_set_guest_stopped_request = false;
1968         }
1969
1970         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1971
1972         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1973                                 &vcpu->hv_clock,
1974                                 sizeof(vcpu->hv_clock));
1975
1976         smp_wmb();
1977
1978         vcpu->hv_clock.version++;
1979         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1980                                 &vcpu->hv_clock,
1981                                 sizeof(vcpu->hv_clock.version));
1982 }
1983
1984 static int kvm_guest_time_update(struct kvm_vcpu *v)
1985 {
1986         unsigned long flags, tgt_tsc_khz;
1987         struct kvm_vcpu_arch *vcpu = &v->arch;
1988         struct kvm_arch *ka = &v->kvm->arch;
1989         s64 kernel_ns;
1990         u64 tsc_timestamp, host_tsc;
1991         u8 pvclock_flags;
1992         bool use_master_clock;
1993
1994         kernel_ns = 0;
1995         host_tsc = 0;
1996
1997         /*
1998          * If the host uses TSC clock, then passthrough TSC as stable
1999          * to the guest.
2000          */
2001         spin_lock(&ka->pvclock_gtod_sync_lock);
2002         use_master_clock = ka->use_master_clock;
2003         if (use_master_clock) {
2004                 host_tsc = ka->master_cycle_now;
2005                 kernel_ns = ka->master_kernel_ns;
2006         }
2007         spin_unlock(&ka->pvclock_gtod_sync_lock);
2008
2009         /* Keep irq disabled to prevent changes to the clock */
2010         local_irq_save(flags);
2011         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2012         if (unlikely(tgt_tsc_khz == 0)) {
2013                 local_irq_restore(flags);
2014                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2015                 return 1;
2016         }
2017         if (!use_master_clock) {
2018                 host_tsc = rdtsc();
2019                 kernel_ns = ktime_get_boot_ns();
2020         }
2021
2022         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2023
2024         /*
2025          * We may have to catch up the TSC to match elapsed wall clock
2026          * time for two reasons, even if kvmclock is used.
2027          *   1) CPU could have been running below the maximum TSC rate
2028          *   2) Broken TSC compensation resets the base at each VCPU
2029          *      entry to avoid unknown leaps of TSC even when running
2030          *      again on the same CPU.  This may cause apparent elapsed
2031          *      time to disappear, and the guest to stand still or run
2032          *      very slowly.
2033          */
2034         if (vcpu->tsc_catchup) {
2035                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2036                 if (tsc > tsc_timestamp) {
2037                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2038                         tsc_timestamp = tsc;
2039                 }
2040         }
2041
2042         local_irq_restore(flags);
2043
2044         /* With all the info we got, fill in the values */
2045
2046         if (kvm_has_tsc_control)
2047                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2048
2049         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2050                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2051                                    &vcpu->hv_clock.tsc_shift,
2052                                    &vcpu->hv_clock.tsc_to_system_mul);
2053                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2054         }
2055
2056         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2057         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2058         vcpu->last_guest_tsc = tsc_timestamp;
2059
2060         /* If the host uses TSC clocksource, then it is stable */
2061         pvclock_flags = 0;
2062         if (use_master_clock)
2063                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2064
2065         vcpu->hv_clock.flags = pvclock_flags;
2066
2067         if (vcpu->pv_time_enabled)
2068                 kvm_setup_pvclock_page(v);
2069         if (v == kvm_get_vcpu(v->kvm, 0))
2070                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2071         return 0;
2072 }
2073
2074 /*
2075  * kvmclock updates which are isolated to a given vcpu, such as
2076  * vcpu->cpu migration, should not allow system_timestamp from
2077  * the rest of the vcpus to remain static. Otherwise ntp frequency
2078  * correction applies to one vcpu's system_timestamp but not
2079  * the others.
2080  *
2081  * So in those cases, request a kvmclock update for all vcpus.
2082  * We need to rate-limit these requests though, as they can
2083  * considerably slow guests that have a large number of vcpus.
2084  * The time for a remote vcpu to update its kvmclock is bound
2085  * by the delay we use to rate-limit the updates.
2086  */
2087
2088 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2089
2090 static void kvmclock_update_fn(struct work_struct *work)
2091 {
2092         int i;
2093         struct delayed_work *dwork = to_delayed_work(work);
2094         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2095                                            kvmclock_update_work);
2096         struct kvm *kvm = container_of(ka, struct kvm, arch);
2097         struct kvm_vcpu *vcpu;
2098
2099         kvm_for_each_vcpu(i, vcpu, kvm) {
2100                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2101                 kvm_vcpu_kick(vcpu);
2102         }
2103 }
2104
2105 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2106 {
2107         struct kvm *kvm = v->kvm;
2108
2109         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2110         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2111                                         KVMCLOCK_UPDATE_DELAY);
2112 }
2113
2114 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2115
2116 static void kvmclock_sync_fn(struct work_struct *work)
2117 {
2118         struct delayed_work *dwork = to_delayed_work(work);
2119         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2120                                            kvmclock_sync_work);
2121         struct kvm *kvm = container_of(ka, struct kvm, arch);
2122
2123         if (!kvmclock_periodic_sync)
2124                 return;
2125
2126         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2127         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2128                                         KVMCLOCK_SYNC_PERIOD);
2129 }
2130
2131 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2132 {
2133         u64 mcg_cap = vcpu->arch.mcg_cap;
2134         unsigned bank_num = mcg_cap & 0xff;
2135         u32 msr = msr_info->index;
2136         u64 data = msr_info->data;
2137
2138         switch (msr) {
2139         case MSR_IA32_MCG_STATUS:
2140                 vcpu->arch.mcg_status = data;
2141                 break;
2142         case MSR_IA32_MCG_CTL:
2143                 if (!(mcg_cap & MCG_CTL_P))
2144                         return 1;
2145                 if (data != 0 && data != ~(u64)0)
2146                         return -1;
2147                 vcpu->arch.mcg_ctl = data;
2148                 break;
2149         default:
2150                 if (msr >= MSR_IA32_MC0_CTL &&
2151                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2152                         u32 offset = msr - MSR_IA32_MC0_CTL;
2153                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2154                          * some Linux kernels though clear bit 10 in bank 4 to
2155                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2156                          * this to avoid an uncatched #GP in the guest
2157                          */
2158                         if ((offset & 0x3) == 0 &&
2159                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2160                                 return -1;
2161                         if (!msr_info->host_initiated &&
2162                                 (offset & 0x3) == 1 && data != 0)
2163                                 return -1;
2164                         vcpu->arch.mce_banks[offset] = data;
2165                         break;
2166                 }
2167                 return 1;
2168         }
2169         return 0;
2170 }
2171
2172 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2173 {
2174         struct kvm *kvm = vcpu->kvm;
2175         int lm = is_long_mode(vcpu);
2176         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2177                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2178         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2179                 : kvm->arch.xen_hvm_config.blob_size_32;
2180         u32 page_num = data & ~PAGE_MASK;
2181         u64 page_addr = data & PAGE_MASK;
2182         u8 *page;
2183         int r;
2184
2185         r = -E2BIG;
2186         if (page_num >= blob_size)
2187                 goto out;
2188         r = -ENOMEM;
2189         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2190         if (IS_ERR(page)) {
2191                 r = PTR_ERR(page);
2192                 goto out;
2193         }
2194         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2195                 goto out_free;
2196         r = 0;
2197 out_free:
2198         kfree(page);
2199 out:
2200         return r;
2201 }
2202
2203 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2204 {
2205         gpa_t gpa = data & ~0x3f;
2206
2207         /* Bits 3:5 are reserved, Should be zero */
2208         if (data & 0x38)
2209                 return 1;
2210
2211         vcpu->arch.apf.msr_val = data;
2212
2213         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2214                 kvm_clear_async_pf_completion_queue(vcpu);
2215                 kvm_async_pf_hash_reset(vcpu);
2216                 return 0;
2217         }
2218
2219         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2220                                         sizeof(u32)))
2221                 return 1;
2222
2223         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2224         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2225         kvm_async_pf_wakeup_all(vcpu);
2226         return 0;
2227 }
2228
2229 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2230 {
2231         vcpu->arch.pv_time_enabled = false;
2232 }
2233
2234 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2235 {
2236         ++vcpu->stat.tlb_flush;
2237         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2238 }
2239
2240 static void record_steal_time(struct kvm_vcpu *vcpu)
2241 {
2242         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2243                 return;
2244
2245         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2246                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2247                 return;
2248
2249         /*
2250          * Doing a TLB flush here, on the guest's behalf, can avoid
2251          * expensive IPIs.
2252          */
2253         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2254                 kvm_vcpu_flush_tlb(vcpu, false);
2255
2256         if (vcpu->arch.st.steal.version & 1)
2257                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2258
2259         vcpu->arch.st.steal.version += 1;
2260
2261         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2262                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2263
2264         smp_wmb();
2265
2266         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2267                 vcpu->arch.st.last_steal;
2268         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2269
2270         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2271                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2272
2273         smp_wmb();
2274
2275         vcpu->arch.st.steal.version += 1;
2276
2277         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2278                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2279 }
2280
2281 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2282 {
2283         bool pr = false;
2284         u32 msr = msr_info->index;
2285         u64 data = msr_info->data;
2286
2287         switch (msr) {
2288         case MSR_AMD64_NB_CFG:
2289         case MSR_IA32_UCODE_WRITE:
2290         case MSR_VM_HSAVE_PA:
2291         case MSR_AMD64_PATCH_LOADER:
2292         case MSR_AMD64_BU_CFG2:
2293         case MSR_AMD64_DC_CFG:
2294                 break;
2295
2296         case MSR_IA32_UCODE_REV:
2297                 if (msr_info->host_initiated)
2298                         vcpu->arch.microcode_version = data;
2299                 break;
2300         case MSR_EFER:
2301                 return set_efer(vcpu, data);
2302         case MSR_K7_HWCR:
2303                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2304                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2305                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2306                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2307                 if (data != 0) {
2308                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2309                                     data);
2310                         return 1;
2311                 }
2312                 break;
2313         case MSR_FAM10H_MMIO_CONF_BASE:
2314                 if (data != 0) {
2315                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2316                                     "0x%llx\n", data);
2317                         return 1;
2318                 }
2319                 break;
2320         case MSR_IA32_DEBUGCTLMSR:
2321                 if (!data) {
2322                         /* We support the non-activated case already */
2323                         break;
2324                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2325                         /* Values other than LBR and BTF are vendor-specific,
2326                            thus reserved and should throw a #GP */
2327                         return 1;
2328                 }
2329                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2330                             __func__, data);
2331                 break;
2332         case 0x200 ... 0x2ff:
2333                 return kvm_mtrr_set_msr(vcpu, msr, data);
2334         case MSR_IA32_APICBASE:
2335                 return kvm_set_apic_base(vcpu, msr_info);
2336         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2337                 return kvm_x2apic_msr_write(vcpu, msr, data);
2338         case MSR_IA32_TSCDEADLINE:
2339                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2340                 break;
2341         case MSR_IA32_TSC_ADJUST:
2342                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2343                         if (!msr_info->host_initiated) {
2344                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2345                                 adjust_tsc_offset_guest(vcpu, adj);
2346                         }
2347                         vcpu->arch.ia32_tsc_adjust_msr = data;
2348                 }
2349                 break;
2350         case MSR_IA32_MISC_ENABLE:
2351                 vcpu->arch.ia32_misc_enable_msr = data;
2352                 break;
2353         case MSR_IA32_SMBASE:
2354                 if (!msr_info->host_initiated)
2355                         return 1;
2356                 vcpu->arch.smbase = data;
2357                 break;
2358         case MSR_SMI_COUNT:
2359                 if (!msr_info->host_initiated)
2360                         return 1;
2361                 vcpu->arch.smi_count = data;
2362                 break;
2363         case MSR_KVM_WALL_CLOCK_NEW:
2364         case MSR_KVM_WALL_CLOCK:
2365                 vcpu->kvm->arch.wall_clock = data;
2366                 kvm_write_wall_clock(vcpu->kvm, data);
2367                 break;
2368         case MSR_KVM_SYSTEM_TIME_NEW:
2369         case MSR_KVM_SYSTEM_TIME: {
2370                 struct kvm_arch *ka = &vcpu->kvm->arch;
2371
2372                 kvmclock_reset(vcpu);
2373
2374                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2375                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2376
2377                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2378                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2379
2380                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2381                 }
2382
2383                 vcpu->arch.time = data;
2384                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2385
2386                 /* we verify if the enable bit is set... */
2387                 if (!(data & 1))
2388                         break;
2389
2390                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2391                      &vcpu->arch.pv_time, data & ~1ULL,
2392                      sizeof(struct pvclock_vcpu_time_info)))
2393                         vcpu->arch.pv_time_enabled = false;
2394                 else
2395                         vcpu->arch.pv_time_enabled = true;
2396
2397                 break;
2398         }
2399         case MSR_KVM_ASYNC_PF_EN:
2400                 if (kvm_pv_enable_async_pf(vcpu, data))
2401                         return 1;
2402                 break;
2403         case MSR_KVM_STEAL_TIME:
2404
2405                 if (unlikely(!sched_info_on()))
2406                         return 1;
2407
2408                 if (data & KVM_STEAL_RESERVED_MASK)
2409                         return 1;
2410
2411                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2412                                                 data & KVM_STEAL_VALID_BITS,
2413                                                 sizeof(struct kvm_steal_time)))
2414                         return 1;
2415
2416                 vcpu->arch.st.msr_val = data;
2417
2418                 if (!(data & KVM_MSR_ENABLED))
2419                         break;
2420
2421                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2422
2423                 break;
2424         case MSR_KVM_PV_EOI_EN:
2425                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2426                         return 1;
2427                 break;
2428
2429         case MSR_IA32_MCG_CTL:
2430         case MSR_IA32_MCG_STATUS:
2431         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2432                 return set_msr_mce(vcpu, msr_info);
2433
2434         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2435         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2436                 pr = true; /* fall through */
2437         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2438         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2439                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2440                         return kvm_pmu_set_msr(vcpu, msr_info);
2441
2442                 if (pr || data != 0)
2443                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2444                                     "0x%x data 0x%llx\n", msr, data);
2445                 break;
2446         case MSR_K7_CLK_CTL:
2447                 /*
2448                  * Ignore all writes to this no longer documented MSR.
2449                  * Writes are only relevant for old K7 processors,
2450                  * all pre-dating SVM, but a recommended workaround from
2451                  * AMD for these chips. It is possible to specify the
2452                  * affected processor models on the command line, hence
2453                  * the need to ignore the workaround.
2454                  */
2455                 break;
2456         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2457         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2458         case HV_X64_MSR_CRASH_CTL:
2459         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2460         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2461         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2462         case HV_X64_MSR_TSC_EMULATION_STATUS:
2463                 return kvm_hv_set_msr_common(vcpu, msr, data,
2464                                              msr_info->host_initiated);
2465         case MSR_IA32_BBL_CR_CTL3:
2466                 /* Drop writes to this legacy MSR -- see rdmsr
2467                  * counterpart for further detail.
2468                  */
2469                 if (report_ignored_msrs)
2470                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2471                                 msr, data);
2472                 break;
2473         case MSR_AMD64_OSVW_ID_LENGTH:
2474                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2475                         return 1;
2476                 vcpu->arch.osvw.length = data;
2477                 break;
2478         case MSR_AMD64_OSVW_STATUS:
2479                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2480                         return 1;
2481                 vcpu->arch.osvw.status = data;
2482                 break;
2483         case MSR_PLATFORM_INFO:
2484                 if (!msr_info->host_initiated ||
2485                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2486                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2487                      cpuid_fault_enabled(vcpu)))
2488                         return 1;
2489                 vcpu->arch.msr_platform_info = data;
2490                 break;
2491         case MSR_MISC_FEATURES_ENABLES:
2492                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2493                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2494                      !supports_cpuid_fault(vcpu)))
2495                         return 1;
2496                 vcpu->arch.msr_misc_features_enables = data;
2497                 break;
2498         default:
2499                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2500                         return xen_hvm_config(vcpu, data);
2501                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2502                         return kvm_pmu_set_msr(vcpu, msr_info);
2503                 if (!ignore_msrs) {
2504                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2505                                     msr, data);
2506                         return 1;
2507                 } else {
2508                         if (report_ignored_msrs)
2509                                 vcpu_unimpl(vcpu,
2510                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2511                                         msr, data);
2512                         break;
2513                 }
2514         }
2515         return 0;
2516 }
2517 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2518
2519
2520 /*
2521  * Reads an msr value (of 'msr_index') into 'pdata'.
2522  * Returns 0 on success, non-0 otherwise.
2523  * Assumes vcpu_load() was already called.
2524  */
2525 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2526 {
2527         return kvm_x86_ops->get_msr(vcpu, msr);
2528 }
2529 EXPORT_SYMBOL_GPL(kvm_get_msr);
2530
2531 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2532 {
2533         u64 data;
2534         u64 mcg_cap = vcpu->arch.mcg_cap;
2535         unsigned bank_num = mcg_cap & 0xff;
2536
2537         switch (msr) {
2538         case MSR_IA32_P5_MC_ADDR:
2539         case MSR_IA32_P5_MC_TYPE:
2540                 data = 0;
2541                 break;
2542         case MSR_IA32_MCG_CAP:
2543                 data = vcpu->arch.mcg_cap;
2544                 break;
2545         case MSR_IA32_MCG_CTL:
2546                 if (!(mcg_cap & MCG_CTL_P))
2547                         return 1;
2548                 data = vcpu->arch.mcg_ctl;
2549                 break;
2550         case MSR_IA32_MCG_STATUS:
2551                 data = vcpu->arch.mcg_status;
2552                 break;
2553         default:
2554                 if (msr >= MSR_IA32_MC0_CTL &&
2555                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2556                         u32 offset = msr - MSR_IA32_MC0_CTL;
2557                         data = vcpu->arch.mce_banks[offset];
2558                         break;
2559                 }
2560                 return 1;
2561         }
2562         *pdata = data;
2563         return 0;
2564 }
2565
2566 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2567 {
2568         switch (msr_info->index) {
2569         case MSR_IA32_PLATFORM_ID:
2570         case MSR_IA32_EBL_CR_POWERON:
2571         case MSR_IA32_DEBUGCTLMSR:
2572         case MSR_IA32_LASTBRANCHFROMIP:
2573         case MSR_IA32_LASTBRANCHTOIP:
2574         case MSR_IA32_LASTINTFROMIP:
2575         case MSR_IA32_LASTINTTOIP:
2576         case MSR_K8_SYSCFG:
2577         case MSR_K8_TSEG_ADDR:
2578         case MSR_K8_TSEG_MASK:
2579         case MSR_K7_HWCR:
2580         case MSR_VM_HSAVE_PA:
2581         case MSR_K8_INT_PENDING_MSG:
2582         case MSR_AMD64_NB_CFG:
2583         case MSR_FAM10H_MMIO_CONF_BASE:
2584         case MSR_AMD64_BU_CFG2:
2585         case MSR_IA32_PERF_CTL:
2586         case MSR_AMD64_DC_CFG:
2587                 msr_info->data = 0;
2588                 break;
2589         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2590         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2591         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2592         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2593         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2594                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2595                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2596                 msr_info->data = 0;
2597                 break;
2598         case MSR_IA32_UCODE_REV:
2599                 msr_info->data = vcpu->arch.microcode_version;
2600                 break;
2601         case MSR_MTRRcap:
2602         case 0x200 ... 0x2ff:
2603                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2604         case 0xcd: /* fsb frequency */
2605                 msr_info->data = 3;
2606                 break;
2607                 /*
2608                  * MSR_EBC_FREQUENCY_ID
2609                  * Conservative value valid for even the basic CPU models.
2610                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2611                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2612                  * and 266MHz for model 3, or 4. Set Core Clock
2613                  * Frequency to System Bus Frequency Ratio to 1 (bits
2614                  * 31:24) even though these are only valid for CPU
2615                  * models > 2, however guests may end up dividing or
2616                  * multiplying by zero otherwise.
2617                  */
2618         case MSR_EBC_FREQUENCY_ID:
2619                 msr_info->data = 1 << 24;
2620                 break;
2621         case MSR_IA32_APICBASE:
2622                 msr_info->data = kvm_get_apic_base(vcpu);
2623                 break;
2624         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2625                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2626                 break;
2627         case MSR_IA32_TSCDEADLINE:
2628                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2629                 break;
2630         case MSR_IA32_TSC_ADJUST:
2631                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2632                 break;
2633         case MSR_IA32_MISC_ENABLE:
2634                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2635                 break;
2636         case MSR_IA32_SMBASE:
2637                 if (!msr_info->host_initiated)
2638                         return 1;
2639                 msr_info->data = vcpu->arch.smbase;
2640                 break;
2641         case MSR_SMI_COUNT:
2642                 msr_info->data = vcpu->arch.smi_count;
2643                 break;
2644         case MSR_IA32_PERF_STATUS:
2645                 /* TSC increment by tick */
2646                 msr_info->data = 1000ULL;
2647                 /* CPU multiplier */
2648                 msr_info->data |= (((uint64_t)4ULL) << 40);
2649                 break;
2650         case MSR_EFER:
2651                 msr_info->data = vcpu->arch.efer;
2652                 break;
2653         case MSR_KVM_WALL_CLOCK:
2654         case MSR_KVM_WALL_CLOCK_NEW:
2655                 msr_info->data = vcpu->kvm->arch.wall_clock;
2656                 break;
2657         case MSR_KVM_SYSTEM_TIME:
2658         case MSR_KVM_SYSTEM_TIME_NEW:
2659                 msr_info->data = vcpu->arch.time;
2660                 break;
2661         case MSR_KVM_ASYNC_PF_EN:
2662                 msr_info->data = vcpu->arch.apf.msr_val;
2663                 break;
2664         case MSR_KVM_STEAL_TIME:
2665                 msr_info->data = vcpu->arch.st.msr_val;
2666                 break;
2667         case MSR_KVM_PV_EOI_EN:
2668                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2669                 break;
2670         case MSR_IA32_P5_MC_ADDR:
2671         case MSR_IA32_P5_MC_TYPE:
2672         case MSR_IA32_MCG_CAP:
2673         case MSR_IA32_MCG_CTL:
2674         case MSR_IA32_MCG_STATUS:
2675         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2676                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2677         case MSR_K7_CLK_CTL:
2678                 /*
2679                  * Provide expected ramp-up count for K7. All other
2680                  * are set to zero, indicating minimum divisors for
2681                  * every field.
2682                  *
2683                  * This prevents guest kernels on AMD host with CPU
2684                  * type 6, model 8 and higher from exploding due to
2685                  * the rdmsr failing.
2686                  */
2687                 msr_info->data = 0x20000000;
2688                 break;
2689         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2690         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2691         case HV_X64_MSR_CRASH_CTL:
2692         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2693         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2694         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2695         case HV_X64_MSR_TSC_EMULATION_STATUS:
2696                 return kvm_hv_get_msr_common(vcpu,
2697                                              msr_info->index, &msr_info->data);
2698                 break;
2699         case MSR_IA32_BBL_CR_CTL3:
2700                 /* This legacy MSR exists but isn't fully documented in current
2701                  * silicon.  It is however accessed by winxp in very narrow
2702                  * scenarios where it sets bit #19, itself documented as
2703                  * a "reserved" bit.  Best effort attempt to source coherent
2704                  * read data here should the balance of the register be
2705                  * interpreted by the guest:
2706                  *
2707                  * L2 cache control register 3: 64GB range, 256KB size,
2708                  * enabled, latency 0x1, configured
2709                  */
2710                 msr_info->data = 0xbe702111;
2711                 break;
2712         case MSR_AMD64_OSVW_ID_LENGTH:
2713                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2714                         return 1;
2715                 msr_info->data = vcpu->arch.osvw.length;
2716                 break;
2717         case MSR_AMD64_OSVW_STATUS:
2718                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2719                         return 1;
2720                 msr_info->data = vcpu->arch.osvw.status;
2721                 break;
2722         case MSR_PLATFORM_INFO:
2723                 msr_info->data = vcpu->arch.msr_platform_info;
2724                 break;
2725         case MSR_MISC_FEATURES_ENABLES:
2726                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2727                 break;
2728         default:
2729                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2730                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2731                 if (!ignore_msrs) {
2732                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2733                                                msr_info->index);
2734                         return 1;
2735                 } else {
2736                         if (report_ignored_msrs)
2737                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2738                                         msr_info->index);
2739                         msr_info->data = 0;
2740                 }
2741                 break;
2742         }
2743         return 0;
2744 }
2745 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2746
2747 /*
2748  * Read or write a bunch of msrs. All parameters are kernel addresses.
2749  *
2750  * @return number of msrs set successfully.
2751  */
2752 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2753                     struct kvm_msr_entry *entries,
2754                     int (*do_msr)(struct kvm_vcpu *vcpu,
2755                                   unsigned index, u64 *data))
2756 {
2757         int i;
2758
2759         for (i = 0; i < msrs->nmsrs; ++i)
2760                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2761                         break;
2762
2763         return i;
2764 }
2765
2766 /*
2767  * Read or write a bunch of msrs. Parameters are user addresses.
2768  *
2769  * @return number of msrs set successfully.
2770  */
2771 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2772                   int (*do_msr)(struct kvm_vcpu *vcpu,
2773                                 unsigned index, u64 *data),
2774                   int writeback)
2775 {
2776         struct kvm_msrs msrs;
2777         struct kvm_msr_entry *entries;
2778         int r, n;
2779         unsigned size;
2780
2781         r = -EFAULT;
2782         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2783                 goto out;
2784
2785         r = -E2BIG;
2786         if (msrs.nmsrs >= MAX_IO_MSRS)
2787                 goto out;
2788
2789         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2790         entries = memdup_user(user_msrs->entries, size);
2791         if (IS_ERR(entries)) {
2792                 r = PTR_ERR(entries);
2793                 goto out;
2794         }
2795
2796         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2797         if (r < 0)
2798                 goto out_free;
2799
2800         r = -EFAULT;
2801         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2802                 goto out_free;
2803
2804         r = n;
2805
2806 out_free:
2807         kfree(entries);
2808 out:
2809         return r;
2810 }
2811
2812 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2813 {
2814         int r;
2815
2816         switch (ext) {
2817         case KVM_CAP_IRQCHIP:
2818         case KVM_CAP_HLT:
2819         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2820         case KVM_CAP_SET_TSS_ADDR:
2821         case KVM_CAP_EXT_CPUID:
2822         case KVM_CAP_EXT_EMUL_CPUID:
2823         case KVM_CAP_CLOCKSOURCE:
2824         case KVM_CAP_PIT:
2825         case KVM_CAP_NOP_IO_DELAY:
2826         case KVM_CAP_MP_STATE:
2827         case KVM_CAP_SYNC_MMU:
2828         case KVM_CAP_USER_NMI:
2829         case KVM_CAP_REINJECT_CONTROL:
2830         case KVM_CAP_IRQ_INJECT_STATUS:
2831         case KVM_CAP_IOEVENTFD:
2832         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2833         case KVM_CAP_PIT2:
2834         case KVM_CAP_PIT_STATE2:
2835         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2836         case KVM_CAP_XEN_HVM:
2837         case KVM_CAP_VCPU_EVENTS:
2838         case KVM_CAP_HYPERV:
2839         case KVM_CAP_HYPERV_VAPIC:
2840         case KVM_CAP_HYPERV_SPIN:
2841         case KVM_CAP_HYPERV_SYNIC:
2842         case KVM_CAP_HYPERV_SYNIC2:
2843         case KVM_CAP_HYPERV_VP_INDEX:
2844         case KVM_CAP_HYPERV_EVENTFD:
2845         case KVM_CAP_PCI_SEGMENT:
2846         case KVM_CAP_DEBUGREGS:
2847         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2848         case KVM_CAP_XSAVE:
2849         case KVM_CAP_ASYNC_PF:
2850         case KVM_CAP_GET_TSC_KHZ:
2851         case KVM_CAP_KVMCLOCK_CTRL:
2852         case KVM_CAP_READONLY_MEM:
2853         case KVM_CAP_HYPERV_TIME:
2854         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2855         case KVM_CAP_TSC_DEADLINE_TIMER:
2856         case KVM_CAP_ENABLE_CAP_VM:
2857         case KVM_CAP_DISABLE_QUIRKS:
2858         case KVM_CAP_SET_BOOT_CPU_ID:
2859         case KVM_CAP_SPLIT_IRQCHIP:
2860         case KVM_CAP_IMMEDIATE_EXIT:
2861         case KVM_CAP_GET_MSR_FEATURES:
2862                 r = 1;
2863                 break;
2864         case KVM_CAP_SYNC_REGS:
2865                 r = KVM_SYNC_X86_VALID_FIELDS;
2866                 break;
2867         case KVM_CAP_ADJUST_CLOCK:
2868                 r = KVM_CLOCK_TSC_STABLE;
2869                 break;
2870         case KVM_CAP_X86_GUEST_MWAIT:
2871                 r = kvm_mwait_in_guest();
2872                 break;
2873         case KVM_CAP_X86_SMM:
2874                 /* SMBASE is usually relocated above 1M on modern chipsets,
2875                  * and SMM handlers might indeed rely on 4G segment limits,
2876                  * so do not report SMM to be available if real mode is
2877                  * emulated via vm86 mode.  Still, do not go to great lengths
2878                  * to avoid userspace's usage of the feature, because it is a
2879                  * fringe case that is not enabled except via specific settings
2880                  * of the module parameters.
2881                  */
2882                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2883                 break;
2884         case KVM_CAP_VAPIC:
2885                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2886                 break;
2887         case KVM_CAP_NR_VCPUS:
2888                 r = KVM_SOFT_MAX_VCPUS;
2889                 break;
2890         case KVM_CAP_MAX_VCPUS:
2891                 r = KVM_MAX_VCPUS;
2892                 break;
2893         case KVM_CAP_NR_MEMSLOTS:
2894                 r = KVM_USER_MEM_SLOTS;
2895                 break;
2896         case KVM_CAP_PV_MMU:    /* obsolete */
2897                 r = 0;
2898                 break;
2899         case KVM_CAP_MCE:
2900                 r = KVM_MAX_MCE_BANKS;
2901                 break;
2902         case KVM_CAP_XCRS:
2903                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2904                 break;
2905         case KVM_CAP_TSC_CONTROL:
2906                 r = kvm_has_tsc_control;
2907                 break;
2908         case KVM_CAP_X2APIC_API:
2909                 r = KVM_X2APIC_API_VALID_FLAGS;
2910                 break;
2911         default:
2912                 r = 0;
2913                 break;
2914         }
2915         return r;
2916
2917 }
2918
2919 long kvm_arch_dev_ioctl(struct file *filp,
2920                         unsigned int ioctl, unsigned long arg)
2921 {
2922         void __user *argp = (void __user *)arg;
2923         long r;
2924
2925         switch (ioctl) {
2926         case KVM_GET_MSR_INDEX_LIST: {
2927                 struct kvm_msr_list __user *user_msr_list = argp;
2928                 struct kvm_msr_list msr_list;
2929                 unsigned n;
2930
2931                 r = -EFAULT;
2932                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2933                         goto out;
2934                 n = msr_list.nmsrs;
2935                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2936                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2937                         goto out;
2938                 r = -E2BIG;
2939                 if (n < msr_list.nmsrs)
2940                         goto out;
2941                 r = -EFAULT;
2942                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2943                                  num_msrs_to_save * sizeof(u32)))
2944                         goto out;
2945                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2946                                  &emulated_msrs,
2947                                  num_emulated_msrs * sizeof(u32)))
2948                         goto out;
2949                 r = 0;
2950                 break;
2951         }
2952         case KVM_GET_SUPPORTED_CPUID:
2953         case KVM_GET_EMULATED_CPUID: {
2954                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2955                 struct kvm_cpuid2 cpuid;
2956
2957                 r = -EFAULT;
2958                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2959                         goto out;
2960
2961                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2962                                             ioctl);
2963                 if (r)
2964                         goto out;
2965
2966                 r = -EFAULT;
2967                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2968                         goto out;
2969                 r = 0;
2970                 break;
2971         }
2972         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2973                 r = -EFAULT;
2974                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2975                                  sizeof(kvm_mce_cap_supported)))
2976                         goto out;
2977                 r = 0;
2978                 break;
2979         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
2980                 struct kvm_msr_list __user *user_msr_list = argp;
2981                 struct kvm_msr_list msr_list;
2982                 unsigned int n;
2983
2984                 r = -EFAULT;
2985                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
2986                         goto out;
2987                 n = msr_list.nmsrs;
2988                 msr_list.nmsrs = num_msr_based_features;
2989                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
2990                         goto out;
2991                 r = -E2BIG;
2992                 if (n < msr_list.nmsrs)
2993                         goto out;
2994                 r = -EFAULT;
2995                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
2996                                  num_msr_based_features * sizeof(u32)))
2997                         goto out;
2998                 r = 0;
2999                 break;
3000         }
3001         case KVM_GET_MSRS:
3002                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3003                 break;
3004         }
3005         default:
3006                 r = -EINVAL;
3007         }
3008 out:
3009         return r;
3010 }
3011
3012 static void wbinvd_ipi(void *garbage)
3013 {
3014         wbinvd();
3015 }
3016
3017 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3018 {
3019         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3020 }
3021
3022 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3023 {
3024         /* Address WBINVD may be executed by guest */
3025         if (need_emulate_wbinvd(vcpu)) {
3026                 if (kvm_x86_ops->has_wbinvd_exit())
3027                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3028                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3029                         smp_call_function_single(vcpu->cpu,
3030                                         wbinvd_ipi, NULL, 1);
3031         }
3032
3033         kvm_x86_ops->vcpu_load(vcpu, cpu);
3034
3035         /* Apply any externally detected TSC adjustments (due to suspend) */
3036         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3037                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3038                 vcpu->arch.tsc_offset_adjustment = 0;
3039                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3040         }
3041
3042         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3043                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3044                                 rdtsc() - vcpu->arch.last_host_tsc;
3045                 if (tsc_delta < 0)
3046                         mark_tsc_unstable("KVM discovered backwards TSC");
3047
3048                 if (kvm_check_tsc_unstable()) {
3049                         u64 offset = kvm_compute_tsc_offset(vcpu,
3050                                                 vcpu->arch.last_guest_tsc);
3051                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3052                         vcpu->arch.tsc_catchup = 1;
3053                 }
3054
3055                 if (kvm_lapic_hv_timer_in_use(vcpu))
3056                         kvm_lapic_restart_hv_timer(vcpu);
3057
3058                 /*
3059                  * On a host with synchronized TSC, there is no need to update
3060                  * kvmclock on vcpu->cpu migration
3061                  */
3062                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3063                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3064                 if (vcpu->cpu != cpu)
3065                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3066                 vcpu->cpu = cpu;
3067         }
3068
3069         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3070 }
3071
3072 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3073 {
3074         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3075                 return;
3076
3077         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3078
3079         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3080                         &vcpu->arch.st.steal.preempted,
3081                         offsetof(struct kvm_steal_time, preempted),
3082                         sizeof(vcpu->arch.st.steal.preempted));
3083 }
3084
3085 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3086 {
3087         int idx;
3088
3089         if (vcpu->preempted)
3090                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3091
3092         /*
3093          * Disable page faults because we're in atomic context here.
3094          * kvm_write_guest_offset_cached() would call might_fault()
3095          * that relies on pagefault_disable() to tell if there's a
3096          * bug. NOTE: the write to guest memory may not go through if
3097          * during postcopy live migration or if there's heavy guest
3098          * paging.
3099          */
3100         pagefault_disable();
3101         /*
3102          * kvm_memslots() will be called by
3103          * kvm_write_guest_offset_cached() so take the srcu lock.
3104          */
3105         idx = srcu_read_lock(&vcpu->kvm->srcu);
3106         kvm_steal_time_set_preempted(vcpu);
3107         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3108         pagefault_enable();
3109         kvm_x86_ops->vcpu_put(vcpu);
3110         vcpu->arch.last_host_tsc = rdtsc();
3111         /*
3112          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3113          * on every vmexit, but if not, we might have a stale dr6 from the
3114          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3115          */
3116         set_debugreg(0, 6);
3117 }
3118
3119 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3120                                     struct kvm_lapic_state *s)
3121 {
3122         if (vcpu->arch.apicv_active)
3123                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3124
3125         return kvm_apic_get_state(vcpu, s);
3126 }
3127
3128 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3129                                     struct kvm_lapic_state *s)
3130 {
3131         int r;
3132
3133         r = kvm_apic_set_state(vcpu, s);
3134         if (r)
3135                 return r;
3136         update_cr8_intercept(vcpu);
3137
3138         return 0;
3139 }
3140
3141 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3142 {
3143         return (!lapic_in_kernel(vcpu) ||
3144                 kvm_apic_accept_pic_intr(vcpu));
3145 }
3146
3147 /*
3148  * if userspace requested an interrupt window, check that the
3149  * interrupt window is open.
3150  *
3151  * No need to exit to userspace if we already have an interrupt queued.
3152  */
3153 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3154 {
3155         return kvm_arch_interrupt_allowed(vcpu) &&
3156                 !kvm_cpu_has_interrupt(vcpu) &&
3157                 !kvm_event_needs_reinjection(vcpu) &&
3158                 kvm_cpu_accept_dm_intr(vcpu);
3159 }
3160
3161 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3162                                     struct kvm_interrupt *irq)
3163 {
3164         if (irq->irq >= KVM_NR_INTERRUPTS)
3165                 return -EINVAL;
3166
3167         if (!irqchip_in_kernel(vcpu->kvm)) {
3168                 kvm_queue_interrupt(vcpu, irq->irq, false);
3169                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3170                 return 0;
3171         }
3172
3173         /*
3174          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3175          * fail for in-kernel 8259.
3176          */
3177         if (pic_in_kernel(vcpu->kvm))
3178                 return -ENXIO;
3179
3180         if (vcpu->arch.pending_external_vector != -1)
3181                 return -EEXIST;
3182
3183         vcpu->arch.pending_external_vector = irq->irq;
3184         kvm_make_request(KVM_REQ_EVENT, vcpu);
3185         return 0;
3186 }
3187
3188 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3189 {
3190         kvm_inject_nmi(vcpu);
3191
3192         return 0;
3193 }
3194
3195 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3196 {
3197         kvm_make_request(KVM_REQ_SMI, vcpu);
3198
3199         return 0;
3200 }
3201
3202 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3203                                            struct kvm_tpr_access_ctl *tac)
3204 {
3205         if (tac->flags)
3206                 return -EINVAL;
3207         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3208         return 0;
3209 }
3210
3211 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3212                                         u64 mcg_cap)
3213 {
3214         int r;
3215         unsigned bank_num = mcg_cap & 0xff, bank;
3216
3217         r = -EINVAL;
3218         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3219                 goto out;
3220         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3221                 goto out;
3222         r = 0;
3223         vcpu->arch.mcg_cap = mcg_cap;
3224         /* Init IA32_MCG_CTL to all 1s */
3225         if (mcg_cap & MCG_CTL_P)
3226                 vcpu->arch.mcg_ctl = ~(u64)0;
3227         /* Init IA32_MCi_CTL to all 1s */
3228         for (bank = 0; bank < bank_num; bank++)
3229                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3230
3231         if (kvm_x86_ops->setup_mce)
3232                 kvm_x86_ops->setup_mce(vcpu);
3233 out:
3234         return r;
3235 }
3236
3237 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3238                                       struct kvm_x86_mce *mce)
3239 {
3240         u64 mcg_cap = vcpu->arch.mcg_cap;
3241         unsigned bank_num = mcg_cap & 0xff;
3242         u64 *banks = vcpu->arch.mce_banks;
3243
3244         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3245                 return -EINVAL;
3246         /*
3247          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3248          * reporting is disabled
3249          */
3250         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3251             vcpu->arch.mcg_ctl != ~(u64)0)
3252                 return 0;
3253         banks += 4 * mce->bank;
3254         /*
3255          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3256          * reporting is disabled for the bank
3257          */
3258         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3259                 return 0;
3260         if (mce->status & MCI_STATUS_UC) {
3261                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3262                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3263                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3264                         return 0;
3265                 }
3266                 if (banks[1] & MCI_STATUS_VAL)
3267                         mce->status |= MCI_STATUS_OVER;
3268                 banks[2] = mce->addr;
3269                 banks[3] = mce->misc;
3270                 vcpu->arch.mcg_status = mce->mcg_status;
3271                 banks[1] = mce->status;
3272                 kvm_queue_exception(vcpu, MC_VECTOR);
3273         } else if (!(banks[1] & MCI_STATUS_VAL)
3274                    || !(banks[1] & MCI_STATUS_UC)) {
3275                 if (banks[1] & MCI_STATUS_VAL)
3276                         mce->status |= MCI_STATUS_OVER;
3277                 banks[2] = mce->addr;
3278                 banks[3] = mce->misc;
3279                 banks[1] = mce->status;
3280         } else
3281                 banks[1] |= MCI_STATUS_OVER;
3282         return 0;
3283 }
3284
3285 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3286                                                struct kvm_vcpu_events *events)
3287 {
3288         process_nmi(vcpu);
3289         /*
3290          * FIXME: pass injected and pending separately.  This is only
3291          * needed for nested virtualization, whose state cannot be
3292          * migrated yet.  For now we can combine them.
3293          */
3294         events->exception.injected =
3295                 (vcpu->arch.exception.pending ||
3296                  vcpu->arch.exception.injected) &&
3297                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3298         events->exception.nr = vcpu->arch.exception.nr;
3299         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3300         events->exception.pad = 0;
3301         events->exception.error_code = vcpu->arch.exception.error_code;
3302
3303         events->interrupt.injected =
3304                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3305         events->interrupt.nr = vcpu->arch.interrupt.nr;
3306         events->interrupt.soft = 0;
3307         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3308
3309         events->nmi.injected = vcpu->arch.nmi_injected;
3310         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3311         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3312         events->nmi.pad = 0;
3313
3314         events->sipi_vector = 0; /* never valid when reporting to user space */
3315
3316         events->smi.smm = is_smm(vcpu);
3317         events->smi.pending = vcpu->arch.smi_pending;
3318         events->smi.smm_inside_nmi =
3319                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3320         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3321
3322         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3323                          | KVM_VCPUEVENT_VALID_SHADOW
3324                          | KVM_VCPUEVENT_VALID_SMM);
3325         memset(&events->reserved, 0, sizeof(events->reserved));
3326 }
3327
3328 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3329
3330 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3331                                               struct kvm_vcpu_events *events)
3332 {
3333         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3334                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3335                               | KVM_VCPUEVENT_VALID_SHADOW
3336                               | KVM_VCPUEVENT_VALID_SMM))
3337                 return -EINVAL;
3338
3339         if (events->exception.injected &&
3340             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3341              is_guest_mode(vcpu)))
3342                 return -EINVAL;
3343
3344         /* INITs are latched while in SMM */
3345         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3346             (events->smi.smm || events->smi.pending) &&
3347             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3348                 return -EINVAL;
3349
3350         process_nmi(vcpu);
3351         vcpu->arch.exception.injected = false;
3352         vcpu->arch.exception.pending = events->exception.injected;
3353         vcpu->arch.exception.nr = events->exception.nr;
3354         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3355         vcpu->arch.exception.error_code = events->exception.error_code;
3356
3357         vcpu->arch.interrupt.pending = events->interrupt.injected;
3358         vcpu->arch.interrupt.nr = events->interrupt.nr;
3359         vcpu->arch.interrupt.soft = events->interrupt.soft;
3360         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3361                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3362                                                   events->interrupt.shadow);
3363
3364         vcpu->arch.nmi_injected = events->nmi.injected;
3365         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3366                 vcpu->arch.nmi_pending = events->nmi.pending;
3367         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3368
3369         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3370             lapic_in_kernel(vcpu))
3371                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3372
3373         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3374                 u32 hflags = vcpu->arch.hflags;
3375                 if (events->smi.smm)
3376                         hflags |= HF_SMM_MASK;
3377                 else
3378                         hflags &= ~HF_SMM_MASK;
3379                 kvm_set_hflags(vcpu, hflags);
3380
3381                 vcpu->arch.smi_pending = events->smi.pending;
3382
3383                 if (events->smi.smm) {
3384                         if (events->smi.smm_inside_nmi)
3385                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3386                         else
3387                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3388                         if (lapic_in_kernel(vcpu)) {
3389                                 if (events->smi.latched_init)
3390                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3391                                 else
3392                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3393                         }
3394                 }
3395         }
3396
3397         kvm_make_request(KVM_REQ_EVENT, vcpu);
3398
3399         return 0;
3400 }
3401
3402 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3403                                              struct kvm_debugregs *dbgregs)
3404 {
3405         unsigned long val;
3406
3407         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3408         kvm_get_dr(vcpu, 6, &val);
3409         dbgregs->dr6 = val;
3410         dbgregs->dr7 = vcpu->arch.dr7;
3411         dbgregs->flags = 0;
3412         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3413 }
3414
3415 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3416                                             struct kvm_debugregs *dbgregs)
3417 {
3418         if (dbgregs->flags)
3419                 return -EINVAL;
3420
3421         if (dbgregs->dr6 & ~0xffffffffull)
3422                 return -EINVAL;
3423         if (dbgregs->dr7 & ~0xffffffffull)
3424                 return -EINVAL;
3425
3426         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3427         kvm_update_dr0123(vcpu);
3428         vcpu->arch.dr6 = dbgregs->dr6;
3429         kvm_update_dr6(vcpu);
3430         vcpu->arch.dr7 = dbgregs->dr7;
3431         kvm_update_dr7(vcpu);
3432
3433         return 0;
3434 }
3435
3436 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3437
3438 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3439 {
3440         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3441         u64 xstate_bv = xsave->header.xfeatures;
3442         u64 valid;
3443
3444         /*
3445          * Copy legacy XSAVE area, to avoid complications with CPUID
3446          * leaves 0 and 1 in the loop below.
3447          */
3448         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3449
3450         /* Set XSTATE_BV */
3451         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3452         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3453
3454         /*
3455          * Copy each region from the possibly compacted offset to the
3456          * non-compacted offset.
3457          */
3458         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3459         while (valid) {
3460                 u64 feature = valid & -valid;
3461                 int index = fls64(feature) - 1;
3462                 void *src = get_xsave_addr(xsave, feature);
3463
3464                 if (src) {
3465                         u32 size, offset, ecx, edx;
3466                         cpuid_count(XSTATE_CPUID, index,
3467                                     &size, &offset, &ecx, &edx);
3468                         if (feature == XFEATURE_MASK_PKRU)
3469                                 memcpy(dest + offset, &vcpu->arch.pkru,
3470                                        sizeof(vcpu->arch.pkru));
3471                         else
3472                                 memcpy(dest + offset, src, size);
3473
3474                 }
3475
3476                 valid -= feature;
3477         }
3478 }
3479
3480 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3481 {
3482         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3483         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3484         u64 valid;
3485
3486         /*
3487          * Copy legacy XSAVE area, to avoid complications with CPUID
3488          * leaves 0 and 1 in the loop below.
3489          */
3490         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3491
3492         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3493         xsave->header.xfeatures = xstate_bv;
3494         if (boot_cpu_has(X86_FEATURE_XSAVES))
3495                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3496
3497         /*
3498          * Copy each region from the non-compacted offset to the
3499          * possibly compacted offset.
3500          */
3501         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3502         while (valid) {
3503                 u64 feature = valid & -valid;
3504                 int index = fls64(feature) - 1;
3505                 void *dest = get_xsave_addr(xsave, feature);
3506
3507                 if (dest) {
3508                         u32 size, offset, ecx, edx;
3509                         cpuid_count(XSTATE_CPUID, index,
3510                                     &size, &offset, &ecx, &edx);
3511                         if (feature == XFEATURE_MASK_PKRU)
3512                                 memcpy(&vcpu->arch.pkru, src + offset,
3513                                        sizeof(vcpu->arch.pkru));
3514                         else
3515                                 memcpy(dest, src + offset, size);
3516                 }
3517
3518                 valid -= feature;
3519         }
3520 }
3521
3522 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3523                                          struct kvm_xsave *guest_xsave)
3524 {
3525         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3526                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3527                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3528         } else {
3529                 memcpy(guest_xsave->region,
3530                         &vcpu->arch.guest_fpu.state.fxsave,
3531                         sizeof(struct fxregs_state));
3532                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3533                         XFEATURE_MASK_FPSSE;
3534         }
3535 }
3536
3537 #define XSAVE_MXCSR_OFFSET 24
3538
3539 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3540                                         struct kvm_xsave *guest_xsave)
3541 {
3542         u64 xstate_bv =
3543                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3544         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3545
3546         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3547                 /*
3548                  * Here we allow setting states that are not present in
3549                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3550                  * with old userspace.
3551                  */
3552                 if (xstate_bv & ~kvm_supported_xcr0() ||
3553                         mxcsr & ~mxcsr_feature_mask)
3554                         return -EINVAL;
3555                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3556         } else {
3557                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3558                         mxcsr & ~mxcsr_feature_mask)
3559                         return -EINVAL;
3560                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3561                         guest_xsave->region, sizeof(struct fxregs_state));
3562         }
3563         return 0;
3564 }
3565
3566 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3567                                         struct kvm_xcrs *guest_xcrs)
3568 {
3569         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3570                 guest_xcrs->nr_xcrs = 0;
3571                 return;
3572         }
3573
3574         guest_xcrs->nr_xcrs = 1;
3575         guest_xcrs->flags = 0;
3576         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3577         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3578 }
3579
3580 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3581                                        struct kvm_xcrs *guest_xcrs)
3582 {
3583         int i, r = 0;
3584
3585         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3586                 return -EINVAL;
3587
3588         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3589                 return -EINVAL;
3590
3591         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3592                 /* Only support XCR0 currently */
3593                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3594                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3595                                 guest_xcrs->xcrs[i].value);
3596                         break;
3597                 }
3598         if (r)
3599                 r = -EINVAL;
3600         return r;
3601 }
3602
3603 /*
3604  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3605  * stopped by the hypervisor.  This function will be called from the host only.
3606  * EINVAL is returned when the host attempts to set the flag for a guest that
3607  * does not support pv clocks.
3608  */
3609 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3610 {
3611         if (!vcpu->arch.pv_time_enabled)
3612                 return -EINVAL;
3613         vcpu->arch.pvclock_set_guest_stopped_request = true;
3614         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3615         return 0;
3616 }
3617
3618 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3619                                      struct kvm_enable_cap *cap)
3620 {
3621         if (cap->flags)
3622                 return -EINVAL;
3623
3624         switch (cap->cap) {
3625         case KVM_CAP_HYPERV_SYNIC2:
3626                 if (cap->args[0])
3627                         return -EINVAL;
3628         case KVM_CAP_HYPERV_SYNIC:
3629                 if (!irqchip_in_kernel(vcpu->kvm))
3630                         return -EINVAL;
3631                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3632                                              KVM_CAP_HYPERV_SYNIC2);
3633         default:
3634                 return -EINVAL;
3635         }
3636 }
3637
3638 long kvm_arch_vcpu_ioctl(struct file *filp,
3639                          unsigned int ioctl, unsigned long arg)
3640 {
3641         struct kvm_vcpu *vcpu = filp->private_data;
3642         void __user *argp = (void __user *)arg;
3643         int r;
3644         union {
3645                 struct kvm_lapic_state *lapic;
3646                 struct kvm_xsave *xsave;
3647                 struct kvm_xcrs *xcrs;
3648                 void *buffer;
3649         } u;
3650
3651         vcpu_load(vcpu);
3652
3653         u.buffer = NULL;
3654         switch (ioctl) {
3655         case KVM_GET_LAPIC: {
3656                 r = -EINVAL;
3657                 if (!lapic_in_kernel(vcpu))
3658                         goto out;
3659                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3660
3661                 r = -ENOMEM;
3662                 if (!u.lapic)
3663                         goto out;
3664                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3665                 if (r)
3666                         goto out;
3667                 r = -EFAULT;
3668                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3669                         goto out;
3670                 r = 0;
3671                 break;
3672         }
3673         case KVM_SET_LAPIC: {
3674                 r = -EINVAL;
3675                 if (!lapic_in_kernel(vcpu))
3676                         goto out;
3677                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3678                 if (IS_ERR(u.lapic)) {
3679                         r = PTR_ERR(u.lapic);
3680                         goto out_nofree;
3681                 }
3682
3683                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3684                 break;
3685         }
3686         case KVM_INTERRUPT: {
3687                 struct kvm_interrupt irq;
3688
3689                 r = -EFAULT;
3690                 if (copy_from_user(&irq, argp, sizeof irq))
3691                         goto out;
3692                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3693                 break;
3694         }
3695         case KVM_NMI: {
3696                 r = kvm_vcpu_ioctl_nmi(vcpu);
3697                 break;
3698         }
3699         case KVM_SMI: {
3700                 r = kvm_vcpu_ioctl_smi(vcpu);
3701                 break;
3702         }
3703         case KVM_SET_CPUID: {
3704                 struct kvm_cpuid __user *cpuid_arg = argp;
3705                 struct kvm_cpuid cpuid;
3706
3707                 r = -EFAULT;
3708                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3709                         goto out;
3710                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3711                 break;
3712         }
3713         case KVM_SET_CPUID2: {
3714                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3715                 struct kvm_cpuid2 cpuid;
3716
3717                 r = -EFAULT;
3718                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3719                         goto out;
3720                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3721                                               cpuid_arg->entries);
3722                 break;
3723         }
3724         case KVM_GET_CPUID2: {
3725                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3726                 struct kvm_cpuid2 cpuid;
3727
3728                 r = -EFAULT;
3729                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3730                         goto out;
3731                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3732                                               cpuid_arg->entries);
3733                 if (r)
3734                         goto out;
3735                 r = -EFAULT;
3736                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3737                         goto out;
3738                 r = 0;
3739                 break;
3740         }
3741         case KVM_GET_MSRS: {
3742                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3743                 r = msr_io(vcpu, argp, do_get_msr, 1);
3744                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3745                 break;
3746         }
3747         case KVM_SET_MSRS: {
3748                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3749                 r = msr_io(vcpu, argp, do_set_msr, 0);
3750                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3751                 break;
3752         }
3753         case KVM_TPR_ACCESS_REPORTING: {
3754                 struct kvm_tpr_access_ctl tac;
3755
3756                 r = -EFAULT;
3757                 if (copy_from_user(&tac, argp, sizeof tac))
3758                         goto out;
3759                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3760                 if (r)
3761                         goto out;
3762                 r = -EFAULT;
3763                 if (copy_to_user(argp, &tac, sizeof tac))
3764                         goto out;
3765                 r = 0;
3766                 break;
3767         };
3768         case KVM_SET_VAPIC_ADDR: {
3769                 struct kvm_vapic_addr va;
3770                 int idx;
3771
3772                 r = -EINVAL;
3773                 if (!lapic_in_kernel(vcpu))
3774                         goto out;
3775                 r = -EFAULT;
3776                 if (copy_from_user(&va, argp, sizeof va))
3777                         goto out;
3778                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3779                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3780                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3781                 break;
3782         }
3783         case KVM_X86_SETUP_MCE: {
3784                 u64 mcg_cap;
3785
3786                 r = -EFAULT;
3787                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3788                         goto out;
3789                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3790                 break;
3791         }
3792         case KVM_X86_SET_MCE: {
3793                 struct kvm_x86_mce mce;
3794
3795                 r = -EFAULT;
3796                 if (copy_from_user(&mce, argp, sizeof mce))
3797                         goto out;
3798                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3799                 break;
3800         }
3801         case KVM_GET_VCPU_EVENTS: {
3802                 struct kvm_vcpu_events events;
3803
3804                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3805
3806                 r = -EFAULT;
3807                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3808                         break;
3809                 r = 0;
3810                 break;
3811         }
3812         case KVM_SET_VCPU_EVENTS: {
3813                 struct kvm_vcpu_events events;
3814
3815                 r = -EFAULT;
3816                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3817                         break;
3818
3819                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3820                 break;
3821         }
3822         case KVM_GET_DEBUGREGS: {
3823                 struct kvm_debugregs dbgregs;
3824
3825                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3826
3827                 r = -EFAULT;
3828                 if (copy_to_user(argp, &dbgregs,
3829                                  sizeof(struct kvm_debugregs)))
3830                         break;
3831                 r = 0;
3832                 break;
3833         }
3834         case KVM_SET_DEBUGREGS: {
3835                 struct kvm_debugregs dbgregs;
3836
3837                 r = -EFAULT;
3838                 if (copy_from_user(&dbgregs, argp,
3839                                    sizeof(struct kvm_debugregs)))
3840                         break;
3841
3842                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3843                 break;
3844         }
3845         case KVM_GET_XSAVE: {
3846                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3847                 r = -ENOMEM;
3848                 if (!u.xsave)
3849                         break;
3850
3851                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3852
3853                 r = -EFAULT;
3854                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3855                         break;
3856                 r = 0;
3857                 break;
3858         }
3859         case KVM_SET_XSAVE: {
3860                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3861                 if (IS_ERR(u.xsave)) {
3862                         r = PTR_ERR(u.xsave);
3863                         goto out_nofree;
3864                 }
3865
3866                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3867                 break;
3868         }
3869         case KVM_GET_XCRS: {
3870                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3871                 r = -ENOMEM;
3872                 if (!u.xcrs)
3873                         break;
3874
3875                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3876
3877                 r = -EFAULT;
3878                 if (copy_to_user(argp, u.xcrs,
3879                                  sizeof(struct kvm_xcrs)))
3880                         break;
3881                 r = 0;
3882                 break;
3883         }
3884         case KVM_SET_XCRS: {
3885                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3886                 if (IS_ERR(u.xcrs)) {
3887                         r = PTR_ERR(u.xcrs);
3888                         goto out_nofree;
3889                 }
3890
3891                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3892                 break;
3893         }
3894         case KVM_SET_TSC_KHZ: {
3895                 u32 user_tsc_khz;
3896
3897                 r = -EINVAL;
3898                 user_tsc_khz = (u32)arg;
3899
3900                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3901                         goto out;
3902
3903                 if (user_tsc_khz == 0)
3904                         user_tsc_khz = tsc_khz;
3905
3906                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3907                         r = 0;
3908
3909                 goto out;
3910         }
3911         case KVM_GET_TSC_KHZ: {
3912                 r = vcpu->arch.virtual_tsc_khz;
3913                 goto out;
3914         }
3915         case KVM_KVMCLOCK_CTRL: {
3916                 r = kvm_set_guest_paused(vcpu);
3917                 goto out;
3918         }
3919         case KVM_ENABLE_CAP: {
3920                 struct kvm_enable_cap cap;
3921
3922                 r = -EFAULT;
3923                 if (copy_from_user(&cap, argp, sizeof(cap)))
3924                         goto out;
3925                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3926                 break;
3927         }
3928         default:
3929                 r = -EINVAL;
3930         }
3931 out:
3932         kfree(u.buffer);
3933 out_nofree:
3934         vcpu_put(vcpu);
3935         return r;
3936 }
3937
3938 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3939 {
3940         return VM_FAULT_SIGBUS;
3941 }
3942
3943 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3944 {
3945         int ret;
3946
3947         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3948                 return -EINVAL;
3949         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3950         return ret;
3951 }
3952
3953 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3954                                               u64 ident_addr)
3955 {
3956         kvm->arch.ept_identity_map_addr = ident_addr;
3957         return 0;
3958 }
3959
3960 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3961                                           u32 kvm_nr_mmu_pages)
3962 {
3963         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3964                 return -EINVAL;
3965
3966         mutex_lock(&kvm->slots_lock);
3967
3968         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3969         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3970
3971         mutex_unlock(&kvm->slots_lock);
3972         return 0;
3973 }
3974
3975 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3976 {
3977         return kvm->arch.n_max_mmu_pages;
3978 }
3979
3980 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3981 {
3982         struct kvm_pic *pic = kvm->arch.vpic;
3983         int r;
3984
3985         r = 0;
3986         switch (chip->chip_id) {
3987         case KVM_IRQCHIP_PIC_MASTER:
3988                 memcpy(&chip->chip.pic, &pic->pics[0],
3989                         sizeof(struct kvm_pic_state));
3990                 break;
3991         case KVM_IRQCHIP_PIC_SLAVE:
3992                 memcpy(&chip->chip.pic, &pic->pics[1],
3993                         sizeof(struct kvm_pic_state));
3994                 break;
3995         case KVM_IRQCHIP_IOAPIC:
3996                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3997                 break;
3998         default:
3999                 r = -EINVAL;
4000                 break;
4001         }
4002         return r;
4003 }
4004
4005 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4006 {
4007         struct kvm_pic *pic = kvm->arch.vpic;
4008         int r;
4009
4010         r = 0;
4011         switch (chip->chip_id) {
4012         case KVM_IRQCHIP_PIC_MASTER:
4013                 spin_lock(&pic->lock);
4014                 memcpy(&pic->pics[0], &chip->chip.pic,
4015                         sizeof(struct kvm_pic_state));
4016                 spin_unlock(&pic->lock);
4017                 break;
4018         case KVM_IRQCHIP_PIC_SLAVE:
4019                 spin_lock(&pic->lock);
4020                 memcpy(&pic->pics[1], &chip->chip.pic,
4021                         sizeof(struct kvm_pic_state));
4022                 spin_unlock(&pic->lock);
4023                 break;
4024         case KVM_IRQCHIP_IOAPIC:
4025                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4026                 break;
4027         default:
4028                 r = -EINVAL;
4029                 break;
4030         }
4031         kvm_pic_update_irq(pic);
4032         return r;
4033 }
4034
4035 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4036 {
4037         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4038
4039         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4040
4041         mutex_lock(&kps->lock);
4042         memcpy(ps, &kps->channels, sizeof(*ps));
4043         mutex_unlock(&kps->lock);
4044         return 0;
4045 }
4046
4047 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4048 {
4049         int i;
4050         struct kvm_pit *pit = kvm->arch.vpit;
4051
4052         mutex_lock(&pit->pit_state.lock);
4053         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4054         for (i = 0; i < 3; i++)
4055                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4056         mutex_unlock(&pit->pit_state.lock);
4057         return 0;
4058 }
4059
4060 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4061 {
4062         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4063         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4064                 sizeof(ps->channels));
4065         ps->flags = kvm->arch.vpit->pit_state.flags;
4066         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4067         memset(&ps->reserved, 0, sizeof(ps->reserved));
4068         return 0;
4069 }
4070
4071 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4072 {
4073         int start = 0;
4074         int i;
4075         u32 prev_legacy, cur_legacy;
4076         struct kvm_pit *pit = kvm->arch.vpit;
4077
4078         mutex_lock(&pit->pit_state.lock);
4079         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4080         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4081         if (!prev_legacy && cur_legacy)
4082                 start = 1;
4083         memcpy(&pit->pit_state.channels, &ps->channels,
4084                sizeof(pit->pit_state.channels));
4085         pit->pit_state.flags = ps->flags;
4086         for (i = 0; i < 3; i++)
4087                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4088                                    start && i == 0);
4089         mutex_unlock(&pit->pit_state.lock);
4090         return 0;
4091 }
4092
4093 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4094                                  struct kvm_reinject_control *control)
4095 {
4096         struct kvm_pit *pit = kvm->arch.vpit;
4097
4098         if (!pit)
4099                 return -ENXIO;
4100
4101         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4102          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4103          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4104          */
4105         mutex_lock(&pit->pit_state.lock);
4106         kvm_pit_set_reinject(pit, control->pit_reinject);
4107         mutex_unlock(&pit->pit_state.lock);
4108
4109         return 0;
4110 }
4111
4112 /**
4113  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4114  * @kvm: kvm instance
4115  * @log: slot id and address to which we copy the log
4116  *
4117  * Steps 1-4 below provide general overview of dirty page logging. See
4118  * kvm_get_dirty_log_protect() function description for additional details.
4119  *
4120  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4121  * always flush the TLB (step 4) even if previous step failed  and the dirty
4122  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4123  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4124  * writes will be marked dirty for next log read.
4125  *
4126  *   1. Take a snapshot of the bit and clear it if needed.
4127  *   2. Write protect the corresponding page.
4128  *   3. Copy the snapshot to the userspace.
4129  *   4. Flush TLB's if needed.
4130  */
4131 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4132 {
4133         bool is_dirty = false;
4134         int r;
4135
4136         mutex_lock(&kvm->slots_lock);
4137
4138         /*
4139          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4140          */
4141         if (kvm_x86_ops->flush_log_dirty)
4142                 kvm_x86_ops->flush_log_dirty(kvm);
4143
4144         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4145
4146         /*
4147          * All the TLBs can be flushed out of mmu lock, see the comments in
4148          * kvm_mmu_slot_remove_write_access().
4149          */
4150         lockdep_assert_held(&kvm->slots_lock);
4151         if (is_dirty)
4152                 kvm_flush_remote_tlbs(kvm);
4153
4154         mutex_unlock(&kvm->slots_lock);
4155         return r;
4156 }
4157
4158 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4159                         bool line_status)
4160 {
4161         if (!irqchip_in_kernel(kvm))
4162                 return -ENXIO;
4163
4164         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4165                                         irq_event->irq, irq_event->level,
4166                                         line_status);
4167         return 0;
4168 }
4169
4170 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4171                                    struct kvm_enable_cap *cap)
4172 {
4173         int r;
4174
4175         if (cap->flags)
4176                 return -EINVAL;
4177
4178         switch (cap->cap) {
4179         case KVM_CAP_DISABLE_QUIRKS:
4180                 kvm->arch.disabled_quirks = cap->args[0];
4181                 r = 0;
4182                 break;
4183         case KVM_CAP_SPLIT_IRQCHIP: {
4184                 mutex_lock(&kvm->lock);
4185                 r = -EINVAL;
4186                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4187                         goto split_irqchip_unlock;
4188                 r = -EEXIST;
4189                 if (irqchip_in_kernel(kvm))
4190                         goto split_irqchip_unlock;
4191                 if (kvm->created_vcpus)
4192                         goto split_irqchip_unlock;
4193                 r = kvm_setup_empty_irq_routing(kvm);
4194                 if (r)
4195                         goto split_irqchip_unlock;
4196                 /* Pairs with irqchip_in_kernel. */
4197                 smp_wmb();
4198                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4199                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4200                 r = 0;
4201 split_irqchip_unlock:
4202                 mutex_unlock(&kvm->lock);
4203                 break;
4204         }
4205         case KVM_CAP_X2APIC_API:
4206                 r = -EINVAL;
4207                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4208                         break;
4209
4210                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4211                         kvm->arch.x2apic_format = true;
4212                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4213                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4214
4215                 r = 0;
4216                 break;
4217         default:
4218                 r = -EINVAL;
4219                 break;
4220         }
4221         return r;
4222 }
4223
4224 long kvm_arch_vm_ioctl(struct file *filp,
4225                        unsigned int ioctl, unsigned long arg)
4226 {
4227         struct kvm *kvm = filp->private_data;
4228         void __user *argp = (void __user *)arg;
4229         int r = -ENOTTY;
4230         /*
4231          * This union makes it completely explicit to gcc-3.x
4232          * that these two variables' stack usage should be
4233          * combined, not added together.
4234          */
4235         union {
4236                 struct kvm_pit_state ps;
4237                 struct kvm_pit_state2 ps2;
4238                 struct kvm_pit_config pit_config;
4239         } u;
4240
4241         switch (ioctl) {
4242         case KVM_SET_TSS_ADDR:
4243                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4244                 break;
4245         case KVM_SET_IDENTITY_MAP_ADDR: {
4246                 u64 ident_addr;
4247
4248                 mutex_lock(&kvm->lock);
4249                 r = -EINVAL;
4250                 if (kvm->created_vcpus)
4251                         goto set_identity_unlock;
4252                 r = -EFAULT;
4253                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4254                         goto set_identity_unlock;
4255                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4256 set_identity_unlock:
4257                 mutex_unlock(&kvm->lock);
4258                 break;
4259         }
4260         case KVM_SET_NR_MMU_PAGES:
4261                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4262                 break;
4263         case KVM_GET_NR_MMU_PAGES:
4264                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4265                 break;
4266         case KVM_CREATE_IRQCHIP: {
4267                 mutex_lock(&kvm->lock);
4268
4269                 r = -EEXIST;
4270                 if (irqchip_in_kernel(kvm))
4271                         goto create_irqchip_unlock;
4272
4273                 r = -EINVAL;
4274                 if (kvm->created_vcpus)
4275                         goto create_irqchip_unlock;
4276
4277                 r = kvm_pic_init(kvm);
4278                 if (r)
4279                         goto create_irqchip_unlock;
4280
4281                 r = kvm_ioapic_init(kvm);
4282                 if (r) {
4283                         kvm_pic_destroy(kvm);
4284                         goto create_irqchip_unlock;
4285                 }
4286
4287                 r = kvm_setup_default_irq_routing(kvm);
4288                 if (r) {
4289                         kvm_ioapic_destroy(kvm);
4290                         kvm_pic_destroy(kvm);
4291                         goto create_irqchip_unlock;
4292                 }
4293                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4294                 smp_wmb();
4295                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4296         create_irqchip_unlock:
4297                 mutex_unlock(&kvm->lock);
4298                 break;
4299         }
4300         case KVM_CREATE_PIT:
4301                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4302                 goto create_pit;
4303         case KVM_CREATE_PIT2:
4304                 r = -EFAULT;
4305                 if (copy_from_user(&u.pit_config, argp,
4306                                    sizeof(struct kvm_pit_config)))
4307                         goto out;
4308         create_pit:
4309                 mutex_lock(&kvm->lock);
4310                 r = -EEXIST;
4311                 if (kvm->arch.vpit)
4312                         goto create_pit_unlock;
4313                 r = -ENOMEM;
4314                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4315                 if (kvm->arch.vpit)
4316                         r = 0;
4317         create_pit_unlock:
4318                 mutex_unlock(&kvm->lock);
4319                 break;
4320         case KVM_GET_IRQCHIP: {
4321                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4322                 struct kvm_irqchip *chip;
4323
4324                 chip = memdup_user(argp, sizeof(*chip));
4325                 if (IS_ERR(chip)) {
4326                         r = PTR_ERR(chip);
4327                         goto out;
4328                 }
4329
4330                 r = -ENXIO;
4331                 if (!irqchip_kernel(kvm))
4332                         goto get_irqchip_out;
4333                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4334                 if (r)
4335                         goto get_irqchip_out;
4336                 r = -EFAULT;
4337                 if (copy_to_user(argp, chip, sizeof *chip))
4338                         goto get_irqchip_out;
4339                 r = 0;
4340         get_irqchip_out:
4341                 kfree(chip);
4342                 break;
4343         }
4344         case KVM_SET_IRQCHIP: {
4345                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4346                 struct kvm_irqchip *chip;
4347
4348                 chip = memdup_user(argp, sizeof(*chip));
4349                 if (IS_ERR(chip)) {
4350                         r = PTR_ERR(chip);
4351                         goto out;
4352                 }
4353
4354                 r = -ENXIO;
4355                 if (!irqchip_kernel(kvm))
4356                         goto set_irqchip_out;
4357                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4358                 if (r)
4359                         goto set_irqchip_out;
4360                 r = 0;
4361         set_irqchip_out:
4362                 kfree(chip);
4363                 break;
4364         }
4365         case KVM_GET_PIT: {
4366                 r = -EFAULT;
4367                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4368                         goto out;
4369                 r = -ENXIO;
4370                 if (!kvm->arch.vpit)
4371                         goto out;
4372                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4373                 if (r)
4374                         goto out;
4375                 r = -EFAULT;
4376                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4377                         goto out;
4378                 r = 0;
4379                 break;
4380         }
4381         case KVM_SET_PIT: {
4382                 r = -EFAULT;
4383                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4384                         goto out;
4385                 r = -ENXIO;
4386                 if (!kvm->arch.vpit)
4387                         goto out;
4388                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4389                 break;
4390         }
4391         case KVM_GET_PIT2: {
4392                 r = -ENXIO;
4393                 if (!kvm->arch.vpit)
4394                         goto out;
4395                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4396                 if (r)
4397                         goto out;
4398                 r = -EFAULT;
4399                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4400                         goto out;
4401                 r = 0;
4402                 break;
4403         }
4404         case KVM_SET_PIT2: {
4405                 r = -EFAULT;
4406                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4407                         goto out;
4408                 r = -ENXIO;
4409                 if (!kvm->arch.vpit)
4410                         goto out;
4411                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4412                 break;
4413         }
4414         case KVM_REINJECT_CONTROL: {
4415                 struct kvm_reinject_control control;
4416                 r =  -EFAULT;
4417                 if (copy_from_user(&control, argp, sizeof(control)))
4418                         goto out;
4419                 r = kvm_vm_ioctl_reinject(kvm, &control);
4420                 break;
4421         }
4422         case KVM_SET_BOOT_CPU_ID:
4423                 r = 0;
4424                 mutex_lock(&kvm->lock);
4425                 if (kvm->created_vcpus)
4426                         r = -EBUSY;
4427                 else
4428                         kvm->arch.bsp_vcpu_id = arg;
4429                 mutex_unlock(&kvm->lock);
4430                 break;
4431         case KVM_XEN_HVM_CONFIG: {
4432                 struct kvm_xen_hvm_config xhc;
4433                 r = -EFAULT;
4434                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4435                         goto out;
4436                 r = -EINVAL;
4437                 if (xhc.flags)
4438                         goto out;
4439                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4440                 r = 0;
4441                 break;
4442         }
4443         case KVM_SET_CLOCK: {
4444                 struct kvm_clock_data user_ns;
4445                 u64 now_ns;
4446
4447                 r = -EFAULT;
4448                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4449                         goto out;
4450
4451                 r = -EINVAL;
4452                 if (user_ns.flags)
4453                         goto out;
4454
4455                 r = 0;
4456                 /*
4457                  * TODO: userspace has to take care of races with VCPU_RUN, so
4458                  * kvm_gen_update_masterclock() can be cut down to locked
4459                  * pvclock_update_vm_gtod_copy().
4460                  */
4461                 kvm_gen_update_masterclock(kvm);
4462                 now_ns = get_kvmclock_ns(kvm);
4463                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4464                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4465                 break;
4466         }
4467         case KVM_GET_CLOCK: {
4468                 struct kvm_clock_data user_ns;
4469                 u64 now_ns;
4470
4471                 now_ns = get_kvmclock_ns(kvm);
4472                 user_ns.clock = now_ns;
4473                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4474                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4475
4476                 r = -EFAULT;
4477                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4478                         goto out;
4479                 r = 0;
4480                 break;
4481         }
4482         case KVM_ENABLE_CAP: {
4483                 struct kvm_enable_cap cap;
4484
4485                 r = -EFAULT;
4486                 if (copy_from_user(&cap, argp, sizeof(cap)))
4487                         goto out;
4488                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4489                 break;
4490         }
4491         case KVM_MEMORY_ENCRYPT_OP: {
4492                 r = -ENOTTY;
4493                 if (kvm_x86_ops->mem_enc_op)
4494                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4495                 break;
4496         }
4497         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4498                 struct kvm_enc_region region;
4499
4500                 r = -EFAULT;
4501                 if (copy_from_user(&region, argp, sizeof(region)))
4502                         goto out;
4503
4504                 r = -ENOTTY;
4505                 if (kvm_x86_ops->mem_enc_reg_region)
4506                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4507                 break;
4508         }
4509         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4510                 struct kvm_enc_region region;
4511
4512                 r = -EFAULT;
4513                 if (copy_from_user(&region, argp, sizeof(region)))
4514                         goto out;
4515
4516                 r = -ENOTTY;
4517                 if (kvm_x86_ops->mem_enc_unreg_region)
4518                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4519                 break;
4520         }
4521         case KVM_HYPERV_EVENTFD: {
4522                 struct kvm_hyperv_eventfd hvevfd;
4523
4524                 r = -EFAULT;
4525                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4526                         goto out;
4527                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4528                 break;
4529         }
4530         default:
4531                 r = -ENOTTY;
4532         }
4533 out:
4534         return r;
4535 }
4536
4537 static void kvm_init_msr_list(void)
4538 {
4539         u32 dummy[2];
4540         unsigned i, j;
4541
4542         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4543                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4544                         continue;
4545
4546                 /*
4547                  * Even MSRs that are valid in the host may not be exposed
4548                  * to the guests in some cases.
4549                  */
4550                 switch (msrs_to_save[i]) {
4551                 case MSR_IA32_BNDCFGS:
4552                         if (!kvm_x86_ops->mpx_supported())
4553                                 continue;
4554                         break;
4555                 case MSR_TSC_AUX:
4556                         if (!kvm_x86_ops->rdtscp_supported())
4557                                 continue;
4558                         break;
4559                 default:
4560                         break;
4561                 }
4562
4563                 if (j < i)
4564                         msrs_to_save[j] = msrs_to_save[i];
4565                 j++;
4566         }
4567         num_msrs_to_save = j;
4568
4569         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4570                 switch (emulated_msrs[i]) {
4571                 case MSR_IA32_SMBASE:
4572                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4573                                 continue;
4574                         break;
4575                 default:
4576                         break;
4577                 }
4578
4579                 if (j < i)
4580                         emulated_msrs[j] = emulated_msrs[i];
4581                 j++;
4582         }
4583         num_emulated_msrs = j;
4584
4585         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4586                 struct kvm_msr_entry msr;
4587
4588                 msr.index = msr_based_features[i];
4589                 if (kvm_get_msr_feature(&msr))
4590                         continue;
4591
4592                 if (j < i)
4593                         msr_based_features[j] = msr_based_features[i];
4594                 j++;
4595         }
4596         num_msr_based_features = j;
4597 }
4598
4599 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4600                            const void *v)
4601 {
4602         int handled = 0;
4603         int n;
4604
4605         do {
4606                 n = min(len, 8);
4607                 if (!(lapic_in_kernel(vcpu) &&
4608                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4609                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4610                         break;
4611                 handled += n;
4612                 addr += n;
4613                 len -= n;
4614                 v += n;
4615         } while (len);
4616
4617         return handled;
4618 }
4619
4620 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4621 {
4622         int handled = 0;
4623         int n;
4624
4625         do {
4626                 n = min(len, 8);
4627                 if (!(lapic_in_kernel(vcpu) &&
4628                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4629                                          addr, n, v))
4630                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4631                         break;
4632                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4633                 handled += n;
4634                 addr += n;
4635                 len -= n;
4636                 v += n;
4637         } while (len);
4638
4639         return handled;
4640 }
4641
4642 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4643                         struct kvm_segment *var, int seg)
4644 {
4645         kvm_x86_ops->set_segment(vcpu, var, seg);
4646 }
4647
4648 void kvm_get_segment(struct kvm_vcpu *vcpu,
4649                      struct kvm_segment *var, int seg)
4650 {
4651         kvm_x86_ops->get_segment(vcpu, var, seg);
4652 }
4653
4654 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4655                            struct x86_exception *exception)
4656 {
4657         gpa_t t_gpa;
4658
4659         BUG_ON(!mmu_is_nested(vcpu));
4660
4661         /* NPT walks are always user-walks */
4662         access |= PFERR_USER_MASK;
4663         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4664
4665         return t_gpa;
4666 }
4667
4668 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4669                               struct x86_exception *exception)
4670 {
4671         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4672         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4673 }
4674
4675  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4676                                 struct x86_exception *exception)
4677 {
4678         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4679         access |= PFERR_FETCH_MASK;
4680         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4681 }
4682
4683 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4684                                struct x86_exception *exception)
4685 {
4686         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4687         access |= PFERR_WRITE_MASK;
4688         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4689 }
4690
4691 /* uses this to access any guest's mapped memory without checking CPL */
4692 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4693                                 struct x86_exception *exception)
4694 {
4695         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4696 }
4697
4698 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4699                                       struct kvm_vcpu *vcpu, u32 access,
4700                                       struct x86_exception *exception)
4701 {
4702         void *data = val;
4703         int r = X86EMUL_CONTINUE;
4704
4705         while (bytes) {
4706                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4707                                                             exception);
4708                 unsigned offset = addr & (PAGE_SIZE-1);
4709                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4710                 int ret;
4711
4712                 if (gpa == UNMAPPED_GVA)
4713                         return X86EMUL_PROPAGATE_FAULT;
4714                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4715                                                offset, toread);
4716                 if (ret < 0) {
4717                         r = X86EMUL_IO_NEEDED;
4718                         goto out;
4719                 }
4720
4721                 bytes -= toread;
4722                 data += toread;
4723                 addr += toread;
4724         }
4725 out:
4726         return r;
4727 }
4728
4729 /* used for instruction fetching */
4730 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4731                                 gva_t addr, void *val, unsigned int bytes,
4732                                 struct x86_exception *exception)
4733 {
4734         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4735         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4736         unsigned offset;
4737         int ret;
4738
4739         /* Inline kvm_read_guest_virt_helper for speed.  */
4740         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4741                                                     exception);
4742         if (unlikely(gpa == UNMAPPED_GVA))
4743                 return X86EMUL_PROPAGATE_FAULT;
4744
4745         offset = addr & (PAGE_SIZE-1);
4746         if (WARN_ON(offset + bytes > PAGE_SIZE))
4747                 bytes = (unsigned)PAGE_SIZE - offset;
4748         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4749                                        offset, bytes);
4750         if (unlikely(ret < 0))
4751                 return X86EMUL_IO_NEEDED;
4752
4753         return X86EMUL_CONTINUE;
4754 }
4755
4756 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4757                                gva_t addr, void *val, unsigned int bytes,
4758                                struct x86_exception *exception)
4759 {
4760         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4761         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4762
4763         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4764                                           exception);
4765 }
4766 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4767
4768 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4769                                       gva_t addr, void *val, unsigned int bytes,
4770                                       struct x86_exception *exception)
4771 {
4772         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4773         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4774 }
4775
4776 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4777                 unsigned long addr, void *val, unsigned int bytes)
4778 {
4779         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4780         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4781
4782         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4783 }
4784
4785 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4786                                        gva_t addr, void *val,
4787                                        unsigned int bytes,
4788                                        struct x86_exception *exception)
4789 {
4790         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4791         void *data = val;
4792         int r = X86EMUL_CONTINUE;
4793
4794         while (bytes) {
4795                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4796                                                              PFERR_WRITE_MASK,
4797                                                              exception);
4798                 unsigned offset = addr & (PAGE_SIZE-1);
4799                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4800                 int ret;
4801
4802                 if (gpa == UNMAPPED_GVA)
4803                         return X86EMUL_PROPAGATE_FAULT;
4804                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4805                 if (ret < 0) {
4806                         r = X86EMUL_IO_NEEDED;
4807                         goto out;
4808                 }
4809
4810                 bytes -= towrite;
4811                 data += towrite;
4812                 addr += towrite;
4813         }
4814 out:
4815         return r;
4816 }
4817 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4818
4819 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4820                             gpa_t gpa, bool write)
4821 {
4822         /* For APIC access vmexit */
4823         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4824                 return 1;
4825
4826         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4827                 trace_vcpu_match_mmio(gva, gpa, write, true);
4828                 return 1;
4829         }
4830
4831         return 0;
4832 }
4833
4834 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4835                                 gpa_t *gpa, struct x86_exception *exception,
4836                                 bool write)
4837 {
4838         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4839                 | (write ? PFERR_WRITE_MASK : 0);
4840
4841         /*
4842          * currently PKRU is only applied to ept enabled guest so
4843          * there is no pkey in EPT page table for L1 guest or EPT
4844          * shadow page table for L2 guest.
4845          */
4846         if (vcpu_match_mmio_gva(vcpu, gva)
4847             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4848                                  vcpu->arch.access, 0, access)) {
4849                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4850                                         (gva & (PAGE_SIZE - 1));
4851                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4852                 return 1;
4853         }
4854
4855         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4856
4857         if (*gpa == UNMAPPED_GVA)
4858                 return -1;
4859
4860         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4861 }
4862
4863 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4864                         const void *val, int bytes)
4865 {
4866         int ret;
4867
4868         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4869         if (ret < 0)
4870                 return 0;
4871         kvm_page_track_write(vcpu, gpa, val, bytes);
4872         return 1;
4873 }
4874
4875 struct read_write_emulator_ops {
4876         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4877                                   int bytes);
4878         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4879                                   void *val, int bytes);
4880         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4881                                int bytes, void *val);
4882         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4883                                     void *val, int bytes);
4884         bool write;
4885 };
4886
4887 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4888 {
4889         if (vcpu->mmio_read_completed) {
4890                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4891                                vcpu->mmio_fragments[0].gpa, val);
4892                 vcpu->mmio_read_completed = 0;
4893                 return 1;
4894         }
4895
4896         return 0;
4897 }
4898
4899 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4900                         void *val, int bytes)
4901 {
4902         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4903 }
4904
4905 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4906                          void *val, int bytes)
4907 {
4908         return emulator_write_phys(vcpu, gpa, val, bytes);
4909 }
4910
4911 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4912 {
4913         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
4914         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4915 }
4916
4917 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4918                           void *val, int bytes)
4919 {
4920         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
4921         return X86EMUL_IO_NEEDED;
4922 }
4923
4924 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4925                            void *val, int bytes)
4926 {
4927         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4928
4929         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4930         return X86EMUL_CONTINUE;
4931 }
4932
4933 static const struct read_write_emulator_ops read_emultor = {
4934         .read_write_prepare = read_prepare,
4935         .read_write_emulate = read_emulate,
4936         .read_write_mmio = vcpu_mmio_read,
4937         .read_write_exit_mmio = read_exit_mmio,
4938 };
4939
4940 static const struct read_write_emulator_ops write_emultor = {
4941         .read_write_emulate = write_emulate,
4942         .read_write_mmio = write_mmio,
4943         .read_write_exit_mmio = write_exit_mmio,
4944         .write = true,
4945 };
4946
4947 static int emulator_read_write_onepage(unsigned long addr, void *val,
4948                                        unsigned int bytes,
4949                                        struct x86_exception *exception,
4950                                        struct kvm_vcpu *vcpu,
4951                                        const struct read_write_emulator_ops *ops)
4952 {
4953         gpa_t gpa;
4954         int handled, ret;
4955         bool write = ops->write;
4956         struct kvm_mmio_fragment *frag;
4957         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4958
4959         /*
4960          * If the exit was due to a NPF we may already have a GPA.
4961          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4962          * Note, this cannot be used on string operations since string
4963          * operation using rep will only have the initial GPA from the NPF
4964          * occurred.
4965          */
4966         if (vcpu->arch.gpa_available &&
4967             emulator_can_use_gpa(ctxt) &&
4968             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
4969                 gpa = vcpu->arch.gpa_val;
4970                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
4971         } else {
4972                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4973                 if (ret < 0)
4974                         return X86EMUL_PROPAGATE_FAULT;
4975         }
4976
4977         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
4978                 return X86EMUL_CONTINUE;
4979
4980         /*
4981          * Is this MMIO handled locally?
4982          */
4983         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4984         if (handled == bytes)
4985                 return X86EMUL_CONTINUE;
4986
4987         gpa += handled;
4988         bytes -= handled;
4989         val += handled;
4990
4991         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4992         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4993         frag->gpa = gpa;
4994         frag->data = val;
4995         frag->len = bytes;
4996         return X86EMUL_CONTINUE;
4997 }
4998
4999 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5000                         unsigned long addr,
5001                         void *val, unsigned int bytes,
5002                         struct x86_exception *exception,
5003                         const struct read_write_emulator_ops *ops)
5004 {
5005         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5006         gpa_t gpa;
5007         int rc;
5008
5009         if (ops->read_write_prepare &&
5010                   ops->read_write_prepare(vcpu, val, bytes))
5011                 return X86EMUL_CONTINUE;
5012
5013         vcpu->mmio_nr_fragments = 0;
5014
5015         /* Crossing a page boundary? */
5016         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5017                 int now;
5018
5019                 now = -addr & ~PAGE_MASK;
5020                 rc = emulator_read_write_onepage(addr, val, now, exception,
5021                                                  vcpu, ops);
5022
5023                 if (rc != X86EMUL_CONTINUE)
5024                         return rc;
5025                 addr += now;
5026                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5027                         addr = (u32)addr;
5028                 val += now;
5029                 bytes -= now;
5030         }
5031
5032         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5033                                          vcpu, ops);
5034         if (rc != X86EMUL_CONTINUE)
5035                 return rc;
5036
5037         if (!vcpu->mmio_nr_fragments)
5038                 return rc;
5039
5040         gpa = vcpu->mmio_fragments[0].gpa;
5041
5042         vcpu->mmio_needed = 1;
5043         vcpu->mmio_cur_fragment = 0;
5044
5045         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5046         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5047         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5048         vcpu->run->mmio.phys_addr = gpa;
5049
5050         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5051 }
5052
5053 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5054                                   unsigned long addr,
5055                                   void *val,
5056                                   unsigned int bytes,
5057                                   struct x86_exception *exception)
5058 {
5059         return emulator_read_write(ctxt, addr, val, bytes,
5060                                    exception, &read_emultor);
5061 }
5062
5063 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5064                             unsigned long addr,
5065                             const void *val,
5066                             unsigned int bytes,
5067                             struct x86_exception *exception)
5068 {
5069         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5070                                    exception, &write_emultor);
5071 }
5072
5073 #define CMPXCHG_TYPE(t, ptr, old, new) \
5074         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5075
5076 #ifdef CONFIG_X86_64
5077 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5078 #else
5079 #  define CMPXCHG64(ptr, old, new) \
5080         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5081 #endif
5082
5083 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5084                                      unsigned long addr,
5085                                      const void *old,
5086                                      const void *new,
5087                                      unsigned int bytes,
5088                                      struct x86_exception *exception)
5089 {
5090         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5091         gpa_t gpa;
5092         struct page *page;
5093         char *kaddr;
5094         bool exchanged;
5095
5096         /* guests cmpxchg8b have to be emulated atomically */
5097         if (bytes > 8 || (bytes & (bytes - 1)))
5098                 goto emul_write;
5099
5100         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5101
5102         if (gpa == UNMAPPED_GVA ||
5103             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5104                 goto emul_write;
5105
5106         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5107                 goto emul_write;
5108
5109         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5110         if (is_error_page(page))
5111                 goto emul_write;
5112
5113         kaddr = kmap_atomic(page);
5114         kaddr += offset_in_page(gpa);
5115         switch (bytes) {
5116         case 1:
5117                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5118                 break;
5119         case 2:
5120                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5121                 break;
5122         case 4:
5123                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5124                 break;
5125         case 8:
5126                 exchanged = CMPXCHG64(kaddr, old, new);
5127                 break;
5128         default:
5129                 BUG();
5130         }
5131         kunmap_atomic(kaddr);
5132         kvm_release_page_dirty(page);
5133
5134         if (!exchanged)
5135                 return X86EMUL_CMPXCHG_FAILED;
5136
5137         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5138         kvm_page_track_write(vcpu, gpa, new, bytes);
5139
5140         return X86EMUL_CONTINUE;
5141
5142 emul_write:
5143         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5144
5145         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5146 }
5147
5148 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5149 {
5150         int r = 0, i;
5151
5152         for (i = 0; i < vcpu->arch.pio.count; i++) {
5153                 if (vcpu->arch.pio.in)
5154                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5155                                             vcpu->arch.pio.size, pd);
5156                 else
5157                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5158                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5159                                              pd);
5160                 if (r)
5161                         break;
5162                 pd += vcpu->arch.pio.size;
5163         }
5164         return r;
5165 }
5166
5167 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5168                                unsigned short port, void *val,
5169                                unsigned int count, bool in)
5170 {
5171         vcpu->arch.pio.port = port;
5172         vcpu->arch.pio.in = in;
5173         vcpu->arch.pio.count  = count;
5174         vcpu->arch.pio.size = size;
5175
5176         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5177                 vcpu->arch.pio.count = 0;
5178                 return 1;
5179         }
5180
5181         vcpu->run->exit_reason = KVM_EXIT_IO;
5182         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5183         vcpu->run->io.size = size;
5184         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5185         vcpu->run->io.count = count;
5186         vcpu->run->io.port = port;
5187
5188         return 0;
5189 }
5190
5191 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5192                                     int size, unsigned short port, void *val,
5193                                     unsigned int count)
5194 {
5195         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5196         int ret;
5197
5198         if (vcpu->arch.pio.count)
5199                 goto data_avail;
5200
5201         memset(vcpu->arch.pio_data, 0, size * count);
5202
5203         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5204         if (ret) {
5205 data_avail:
5206                 memcpy(val, vcpu->arch.pio_data, size * count);
5207                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5208                 vcpu->arch.pio.count = 0;
5209                 return 1;
5210         }
5211
5212         return 0;
5213 }
5214
5215 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5216                                      int size, unsigned short port,
5217                                      const void *val, unsigned int count)
5218 {
5219         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5220
5221         memcpy(vcpu->arch.pio_data, val, size * count);
5222         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5223         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5224 }
5225
5226 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5227 {
5228         return kvm_x86_ops->get_segment_base(vcpu, seg);
5229 }
5230
5231 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5232 {
5233         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5234 }
5235
5236 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5237 {
5238         if (!need_emulate_wbinvd(vcpu))
5239                 return X86EMUL_CONTINUE;
5240
5241         if (kvm_x86_ops->has_wbinvd_exit()) {
5242                 int cpu = get_cpu();
5243
5244                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5245                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5246                                 wbinvd_ipi, NULL, 1);
5247                 put_cpu();
5248                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5249         } else
5250                 wbinvd();
5251         return X86EMUL_CONTINUE;
5252 }
5253
5254 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5255 {
5256         kvm_emulate_wbinvd_noskip(vcpu);
5257         return kvm_skip_emulated_instruction(vcpu);
5258 }
5259 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5260
5261
5262
5263 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5264 {
5265         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5266 }
5267
5268 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5269                            unsigned long *dest)
5270 {
5271         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5272 }
5273
5274 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5275                            unsigned long value)
5276 {
5277
5278         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5279 }
5280
5281 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5282 {
5283         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5284 }
5285
5286 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5287 {
5288         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5289         unsigned long value;
5290
5291         switch (cr) {
5292         case 0:
5293                 value = kvm_read_cr0(vcpu);
5294                 break;
5295         case 2:
5296                 value = vcpu->arch.cr2;
5297                 break;
5298         case 3:
5299                 value = kvm_read_cr3(vcpu);
5300                 break;
5301         case 4:
5302                 value = kvm_read_cr4(vcpu);
5303                 break;
5304         case 8:
5305                 value = kvm_get_cr8(vcpu);
5306                 break;
5307         default:
5308                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5309                 return 0;
5310         }
5311
5312         return value;
5313 }
5314
5315 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5316 {
5317         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5318         int res = 0;
5319
5320         switch (cr) {
5321         case 0:
5322                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5323                 break;
5324         case 2:
5325                 vcpu->arch.cr2 = val;
5326                 break;
5327         case 3:
5328                 res = kvm_set_cr3(vcpu, val);
5329                 break;
5330         case 4:
5331                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5332                 break;
5333         case 8:
5334                 res = kvm_set_cr8(vcpu, val);
5335                 break;
5336         default:
5337                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5338                 res = -1;
5339         }
5340
5341         return res;
5342 }
5343
5344 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5345 {
5346         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5347 }
5348
5349 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5350 {
5351         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5352 }
5353
5354 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5355 {
5356         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5357 }
5358
5359 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5360 {
5361         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5362 }
5363
5364 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5365 {
5366         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5367 }
5368
5369 static unsigned long emulator_get_cached_segment_base(
5370         struct x86_emulate_ctxt *ctxt, int seg)
5371 {
5372         return get_segment_base(emul_to_vcpu(ctxt), seg);
5373 }
5374
5375 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5376                                  struct desc_struct *desc, u32 *base3,
5377                                  int seg)
5378 {
5379         struct kvm_segment var;
5380
5381         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5382         *selector = var.selector;
5383
5384         if (var.unusable) {
5385                 memset(desc, 0, sizeof(*desc));
5386                 if (base3)
5387                         *base3 = 0;
5388                 return false;
5389         }
5390
5391         if (var.g)
5392                 var.limit >>= 12;
5393         set_desc_limit(desc, var.limit);
5394         set_desc_base(desc, (unsigned long)var.base);
5395 #ifdef CONFIG_X86_64
5396         if (base3)
5397                 *base3 = var.base >> 32;
5398 #endif
5399         desc->type = var.type;
5400         desc->s = var.s;
5401         desc->dpl = var.dpl;
5402         desc->p = var.present;
5403         desc->avl = var.avl;
5404         desc->l = var.l;
5405         desc->d = var.db;
5406         desc->g = var.g;
5407
5408         return true;
5409 }
5410
5411 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5412                                  struct desc_struct *desc, u32 base3,
5413                                  int seg)
5414 {
5415         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5416         struct kvm_segment var;
5417
5418         var.selector = selector;
5419         var.base = get_desc_base(desc);
5420 #ifdef CONFIG_X86_64
5421         var.base |= ((u64)base3) << 32;
5422 #endif
5423         var.limit = get_desc_limit(desc);
5424         if (desc->g)
5425                 var.limit = (var.limit << 12) | 0xfff;
5426         var.type = desc->type;
5427         var.dpl = desc->dpl;
5428         var.db = desc->d;
5429         var.s = desc->s;
5430         var.l = desc->l;
5431         var.g = desc->g;
5432         var.avl = desc->avl;
5433         var.present = desc->p;
5434         var.unusable = !var.present;
5435         var.padding = 0;
5436
5437         kvm_set_segment(vcpu, &var, seg);
5438         return;
5439 }
5440
5441 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5442                             u32 msr_index, u64 *pdata)
5443 {
5444         struct msr_data msr;
5445         int r;
5446
5447         msr.index = msr_index;
5448         msr.host_initiated = false;
5449         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5450         if (r)
5451                 return r;
5452
5453         *pdata = msr.data;
5454         return 0;
5455 }
5456
5457 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5458                             u32 msr_index, u64 data)
5459 {
5460         struct msr_data msr;
5461
5462         msr.data = data;
5463         msr.index = msr_index;
5464         msr.host_initiated = false;
5465         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5466 }
5467
5468 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5469 {
5470         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5471
5472         return vcpu->arch.smbase;
5473 }
5474
5475 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5476 {
5477         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5478
5479         vcpu->arch.smbase = smbase;
5480 }
5481
5482 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5483                               u32 pmc)
5484 {
5485         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5486 }
5487
5488 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5489                              u32 pmc, u64 *pdata)
5490 {
5491         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5492 }
5493
5494 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5495 {
5496         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5497 }
5498
5499 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5500                               struct x86_instruction_info *info,
5501                               enum x86_intercept_stage stage)
5502 {
5503         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5504 }
5505
5506 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5507                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5508 {
5509         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5510 }
5511
5512 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5513 {
5514         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5515 }
5516
5517 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5518 {
5519         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5520 }
5521
5522 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5523 {
5524         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5525 }
5526
5527 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5528 {
5529         return emul_to_vcpu(ctxt)->arch.hflags;
5530 }
5531
5532 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5533 {
5534         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5535 }
5536
5537 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5538 {
5539         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5540 }
5541
5542 static const struct x86_emulate_ops emulate_ops = {
5543         .read_gpr            = emulator_read_gpr,
5544         .write_gpr           = emulator_write_gpr,
5545         .read_std            = kvm_read_guest_virt_system,
5546         .write_std           = kvm_write_guest_virt_system,
5547         .read_phys           = kvm_read_guest_phys_system,
5548         .fetch               = kvm_fetch_guest_virt,
5549         .read_emulated       = emulator_read_emulated,
5550         .write_emulated      = emulator_write_emulated,
5551         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5552         .invlpg              = emulator_invlpg,
5553         .pio_in_emulated     = emulator_pio_in_emulated,
5554         .pio_out_emulated    = emulator_pio_out_emulated,
5555         .get_segment         = emulator_get_segment,
5556         .set_segment         = emulator_set_segment,
5557         .get_cached_segment_base = emulator_get_cached_segment_base,
5558         .get_gdt             = emulator_get_gdt,
5559         .get_idt             = emulator_get_idt,
5560         .set_gdt             = emulator_set_gdt,
5561         .set_idt             = emulator_set_idt,
5562         .get_cr              = emulator_get_cr,
5563         .set_cr              = emulator_set_cr,
5564         .cpl                 = emulator_get_cpl,
5565         .get_dr              = emulator_get_dr,
5566         .set_dr              = emulator_set_dr,
5567         .get_smbase          = emulator_get_smbase,
5568         .set_smbase          = emulator_set_smbase,
5569         .set_msr             = emulator_set_msr,
5570         .get_msr             = emulator_get_msr,
5571         .check_pmc           = emulator_check_pmc,
5572         .read_pmc            = emulator_read_pmc,
5573         .halt                = emulator_halt,
5574         .wbinvd              = emulator_wbinvd,
5575         .fix_hypercall       = emulator_fix_hypercall,
5576         .intercept           = emulator_intercept,
5577         .get_cpuid           = emulator_get_cpuid,
5578         .set_nmi_mask        = emulator_set_nmi_mask,
5579         .get_hflags          = emulator_get_hflags,
5580         .set_hflags          = emulator_set_hflags,
5581         .pre_leave_smm       = emulator_pre_leave_smm,
5582 };
5583
5584 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5585 {
5586         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5587         /*
5588          * an sti; sti; sequence only disable interrupts for the first
5589          * instruction. So, if the last instruction, be it emulated or
5590          * not, left the system with the INT_STI flag enabled, it
5591          * means that the last instruction is an sti. We should not
5592          * leave the flag on in this case. The same goes for mov ss
5593          */
5594         if (int_shadow & mask)
5595                 mask = 0;
5596         if (unlikely(int_shadow || mask)) {
5597                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5598                 if (!mask)
5599                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5600         }
5601 }
5602
5603 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5604 {
5605         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5606         if (ctxt->exception.vector == PF_VECTOR)
5607                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5608
5609         if (ctxt->exception.error_code_valid)
5610                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5611                                       ctxt->exception.error_code);
5612         else
5613                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5614         return false;
5615 }
5616
5617 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5618 {
5619         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5620         int cs_db, cs_l;
5621
5622         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5623
5624         ctxt->eflags = kvm_get_rflags(vcpu);
5625         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5626
5627         ctxt->eip = kvm_rip_read(vcpu);
5628         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5629                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5630                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5631                      cs_db                              ? X86EMUL_MODE_PROT32 :
5632                                                           X86EMUL_MODE_PROT16;
5633         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5634         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5635         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5636
5637         init_decode_cache(ctxt);
5638         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5639 }
5640
5641 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5642 {
5643         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5644         int ret;
5645
5646         init_emulate_ctxt(vcpu);
5647
5648         ctxt->op_bytes = 2;
5649         ctxt->ad_bytes = 2;
5650         ctxt->_eip = ctxt->eip + inc_eip;
5651         ret = emulate_int_real(ctxt, irq);
5652
5653         if (ret != X86EMUL_CONTINUE)
5654                 return EMULATE_FAIL;
5655
5656         ctxt->eip = ctxt->_eip;
5657         kvm_rip_write(vcpu, ctxt->eip);
5658         kvm_set_rflags(vcpu, ctxt->eflags);
5659
5660         if (irq == NMI_VECTOR)
5661                 vcpu->arch.nmi_pending = 0;
5662         else
5663                 vcpu->arch.interrupt.pending = false;
5664
5665         return EMULATE_DONE;
5666 }
5667 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5668
5669 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5670 {
5671         int r = EMULATE_DONE;
5672
5673         ++vcpu->stat.insn_emulation_fail;
5674         trace_kvm_emulate_insn_failed(vcpu);
5675         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5676                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5677                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5678                 vcpu->run->internal.ndata = 0;
5679                 r = EMULATE_USER_EXIT;
5680         }
5681         kvm_queue_exception(vcpu, UD_VECTOR);
5682
5683         return r;
5684 }
5685
5686 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5687                                   bool write_fault_to_shadow_pgtable,
5688                                   int emulation_type)
5689 {
5690         gpa_t gpa = cr2;
5691         kvm_pfn_t pfn;
5692
5693         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5694                 return false;
5695
5696         if (!vcpu->arch.mmu.direct_map) {
5697                 /*
5698                  * Write permission should be allowed since only
5699                  * write access need to be emulated.
5700                  */
5701                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5702
5703                 /*
5704                  * If the mapping is invalid in guest, let cpu retry
5705                  * it to generate fault.
5706                  */
5707                 if (gpa == UNMAPPED_GVA)
5708                         return true;
5709         }
5710
5711         /*
5712          * Do not retry the unhandleable instruction if it faults on the
5713          * readonly host memory, otherwise it will goto a infinite loop:
5714          * retry instruction -> write #PF -> emulation fail -> retry
5715          * instruction -> ...
5716          */
5717         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5718
5719         /*
5720          * If the instruction failed on the error pfn, it can not be fixed,
5721          * report the error to userspace.
5722          */
5723         if (is_error_noslot_pfn(pfn))
5724                 return false;
5725
5726         kvm_release_pfn_clean(pfn);
5727
5728         /* The instructions are well-emulated on direct mmu. */
5729         if (vcpu->arch.mmu.direct_map) {
5730                 unsigned int indirect_shadow_pages;
5731
5732                 spin_lock(&vcpu->kvm->mmu_lock);
5733                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5734                 spin_unlock(&vcpu->kvm->mmu_lock);
5735
5736                 if (indirect_shadow_pages)
5737                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5738
5739                 return true;
5740         }
5741
5742         /*
5743          * if emulation was due to access to shadowed page table
5744          * and it failed try to unshadow page and re-enter the
5745          * guest to let CPU execute the instruction.
5746          */
5747         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5748
5749         /*
5750          * If the access faults on its page table, it can not
5751          * be fixed by unprotecting shadow page and it should
5752          * be reported to userspace.
5753          */
5754         return !write_fault_to_shadow_pgtable;
5755 }
5756
5757 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5758                               unsigned long cr2,  int emulation_type)
5759 {
5760         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5761         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5762
5763         last_retry_eip = vcpu->arch.last_retry_eip;
5764         last_retry_addr = vcpu->arch.last_retry_addr;
5765
5766         /*
5767          * If the emulation is caused by #PF and it is non-page_table
5768          * writing instruction, it means the VM-EXIT is caused by shadow
5769          * page protected, we can zap the shadow page and retry this
5770          * instruction directly.
5771          *
5772          * Note: if the guest uses a non-page-table modifying instruction
5773          * on the PDE that points to the instruction, then we will unmap
5774          * the instruction and go to an infinite loop. So, we cache the
5775          * last retried eip and the last fault address, if we meet the eip
5776          * and the address again, we can break out of the potential infinite
5777          * loop.
5778          */
5779         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5780
5781         if (!(emulation_type & EMULTYPE_RETRY))
5782                 return false;
5783
5784         if (x86_page_table_writing_insn(ctxt))
5785                 return false;
5786
5787         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5788                 return false;
5789
5790         vcpu->arch.last_retry_eip = ctxt->eip;
5791         vcpu->arch.last_retry_addr = cr2;
5792
5793         if (!vcpu->arch.mmu.direct_map)
5794                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5795
5796         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5797
5798         return true;
5799 }
5800
5801 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5802 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5803
5804 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5805 {
5806         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5807                 /* This is a good place to trace that we are exiting SMM.  */
5808                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5809
5810                 /* Process a latched INIT or SMI, if any.  */
5811                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5812         }
5813
5814         kvm_mmu_reset_context(vcpu);
5815 }
5816
5817 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5818 {
5819         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5820
5821         vcpu->arch.hflags = emul_flags;
5822
5823         if (changed & HF_SMM_MASK)
5824                 kvm_smm_changed(vcpu);
5825 }
5826
5827 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5828                                 unsigned long *db)
5829 {
5830         u32 dr6 = 0;
5831         int i;
5832         u32 enable, rwlen;
5833
5834         enable = dr7;
5835         rwlen = dr7 >> 16;
5836         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5837                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5838                         dr6 |= (1 << i);
5839         return dr6;
5840 }
5841
5842 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5843 {
5844         struct kvm_run *kvm_run = vcpu->run;
5845
5846         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5847                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5848                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5849                 kvm_run->debug.arch.exception = DB_VECTOR;
5850                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5851                 *r = EMULATE_USER_EXIT;
5852         } else {
5853                 /*
5854                  * "Certain debug exceptions may clear bit 0-3.  The
5855                  * remaining contents of the DR6 register are never
5856                  * cleared by the processor".
5857                  */
5858                 vcpu->arch.dr6 &= ~15;
5859                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5860                 kvm_queue_exception(vcpu, DB_VECTOR);
5861         }
5862 }
5863
5864 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5865 {
5866         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5867         int r = EMULATE_DONE;
5868
5869         kvm_x86_ops->skip_emulated_instruction(vcpu);
5870
5871         /*
5872          * rflags is the old, "raw" value of the flags.  The new value has
5873          * not been saved yet.
5874          *
5875          * This is correct even for TF set by the guest, because "the
5876          * processor will not generate this exception after the instruction
5877          * that sets the TF flag".
5878          */
5879         if (unlikely(rflags & X86_EFLAGS_TF))
5880                 kvm_vcpu_do_singlestep(vcpu, &r);
5881         return r == EMULATE_DONE;
5882 }
5883 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5884
5885 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5886 {
5887         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5888             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5889                 struct kvm_run *kvm_run = vcpu->run;
5890                 unsigned long eip = kvm_get_linear_rip(vcpu);
5891                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5892                                            vcpu->arch.guest_debug_dr7,
5893                                            vcpu->arch.eff_db);
5894
5895                 if (dr6 != 0) {
5896                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5897                         kvm_run->debug.arch.pc = eip;
5898                         kvm_run->debug.arch.exception = DB_VECTOR;
5899                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5900                         *r = EMULATE_USER_EXIT;
5901                         return true;
5902                 }
5903         }
5904
5905         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5906             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5907                 unsigned long eip = kvm_get_linear_rip(vcpu);
5908                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5909                                            vcpu->arch.dr7,
5910                                            vcpu->arch.db);
5911
5912                 if (dr6 != 0) {
5913                         vcpu->arch.dr6 &= ~15;
5914                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5915                         kvm_queue_exception(vcpu, DB_VECTOR);
5916                         *r = EMULATE_DONE;
5917                         return true;
5918                 }
5919         }
5920
5921         return false;
5922 }
5923
5924 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5925                             unsigned long cr2,
5926                             int emulation_type,
5927                             void *insn,
5928                             int insn_len)
5929 {
5930         int r;
5931         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5932         bool writeback = true;
5933         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5934
5935         /*
5936          * Clear write_fault_to_shadow_pgtable here to ensure it is
5937          * never reused.
5938          */
5939         vcpu->arch.write_fault_to_shadow_pgtable = false;
5940         kvm_clear_exception_queue(vcpu);
5941
5942         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5943                 init_emulate_ctxt(vcpu);
5944
5945                 /*
5946                  * We will reenter on the same instruction since
5947                  * we do not set complete_userspace_io.  This does not
5948                  * handle watchpoints yet, those would be handled in
5949                  * the emulate_ops.
5950                  */
5951                 if (!(emulation_type & EMULTYPE_SKIP) &&
5952                     kvm_vcpu_check_breakpoint(vcpu, &r))
5953                         return r;
5954
5955                 ctxt->interruptibility = 0;
5956                 ctxt->have_exception = false;
5957                 ctxt->exception.vector = -1;
5958                 ctxt->perm_ok = false;
5959
5960                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5961
5962                 r = x86_decode_insn(ctxt, insn, insn_len);
5963
5964                 trace_kvm_emulate_insn_start(vcpu);
5965                 ++vcpu->stat.insn_emulation;
5966                 if (r != EMULATION_OK)  {
5967                         if (emulation_type & EMULTYPE_TRAP_UD)
5968                                 return EMULATE_FAIL;
5969                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5970                                                 emulation_type))
5971                                 return EMULATE_DONE;
5972                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
5973                                 return EMULATE_DONE;
5974                         if (emulation_type & EMULTYPE_SKIP)
5975                                 return EMULATE_FAIL;
5976                         return handle_emulation_failure(vcpu);
5977                 }
5978         }
5979
5980         if (emulation_type & EMULTYPE_SKIP) {
5981                 kvm_rip_write(vcpu, ctxt->_eip);
5982                 if (ctxt->eflags & X86_EFLAGS_RF)
5983                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5984                 return EMULATE_DONE;
5985         }
5986
5987         if (retry_instruction(ctxt, cr2, emulation_type))
5988                 return EMULATE_DONE;
5989
5990         /* this is needed for vmware backdoor interface to work since it
5991            changes registers values  during IO operation */
5992         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5993                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5994                 emulator_invalidate_register_cache(ctxt);
5995         }
5996
5997 restart:
5998         /* Save the faulting GPA (cr2) in the address field */
5999         ctxt->exception.address = cr2;
6000
6001         r = x86_emulate_insn(ctxt);
6002
6003         if (r == EMULATION_INTERCEPTED)
6004                 return EMULATE_DONE;
6005
6006         if (r == EMULATION_FAILED) {
6007                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6008                                         emulation_type))
6009                         return EMULATE_DONE;
6010
6011                 return handle_emulation_failure(vcpu);
6012         }
6013
6014         if (ctxt->have_exception) {
6015                 r = EMULATE_DONE;
6016                 if (inject_emulated_exception(vcpu))
6017                         return r;
6018         } else if (vcpu->arch.pio.count) {
6019                 if (!vcpu->arch.pio.in) {
6020                         /* FIXME: return into emulator if single-stepping.  */
6021                         vcpu->arch.pio.count = 0;
6022                 } else {
6023                         writeback = false;
6024                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6025                 }
6026                 r = EMULATE_USER_EXIT;
6027         } else if (vcpu->mmio_needed) {
6028                 if (!vcpu->mmio_is_write)
6029                         writeback = false;
6030                 r = EMULATE_USER_EXIT;
6031                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6032         } else if (r == EMULATION_RESTART)
6033                 goto restart;
6034         else
6035                 r = EMULATE_DONE;
6036
6037         if (writeback) {
6038                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6039                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6040                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6041                 kvm_rip_write(vcpu, ctxt->eip);
6042                 if (r == EMULATE_DONE &&
6043                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6044                         kvm_vcpu_do_singlestep(vcpu, &r);
6045                 if (!ctxt->have_exception ||
6046                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6047                         __kvm_set_rflags(vcpu, ctxt->eflags);
6048
6049                 /*
6050                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6051                  * do nothing, and it will be requested again as soon as
6052                  * the shadow expires.  But we still need to check here,
6053                  * because POPF has no interrupt shadow.
6054                  */
6055                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6056                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6057         } else
6058                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6059
6060         return r;
6061 }
6062 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
6063
6064 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
6065 {
6066         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6067         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6068                                             size, port, &val, 1);
6069         /* do not return to emulator after return from userspace */
6070         vcpu->arch.pio.count = 0;
6071         return ret;
6072 }
6073 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
6074
6075 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6076 {
6077         unsigned long val;
6078
6079         /* We should only ever be called with arch.pio.count equal to 1 */
6080         BUG_ON(vcpu->arch.pio.count != 1);
6081
6082         /* For size less than 4 we merge, else we zero extend */
6083         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6084                                         : 0;
6085
6086         /*
6087          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6088          * the copy and tracing
6089          */
6090         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6091                                  vcpu->arch.pio.port, &val, 1);
6092         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6093
6094         return 1;
6095 }
6096
6097 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
6098 {
6099         unsigned long val;
6100         int ret;
6101
6102         /* For size less than 4 we merge, else we zero extend */
6103         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6104
6105         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6106                                        &val, 1);
6107         if (ret) {
6108                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6109                 return ret;
6110         }
6111
6112         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6113
6114         return 0;
6115 }
6116 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
6117
6118 static int kvmclock_cpu_down_prep(unsigned int cpu)
6119 {
6120         __this_cpu_write(cpu_tsc_khz, 0);
6121         return 0;
6122 }
6123
6124 static void tsc_khz_changed(void *data)
6125 {
6126         struct cpufreq_freqs *freq = data;
6127         unsigned long khz = 0;
6128
6129         if (data)
6130                 khz = freq->new;
6131         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6132                 khz = cpufreq_quick_get(raw_smp_processor_id());
6133         if (!khz)
6134                 khz = tsc_khz;
6135         __this_cpu_write(cpu_tsc_khz, khz);
6136 }
6137
6138 #ifdef CONFIG_X86_64
6139 static void kvm_hyperv_tsc_notifier(void)
6140 {
6141         struct kvm *kvm;
6142         struct kvm_vcpu *vcpu;
6143         int cpu;
6144
6145         spin_lock(&kvm_lock);
6146         list_for_each_entry(kvm, &vm_list, vm_list)
6147                 kvm_make_mclock_inprogress_request(kvm);
6148
6149         hyperv_stop_tsc_emulation();
6150
6151         /* TSC frequency always matches when on Hyper-V */
6152         for_each_present_cpu(cpu)
6153                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6154         kvm_max_guest_tsc_khz = tsc_khz;
6155
6156         list_for_each_entry(kvm, &vm_list, vm_list) {
6157                 struct kvm_arch *ka = &kvm->arch;
6158
6159                 spin_lock(&ka->pvclock_gtod_sync_lock);
6160
6161                 pvclock_update_vm_gtod_copy(kvm);
6162
6163                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6164                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6165
6166                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6167                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6168
6169                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6170         }
6171         spin_unlock(&kvm_lock);
6172 }
6173 #endif
6174
6175 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6176                                      void *data)
6177 {
6178         struct cpufreq_freqs *freq = data;
6179         struct kvm *kvm;
6180         struct kvm_vcpu *vcpu;
6181         int i, send_ipi = 0;
6182
6183         /*
6184          * We allow guests to temporarily run on slowing clocks,
6185          * provided we notify them after, or to run on accelerating
6186          * clocks, provided we notify them before.  Thus time never
6187          * goes backwards.
6188          *
6189          * However, we have a problem.  We can't atomically update
6190          * the frequency of a given CPU from this function; it is
6191          * merely a notifier, which can be called from any CPU.
6192          * Changing the TSC frequency at arbitrary points in time
6193          * requires a recomputation of local variables related to
6194          * the TSC for each VCPU.  We must flag these local variables
6195          * to be updated and be sure the update takes place with the
6196          * new frequency before any guests proceed.
6197          *
6198          * Unfortunately, the combination of hotplug CPU and frequency
6199          * change creates an intractable locking scenario; the order
6200          * of when these callouts happen is undefined with respect to
6201          * CPU hotplug, and they can race with each other.  As such,
6202          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6203          * undefined; you can actually have a CPU frequency change take
6204          * place in between the computation of X and the setting of the
6205          * variable.  To protect against this problem, all updates of
6206          * the per_cpu tsc_khz variable are done in an interrupt
6207          * protected IPI, and all callers wishing to update the value
6208          * must wait for a synchronous IPI to complete (which is trivial
6209          * if the caller is on the CPU already).  This establishes the
6210          * necessary total order on variable updates.
6211          *
6212          * Note that because a guest time update may take place
6213          * anytime after the setting of the VCPU's request bit, the
6214          * correct TSC value must be set before the request.  However,
6215          * to ensure the update actually makes it to any guest which
6216          * starts running in hardware virtualization between the set
6217          * and the acquisition of the spinlock, we must also ping the
6218          * CPU after setting the request bit.
6219          *
6220          */
6221
6222         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6223                 return 0;
6224         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6225                 return 0;
6226
6227         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6228
6229         spin_lock(&kvm_lock);
6230         list_for_each_entry(kvm, &vm_list, vm_list) {
6231                 kvm_for_each_vcpu(i, vcpu, kvm) {
6232                         if (vcpu->cpu != freq->cpu)
6233                                 continue;
6234                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6235                         if (vcpu->cpu != smp_processor_id())
6236                                 send_ipi = 1;
6237                 }
6238         }
6239         spin_unlock(&kvm_lock);
6240
6241         if (freq->old < freq->new && send_ipi) {
6242                 /*
6243                  * We upscale the frequency.  Must make the guest
6244                  * doesn't see old kvmclock values while running with
6245                  * the new frequency, otherwise we risk the guest sees
6246                  * time go backwards.
6247                  *
6248                  * In case we update the frequency for another cpu
6249                  * (which might be in guest context) send an interrupt
6250                  * to kick the cpu out of guest context.  Next time
6251                  * guest context is entered kvmclock will be updated,
6252                  * so the guest will not see stale values.
6253                  */
6254                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6255         }
6256         return 0;
6257 }
6258
6259 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6260         .notifier_call  = kvmclock_cpufreq_notifier
6261 };
6262
6263 static int kvmclock_cpu_online(unsigned int cpu)
6264 {
6265         tsc_khz_changed(NULL);
6266         return 0;
6267 }
6268
6269 static void kvm_timer_init(void)
6270 {
6271         max_tsc_khz = tsc_khz;
6272
6273         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6274 #ifdef CONFIG_CPU_FREQ
6275                 struct cpufreq_policy policy;
6276                 int cpu;
6277
6278                 memset(&policy, 0, sizeof(policy));
6279                 cpu = get_cpu();
6280                 cpufreq_get_policy(&policy, cpu);
6281                 if (policy.cpuinfo.max_freq)
6282                         max_tsc_khz = policy.cpuinfo.max_freq;
6283                 put_cpu();
6284 #endif
6285                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6286                                           CPUFREQ_TRANSITION_NOTIFIER);
6287         }
6288         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6289
6290         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6291                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6292 }
6293
6294 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6295
6296 int kvm_is_in_guest(void)
6297 {
6298         return __this_cpu_read(current_vcpu) != NULL;
6299 }
6300
6301 static int kvm_is_user_mode(void)
6302 {
6303         int user_mode = 3;
6304
6305         if (__this_cpu_read(current_vcpu))
6306                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6307
6308         return user_mode != 0;
6309 }
6310
6311 static unsigned long kvm_get_guest_ip(void)
6312 {
6313         unsigned long ip = 0;
6314
6315         if (__this_cpu_read(current_vcpu))
6316                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6317
6318         return ip;
6319 }
6320
6321 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6322         .is_in_guest            = kvm_is_in_guest,
6323         .is_user_mode           = kvm_is_user_mode,
6324         .get_guest_ip           = kvm_get_guest_ip,
6325 };
6326
6327 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
6328 {
6329         __this_cpu_write(current_vcpu, vcpu);
6330 }
6331 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
6332
6333 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6334 {
6335         __this_cpu_write(current_vcpu, NULL);
6336 }
6337 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6338
6339 static void kvm_set_mmio_spte_mask(void)
6340 {
6341         u64 mask;
6342         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6343
6344         /*
6345          * Set the reserved bits and the present bit of an paging-structure
6346          * entry to generate page fault with PFER.RSV = 1.
6347          */
6348          /* Mask the reserved physical address bits. */
6349         mask = rsvd_bits(maxphyaddr, 51);
6350
6351         /* Set the present bit. */
6352         mask |= 1ull;
6353
6354 #ifdef CONFIG_X86_64
6355         /*
6356          * If reserved bit is not supported, clear the present bit to disable
6357          * mmio page fault.
6358          */
6359         if (maxphyaddr == 52)
6360                 mask &= ~1ull;
6361 #endif
6362
6363         kvm_mmu_set_mmio_spte_mask(mask, mask);
6364 }
6365
6366 #ifdef CONFIG_X86_64
6367 static void pvclock_gtod_update_fn(struct work_struct *work)
6368 {
6369         struct kvm *kvm;
6370
6371         struct kvm_vcpu *vcpu;
6372         int i;
6373
6374         spin_lock(&kvm_lock);
6375         list_for_each_entry(kvm, &vm_list, vm_list)
6376                 kvm_for_each_vcpu(i, vcpu, kvm)
6377                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6378         atomic_set(&kvm_guest_has_master_clock, 0);
6379         spin_unlock(&kvm_lock);
6380 }
6381
6382 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6383
6384 /*
6385  * Notification about pvclock gtod data update.
6386  */
6387 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6388                                void *priv)
6389 {
6390         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6391         struct timekeeper *tk = priv;
6392
6393         update_pvclock_gtod(tk);
6394
6395         /* disable master clock if host does not trust, or does not
6396          * use, TSC based clocksource.
6397          */
6398         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6399             atomic_read(&kvm_guest_has_master_clock) != 0)
6400                 queue_work(system_long_wq, &pvclock_gtod_work);
6401
6402         return 0;
6403 }
6404
6405 static struct notifier_block pvclock_gtod_notifier = {
6406         .notifier_call = pvclock_gtod_notify,
6407 };
6408 #endif
6409
6410 int kvm_arch_init(void *opaque)
6411 {
6412         int r;
6413         struct kvm_x86_ops *ops = opaque;
6414
6415         if (kvm_x86_ops) {
6416                 printk(KERN_ERR "kvm: already loaded the other module\n");
6417                 r = -EEXIST;
6418                 goto out;
6419         }
6420
6421         if (!ops->cpu_has_kvm_support()) {
6422                 printk(KERN_ERR "kvm: no hardware support\n");
6423                 r = -EOPNOTSUPP;
6424                 goto out;
6425         }
6426         if (ops->disabled_by_bios()) {
6427                 printk(KERN_ERR "kvm: disabled by bios\n");
6428                 r = -EOPNOTSUPP;
6429                 goto out;
6430         }
6431
6432         r = -ENOMEM;
6433         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6434         if (!shared_msrs) {
6435                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6436                 goto out;
6437         }
6438
6439         r = kvm_mmu_module_init();
6440         if (r)
6441                 goto out_free_percpu;
6442
6443         kvm_set_mmio_spte_mask();
6444
6445         kvm_x86_ops = ops;
6446
6447         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6448                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6449                         PT_PRESENT_MASK, 0, sme_me_mask);
6450         kvm_timer_init();
6451
6452         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6453
6454         if (boot_cpu_has(X86_FEATURE_XSAVE))
6455                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6456
6457         kvm_lapic_init();
6458 #ifdef CONFIG_X86_64
6459         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6460
6461         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6462                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6463 #endif
6464
6465         return 0;
6466
6467 out_free_percpu:
6468         free_percpu(shared_msrs);
6469 out:
6470         return r;
6471 }
6472
6473 void kvm_arch_exit(void)
6474 {
6475 #ifdef CONFIG_X86_64
6476         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6477                 clear_hv_tscchange_cb();
6478 #endif
6479         kvm_lapic_exit();
6480         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6481
6482         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6483                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6484                                             CPUFREQ_TRANSITION_NOTIFIER);
6485         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6486 #ifdef CONFIG_X86_64
6487         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6488 #endif
6489         kvm_x86_ops = NULL;
6490         kvm_mmu_module_exit();
6491         free_percpu(shared_msrs);
6492 }
6493
6494 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6495 {
6496         ++vcpu->stat.halt_exits;
6497         if (lapic_in_kernel(vcpu)) {
6498                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6499                 return 1;
6500         } else {
6501                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6502                 return 0;
6503         }
6504 }
6505 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6506
6507 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6508 {
6509         int ret = kvm_skip_emulated_instruction(vcpu);
6510         /*
6511          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6512          * KVM_EXIT_DEBUG here.
6513          */
6514         return kvm_vcpu_halt(vcpu) && ret;
6515 }
6516 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6517
6518 #ifdef CONFIG_X86_64
6519 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6520                                 unsigned long clock_type)
6521 {
6522         struct kvm_clock_pairing clock_pairing;
6523         struct timespec ts;
6524         u64 cycle;
6525         int ret;
6526
6527         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6528                 return -KVM_EOPNOTSUPP;
6529
6530         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6531                 return -KVM_EOPNOTSUPP;
6532
6533         clock_pairing.sec = ts.tv_sec;
6534         clock_pairing.nsec = ts.tv_nsec;
6535         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6536         clock_pairing.flags = 0;
6537
6538         ret = 0;
6539         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6540                             sizeof(struct kvm_clock_pairing)))
6541                 ret = -KVM_EFAULT;
6542
6543         return ret;
6544 }
6545 #endif
6546
6547 /*
6548  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6549  *
6550  * @apicid - apicid of vcpu to be kicked.
6551  */
6552 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6553 {
6554         struct kvm_lapic_irq lapic_irq;
6555
6556         lapic_irq.shorthand = 0;
6557         lapic_irq.dest_mode = 0;
6558         lapic_irq.level = 0;
6559         lapic_irq.dest_id = apicid;
6560         lapic_irq.msi_redir_hint = false;
6561
6562         lapic_irq.delivery_mode = APIC_DM_REMRD;
6563         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6564 }
6565
6566 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6567 {
6568         vcpu->arch.apicv_active = false;
6569         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6570 }
6571
6572 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6573 {
6574         unsigned long nr, a0, a1, a2, a3, ret;
6575         int op_64_bit, r;
6576
6577         r = kvm_skip_emulated_instruction(vcpu);
6578
6579         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6580                 return kvm_hv_hypercall(vcpu);
6581
6582         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6583         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6584         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6585         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6586         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6587
6588         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6589
6590         op_64_bit = is_64_bit_mode(vcpu);
6591         if (!op_64_bit) {
6592                 nr &= 0xFFFFFFFF;
6593                 a0 &= 0xFFFFFFFF;
6594                 a1 &= 0xFFFFFFFF;
6595                 a2 &= 0xFFFFFFFF;
6596                 a3 &= 0xFFFFFFFF;
6597         }
6598
6599         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6600                 ret = -KVM_EPERM;
6601                 goto out;
6602         }
6603
6604         switch (nr) {
6605         case KVM_HC_VAPIC_POLL_IRQ:
6606                 ret = 0;
6607                 break;
6608         case KVM_HC_KICK_CPU:
6609                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6610                 ret = 0;
6611                 break;
6612 #ifdef CONFIG_X86_64
6613         case KVM_HC_CLOCK_PAIRING:
6614                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6615                 break;
6616 #endif
6617         default:
6618                 ret = -KVM_ENOSYS;
6619                 break;
6620         }
6621 out:
6622         if (!op_64_bit)
6623                 ret = (u32)ret;
6624         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6625         ++vcpu->stat.hypercalls;
6626         return r;
6627 }
6628 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6629
6630 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6631 {
6632         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6633         char instruction[3];
6634         unsigned long rip = kvm_rip_read(vcpu);
6635
6636         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6637
6638         return emulator_write_emulated(ctxt, rip, instruction, 3,
6639                 &ctxt->exception);
6640 }
6641
6642 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6643 {
6644         return vcpu->run->request_interrupt_window &&
6645                 likely(!pic_in_kernel(vcpu->kvm));
6646 }
6647
6648 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6649 {
6650         struct kvm_run *kvm_run = vcpu->run;
6651
6652         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6653         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6654         kvm_run->cr8 = kvm_get_cr8(vcpu);
6655         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6656         kvm_run->ready_for_interrupt_injection =
6657                 pic_in_kernel(vcpu->kvm) ||
6658                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6659 }
6660
6661 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6662 {
6663         int max_irr, tpr;
6664
6665         if (!kvm_x86_ops->update_cr8_intercept)
6666                 return;
6667
6668         if (!lapic_in_kernel(vcpu))
6669                 return;
6670
6671         if (vcpu->arch.apicv_active)
6672                 return;
6673
6674         if (!vcpu->arch.apic->vapic_addr)
6675                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6676         else
6677                 max_irr = -1;
6678
6679         if (max_irr != -1)
6680                 max_irr >>= 4;
6681
6682         tpr = kvm_lapic_get_cr8(vcpu);
6683
6684         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6685 }
6686
6687 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6688 {
6689         int r;
6690
6691         /* try to reinject previous events if any */
6692         if (vcpu->arch.exception.injected) {
6693                 kvm_x86_ops->queue_exception(vcpu);
6694                 return 0;
6695         }
6696
6697         /*
6698          * Exceptions must be injected immediately, or the exception
6699          * frame will have the address of the NMI or interrupt handler.
6700          */
6701         if (!vcpu->arch.exception.pending) {
6702                 if (vcpu->arch.nmi_injected) {
6703                         kvm_x86_ops->set_nmi(vcpu);
6704                         return 0;
6705                 }
6706
6707                 if (vcpu->arch.interrupt.pending) {
6708                         kvm_x86_ops->set_irq(vcpu);
6709                         return 0;
6710                 }
6711         }
6712
6713         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6714                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6715                 if (r != 0)
6716                         return r;
6717         }
6718
6719         /* try to inject new event if pending */
6720         if (vcpu->arch.exception.pending) {
6721                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6722                                         vcpu->arch.exception.has_error_code,
6723                                         vcpu->arch.exception.error_code);
6724
6725                 vcpu->arch.exception.pending = false;
6726                 vcpu->arch.exception.injected = true;
6727
6728                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6729                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6730                                              X86_EFLAGS_RF);
6731
6732                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6733                     (vcpu->arch.dr7 & DR7_GD)) {
6734                         vcpu->arch.dr7 &= ~DR7_GD;
6735                         kvm_update_dr7(vcpu);
6736                 }
6737
6738                 kvm_x86_ops->queue_exception(vcpu);
6739         } else if (vcpu->arch.smi_pending && !is_smm(vcpu) && kvm_x86_ops->smi_allowed(vcpu)) {
6740                 vcpu->arch.smi_pending = false;
6741                 ++vcpu->arch.smi_count;
6742                 enter_smm(vcpu);
6743         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6744                 --vcpu->arch.nmi_pending;
6745                 vcpu->arch.nmi_injected = true;
6746                 kvm_x86_ops->set_nmi(vcpu);
6747         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6748                 /*
6749                  * Because interrupts can be injected asynchronously, we are
6750                  * calling check_nested_events again here to avoid a race condition.
6751                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6752                  * proposal and current concerns.  Perhaps we should be setting
6753                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6754                  */
6755                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6756                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6757                         if (r != 0)
6758                                 return r;
6759                 }
6760                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6761                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6762                                             false);
6763                         kvm_x86_ops->set_irq(vcpu);
6764                 }
6765         }
6766
6767         return 0;
6768 }
6769
6770 static void process_nmi(struct kvm_vcpu *vcpu)
6771 {
6772         unsigned limit = 2;
6773
6774         /*
6775          * x86 is limited to one NMI running, and one NMI pending after it.
6776          * If an NMI is already in progress, limit further NMIs to just one.
6777          * Otherwise, allow two (and we'll inject the first one immediately).
6778          */
6779         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6780                 limit = 1;
6781
6782         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6783         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6784         kvm_make_request(KVM_REQ_EVENT, vcpu);
6785 }
6786
6787 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6788 {
6789         u32 flags = 0;
6790         flags |= seg->g       << 23;
6791         flags |= seg->db      << 22;
6792         flags |= seg->l       << 21;
6793         flags |= seg->avl     << 20;
6794         flags |= seg->present << 15;
6795         flags |= seg->dpl     << 13;
6796         flags |= seg->s       << 12;
6797         flags |= seg->type    << 8;
6798         return flags;
6799 }
6800
6801 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6802 {
6803         struct kvm_segment seg;
6804         int offset;
6805
6806         kvm_get_segment(vcpu, &seg, n);
6807         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6808
6809         if (n < 3)
6810                 offset = 0x7f84 + n * 12;
6811         else
6812                 offset = 0x7f2c + (n - 3) * 12;
6813
6814         put_smstate(u32, buf, offset + 8, seg.base);
6815         put_smstate(u32, buf, offset + 4, seg.limit);
6816         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6817 }
6818
6819 #ifdef CONFIG_X86_64
6820 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6821 {
6822         struct kvm_segment seg;
6823         int offset;
6824         u16 flags;
6825
6826         kvm_get_segment(vcpu, &seg, n);
6827         offset = 0x7e00 + n * 16;
6828
6829         flags = enter_smm_get_segment_flags(&seg) >> 8;
6830         put_smstate(u16, buf, offset, seg.selector);
6831         put_smstate(u16, buf, offset + 2, flags);
6832         put_smstate(u32, buf, offset + 4, seg.limit);
6833         put_smstate(u64, buf, offset + 8, seg.base);
6834 }
6835 #endif
6836
6837 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6838 {
6839         struct desc_ptr dt;
6840         struct kvm_segment seg;
6841         unsigned long val;
6842         int i;
6843
6844         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6845         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6846         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6847         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6848
6849         for (i = 0; i < 8; i++)
6850                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6851
6852         kvm_get_dr(vcpu, 6, &val);
6853         put_smstate(u32, buf, 0x7fcc, (u32)val);
6854         kvm_get_dr(vcpu, 7, &val);
6855         put_smstate(u32, buf, 0x7fc8, (u32)val);
6856
6857         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6858         put_smstate(u32, buf, 0x7fc4, seg.selector);
6859         put_smstate(u32, buf, 0x7f64, seg.base);
6860         put_smstate(u32, buf, 0x7f60, seg.limit);
6861         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6862
6863         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6864         put_smstate(u32, buf, 0x7fc0, seg.selector);
6865         put_smstate(u32, buf, 0x7f80, seg.base);
6866         put_smstate(u32, buf, 0x7f7c, seg.limit);
6867         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6868
6869         kvm_x86_ops->get_gdt(vcpu, &dt);
6870         put_smstate(u32, buf, 0x7f74, dt.address);
6871         put_smstate(u32, buf, 0x7f70, dt.size);
6872
6873         kvm_x86_ops->get_idt(vcpu, &dt);
6874         put_smstate(u32, buf, 0x7f58, dt.address);
6875         put_smstate(u32, buf, 0x7f54, dt.size);
6876
6877         for (i = 0; i < 6; i++)
6878                 enter_smm_save_seg_32(vcpu, buf, i);
6879
6880         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6881
6882         /* revision id */
6883         put_smstate(u32, buf, 0x7efc, 0x00020000);
6884         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6885 }
6886
6887 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6888 {
6889 #ifdef CONFIG_X86_64
6890         struct desc_ptr dt;
6891         struct kvm_segment seg;
6892         unsigned long val;
6893         int i;
6894
6895         for (i = 0; i < 16; i++)
6896                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6897
6898         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6899         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6900
6901         kvm_get_dr(vcpu, 6, &val);
6902         put_smstate(u64, buf, 0x7f68, val);
6903         kvm_get_dr(vcpu, 7, &val);
6904         put_smstate(u64, buf, 0x7f60, val);
6905
6906         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6907         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6908         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6909
6910         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6911
6912         /* revision id */
6913         put_smstate(u32, buf, 0x7efc, 0x00020064);
6914
6915         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6916
6917         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6918         put_smstate(u16, buf, 0x7e90, seg.selector);
6919         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6920         put_smstate(u32, buf, 0x7e94, seg.limit);
6921         put_smstate(u64, buf, 0x7e98, seg.base);
6922
6923         kvm_x86_ops->get_idt(vcpu, &dt);
6924         put_smstate(u32, buf, 0x7e84, dt.size);
6925         put_smstate(u64, buf, 0x7e88, dt.address);
6926
6927         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6928         put_smstate(u16, buf, 0x7e70, seg.selector);
6929         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6930         put_smstate(u32, buf, 0x7e74, seg.limit);
6931         put_smstate(u64, buf, 0x7e78, seg.base);
6932
6933         kvm_x86_ops->get_gdt(vcpu, &dt);
6934         put_smstate(u32, buf, 0x7e64, dt.size);
6935         put_smstate(u64, buf, 0x7e68, dt.address);
6936
6937         for (i = 0; i < 6; i++)
6938                 enter_smm_save_seg_64(vcpu, buf, i);
6939 #else
6940         WARN_ON_ONCE(1);
6941 #endif
6942 }
6943
6944 static void enter_smm(struct kvm_vcpu *vcpu)
6945 {
6946         struct kvm_segment cs, ds;
6947         struct desc_ptr dt;
6948         char buf[512];
6949         u32 cr0;
6950
6951         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6952         memset(buf, 0, 512);
6953         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6954                 enter_smm_save_state_64(vcpu, buf);
6955         else
6956                 enter_smm_save_state_32(vcpu, buf);
6957
6958         /*
6959          * Give pre_enter_smm() a chance to make ISA-specific changes to the
6960          * vCPU state (e.g. leave guest mode) after we've saved the state into
6961          * the SMM state-save area.
6962          */
6963         kvm_x86_ops->pre_enter_smm(vcpu, buf);
6964
6965         vcpu->arch.hflags |= HF_SMM_MASK;
6966         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6967
6968         if (kvm_x86_ops->get_nmi_mask(vcpu))
6969                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6970         else
6971                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6972
6973         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6974         kvm_rip_write(vcpu, 0x8000);
6975
6976         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6977         kvm_x86_ops->set_cr0(vcpu, cr0);
6978         vcpu->arch.cr0 = cr0;
6979
6980         kvm_x86_ops->set_cr4(vcpu, 0);
6981
6982         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6983         dt.address = dt.size = 0;
6984         kvm_x86_ops->set_idt(vcpu, &dt);
6985
6986         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6987
6988         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6989         cs.base = vcpu->arch.smbase;
6990
6991         ds.selector = 0;
6992         ds.base = 0;
6993
6994         cs.limit    = ds.limit = 0xffffffff;
6995         cs.type     = ds.type = 0x3;
6996         cs.dpl      = ds.dpl = 0;
6997         cs.db       = ds.db = 0;
6998         cs.s        = ds.s = 1;
6999         cs.l        = ds.l = 0;
7000         cs.g        = ds.g = 1;
7001         cs.avl      = ds.avl = 0;
7002         cs.present  = ds.present = 1;
7003         cs.unusable = ds.unusable = 0;
7004         cs.padding  = ds.padding = 0;
7005
7006         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7007         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7008         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7009         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7010         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7011         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7012
7013         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7014                 kvm_x86_ops->set_efer(vcpu, 0);
7015
7016         kvm_update_cpuid(vcpu);
7017         kvm_mmu_reset_context(vcpu);
7018 }
7019
7020 static void process_smi(struct kvm_vcpu *vcpu)
7021 {
7022         vcpu->arch.smi_pending = true;
7023         kvm_make_request(KVM_REQ_EVENT, vcpu);
7024 }
7025
7026 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7027 {
7028         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7029 }
7030
7031 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7032 {
7033         u64 eoi_exit_bitmap[4];
7034
7035         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7036                 return;
7037
7038         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7039
7040         if (irqchip_split(vcpu->kvm))
7041                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7042         else {
7043                 if (vcpu->arch.apicv_active)
7044                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7045                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7046         }
7047         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7048                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7049         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7050 }
7051
7052 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7053                 unsigned long start, unsigned long end)
7054 {
7055         unsigned long apic_address;
7056
7057         /*
7058          * The physical address of apic access page is stored in the VMCS.
7059          * Update it when it becomes invalid.
7060          */
7061         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7062         if (start <= apic_address && apic_address < end)
7063                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7064 }
7065
7066 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7067 {
7068         struct page *page = NULL;
7069
7070         if (!lapic_in_kernel(vcpu))
7071                 return;
7072
7073         if (!kvm_x86_ops->set_apic_access_page_addr)
7074                 return;
7075
7076         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7077         if (is_error_page(page))
7078                 return;
7079         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7080
7081         /*
7082          * Do not pin apic access page in memory, the MMU notifier
7083          * will call us again if it is migrated or swapped out.
7084          */
7085         put_page(page);
7086 }
7087 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7088
7089 /*
7090  * Returns 1 to let vcpu_run() continue the guest execution loop without
7091  * exiting to the userspace.  Otherwise, the value will be returned to the
7092  * userspace.
7093  */
7094 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7095 {
7096         int r;
7097         bool req_int_win =
7098                 dm_request_for_irq_injection(vcpu) &&
7099                 kvm_cpu_accept_dm_intr(vcpu);
7100
7101         bool req_immediate_exit = false;
7102
7103         if (kvm_request_pending(vcpu)) {
7104                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7105                         kvm_mmu_unload(vcpu);
7106                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7107                         __kvm_migrate_timers(vcpu);
7108                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7109                         kvm_gen_update_masterclock(vcpu->kvm);
7110                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7111                         kvm_gen_kvmclock_update(vcpu);
7112                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7113                         r = kvm_guest_time_update(vcpu);
7114                         if (unlikely(r))
7115                                 goto out;
7116                 }
7117                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7118                         kvm_mmu_sync_roots(vcpu);
7119                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7120                         kvm_vcpu_flush_tlb(vcpu, true);
7121                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7122                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7123                         r = 0;
7124                         goto out;
7125                 }
7126                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7127                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7128                         vcpu->mmio_needed = 0;
7129                         r = 0;
7130                         goto out;
7131                 }
7132                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7133                         /* Page is swapped out. Do synthetic halt */
7134                         vcpu->arch.apf.halted = true;
7135                         r = 1;
7136                         goto out;
7137                 }
7138                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7139                         record_steal_time(vcpu);
7140                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7141                         process_smi(vcpu);
7142                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7143                         process_nmi(vcpu);
7144                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7145                         kvm_pmu_handle_event(vcpu);
7146                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7147                         kvm_pmu_deliver_pmi(vcpu);
7148                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7149                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7150                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7151                                      vcpu->arch.ioapic_handled_vectors)) {
7152                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7153                                 vcpu->run->eoi.vector =
7154                                                 vcpu->arch.pending_ioapic_eoi;
7155                                 r = 0;
7156                                 goto out;
7157                         }
7158                 }
7159                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7160                         vcpu_scan_ioapic(vcpu);
7161                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7162                         kvm_vcpu_reload_apic_access_page(vcpu);
7163                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7164                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7165                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7166                         r = 0;
7167                         goto out;
7168                 }
7169                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7170                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7171                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7172                         r = 0;
7173                         goto out;
7174                 }
7175                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7176                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7177                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7178                         r = 0;
7179                         goto out;
7180                 }
7181
7182                 /*
7183                  * KVM_REQ_HV_STIMER has to be processed after
7184                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7185                  * depend on the guest clock being up-to-date
7186                  */
7187                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7188                         kvm_hv_process_stimers(vcpu);
7189         }
7190
7191         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7192                 ++vcpu->stat.req_event;
7193                 kvm_apic_accept_events(vcpu);
7194                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7195                         r = 1;
7196                         goto out;
7197                 }
7198
7199                 if (inject_pending_event(vcpu, req_int_win) != 0)
7200                         req_immediate_exit = true;
7201                 else {
7202                         /* Enable SMI/NMI/IRQ window open exits if needed.
7203                          *
7204                          * SMIs have three cases:
7205                          * 1) They can be nested, and then there is nothing to
7206                          *    do here because RSM will cause a vmexit anyway.
7207                          * 2) There is an ISA-specific reason why SMI cannot be
7208                          *    injected, and the moment when this changes can be
7209                          *    intercepted.
7210                          * 3) Or the SMI can be pending because
7211                          *    inject_pending_event has completed the injection
7212                          *    of an IRQ or NMI from the previous vmexit, and
7213                          *    then we request an immediate exit to inject the
7214                          *    SMI.
7215                          */
7216                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7217                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7218                                         req_immediate_exit = true;
7219                         if (vcpu->arch.nmi_pending)
7220                                 kvm_x86_ops->enable_nmi_window(vcpu);
7221                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7222                                 kvm_x86_ops->enable_irq_window(vcpu);
7223                         WARN_ON(vcpu->arch.exception.pending);
7224                 }
7225
7226                 if (kvm_lapic_enabled(vcpu)) {
7227                         update_cr8_intercept(vcpu);
7228                         kvm_lapic_sync_to_vapic(vcpu);
7229                 }
7230         }
7231
7232         r = kvm_mmu_reload(vcpu);
7233         if (unlikely(r)) {
7234                 goto cancel_injection;
7235         }
7236
7237         preempt_disable();
7238
7239         kvm_x86_ops->prepare_guest_switch(vcpu);
7240
7241         /*
7242          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7243          * IPI are then delayed after guest entry, which ensures that they
7244          * result in virtual interrupt delivery.
7245          */
7246         local_irq_disable();
7247         vcpu->mode = IN_GUEST_MODE;
7248
7249         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7250
7251         /*
7252          * 1) We should set ->mode before checking ->requests.  Please see
7253          * the comment in kvm_vcpu_exiting_guest_mode().
7254          *
7255          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7256          * pairs with the memory barrier implicit in pi_test_and_set_on
7257          * (see vmx_deliver_posted_interrupt).
7258          *
7259          * 3) This also orders the write to mode from any reads to the page
7260          * tables done while the VCPU is running.  Please see the comment
7261          * in kvm_flush_remote_tlbs.
7262          */
7263         smp_mb__after_srcu_read_unlock();
7264
7265         /*
7266          * This handles the case where a posted interrupt was
7267          * notified with kvm_vcpu_kick.
7268          */
7269         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7270                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7271
7272         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7273             || need_resched() || signal_pending(current)) {
7274                 vcpu->mode = OUTSIDE_GUEST_MODE;
7275                 smp_wmb();
7276                 local_irq_enable();
7277                 preempt_enable();
7278                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7279                 r = 1;
7280                 goto cancel_injection;
7281         }
7282
7283         kvm_load_guest_xcr0(vcpu);
7284
7285         if (req_immediate_exit) {
7286                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7287                 smp_send_reschedule(vcpu->cpu);
7288         }
7289
7290         trace_kvm_entry(vcpu->vcpu_id);
7291         if (lapic_timer_advance_ns)
7292                 wait_lapic_expire(vcpu);
7293         guest_enter_irqoff();
7294
7295         if (unlikely(vcpu->arch.switch_db_regs)) {
7296                 set_debugreg(0, 7);
7297                 set_debugreg(vcpu->arch.eff_db[0], 0);
7298                 set_debugreg(vcpu->arch.eff_db[1], 1);
7299                 set_debugreg(vcpu->arch.eff_db[2], 2);
7300                 set_debugreg(vcpu->arch.eff_db[3], 3);
7301                 set_debugreg(vcpu->arch.dr6, 6);
7302                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7303         }
7304
7305         kvm_x86_ops->run(vcpu);
7306
7307         /*
7308          * Do this here before restoring debug registers on the host.  And
7309          * since we do this before handling the vmexit, a DR access vmexit
7310          * can (a) read the correct value of the debug registers, (b) set
7311          * KVM_DEBUGREG_WONT_EXIT again.
7312          */
7313         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7314                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7315                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7316                 kvm_update_dr0123(vcpu);
7317                 kvm_update_dr6(vcpu);
7318                 kvm_update_dr7(vcpu);
7319                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7320         }
7321
7322         /*
7323          * If the guest has used debug registers, at least dr7
7324          * will be disabled while returning to the host.
7325          * If we don't have active breakpoints in the host, we don't
7326          * care about the messed up debug address registers. But if
7327          * we have some of them active, restore the old state.
7328          */
7329         if (hw_breakpoint_active())
7330                 hw_breakpoint_restore();
7331
7332         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7333
7334         vcpu->mode = OUTSIDE_GUEST_MODE;
7335         smp_wmb();
7336
7337         kvm_put_guest_xcr0(vcpu);
7338
7339         kvm_x86_ops->handle_external_intr(vcpu);
7340
7341         ++vcpu->stat.exits;
7342
7343         guest_exit_irqoff();
7344
7345         local_irq_enable();
7346         preempt_enable();
7347
7348         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7349
7350         /*
7351          * Profile KVM exit RIPs:
7352          */
7353         if (unlikely(prof_on == KVM_PROFILING)) {
7354                 unsigned long rip = kvm_rip_read(vcpu);
7355                 profile_hit(KVM_PROFILING, (void *)rip);
7356         }
7357
7358         if (unlikely(vcpu->arch.tsc_always_catchup))
7359                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7360
7361         if (vcpu->arch.apic_attention)
7362                 kvm_lapic_sync_from_vapic(vcpu);
7363
7364         vcpu->arch.gpa_available = false;
7365         r = kvm_x86_ops->handle_exit(vcpu);
7366         return r;
7367
7368 cancel_injection:
7369         kvm_x86_ops->cancel_injection(vcpu);
7370         if (unlikely(vcpu->arch.apic_attention))
7371                 kvm_lapic_sync_from_vapic(vcpu);
7372 out:
7373         return r;
7374 }
7375
7376 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7377 {
7378         if (!kvm_arch_vcpu_runnable(vcpu) &&
7379             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7380                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7381                 kvm_vcpu_block(vcpu);
7382                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7383
7384                 if (kvm_x86_ops->post_block)
7385                         kvm_x86_ops->post_block(vcpu);
7386
7387                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7388                         return 1;
7389         }
7390
7391         kvm_apic_accept_events(vcpu);
7392         switch(vcpu->arch.mp_state) {
7393         case KVM_MP_STATE_HALTED:
7394                 vcpu->arch.pv.pv_unhalted = false;
7395                 vcpu->arch.mp_state =
7396                         KVM_MP_STATE_RUNNABLE;
7397         case KVM_MP_STATE_RUNNABLE:
7398                 vcpu->arch.apf.halted = false;
7399                 break;
7400         case KVM_MP_STATE_INIT_RECEIVED:
7401                 break;
7402         default:
7403                 return -EINTR;
7404                 break;
7405         }
7406         return 1;
7407 }
7408
7409 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7410 {
7411         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7412                 kvm_x86_ops->check_nested_events(vcpu, false);
7413
7414         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7415                 !vcpu->arch.apf.halted);
7416 }
7417
7418 static int vcpu_run(struct kvm_vcpu *vcpu)
7419 {
7420         int r;
7421         struct kvm *kvm = vcpu->kvm;
7422
7423         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7424
7425         for (;;) {
7426                 if (kvm_vcpu_running(vcpu)) {
7427                         r = vcpu_enter_guest(vcpu);
7428                 } else {
7429                         r = vcpu_block(kvm, vcpu);
7430                 }
7431
7432                 if (r <= 0)
7433                         break;
7434
7435                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7436                 if (kvm_cpu_has_pending_timer(vcpu))
7437                         kvm_inject_pending_timer_irqs(vcpu);
7438
7439                 if (dm_request_for_irq_injection(vcpu) &&
7440                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7441                         r = 0;
7442                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7443                         ++vcpu->stat.request_irq_exits;
7444                         break;
7445                 }
7446
7447                 kvm_check_async_pf_completion(vcpu);
7448
7449                 if (signal_pending(current)) {
7450                         r = -EINTR;
7451                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7452                         ++vcpu->stat.signal_exits;
7453                         break;
7454                 }
7455                 if (need_resched()) {
7456                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7457                         cond_resched();
7458                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7459                 }
7460         }
7461
7462         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7463
7464         return r;
7465 }
7466
7467 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7468 {
7469         int r;
7470         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7471         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7472         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7473         if (r != EMULATE_DONE)
7474                 return 0;
7475         return 1;
7476 }
7477
7478 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7479 {
7480         BUG_ON(!vcpu->arch.pio.count);
7481
7482         return complete_emulated_io(vcpu);
7483 }
7484
7485 /*
7486  * Implements the following, as a state machine:
7487  *
7488  * read:
7489  *   for each fragment
7490  *     for each mmio piece in the fragment
7491  *       write gpa, len
7492  *       exit
7493  *       copy data
7494  *   execute insn
7495  *
7496  * write:
7497  *   for each fragment
7498  *     for each mmio piece in the fragment
7499  *       write gpa, len
7500  *       copy data
7501  *       exit
7502  */
7503 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7504 {
7505         struct kvm_run *run = vcpu->run;
7506         struct kvm_mmio_fragment *frag;
7507         unsigned len;
7508
7509         BUG_ON(!vcpu->mmio_needed);
7510
7511         /* Complete previous fragment */
7512         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7513         len = min(8u, frag->len);
7514         if (!vcpu->mmio_is_write)
7515                 memcpy(frag->data, run->mmio.data, len);
7516
7517         if (frag->len <= 8) {
7518                 /* Switch to the next fragment. */
7519                 frag++;
7520                 vcpu->mmio_cur_fragment++;
7521         } else {
7522                 /* Go forward to the next mmio piece. */
7523                 frag->data += len;
7524                 frag->gpa += len;
7525                 frag->len -= len;
7526         }
7527
7528         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7529                 vcpu->mmio_needed = 0;
7530
7531                 /* FIXME: return into emulator if single-stepping.  */
7532                 if (vcpu->mmio_is_write)
7533                         return 1;
7534                 vcpu->mmio_read_completed = 1;
7535                 return complete_emulated_io(vcpu);
7536         }
7537
7538         run->exit_reason = KVM_EXIT_MMIO;
7539         run->mmio.phys_addr = frag->gpa;
7540         if (vcpu->mmio_is_write)
7541                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7542         run->mmio.len = min(8u, frag->len);
7543         run->mmio.is_write = vcpu->mmio_is_write;
7544         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7545         return 0;
7546 }
7547
7548 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7549 {
7550         int r;
7551
7552         vcpu_load(vcpu);
7553         kvm_sigset_activate(vcpu);
7554         kvm_load_guest_fpu(vcpu);
7555
7556         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7557                 if (kvm_run->immediate_exit) {
7558                         r = -EINTR;
7559                         goto out;
7560                 }
7561                 kvm_vcpu_block(vcpu);
7562                 kvm_apic_accept_events(vcpu);
7563                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7564                 r = -EAGAIN;
7565                 if (signal_pending(current)) {
7566                         r = -EINTR;
7567                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7568                         ++vcpu->stat.signal_exits;
7569                 }
7570                 goto out;
7571         }
7572
7573         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
7574                 r = -EINVAL;
7575                 goto out;
7576         }
7577
7578         if (vcpu->run->kvm_dirty_regs) {
7579                 r = sync_regs(vcpu);
7580                 if (r != 0)
7581                         goto out;
7582         }
7583
7584         /* re-sync apic's tpr */
7585         if (!lapic_in_kernel(vcpu)) {
7586                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7587                         r = -EINVAL;
7588                         goto out;
7589                 }
7590         }
7591
7592         if (unlikely(vcpu->arch.complete_userspace_io)) {
7593                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7594                 vcpu->arch.complete_userspace_io = NULL;
7595                 r = cui(vcpu);
7596                 if (r <= 0)
7597                         goto out;
7598         } else
7599                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7600
7601         if (kvm_run->immediate_exit)
7602                 r = -EINTR;
7603         else
7604                 r = vcpu_run(vcpu);
7605
7606 out:
7607         kvm_put_guest_fpu(vcpu);
7608         if (vcpu->run->kvm_valid_regs)
7609                 store_regs(vcpu);
7610         post_kvm_run_save(vcpu);
7611         kvm_sigset_deactivate(vcpu);
7612
7613         vcpu_put(vcpu);
7614         return r;
7615 }
7616
7617 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7618 {
7619         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7620                 /*
7621                  * We are here if userspace calls get_regs() in the middle of
7622                  * instruction emulation. Registers state needs to be copied
7623                  * back from emulation context to vcpu. Userspace shouldn't do
7624                  * that usually, but some bad designed PV devices (vmware
7625                  * backdoor interface) need this to work
7626                  */
7627                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7628                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7629         }
7630         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7631         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7632         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7633         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7634         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7635         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7636         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7637         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7638 #ifdef CONFIG_X86_64
7639         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7640         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7641         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7642         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7643         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7644         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7645         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7646         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7647 #endif
7648
7649         regs->rip = kvm_rip_read(vcpu);
7650         regs->rflags = kvm_get_rflags(vcpu);
7651 }
7652
7653 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7654 {
7655         vcpu_load(vcpu);
7656         __get_regs(vcpu, regs);
7657         vcpu_put(vcpu);
7658         return 0;
7659 }
7660
7661 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7662 {
7663         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7664         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7665
7666         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7667         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7668         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7669         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7670         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7671         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7672         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7673         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7674 #ifdef CONFIG_X86_64
7675         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7676         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7677         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7678         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7679         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7680         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7681         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7682         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7683 #endif
7684
7685         kvm_rip_write(vcpu, regs->rip);
7686         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7687
7688         vcpu->arch.exception.pending = false;
7689
7690         kvm_make_request(KVM_REQ_EVENT, vcpu);
7691 }
7692
7693 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7694 {
7695         vcpu_load(vcpu);
7696         __set_regs(vcpu, regs);
7697         vcpu_put(vcpu);
7698         return 0;
7699 }
7700
7701 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7702 {
7703         struct kvm_segment cs;
7704
7705         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7706         *db = cs.db;
7707         *l = cs.l;
7708 }
7709 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7710
7711 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7712 {
7713         struct desc_ptr dt;
7714
7715         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7716         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7717         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7718         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7719         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7720         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7721
7722         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7723         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7724
7725         kvm_x86_ops->get_idt(vcpu, &dt);
7726         sregs->idt.limit = dt.size;
7727         sregs->idt.base = dt.address;
7728         kvm_x86_ops->get_gdt(vcpu, &dt);
7729         sregs->gdt.limit = dt.size;
7730         sregs->gdt.base = dt.address;
7731
7732         sregs->cr0 = kvm_read_cr0(vcpu);
7733         sregs->cr2 = vcpu->arch.cr2;
7734         sregs->cr3 = kvm_read_cr3(vcpu);
7735         sregs->cr4 = kvm_read_cr4(vcpu);
7736         sregs->cr8 = kvm_get_cr8(vcpu);
7737         sregs->efer = vcpu->arch.efer;
7738         sregs->apic_base = kvm_get_apic_base(vcpu);
7739
7740         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7741
7742         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7743                 set_bit(vcpu->arch.interrupt.nr,
7744                         (unsigned long *)sregs->interrupt_bitmap);
7745 }
7746
7747 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7748                                   struct kvm_sregs *sregs)
7749 {
7750         vcpu_load(vcpu);
7751         __get_sregs(vcpu, sregs);
7752         vcpu_put(vcpu);
7753         return 0;
7754 }
7755
7756 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7757                                     struct kvm_mp_state *mp_state)
7758 {
7759         vcpu_load(vcpu);
7760
7761         kvm_apic_accept_events(vcpu);
7762         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7763                                         vcpu->arch.pv.pv_unhalted)
7764                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7765         else
7766                 mp_state->mp_state = vcpu->arch.mp_state;
7767
7768         vcpu_put(vcpu);
7769         return 0;
7770 }
7771
7772 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7773                                     struct kvm_mp_state *mp_state)
7774 {
7775         int ret = -EINVAL;
7776
7777         vcpu_load(vcpu);
7778
7779         if (!lapic_in_kernel(vcpu) &&
7780             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7781                 goto out;
7782
7783         /* INITs are latched while in SMM */
7784         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7785             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7786              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7787                 goto out;
7788
7789         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7790                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7791                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7792         } else
7793                 vcpu->arch.mp_state = mp_state->mp_state;
7794         kvm_make_request(KVM_REQ_EVENT, vcpu);
7795
7796         ret = 0;
7797 out:
7798         vcpu_put(vcpu);
7799         return ret;
7800 }
7801
7802 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7803                     int reason, bool has_error_code, u32 error_code)
7804 {
7805         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7806         int ret;
7807
7808         init_emulate_ctxt(vcpu);
7809
7810         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7811                                    has_error_code, error_code);
7812
7813         if (ret)
7814                 return EMULATE_FAIL;
7815
7816         kvm_rip_write(vcpu, ctxt->eip);
7817         kvm_set_rflags(vcpu, ctxt->eflags);
7818         kvm_make_request(KVM_REQ_EVENT, vcpu);
7819         return EMULATE_DONE;
7820 }
7821 EXPORT_SYMBOL_GPL(kvm_task_switch);
7822
7823 int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7824 {
7825         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
7826                 /*
7827                  * When EFER.LME and CR0.PG are set, the processor is in
7828                  * 64-bit mode (though maybe in a 32-bit code segment).
7829                  * CR4.PAE and EFER.LMA must be set.
7830                  */
7831                 if (!(sregs->cr4 & X86_CR4_PAE)
7832                     || !(sregs->efer & EFER_LMA))
7833                         return -EINVAL;
7834         } else {
7835                 /*
7836                  * Not in 64-bit mode: EFER.LMA is clear and the code
7837                  * segment cannot be 64-bit.
7838                  */
7839                 if (sregs->efer & EFER_LMA || sregs->cs.l)
7840                         return -EINVAL;
7841         }
7842
7843         return 0;
7844 }
7845
7846 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7847 {
7848         struct msr_data apic_base_msr;
7849         int mmu_reset_needed = 0;
7850         int pending_vec, max_bits, idx;
7851         struct desc_ptr dt;
7852         int ret = -EINVAL;
7853
7854         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7855                         (sregs->cr4 & X86_CR4_OSXSAVE))
7856                 goto out;
7857
7858         if (kvm_valid_sregs(vcpu, sregs))
7859                 goto out;
7860
7861         apic_base_msr.data = sregs->apic_base;
7862         apic_base_msr.host_initiated = true;
7863         if (kvm_set_apic_base(vcpu, &apic_base_msr))
7864                 goto out;
7865
7866         dt.size = sregs->idt.limit;
7867         dt.address = sregs->idt.base;
7868         kvm_x86_ops->set_idt(vcpu, &dt);
7869         dt.size = sregs->gdt.limit;
7870         dt.address = sregs->gdt.base;
7871         kvm_x86_ops->set_gdt(vcpu, &dt);
7872
7873         vcpu->arch.cr2 = sregs->cr2;
7874         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7875         vcpu->arch.cr3 = sregs->cr3;
7876         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7877
7878         kvm_set_cr8(vcpu, sregs->cr8);
7879
7880         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7881         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7882
7883         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7884         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7885         vcpu->arch.cr0 = sregs->cr0;
7886
7887         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7888         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7889         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7890                 kvm_update_cpuid(vcpu);
7891
7892         idx = srcu_read_lock(&vcpu->kvm->srcu);
7893         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7894                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7895                 mmu_reset_needed = 1;
7896         }
7897         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7898
7899         if (mmu_reset_needed)
7900                 kvm_mmu_reset_context(vcpu);
7901
7902         max_bits = KVM_NR_INTERRUPTS;
7903         pending_vec = find_first_bit(
7904                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7905         if (pending_vec < max_bits) {
7906                 kvm_queue_interrupt(vcpu, pending_vec, false);
7907                 pr_debug("Set back pending irq %d\n", pending_vec);
7908         }
7909
7910         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7911         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7912         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7913         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7914         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7915         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7916
7917         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7918         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7919
7920         update_cr8_intercept(vcpu);
7921
7922         /* Older userspace won't unhalt the vcpu on reset. */
7923         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7924             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7925             !is_protmode(vcpu))
7926                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7927
7928         kvm_make_request(KVM_REQ_EVENT, vcpu);
7929
7930         ret = 0;
7931 out:
7932         return ret;
7933 }
7934
7935 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7936                                   struct kvm_sregs *sregs)
7937 {
7938         int ret;
7939
7940         vcpu_load(vcpu);
7941         ret = __set_sregs(vcpu, sregs);
7942         vcpu_put(vcpu);
7943         return ret;
7944 }
7945
7946 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7947                                         struct kvm_guest_debug *dbg)
7948 {
7949         unsigned long rflags;
7950         int i, r;
7951
7952         vcpu_load(vcpu);
7953
7954         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7955                 r = -EBUSY;
7956                 if (vcpu->arch.exception.pending)
7957                         goto out;
7958                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7959                         kvm_queue_exception(vcpu, DB_VECTOR);
7960                 else
7961                         kvm_queue_exception(vcpu, BP_VECTOR);
7962         }
7963
7964         /*
7965          * Read rflags as long as potentially injected trace flags are still
7966          * filtered out.
7967          */
7968         rflags = kvm_get_rflags(vcpu);
7969
7970         vcpu->guest_debug = dbg->control;
7971         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7972                 vcpu->guest_debug = 0;
7973
7974         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7975                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7976                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7977                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7978         } else {
7979                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7980                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7981         }
7982         kvm_update_dr7(vcpu);
7983
7984         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7985                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7986                         get_segment_base(vcpu, VCPU_SREG_CS);
7987
7988         /*
7989          * Trigger an rflags update that will inject or remove the trace
7990          * flags.
7991          */
7992         kvm_set_rflags(vcpu, rflags);
7993
7994         kvm_x86_ops->update_bp_intercept(vcpu);
7995
7996         r = 0;
7997
7998 out:
7999         vcpu_put(vcpu);
8000         return r;
8001 }
8002
8003 /*
8004  * Translate a guest virtual address to a guest physical address.
8005  */
8006 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8007                                     struct kvm_translation *tr)
8008 {
8009         unsigned long vaddr = tr->linear_address;
8010         gpa_t gpa;
8011         int idx;
8012
8013         vcpu_load(vcpu);
8014
8015         idx = srcu_read_lock(&vcpu->kvm->srcu);
8016         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8017         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8018         tr->physical_address = gpa;
8019         tr->valid = gpa != UNMAPPED_GVA;
8020         tr->writeable = 1;
8021         tr->usermode = 0;
8022
8023         vcpu_put(vcpu);
8024         return 0;
8025 }
8026
8027 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8028 {
8029         struct fxregs_state *fxsave;
8030
8031         vcpu_load(vcpu);
8032
8033         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8034         memcpy(fpu->fpr, fxsave->st_space, 128);
8035         fpu->fcw = fxsave->cwd;
8036         fpu->fsw = fxsave->swd;
8037         fpu->ftwx = fxsave->twd;
8038         fpu->last_opcode = fxsave->fop;
8039         fpu->last_ip = fxsave->rip;
8040         fpu->last_dp = fxsave->rdp;
8041         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
8042
8043         vcpu_put(vcpu);
8044         return 0;
8045 }
8046
8047 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8048 {
8049         struct fxregs_state *fxsave;
8050
8051         vcpu_load(vcpu);
8052
8053         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8054
8055         memcpy(fxsave->st_space, fpu->fpr, 128);
8056         fxsave->cwd = fpu->fcw;
8057         fxsave->swd = fpu->fsw;
8058         fxsave->twd = fpu->ftwx;
8059         fxsave->fop = fpu->last_opcode;
8060         fxsave->rip = fpu->last_ip;
8061         fxsave->rdp = fpu->last_dp;
8062         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
8063
8064         vcpu_put(vcpu);
8065         return 0;
8066 }
8067
8068 static void store_regs(struct kvm_vcpu *vcpu)
8069 {
8070         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8071
8072         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8073                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8074
8075         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8076                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8077
8078         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8079                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8080                                 vcpu, &vcpu->run->s.regs.events);
8081 }
8082
8083 static int sync_regs(struct kvm_vcpu *vcpu)
8084 {
8085         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8086                 return -EINVAL;
8087
8088         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8089                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8090                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8091         }
8092         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8093                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8094                         return -EINVAL;
8095                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8096         }
8097         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8098                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8099                                 vcpu, &vcpu->run->s.regs.events))
8100                         return -EINVAL;
8101                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8102         }
8103
8104         return 0;
8105 }
8106
8107 static void fx_init(struct kvm_vcpu *vcpu)
8108 {
8109         fpstate_init(&vcpu->arch.guest_fpu.state);
8110         if (boot_cpu_has(X86_FEATURE_XSAVES))
8111                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8112                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8113
8114         /*
8115          * Ensure guest xcr0 is valid for loading
8116          */
8117         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8118
8119         vcpu->arch.cr0 |= X86_CR0_ET;
8120 }
8121
8122 /* Swap (qemu) user FPU context for the guest FPU context. */
8123 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8124 {
8125         preempt_disable();
8126         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8127         /* PKRU is separately restored in kvm_x86_ops->run.  */
8128         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8129                                 ~XFEATURE_MASK_PKRU);
8130         preempt_enable();
8131         trace_kvm_fpu(1);
8132 }
8133
8134 /* When vcpu_run ends, restore user space FPU context. */
8135 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8136 {
8137         preempt_disable();
8138         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8139         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8140         preempt_enable();
8141         ++vcpu->stat.fpu_reload;
8142         trace_kvm_fpu(0);
8143 }
8144
8145 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8146 {
8147         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8148
8149         kvmclock_reset(vcpu);
8150
8151         kvm_x86_ops->vcpu_free(vcpu);
8152         free_cpumask_var(wbinvd_dirty_mask);
8153 }
8154
8155 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8156                                                 unsigned int id)
8157 {
8158         struct kvm_vcpu *vcpu;
8159
8160         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8161                 printk_once(KERN_WARNING
8162                 "kvm: SMP vm created on host with unstable TSC; "
8163                 "guest TSC will not be reliable\n");
8164
8165         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8166
8167         return vcpu;
8168 }
8169
8170 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8171 {
8172         kvm_vcpu_mtrr_init(vcpu);
8173         vcpu_load(vcpu);
8174         kvm_vcpu_reset(vcpu, false);
8175         kvm_mmu_setup(vcpu);
8176         vcpu_put(vcpu);
8177         return 0;
8178 }
8179
8180 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8181 {
8182         struct msr_data msr;
8183         struct kvm *kvm = vcpu->kvm;
8184
8185         kvm_hv_vcpu_postcreate(vcpu);
8186
8187         if (mutex_lock_killable(&vcpu->mutex))
8188                 return;
8189         vcpu_load(vcpu);
8190         msr.data = 0x0;
8191         msr.index = MSR_IA32_TSC;
8192         msr.host_initiated = true;
8193         kvm_write_tsc(vcpu, &msr);
8194         vcpu_put(vcpu);
8195         mutex_unlock(&vcpu->mutex);
8196
8197         if (!kvmclock_periodic_sync)
8198                 return;
8199
8200         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8201                                         KVMCLOCK_SYNC_PERIOD);
8202 }
8203
8204 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8205 {
8206         vcpu->arch.apf.msr_val = 0;
8207
8208         vcpu_load(vcpu);
8209         kvm_mmu_unload(vcpu);
8210         vcpu_put(vcpu);
8211
8212         kvm_x86_ops->vcpu_free(vcpu);
8213 }
8214
8215 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8216 {
8217         kvm_lapic_reset(vcpu, init_event);
8218
8219         vcpu->arch.hflags = 0;
8220
8221         vcpu->arch.smi_pending = 0;
8222         vcpu->arch.smi_count = 0;
8223         atomic_set(&vcpu->arch.nmi_queued, 0);
8224         vcpu->arch.nmi_pending = 0;
8225         vcpu->arch.nmi_injected = false;
8226         kvm_clear_interrupt_queue(vcpu);
8227         kvm_clear_exception_queue(vcpu);
8228         vcpu->arch.exception.pending = false;
8229
8230         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8231         kvm_update_dr0123(vcpu);
8232         vcpu->arch.dr6 = DR6_INIT;
8233         kvm_update_dr6(vcpu);
8234         vcpu->arch.dr7 = DR7_FIXED_1;
8235         kvm_update_dr7(vcpu);
8236
8237         vcpu->arch.cr2 = 0;
8238
8239         kvm_make_request(KVM_REQ_EVENT, vcpu);
8240         vcpu->arch.apf.msr_val = 0;
8241         vcpu->arch.st.msr_val = 0;
8242
8243         kvmclock_reset(vcpu);
8244
8245         kvm_clear_async_pf_completion_queue(vcpu);
8246         kvm_async_pf_hash_reset(vcpu);
8247         vcpu->arch.apf.halted = false;
8248
8249         if (kvm_mpx_supported()) {
8250                 void *mpx_state_buffer;
8251
8252                 /*
8253                  * To avoid have the INIT path from kvm_apic_has_events() that be
8254                  * called with loaded FPU and does not let userspace fix the state.
8255                  */
8256                 if (init_event)
8257                         kvm_put_guest_fpu(vcpu);
8258                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8259                                         XFEATURE_MASK_BNDREGS);
8260                 if (mpx_state_buffer)
8261                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8262                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8263                                         XFEATURE_MASK_BNDCSR);
8264                 if (mpx_state_buffer)
8265                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8266                 if (init_event)
8267                         kvm_load_guest_fpu(vcpu);
8268         }
8269
8270         if (!init_event) {
8271                 kvm_pmu_reset(vcpu);
8272                 vcpu->arch.smbase = 0x30000;
8273
8274                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8275                 vcpu->arch.msr_misc_features_enables = 0;
8276
8277                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8278         }
8279
8280         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8281         vcpu->arch.regs_avail = ~0;
8282         vcpu->arch.regs_dirty = ~0;
8283
8284         vcpu->arch.ia32_xss = 0;
8285
8286         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8287 }
8288
8289 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8290 {
8291         struct kvm_segment cs;
8292
8293         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8294         cs.selector = vector << 8;
8295         cs.base = vector << 12;
8296         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8297         kvm_rip_write(vcpu, 0);
8298 }
8299
8300 int kvm_arch_hardware_enable(void)
8301 {
8302         struct kvm *kvm;
8303         struct kvm_vcpu *vcpu;
8304         int i;
8305         int ret;
8306         u64 local_tsc;
8307         u64 max_tsc = 0;
8308         bool stable, backwards_tsc = false;
8309
8310         kvm_shared_msr_cpu_online();
8311         ret = kvm_x86_ops->hardware_enable();
8312         if (ret != 0)
8313                 return ret;
8314
8315         local_tsc = rdtsc();
8316         stable = !kvm_check_tsc_unstable();
8317         list_for_each_entry(kvm, &vm_list, vm_list) {
8318                 kvm_for_each_vcpu(i, vcpu, kvm) {
8319                         if (!stable && vcpu->cpu == smp_processor_id())
8320                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8321                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8322                                 backwards_tsc = true;
8323                                 if (vcpu->arch.last_host_tsc > max_tsc)
8324                                         max_tsc = vcpu->arch.last_host_tsc;
8325                         }
8326                 }
8327         }
8328
8329         /*
8330          * Sometimes, even reliable TSCs go backwards.  This happens on
8331          * platforms that reset TSC during suspend or hibernate actions, but
8332          * maintain synchronization.  We must compensate.  Fortunately, we can
8333          * detect that condition here, which happens early in CPU bringup,
8334          * before any KVM threads can be running.  Unfortunately, we can't
8335          * bring the TSCs fully up to date with real time, as we aren't yet far
8336          * enough into CPU bringup that we know how much real time has actually
8337          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8338          * variables that haven't been updated yet.
8339          *
8340          * So we simply find the maximum observed TSC above, then record the
8341          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8342          * the adjustment will be applied.  Note that we accumulate
8343          * adjustments, in case multiple suspend cycles happen before some VCPU
8344          * gets a chance to run again.  In the event that no KVM threads get a
8345          * chance to run, we will miss the entire elapsed period, as we'll have
8346          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8347          * loose cycle time.  This isn't too big a deal, since the loss will be
8348          * uniform across all VCPUs (not to mention the scenario is extremely
8349          * unlikely). It is possible that a second hibernate recovery happens
8350          * much faster than a first, causing the observed TSC here to be
8351          * smaller; this would require additional padding adjustment, which is
8352          * why we set last_host_tsc to the local tsc observed here.
8353          *
8354          * N.B. - this code below runs only on platforms with reliable TSC,
8355          * as that is the only way backwards_tsc is set above.  Also note
8356          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8357          * have the same delta_cyc adjustment applied if backwards_tsc
8358          * is detected.  Note further, this adjustment is only done once,
8359          * as we reset last_host_tsc on all VCPUs to stop this from being
8360          * called multiple times (one for each physical CPU bringup).
8361          *
8362          * Platforms with unreliable TSCs don't have to deal with this, they
8363          * will be compensated by the logic in vcpu_load, which sets the TSC to
8364          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8365          * guarantee that they stay in perfect synchronization.
8366          */
8367         if (backwards_tsc) {
8368                 u64 delta_cyc = max_tsc - local_tsc;
8369                 list_for_each_entry(kvm, &vm_list, vm_list) {
8370                         kvm->arch.backwards_tsc_observed = true;
8371                         kvm_for_each_vcpu(i, vcpu, kvm) {
8372                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8373                                 vcpu->arch.last_host_tsc = local_tsc;
8374                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8375                         }
8376
8377                         /*
8378                          * We have to disable TSC offset matching.. if you were
8379                          * booting a VM while issuing an S4 host suspend....
8380                          * you may have some problem.  Solving this issue is
8381                          * left as an exercise to the reader.
8382                          */
8383                         kvm->arch.last_tsc_nsec = 0;
8384                         kvm->arch.last_tsc_write = 0;
8385                 }
8386
8387         }
8388         return 0;
8389 }
8390
8391 void kvm_arch_hardware_disable(void)
8392 {
8393         kvm_x86_ops->hardware_disable();
8394         drop_user_return_notifiers();
8395 }
8396
8397 int kvm_arch_hardware_setup(void)
8398 {
8399         int r;
8400
8401         r = kvm_x86_ops->hardware_setup();
8402         if (r != 0)
8403                 return r;
8404
8405         if (kvm_has_tsc_control) {
8406                 /*
8407                  * Make sure the user can only configure tsc_khz values that
8408                  * fit into a signed integer.
8409                  * A min value is not calculated needed because it will always
8410                  * be 1 on all machines.
8411                  */
8412                 u64 max = min(0x7fffffffULL,
8413                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8414                 kvm_max_guest_tsc_khz = max;
8415
8416                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8417         }
8418
8419         kvm_init_msr_list();
8420         return 0;
8421 }
8422
8423 void kvm_arch_hardware_unsetup(void)
8424 {
8425         kvm_x86_ops->hardware_unsetup();
8426 }
8427
8428 void kvm_arch_check_processor_compat(void *rtn)
8429 {
8430         kvm_x86_ops->check_processor_compatibility(rtn);
8431 }
8432
8433 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8434 {
8435         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8436 }
8437 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8438
8439 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8440 {
8441         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8442 }
8443
8444 struct static_key kvm_no_apic_vcpu __read_mostly;
8445 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8446
8447 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8448 {
8449         struct page *page;
8450         int r;
8451
8452         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8453         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8454         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8455                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8456         else
8457                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8458
8459         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8460         if (!page) {
8461                 r = -ENOMEM;
8462                 goto fail;
8463         }
8464         vcpu->arch.pio_data = page_address(page);
8465
8466         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8467
8468         r = kvm_mmu_create(vcpu);
8469         if (r < 0)
8470                 goto fail_free_pio_data;
8471
8472         if (irqchip_in_kernel(vcpu->kvm)) {
8473                 r = kvm_create_lapic(vcpu);
8474                 if (r < 0)
8475                         goto fail_mmu_destroy;
8476         } else
8477                 static_key_slow_inc(&kvm_no_apic_vcpu);
8478
8479         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8480                                        GFP_KERNEL);
8481         if (!vcpu->arch.mce_banks) {
8482                 r = -ENOMEM;
8483                 goto fail_free_lapic;
8484         }
8485         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8486
8487         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8488                 r = -ENOMEM;
8489                 goto fail_free_mce_banks;
8490         }
8491
8492         fx_init(vcpu);
8493
8494         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8495
8496         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8497
8498         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8499
8500         kvm_async_pf_hash_reset(vcpu);
8501         kvm_pmu_init(vcpu);
8502
8503         vcpu->arch.pending_external_vector = -1;
8504         vcpu->arch.preempted_in_kernel = false;
8505
8506         kvm_hv_vcpu_init(vcpu);
8507
8508         return 0;
8509
8510 fail_free_mce_banks:
8511         kfree(vcpu->arch.mce_banks);
8512 fail_free_lapic:
8513         kvm_free_lapic(vcpu);
8514 fail_mmu_destroy:
8515         kvm_mmu_destroy(vcpu);
8516 fail_free_pio_data:
8517         free_page((unsigned long)vcpu->arch.pio_data);
8518 fail:
8519         return r;
8520 }
8521
8522 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8523 {
8524         int idx;
8525
8526         kvm_hv_vcpu_uninit(vcpu);
8527         kvm_pmu_destroy(vcpu);
8528         kfree(vcpu->arch.mce_banks);
8529         kvm_free_lapic(vcpu);
8530         idx = srcu_read_lock(&vcpu->kvm->srcu);
8531         kvm_mmu_destroy(vcpu);
8532         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8533         free_page((unsigned long)vcpu->arch.pio_data);
8534         if (!lapic_in_kernel(vcpu))
8535                 static_key_slow_dec(&kvm_no_apic_vcpu);
8536 }
8537
8538 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8539 {
8540         kvm_x86_ops->sched_in(vcpu, cpu);
8541 }
8542
8543 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8544 {
8545         if (type)
8546                 return -EINVAL;
8547
8548         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8549         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8550         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8551         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8552         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8553
8554         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8555         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8556         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8557         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8558                 &kvm->arch.irq_sources_bitmap);
8559
8560         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8561         mutex_init(&kvm->arch.apic_map_lock);
8562         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8563
8564         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8565         pvclock_update_vm_gtod_copy(kvm);
8566
8567         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8568         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8569
8570         kvm_hv_init_vm(kvm);
8571         kvm_page_track_init(kvm);
8572         kvm_mmu_init_vm(kvm);
8573
8574         if (kvm_x86_ops->vm_init)
8575                 return kvm_x86_ops->vm_init(kvm);
8576
8577         return 0;
8578 }
8579
8580 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8581 {
8582         vcpu_load(vcpu);
8583         kvm_mmu_unload(vcpu);
8584         vcpu_put(vcpu);
8585 }
8586
8587 static void kvm_free_vcpus(struct kvm *kvm)
8588 {
8589         unsigned int i;
8590         struct kvm_vcpu *vcpu;
8591
8592         /*
8593          * Unpin any mmu pages first.
8594          */
8595         kvm_for_each_vcpu(i, vcpu, kvm) {
8596                 kvm_clear_async_pf_completion_queue(vcpu);
8597                 kvm_unload_vcpu_mmu(vcpu);
8598         }
8599         kvm_for_each_vcpu(i, vcpu, kvm)
8600                 kvm_arch_vcpu_free(vcpu);
8601
8602         mutex_lock(&kvm->lock);
8603         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8604                 kvm->vcpus[i] = NULL;
8605
8606         atomic_set(&kvm->online_vcpus, 0);
8607         mutex_unlock(&kvm->lock);
8608 }
8609
8610 void kvm_arch_sync_events(struct kvm *kvm)
8611 {
8612         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8613         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8614         kvm_free_pit(kvm);
8615 }
8616
8617 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8618 {
8619         int i, r;
8620         unsigned long hva;
8621         struct kvm_memslots *slots = kvm_memslots(kvm);
8622         struct kvm_memory_slot *slot, old;
8623
8624         /* Called with kvm->slots_lock held.  */
8625         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8626                 return -EINVAL;
8627
8628         slot = id_to_memslot(slots, id);
8629         if (size) {
8630                 if (slot->npages)
8631                         return -EEXIST;
8632
8633                 /*
8634                  * MAP_SHARED to prevent internal slot pages from being moved
8635                  * by fork()/COW.
8636                  */
8637                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8638                               MAP_SHARED | MAP_ANONYMOUS, 0);
8639                 if (IS_ERR((void *)hva))
8640                         return PTR_ERR((void *)hva);
8641         } else {
8642                 if (!slot->npages)
8643                         return 0;
8644
8645                 hva = 0;
8646         }
8647
8648         old = *slot;
8649         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8650                 struct kvm_userspace_memory_region m;
8651
8652                 m.slot = id | (i << 16);
8653                 m.flags = 0;
8654                 m.guest_phys_addr = gpa;
8655                 m.userspace_addr = hva;
8656                 m.memory_size = size;
8657                 r = __kvm_set_memory_region(kvm, &m);
8658                 if (r < 0)
8659                         return r;
8660         }
8661
8662         if (!size)
8663                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8664
8665         return 0;
8666 }
8667 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8668
8669 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8670 {
8671         int r;
8672
8673         mutex_lock(&kvm->slots_lock);
8674         r = __x86_set_memory_region(kvm, id, gpa, size);
8675         mutex_unlock(&kvm->slots_lock);
8676
8677         return r;
8678 }
8679 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8680
8681 void kvm_arch_destroy_vm(struct kvm *kvm)
8682 {
8683         if (current->mm == kvm->mm) {
8684                 /*
8685                  * Free memory regions allocated on behalf of userspace,
8686                  * unless the the memory map has changed due to process exit
8687                  * or fd copying.
8688                  */
8689                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8690                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8691                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8692         }
8693         if (kvm_x86_ops->vm_destroy)
8694                 kvm_x86_ops->vm_destroy(kvm);
8695         kvm_pic_destroy(kvm);
8696         kvm_ioapic_destroy(kvm);
8697         kvm_free_vcpus(kvm);
8698         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8699         kvm_mmu_uninit_vm(kvm);
8700         kvm_page_track_cleanup(kvm);
8701         kvm_hv_destroy_vm(kvm);
8702 }
8703
8704 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8705                            struct kvm_memory_slot *dont)
8706 {
8707         int i;
8708
8709         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8710                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8711                         kvfree(free->arch.rmap[i]);
8712                         free->arch.rmap[i] = NULL;
8713                 }
8714                 if (i == 0)
8715                         continue;
8716
8717                 if (!dont || free->arch.lpage_info[i - 1] !=
8718                              dont->arch.lpage_info[i - 1]) {
8719                         kvfree(free->arch.lpage_info[i - 1]);
8720                         free->arch.lpage_info[i - 1] = NULL;
8721                 }
8722         }
8723
8724         kvm_page_track_free_memslot(free, dont);
8725 }
8726
8727 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8728                             unsigned long npages)
8729 {
8730         int i;
8731
8732         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8733                 struct kvm_lpage_info *linfo;
8734                 unsigned long ugfn;
8735                 int lpages;
8736                 int level = i + 1;
8737
8738                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8739                                       slot->base_gfn, level) + 1;
8740
8741                 slot->arch.rmap[i] =
8742                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8743                 if (!slot->arch.rmap[i])
8744                         goto out_free;
8745                 if (i == 0)
8746                         continue;
8747
8748                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8749                 if (!linfo)
8750                         goto out_free;
8751
8752                 slot->arch.lpage_info[i - 1] = linfo;
8753
8754                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8755                         linfo[0].disallow_lpage = 1;
8756                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8757                         linfo[lpages - 1].disallow_lpage = 1;
8758                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8759                 /*
8760                  * If the gfn and userspace address are not aligned wrt each
8761                  * other, or if explicitly asked to, disable large page
8762                  * support for this slot
8763                  */
8764                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8765                     !kvm_largepages_enabled()) {
8766                         unsigned long j;
8767
8768                         for (j = 0; j < lpages; ++j)
8769                                 linfo[j].disallow_lpage = 1;
8770                 }
8771         }
8772
8773         if (kvm_page_track_create_memslot(slot, npages))
8774                 goto out_free;
8775
8776         return 0;
8777
8778 out_free:
8779         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8780                 kvfree(slot->arch.rmap[i]);
8781                 slot->arch.rmap[i] = NULL;
8782                 if (i == 0)
8783                         continue;
8784
8785                 kvfree(slot->arch.lpage_info[i - 1]);
8786                 slot->arch.lpage_info[i - 1] = NULL;
8787         }
8788         return -ENOMEM;
8789 }
8790
8791 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8792 {
8793         /*
8794          * memslots->generation has been incremented.
8795          * mmio generation may have reached its maximum value.
8796          */
8797         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8798 }
8799
8800 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8801                                 struct kvm_memory_slot *memslot,
8802                                 const struct kvm_userspace_memory_region *mem,
8803                                 enum kvm_mr_change change)
8804 {
8805         return 0;
8806 }
8807
8808 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8809                                      struct kvm_memory_slot *new)
8810 {
8811         /* Still write protect RO slot */
8812         if (new->flags & KVM_MEM_READONLY) {
8813                 kvm_mmu_slot_remove_write_access(kvm, new);
8814                 return;
8815         }
8816
8817         /*
8818          * Call kvm_x86_ops dirty logging hooks when they are valid.
8819          *
8820          * kvm_x86_ops->slot_disable_log_dirty is called when:
8821          *
8822          *  - KVM_MR_CREATE with dirty logging is disabled
8823          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8824          *
8825          * The reason is, in case of PML, we need to set D-bit for any slots
8826          * with dirty logging disabled in order to eliminate unnecessary GPA
8827          * logging in PML buffer (and potential PML buffer full VMEXT). This
8828          * guarantees leaving PML enabled during guest's lifetime won't have
8829          * any additonal overhead from PML when guest is running with dirty
8830          * logging disabled for memory slots.
8831          *
8832          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8833          * to dirty logging mode.
8834          *
8835          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8836          *
8837          * In case of write protect:
8838          *
8839          * Write protect all pages for dirty logging.
8840          *
8841          * All the sptes including the large sptes which point to this
8842          * slot are set to readonly. We can not create any new large
8843          * spte on this slot until the end of the logging.
8844          *
8845          * See the comments in fast_page_fault().
8846          */
8847         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8848                 if (kvm_x86_ops->slot_enable_log_dirty)
8849                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8850                 else
8851                         kvm_mmu_slot_remove_write_access(kvm, new);
8852         } else {
8853                 if (kvm_x86_ops->slot_disable_log_dirty)
8854                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8855         }
8856 }
8857
8858 void kvm_arch_commit_memory_region(struct kvm *kvm,
8859                                 const struct kvm_userspace_memory_region *mem,
8860                                 const struct kvm_memory_slot *old,
8861                                 const struct kvm_memory_slot *new,
8862                                 enum kvm_mr_change change)
8863 {
8864         int nr_mmu_pages = 0;
8865
8866         if (!kvm->arch.n_requested_mmu_pages)
8867                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8868
8869         if (nr_mmu_pages)
8870                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8871
8872         /*
8873          * Dirty logging tracks sptes in 4k granularity, meaning that large
8874          * sptes have to be split.  If live migration is successful, the guest
8875          * in the source machine will be destroyed and large sptes will be
8876          * created in the destination. However, if the guest continues to run
8877          * in the source machine (for example if live migration fails), small
8878          * sptes will remain around and cause bad performance.
8879          *
8880          * Scan sptes if dirty logging has been stopped, dropping those
8881          * which can be collapsed into a single large-page spte.  Later
8882          * page faults will create the large-page sptes.
8883          */
8884         if ((change != KVM_MR_DELETE) &&
8885                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8886                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8887                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8888
8889         /*
8890          * Set up write protection and/or dirty logging for the new slot.
8891          *
8892          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8893          * been zapped so no dirty logging staff is needed for old slot. For
8894          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8895          * new and it's also covered when dealing with the new slot.
8896          *
8897          * FIXME: const-ify all uses of struct kvm_memory_slot.
8898          */
8899         if (change != KVM_MR_DELETE)
8900                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8901 }
8902
8903 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8904 {
8905         kvm_mmu_invalidate_zap_all_pages(kvm);
8906 }
8907
8908 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8909                                    struct kvm_memory_slot *slot)
8910 {
8911         kvm_page_track_flush_slot(kvm, slot);
8912 }
8913
8914 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8915 {
8916         if (!list_empty_careful(&vcpu->async_pf.done))
8917                 return true;
8918
8919         if (kvm_apic_has_events(vcpu))
8920                 return true;
8921
8922         if (vcpu->arch.pv.pv_unhalted)
8923                 return true;
8924
8925         if (vcpu->arch.exception.pending)
8926                 return true;
8927
8928         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8929             (vcpu->arch.nmi_pending &&
8930              kvm_x86_ops->nmi_allowed(vcpu)))
8931                 return true;
8932
8933         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8934             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8935                 return true;
8936
8937         if (kvm_arch_interrupt_allowed(vcpu) &&
8938             kvm_cpu_has_interrupt(vcpu))
8939                 return true;
8940
8941         if (kvm_hv_has_stimer_pending(vcpu))
8942                 return true;
8943
8944         return false;
8945 }
8946
8947 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8948 {
8949         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8950 }
8951
8952 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
8953 {
8954         return vcpu->arch.preempted_in_kernel;
8955 }
8956
8957 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8958 {
8959         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8960 }
8961
8962 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8963 {
8964         return kvm_x86_ops->interrupt_allowed(vcpu);
8965 }
8966
8967 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8968 {
8969         if (is_64_bit_mode(vcpu))
8970                 return kvm_rip_read(vcpu);
8971         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8972                      kvm_rip_read(vcpu));
8973 }
8974 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8975
8976 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8977 {
8978         return kvm_get_linear_rip(vcpu) == linear_rip;
8979 }
8980 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8981
8982 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8983 {
8984         unsigned long rflags;
8985
8986         rflags = kvm_x86_ops->get_rflags(vcpu);
8987         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8988                 rflags &= ~X86_EFLAGS_TF;
8989         return rflags;
8990 }
8991 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8992
8993 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8994 {
8995         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8996             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8997                 rflags |= X86_EFLAGS_TF;
8998         kvm_x86_ops->set_rflags(vcpu, rflags);
8999 }
9000
9001 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9002 {
9003         __kvm_set_rflags(vcpu, rflags);
9004         kvm_make_request(KVM_REQ_EVENT, vcpu);
9005 }
9006 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9007
9008 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9009 {
9010         int r;
9011
9012         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
9013               work->wakeup_all)
9014                 return;
9015
9016         r = kvm_mmu_reload(vcpu);
9017         if (unlikely(r))
9018                 return;
9019
9020         if (!vcpu->arch.mmu.direct_map &&
9021               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
9022                 return;
9023
9024         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
9025 }
9026
9027 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9028 {
9029         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9030 }
9031
9032 static inline u32 kvm_async_pf_next_probe(u32 key)
9033 {
9034         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9035 }
9036
9037 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9038 {
9039         u32 key = kvm_async_pf_hash_fn(gfn);
9040
9041         while (vcpu->arch.apf.gfns[key] != ~0)
9042                 key = kvm_async_pf_next_probe(key);
9043
9044         vcpu->arch.apf.gfns[key] = gfn;
9045 }
9046
9047 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9048 {
9049         int i;
9050         u32 key = kvm_async_pf_hash_fn(gfn);
9051
9052         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9053                      (vcpu->arch.apf.gfns[key] != gfn &&
9054                       vcpu->arch.apf.gfns[key] != ~0); i++)
9055                 key = kvm_async_pf_next_probe(key);
9056
9057         return key;
9058 }
9059
9060 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9061 {
9062         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9063 }
9064
9065 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9066 {
9067         u32 i, j, k;
9068
9069         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9070         while (true) {
9071                 vcpu->arch.apf.gfns[i] = ~0;
9072                 do {
9073                         j = kvm_async_pf_next_probe(j);
9074                         if (vcpu->arch.apf.gfns[j] == ~0)
9075                                 return;
9076                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9077                         /*
9078                          * k lies cyclically in ]i,j]
9079                          * |    i.k.j |
9080                          * |....j i.k.| or  |.k..j i...|
9081                          */
9082                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9083                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9084                 i = j;
9085         }
9086 }
9087
9088 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9089 {
9090
9091         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9092                                       sizeof(val));
9093 }
9094
9095 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9096 {
9097
9098         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9099                                       sizeof(u32));
9100 }
9101
9102 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9103                                      struct kvm_async_pf *work)
9104 {
9105         struct x86_exception fault;
9106
9107         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9108         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9109
9110         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9111             (vcpu->arch.apf.send_user_only &&
9112              kvm_x86_ops->get_cpl(vcpu) == 0))
9113                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9114         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9115                 fault.vector = PF_VECTOR;
9116                 fault.error_code_valid = true;
9117                 fault.error_code = 0;
9118                 fault.nested_page_fault = false;
9119                 fault.address = work->arch.token;
9120                 fault.async_page_fault = true;
9121                 kvm_inject_page_fault(vcpu, &fault);
9122         }
9123 }
9124
9125 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9126                                  struct kvm_async_pf *work)
9127 {
9128         struct x86_exception fault;
9129         u32 val;
9130
9131         if (work->wakeup_all)
9132                 work->arch.token = ~0; /* broadcast wakeup */
9133         else
9134                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9135         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9136
9137         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9138             !apf_get_user(vcpu, &val)) {
9139                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9140                     vcpu->arch.exception.pending &&
9141                     vcpu->arch.exception.nr == PF_VECTOR &&
9142                     !apf_put_user(vcpu, 0)) {
9143                         vcpu->arch.exception.injected = false;
9144                         vcpu->arch.exception.pending = false;
9145                         vcpu->arch.exception.nr = 0;
9146                         vcpu->arch.exception.has_error_code = false;
9147                         vcpu->arch.exception.error_code = 0;
9148                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9149                         fault.vector = PF_VECTOR;
9150                         fault.error_code_valid = true;
9151                         fault.error_code = 0;
9152                         fault.nested_page_fault = false;
9153                         fault.address = work->arch.token;
9154                         fault.async_page_fault = true;
9155                         kvm_inject_page_fault(vcpu, &fault);
9156                 }
9157         }
9158         vcpu->arch.apf.halted = false;
9159         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9160 }
9161
9162 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9163 {
9164         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9165                 return true;
9166         else
9167                 return kvm_can_do_async_pf(vcpu);
9168 }
9169
9170 void kvm_arch_start_assignment(struct kvm *kvm)
9171 {
9172         atomic_inc(&kvm->arch.assigned_device_count);
9173 }
9174 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9175
9176 void kvm_arch_end_assignment(struct kvm *kvm)
9177 {
9178         atomic_dec(&kvm->arch.assigned_device_count);
9179 }
9180 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9181
9182 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9183 {
9184         return atomic_read(&kvm->arch.assigned_device_count);
9185 }
9186 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9187
9188 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9189 {
9190         atomic_inc(&kvm->arch.noncoherent_dma_count);
9191 }
9192 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9193
9194 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9195 {
9196         atomic_dec(&kvm->arch.noncoherent_dma_count);
9197 }
9198 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9199
9200 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9201 {
9202         return atomic_read(&kvm->arch.noncoherent_dma_count);
9203 }
9204 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9205
9206 bool kvm_arch_has_irq_bypass(void)
9207 {
9208         return kvm_x86_ops->update_pi_irte != NULL;
9209 }
9210
9211 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9212                                       struct irq_bypass_producer *prod)
9213 {
9214         struct kvm_kernel_irqfd *irqfd =
9215                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9216
9217         irqfd->producer = prod;
9218
9219         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9220                                            prod->irq, irqfd->gsi, 1);
9221 }
9222
9223 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9224                                       struct irq_bypass_producer *prod)
9225 {
9226         int ret;
9227         struct kvm_kernel_irqfd *irqfd =
9228                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9229
9230         WARN_ON(irqfd->producer != prod);
9231         irqfd->producer = NULL;
9232
9233         /*
9234          * When producer of consumer is unregistered, we change back to
9235          * remapped mode, so we can re-use the current implementation
9236          * when the irq is masked/disabled or the consumer side (KVM
9237          * int this case doesn't want to receive the interrupts.
9238         */
9239         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9240         if (ret)
9241                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9242                        " fails: %d\n", irqfd->consumer.token, ret);
9243 }
9244
9245 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9246                                    uint32_t guest_irq, bool set)
9247 {
9248         if (!kvm_x86_ops->update_pi_irte)
9249                 return -EINVAL;
9250
9251         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9252 }
9253
9254 bool kvm_vector_hashing_enabled(void)
9255 {
9256         return vector_hashing;
9257 }
9258 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9259
9260 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9261 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9262 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9263 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9264 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9265 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9266 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9267 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9268 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9269 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9270 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9271 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9272 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9273 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9274 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9275 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9276 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9277 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9278 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);