arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/mem_encrypt.h>
  55
  56 #include <trace/events/kvm.h>
  57
  58 #include <asm/debugreg.h>
  59 #include <asm/msr.h>
  60 #include <asm/desc.h>
  61 #include <asm/mce.h>
  62 #include <linux/kernel_stat.h>
  63 #include <asm/fpu/internal.h> /* Ugh! */
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66 #include <asm/irq_remapping.h>
  67 #include <asm/mshyperv.h>
  68 #include <asm/hypervisor.h>
  69 #include <asm/intel_pt.h>
  70 #include <clocksource/hyperv_timer.h>
  71
  72 #define CREATE_TRACE_POINTS
  73 #include "trace.h"
  74
  75 #define MAX_IO_MSRS 256
  76 #define KVM_MAX_MCE_BANKS 32
  77 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  78 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  79
  80 #define emul_to_vcpu(ctxt) \
  81         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  82
  83 /* EFER defaults:
  84  * - enable syscall per default because its emulated by KVM
  85  * - enable LME and LMA per default on 64 bit KVM
  86  */
  87 #ifdef CONFIG_X86_64
  88 static
  89 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  90 #else
  91 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  92 #endif
  93
  94 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  95 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  96
  97 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  98                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  99
 100 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 101 static void process_nmi(struct kvm_vcpu *vcpu);
 102 static void enter_smm(struct kvm_vcpu *vcpu);
 103 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 104 static void store_regs(struct kvm_vcpu *vcpu);
 105 static int sync_regs(struct kvm_vcpu *vcpu);
 106
 107 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 108 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 109
 110 static bool __read_mostly ignore_msrs = 0;
 111 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 112
 113 static bool __read_mostly report_ignored_msrs = true;
 114 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 115
 116 unsigned int min_timer_period_us = 200;
 117 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 118
 119 static bool __read_mostly kvmclock_periodic_sync = true;
 120 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 121
 122 bool __read_mostly kvm_has_tsc_control;
 123 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 124 u32  __read_mostly kvm_max_guest_tsc_khz;
 125 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 126 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 127 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 128 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 129 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 130 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 131 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 132
 133 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 134 static u32 __read_mostly tsc_tolerance_ppm = 250;
 135 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 136
 137 /*
 138  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 139  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 140  * advancement entirely.  Any other value is used as-is and disables adaptive
 141  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 142  */
 143 static int __read_mostly lapic_timer_advance_ns = -1;
 144 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 145
 146 static bool __read_mostly vector_hashing = true;
 147 module_param(vector_hashing, bool, S_IRUGO);
 148
 149 bool __read_mostly enable_vmware_backdoor = false;
 150 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 151 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 152
 153 static bool __read_mostly force_emulation_prefix = false;
 154 module_param(force_emulation_prefix, bool, S_IRUGO);
 155
 156 #define KVM_NR_SHARED_MSRS 16
 157
 158 struct kvm_shared_msrs_global {
 159         int nr;
 160         u32 msrs[KVM_NR_SHARED_MSRS];
 161 };
 162
 163 struct kvm_shared_msrs {
 164         struct user_return_notifier urn;
 165         bool registered;
 166         struct kvm_shared_msr_values {
 167                 u64 host;
 168                 u64 curr;
 169         } values[KVM_NR_SHARED_MSRS];
 170 };
 171
 172 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 173 static struct kvm_shared_msrs __percpu *shared_msrs;
 174
 175 struct kvm_stats_debugfs_item debugfs_entries[] = {
 176         { "pf_fixed", VCPU_STAT(pf_fixed) },
 177         { "pf_guest", VCPU_STAT(pf_guest) },
 178         { "tlb_flush", VCPU_STAT(tlb_flush) },
 179         { "invlpg", VCPU_STAT(invlpg) },
 180         { "exits", VCPU_STAT(exits) },
 181         { "io_exits", VCPU_STAT(io_exits) },
 182         { "mmio_exits", VCPU_STAT(mmio_exits) },
 183         { "signal_exits", VCPU_STAT(signal_exits) },
 184         { "irq_window", VCPU_STAT(irq_window_exits) },
 185         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 186         { "halt_exits", VCPU_STAT(halt_exits) },
 187         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 188         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 189         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 190         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 191         { "hypercalls", VCPU_STAT(hypercalls) },
 192         { "request_irq", VCPU_STAT(request_irq_exits) },
 193         { "irq_exits", VCPU_STAT(irq_exits) },
 194         { "host_state_reload", VCPU_STAT(host_state_reload) },
 195         { "fpu_reload", VCPU_STAT(fpu_reload) },
 196         { "insn_emulation", VCPU_STAT(insn_emulation) },
 197         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 198         { "irq_injections", VCPU_STAT(irq_injections) },
 199         { "nmi_injections", VCPU_STAT(nmi_injections) },
 200         { "req_event", VCPU_STAT(req_event) },
 201         { "l1d_flush", VCPU_STAT(l1d_flush) },
 202         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 203         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 204         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 205         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 206         { "mmu_flooded", VM_STAT(mmu_flooded) },
 207         { "mmu_recycled", VM_STAT(mmu_recycled) },
 208         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 209         { "mmu_unsync", VM_STAT(mmu_unsync) },
 210         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 211         { "largepages", VM_STAT(lpages) },
 212         { "max_mmu_page_hash_collisions",
 213                 VM_STAT(max_mmu_page_hash_collisions) },
 214         { NULL }
 215 };
 216
 217 u64 __read_mostly host_xcr0;
 218
 219 struct kmem_cache *x86_fpu_cache;
 220 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 221
 222 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 223
 224 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 225 {
 226         int i;
 227         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 228                 vcpu->arch.apf.gfns[i] = ~0;
 229 }
 230
 231 static void kvm_on_user_return(struct user_return_notifier *urn)
 232 {
 233         unsigned slot;
 234         struct kvm_shared_msrs *locals
 235                 = container_of(urn, struct kvm_shared_msrs, urn);
 236         struct kvm_shared_msr_values *values;
 237         unsigned long flags;
 238
 239         /*
 240          * Disabling irqs at this point since the following code could be
 241          * interrupted and executed through kvm_arch_hardware_disable()
 242          */
 243         local_irq_save(flags);
 244         if (locals->registered) {
 245                 locals->registered = false;
 246                 user_return_notifier_unregister(urn);
 247         }
 248         local_irq_restore(flags);
 249         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 250                 values = &locals->values[slot];
 251                 if (values->host != values->curr) {
 252                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 253                         values->curr = values->host;
 254                 }
 255         }
 256 }
 257
 258 static void shared_msr_update(unsigned slot, u32 msr)
 259 {
 260         u64 value;
 261         unsigned int cpu = smp_processor_id();
 262         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 263
 264         /* only read, and nobody should modify it at this time,
 265          * so don't need lock */
 266         if (slot >= shared_msrs_global.nr) {
 267                 printk(KERN_ERR "kvm: invalid MSR slot!");
 268                 return;
 269         }
 270         rdmsrl_safe(msr, &value);
 271         smsr->values[slot].host = value;
 272         smsr->values[slot].curr = value;
 273 }
 274
 275 void kvm_define_shared_msr(unsigned slot, u32 msr)
 276 {
 277         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 278         shared_msrs_global.msrs[slot] = msr;
 279         if (slot >= shared_msrs_global.nr)
 280                 shared_msrs_global.nr = slot + 1;
 281 }
 282 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 283
 284 static void kvm_shared_msr_cpu_online(void)
 285 {
 286         unsigned i;
 287
 288         for (i = 0; i < shared_msrs_global.nr; ++i)
 289                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 290 }
 291
 292 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 293 {
 294         unsigned int cpu = smp_processor_id();
 295         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 296         int err;
 297
 298         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 299                 return 0;
 300         smsr->values[slot].curr = value;
 301         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 302         if (err)
 303                 return 1;
 304
 305         if (!smsr->registered) {
 306                 smsr->urn.on_user_return = kvm_on_user_return;
 307                 user_return_notifier_register(&smsr->urn);
 308                 smsr->registered = true;
 309         }
 310         return 0;
 311 }
 312 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 313
 314 static void drop_user_return_notifiers(void)
 315 {
 316         unsigned int cpu = smp_processor_id();
 317         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 318
 319         if (smsr->registered)
 320                 kvm_on_user_return(&smsr->urn);
 321 }
 322
 323 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 324 {
 325         return vcpu->arch.apic_base;
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 328
 329 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 330 {
 331         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 334
 335 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 336 {
 337         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 338         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 339         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 340                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 341
 342         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 343                 return 1;
 344         if (!msr_info->host_initiated) {
 345                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 346                         return 1;
 347                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 348                         return 1;
 349         }
 350
 351         kvm_lapic_set_base(vcpu, msr_info->data);
 352         return 0;
 353 }
 354 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 355
 356 asmlinkage __visible void kvm_spurious_fault(void)
 357 {
 358         /* Fault while not rebooting.  We want the trace. */
 359         BUG();
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 362
 363 #define EXCPT_BENIGN            0
 364 #define EXCPT_CONTRIBUTORY      1
 365 #define EXCPT_PF                2
 366
 367 static int exception_class(int vector)
 368 {
 369         switch (vector) {
 370         case PF_VECTOR:
 371                 return EXCPT_PF;
 372         case DE_VECTOR:
 373         case TS_VECTOR:
 374         case NP_VECTOR:
 375         case SS_VECTOR:
 376         case GP_VECTOR:
 377                 return EXCPT_CONTRIBUTORY;
 378         default:
 379                 break;
 380         }
 381         return EXCPT_BENIGN;
 382 }
 383
 384 #define EXCPT_FAULT             0
 385 #define EXCPT_TRAP              1
 386 #define EXCPT_ABORT             2
 387 #define EXCPT_INTERRUPT         3
 388
 389 static int exception_type(int vector)
 390 {
 391         unsigned int mask;
 392
 393         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 394                 return EXCPT_INTERRUPT;
 395
 396         mask = 1 << vector;
 397
 398         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 399         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 400                 return EXCPT_TRAP;
 401
 402         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 403                 return EXCPT_ABORT;
 404
 405         /* Reserved exceptions will result in fault */
 406         return EXCPT_FAULT;
 407 }
 408
 409 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 410 {
 411         unsigned nr = vcpu->arch.exception.nr;
 412         bool has_payload = vcpu->arch.exception.has_payload;
 413         unsigned long payload = vcpu->arch.exception.payload;
 414
 415         if (!has_payload)
 416                 return;
 417
 418         switch (nr) {
 419         case DB_VECTOR:
 420                 /*
 421                  * "Certain debug exceptions may clear bit 0-3.  The
 422                  * remaining contents of the DR6 register are never
 423                  * cleared by the processor".
 424                  */
 425                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 426                 /*
 427                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 428                  */
 429                 vcpu->arch.dr6 |= DR6_RTM;
 430                 vcpu->arch.dr6 |= payload;
 431                 /*
 432                  * Bit 16 should be set in the payload whenever the #DB
 433                  * exception should clear DR6.RTM. This makes the payload
 434                  * compatible with the pending debug exceptions under VMX.
 435                  * Though not currently documented in the SDM, this also
 436                  * makes the payload compatible with the exit qualification
 437                  * for #DB exceptions under VMX.
 438                  */
 439                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 440                 break;
 441         case PF_VECTOR:
 442                 vcpu->arch.cr2 = payload;
 443                 break;
 444         }
 445
 446         vcpu->arch.exception.has_payload = false;
 447         vcpu->arch.exception.payload = 0;
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 450
 451 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 452                 unsigned nr, bool has_error, u32 error_code,
 453                 bool has_payload, unsigned long payload, bool reinject)
 454 {
 455         u32 prev_nr;
 456         int class1, class2;
 457
 458         kvm_make_request(KVM_REQ_EVENT, vcpu);
 459
 460         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 461         queue:
 462                 if (has_error && !is_protmode(vcpu))
 463                         has_error = false;
 464                 if (reinject) {
 465                         /*
 466                          * On vmentry, vcpu->arch.exception.pending is only
 467                          * true if an event injection was blocked by
 468                          * nested_run_pending.  In that case, however,
 469                          * vcpu_enter_guest requests an immediate exit,
 470                          * and the guest shouldn't proceed far enough to
 471                          * need reinjection.
 472                          */
 473                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 474                         vcpu->arch.exception.injected = true;
 475                         if (WARN_ON_ONCE(has_payload)) {
 476                                 /*
 477                                  * A reinjected event has already
 478                                  * delivered its payload.
 479                                  */
 480                                 has_payload = false;
 481                                 payload = 0;
 482                         }
 483                 } else {
 484                         vcpu->arch.exception.pending = true;
 485                         vcpu->arch.exception.injected = false;
 486                 }
 487                 vcpu->arch.exception.has_error_code = has_error;
 488                 vcpu->arch.exception.nr = nr;
 489                 vcpu->arch.exception.error_code = error_code;
 490                 vcpu->arch.exception.has_payload = has_payload;
 491                 vcpu->arch.exception.payload = payload;
 492                 /*
 493                  * In guest mode, payload delivery should be deferred,
 494                  * so that the L1 hypervisor can intercept #PF before
 495                  * CR2 is modified (or intercept #DB before DR6 is
 496                  * modified under nVMX).  However, for ABI
 497                  * compatibility with KVM_GET_VCPU_EVENTS and
 498                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 499                  * delivery unless userspace has enabled this
 500                  * functionality via the per-VM capability,
 501                  * KVM_CAP_EXCEPTION_PAYLOAD.
 502                  */
 503                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 504                     !is_guest_mode(vcpu))
 505                         kvm_deliver_exception_payload(vcpu);
 506                 return;
 507         }
 508
 509         /* to check exception */
 510         prev_nr = vcpu->arch.exception.nr;
 511         if (prev_nr == DF_VECTOR) {
 512                 /* triple fault -> shutdown */
 513                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 514                 return;
 515         }
 516         class1 = exception_class(prev_nr);
 517         class2 = exception_class(nr);
 518         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 519                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 520                 /*
 521                  * Generate double fault per SDM Table 5-5.  Set
 522                  * exception.pending = true so that the double fault
 523                  * can trigger a nested vmexit.
 524                  */
 525                 vcpu->arch.exception.pending = true;
 526                 vcpu->arch.exception.injected = false;
 527                 vcpu->arch.exception.has_error_code = true;
 528                 vcpu->arch.exception.nr = DF_VECTOR;
 529                 vcpu->arch.exception.error_code = 0;
 530                 vcpu->arch.exception.has_payload = false;
 531                 vcpu->arch.exception.payload = 0;
 532         } else
 533                 /* replace previous exception with a new one in a hope
 534                    that instruction re-execution will regenerate lost
 535                    exception */
 536                 goto queue;
 537 }
 538
 539 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 540 {
 541         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 544
 545 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 546 {
 547         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 548 }
 549 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 550
 551 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 552                                   unsigned long payload)
 553 {
 554         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 555 }
 556
 557 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 558                                     u32 error_code, unsigned long payload)
 559 {
 560         kvm_multiple_exception(vcpu, nr, true, error_code,
 561                                true, payload, false);
 562 }
 563
 564 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 565 {
 566         if (err)
 567                 kvm_inject_gp(vcpu, 0);
 568         else
 569                 return kvm_skip_emulated_instruction(vcpu);
 570
 571         return 1;
 572 }
 573 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 574
 575 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 576 {
 577         ++vcpu->stat.pf_guest;
 578         vcpu->arch.exception.nested_apf =
 579                 is_guest_mode(vcpu) && fault->async_page_fault;
 580         if (vcpu->arch.exception.nested_apf) {
 581                 vcpu->arch.apf.nested_apf_token = fault->address;
 582                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 583         } else {
 584                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 585                                         fault->address);
 586         }
 587 }
 588 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 589
 590 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 591 {
 592         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 593                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 594         else
 595                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 596
 597         return fault->nested_page_fault;
 598 }
 599
 600 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 601 {
 602         atomic_inc(&vcpu->arch.nmi_queued);
 603         kvm_make_request(KVM_REQ_NMI, vcpu);
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 606
 607 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 608 {
 609         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 610 }
 611 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 612
 613 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 614 {
 615         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 618
 619 /*
 620  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 621  * a #GP and return false.
 622  */
 623 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 624 {
 625         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 626                 return true;
 627         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 628         return false;
 629 }
 630 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 631
 632 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 633 {
 634         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 635                 return true;
 636
 637         kvm_queue_exception(vcpu, UD_VECTOR);
 638         return false;
 639 }
 640 EXPORT_SYMBOL_GPL(kvm_require_dr);
 641
 642 /*
 643  * This function will be used to read from the physical memory of the currently
 644  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 645  * can read from guest physical or from the guest's guest physical memory.
 646  */
 647 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 648                             gfn_t ngfn, void *data, int offset, int len,
 649                             u32 access)
 650 {
 651         struct x86_exception exception;
 652         gfn_t real_gfn;
 653         gpa_t ngpa;
 654
 655         ngpa     = gfn_to_gpa(ngfn);
 656         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 657         if (real_gfn == UNMAPPED_GVA)
 658                 return -EFAULT;
 659
 660         real_gfn = gpa_to_gfn(real_gfn);
 661
 662         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 663 }
 664 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 665
 666 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 667                                void *data, int offset, int len, u32 access)
 668 {
 669         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 670                                        data, offset, len, access);
 671 }
 672
 673 /*
 674  * Load the pae pdptrs.  Return true is they are all valid.
 675  */
 676 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 677 {
 678         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 679         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 680         int i;
 681         int ret;
 682         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 683
 684         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 685                                       offset * sizeof(u64), sizeof(pdpte),
 686                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 687         if (ret < 0) {
 688                 ret = 0;
 689                 goto out;
 690         }
 691         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 692                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 693                     (pdpte[i] &
 694                      vcpu->arch.mmu->guest_rsvd_check.rsvd_bits_mask[0][2])) {
 695                         ret = 0;
 696                         goto out;
 697                 }
 698         }
 699         ret = 1;
 700
 701         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 702         __set_bit(VCPU_EXREG_PDPTR,
 703                   (unsigned long *)&vcpu->arch.regs_avail);
 704         __set_bit(VCPU_EXREG_PDPTR,
 705                   (unsigned long *)&vcpu->arch.regs_dirty);
 706 out:
 707
 708         return ret;
 709 }
 710 EXPORT_SYMBOL_GPL(load_pdptrs);
 711
 712 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 713 {
 714         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 715         bool changed = true;
 716         int offset;
 717         gfn_t gfn;
 718         int r;
 719
 720         if (!is_pae_paging(vcpu))
 721                 return false;
 722
 723         if (!test_bit(VCPU_EXREG_PDPTR,
 724                       (unsigned long *)&vcpu->arch.regs_avail))
 725                 return true;
 726
 727         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 728         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 729         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 730                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 731         if (r < 0)
 732                 goto out;
 733         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 734 out:
 735
 736         return changed;
 737 }
 738 EXPORT_SYMBOL_GPL(pdptrs_changed);
 739
 740 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 741 {
 742         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 743         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 744
 745         cr0 |= X86_CR0_ET;
 746
 747 #ifdef CONFIG_X86_64
 748         if (cr0 & 0xffffffff00000000UL)
 749                 return 1;
 750 #endif
 751
 752         cr0 &= ~CR0_RESERVED_BITS;
 753
 754         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 755                 return 1;
 756
 757         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 758                 return 1;
 759
 760         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 761 #ifdef CONFIG_X86_64
 762                 if ((vcpu->arch.efer & EFER_LME)) {
 763                         int cs_db, cs_l;
 764
 765                         if (!is_pae(vcpu))
 766                                 return 1;
 767                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 768                         if (cs_l)
 769                                 return 1;
 770                 } else
 771 #endif
 772                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 773                                                  kvm_read_cr3(vcpu)))
 774                         return 1;
 775         }
 776
 777         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 778                 return 1;
 779
 780         kvm_x86_ops->set_cr0(vcpu, cr0);
 781
 782         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 783                 kvm_clear_async_pf_completion_queue(vcpu);
 784                 kvm_async_pf_hash_reset(vcpu);
 785         }
 786
 787         if ((cr0 ^ old_cr0) & update_bits)
 788                 kvm_mmu_reset_context(vcpu);
 789
 790         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 791             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 792             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 793                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 794
 795         return 0;
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 798
 799 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 800 {
 801         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 802 }
 803 EXPORT_SYMBOL_GPL(kvm_lmsw);
 804
 805 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 806 {
 807         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 808                         !vcpu->guest_xcr0_loaded) {
 809                 /* kvm_set_xcr() also depends on this */
 810                 if (vcpu->arch.xcr0 != host_xcr0)
 811                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 812                 vcpu->guest_xcr0_loaded = 1;
 813         }
 814 }
 815 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 816
 817 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 818 {
 819         if (vcpu->guest_xcr0_loaded) {
 820                 if (vcpu->arch.xcr0 != host_xcr0)
 821                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 822                 vcpu->guest_xcr0_loaded = 0;
 823         }
 824 }
 825 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 826
 827 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 828 {
 829         u64 xcr0 = xcr;
 830         u64 old_xcr0 = vcpu->arch.xcr0;
 831         u64 valid_bits;
 832
 833         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 834         if (index != XCR_XFEATURE_ENABLED_MASK)
 835                 return 1;
 836         if (!(xcr0 & XFEATURE_MASK_FP))
 837                 return 1;
 838         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 839                 return 1;
 840
 841         /*
 842          * Do not allow the guest to set bits that we do not support
 843          * saving.  However, xcr0 bit 0 is always set, even if the
 844          * emulated CPU does not support XSAVE (see fx_init).
 845          */
 846         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 847         if (xcr0 & ~valid_bits)
 848                 return 1;
 849
 850         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 851             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 852                 return 1;
 853
 854         if (xcr0 & XFEATURE_MASK_AVX512) {
 855                 if (!(xcr0 & XFEATURE_MASK_YMM))
 856                         return 1;
 857                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 858                         return 1;
 859         }
 860         vcpu->arch.xcr0 = xcr0;
 861
 862         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 863                 kvm_update_cpuid(vcpu);
 864         return 0;
 865 }
 866
 867 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 868 {
 869         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 870             __kvm_set_xcr(vcpu, index, xcr)) {
 871                 kvm_inject_gp(vcpu, 0);
 872                 return 1;
 873         }
 874         return 0;
 875 }
 876 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 877
 878 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 879 {
 880         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 881         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 882                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 883
 884         if (cr4 & CR4_RESERVED_BITS)
 885                 return 1;
 886
 887         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 888                 return 1;
 889
 890         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 891                 return 1;
 892
 893         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 894                 return 1;
 895
 896         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 897                 return 1;
 898
 899         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 900                 return 1;
 901
 902         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 903                 return 1;
 904
 905         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 906                 return 1;
 907
 908         if (is_long_mode(vcpu)) {
 909                 if (!(cr4 & X86_CR4_PAE))
 910                         return 1;
 911         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 912                    && ((cr4 ^ old_cr4) & pdptr_bits)
 913                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 914                                    kvm_read_cr3(vcpu)))
 915                 return 1;
 916
 917         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 918                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 919                         return 1;
 920
 921                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 922                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 923                         return 1;
 924         }
 925
 926         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 927                 return 1;
 928
 929         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 930             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 931                 kvm_mmu_reset_context(vcpu);
 932
 933         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 934                 kvm_update_cpuid(vcpu);
 935
 936         return 0;
 937 }
 938 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 939
 940 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 941 {
 942         bool skip_tlb_flush = false;
 943 #ifdef CONFIG_X86_64
 944         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 945
 946         if (pcid_enabled) {
 947                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 948                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 949         }
 950 #endif
 951
 952         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 953                 if (!skip_tlb_flush) {
 954                         kvm_mmu_sync_roots(vcpu);
 955                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 956                 }
 957                 return 0;
 958         }
 959
 960         if (is_long_mode(vcpu) &&
 961             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 962                 return 1;
 963         else if (is_pae_paging(vcpu) &&
 964                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 965                 return 1;
 966
 967         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 968         vcpu->arch.cr3 = cr3;
 969         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 970
 971         return 0;
 972 }
 973 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 974
 975 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 976 {
 977         if (cr8 & CR8_RESERVED_BITS)
 978                 return 1;
 979         if (lapic_in_kernel(vcpu))
 980                 kvm_lapic_set_tpr(vcpu, cr8);
 981         else
 982                 vcpu->arch.cr8 = cr8;
 983         return 0;
 984 }
 985 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 986
 987 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 988 {
 989         if (lapic_in_kernel(vcpu))
 990                 return kvm_lapic_get_cr8(vcpu);
 991         else
 992                 return vcpu->arch.cr8;
 993 }
 994 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 995
 996 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 997 {
 998         int i;
 999
1000         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1001                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1002                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1003                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1004         }
1005 }
1006
1007 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1008 {
1009         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1010                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1011 }
1012
1013 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1014 {
1015         unsigned long dr7;
1016
1017         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1018                 dr7 = vcpu->arch.guest_debug_dr7;
1019         else
1020                 dr7 = vcpu->arch.dr7;
1021         kvm_x86_ops->set_dr7(vcpu, dr7);
1022         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1023         if (dr7 & DR7_BP_EN_MASK)
1024                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1025 }
1026
1027 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1028 {
1029         u64 fixed = DR6_FIXED_1;
1030
1031         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1032                 fixed |= DR6_RTM;
1033         return fixed;
1034 }
1035
1036 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1037 {
1038         switch (dr) {
1039         case 0 ... 3:
1040                 vcpu->arch.db[dr] = val;
1041                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1042                         vcpu->arch.eff_db[dr] = val;
1043                 break;
1044         case 4:
1045                 /* fall through */
1046         case 6:
1047                 if (val & 0xffffffff00000000ULL)
1048                         return -1; /* #GP */
1049                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1050                 kvm_update_dr6(vcpu);
1051                 break;
1052         case 5:
1053                 /* fall through */
1054         default: /* 7 */
1055                 if (val & 0xffffffff00000000ULL)
1056                         return -1; /* #GP */
1057                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1058                 kvm_update_dr7(vcpu);
1059                 break;
1060         }
1061
1062         return 0;
1063 }
1064
1065 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1066 {
1067         if (__kvm_set_dr(vcpu, dr, val)) {
1068                 kvm_inject_gp(vcpu, 0);
1069                 return 1;
1070         }
1071         return 0;
1072 }
1073 EXPORT_SYMBOL_GPL(kvm_set_dr);
1074
1075 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1076 {
1077         switch (dr) {
1078         case 0 ... 3:
1079                 *val = vcpu->arch.db[dr];
1080                 break;
1081         case 4:
1082                 /* fall through */
1083         case 6:
1084                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1085                         *val = vcpu->arch.dr6;
1086                 else
1087                         *val = kvm_x86_ops->get_dr6(vcpu);
1088                 break;
1089         case 5:
1090                 /* fall through */
1091         default: /* 7 */
1092                 *val = vcpu->arch.dr7;
1093                 break;
1094         }
1095         return 0;
1096 }
1097 EXPORT_SYMBOL_GPL(kvm_get_dr);
1098
1099 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1100 {
1101         u32 ecx = kvm_rcx_read(vcpu);
1102         u64 data;
1103         int err;
1104
1105         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1106         if (err)
1107                 return err;
1108         kvm_rax_write(vcpu, (u32)data);
1109         kvm_rdx_write(vcpu, data >> 32);
1110         return err;
1111 }
1112 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1113
1114 /*
1115  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1116  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1117  *
1118  * This list is modified at module load time to reflect the
1119  * capabilities of the host cpu. This capabilities test skips MSRs that are
1120  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1121  * may depend on host virtualization features rather than host cpu features.
1122  */
1123
1124 static u32 msrs_to_save[] = {
1125         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1126         MSR_STAR,
1127 #ifdef CONFIG_X86_64
1128         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1129 #endif
1130         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1131         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1132         MSR_IA32_SPEC_CTRL,
1133         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1134         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1135         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1136         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1137         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1138         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1139 };
1140
1141 static unsigned num_msrs_to_save;
1142
1143 static u32 emulated_msrs[] = {
1144         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1145         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1146         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1147         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1148         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1149         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1150         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1151         HV_X64_MSR_RESET,
1152         HV_X64_MSR_VP_INDEX,
1153         HV_X64_MSR_VP_RUNTIME,
1154         HV_X64_MSR_SCONTROL,
1155         HV_X64_MSR_STIMER0_CONFIG,
1156         HV_X64_MSR_VP_ASSIST_PAGE,
1157         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1158         HV_X64_MSR_TSC_EMULATION_STATUS,
1159
1160         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1161         MSR_KVM_PV_EOI_EN,
1162
1163         MSR_IA32_TSC_ADJUST,
1164         MSR_IA32_TSCDEADLINE,
1165         MSR_IA32_ARCH_CAPABILITIES,
1166         MSR_IA32_MISC_ENABLE,
1167         MSR_IA32_MCG_STATUS,
1168         MSR_IA32_MCG_CTL,
1169         MSR_IA32_MCG_EXT_CTL,
1170         MSR_IA32_SMBASE,
1171         MSR_SMI_COUNT,
1172         MSR_PLATFORM_INFO,
1173         MSR_MISC_FEATURES_ENABLES,
1174         MSR_AMD64_VIRT_SPEC_CTRL,
1175         MSR_IA32_POWER_CTL,
1176
1177         /*
1178          * The following list leaves out MSRs whose values are determined
1179          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1180          * We always support the "true" VMX control MSRs, even if the host
1181          * processor does not, so I am putting these registers here rather
1182          * than in msrs_to_save.
1183          */
1184         MSR_IA32_VMX_BASIC,
1185         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1186         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1187         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1188         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1189         MSR_IA32_VMX_MISC,
1190         MSR_IA32_VMX_CR0_FIXED0,
1191         MSR_IA32_VMX_CR4_FIXED0,
1192         MSR_IA32_VMX_VMCS_ENUM,
1193         MSR_IA32_VMX_PROCBASED_CTLS2,
1194         MSR_IA32_VMX_EPT_VPID_CAP,
1195         MSR_IA32_VMX_VMFUNC,
1196
1197         MSR_K7_HWCR,
1198         MSR_KVM_POLL_CONTROL,
1199 };
1200
1201 static unsigned num_emulated_msrs;
1202
1203 /*
1204  * List of msr numbers which are used to expose MSR-based features that
1205  * can be used by a hypervisor to validate requested CPU features.
1206  */
1207 static u32 msr_based_features[] = {
1208         MSR_IA32_VMX_BASIC,
1209         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1210         MSR_IA32_VMX_PINBASED_CTLS,
1211         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1212         MSR_IA32_VMX_PROCBASED_CTLS,
1213         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1214         MSR_IA32_VMX_EXIT_CTLS,
1215         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1216         MSR_IA32_VMX_ENTRY_CTLS,
1217         MSR_IA32_VMX_MISC,
1218         MSR_IA32_VMX_CR0_FIXED0,
1219         MSR_IA32_VMX_CR0_FIXED1,
1220         MSR_IA32_VMX_CR4_FIXED0,
1221         MSR_IA32_VMX_CR4_FIXED1,
1222         MSR_IA32_VMX_VMCS_ENUM,
1223         MSR_IA32_VMX_PROCBASED_CTLS2,
1224         MSR_IA32_VMX_EPT_VPID_CAP,
1225         MSR_IA32_VMX_VMFUNC,
1226
1227         MSR_F10H_DECFG,
1228         MSR_IA32_UCODE_REV,
1229         MSR_IA32_ARCH_CAPABILITIES,
1230 };
1231
1232 static unsigned int num_msr_based_features;
1233
1234 static u64 kvm_get_arch_capabilities(void)
1235 {
1236         u64 data = 0;
1237
1238         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1239                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1240
1241         /*
1242          * If we're doing cache flushes (either "always" or "cond")
1243          * we will do one whenever the guest does a vmlaunch/vmresume.
1244          * If an outer hypervisor is doing the cache flush for us
1245          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1246          * capability to the guest too, and if EPT is disabled we're not
1247          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1248          * require a nested hypervisor to do a flush of its own.
1249          */
1250         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1251                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1252
1253         return data;
1254 }
1255
1256 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1257 {
1258         switch (msr->index) {
1259         case MSR_IA32_ARCH_CAPABILITIES:
1260                 msr->data = kvm_get_arch_capabilities();
1261                 break;
1262         case MSR_IA32_UCODE_REV:
1263                 rdmsrl_safe(msr->index, &msr->data);
1264                 break;
1265         default:
1266                 if (kvm_x86_ops->get_msr_feature(msr))
1267                         return 1;
1268         }
1269         return 0;
1270 }
1271
1272 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1273 {
1274         struct kvm_msr_entry msr;
1275         int r;
1276
1277         msr.index = index;
1278         r = kvm_get_msr_feature(&msr);
1279         if (r)
1280                 return r;
1281
1282         *data = msr.data;
1283
1284         return 0;
1285 }
1286
1287 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1288 {
1289         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1290                 return false;
1291
1292         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1293                 return false;
1294
1295         if (efer & (EFER_LME | EFER_LMA) &&
1296             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1297                 return false;
1298
1299         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1300                 return false;
1301
1302         return true;
1303
1304 }
1305 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1306 {
1307         if (efer & efer_reserved_bits)
1308                 return false;
1309
1310         return __kvm_valid_efer(vcpu, efer);
1311 }
1312 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1313
1314 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1315 {
1316         u64 old_efer = vcpu->arch.efer;
1317         u64 efer = msr_info->data;
1318
1319         if (efer & efer_reserved_bits)
1320                 return 1;
1321
1322         if (!msr_info->host_initiated) {
1323                 if (!__kvm_valid_efer(vcpu, efer))
1324                         return 1;
1325
1326                 if (is_paging(vcpu) &&
1327                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1328                         return 1;
1329         }
1330
1331         efer &= ~EFER_LMA;
1332         efer |= vcpu->arch.efer & EFER_LMA;
1333
1334         kvm_x86_ops->set_efer(vcpu, efer);
1335
1336         /* Update reserved bits */
1337         if ((efer ^ old_efer) & EFER_NX)
1338                 kvm_mmu_reset_context(vcpu);
1339
1340         return 0;
1341 }
1342
1343 void kvm_enable_efer_bits(u64 mask)
1344 {
1345        efer_reserved_bits &= ~mask;
1346 }
1347 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1348
1349 /*
1350  * Writes msr value into into the appropriate "register".
1351  * Returns 0 on success, non-0 otherwise.
1352  * Assumes vcpu_load() was already called.
1353  */
1354 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1355 {
1356         switch (msr->index) {
1357         case MSR_FS_BASE:
1358         case MSR_GS_BASE:
1359         case MSR_KERNEL_GS_BASE:
1360         case MSR_CSTAR:
1361         case MSR_LSTAR:
1362                 if (is_noncanonical_address(msr->data, vcpu))
1363                         return 1;
1364                 break;
1365         case MSR_IA32_SYSENTER_EIP:
1366         case MSR_IA32_SYSENTER_ESP:
1367                 /*
1368                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1369                  * non-canonical address is written on Intel but not on
1370                  * AMD (which ignores the top 32-bits, because it does
1371                  * not implement 64-bit SYSENTER).
1372                  *
1373                  * 64-bit code should hence be able to write a non-canonical
1374                  * value on AMD.  Making the address canonical ensures that
1375                  * vmentry does not fail on Intel after writing a non-canonical
1376                  * value, and that something deterministic happens if the guest
1377                  * invokes 64-bit SYSENTER.
1378                  */
1379                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1380         }
1381         return kvm_x86_ops->set_msr(vcpu, msr);
1382 }
1383 EXPORT_SYMBOL_GPL(kvm_set_msr);
1384
1385 /*
1386  * Adapt set_msr() to msr_io()'s calling convention
1387  */
1388 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1389 {
1390         struct msr_data msr;
1391         int r;
1392
1393         msr.index = index;
1394         msr.host_initiated = true;
1395         r = kvm_get_msr(vcpu, &msr);
1396         if (r)
1397                 return r;
1398
1399         *data = msr.data;
1400         return 0;
1401 }
1402
1403 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1404 {
1405         struct msr_data msr;
1406
1407         msr.data = *data;
1408         msr.index = index;
1409         msr.host_initiated = true;
1410         return kvm_set_msr(vcpu, &msr);
1411 }
1412
1413 #ifdef CONFIG_X86_64
1414 struct pvclock_gtod_data {
1415         seqcount_t      seq;
1416
1417         struct { /* extract of a clocksource struct */
1418                 int vclock_mode;
1419                 u64     cycle_last;
1420                 u64     mask;
1421                 u32     mult;
1422                 u32     shift;
1423         } clock;
1424
1425         u64             boot_ns;
1426         u64             nsec_base;
1427         u64             wall_time_sec;
1428 };
1429
1430 static struct pvclock_gtod_data pvclock_gtod_data;
1431
1432 static void update_pvclock_gtod(struct timekeeper *tk)
1433 {
1434         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1435         u64 boot_ns;
1436
1437         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1438
1439         write_seqcount_begin(&vdata->seq);
1440
1441         /* copy pvclock gtod data */
1442         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1443         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1444         vdata->clock.mask               = tk->tkr_mono.mask;
1445         vdata->clock.mult               = tk->tkr_mono.mult;
1446         vdata->clock.shift              = tk->tkr_mono.shift;
1447
1448         vdata->boot_ns                  = boot_ns;
1449         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1450
1451         vdata->wall_time_sec            = tk->xtime_sec;
1452
1453         write_seqcount_end(&vdata->seq);
1454 }
1455 #endif
1456
1457 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1458 {
1459         /*
1460          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1461          * vcpu_enter_guest.  This function is only called from
1462          * the physical CPU that is running vcpu.
1463          */
1464         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1465 }
1466
1467 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1468 {
1469         int version;
1470         int r;
1471         struct pvclock_wall_clock wc;
1472         struct timespec64 boot;
1473
1474         if (!wall_clock)
1475                 return;
1476
1477         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1478         if (r)
1479                 return;
1480
1481         if (version & 1)
1482                 ++version;  /* first time write, random junk */
1483
1484         ++version;
1485
1486         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1487                 return;
1488
1489         /*
1490          * The guest calculates current wall clock time by adding
1491          * system time (updated by kvm_guest_time_update below) to the
1492          * wall clock specified here.  guest system time equals host
1493          * system time for us, thus we must fill in host boot time here.
1494          */
1495         getboottime64(&boot);
1496
1497         if (kvm->arch.kvmclock_offset) {
1498                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1499                 boot = timespec64_sub(boot, ts);
1500         }
1501         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1502         wc.nsec = boot.tv_nsec;
1503         wc.version = version;
1504
1505         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1506
1507         version++;
1508         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1509 }
1510
1511 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1512 {
1513         do_shl32_div32(dividend, divisor);
1514         return dividend;
1515 }
1516
1517 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1518                                s8 *pshift, u32 *pmultiplier)
1519 {
1520         uint64_t scaled64;
1521         int32_t  shift = 0;
1522         uint64_t tps64;
1523         uint32_t tps32;
1524
1525         tps64 = base_hz;
1526         scaled64 = scaled_hz;
1527         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1528                 tps64 >>= 1;
1529                 shift--;
1530         }
1531
1532         tps32 = (uint32_t)tps64;
1533         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1534                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1535                         scaled64 >>= 1;
1536                 else
1537                         tps32 <<= 1;
1538                 shift++;
1539         }
1540
1541         *pshift = shift;
1542         *pmultiplier = div_frac(scaled64, tps32);
1543
1544         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1545                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1546 }
1547
1548 #ifdef CONFIG_X86_64
1549 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1550 #endif
1551
1552 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1553 static unsigned long max_tsc_khz;
1554
1555 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1556 {
1557         u64 v = (u64)khz * (1000000 + ppm);
1558         do_div(v, 1000000);
1559         return v;
1560 }
1561
1562 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1563 {
1564         u64 ratio;
1565
1566         /* Guest TSC same frequency as host TSC? */
1567         if (!scale) {
1568                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1569                 return 0;
1570         }
1571
1572         /* TSC scaling supported? */
1573         if (!kvm_has_tsc_control) {
1574                 if (user_tsc_khz > tsc_khz) {
1575                         vcpu->arch.tsc_catchup = 1;
1576                         vcpu->arch.tsc_always_catchup = 1;
1577                         return 0;
1578                 } else {
1579                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1580                         return -1;
1581                 }
1582         }
1583
1584         /* TSC scaling required  - calculate ratio */
1585         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1586                                 user_tsc_khz, tsc_khz);
1587
1588         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1589                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1590                                     user_tsc_khz);
1591                 return -1;
1592         }
1593
1594         vcpu->arch.tsc_scaling_ratio = ratio;
1595         return 0;
1596 }
1597
1598 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1599 {
1600         u32 thresh_lo, thresh_hi;
1601         int use_scaling = 0;
1602
1603         /* tsc_khz can be zero if TSC calibration fails */
1604         if (user_tsc_khz == 0) {
1605                 /* set tsc_scaling_ratio to a safe value */
1606                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1607                 return -1;
1608         }
1609
1610         /* Compute a scale to convert nanoseconds in TSC cycles */
1611         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1612                            &vcpu->arch.virtual_tsc_shift,
1613                            &vcpu->arch.virtual_tsc_mult);
1614         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1615
1616         /*
1617          * Compute the variation in TSC rate which is acceptable
1618          * within the range of tolerance and decide if the
1619          * rate being applied is within that bounds of the hardware
1620          * rate.  If so, no scaling or compensation need be done.
1621          */
1622         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1623         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1624         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1625                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1626                 use_scaling = 1;
1627         }
1628         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1629 }
1630
1631 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1632 {
1633         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1634                                       vcpu->arch.virtual_tsc_mult,
1635                                       vcpu->arch.virtual_tsc_shift);
1636         tsc += vcpu->arch.this_tsc_write;
1637         return tsc;
1638 }
1639
1640 static inline int gtod_is_based_on_tsc(int mode)
1641 {
1642         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1643 }
1644
1645 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1646 {
1647 #ifdef CONFIG_X86_64
1648         bool vcpus_matched;
1649         struct kvm_arch *ka = &vcpu->kvm->arch;
1650         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1651
1652         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1653                          atomic_read(&vcpu->kvm->online_vcpus));
1654
1655         /*
1656          * Once the masterclock is enabled, always perform request in
1657          * order to update it.
1658          *
1659          * In order to enable masterclock, the host clocksource must be TSC
1660          * and the vcpus need to have matched TSCs.  When that happens,
1661          * perform request to enable masterclock.
1662          */
1663         if (ka->use_master_clock ||
1664             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1665                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1666
1667         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1668                             atomic_read(&vcpu->kvm->online_vcpus),
1669                             ka->use_master_clock, gtod->clock.vclock_mode);
1670 #endif
1671 }
1672
1673 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1674 {
1675         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1676         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1677 }
1678
1679 /*
1680  * Multiply tsc by a fixed point number represented by ratio.
1681  *
1682  * The most significant 64-N bits (mult) of ratio represent the
1683  * integral part of the fixed point number; the remaining N bits
1684  * (frac) represent the fractional part, ie. ratio represents a fixed
1685  * point number (mult + frac * 2^(-N)).
1686  *
1687  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1688  */
1689 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1690 {
1691         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1692 }
1693
1694 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1695 {
1696         u64 _tsc = tsc;
1697         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1698
1699         if (ratio != kvm_default_tsc_scaling_ratio)
1700                 _tsc = __scale_tsc(ratio, tsc);
1701
1702         return _tsc;
1703 }
1704 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1705
1706 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1707 {
1708         u64 tsc;
1709
1710         tsc = kvm_scale_tsc(vcpu, rdtsc());
1711
1712         return target_tsc - tsc;
1713 }
1714
1715 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1716 {
1717         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1718
1719         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1720 }
1721 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1722
1723 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1724 {
1725         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1726 }
1727
1728 static inline bool kvm_check_tsc_unstable(void)
1729 {
1730 #ifdef CONFIG_X86_64
1731         /*
1732          * TSC is marked unstable when we're running on Hyper-V,
1733          * 'TSC page' clocksource is good.
1734          */
1735         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1736                 return false;
1737 #endif
1738         return check_tsc_unstable();
1739 }
1740
1741 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1742 {
1743         struct kvm *kvm = vcpu->kvm;
1744         u64 offset, ns, elapsed;
1745         unsigned long flags;
1746         bool matched;
1747         bool already_matched;
1748         u64 data = msr->data;
1749         bool synchronizing = false;
1750
1751         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1752         offset = kvm_compute_tsc_offset(vcpu, data);
1753         ns = ktime_get_boottime_ns();
1754         elapsed = ns - kvm->arch.last_tsc_nsec;
1755
1756         if (vcpu->arch.virtual_tsc_khz) {
1757                 if (data == 0 && msr->host_initiated) {
1758                         /*
1759                          * detection of vcpu initialization -- need to sync
1760                          * with other vCPUs. This particularly helps to keep
1761                          * kvm_clock stable after CPU hotplug
1762                          */
1763                         synchronizing = true;
1764                 } else {
1765                         u64 tsc_exp = kvm->arch.last_tsc_write +
1766                                                 nsec_to_cycles(vcpu, elapsed);
1767                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1768                         /*
1769                          * Special case: TSC write with a small delta (1 second)
1770                          * of virtual cycle time against real time is
1771                          * interpreted as an attempt to synchronize the CPU.
1772                          */
1773                         synchronizing = data < tsc_exp + tsc_hz &&
1774                                         data + tsc_hz > tsc_exp;
1775                 }
1776         }
1777
1778         /*
1779          * For a reliable TSC, we can match TSC offsets, and for an unstable
1780          * TSC, we add elapsed time in this computation.  We could let the
1781          * compensation code attempt to catch up if we fall behind, but
1782          * it's better to try to match offsets from the beginning.
1783          */
1784         if (synchronizing &&
1785             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1786                 if (!kvm_check_tsc_unstable()) {
1787                         offset = kvm->arch.cur_tsc_offset;
1788                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1789                 } else {
1790                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1791                         data += delta;
1792                         offset = kvm_compute_tsc_offset(vcpu, data);
1793                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1794                 }
1795                 matched = true;
1796                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1797         } else {
1798                 /*
1799                  * We split periods of matched TSC writes into generations.
1800                  * For each generation, we track the original measured
1801                  * nanosecond time, offset, and write, so if TSCs are in
1802                  * sync, we can match exact offset, and if not, we can match
1803                  * exact software computation in compute_guest_tsc()
1804                  *
1805                  * These values are tracked in kvm->arch.cur_xxx variables.
1806                  */
1807                 kvm->arch.cur_tsc_generation++;
1808                 kvm->arch.cur_tsc_nsec = ns;
1809                 kvm->arch.cur_tsc_write = data;
1810                 kvm->arch.cur_tsc_offset = offset;
1811                 matched = false;
1812                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1813                          kvm->arch.cur_tsc_generation, data);
1814         }
1815
1816         /*
1817          * We also track th most recent recorded KHZ, write and time to
1818          * allow the matching interval to be extended at each write.
1819          */
1820         kvm->arch.last_tsc_nsec = ns;
1821         kvm->arch.last_tsc_write = data;
1822         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1823
1824         vcpu->arch.last_guest_tsc = data;
1825
1826         /* Keep track of which generation this VCPU has synchronized to */
1827         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1828         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1829         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1830
1831         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1832                 update_ia32_tsc_adjust_msr(vcpu, offset);
1833
1834         kvm_vcpu_write_tsc_offset(vcpu, offset);
1835         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1836
1837         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1838         if (!matched) {
1839                 kvm->arch.nr_vcpus_matched_tsc = 0;
1840         } else if (!already_matched) {
1841                 kvm->arch.nr_vcpus_matched_tsc++;
1842         }
1843
1844         kvm_track_tsc_matching(vcpu);
1845         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1846 }
1847
1848 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1849
1850 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1851                                            s64 adjustment)
1852 {
1853         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1854         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1855 }
1856
1857 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1858 {
1859         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1860                 WARN_ON(adjustment < 0);
1861         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1862         adjust_tsc_offset_guest(vcpu, adjustment);
1863 }
1864
1865 #ifdef CONFIG_X86_64
1866
1867 static u64 read_tsc(void)
1868 {
1869         u64 ret = (u64)rdtsc_ordered();
1870         u64 last = pvclock_gtod_data.clock.cycle_last;
1871
1872         if (likely(ret >= last))
1873                 return ret;
1874
1875         /*
1876          * GCC likes to generate cmov here, but this branch is extremely
1877          * predictable (it's just a function of time and the likely is
1878          * very likely) and there's a data dependence, so force GCC
1879          * to generate a branch instead.  I don't barrier() because
1880          * we don't actually need a barrier, and if this function
1881          * ever gets inlined it will generate worse code.
1882          */
1883         asm volatile ("");
1884         return last;
1885 }
1886
1887 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1888 {
1889         long v;
1890         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1891         u64 tsc_pg_val;
1892
1893         switch (gtod->clock.vclock_mode) {
1894         case VCLOCK_HVCLOCK:
1895                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1896                                                   tsc_timestamp);
1897                 if (tsc_pg_val != U64_MAX) {
1898                         /* TSC page valid */
1899                         *mode = VCLOCK_HVCLOCK;
1900                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1901                                 gtod->clock.mask;
1902                 } else {
1903                         /* TSC page invalid */
1904                         *mode = VCLOCK_NONE;
1905                 }
1906                 break;
1907         case VCLOCK_TSC:
1908                 *mode = VCLOCK_TSC;
1909                 *tsc_timestamp = read_tsc();
1910                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1911                         gtod->clock.mask;
1912                 break;
1913         default:
1914                 *mode = VCLOCK_NONE;
1915         }
1916
1917         if (*mode == VCLOCK_NONE)
1918                 *tsc_timestamp = v = 0;
1919
1920         return v * gtod->clock.mult;
1921 }
1922
1923 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1924 {
1925         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1926         unsigned long seq;
1927         int mode;
1928         u64 ns;
1929
1930         do {
1931                 seq = read_seqcount_begin(&gtod->seq);
1932                 ns = gtod->nsec_base;
1933                 ns += vgettsc(tsc_timestamp, &mode);
1934                 ns >>= gtod->clock.shift;
1935                 ns += gtod->boot_ns;
1936         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1937         *t = ns;
1938
1939         return mode;
1940 }
1941
1942 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1943 {
1944         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1945         unsigned long seq;
1946         int mode;
1947         u64 ns;
1948
1949         do {
1950                 seq = read_seqcount_begin(&gtod->seq);
1951                 ts->tv_sec = gtod->wall_time_sec;
1952                 ns = gtod->nsec_base;
1953                 ns += vgettsc(tsc_timestamp, &mode);
1954                 ns >>= gtod->clock.shift;
1955         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1956
1957         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1958         ts->tv_nsec = ns;
1959
1960         return mode;
1961 }
1962
1963 /* returns true if host is using TSC based clocksource */
1964 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1965 {
1966         /* checked again under seqlock below */
1967         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1968                 return false;
1969
1970         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1971                                                       tsc_timestamp));
1972 }
1973
1974 /* returns true if host is using TSC based clocksource */
1975 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1976                                            u64 *tsc_timestamp)
1977 {
1978         /* checked again under seqlock below */
1979         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1980                 return false;
1981
1982         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1983 }
1984 #endif
1985
1986 /*
1987  *
1988  * Assuming a stable TSC across physical CPUS, and a stable TSC
1989  * across virtual CPUs, the following condition is possible.
1990  * Each numbered line represents an event visible to both
1991  * CPUs at the next numbered event.
1992  *
1993  * "timespecX" represents host monotonic time. "tscX" represents
1994  * RDTSC value.
1995  *
1996  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1997  *
1998  * 1.  read timespec0,tsc0
1999  * 2.                                   | timespec1 = timespec0 + N
2000  *                                      | tsc1 = tsc0 + M
2001  * 3. transition to guest               | transition to guest
2002  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2003  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2004  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2005  *
2006  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2007  *
2008  *      - ret0 < ret1
2009  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2010  *              ...
2011  *      - 0 < N - M => M < N
2012  *
2013  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2014  * always the case (the difference between two distinct xtime instances
2015  * might be smaller then the difference between corresponding TSC reads,
2016  * when updating guest vcpus pvclock areas).
2017  *
2018  * To avoid that problem, do not allow visibility of distinct
2019  * system_timestamp/tsc_timestamp values simultaneously: use a master
2020  * copy of host monotonic time values. Update that master copy
2021  * in lockstep.
2022  *
2023  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2024  *
2025  */
2026
2027 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2028 {
2029 #ifdef CONFIG_X86_64
2030         struct kvm_arch *ka = &kvm->arch;
2031         int vclock_mode;
2032         bool host_tsc_clocksource, vcpus_matched;
2033
2034         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2035                         atomic_read(&kvm->online_vcpus));
2036
2037         /*
2038          * If the host uses TSC clock, then passthrough TSC as stable
2039          * to the guest.
2040          */
2041         host_tsc_clocksource = kvm_get_time_and_clockread(
2042                                         &ka->master_kernel_ns,
2043                                         &ka->master_cycle_now);
2044
2045         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2046                                 && !ka->backwards_tsc_observed
2047                                 && !ka->boot_vcpu_runs_old_kvmclock;
2048
2049         if (ka->use_master_clock)
2050                 atomic_set(&kvm_guest_has_master_clock, 1);
2051
2052         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2053         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2054                                         vcpus_matched);
2055 #endif
2056 }
2057
2058 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2059 {
2060         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2061 }
2062
2063 static void kvm_gen_update_masterclock(struct kvm *kvm)
2064 {
2065 #ifdef CONFIG_X86_64
2066         int i;
2067         struct kvm_vcpu *vcpu;
2068         struct kvm_arch *ka = &kvm->arch;
2069
2070         spin_lock(&ka->pvclock_gtod_sync_lock);
2071         kvm_make_mclock_inprogress_request(kvm);
2072         /* no guest entries from this point */
2073         pvclock_update_vm_gtod_copy(kvm);
2074
2075         kvm_for_each_vcpu(i, vcpu, kvm)
2076                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2077
2078         /* guest entries allowed */
2079         kvm_for_each_vcpu(i, vcpu, kvm)
2080                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2081
2082         spin_unlock(&ka->pvclock_gtod_sync_lock);
2083 #endif
2084 }
2085
2086 u64 get_kvmclock_ns(struct kvm *kvm)
2087 {
2088         struct kvm_arch *ka = &kvm->arch;
2089         struct pvclock_vcpu_time_info hv_clock;
2090         u64 ret;
2091
2092         spin_lock(&ka->pvclock_gtod_sync_lock);
2093         if (!ka->use_master_clock) {
2094                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2095                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2096         }
2097
2098         hv_clock.tsc_timestamp = ka->master_cycle_now;
2099         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2100         spin_unlock(&ka->pvclock_gtod_sync_lock);
2101
2102         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2103         get_cpu();
2104
2105         if (__this_cpu_read(cpu_tsc_khz)) {
2106                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2107                                    &hv_clock.tsc_shift,
2108                                    &hv_clock.tsc_to_system_mul);
2109                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2110         } else
2111                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2112
2113         put_cpu();
2114
2115         return ret;
2116 }
2117
2118 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2119 {
2120         struct kvm_vcpu_arch *vcpu = &v->arch;
2121         struct pvclock_vcpu_time_info guest_hv_clock;
2122
2123         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2124                 &guest_hv_clock, sizeof(guest_hv_clock))))
2125                 return;
2126
2127         /* This VCPU is paused, but it's legal for a guest to read another
2128          * VCPU's kvmclock, so we really have to follow the specification where
2129          * it says that version is odd if data is being modified, and even after
2130          * it is consistent.
2131          *
2132          * Version field updates must be kept separate.  This is because
2133          * kvm_write_guest_cached might use a "rep movs" instruction, and
2134          * writes within a string instruction are weakly ordered.  So there
2135          * are three writes overall.
2136          *
2137          * As a small optimization, only write the version field in the first
2138          * and third write.  The vcpu->pv_time cache is still valid, because the
2139          * version field is the first in the struct.
2140          */
2141         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2142
2143         if (guest_hv_clock.version & 1)
2144                 ++guest_hv_clock.version;  /* first time write, random junk */
2145
2146         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2147         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2148                                 &vcpu->hv_clock,
2149                                 sizeof(vcpu->hv_clock.version));
2150
2151         smp_wmb();
2152
2153         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2154         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2155
2156         if (vcpu->pvclock_set_guest_stopped_request) {
2157                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2158                 vcpu->pvclock_set_guest_stopped_request = false;
2159         }
2160
2161         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2162
2163         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2164                                 &vcpu->hv_clock,
2165                                 sizeof(vcpu->hv_clock));
2166
2167         smp_wmb();
2168
2169         vcpu->hv_clock.version++;
2170         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2171                                 &vcpu->hv_clock,
2172                                 sizeof(vcpu->hv_clock.version));
2173 }
2174
2175 static int kvm_guest_time_update(struct kvm_vcpu *v)
2176 {
2177         unsigned long flags, tgt_tsc_khz;
2178         struct kvm_vcpu_arch *vcpu = &v->arch;
2179         struct kvm_arch *ka = &v->kvm->arch;
2180         s64 kernel_ns;
2181         u64 tsc_timestamp, host_tsc;
2182         u8 pvclock_flags;
2183         bool use_master_clock;
2184
2185         kernel_ns = 0;
2186         host_tsc = 0;
2187
2188         /*
2189          * If the host uses TSC clock, then passthrough TSC as stable
2190          * to the guest.
2191          */
2192         spin_lock(&ka->pvclock_gtod_sync_lock);
2193         use_master_clock = ka->use_master_clock;
2194         if (use_master_clock) {
2195                 host_tsc = ka->master_cycle_now;
2196                 kernel_ns = ka->master_kernel_ns;
2197         }
2198         spin_unlock(&ka->pvclock_gtod_sync_lock);
2199
2200         /* Keep irq disabled to prevent changes to the clock */
2201         local_irq_save(flags);
2202         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2203         if (unlikely(tgt_tsc_khz == 0)) {
2204                 local_irq_restore(flags);
2205                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2206                 return 1;
2207         }
2208         if (!use_master_clock) {
2209                 host_tsc = rdtsc();
2210                 kernel_ns = ktime_get_boottime_ns();
2211         }
2212
2213         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2214
2215         /*
2216          * We may have to catch up the TSC to match elapsed wall clock
2217          * time for two reasons, even if kvmclock is used.
2218          *   1) CPU could have been running below the maximum TSC rate
2219          *   2) Broken TSC compensation resets the base at each VCPU
2220          *      entry to avoid unknown leaps of TSC even when running
2221          *      again on the same CPU.  This may cause apparent elapsed
2222          *      time to disappear, and the guest to stand still or run
2223          *      very slowly.
2224          */
2225         if (vcpu->tsc_catchup) {
2226                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2227                 if (tsc > tsc_timestamp) {
2228                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2229                         tsc_timestamp = tsc;
2230                 }
2231         }
2232
2233         local_irq_restore(flags);
2234
2235         /* With all the info we got, fill in the values */
2236
2237         if (kvm_has_tsc_control)
2238                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2239
2240         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2241                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2242                                    &vcpu->hv_clock.tsc_shift,
2243                                    &vcpu->hv_clock.tsc_to_system_mul);
2244                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2245         }
2246
2247         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2248         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2249         vcpu->last_guest_tsc = tsc_timestamp;
2250
2251         /* If the host uses TSC clocksource, then it is stable */
2252         pvclock_flags = 0;
2253         if (use_master_clock)
2254                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2255
2256         vcpu->hv_clock.flags = pvclock_flags;
2257
2258         if (vcpu->pv_time_enabled)
2259                 kvm_setup_pvclock_page(v);
2260         if (v == kvm_get_vcpu(v->kvm, 0))
2261                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2262         return 0;
2263 }
2264
2265 /*
2266  * kvmclock updates which are isolated to a given vcpu, such as
2267  * vcpu->cpu migration, should not allow system_timestamp from
2268  * the rest of the vcpus to remain static. Otherwise ntp frequency
2269  * correction applies to one vcpu's system_timestamp but not
2270  * the others.
2271  *
2272  * So in those cases, request a kvmclock update for all vcpus.
2273  * We need to rate-limit these requests though, as they can
2274  * considerably slow guests that have a large number of vcpus.
2275  * The time for a remote vcpu to update its kvmclock is bound
2276  * by the delay we use to rate-limit the updates.
2277  */
2278
2279 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2280
2281 static void kvmclock_update_fn(struct work_struct *work)
2282 {
2283         int i;
2284         struct delayed_work *dwork = to_delayed_work(work);
2285         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2286                                            kvmclock_update_work);
2287         struct kvm *kvm = container_of(ka, struct kvm, arch);
2288         struct kvm_vcpu *vcpu;
2289
2290         kvm_for_each_vcpu(i, vcpu, kvm) {
2291                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2292                 kvm_vcpu_kick(vcpu);
2293         }
2294 }
2295
2296 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2297 {
2298         struct kvm *kvm = v->kvm;
2299
2300         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2301         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2302                                         KVMCLOCK_UPDATE_DELAY);
2303 }
2304
2305 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2306
2307 static void kvmclock_sync_fn(struct work_struct *work)
2308 {
2309         struct delayed_work *dwork = to_delayed_work(work);
2310         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2311                                            kvmclock_sync_work);
2312         struct kvm *kvm = container_of(ka, struct kvm, arch);
2313
2314         if (!kvmclock_periodic_sync)
2315                 return;
2316
2317         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2318         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2319                                         KVMCLOCK_SYNC_PERIOD);
2320 }
2321
2322 /*
2323  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2324  */
2325 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2326 {
2327         /* McStatusWrEn enabled? */
2328         if (guest_cpuid_is_amd(vcpu))
2329                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2330
2331         return false;
2332 }
2333
2334 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2335 {
2336         u64 mcg_cap = vcpu->arch.mcg_cap;
2337         unsigned bank_num = mcg_cap & 0xff;
2338         u32 msr = msr_info->index;
2339         u64 data = msr_info->data;
2340
2341         switch (msr) {
2342         case MSR_IA32_MCG_STATUS:
2343                 vcpu->arch.mcg_status = data;
2344                 break;
2345         case MSR_IA32_MCG_CTL:
2346                 if (!(mcg_cap & MCG_CTL_P) &&
2347                     (data || !msr_info->host_initiated))
2348                         return 1;
2349                 if (data != 0 && data != ~(u64)0)
2350                         return 1;
2351                 vcpu->arch.mcg_ctl = data;
2352                 break;
2353         default:
2354                 if (msr >= MSR_IA32_MC0_CTL &&
2355                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2356                         u32 offset = msr - MSR_IA32_MC0_CTL;
2357                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2358                          * some Linux kernels though clear bit 10 in bank 4 to
2359                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2360                          * this to avoid an uncatched #GP in the guest
2361                          */
2362                         if ((offset & 0x3) == 0 &&
2363                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2364                                 return -1;
2365
2366                         /* MCi_STATUS */
2367                         if (!msr_info->host_initiated &&
2368                             (offset & 0x3) == 1 && data != 0) {
2369                                 if (!can_set_mci_status(vcpu))
2370                                         return -1;
2371                         }
2372
2373                         vcpu->arch.mce_banks[offset] = data;
2374                         break;
2375                 }
2376                 return 1;
2377         }
2378         return 0;
2379 }
2380
2381 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2382 {
2383         struct kvm *kvm = vcpu->kvm;
2384         int lm = is_long_mode(vcpu);
2385         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2386                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2387         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2388                 : kvm->arch.xen_hvm_config.blob_size_32;
2389         u32 page_num = data & ~PAGE_MASK;
2390         u64 page_addr = data & PAGE_MASK;
2391         u8 *page;
2392         int r;
2393
2394         r = -E2BIG;
2395         if (page_num >= blob_size)
2396                 goto out;
2397         r = -ENOMEM;
2398         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2399         if (IS_ERR(page)) {
2400                 r = PTR_ERR(page);
2401                 goto out;
2402         }
2403         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2404                 goto out_free;
2405         r = 0;
2406 out_free:
2407         kfree(page);
2408 out:
2409         return r;
2410 }
2411
2412 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2413 {
2414         gpa_t gpa = data & ~0x3f;
2415
2416         /* Bits 3:5 are reserved, Should be zero */
2417         if (data & 0x38)
2418                 return 1;
2419
2420         vcpu->arch.apf.msr_val = data;
2421
2422         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2423                 kvm_clear_async_pf_completion_queue(vcpu);
2424                 kvm_async_pf_hash_reset(vcpu);
2425                 return 0;
2426         }
2427
2428         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2429                                         sizeof(u32)))
2430                 return 1;
2431
2432         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2433         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2434         kvm_async_pf_wakeup_all(vcpu);
2435         return 0;
2436 }
2437
2438 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2439 {
2440         vcpu->arch.pv_time_enabled = false;
2441 }
2442
2443 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2444 {
2445         ++vcpu->stat.tlb_flush;
2446         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2447 }
2448
2449 static void record_steal_time(struct kvm_vcpu *vcpu)
2450 {
2451         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2452                 return;
2453
2454         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2455                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2456                 return;
2457
2458         /*
2459          * Doing a TLB flush here, on the guest's behalf, can avoid
2460          * expensive IPIs.
2461          */
2462         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2463                 kvm_vcpu_flush_tlb(vcpu, false);
2464
2465         if (vcpu->arch.st.steal.version & 1)
2466                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2467
2468         vcpu->arch.st.steal.version += 1;
2469
2470         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2471                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2472
2473         smp_wmb();
2474
2475         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2476                 vcpu->arch.st.last_steal;
2477         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2478
2479         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2480                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2481
2482         smp_wmb();
2483
2484         vcpu->arch.st.steal.version += 1;
2485
2486         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2487                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2488 }
2489
2490 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2491 {
2492         bool pr = false;
2493         u32 msr = msr_info->index;
2494         u64 data = msr_info->data;
2495
2496         switch (msr) {
2497         case MSR_AMD64_NB_CFG:
2498         case MSR_IA32_UCODE_WRITE:
2499         case MSR_VM_HSAVE_PA:
2500         case MSR_AMD64_PATCH_LOADER:
2501         case MSR_AMD64_BU_CFG2:
2502         case MSR_AMD64_DC_CFG:
2503         case MSR_F15H_EX_CFG:
2504                 break;
2505
2506         case MSR_IA32_UCODE_REV:
2507                 if (msr_info->host_initiated)
2508                         vcpu->arch.microcode_version = data;
2509                 break;
2510         case MSR_IA32_ARCH_CAPABILITIES:
2511                 if (!msr_info->host_initiated)
2512                         return 1;
2513                 vcpu->arch.arch_capabilities = data;
2514                 break;
2515         case MSR_EFER:
2516                 return set_efer(vcpu, msr_info);
2517         case MSR_K7_HWCR:
2518                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2519                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2520                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2521
2522                 /* Handle McStatusWrEn */
2523                 if (data == BIT_ULL(18)) {
2524                         vcpu->arch.msr_hwcr = data;
2525                 } else if (data != 0) {
2526                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2527                                     data);
2528                         return 1;
2529                 }
2530                 break;
2531         case MSR_FAM10H_MMIO_CONF_BASE:
2532                 if (data != 0) {
2533                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2534                                     "0x%llx\n", data);
2535                         return 1;
2536                 }
2537                 break;
2538         case MSR_IA32_DEBUGCTLMSR:
2539                 if (!data) {
2540                         /* We support the non-activated case already */
2541                         break;
2542                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2543                         /* Values other than LBR and BTF are vendor-specific,
2544                            thus reserved and should throw a #GP */
2545                         return 1;
2546                 }
2547                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2548                             __func__, data);
2549                 break;
2550         case 0x200 ... 0x2ff:
2551                 return kvm_mtrr_set_msr(vcpu, msr, data);
2552         case MSR_IA32_APICBASE:
2553                 return kvm_set_apic_base(vcpu, msr_info);
2554         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2555                 return kvm_x2apic_msr_write(vcpu, msr, data);
2556         case MSR_IA32_TSCDEADLINE:
2557                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2558                 break;
2559         case MSR_IA32_TSC_ADJUST:
2560                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2561                         if (!msr_info->host_initiated) {
2562                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2563                                 adjust_tsc_offset_guest(vcpu, adj);
2564                         }
2565                         vcpu->arch.ia32_tsc_adjust_msr = data;
2566                 }
2567                 break;
2568         case MSR_IA32_MISC_ENABLE:
2569                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2570                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2571                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2572                                 return 1;
2573                         vcpu->arch.ia32_misc_enable_msr = data;
2574                         kvm_update_cpuid(vcpu);
2575                 } else {
2576                         vcpu->arch.ia32_misc_enable_msr = data;
2577                 }
2578                 break;
2579         case MSR_IA32_SMBASE:
2580                 if (!msr_info->host_initiated)
2581                         return 1;
2582                 vcpu->arch.smbase = data;
2583                 break;
2584         case MSR_IA32_POWER_CTL:
2585                 vcpu->arch.msr_ia32_power_ctl = data;
2586                 break;
2587         case MSR_IA32_TSC:
2588                 kvm_write_tsc(vcpu, msr_info);
2589                 break;
2590         case MSR_SMI_COUNT:
2591                 if (!msr_info->host_initiated)
2592                         return 1;
2593                 vcpu->arch.smi_count = data;
2594                 break;
2595         case MSR_KVM_WALL_CLOCK_NEW:
2596         case MSR_KVM_WALL_CLOCK:
2597                 vcpu->kvm->arch.wall_clock = data;
2598                 kvm_write_wall_clock(vcpu->kvm, data);
2599                 break;
2600         case MSR_KVM_SYSTEM_TIME_NEW:
2601         case MSR_KVM_SYSTEM_TIME: {
2602                 struct kvm_arch *ka = &vcpu->kvm->arch;
2603
2604                 kvmclock_reset(vcpu);
2605
2606                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2607                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2608
2609                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2610                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2611
2612                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2613                 }
2614
2615                 vcpu->arch.time = data;
2616                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2617
2618                 /* we verify if the enable bit is set... */
2619                 if (!(data & 1))
2620                         break;
2621
2622                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2623                      &vcpu->arch.pv_time, data & ~1ULL,
2624                      sizeof(struct pvclock_vcpu_time_info)))
2625                         vcpu->arch.pv_time_enabled = false;
2626                 else
2627                         vcpu->arch.pv_time_enabled = true;
2628
2629                 break;
2630         }
2631         case MSR_KVM_ASYNC_PF_EN:
2632                 if (kvm_pv_enable_async_pf(vcpu, data))
2633                         return 1;
2634                 break;
2635         case MSR_KVM_STEAL_TIME:
2636
2637                 if (unlikely(!sched_info_on()))
2638                         return 1;
2639
2640                 if (data & KVM_STEAL_RESERVED_MASK)
2641                         return 1;
2642
2643                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2644                                                 data & KVM_STEAL_VALID_BITS,
2645                                                 sizeof(struct kvm_steal_time)))
2646                         return 1;
2647
2648                 vcpu->arch.st.msr_val = data;
2649
2650                 if (!(data & KVM_MSR_ENABLED))
2651                         break;
2652
2653                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2654
2655                 break;
2656         case MSR_KVM_PV_EOI_EN:
2657                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2658                         return 1;
2659                 break;
2660
2661         case MSR_KVM_POLL_CONTROL:
2662                 /* only enable bit supported */
2663                 if (data & (-1ULL << 1))
2664                         return 1;
2665
2666                 vcpu->arch.msr_kvm_poll_control = data;
2667                 break;
2668
2669         case MSR_IA32_MCG_CTL:
2670         case MSR_IA32_MCG_STATUS:
2671         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2672                 return set_msr_mce(vcpu, msr_info);
2673
2674         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2675         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2676                 pr = true; /* fall through */
2677         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2678         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2679                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2680                         return kvm_pmu_set_msr(vcpu, msr_info);
2681
2682                 if (pr || data != 0)
2683                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2684                                     "0x%x data 0x%llx\n", msr, data);
2685                 break;
2686         case MSR_K7_CLK_CTL:
2687                 /*
2688                  * Ignore all writes to this no longer documented MSR.
2689                  * Writes are only relevant for old K7 processors,
2690                  * all pre-dating SVM, but a recommended workaround from
2691                  * AMD for these chips. It is possible to specify the
2692                  * affected processor models on the command line, hence
2693                  * the need to ignore the workaround.
2694                  */
2695                 break;
2696         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2697         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2698         case HV_X64_MSR_CRASH_CTL:
2699         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2700         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2701         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2702         case HV_X64_MSR_TSC_EMULATION_STATUS:
2703                 return kvm_hv_set_msr_common(vcpu, msr, data,
2704                                              msr_info->host_initiated);
2705         case MSR_IA32_BBL_CR_CTL3:
2706                 /* Drop writes to this legacy MSR -- see rdmsr
2707                  * counterpart for further detail.
2708                  */
2709                 if (report_ignored_msrs)
2710                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2711                                 msr, data);
2712                 break;
2713         case MSR_AMD64_OSVW_ID_LENGTH:
2714                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2715                         return 1;
2716                 vcpu->arch.osvw.length = data;
2717                 break;
2718         case MSR_AMD64_OSVW_STATUS:
2719                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2720                         return 1;
2721                 vcpu->arch.osvw.status = data;
2722                 break;
2723         case MSR_PLATFORM_INFO:
2724                 if (!msr_info->host_initiated ||
2725                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2726                      cpuid_fault_enabled(vcpu)))
2727                         return 1;
2728                 vcpu->arch.msr_platform_info = data;
2729                 break;
2730         case MSR_MISC_FEATURES_ENABLES:
2731                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2732                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2733                      !supports_cpuid_fault(vcpu)))
2734                         return 1;
2735                 vcpu->arch.msr_misc_features_enables = data;
2736                 break;
2737         default:
2738                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2739                         return xen_hvm_config(vcpu, data);
2740                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2741                         return kvm_pmu_set_msr(vcpu, msr_info);
2742                 if (!ignore_msrs) {
2743                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2744                                     msr, data);
2745                         return 1;
2746                 } else {
2747                         if (report_ignored_msrs)
2748                                 vcpu_unimpl(vcpu,
2749                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2750                                         msr, data);
2751                         break;
2752                 }
2753         }
2754         return 0;
2755 }
2756 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2757
2758
2759 /*
2760  * Reads an msr value (of 'msr_index') into 'pdata'.
2761  * Returns 0 on success, non-0 otherwise.
2762  * Assumes vcpu_load() was already called.
2763  */
2764 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2765 {
2766         return kvm_x86_ops->get_msr(vcpu, msr);
2767 }
2768 EXPORT_SYMBOL_GPL(kvm_get_msr);
2769
2770 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2771 {
2772         u64 data;
2773         u64 mcg_cap = vcpu->arch.mcg_cap;
2774         unsigned bank_num = mcg_cap & 0xff;
2775
2776         switch (msr) {
2777         case MSR_IA32_P5_MC_ADDR:
2778         case MSR_IA32_P5_MC_TYPE:
2779                 data = 0;
2780                 break;
2781         case MSR_IA32_MCG_CAP:
2782                 data = vcpu->arch.mcg_cap;
2783                 break;
2784         case MSR_IA32_MCG_CTL:
2785                 if (!(mcg_cap & MCG_CTL_P) && !host)
2786                         return 1;
2787                 data = vcpu->arch.mcg_ctl;
2788                 break;
2789         case MSR_IA32_MCG_STATUS:
2790                 data = vcpu->arch.mcg_status;
2791                 break;
2792         default:
2793                 if (msr >= MSR_IA32_MC0_CTL &&
2794                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2795                         u32 offset = msr - MSR_IA32_MC0_CTL;
2796                         data = vcpu->arch.mce_banks[offset];
2797                         break;
2798                 }
2799                 return 1;
2800         }
2801         *pdata = data;
2802         return 0;
2803 }
2804
2805 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2806 {
2807         switch (msr_info->index) {
2808         case MSR_IA32_PLATFORM_ID:
2809         case MSR_IA32_EBL_CR_POWERON:
2810         case MSR_IA32_DEBUGCTLMSR:
2811         case MSR_IA32_LASTBRANCHFROMIP:
2812         case MSR_IA32_LASTBRANCHTOIP:
2813         case MSR_IA32_LASTINTFROMIP:
2814         case MSR_IA32_LASTINTTOIP:
2815         case MSR_K8_SYSCFG:
2816         case MSR_K8_TSEG_ADDR:
2817         case MSR_K8_TSEG_MASK:
2818         case MSR_VM_HSAVE_PA:
2819         case MSR_K8_INT_PENDING_MSG:
2820         case MSR_AMD64_NB_CFG:
2821         case MSR_FAM10H_MMIO_CONF_BASE:
2822         case MSR_AMD64_BU_CFG2:
2823         case MSR_IA32_PERF_CTL:
2824         case MSR_AMD64_DC_CFG:
2825         case MSR_F15H_EX_CFG:
2826                 msr_info->data = 0;
2827                 break;
2828         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2829         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2830         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2831         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2832         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2833                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2834                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2835                 msr_info->data = 0;
2836                 break;
2837         case MSR_IA32_UCODE_REV:
2838                 msr_info->data = vcpu->arch.microcode_version;
2839                 break;
2840         case MSR_IA32_ARCH_CAPABILITIES:
2841                 if (!msr_info->host_initiated &&
2842                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2843                         return 1;
2844                 msr_info->data = vcpu->arch.arch_capabilities;
2845                 break;
2846         case MSR_IA32_POWER_CTL:
2847                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2848                 break;
2849         case MSR_IA32_TSC:
2850                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2851                 break;
2852         case MSR_MTRRcap:
2853         case 0x200 ... 0x2ff:
2854                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2855         case 0xcd: /* fsb frequency */
2856                 msr_info->data = 3;
2857                 break;
2858                 /*
2859                  * MSR_EBC_FREQUENCY_ID
2860                  * Conservative value valid for even the basic CPU models.
2861                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2862                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2863                  * and 266MHz for model 3, or 4. Set Core Clock
2864                  * Frequency to System Bus Frequency Ratio to 1 (bits
2865                  * 31:24) even though these are only valid for CPU
2866                  * models > 2, however guests may end up dividing or
2867                  * multiplying by zero otherwise.
2868                  */
2869         case MSR_EBC_FREQUENCY_ID:
2870                 msr_info->data = 1 << 24;
2871                 break;
2872         case MSR_IA32_APICBASE:
2873                 msr_info->data = kvm_get_apic_base(vcpu);
2874                 break;
2875         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2876                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2877                 break;
2878         case MSR_IA32_TSCDEADLINE:
2879                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2880                 break;
2881         case MSR_IA32_TSC_ADJUST:
2882                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2883                 break;
2884         case MSR_IA32_MISC_ENABLE:
2885                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2886                 break;
2887         case MSR_IA32_SMBASE:
2888                 if (!msr_info->host_initiated)
2889                         return 1;
2890                 msr_info->data = vcpu->arch.smbase;
2891                 break;
2892         case MSR_SMI_COUNT:
2893                 msr_info->data = vcpu->arch.smi_count;
2894                 break;
2895         case MSR_IA32_PERF_STATUS:
2896                 /* TSC increment by tick */
2897                 msr_info->data = 1000ULL;
2898                 /* CPU multiplier */
2899                 msr_info->data |= (((uint64_t)4ULL) << 40);
2900                 break;
2901         case MSR_EFER:
2902                 msr_info->data = vcpu->arch.efer;
2903                 break;
2904         case MSR_KVM_WALL_CLOCK:
2905         case MSR_KVM_WALL_CLOCK_NEW:
2906                 msr_info->data = vcpu->kvm->arch.wall_clock;
2907                 break;
2908         case MSR_KVM_SYSTEM_TIME:
2909         case MSR_KVM_SYSTEM_TIME_NEW:
2910                 msr_info->data = vcpu->arch.time;
2911                 break;
2912         case MSR_KVM_ASYNC_PF_EN:
2913                 msr_info->data = vcpu->arch.apf.msr_val;
2914                 break;
2915         case MSR_KVM_STEAL_TIME:
2916                 msr_info->data = vcpu->arch.st.msr_val;
2917                 break;
2918         case MSR_KVM_PV_EOI_EN:
2919                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2920                 break;
2921         case MSR_KVM_POLL_CONTROL:
2922                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
2923                 break;
2924         case MSR_IA32_P5_MC_ADDR:
2925         case MSR_IA32_P5_MC_TYPE:
2926         case MSR_IA32_MCG_CAP:
2927         case MSR_IA32_MCG_CTL:
2928         case MSR_IA32_MCG_STATUS:
2929         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2930                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2931                                    msr_info->host_initiated);
2932         case MSR_K7_CLK_CTL:
2933                 /*
2934                  * Provide expected ramp-up count for K7. All other
2935                  * are set to zero, indicating minimum divisors for
2936                  * every field.
2937                  *
2938                  * This prevents guest kernels on AMD host with CPU
2939                  * type 6, model 8 and higher from exploding due to
2940                  * the rdmsr failing.
2941                  */
2942                 msr_info->data = 0x20000000;
2943                 break;
2944         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2945         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2946         case HV_X64_MSR_CRASH_CTL:
2947         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2948         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2949         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2950         case HV_X64_MSR_TSC_EMULATION_STATUS:
2951                 return kvm_hv_get_msr_common(vcpu,
2952                                              msr_info->index, &msr_info->data,
2953                                              msr_info->host_initiated);
2954                 break;
2955         case MSR_IA32_BBL_CR_CTL3:
2956                 /* This legacy MSR exists but isn't fully documented in current
2957                  * silicon.  It is however accessed by winxp in very narrow
2958                  * scenarios where it sets bit #19, itself documented as
2959                  * a "reserved" bit.  Best effort attempt to source coherent
2960                  * read data here should the balance of the register be
2961                  * interpreted by the guest:
2962                  *
2963                  * L2 cache control register 3: 64GB range, 256KB size,
2964                  * enabled, latency 0x1, configured
2965                  */
2966                 msr_info->data = 0xbe702111;
2967                 break;
2968         case MSR_AMD64_OSVW_ID_LENGTH:
2969                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2970                         return 1;
2971                 msr_info->data = vcpu->arch.osvw.length;
2972                 break;
2973         case MSR_AMD64_OSVW_STATUS:
2974                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2975                         return 1;
2976                 msr_info->data = vcpu->arch.osvw.status;
2977                 break;
2978         case MSR_PLATFORM_INFO:
2979                 if (!msr_info->host_initiated &&
2980                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
2981                         return 1;
2982                 msr_info->data = vcpu->arch.msr_platform_info;
2983                 break;
2984         case MSR_MISC_FEATURES_ENABLES:
2985                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2986                 break;
2987         case MSR_K7_HWCR:
2988                 msr_info->data = vcpu->arch.msr_hwcr;
2989                 break;
2990         default:
2991                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2992                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2993                 if (!ignore_msrs) {
2994                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2995                                                msr_info->index);
2996                         return 1;
2997                 } else {
2998                         if (report_ignored_msrs)
2999                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3000                                         msr_info->index);
3001                         msr_info->data = 0;
3002                 }
3003                 break;
3004         }
3005         return 0;
3006 }
3007 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3008
3009 /*
3010  * Read or write a bunch of msrs. All parameters are kernel addresses.
3011  *
3012  * @return number of msrs set successfully.
3013  */
3014 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3015                     struct kvm_msr_entry *entries,
3016                     int (*do_msr)(struct kvm_vcpu *vcpu,
3017                                   unsigned index, u64 *data))
3018 {
3019         int i;
3020
3021         for (i = 0; i < msrs->nmsrs; ++i)
3022                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3023                         break;
3024
3025         return i;
3026 }
3027
3028 /*
3029  * Read or write a bunch of msrs. Parameters are user addresses.
3030  *
3031  * @return number of msrs set successfully.
3032  */
3033 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3034                   int (*do_msr)(struct kvm_vcpu *vcpu,
3035                                 unsigned index, u64 *data),
3036                   int writeback)
3037 {
3038         struct kvm_msrs msrs;
3039         struct kvm_msr_entry *entries;
3040         int r, n;
3041         unsigned size;
3042
3043         r = -EFAULT;
3044         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3045                 goto out;
3046
3047         r = -E2BIG;
3048         if (msrs.nmsrs >= MAX_IO_MSRS)
3049                 goto out;
3050
3051         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3052         entries = memdup_user(user_msrs->entries, size);
3053         if (IS_ERR(entries)) {
3054                 r = PTR_ERR(entries);
3055                 goto out;
3056         }
3057
3058         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3059         if (r < 0)
3060                 goto out_free;
3061
3062         r = -EFAULT;
3063         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3064                 goto out_free;
3065
3066         r = n;
3067
3068 out_free:
3069         kfree(entries);
3070 out:
3071         return r;
3072 }
3073
3074 static inline bool kvm_can_mwait_in_guest(void)
3075 {
3076         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3077                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3078                 boot_cpu_has(X86_FEATURE_ARAT);
3079 }
3080
3081 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3082 {
3083         int r = 0;
3084
3085         switch (ext) {
3086         case KVM_CAP_IRQCHIP:
3087         case KVM_CAP_HLT:
3088         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3089         case KVM_CAP_SET_TSS_ADDR:
3090         case KVM_CAP_EXT_CPUID:
3091         case KVM_CAP_EXT_EMUL_CPUID:
3092         case KVM_CAP_CLOCKSOURCE:
3093         case KVM_CAP_PIT:
3094         case KVM_CAP_NOP_IO_DELAY:
3095         case KVM_CAP_MP_STATE:
3096         case KVM_CAP_SYNC_MMU:
3097         case KVM_CAP_USER_NMI:
3098         case KVM_CAP_REINJECT_CONTROL:
3099         case KVM_CAP_IRQ_INJECT_STATUS:
3100         case KVM_CAP_IOEVENTFD:
3101         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3102         case KVM_CAP_PIT2:
3103         case KVM_CAP_PIT_STATE2:
3104         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3105         case KVM_CAP_XEN_HVM:
3106         case KVM_CAP_VCPU_EVENTS:
3107         case KVM_CAP_HYPERV:
3108         case KVM_CAP_HYPERV_VAPIC:
3109         case KVM_CAP_HYPERV_SPIN:
3110         case KVM_CAP_HYPERV_SYNIC:
3111         case KVM_CAP_HYPERV_SYNIC2:
3112         case KVM_CAP_HYPERV_VP_INDEX:
3113         case KVM_CAP_HYPERV_EVENTFD:
3114         case KVM_CAP_HYPERV_TLBFLUSH:
3115         case KVM_CAP_HYPERV_SEND_IPI:
3116         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3117         case KVM_CAP_HYPERV_CPUID:
3118         case KVM_CAP_PCI_SEGMENT:
3119         case KVM_CAP_DEBUGREGS:
3120         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3121         case KVM_CAP_XSAVE:
3122         case KVM_CAP_ASYNC_PF:
3123         case KVM_CAP_GET_TSC_KHZ:
3124         case KVM_CAP_KVMCLOCK_CTRL:
3125         case KVM_CAP_READONLY_MEM:
3126         case KVM_CAP_HYPERV_TIME:
3127         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3128         case KVM_CAP_TSC_DEADLINE_TIMER:
3129         case KVM_CAP_DISABLE_QUIRKS:
3130         case KVM_CAP_SET_BOOT_CPU_ID:
3131         case KVM_CAP_SPLIT_IRQCHIP:
3132         case KVM_CAP_IMMEDIATE_EXIT:
3133         case KVM_CAP_PMU_EVENT_FILTER:
3134         case KVM_CAP_GET_MSR_FEATURES:
3135         case KVM_CAP_MSR_PLATFORM_INFO:
3136         case KVM_CAP_EXCEPTION_PAYLOAD:
3137                 r = 1;
3138                 break;
3139         case KVM_CAP_SYNC_REGS:
3140                 r = KVM_SYNC_X86_VALID_FIELDS;
3141                 break;
3142         case KVM_CAP_ADJUST_CLOCK:
3143                 r = KVM_CLOCK_TSC_STABLE;
3144                 break;
3145         case KVM_CAP_X86_DISABLE_EXITS:
3146                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3147                       KVM_X86_DISABLE_EXITS_CSTATE;
3148                 if(kvm_can_mwait_in_guest())
3149                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3150                 break;
3151         case KVM_CAP_X86_SMM:
3152                 /* SMBASE is usually relocated above 1M on modern chipsets,
3153                  * and SMM handlers might indeed rely on 4G segment limits,
3154                  * so do not report SMM to be available if real mode is
3155                  * emulated via vm86 mode.  Still, do not go to great lengths
3156                  * to avoid userspace's usage of the feature, because it is a
3157                  * fringe case that is not enabled except via specific settings
3158                  * of the module parameters.
3159                  */
3160                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3161                 break;
3162         case KVM_CAP_VAPIC:
3163                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3164                 break;
3165         case KVM_CAP_NR_VCPUS:
3166                 r = KVM_SOFT_MAX_VCPUS;
3167                 break;
3168         case KVM_CAP_MAX_VCPUS:
3169                 r = KVM_MAX_VCPUS;
3170                 break;
3171         case KVM_CAP_MAX_VCPU_ID:
3172                 r = KVM_MAX_VCPU_ID;
3173                 break;
3174         case KVM_CAP_PV_MMU:    /* obsolete */
3175                 r = 0;
3176                 break;
3177         case KVM_CAP_MCE:
3178                 r = KVM_MAX_MCE_BANKS;
3179                 break;
3180         case KVM_CAP_XCRS:
3181                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3182                 break;
3183         case KVM_CAP_TSC_CONTROL:
3184                 r = kvm_has_tsc_control;
3185                 break;
3186         case KVM_CAP_X2APIC_API:
3187                 r = KVM_X2APIC_API_VALID_FLAGS;
3188                 break;
3189         case KVM_CAP_NESTED_STATE:
3190                 r = kvm_x86_ops->get_nested_state ?
3191                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3192                 break;
3193         default:
3194                 break;
3195         }
3196         return r;
3197
3198 }
3199
3200 long kvm_arch_dev_ioctl(struct file *filp,
3201                         unsigned int ioctl, unsigned long arg)
3202 {
3203         void __user *argp = (void __user *)arg;
3204         long r;
3205
3206         switch (ioctl) {
3207         case KVM_GET_MSR_INDEX_LIST: {
3208                 struct kvm_msr_list __user *user_msr_list = argp;
3209                 struct kvm_msr_list msr_list;
3210                 unsigned n;
3211
3212                 r = -EFAULT;
3213                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3214                         goto out;
3215                 n = msr_list.nmsrs;
3216                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3217                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3218                         goto out;
3219                 r = -E2BIG;
3220                 if (n < msr_list.nmsrs)
3221                         goto out;
3222                 r = -EFAULT;
3223                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3224                                  num_msrs_to_save * sizeof(u32)))
3225                         goto out;
3226                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3227                                  &emulated_msrs,
3228                                  num_emulated_msrs * sizeof(u32)))
3229                         goto out;
3230                 r = 0;
3231                 break;
3232         }
3233         case KVM_GET_SUPPORTED_CPUID:
3234         case KVM_GET_EMULATED_CPUID: {
3235                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3236                 struct kvm_cpuid2 cpuid;
3237
3238                 r = -EFAULT;
3239                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3240                         goto out;
3241
3242                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3243                                             ioctl);
3244                 if (r)
3245                         goto out;
3246
3247                 r = -EFAULT;
3248                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3249                         goto out;
3250                 r = 0;
3251                 break;
3252         }
3253         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3254                 r = -EFAULT;
3255                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3256                                  sizeof(kvm_mce_cap_supported)))
3257                         goto out;
3258                 r = 0;
3259                 break;
3260         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3261                 struct kvm_msr_list __user *user_msr_list = argp;
3262                 struct kvm_msr_list msr_list;
3263                 unsigned int n;
3264
3265                 r = -EFAULT;
3266                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3267                         goto out;
3268                 n = msr_list.nmsrs;
3269                 msr_list.nmsrs = num_msr_based_features;
3270                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3271                         goto out;
3272                 r = -E2BIG;
3273                 if (n < msr_list.nmsrs)
3274                         goto out;
3275                 r = -EFAULT;
3276                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3277                                  num_msr_based_features * sizeof(u32)))
3278                         goto out;
3279                 r = 0;
3280                 break;
3281         }
3282         case KVM_GET_MSRS:
3283                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3284                 break;
3285         }
3286         default:
3287                 r = -EINVAL;
3288         }
3289 out:
3290         return r;
3291 }
3292
3293 static void wbinvd_ipi(void *garbage)
3294 {
3295         wbinvd();
3296 }
3297
3298 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3299 {
3300         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3301 }
3302
3303 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3304 {
3305         /* Address WBINVD may be executed by guest */
3306         if (need_emulate_wbinvd(vcpu)) {
3307                 if (kvm_x86_ops->has_wbinvd_exit())
3308                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3309                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3310                         smp_call_function_single(vcpu->cpu,
3311                                         wbinvd_ipi, NULL, 1);
3312         }
3313
3314         kvm_x86_ops->vcpu_load(vcpu, cpu);
3315
3316         /* Apply any externally detected TSC adjustments (due to suspend) */
3317         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3318                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3319                 vcpu->arch.tsc_offset_adjustment = 0;
3320                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3321         }
3322
3323         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3324                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3325                                 rdtsc() - vcpu->arch.last_host_tsc;
3326                 if (tsc_delta < 0)
3327                         mark_tsc_unstable("KVM discovered backwards TSC");
3328
3329                 if (kvm_check_tsc_unstable()) {
3330                         u64 offset = kvm_compute_tsc_offset(vcpu,
3331                                                 vcpu->arch.last_guest_tsc);
3332                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3333                         vcpu->arch.tsc_catchup = 1;
3334                 }
3335
3336                 if (kvm_lapic_hv_timer_in_use(vcpu))
3337                         kvm_lapic_restart_hv_timer(vcpu);
3338
3339                 /*
3340                  * On a host with synchronized TSC, there is no need to update
3341                  * kvmclock on vcpu->cpu migration
3342                  */
3343                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3344                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3345                 if (vcpu->cpu != cpu)
3346                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3347                 vcpu->cpu = cpu;
3348         }
3349
3350         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3351 }
3352
3353 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3354 {
3355         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3356                 return;
3357
3358         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3359
3360         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3361                         &vcpu->arch.st.steal.preempted,
3362                         offsetof(struct kvm_steal_time, preempted),
3363                         sizeof(vcpu->arch.st.steal.preempted));
3364 }
3365
3366 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3367 {
3368         int idx;
3369
3370         if (vcpu->preempted)
3371                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3372
3373         /*
3374          * Disable page faults because we're in atomic context here.
3375          * kvm_write_guest_offset_cached() would call might_fault()
3376          * that relies on pagefault_disable() to tell if there's a
3377          * bug. NOTE: the write to guest memory may not go through if
3378          * during postcopy live migration or if there's heavy guest
3379          * paging.
3380          */
3381         pagefault_disable();
3382         /*
3383          * kvm_memslots() will be called by
3384          * kvm_write_guest_offset_cached() so take the srcu lock.
3385          */
3386         idx = srcu_read_lock(&vcpu->kvm->srcu);
3387         kvm_steal_time_set_preempted(vcpu);
3388         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3389         pagefault_enable();
3390         kvm_x86_ops->vcpu_put(vcpu);
3391         vcpu->arch.last_host_tsc = rdtsc();
3392         /*
3393          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3394          * on every vmexit, but if not, we might have a stale dr6 from the
3395          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3396          */
3397         set_debugreg(0, 6);
3398 }
3399
3400 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3401                                     struct kvm_lapic_state *s)
3402 {
3403         if (vcpu->arch.apicv_active)
3404                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3405
3406         return kvm_apic_get_state(vcpu, s);
3407 }
3408
3409 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3410                                     struct kvm_lapic_state *s)
3411 {
3412         int r;
3413
3414         r = kvm_apic_set_state(vcpu, s);
3415         if (r)
3416                 return r;
3417         update_cr8_intercept(vcpu);
3418
3419         return 0;
3420 }
3421
3422 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3423 {
3424         return (!lapic_in_kernel(vcpu) ||
3425                 kvm_apic_accept_pic_intr(vcpu));
3426 }
3427
3428 /*
3429  * if userspace requested an interrupt window, check that the
3430  * interrupt window is open.
3431  *
3432  * No need to exit to userspace if we already have an interrupt queued.
3433  */
3434 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3435 {
3436         return kvm_arch_interrupt_allowed(vcpu) &&
3437                 !kvm_cpu_has_interrupt(vcpu) &&
3438                 !kvm_event_needs_reinjection(vcpu) &&
3439                 kvm_cpu_accept_dm_intr(vcpu);
3440 }
3441
3442 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3443                                     struct kvm_interrupt *irq)
3444 {
3445         if (irq->irq >= KVM_NR_INTERRUPTS)
3446                 return -EINVAL;
3447
3448         if (!irqchip_in_kernel(vcpu->kvm)) {
3449                 kvm_queue_interrupt(vcpu, irq->irq, false);
3450                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3451                 return 0;
3452         }
3453
3454         /*
3455          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3456          * fail for in-kernel 8259.
3457          */
3458         if (pic_in_kernel(vcpu->kvm))
3459                 return -ENXIO;
3460
3461         if (vcpu->arch.pending_external_vector != -1)
3462                 return -EEXIST;
3463
3464         vcpu->arch.pending_external_vector = irq->irq;
3465         kvm_make_request(KVM_REQ_EVENT, vcpu);
3466         return 0;
3467 }
3468
3469 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3470 {
3471         kvm_inject_nmi(vcpu);
3472
3473         return 0;
3474 }
3475
3476 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3477 {
3478         kvm_make_request(KVM_REQ_SMI, vcpu);
3479
3480         return 0;
3481 }
3482
3483 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3484                                            struct kvm_tpr_access_ctl *tac)
3485 {
3486         if (tac->flags)
3487                 return -EINVAL;
3488         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3489         return 0;
3490 }
3491
3492 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3493                                         u64 mcg_cap)
3494 {
3495         int r;
3496         unsigned bank_num = mcg_cap & 0xff, bank;
3497
3498         r = -EINVAL;
3499         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3500                 goto out;
3501         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3502                 goto out;
3503         r = 0;
3504         vcpu->arch.mcg_cap = mcg_cap;
3505         /* Init IA32_MCG_CTL to all 1s */
3506         if (mcg_cap & MCG_CTL_P)
3507                 vcpu->arch.mcg_ctl = ~(u64)0;
3508         /* Init IA32_MCi_CTL to all 1s */
3509         for (bank = 0; bank < bank_num; bank++)
3510                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3511
3512         if (kvm_x86_ops->setup_mce)
3513                 kvm_x86_ops->setup_mce(vcpu);
3514 out:
3515         return r;
3516 }
3517
3518 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3519                                       struct kvm_x86_mce *mce)
3520 {
3521         u64 mcg_cap = vcpu->arch.mcg_cap;
3522         unsigned bank_num = mcg_cap & 0xff;
3523         u64 *banks = vcpu->arch.mce_banks;
3524
3525         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3526                 return -EINVAL;
3527         /*
3528          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3529          * reporting is disabled
3530          */
3531         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3532             vcpu->arch.mcg_ctl != ~(u64)0)
3533                 return 0;
3534         banks += 4 * mce->bank;
3535         /*
3536          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3537          * reporting is disabled for the bank
3538          */
3539         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3540                 return 0;
3541         if (mce->status & MCI_STATUS_UC) {
3542                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3543                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3544                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3545                         return 0;
3546                 }
3547                 if (banks[1] & MCI_STATUS_VAL)
3548                         mce->status |= MCI_STATUS_OVER;
3549                 banks[2] = mce->addr;
3550                 banks[3] = mce->misc;
3551                 vcpu->arch.mcg_status = mce->mcg_status;
3552                 banks[1] = mce->status;
3553                 kvm_queue_exception(vcpu, MC_VECTOR);
3554         } else if (!(banks[1] & MCI_STATUS_VAL)
3555                    || !(banks[1] & MCI_STATUS_UC)) {
3556                 if (banks[1] & MCI_STATUS_VAL)
3557                         mce->status |= MCI_STATUS_OVER;
3558                 banks[2] = mce->addr;
3559                 banks[3] = mce->misc;
3560                 banks[1] = mce->status;
3561         } else
3562                 banks[1] |= MCI_STATUS_OVER;
3563         return 0;
3564 }
3565
3566 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3567                                                struct kvm_vcpu_events *events)
3568 {
3569         process_nmi(vcpu);
3570
3571         /*
3572          * The API doesn't provide the instruction length for software
3573          * exceptions, so don't report them. As long as the guest RIP
3574          * isn't advanced, we should expect to encounter the exception
3575          * again.
3576          */
3577         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3578                 events->exception.injected = 0;
3579                 events->exception.pending = 0;
3580         } else {
3581                 events->exception.injected = vcpu->arch.exception.injected;
3582                 events->exception.pending = vcpu->arch.exception.pending;
3583                 /*
3584                  * For ABI compatibility, deliberately conflate
3585                  * pending and injected exceptions when
3586                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3587                  */
3588                 if (!vcpu->kvm->arch.exception_payload_enabled)
3589                         events->exception.injected |=
3590                                 vcpu->arch.exception.pending;
3591         }
3592         events->exception.nr = vcpu->arch.exception.nr;
3593         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3594         events->exception.error_code = vcpu->arch.exception.error_code;
3595         events->exception_has_payload = vcpu->arch.exception.has_payload;
3596         events->exception_payload = vcpu->arch.exception.payload;
3597
3598         events->interrupt.injected =
3599                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3600         events->interrupt.nr = vcpu->arch.interrupt.nr;
3601         events->interrupt.soft = 0;
3602         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3603
3604         events->nmi.injected = vcpu->arch.nmi_injected;
3605         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3606         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3607         events->nmi.pad = 0;
3608
3609         events->sipi_vector = 0; /* never valid when reporting to user space */
3610
3611         events->smi.smm = is_smm(vcpu);
3612         events->smi.pending = vcpu->arch.smi_pending;
3613         events->smi.smm_inside_nmi =
3614                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3615         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3616
3617         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3618                          | KVM_VCPUEVENT_VALID_SHADOW
3619                          | KVM_VCPUEVENT_VALID_SMM);
3620         if (vcpu->kvm->arch.exception_payload_enabled)
3621                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3622
3623         memset(&events->reserved, 0, sizeof(events->reserved));
3624 }
3625
3626 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3627
3628 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3629                                               struct kvm_vcpu_events *events)
3630 {
3631         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3632                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3633                               | KVM_VCPUEVENT_VALID_SHADOW
3634                               | KVM_VCPUEVENT_VALID_SMM
3635                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3636                 return -EINVAL;
3637
3638         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3639                 if (!vcpu->kvm->arch.exception_payload_enabled)
3640                         return -EINVAL;
3641                 if (events->exception.pending)
3642                         events->exception.injected = 0;
3643                 else
3644                         events->exception_has_payload = 0;
3645         } else {
3646                 events->exception.pending = 0;
3647                 events->exception_has_payload = 0;
3648         }
3649
3650         if ((events->exception.injected || events->exception.pending) &&
3651             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3652                 return -EINVAL;
3653
3654         /* INITs are latched while in SMM */
3655         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3656             (events->smi.smm || events->smi.pending) &&
3657             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3658                 return -EINVAL;
3659
3660         process_nmi(vcpu);
3661         vcpu->arch.exception.injected = events->exception.injected;
3662         vcpu->arch.exception.pending = events->exception.pending;
3663         vcpu->arch.exception.nr = events->exception.nr;
3664         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3665         vcpu->arch.exception.error_code = events->exception.error_code;
3666         vcpu->arch.exception.has_payload = events->exception_has_payload;
3667         vcpu->arch.exception.payload = events->exception_payload;
3668
3669         vcpu->arch.interrupt.injected = events->interrupt.injected;
3670         vcpu->arch.interrupt.nr = events->interrupt.nr;
3671         vcpu->arch.interrupt.soft = events->interrupt.soft;
3672         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3673                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3674                                                   events->interrupt.shadow);
3675
3676         vcpu->arch.nmi_injected = events->nmi.injected;
3677         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3678                 vcpu->arch.nmi_pending = events->nmi.pending;
3679         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3680
3681         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3682             lapic_in_kernel(vcpu))
3683                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3684
3685         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3686                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3687                         if (events->smi.smm)
3688                                 vcpu->arch.hflags |= HF_SMM_MASK;
3689                         else
3690                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3691                         kvm_smm_changed(vcpu);
3692                 }
3693
3694                 vcpu->arch.smi_pending = events->smi.pending;
3695
3696                 if (events->smi.smm) {
3697                         if (events->smi.smm_inside_nmi)
3698                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3699                         else
3700                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3701                         if (lapic_in_kernel(vcpu)) {
3702                                 if (events->smi.latched_init)
3703                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3704                                 else
3705                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3706                         }
3707                 }
3708         }
3709
3710         kvm_make_request(KVM_REQ_EVENT, vcpu);
3711
3712         return 0;
3713 }
3714
3715 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3716                                              struct kvm_debugregs *dbgregs)
3717 {
3718         unsigned long val;
3719
3720         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3721         kvm_get_dr(vcpu, 6, &val);
3722         dbgregs->dr6 = val;
3723         dbgregs->dr7 = vcpu->arch.dr7;
3724         dbgregs->flags = 0;
3725         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3726 }
3727
3728 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3729                                             struct kvm_debugregs *dbgregs)
3730 {
3731         if (dbgregs->flags)
3732                 return -EINVAL;
3733
3734         if (dbgregs->dr6 & ~0xffffffffull)
3735                 return -EINVAL;
3736         if (dbgregs->dr7 & ~0xffffffffull)
3737                 return -EINVAL;
3738
3739         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3740         kvm_update_dr0123(vcpu);
3741         vcpu->arch.dr6 = dbgregs->dr6;
3742         kvm_update_dr6(vcpu);
3743         vcpu->arch.dr7 = dbgregs->dr7;
3744         kvm_update_dr7(vcpu);
3745
3746         return 0;
3747 }
3748
3749 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3750
3751 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3752 {
3753         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3754         u64 xstate_bv = xsave->header.xfeatures;
3755         u64 valid;
3756
3757         /*
3758          * Copy legacy XSAVE area, to avoid complications with CPUID
3759          * leaves 0 and 1 in the loop below.
3760          */
3761         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3762
3763         /* Set XSTATE_BV */
3764         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3765         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3766
3767         /*
3768          * Copy each region from the possibly compacted offset to the
3769          * non-compacted offset.
3770          */
3771         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3772         while (valid) {
3773                 u64 xfeature_mask = valid & -valid;
3774                 int xfeature_nr = fls64(xfeature_mask) - 1;
3775                 void *src = get_xsave_addr(xsave, xfeature_nr);
3776
3777                 if (src) {
3778                         u32 size, offset, ecx, edx;
3779                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3780                                     &size, &offset, &ecx, &edx);
3781                         if (xfeature_nr == XFEATURE_PKRU)
3782                                 memcpy(dest + offset, &vcpu->arch.pkru,
3783                                        sizeof(vcpu->arch.pkru));
3784                         else
3785                                 memcpy(dest + offset, src, size);
3786
3787                 }
3788
3789                 valid -= xfeature_mask;
3790         }
3791 }
3792
3793 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3794 {
3795         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3796         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3797         u64 valid;
3798
3799         /*
3800          * Copy legacy XSAVE area, to avoid complications with CPUID
3801          * leaves 0 and 1 in the loop below.
3802          */
3803         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3804
3805         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3806         xsave->header.xfeatures = xstate_bv;
3807         if (boot_cpu_has(X86_FEATURE_XSAVES))
3808                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3809
3810         /*
3811          * Copy each region from the non-compacted offset to the
3812          * possibly compacted offset.
3813          */
3814         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3815         while (valid) {
3816                 u64 xfeature_mask = valid & -valid;
3817                 int xfeature_nr = fls64(xfeature_mask) - 1;
3818                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3819
3820                 if (dest) {
3821                         u32 size, offset, ecx, edx;
3822                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3823                                     &size, &offset, &ecx, &edx);
3824                         if (xfeature_nr == XFEATURE_PKRU)
3825                                 memcpy(&vcpu->arch.pkru, src + offset,
3826                                        sizeof(vcpu->arch.pkru));
3827                         else
3828                                 memcpy(dest, src + offset, size);
3829                 }
3830
3831                 valid -= xfeature_mask;
3832         }
3833 }
3834
3835 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3836                                          struct kvm_xsave *guest_xsave)
3837 {
3838         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3839                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3840                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3841         } else {
3842                 memcpy(guest_xsave->region,
3843                         &vcpu->arch.guest_fpu->state.fxsave,
3844                         sizeof(struct fxregs_state));
3845                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3846                         XFEATURE_MASK_FPSSE;
3847         }
3848 }
3849
3850 #define XSAVE_MXCSR_OFFSET 24
3851
3852 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3853                                         struct kvm_xsave *guest_xsave)
3854 {
3855         u64 xstate_bv =
3856                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3857         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3858
3859         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3860                 /*
3861                  * Here we allow setting states that are not present in
3862                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3863                  * with old userspace.
3864                  */
3865                 if (xstate_bv & ~kvm_supported_xcr0() ||
3866                         mxcsr & ~mxcsr_feature_mask)
3867                         return -EINVAL;
3868                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3869         } else {
3870                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3871                         mxcsr & ~mxcsr_feature_mask)
3872                         return -EINVAL;
3873                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3874                         guest_xsave->region, sizeof(struct fxregs_state));
3875         }
3876         return 0;
3877 }
3878
3879 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3880                                         struct kvm_xcrs *guest_xcrs)
3881 {
3882         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3883                 guest_xcrs->nr_xcrs = 0;
3884                 return;
3885         }
3886
3887         guest_xcrs->nr_xcrs = 1;
3888         guest_xcrs->flags = 0;
3889         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3890         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3891 }
3892
3893 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3894                                        struct kvm_xcrs *guest_xcrs)
3895 {
3896         int i, r = 0;
3897
3898         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3899                 return -EINVAL;
3900
3901         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3902                 return -EINVAL;
3903
3904         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3905                 /* Only support XCR0 currently */
3906                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3907                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3908                                 guest_xcrs->xcrs[i].value);
3909                         break;
3910                 }
3911         if (r)
3912                 r = -EINVAL;
3913         return r;
3914 }
3915
3916 /*
3917  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3918  * stopped by the hypervisor.  This function will be called from the host only.
3919  * EINVAL is returned when the host attempts to set the flag for a guest that
3920  * does not support pv clocks.
3921  */
3922 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3923 {
3924         if (!vcpu->arch.pv_time_enabled)
3925                 return -EINVAL;
3926         vcpu->arch.pvclock_set_guest_stopped_request = true;
3927         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3928         return 0;
3929 }
3930
3931 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3932                                      struct kvm_enable_cap *cap)
3933 {
3934         int r;
3935         uint16_t vmcs_version;
3936         void __user *user_ptr;
3937
3938         if (cap->flags)
3939                 return -EINVAL;
3940
3941         switch (cap->cap) {
3942         case KVM_CAP_HYPERV_SYNIC2:
3943                 if (cap->args[0])
3944                         return -EINVAL;
3945                 /* fall through */
3946
3947         case KVM_CAP_HYPERV_SYNIC:
3948                 if (!irqchip_in_kernel(vcpu->kvm))
3949                         return -EINVAL;
3950                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3951                                              KVM_CAP_HYPERV_SYNIC2);
3952         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3953                 if (!kvm_x86_ops->nested_enable_evmcs)
3954                         return -ENOTTY;
3955                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
3956                 if (!r) {
3957                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
3958                         if (copy_to_user(user_ptr, &vmcs_version,
3959                                          sizeof(vmcs_version)))
3960                                 r = -EFAULT;
3961                 }
3962                 return r;
3963
3964         default:
3965                 return -EINVAL;
3966         }
3967 }
3968
3969 long kvm_arch_vcpu_ioctl(struct file *filp,
3970                          unsigned int ioctl, unsigned long arg)
3971 {
3972         struct kvm_vcpu *vcpu = filp->private_data;
3973         void __user *argp = (void __user *)arg;
3974         int r;
3975         union {
3976                 struct kvm_lapic_state *lapic;
3977                 struct kvm_xsave *xsave;
3978                 struct kvm_xcrs *xcrs;
3979                 void *buffer;
3980         } u;
3981
3982         vcpu_load(vcpu);
3983
3984         u.buffer = NULL;
3985         switch (ioctl) {
3986         case KVM_GET_LAPIC: {
3987                 r = -EINVAL;
3988                 if (!lapic_in_kernel(vcpu))
3989                         goto out;
3990                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
3991                                 GFP_KERNEL_ACCOUNT);
3992
3993                 r = -ENOMEM;
3994                 if (!u.lapic)
3995                         goto out;
3996                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3997                 if (r)
3998                         goto out;
3999                 r = -EFAULT;
4000                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4001                         goto out;
4002                 r = 0;
4003                 break;
4004         }
4005         case KVM_SET_LAPIC: {
4006                 r = -EINVAL;
4007                 if (!lapic_in_kernel(vcpu))
4008                         goto out;
4009                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4010                 if (IS_ERR(u.lapic)) {
4011                         r = PTR_ERR(u.lapic);
4012                         goto out_nofree;
4013                 }
4014
4015                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4016                 break;
4017         }
4018         case KVM_INTERRUPT: {
4019                 struct kvm_interrupt irq;
4020
4021                 r = -EFAULT;
4022                 if (copy_from_user(&irq, argp, sizeof(irq)))
4023                         goto out;
4024                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4025                 break;
4026         }
4027         case KVM_NMI: {
4028                 r = kvm_vcpu_ioctl_nmi(vcpu);
4029                 break;
4030         }
4031         case KVM_SMI: {
4032                 r = kvm_vcpu_ioctl_smi(vcpu);
4033                 break;
4034         }
4035         case KVM_SET_CPUID: {
4036                 struct kvm_cpuid __user *cpuid_arg = argp;
4037                 struct kvm_cpuid cpuid;
4038
4039                 r = -EFAULT;
4040                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4041                         goto out;
4042                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4043                 break;
4044         }
4045         case KVM_SET_CPUID2: {
4046                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4047                 struct kvm_cpuid2 cpuid;
4048
4049                 r = -EFAULT;
4050                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4051                         goto out;
4052                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4053                                               cpuid_arg->entries);
4054                 break;
4055         }
4056         case KVM_GET_CPUID2: {
4057                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4058                 struct kvm_cpuid2 cpuid;
4059
4060                 r = -EFAULT;
4061                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4062                         goto out;
4063                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4064                                               cpuid_arg->entries);
4065                 if (r)
4066                         goto out;
4067                 r = -EFAULT;
4068                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4069                         goto out;
4070                 r = 0;
4071                 break;
4072         }
4073         case KVM_GET_MSRS: {
4074                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4075                 r = msr_io(vcpu, argp, do_get_msr, 1);
4076                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4077                 break;
4078         }
4079         case KVM_SET_MSRS: {
4080                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4081                 r = msr_io(vcpu, argp, do_set_msr, 0);
4082                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4083                 break;
4084         }
4085         case KVM_TPR_ACCESS_REPORTING: {
4086                 struct kvm_tpr_access_ctl tac;
4087
4088                 r = -EFAULT;
4089                 if (copy_from_user(&tac, argp, sizeof(tac)))
4090                         goto out;
4091                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4092                 if (r)
4093                         goto out;
4094                 r = -EFAULT;
4095                 if (copy_to_user(argp, &tac, sizeof(tac)))
4096                         goto out;
4097                 r = 0;
4098                 break;
4099         };
4100         case KVM_SET_VAPIC_ADDR: {
4101                 struct kvm_vapic_addr va;
4102                 int idx;
4103
4104                 r = -EINVAL;
4105                 if (!lapic_in_kernel(vcpu))
4106                         goto out;
4107                 r = -EFAULT;
4108                 if (copy_from_user(&va, argp, sizeof(va)))
4109                         goto out;
4110                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4111                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4112                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4113                 break;
4114         }
4115         case KVM_X86_SETUP_MCE: {
4116                 u64 mcg_cap;
4117
4118                 r = -EFAULT;
4119                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4120                         goto out;
4121                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4122                 break;
4123         }
4124         case KVM_X86_SET_MCE: {
4125                 struct kvm_x86_mce mce;
4126
4127                 r = -EFAULT;
4128                 if (copy_from_user(&mce, argp, sizeof(mce)))
4129                         goto out;
4130                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4131                 break;
4132         }
4133         case KVM_GET_VCPU_EVENTS: {
4134                 struct kvm_vcpu_events events;
4135
4136                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4137
4138                 r = -EFAULT;
4139                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4140                         break;
4141                 r = 0;
4142                 break;
4143         }
4144         case KVM_SET_VCPU_EVENTS: {
4145                 struct kvm_vcpu_events events;
4146
4147                 r = -EFAULT;
4148                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4149                         break;
4150
4151                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4152                 break;
4153         }
4154         case KVM_GET_DEBUGREGS: {
4155                 struct kvm_debugregs dbgregs;
4156
4157                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4158
4159                 r = -EFAULT;
4160                 if (copy_to_user(argp, &dbgregs,
4161                                  sizeof(struct kvm_debugregs)))
4162                         break;
4163                 r = 0;
4164                 break;
4165         }
4166         case KVM_SET_DEBUGREGS: {
4167                 struct kvm_debugregs dbgregs;
4168
4169                 r = -EFAULT;
4170                 if (copy_from_user(&dbgregs, argp,
4171                                    sizeof(struct kvm_debugregs)))
4172                         break;
4173
4174                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4175                 break;
4176         }
4177         case KVM_GET_XSAVE: {
4178                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4179                 r = -ENOMEM;
4180                 if (!u.xsave)
4181                         break;
4182
4183                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4184
4185                 r = -EFAULT;
4186                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4187                         break;
4188                 r = 0;
4189                 break;
4190         }
4191         case KVM_SET_XSAVE: {
4192                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4193                 if (IS_ERR(u.xsave)) {
4194                         r = PTR_ERR(u.xsave);
4195                         goto out_nofree;
4196                 }
4197
4198                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4199                 break;
4200         }
4201         case KVM_GET_XCRS: {
4202                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4203                 r = -ENOMEM;
4204                 if (!u.xcrs)
4205                         break;
4206
4207                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4208
4209                 r = -EFAULT;
4210                 if (copy_to_user(argp, u.xcrs,
4211                                  sizeof(struct kvm_xcrs)))
4212                         break;
4213                 r = 0;
4214                 break;
4215         }
4216         case KVM_SET_XCRS: {
4217                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4218                 if (IS_ERR(u.xcrs)) {
4219                         r = PTR_ERR(u.xcrs);
4220                         goto out_nofree;
4221                 }
4222
4223                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4224                 break;
4225         }
4226         case KVM_SET_TSC_KHZ: {
4227                 u32 user_tsc_khz;
4228
4229                 r = -EINVAL;
4230                 user_tsc_khz = (u32)arg;
4231
4232                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4233                         goto out;
4234
4235                 if (user_tsc_khz == 0)
4236                         user_tsc_khz = tsc_khz;
4237
4238                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4239                         r = 0;
4240
4241                 goto out;
4242         }
4243         case KVM_GET_TSC_KHZ: {
4244                 r = vcpu->arch.virtual_tsc_khz;
4245                 goto out;
4246         }
4247         case KVM_KVMCLOCK_CTRL: {
4248                 r = kvm_set_guest_paused(vcpu);
4249                 goto out;
4250         }
4251         case KVM_ENABLE_CAP: {
4252                 struct kvm_enable_cap cap;
4253
4254                 r = -EFAULT;
4255                 if (copy_from_user(&cap, argp, sizeof(cap)))
4256                         goto out;
4257                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4258                 break;
4259         }
4260         case KVM_GET_NESTED_STATE: {
4261                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4262                 u32 user_data_size;
4263
4264                 r = -EINVAL;
4265                 if (!kvm_x86_ops->get_nested_state)
4266                         break;
4267
4268                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4269                 r = -EFAULT;
4270                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4271                         break;
4272
4273                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4274                                                   user_data_size);
4275                 if (r < 0)
4276                         break;
4277
4278                 if (r > user_data_size) {
4279                         if (put_user(r, &user_kvm_nested_state->size))
4280                                 r = -EFAULT;
4281                         else
4282                                 r = -E2BIG;
4283                         break;
4284                 }
4285
4286                 r = 0;
4287                 break;
4288         }
4289         case KVM_SET_NESTED_STATE: {
4290                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4291                 struct kvm_nested_state kvm_state;
4292
4293                 r = -EINVAL;
4294                 if (!kvm_x86_ops->set_nested_state)
4295                         break;
4296
4297                 r = -EFAULT;
4298                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4299                         break;
4300
4301                 r = -EINVAL;
4302                 if (kvm_state.size < sizeof(kvm_state))
4303                         break;
4304
4305                 if (kvm_state.flags &
4306                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4307                       | KVM_STATE_NESTED_EVMCS))
4308                         break;
4309
4310                 /* nested_run_pending implies guest_mode.  */
4311                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4312                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4313                         break;
4314
4315                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4316                 break;
4317         }
4318         case KVM_GET_SUPPORTED_HV_CPUID: {
4319                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4320                 struct kvm_cpuid2 cpuid;
4321
4322                 r = -EFAULT;
4323                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4324                         goto out;
4325
4326                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4327                                                 cpuid_arg->entries);
4328                 if (r)
4329                         goto out;
4330
4331                 r = -EFAULT;
4332                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4333                         goto out;
4334                 r = 0;
4335                 break;
4336         }
4337         default:
4338                 r = -EINVAL;
4339         }
4340 out:
4341         kfree(u.buffer);
4342 out_nofree:
4343         vcpu_put(vcpu);
4344         return r;
4345 }
4346
4347 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4348 {
4349         return VM_FAULT_SIGBUS;
4350 }
4351
4352 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4353 {
4354         int ret;
4355
4356         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4357                 return -EINVAL;
4358         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4359         return ret;
4360 }
4361
4362 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4363                                               u64 ident_addr)
4364 {
4365         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4366 }
4367
4368 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4369                                          unsigned long kvm_nr_mmu_pages)
4370 {
4371         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4372                 return -EINVAL;
4373
4374         mutex_lock(&kvm->slots_lock);
4375
4376         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4377         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4378
4379         mutex_unlock(&kvm->slots_lock);
4380         return 0;
4381 }
4382
4383 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4384 {
4385         return kvm->arch.n_max_mmu_pages;
4386 }
4387
4388 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4389 {
4390         struct kvm_pic *pic = kvm->arch.vpic;
4391         int r;
4392
4393         r = 0;
4394         switch (chip->chip_id) {
4395         case KVM_IRQCHIP_PIC_MASTER:
4396                 memcpy(&chip->chip.pic, &pic->pics[0],
4397                         sizeof(struct kvm_pic_state));
4398                 break;
4399         case KVM_IRQCHIP_PIC_SLAVE:
4400                 memcpy(&chip->chip.pic, &pic->pics[1],
4401                         sizeof(struct kvm_pic_state));
4402                 break;
4403         case KVM_IRQCHIP_IOAPIC:
4404                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4405                 break;
4406         default:
4407                 r = -EINVAL;
4408                 break;
4409         }
4410         return r;
4411 }
4412
4413 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4414 {
4415         struct kvm_pic *pic = kvm->arch.vpic;
4416         int r;
4417
4418         r = 0;
4419         switch (chip->chip_id) {
4420         case KVM_IRQCHIP_PIC_MASTER:
4421                 spin_lock(&pic->lock);
4422                 memcpy(&pic->pics[0], &chip->chip.pic,
4423                         sizeof(struct kvm_pic_state));
4424                 spin_unlock(&pic->lock);
4425                 break;
4426         case KVM_IRQCHIP_PIC_SLAVE:
4427                 spin_lock(&pic->lock);
4428                 memcpy(&pic->pics[1], &chip->chip.pic,
4429                         sizeof(struct kvm_pic_state));
4430                 spin_unlock(&pic->lock);
4431                 break;
4432         case KVM_IRQCHIP_IOAPIC:
4433                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4434                 break;
4435         default:
4436                 r = -EINVAL;
4437                 break;
4438         }
4439         kvm_pic_update_irq(pic);
4440         return r;
4441 }
4442
4443 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4444 {
4445         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4446
4447         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4448
4449         mutex_lock(&kps->lock);
4450         memcpy(ps, &kps->channels, sizeof(*ps));
4451         mutex_unlock(&kps->lock);
4452         return 0;
4453 }
4454
4455 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4456 {
4457         int i;
4458         struct kvm_pit *pit = kvm->arch.vpit;
4459
4460         mutex_lock(&pit->pit_state.lock);
4461         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4462         for (i = 0; i < 3; i++)
4463                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4464         mutex_unlock(&pit->pit_state.lock);
4465         return 0;
4466 }
4467
4468 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4469 {
4470         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4471         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4472                 sizeof(ps->channels));
4473         ps->flags = kvm->arch.vpit->pit_state.flags;
4474         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4475         memset(&ps->reserved, 0, sizeof(ps->reserved));
4476         return 0;
4477 }
4478
4479 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4480 {
4481         int start = 0;
4482         int i;
4483         u32 prev_legacy, cur_legacy;
4484         struct kvm_pit *pit = kvm->arch.vpit;
4485
4486         mutex_lock(&pit->pit_state.lock);
4487         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4488         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4489         if (!prev_legacy && cur_legacy)
4490                 start = 1;
4491         memcpy(&pit->pit_state.channels, &ps->channels,
4492                sizeof(pit->pit_state.channels));
4493         pit->pit_state.flags = ps->flags;
4494         for (i = 0; i < 3; i++)
4495                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4496                                    start && i == 0);
4497         mutex_unlock(&pit->pit_state.lock);
4498         return 0;
4499 }
4500
4501 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4502                                  struct kvm_reinject_control *control)
4503 {
4504         struct kvm_pit *pit = kvm->arch.vpit;
4505
4506         if (!pit)
4507                 return -ENXIO;
4508
4509         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4510          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4511          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4512          */
4513         mutex_lock(&pit->pit_state.lock);
4514         kvm_pit_set_reinject(pit, control->pit_reinject);
4515         mutex_unlock(&pit->pit_state.lock);
4516
4517         return 0;
4518 }
4519
4520 /**
4521  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4522  * @kvm: kvm instance
4523  * @log: slot id and address to which we copy the log
4524  *
4525  * Steps 1-4 below provide general overview of dirty page logging. See
4526  * kvm_get_dirty_log_protect() function description for additional details.
4527  *
4528  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4529  * always flush the TLB (step 4) even if previous step failed  and the dirty
4530  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4531  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4532  * writes will be marked dirty for next log read.
4533  *
4534  *   1. Take a snapshot of the bit and clear it if needed.
4535  *   2. Write protect the corresponding page.
4536  *   3. Copy the snapshot to the userspace.
4537  *   4. Flush TLB's if needed.
4538  */
4539 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4540 {
4541         bool flush = false;
4542         int r;
4543
4544         mutex_lock(&kvm->slots_lock);
4545
4546         /*
4547          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4548          */
4549         if (kvm_x86_ops->flush_log_dirty)
4550                 kvm_x86_ops->flush_log_dirty(kvm);
4551
4552         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4553
4554         /*
4555          * All the TLBs can be flushed out of mmu lock, see the comments in
4556          * kvm_mmu_slot_remove_write_access().
4557          */
4558         lockdep_assert_held(&kvm->slots_lock);
4559         if (flush)
4560                 kvm_flush_remote_tlbs(kvm);
4561
4562         mutex_unlock(&kvm->slots_lock);
4563         return r;
4564 }
4565
4566 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4567 {
4568         bool flush = false;
4569         int r;
4570
4571         mutex_lock(&kvm->slots_lock);
4572
4573         /*
4574          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4575          */
4576         if (kvm_x86_ops->flush_log_dirty)
4577                 kvm_x86_ops->flush_log_dirty(kvm);
4578
4579         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4580
4581         /*
4582          * All the TLBs can be flushed out of mmu lock, see the comments in
4583          * kvm_mmu_slot_remove_write_access().
4584          */
4585         lockdep_assert_held(&kvm->slots_lock);
4586         if (flush)
4587                 kvm_flush_remote_tlbs(kvm);
4588
4589         mutex_unlock(&kvm->slots_lock);
4590         return r;
4591 }
4592
4593 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4594                         bool line_status)
4595 {
4596         if (!irqchip_in_kernel(kvm))
4597                 return -ENXIO;
4598
4599         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4600                                         irq_event->irq, irq_event->level,
4601                                         line_status);
4602         return 0;
4603 }
4604
4605 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4606                             struct kvm_enable_cap *cap)
4607 {
4608         int r;
4609
4610         if (cap->flags)
4611                 return -EINVAL;
4612
4613         switch (cap->cap) {
4614         case KVM_CAP_DISABLE_QUIRKS:
4615                 kvm->arch.disabled_quirks = cap->args[0];
4616                 r = 0;
4617                 break;
4618         case KVM_CAP_SPLIT_IRQCHIP: {
4619                 mutex_lock(&kvm->lock);
4620                 r = -EINVAL;
4621                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4622                         goto split_irqchip_unlock;
4623                 r = -EEXIST;
4624                 if (irqchip_in_kernel(kvm))
4625                         goto split_irqchip_unlock;
4626                 if (kvm->created_vcpus)
4627                         goto split_irqchip_unlock;
4628                 r = kvm_setup_empty_irq_routing(kvm);
4629                 if (r)
4630                         goto split_irqchip_unlock;
4631                 /* Pairs with irqchip_in_kernel. */
4632                 smp_wmb();
4633                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4634                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4635                 r = 0;
4636 split_irqchip_unlock:
4637                 mutex_unlock(&kvm->lock);
4638                 break;
4639         }
4640         case KVM_CAP_X2APIC_API:
4641                 r = -EINVAL;
4642                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4643                         break;
4644
4645                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4646                         kvm->arch.x2apic_format = true;
4647                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4648                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4649
4650                 r = 0;
4651                 break;
4652         case KVM_CAP_X86_DISABLE_EXITS:
4653                 r = -EINVAL;
4654                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4655                         break;
4656
4657                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4658                         kvm_can_mwait_in_guest())
4659                         kvm->arch.mwait_in_guest = true;
4660                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4661                         kvm->arch.hlt_in_guest = true;
4662                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4663                         kvm->arch.pause_in_guest = true;
4664                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4665                         kvm->arch.cstate_in_guest = true;
4666                 r = 0;
4667                 break;
4668         case KVM_CAP_MSR_PLATFORM_INFO:
4669                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4670                 r = 0;
4671                 break;
4672         case KVM_CAP_EXCEPTION_PAYLOAD:
4673                 kvm->arch.exception_payload_enabled = cap->args[0];
4674                 r = 0;
4675                 break;
4676         default:
4677                 r = -EINVAL;
4678                 break;
4679         }
4680         return r;
4681 }
4682
4683 long kvm_arch_vm_ioctl(struct file *filp,
4684                        unsigned int ioctl, unsigned long arg)
4685 {
4686         struct kvm *kvm = filp->private_data;
4687         void __user *argp = (void __user *)arg;
4688         int r = -ENOTTY;
4689         /*
4690          * This union makes it completely explicit to gcc-3.x
4691          * that these two variables' stack usage should be
4692          * combined, not added together.
4693          */
4694         union {
4695                 struct kvm_pit_state ps;
4696                 struct kvm_pit_state2 ps2;
4697                 struct kvm_pit_config pit_config;
4698         } u;
4699
4700         switch (ioctl) {
4701         case KVM_SET_TSS_ADDR:
4702                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4703                 break;
4704         case KVM_SET_IDENTITY_MAP_ADDR: {
4705                 u64 ident_addr;
4706
4707                 mutex_lock(&kvm->lock);
4708                 r = -EINVAL;
4709                 if (kvm->created_vcpus)
4710                         goto set_identity_unlock;
4711                 r = -EFAULT;
4712                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4713                         goto set_identity_unlock;
4714                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4715 set_identity_unlock:
4716                 mutex_unlock(&kvm->lock);
4717                 break;
4718         }
4719         case KVM_SET_NR_MMU_PAGES:
4720                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4721                 break;
4722         case KVM_GET_NR_MMU_PAGES:
4723                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4724                 break;
4725         case KVM_CREATE_IRQCHIP: {
4726                 mutex_lock(&kvm->lock);
4727
4728                 r = -EEXIST;
4729                 if (irqchip_in_kernel(kvm))
4730                         goto create_irqchip_unlock;
4731
4732                 r = -EINVAL;
4733                 if (kvm->created_vcpus)
4734                         goto create_irqchip_unlock;
4735
4736                 r = kvm_pic_init(kvm);
4737                 if (r)
4738                         goto create_irqchip_unlock;
4739
4740                 r = kvm_ioapic_init(kvm);
4741                 if (r) {
4742                         kvm_pic_destroy(kvm);
4743                         goto create_irqchip_unlock;
4744                 }
4745
4746                 r = kvm_setup_default_irq_routing(kvm);
4747                 if (r) {
4748                         kvm_ioapic_destroy(kvm);
4749                         kvm_pic_destroy(kvm);
4750                         goto create_irqchip_unlock;
4751                 }
4752                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4753                 smp_wmb();
4754                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4755         create_irqchip_unlock:
4756                 mutex_unlock(&kvm->lock);
4757                 break;
4758         }
4759         case KVM_CREATE_PIT:
4760                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4761                 goto create_pit;
4762         case KVM_CREATE_PIT2:
4763                 r = -EFAULT;
4764                 if (copy_from_user(&u.pit_config, argp,
4765                                    sizeof(struct kvm_pit_config)))
4766                         goto out;
4767         create_pit:
4768                 mutex_lock(&kvm->lock);
4769                 r = -EEXIST;
4770                 if (kvm->arch.vpit)
4771                         goto create_pit_unlock;
4772                 r = -ENOMEM;
4773                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4774                 if (kvm->arch.vpit)
4775                         r = 0;
4776         create_pit_unlock:
4777                 mutex_unlock(&kvm->lock);
4778                 break;
4779         case KVM_GET_IRQCHIP: {
4780                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4781                 struct kvm_irqchip *chip;
4782
4783                 chip = memdup_user(argp, sizeof(*chip));
4784                 if (IS_ERR(chip)) {
4785                         r = PTR_ERR(chip);
4786                         goto out;
4787                 }
4788
4789                 r = -ENXIO;
4790                 if (!irqchip_kernel(kvm))
4791                         goto get_irqchip_out;
4792                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4793                 if (r)
4794                         goto get_irqchip_out;
4795                 r = -EFAULT;
4796                 if (copy_to_user(argp, chip, sizeof(*chip)))
4797                         goto get_irqchip_out;
4798                 r = 0;
4799         get_irqchip_out:
4800                 kfree(chip);
4801                 break;
4802         }
4803         case KVM_SET_IRQCHIP: {
4804                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4805                 struct kvm_irqchip *chip;
4806
4807                 chip = memdup_user(argp, sizeof(*chip));
4808                 if (IS_ERR(chip)) {
4809                         r = PTR_ERR(chip);
4810                         goto out;
4811                 }
4812
4813                 r = -ENXIO;
4814                 if (!irqchip_kernel(kvm))
4815                         goto set_irqchip_out;
4816                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4817                 if (r)
4818                         goto set_irqchip_out;
4819                 r = 0;
4820         set_irqchip_out:
4821                 kfree(chip);
4822                 break;
4823         }
4824         case KVM_GET_PIT: {
4825                 r = -EFAULT;
4826                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4827                         goto out;
4828                 r = -ENXIO;
4829                 if (!kvm->arch.vpit)
4830                         goto out;
4831                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4832                 if (r)
4833                         goto out;
4834                 r = -EFAULT;
4835                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4836                         goto out;
4837                 r = 0;
4838                 break;
4839         }
4840         case KVM_SET_PIT: {
4841                 r = -EFAULT;
4842                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4843                         goto out;
4844                 r = -ENXIO;
4845                 if (!kvm->arch.vpit)
4846                         goto out;
4847                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4848                 break;
4849         }
4850         case KVM_GET_PIT2: {
4851                 r = -ENXIO;
4852                 if (!kvm->arch.vpit)
4853                         goto out;
4854                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4855                 if (r)
4856                         goto out;
4857                 r = -EFAULT;
4858                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4859                         goto out;
4860                 r = 0;
4861                 break;
4862         }
4863         case KVM_SET_PIT2: {
4864                 r = -EFAULT;
4865                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4866                         goto out;
4867                 r = -ENXIO;
4868                 if (!kvm->arch.vpit)
4869                         goto out;
4870                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4871                 break;
4872         }
4873         case KVM_REINJECT_CONTROL: {
4874                 struct kvm_reinject_control control;
4875                 r =  -EFAULT;
4876                 if (copy_from_user(&control, argp, sizeof(control)))
4877                         goto out;
4878                 r = kvm_vm_ioctl_reinject(kvm, &control);
4879                 break;
4880         }
4881         case KVM_SET_BOOT_CPU_ID:
4882                 r = 0;
4883                 mutex_lock(&kvm->lock);
4884                 if (kvm->created_vcpus)
4885                         r = -EBUSY;
4886                 else
4887                         kvm->arch.bsp_vcpu_id = arg;
4888                 mutex_unlock(&kvm->lock);
4889                 break;
4890         case KVM_XEN_HVM_CONFIG: {
4891                 struct kvm_xen_hvm_config xhc;
4892                 r = -EFAULT;
4893                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4894                         goto out;
4895                 r = -EINVAL;
4896                 if (xhc.flags)
4897                         goto out;
4898                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4899                 r = 0;
4900                 break;
4901         }
4902         case KVM_SET_CLOCK: {
4903                 struct kvm_clock_data user_ns;
4904                 u64 now_ns;
4905
4906                 r = -EFAULT;
4907                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4908                         goto out;
4909
4910                 r = -EINVAL;
4911                 if (user_ns.flags)
4912                         goto out;
4913
4914                 r = 0;
4915                 /*
4916                  * TODO: userspace has to take care of races with VCPU_RUN, so
4917                  * kvm_gen_update_masterclock() can be cut down to locked
4918                  * pvclock_update_vm_gtod_copy().
4919                  */
4920                 kvm_gen_update_masterclock(kvm);
4921                 now_ns = get_kvmclock_ns(kvm);
4922                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4923                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4924                 break;
4925         }
4926         case KVM_GET_CLOCK: {
4927                 struct kvm_clock_data user_ns;
4928                 u64 now_ns;
4929
4930                 now_ns = get_kvmclock_ns(kvm);
4931                 user_ns.clock = now_ns;
4932                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4933                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4934
4935                 r = -EFAULT;
4936                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4937                         goto out;
4938                 r = 0;
4939                 break;
4940         }
4941         case KVM_MEMORY_ENCRYPT_OP: {
4942                 r = -ENOTTY;
4943                 if (kvm_x86_ops->mem_enc_op)
4944                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4945                 break;
4946         }
4947         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4948                 struct kvm_enc_region region;
4949
4950                 r = -EFAULT;
4951                 if (copy_from_user(&region, argp, sizeof(region)))
4952                         goto out;
4953
4954                 r = -ENOTTY;
4955                 if (kvm_x86_ops->mem_enc_reg_region)
4956                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4957                 break;
4958         }
4959         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4960                 struct kvm_enc_region region;
4961
4962                 r = -EFAULT;
4963                 if (copy_from_user(&region, argp, sizeof(region)))
4964                         goto out;
4965
4966                 r = -ENOTTY;
4967                 if (kvm_x86_ops->mem_enc_unreg_region)
4968                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4969                 break;
4970         }
4971         case KVM_HYPERV_EVENTFD: {
4972                 struct kvm_hyperv_eventfd hvevfd;
4973
4974                 r = -EFAULT;
4975                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4976                         goto out;
4977                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4978                 break;
4979         }
4980         case KVM_SET_PMU_EVENT_FILTER:
4981                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
4982                 break;
4983         default:
4984                 r = -ENOTTY;
4985         }
4986 out:
4987         return r;
4988 }
4989
4990 static void kvm_init_msr_list(void)
4991 {
4992         u32 dummy[2];
4993         unsigned i, j;
4994
4995         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4996                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4997                         continue;
4998
4999                 /*
5000                  * Even MSRs that are valid in the host may not be exposed
5001                  * to the guests in some cases.
5002                  */
5003                 switch (msrs_to_save[i]) {
5004                 case MSR_IA32_BNDCFGS:
5005                         if (!kvm_mpx_supported())
5006                                 continue;
5007                         break;
5008                 case MSR_TSC_AUX:
5009                         if (!kvm_x86_ops->rdtscp_supported())
5010                                 continue;
5011                         break;
5012                 case MSR_IA32_RTIT_CTL:
5013                 case MSR_IA32_RTIT_STATUS:
5014                         if (!kvm_x86_ops->pt_supported())
5015                                 continue;
5016                         break;
5017                 case MSR_IA32_RTIT_CR3_MATCH:
5018                         if (!kvm_x86_ops->pt_supported() ||
5019                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5020                                 continue;
5021                         break;
5022                 case MSR_IA32_RTIT_OUTPUT_BASE:
5023                 case MSR_IA32_RTIT_OUTPUT_MASK:
5024                         if (!kvm_x86_ops->pt_supported() ||
5025                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5026                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5027                                 continue;
5028                         break;
5029                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5030                         if (!kvm_x86_ops->pt_supported() ||
5031                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5032                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5033                                 continue;
5034                         break;
5035                 }
5036                 default:
5037                         break;
5038                 }
5039
5040                 if (j < i)
5041                         msrs_to_save[j] = msrs_to_save[i];
5042                 j++;
5043         }
5044         num_msrs_to_save = j;
5045
5046         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5047                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5048                         continue;
5049
5050                 if (j < i)
5051                         emulated_msrs[j] = emulated_msrs[i];
5052                 j++;
5053         }
5054         num_emulated_msrs = j;
5055
5056         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5057                 struct kvm_msr_entry msr;
5058
5059                 msr.index = msr_based_features[i];
5060                 if (kvm_get_msr_feature(&msr))
5061                         continue;
5062
5063                 if (j < i)
5064                         msr_based_features[j] = msr_based_features[i];
5065                 j++;
5066         }
5067         num_msr_based_features = j;
5068 }
5069
5070 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5071                            const void *v)
5072 {
5073         int handled = 0;
5074         int n;
5075
5076         do {
5077                 n = min(len, 8);
5078                 if (!(lapic_in_kernel(vcpu) &&
5079                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5080                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5081                         break;
5082                 handled += n;
5083                 addr += n;
5084                 len -= n;
5085                 v += n;
5086         } while (len);
5087
5088         return handled;
5089 }
5090
5091 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5092 {
5093         int handled = 0;
5094         int n;
5095
5096         do {
5097                 n = min(len, 8);
5098                 if (!(lapic_in_kernel(vcpu) &&
5099                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5100                                          addr, n, v))
5101                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5102                         break;
5103                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5104                 handled += n;
5105                 addr += n;
5106                 len -= n;
5107                 v += n;
5108         } while (len);
5109
5110         return handled;
5111 }
5112
5113 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5114                         struct kvm_segment *var, int seg)
5115 {
5116         kvm_x86_ops->set_segment(vcpu, var, seg);
5117 }
5118
5119 void kvm_get_segment(struct kvm_vcpu *vcpu,
5120                      struct kvm_segment *var, int seg)
5121 {
5122         kvm_x86_ops->get_segment(vcpu, var, seg);
5123 }
5124
5125 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5126                            struct x86_exception *exception)
5127 {
5128         gpa_t t_gpa;
5129
5130         BUG_ON(!mmu_is_nested(vcpu));
5131
5132         /* NPT walks are always user-walks */
5133         access |= PFERR_USER_MASK;
5134         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5135
5136         return t_gpa;
5137 }
5138
5139 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5140                               struct x86_exception *exception)
5141 {
5142         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5143         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5144 }
5145
5146  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5147                                 struct x86_exception *exception)
5148 {
5149         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5150         access |= PFERR_FETCH_MASK;
5151         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5152 }
5153
5154 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5155                                struct x86_exception *exception)
5156 {
5157         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5158         access |= PFERR_WRITE_MASK;
5159         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5160 }
5161
5162 /* uses this to access any guest's mapped memory without checking CPL */
5163 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5164                                 struct x86_exception *exception)
5165 {
5166         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5167 }
5168
5169 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5170                                       struct kvm_vcpu *vcpu, u32 access,
5171                                       struct x86_exception *exception)
5172 {
5173         void *data = val;
5174         int r = X86EMUL_CONTINUE;
5175
5176         while (bytes) {
5177                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5178                                                             exception);
5179                 unsigned offset = addr & (PAGE_SIZE-1);
5180                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5181                 int ret;
5182
5183                 if (gpa == UNMAPPED_GVA)
5184                         return X86EMUL_PROPAGATE_FAULT;
5185                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5186                                                offset, toread);
5187                 if (ret < 0) {
5188                         r = X86EMUL_IO_NEEDED;
5189                         goto out;
5190                 }
5191
5192                 bytes -= toread;
5193                 data += toread;
5194                 addr += toread;
5195         }
5196 out:
5197         return r;
5198 }
5199
5200 /* used for instruction fetching */
5201 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5202                                 gva_t addr, void *val, unsigned int bytes,
5203                                 struct x86_exception *exception)
5204 {
5205         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5206         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5207         unsigned offset;
5208         int ret;
5209
5210         /* Inline kvm_read_guest_virt_helper for speed.  */
5211         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5212                                                     exception);
5213         if (unlikely(gpa == UNMAPPED_GVA))
5214                 return X86EMUL_PROPAGATE_FAULT;
5215
5216         offset = addr & (PAGE_SIZE-1);
5217         if (WARN_ON(offset + bytes > PAGE_SIZE))
5218                 bytes = (unsigned)PAGE_SIZE - offset;
5219         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5220                                        offset, bytes);
5221         if (unlikely(ret < 0))
5222                 return X86EMUL_IO_NEEDED;
5223
5224         return X86EMUL_CONTINUE;
5225 }
5226
5227 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5228                                gva_t addr, void *val, unsigned int bytes,
5229                                struct x86_exception *exception)
5230 {
5231         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5232
5233         /*
5234          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5235          * is returned, but our callers are not ready for that and they blindly
5236          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5237          * uninitialized kernel stack memory into cr2 and error code.
5238          */
5239         memset(exception, 0, sizeof(*exception));
5240         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5241                                           exception);
5242 }
5243 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5244
5245 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5246                              gva_t addr, void *val, unsigned int bytes,
5247                              struct x86_exception *exception, bool system)
5248 {
5249         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5250         u32 access = 0;
5251
5252         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5253                 access |= PFERR_USER_MASK;
5254
5255         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5256 }
5257
5258 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5259                 unsigned long addr, void *val, unsigned int bytes)
5260 {
5261         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5262         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5263
5264         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5265 }
5266
5267 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5268                                       struct kvm_vcpu *vcpu, u32 access,
5269                                       struct x86_exception *exception)
5270 {
5271         void *data = val;
5272         int r = X86EMUL_CONTINUE;
5273
5274         while (bytes) {
5275                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5276                                                              access,
5277                                                              exception);
5278                 unsigned offset = addr & (PAGE_SIZE-1);
5279                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5280                 int ret;
5281
5282                 if (gpa == UNMAPPED_GVA)
5283                         return X86EMUL_PROPAGATE_FAULT;
5284                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5285                 if (ret < 0) {
5286                         r = X86EMUL_IO_NEEDED;
5287                         goto out;
5288                 }
5289
5290                 bytes -= towrite;
5291                 data += towrite;
5292                 addr += towrite;
5293         }
5294 out:
5295         return r;
5296 }
5297
5298 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5299                               unsigned int bytes, struct x86_exception *exception,
5300                               bool system)
5301 {
5302         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5303         u32 access = PFERR_WRITE_MASK;
5304
5305         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5306                 access |= PFERR_USER_MASK;
5307
5308         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5309                                            access, exception);
5310 }
5311
5312 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5313                                 unsigned int bytes, struct x86_exception *exception)
5314 {
5315         /* kvm_write_guest_virt_system can pull in tons of pages. */
5316         vcpu->arch.l1tf_flush_l1d = true;
5317
5318         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5319                                            PFERR_WRITE_MASK, exception);
5320 }
5321 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5322
5323 int handle_ud(struct kvm_vcpu *vcpu)
5324 {
5325         int emul_type = EMULTYPE_TRAP_UD;
5326         enum emulation_result er;
5327         char sig[5]; /* ud2; .ascii "kvm" */
5328         struct x86_exception e;
5329
5330         if (force_emulation_prefix &&
5331             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5332                                 sig, sizeof(sig), &e) == 0 &&
5333             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5334                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5335                 emul_type = 0;
5336         }
5337
5338         er = kvm_emulate_instruction(vcpu, emul_type);
5339         if (er == EMULATE_USER_EXIT)
5340                 return 0;
5341         if (er != EMULATE_DONE)
5342                 kvm_queue_exception(vcpu, UD_VECTOR);
5343         return 1;
5344 }
5345 EXPORT_SYMBOL_GPL(handle_ud);
5346
5347 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5348                             gpa_t gpa, bool write)
5349 {
5350         /* For APIC access vmexit */
5351         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5352                 return 1;
5353
5354         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5355                 trace_vcpu_match_mmio(gva, gpa, write, true);
5356                 return 1;
5357         }
5358
5359         return 0;
5360 }
5361
5362 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5363                                 gpa_t *gpa, struct x86_exception *exception,
5364                                 bool write)
5365 {
5366         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5367                 | (write ? PFERR_WRITE_MASK : 0);
5368
5369         /*
5370          * currently PKRU is only applied to ept enabled guest so
5371          * there is no pkey in EPT page table for L1 guest or EPT
5372          * shadow page table for L2 guest.
5373          */
5374         if (vcpu_match_mmio_gva(vcpu, gva)
5375             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5376                                  vcpu->arch.access, 0, access)) {
5377                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5378                                         (gva & (PAGE_SIZE - 1));
5379                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5380                 return 1;
5381         }
5382
5383         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5384
5385         if (*gpa == UNMAPPED_GVA)
5386                 return -1;
5387
5388         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5389 }
5390
5391 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5392                         const void *val, int bytes)
5393 {
5394         int ret;
5395
5396         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5397         if (ret < 0)
5398                 return 0;
5399         kvm_page_track_write(vcpu, gpa, val, bytes);
5400         return 1;
5401 }
5402
5403 struct read_write_emulator_ops {
5404         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5405                                   int bytes);
5406         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5407                                   void *val, int bytes);
5408         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5409                                int bytes, void *val);
5410         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5411                                     void *val, int bytes);
5412         bool write;
5413 };
5414
5415 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5416 {
5417         if (vcpu->mmio_read_completed) {
5418                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5419                                vcpu->mmio_fragments[0].gpa, val);
5420                 vcpu->mmio_read_completed = 0;
5421                 return 1;
5422         }
5423
5424         return 0;
5425 }
5426
5427 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5428                         void *val, int bytes)
5429 {
5430         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5431 }
5432
5433 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5434                          void *val, int bytes)
5435 {
5436         return emulator_write_phys(vcpu, gpa, val, bytes);
5437 }
5438
5439 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5440 {
5441         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5442         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5443 }
5444
5445 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5446                           void *val, int bytes)
5447 {
5448         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5449         return X86EMUL_IO_NEEDED;
5450 }
5451
5452 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5453                            void *val, int bytes)
5454 {
5455         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5456
5457         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5458         return X86EMUL_CONTINUE;
5459 }
5460
5461 static const struct read_write_emulator_ops read_emultor = {
5462         .read_write_prepare = read_prepare,
5463         .read_write_emulate = read_emulate,
5464         .read_write_mmio = vcpu_mmio_read,
5465         .read_write_exit_mmio = read_exit_mmio,
5466 };
5467
5468 static const struct read_write_emulator_ops write_emultor = {
5469         .read_write_emulate = write_emulate,
5470         .read_write_mmio = write_mmio,
5471         .read_write_exit_mmio = write_exit_mmio,
5472         .write = true,
5473 };
5474
5475 static int emulator_read_write_onepage(unsigned long addr, void *val,
5476                                        unsigned int bytes,
5477                                        struct x86_exception *exception,
5478                                        struct kvm_vcpu *vcpu,
5479                                        const struct read_write_emulator_ops *ops)
5480 {
5481         gpa_t gpa;
5482         int handled, ret;
5483         bool write = ops->write;
5484         struct kvm_mmio_fragment *frag;
5485         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5486
5487         /*
5488          * If the exit was due to a NPF we may already have a GPA.
5489          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5490          * Note, this cannot be used on string operations since string
5491          * operation using rep will only have the initial GPA from the NPF
5492          * occurred.
5493          */
5494         if (vcpu->arch.gpa_available &&
5495             emulator_can_use_gpa(ctxt) &&
5496             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5497                 gpa = vcpu->arch.gpa_val;
5498                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5499         } else {
5500                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5501                 if (ret < 0)
5502                         return X86EMUL_PROPAGATE_FAULT;
5503         }
5504
5505         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5506                 return X86EMUL_CONTINUE;
5507
5508         /*
5509          * Is this MMIO handled locally?
5510          */
5511         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5512         if (handled == bytes)
5513                 return X86EMUL_CONTINUE;
5514
5515         gpa += handled;
5516         bytes -= handled;
5517         val += handled;
5518
5519         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5520         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5521         frag->gpa = gpa;
5522         frag->data = val;
5523         frag->len = bytes;
5524         return X86EMUL_CONTINUE;
5525 }
5526
5527 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5528                         unsigned long addr,
5529                         void *val, unsigned int bytes,
5530                         struct x86_exception *exception,
5531                         const struct read_write_emulator_ops *ops)
5532 {
5533         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5534         gpa_t gpa;
5535         int rc;
5536
5537         if (ops->read_write_prepare &&
5538                   ops->read_write_prepare(vcpu, val, bytes))
5539                 return X86EMUL_CONTINUE;
5540
5541         vcpu->mmio_nr_fragments = 0;
5542
5543         /* Crossing a page boundary? */
5544         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5545                 int now;
5546
5547                 now = -addr & ~PAGE_MASK;
5548                 rc = emulator_read_write_onepage(addr, val, now, exception,
5549                                                  vcpu, ops);
5550
5551                 if (rc != X86EMUL_CONTINUE)
5552                         return rc;
5553                 addr += now;
5554                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5555                         addr = (u32)addr;
5556                 val += now;
5557                 bytes -= now;
5558         }
5559
5560         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5561                                          vcpu, ops);
5562         if (rc != X86EMUL_CONTINUE)
5563                 return rc;
5564
5565         if (!vcpu->mmio_nr_fragments)
5566                 return rc;
5567
5568         gpa = vcpu->mmio_fragments[0].gpa;
5569
5570         vcpu->mmio_needed = 1;
5571         vcpu->mmio_cur_fragment = 0;
5572
5573         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5574         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5575         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5576         vcpu->run->mmio.phys_addr = gpa;
5577
5578         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5579 }
5580
5581 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5582                                   unsigned long addr,
5583                                   void *val,
5584                                   unsigned int bytes,
5585                                   struct x86_exception *exception)
5586 {
5587         return emulator_read_write(ctxt, addr, val, bytes,
5588                                    exception, &read_emultor);
5589 }
5590
5591 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5592                             unsigned long addr,
5593                             const void *val,
5594                             unsigned int bytes,
5595                             struct x86_exception *exception)
5596 {
5597         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5598                                    exception, &write_emultor);
5599 }
5600
5601 #define CMPXCHG_TYPE(t, ptr, old, new) \
5602         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5603
5604 #ifdef CONFIG_X86_64
5605 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5606 #else
5607 #  define CMPXCHG64(ptr, old, new) \
5608         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5609 #endif
5610
5611 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5612                                      unsigned long addr,
5613                                      const void *old,
5614                                      const void *new,
5615                                      unsigned int bytes,
5616                                      struct x86_exception *exception)
5617 {
5618         struct kvm_host_map map;
5619         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5620         gpa_t gpa;
5621         char *kaddr;
5622         bool exchanged;
5623
5624         /* guests cmpxchg8b have to be emulated atomically */
5625         if (bytes > 8 || (bytes & (bytes - 1)))
5626                 goto emul_write;
5627
5628         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5629
5630         if (gpa == UNMAPPED_GVA ||
5631             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5632                 goto emul_write;
5633
5634         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5635                 goto emul_write;
5636
5637         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5638                 goto emul_write;
5639
5640         kaddr = map.hva + offset_in_page(gpa);
5641
5642         switch (bytes) {
5643         case 1:
5644                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5645                 break;
5646         case 2:
5647                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5648                 break;
5649         case 4:
5650                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5651                 break;
5652         case 8:
5653                 exchanged = CMPXCHG64(kaddr, old, new);
5654                 break;
5655         default:
5656                 BUG();
5657         }
5658
5659         kvm_vcpu_unmap(vcpu, &map, true);
5660
5661         if (!exchanged)
5662                 return X86EMUL_CMPXCHG_FAILED;
5663
5664         kvm_page_track_write(vcpu, gpa, new, bytes);
5665
5666         return X86EMUL_CONTINUE;
5667
5668 emul_write:
5669         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5670
5671         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5672 }
5673
5674 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5675 {
5676         int r = 0, i;
5677
5678         for (i = 0; i < vcpu->arch.pio.count; i++) {
5679                 if (vcpu->arch.pio.in)
5680                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5681                                             vcpu->arch.pio.size, pd);
5682                 else
5683                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5684                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5685                                              pd);
5686                 if (r)
5687                         break;
5688                 pd += vcpu->arch.pio.size;
5689         }
5690         return r;
5691 }
5692
5693 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5694                                unsigned short port, void *val,
5695                                unsigned int count, bool in)
5696 {
5697         vcpu->arch.pio.port = port;
5698         vcpu->arch.pio.in = in;
5699         vcpu->arch.pio.count  = count;
5700         vcpu->arch.pio.size = size;
5701
5702         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5703                 vcpu->arch.pio.count = 0;
5704                 return 1;
5705         }
5706
5707         vcpu->run->exit_reason = KVM_EXIT_IO;
5708         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5709         vcpu->run->io.size = size;
5710         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5711         vcpu->run->io.count = count;
5712         vcpu->run->io.port = port;
5713
5714         return 0;
5715 }
5716
5717 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5718                                     int size, unsigned short port, void *val,
5719                                     unsigned int count)
5720 {
5721         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5722         int ret;
5723
5724         if (vcpu->arch.pio.count)
5725                 goto data_avail;
5726
5727         memset(vcpu->arch.pio_data, 0, size * count);
5728
5729         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5730         if (ret) {
5731 data_avail:
5732                 memcpy(val, vcpu->arch.pio_data, size * count);
5733                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5734                 vcpu->arch.pio.count = 0;
5735                 return 1;
5736         }
5737
5738         return 0;
5739 }
5740
5741 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5742                                      int size, unsigned short port,
5743                                      const void *val, unsigned int count)
5744 {
5745         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5746
5747         memcpy(vcpu->arch.pio_data, val, size * count);
5748         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5749         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5750 }
5751
5752 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5753 {
5754         return kvm_x86_ops->get_segment_base(vcpu, seg);
5755 }
5756
5757 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5758 {
5759         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5760 }
5761
5762 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5763 {
5764         if (!need_emulate_wbinvd(vcpu))
5765                 return X86EMUL_CONTINUE;
5766
5767         if (kvm_x86_ops->has_wbinvd_exit()) {
5768                 int cpu = get_cpu();
5769
5770                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5771                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5772                                 wbinvd_ipi, NULL, 1);
5773                 put_cpu();
5774                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5775         } else
5776                 wbinvd();
5777         return X86EMUL_CONTINUE;
5778 }
5779
5780 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5781 {
5782         kvm_emulate_wbinvd_noskip(vcpu);
5783         return kvm_skip_emulated_instruction(vcpu);
5784 }
5785 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5786
5787
5788
5789 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5790 {
5791         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5792 }
5793
5794 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5795                            unsigned long *dest)
5796 {
5797         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5798 }
5799
5800 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5801                            unsigned long value)
5802 {
5803
5804         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5805 }
5806
5807 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5808 {
5809         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5810 }
5811
5812 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5813 {
5814         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5815         unsigned long value;
5816
5817         switch (cr) {
5818         case 0:
5819                 value = kvm_read_cr0(vcpu);
5820                 break;
5821         case 2:
5822                 value = vcpu->arch.cr2;
5823                 break;
5824         case 3:
5825                 value = kvm_read_cr3(vcpu);
5826                 break;
5827         case 4:
5828                 value = kvm_read_cr4(vcpu);
5829                 break;
5830         case 8:
5831                 value = kvm_get_cr8(vcpu);
5832                 break;
5833         default:
5834                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5835                 return 0;
5836         }
5837
5838         return value;
5839 }
5840
5841 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5842 {
5843         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5844         int res = 0;
5845
5846         switch (cr) {
5847         case 0:
5848                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5849                 break;
5850         case 2:
5851                 vcpu->arch.cr2 = val;
5852                 break;
5853         case 3:
5854                 res = kvm_set_cr3(vcpu, val);
5855                 break;
5856         case 4:
5857                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5858                 break;
5859         case 8:
5860                 res = kvm_set_cr8(vcpu, val);
5861                 break;
5862         default:
5863                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5864                 res = -1;
5865         }
5866
5867         return res;
5868 }
5869
5870 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5871 {
5872         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5873 }
5874
5875 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5876 {
5877         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5878 }
5879
5880 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5881 {
5882         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5883 }
5884
5885 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5886 {
5887         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5888 }
5889
5890 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5891 {
5892         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5893 }
5894
5895 static unsigned long emulator_get_cached_segment_base(
5896         struct x86_emulate_ctxt *ctxt, int seg)
5897 {
5898         return get_segment_base(emul_to_vcpu(ctxt), seg);
5899 }
5900
5901 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5902                                  struct desc_struct *desc, u32 *base3,
5903                                  int seg)
5904 {
5905         struct kvm_segment var;
5906
5907         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5908         *selector = var.selector;
5909
5910         if (var.unusable) {
5911                 memset(desc, 0, sizeof(*desc));
5912                 if (base3)
5913                         *base3 = 0;
5914                 return false;
5915         }
5916
5917         if (var.g)
5918                 var.limit >>= 12;
5919         set_desc_limit(desc, var.limit);
5920         set_desc_base(desc, (unsigned long)var.base);
5921 #ifdef CONFIG_X86_64
5922         if (base3)
5923                 *base3 = var.base >> 32;
5924 #endif
5925         desc->type = var.type;
5926         desc->s = var.s;
5927         desc->dpl = var.dpl;
5928         desc->p = var.present;
5929         desc->avl = var.avl;
5930         desc->l = var.l;
5931         desc->d = var.db;
5932         desc->g = var.g;
5933
5934         return true;
5935 }
5936
5937 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5938                                  struct desc_struct *desc, u32 base3,
5939                                  int seg)
5940 {
5941         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5942         struct kvm_segment var;
5943
5944         var.selector = selector;
5945         var.base = get_desc_base(desc);
5946 #ifdef CONFIG_X86_64
5947         var.base |= ((u64)base3) << 32;
5948 #endif
5949         var.limit = get_desc_limit(desc);
5950         if (desc->g)
5951                 var.limit = (var.limit << 12) | 0xfff;
5952         var.type = desc->type;
5953         var.dpl = desc->dpl;
5954         var.db = desc->d;
5955         var.s = desc->s;
5956         var.l = desc->l;
5957         var.g = desc->g;
5958         var.avl = desc->avl;
5959         var.present = desc->p;
5960         var.unusable = !var.present;
5961         var.padding = 0;
5962
5963         kvm_set_segment(vcpu, &var, seg);
5964         return;
5965 }
5966
5967 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5968                             u32 msr_index, u64 *pdata)
5969 {
5970         struct msr_data msr;
5971         int r;
5972
5973         msr.index = msr_index;
5974         msr.host_initiated = false;
5975         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5976         if (r)
5977                 return r;
5978
5979         *pdata = msr.data;
5980         return 0;
5981 }
5982
5983 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5984                             u32 msr_index, u64 data)
5985 {
5986         struct msr_data msr;
5987
5988         msr.data = data;
5989         msr.index = msr_index;
5990         msr.host_initiated = false;
5991         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5992 }
5993
5994 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5995 {
5996         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5997
5998         return vcpu->arch.smbase;
5999 }
6000
6001 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6002 {
6003         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6004
6005         vcpu->arch.smbase = smbase;
6006 }
6007
6008 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6009                               u32 pmc)
6010 {
6011         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6012 }
6013
6014 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6015                              u32 pmc, u64 *pdata)
6016 {
6017         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6018 }
6019
6020 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6021 {
6022         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6023 }
6024
6025 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6026                               struct x86_instruction_info *info,
6027                               enum x86_intercept_stage stage)
6028 {
6029         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6030 }
6031
6032 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6033                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6034 {
6035         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6036 }
6037
6038 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6039 {
6040         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6041 }
6042
6043 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6044 {
6045         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6046 }
6047
6048 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6049 {
6050         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6051 }
6052
6053 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6054 {
6055         return emul_to_vcpu(ctxt)->arch.hflags;
6056 }
6057
6058 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6059 {
6060         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6061 }
6062
6063 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6064                                   const char *smstate)
6065 {
6066         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6067 }
6068
6069 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6070 {
6071         kvm_smm_changed(emul_to_vcpu(ctxt));
6072 }
6073
6074 static const struct x86_emulate_ops emulate_ops = {
6075         .read_gpr            = emulator_read_gpr,
6076         .write_gpr           = emulator_write_gpr,
6077         .read_std            = emulator_read_std,
6078         .write_std           = emulator_write_std,
6079         .read_phys           = kvm_read_guest_phys_system,
6080         .fetch               = kvm_fetch_guest_virt,
6081         .read_emulated       = emulator_read_emulated,
6082         .write_emulated      = emulator_write_emulated,
6083         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6084         .invlpg              = emulator_invlpg,
6085         .pio_in_emulated     = emulator_pio_in_emulated,
6086         .pio_out_emulated    = emulator_pio_out_emulated,
6087         .get_segment         = emulator_get_segment,
6088         .set_segment         = emulator_set_segment,
6089         .get_cached_segment_base = emulator_get_cached_segment_base,
6090         .get_gdt             = emulator_get_gdt,
6091         .get_idt             = emulator_get_idt,
6092         .set_gdt             = emulator_set_gdt,
6093         .set_idt             = emulator_set_idt,
6094         .get_cr              = emulator_get_cr,
6095         .set_cr              = emulator_set_cr,
6096         .cpl                 = emulator_get_cpl,
6097         .get_dr              = emulator_get_dr,
6098         .set_dr              = emulator_set_dr,
6099         .get_smbase          = emulator_get_smbase,
6100         .set_smbase          = emulator_set_smbase,
6101         .set_msr             = emulator_set_msr,
6102         .get_msr             = emulator_get_msr,
6103         .check_pmc           = emulator_check_pmc,
6104         .read_pmc            = emulator_read_pmc,
6105         .halt                = emulator_halt,
6106         .wbinvd              = emulator_wbinvd,
6107         .fix_hypercall       = emulator_fix_hypercall,
6108         .intercept           = emulator_intercept,
6109         .get_cpuid           = emulator_get_cpuid,
6110         .set_nmi_mask        = emulator_set_nmi_mask,
6111         .get_hflags          = emulator_get_hflags,
6112         .set_hflags          = emulator_set_hflags,
6113         .pre_leave_smm       = emulator_pre_leave_smm,
6114         .post_leave_smm      = emulator_post_leave_smm,
6115 };
6116
6117 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6118 {
6119         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6120         /*
6121          * an sti; sti; sequence only disable interrupts for the first
6122          * instruction. So, if the last instruction, be it emulated or
6123          * not, left the system with the INT_STI flag enabled, it
6124          * means that the last instruction is an sti. We should not
6125          * leave the flag on in this case. The same goes for mov ss
6126          */
6127         if (int_shadow & mask)
6128                 mask = 0;
6129         if (unlikely(int_shadow || mask)) {
6130                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6131                 if (!mask)
6132                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6133         }
6134 }
6135
6136 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6137 {
6138         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6139         if (ctxt->exception.vector == PF_VECTOR)
6140                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6141
6142         if (ctxt->exception.error_code_valid)
6143                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6144                                       ctxt->exception.error_code);
6145         else
6146                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6147         return false;
6148 }
6149
6150 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6151 {
6152         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6153         int cs_db, cs_l;
6154
6155         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6156
6157         ctxt->eflags = kvm_get_rflags(vcpu);
6158         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6159
6160         ctxt->eip = kvm_rip_read(vcpu);
6161         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6162                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6163                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6164                      cs_db                              ? X86EMUL_MODE_PROT32 :
6165                                                           X86EMUL_MODE_PROT16;
6166         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6167         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6168         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6169
6170         init_decode_cache(ctxt);
6171         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6172 }
6173
6174 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6175 {
6176         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6177         int ret;
6178
6179         init_emulate_ctxt(vcpu);
6180
6181         ctxt->op_bytes = 2;
6182         ctxt->ad_bytes = 2;
6183         ctxt->_eip = ctxt->eip + inc_eip;
6184         ret = emulate_int_real(ctxt, irq);
6185
6186         if (ret != X86EMUL_CONTINUE)
6187                 return EMULATE_FAIL;
6188
6189         ctxt->eip = ctxt->_eip;
6190         kvm_rip_write(vcpu, ctxt->eip);
6191         kvm_set_rflags(vcpu, ctxt->eflags);
6192
6193         return EMULATE_DONE;
6194 }
6195 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6196
6197 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6198 {
6199         int r = EMULATE_DONE;
6200
6201         ++vcpu->stat.insn_emulation_fail;
6202         trace_kvm_emulate_insn_failed(vcpu);
6203
6204         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6205                 return EMULATE_FAIL;
6206
6207         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6208                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6209                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6210                 vcpu->run->internal.ndata = 0;
6211                 r = EMULATE_USER_EXIT;
6212         }
6213
6214         kvm_queue_exception(vcpu, UD_VECTOR);
6215
6216         return r;
6217 }
6218
6219 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6220                                   bool write_fault_to_shadow_pgtable,
6221                                   int emulation_type)
6222 {
6223         gpa_t gpa = cr2;
6224         kvm_pfn_t pfn;
6225
6226         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6227                 return false;
6228
6229         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6230                 return false;
6231
6232         if (!vcpu->arch.mmu->direct_map) {
6233                 /*
6234                  * Write permission should be allowed since only
6235                  * write access need to be emulated.
6236                  */
6237                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6238
6239                 /*
6240                  * If the mapping is invalid in guest, let cpu retry
6241                  * it to generate fault.
6242                  */
6243                 if (gpa == UNMAPPED_GVA)
6244                         return true;
6245         }
6246
6247         /*
6248          * Do not retry the unhandleable instruction if it faults on the
6249          * readonly host memory, otherwise it will goto a infinite loop:
6250          * retry instruction -> write #PF -> emulation fail -> retry
6251          * instruction -> ...
6252          */
6253         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6254
6255         /*
6256          * If the instruction failed on the error pfn, it can not be fixed,
6257          * report the error to userspace.
6258          */
6259         if (is_error_noslot_pfn(pfn))
6260                 return false;
6261
6262         kvm_release_pfn_clean(pfn);
6263
6264         /* The instructions are well-emulated on direct mmu. */
6265         if (vcpu->arch.mmu->direct_map) {
6266                 unsigned int indirect_shadow_pages;
6267
6268                 spin_lock(&vcpu->kvm->mmu_lock);
6269                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6270                 spin_unlock(&vcpu->kvm->mmu_lock);
6271
6272                 if (indirect_shadow_pages)
6273                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6274
6275                 return true;
6276         }
6277
6278         /*
6279          * if emulation was due to access to shadowed page table
6280          * and it failed try to unshadow page and re-enter the
6281          * guest to let CPU execute the instruction.
6282          */
6283         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6284
6285         /*
6286          * If the access faults on its page table, it can not
6287          * be fixed by unprotecting shadow page and it should
6288          * be reported to userspace.
6289          */
6290         return !write_fault_to_shadow_pgtable;
6291 }
6292
6293 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6294                               unsigned long cr2,  int emulation_type)
6295 {
6296         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6297         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6298
6299         last_retry_eip = vcpu->arch.last_retry_eip;
6300         last_retry_addr = vcpu->arch.last_retry_addr;
6301
6302         /*
6303          * If the emulation is caused by #PF and it is non-page_table
6304          * writing instruction, it means the VM-EXIT is caused by shadow
6305          * page protected, we can zap the shadow page and retry this
6306          * instruction directly.
6307          *
6308          * Note: if the guest uses a non-page-table modifying instruction
6309          * on the PDE that points to the instruction, then we will unmap
6310          * the instruction and go to an infinite loop. So, we cache the
6311          * last retried eip and the last fault address, if we meet the eip
6312          * and the address again, we can break out of the potential infinite
6313          * loop.
6314          */
6315         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6316
6317         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6318                 return false;
6319
6320         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6321                 return false;
6322
6323         if (x86_page_table_writing_insn(ctxt))
6324                 return false;
6325
6326         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6327                 return false;
6328
6329         vcpu->arch.last_retry_eip = ctxt->eip;
6330         vcpu->arch.last_retry_addr = cr2;
6331
6332         if (!vcpu->arch.mmu->direct_map)
6333                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6334
6335         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6336
6337         return true;
6338 }
6339
6340 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6341 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6342
6343 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6344 {
6345         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6346                 /* This is a good place to trace that we are exiting SMM.  */
6347                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6348
6349                 /* Process a latched INIT or SMI, if any.  */
6350                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6351         }
6352
6353         kvm_mmu_reset_context(vcpu);
6354 }
6355
6356 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6357                                 unsigned long *db)
6358 {
6359         u32 dr6 = 0;
6360         int i;
6361         u32 enable, rwlen;
6362
6363         enable = dr7;
6364         rwlen = dr7 >> 16;
6365         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6366                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6367                         dr6 |= (1 << i);
6368         return dr6;
6369 }
6370
6371 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6372 {
6373         struct kvm_run *kvm_run = vcpu->run;
6374
6375         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6376                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6377                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6378                 kvm_run->debug.arch.exception = DB_VECTOR;
6379                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6380                 *r = EMULATE_USER_EXIT;
6381         } else {
6382                 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6383         }
6384 }
6385
6386 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6387 {
6388         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6389         int r = EMULATE_DONE;
6390
6391         kvm_x86_ops->skip_emulated_instruction(vcpu);
6392
6393         /*
6394          * rflags is the old, "raw" value of the flags.  The new value has
6395          * not been saved yet.
6396          *
6397          * This is correct even for TF set by the guest, because "the
6398          * processor will not generate this exception after the instruction
6399          * that sets the TF flag".
6400          */
6401         if (unlikely(rflags & X86_EFLAGS_TF))
6402                 kvm_vcpu_do_singlestep(vcpu, &r);
6403         return r == EMULATE_DONE;
6404 }
6405 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6406
6407 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6408 {
6409         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6410             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6411                 struct kvm_run *kvm_run = vcpu->run;
6412                 unsigned long eip = kvm_get_linear_rip(vcpu);
6413                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6414                                            vcpu->arch.guest_debug_dr7,
6415                                            vcpu->arch.eff_db);
6416
6417                 if (dr6 != 0) {
6418                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6419                         kvm_run->debug.arch.pc = eip;
6420                         kvm_run->debug.arch.exception = DB_VECTOR;
6421                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6422                         *r = EMULATE_USER_EXIT;
6423                         return true;
6424                 }
6425         }
6426
6427         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6428             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6429                 unsigned long eip = kvm_get_linear_rip(vcpu);
6430                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6431                                            vcpu->arch.dr7,
6432                                            vcpu->arch.db);
6433
6434                 if (dr6 != 0) {
6435                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6436                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6437                         kvm_queue_exception(vcpu, DB_VECTOR);
6438                         *r = EMULATE_DONE;
6439                         return true;
6440                 }
6441         }
6442
6443         return false;
6444 }
6445
6446 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6447 {
6448         switch (ctxt->opcode_len) {
6449         case 1:
6450                 switch (ctxt->b) {
6451                 case 0xe4:      /* IN */
6452                 case 0xe5:
6453                 case 0xec:
6454                 case 0xed:
6455                 case 0xe6:      /* OUT */
6456                 case 0xe7:
6457                 case 0xee:
6458                 case 0xef:
6459                 case 0x6c:      /* INS */
6460                 case 0x6d:
6461                 case 0x6e:      /* OUTS */
6462                 case 0x6f:
6463                         return true;
6464                 }
6465                 break;
6466         case 2:
6467                 switch (ctxt->b) {
6468                 case 0x33:      /* RDPMC */
6469                         return true;
6470                 }
6471                 break;
6472         }
6473
6474         return false;
6475 }
6476
6477 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6478                             unsigned long cr2,
6479                             int emulation_type,
6480                             void *insn,
6481                             int insn_len)
6482 {
6483         int r;
6484         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6485         bool writeback = true;
6486         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6487
6488         vcpu->arch.l1tf_flush_l1d = true;
6489
6490         /*
6491          * Clear write_fault_to_shadow_pgtable here to ensure it is
6492          * never reused.
6493          */
6494         vcpu->arch.write_fault_to_shadow_pgtable = false;
6495         kvm_clear_exception_queue(vcpu);
6496
6497         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6498                 init_emulate_ctxt(vcpu);
6499
6500                 /*
6501                  * We will reenter on the same instruction since
6502                  * we do not set complete_userspace_io.  This does not
6503                  * handle watchpoints yet, those would be handled in
6504                  * the emulate_ops.
6505                  */
6506                 if (!(emulation_type & EMULTYPE_SKIP) &&
6507                     kvm_vcpu_check_breakpoint(vcpu, &r))
6508                         return r;
6509
6510                 ctxt->interruptibility = 0;
6511                 ctxt->have_exception = false;
6512                 ctxt->exception.vector = -1;
6513                 ctxt->perm_ok = false;
6514
6515                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6516
6517                 r = x86_decode_insn(ctxt, insn, insn_len);
6518
6519                 trace_kvm_emulate_insn_start(vcpu);
6520                 ++vcpu->stat.insn_emulation;
6521                 if (r != EMULATION_OK)  {
6522                         if (emulation_type & EMULTYPE_TRAP_UD)
6523                                 return EMULATE_FAIL;
6524                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6525                                                 emulation_type))
6526                                 return EMULATE_DONE;
6527                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6528                                 return EMULATE_DONE;
6529                         if (emulation_type & EMULTYPE_SKIP)
6530                                 return EMULATE_FAIL;
6531                         return handle_emulation_failure(vcpu, emulation_type);
6532                 }
6533         }
6534
6535         if ((emulation_type & EMULTYPE_VMWARE) &&
6536             !is_vmware_backdoor_opcode(ctxt))
6537                 return EMULATE_FAIL;
6538
6539         if (emulation_type & EMULTYPE_SKIP) {
6540                 kvm_rip_write(vcpu, ctxt->_eip);
6541                 if (ctxt->eflags & X86_EFLAGS_RF)
6542                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6543                 return EMULATE_DONE;
6544         }
6545
6546         if (retry_instruction(ctxt, cr2, emulation_type))
6547                 return EMULATE_DONE;
6548
6549         /* this is needed for vmware backdoor interface to work since it
6550            changes registers values  during IO operation */
6551         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6552                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6553                 emulator_invalidate_register_cache(ctxt);
6554         }
6555
6556 restart:
6557         /* Save the faulting GPA (cr2) in the address field */
6558         ctxt->exception.address = cr2;
6559
6560         r = x86_emulate_insn(ctxt);
6561
6562         if (r == EMULATION_INTERCEPTED)
6563                 return EMULATE_DONE;
6564
6565         if (r == EMULATION_FAILED) {
6566                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6567                                         emulation_type))
6568                         return EMULATE_DONE;
6569
6570                 return handle_emulation_failure(vcpu, emulation_type);
6571         }
6572
6573         if (ctxt->have_exception) {
6574                 r = EMULATE_DONE;
6575                 if (inject_emulated_exception(vcpu))
6576                         return r;
6577         } else if (vcpu->arch.pio.count) {
6578                 if (!vcpu->arch.pio.in) {
6579                         /* FIXME: return into emulator if single-stepping.  */
6580                         vcpu->arch.pio.count = 0;
6581                 } else {
6582                         writeback = false;
6583                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6584                 }
6585                 r = EMULATE_USER_EXIT;
6586         } else if (vcpu->mmio_needed) {
6587                 if (!vcpu->mmio_is_write)
6588                         writeback = false;
6589                 r = EMULATE_USER_EXIT;
6590                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6591         } else if (r == EMULATION_RESTART)
6592                 goto restart;
6593         else
6594                 r = EMULATE_DONE;
6595
6596         if (writeback) {
6597                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6598                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6599                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6600                 kvm_rip_write(vcpu, ctxt->eip);
6601                 if (r == EMULATE_DONE && ctxt->tf)
6602                         kvm_vcpu_do_singlestep(vcpu, &r);
6603                 if (!ctxt->have_exception ||
6604                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6605                         __kvm_set_rflags(vcpu, ctxt->eflags);
6606
6607                 /*
6608                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6609                  * do nothing, and it will be requested again as soon as
6610                  * the shadow expires.  But we still need to check here,
6611                  * because POPF has no interrupt shadow.
6612                  */
6613                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6614                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6615         } else
6616                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6617
6618         return r;
6619 }
6620
6621 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6622 {
6623         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6624 }
6625 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6626
6627 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6628                                         void *insn, int insn_len)
6629 {
6630         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6631 }
6632 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6633
6634 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6635 {
6636         vcpu->arch.pio.count = 0;
6637         return 1;
6638 }
6639
6640 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6641 {
6642         vcpu->arch.pio.count = 0;
6643
6644         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6645                 return 1;
6646
6647         return kvm_skip_emulated_instruction(vcpu);
6648 }
6649
6650 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6651                             unsigned short port)
6652 {
6653         unsigned long val = kvm_rax_read(vcpu);
6654         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6655                                             size, port, &val, 1);
6656         if (ret)
6657                 return ret;
6658
6659         /*
6660          * Workaround userspace that relies on old KVM behavior of %rip being
6661          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6662          */
6663         if (port == 0x7e &&
6664             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6665                 vcpu->arch.complete_userspace_io =
6666                         complete_fast_pio_out_port_0x7e;
6667                 kvm_skip_emulated_instruction(vcpu);
6668         } else {
6669                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6670                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6671         }
6672         return 0;
6673 }
6674
6675 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6676 {
6677         unsigned long val;
6678
6679         /* We should only ever be called with arch.pio.count equal to 1 */
6680         BUG_ON(vcpu->arch.pio.count != 1);
6681
6682         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6683                 vcpu->arch.pio.count = 0;
6684                 return 1;
6685         }
6686
6687         /* For size less than 4 we merge, else we zero extend */
6688         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6689
6690         /*
6691          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6692          * the copy and tracing
6693          */
6694         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6695                                  vcpu->arch.pio.port, &val, 1);
6696         kvm_rax_write(vcpu, val);
6697
6698         return kvm_skip_emulated_instruction(vcpu);
6699 }
6700
6701 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6702                            unsigned short port)
6703 {
6704         unsigned long val;
6705         int ret;
6706
6707         /* For size less than 4 we merge, else we zero extend */
6708         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6709
6710         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6711                                        &val, 1);
6712         if (ret) {
6713                 kvm_rax_write(vcpu, val);
6714                 return ret;
6715         }
6716
6717         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6718         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6719
6720         return 0;
6721 }
6722
6723 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6724 {
6725         int ret;
6726
6727         if (in)
6728                 ret = kvm_fast_pio_in(vcpu, size, port);
6729         else
6730                 ret = kvm_fast_pio_out(vcpu, size, port);
6731         return ret && kvm_skip_emulated_instruction(vcpu);
6732 }
6733 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6734
6735 static int kvmclock_cpu_down_prep(unsigned int cpu)
6736 {
6737         __this_cpu_write(cpu_tsc_khz, 0);
6738         return 0;
6739 }
6740
6741 static void tsc_khz_changed(void *data)
6742 {
6743         struct cpufreq_freqs *freq = data;
6744         unsigned long khz = 0;
6745
6746         if (data)
6747                 khz = freq->new;
6748         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6749                 khz = cpufreq_quick_get(raw_smp_processor_id());
6750         if (!khz)
6751                 khz = tsc_khz;
6752         __this_cpu_write(cpu_tsc_khz, khz);
6753 }
6754
6755 #ifdef CONFIG_X86_64
6756 static void kvm_hyperv_tsc_notifier(void)
6757 {
6758         struct kvm *kvm;
6759         struct kvm_vcpu *vcpu;
6760         int cpu;
6761
6762         mutex_lock(&kvm_lock);
6763         list_for_each_entry(kvm, &vm_list, vm_list)
6764                 kvm_make_mclock_inprogress_request(kvm);
6765
6766         hyperv_stop_tsc_emulation();
6767
6768         /* TSC frequency always matches when on Hyper-V */
6769         for_each_present_cpu(cpu)
6770                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6771         kvm_max_guest_tsc_khz = tsc_khz;
6772
6773         list_for_each_entry(kvm, &vm_list, vm_list) {
6774                 struct kvm_arch *ka = &kvm->arch;
6775
6776                 spin_lock(&ka->pvclock_gtod_sync_lock);
6777
6778                 pvclock_update_vm_gtod_copy(kvm);
6779
6780                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6781                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6782
6783                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6784                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6785
6786                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6787         }
6788         mutex_unlock(&kvm_lock);
6789 }
6790 #endif
6791
6792 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6793 {
6794         struct kvm *kvm;
6795         struct kvm_vcpu *vcpu;
6796         int i, send_ipi = 0;
6797
6798         /*
6799          * We allow guests to temporarily run on slowing clocks,
6800          * provided we notify them after, or to run on accelerating
6801          * clocks, provided we notify them before.  Thus time never
6802          * goes backwards.
6803          *
6804          * However, we have a problem.  We can't atomically update
6805          * the frequency of a given CPU from this function; it is
6806          * merely a notifier, which can be called from any CPU.
6807          * Changing the TSC frequency at arbitrary points in time
6808          * requires a recomputation of local variables related to
6809          * the TSC for each VCPU.  We must flag these local variables
6810          * to be updated and be sure the update takes place with the
6811          * new frequency before any guests proceed.
6812          *
6813          * Unfortunately, the combination of hotplug CPU and frequency
6814          * change creates an intractable locking scenario; the order
6815          * of when these callouts happen is undefined with respect to
6816          * CPU hotplug, and they can race with each other.  As such,
6817          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6818          * undefined; you can actually have a CPU frequency change take
6819          * place in between the computation of X and the setting of the
6820          * variable.  To protect against this problem, all updates of
6821          * the per_cpu tsc_khz variable are done in an interrupt
6822          * protected IPI, and all callers wishing to update the value
6823          * must wait for a synchronous IPI to complete (which is trivial
6824          * if the caller is on the CPU already).  This establishes the
6825          * necessary total order on variable updates.
6826          *
6827          * Note that because a guest time update may take place
6828          * anytime after the setting of the VCPU's request bit, the
6829          * correct TSC value must be set before the request.  However,
6830          * to ensure the update actually makes it to any guest which
6831          * starts running in hardware virtualization between the set
6832          * and the acquisition of the spinlock, we must also ping the
6833          * CPU after setting the request bit.
6834          *
6835          */
6836
6837         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6838
6839         mutex_lock(&kvm_lock);
6840         list_for_each_entry(kvm, &vm_list, vm_list) {
6841                 kvm_for_each_vcpu(i, vcpu, kvm) {
6842                         if (vcpu->cpu != cpu)
6843                                 continue;
6844                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6845                         if (vcpu->cpu != raw_smp_processor_id())
6846                                 send_ipi = 1;
6847                 }
6848         }
6849         mutex_unlock(&kvm_lock);
6850
6851         if (freq->old < freq->new && send_ipi) {
6852                 /*
6853                  * We upscale the frequency.  Must make the guest
6854                  * doesn't see old kvmclock values while running with
6855                  * the new frequency, otherwise we risk the guest sees
6856                  * time go backwards.
6857                  *
6858                  * In case we update the frequency for another cpu
6859                  * (which might be in guest context) send an interrupt
6860                  * to kick the cpu out of guest context.  Next time
6861                  * guest context is entered kvmclock will be updated,
6862                  * so the guest will not see stale values.
6863                  */
6864                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6865         }
6866 }
6867
6868 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6869                                      void *data)
6870 {
6871         struct cpufreq_freqs *freq = data;
6872         int cpu;
6873
6874         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6875                 return 0;
6876         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6877                 return 0;
6878
6879         for_each_cpu(cpu, freq->policy->cpus)
6880                 __kvmclock_cpufreq_notifier(freq, cpu);
6881
6882         return 0;
6883 }
6884
6885 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6886         .notifier_call  = kvmclock_cpufreq_notifier
6887 };
6888
6889 static int kvmclock_cpu_online(unsigned int cpu)
6890 {
6891         tsc_khz_changed(NULL);
6892         return 0;
6893 }
6894
6895 static void kvm_timer_init(void)
6896 {
6897         max_tsc_khz = tsc_khz;
6898
6899         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6900 #ifdef CONFIG_CPU_FREQ
6901                 struct cpufreq_policy policy;
6902                 int cpu;
6903
6904                 memset(&policy, 0, sizeof(policy));
6905                 cpu = get_cpu();
6906                 cpufreq_get_policy(&policy, cpu);
6907                 if (policy.cpuinfo.max_freq)
6908                         max_tsc_khz = policy.cpuinfo.max_freq;
6909                 put_cpu();
6910 #endif
6911                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6912                                           CPUFREQ_TRANSITION_NOTIFIER);
6913         }
6914         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6915
6916         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6917                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6918 }
6919
6920 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6921 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6922
6923 int kvm_is_in_guest(void)
6924 {
6925         return __this_cpu_read(current_vcpu) != NULL;
6926 }
6927
6928 static int kvm_is_user_mode(void)
6929 {
6930         int user_mode = 3;
6931
6932         if (__this_cpu_read(current_vcpu))
6933                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6934
6935         return user_mode != 0;
6936 }
6937
6938 static unsigned long kvm_get_guest_ip(void)
6939 {
6940         unsigned long ip = 0;
6941
6942         if (__this_cpu_read(current_vcpu))
6943                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6944
6945         return ip;
6946 }
6947
6948 static void kvm_handle_intel_pt_intr(void)
6949 {
6950         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
6951
6952         kvm_make_request(KVM_REQ_PMI, vcpu);
6953         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
6954                         (unsigned long *)&vcpu->arch.pmu.global_status);
6955 }
6956
6957 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6958         .is_in_guest            = kvm_is_in_guest,
6959         .is_user_mode           = kvm_is_user_mode,
6960         .get_guest_ip           = kvm_get_guest_ip,
6961         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
6962 };
6963
6964 #ifdef CONFIG_X86_64
6965 static void pvclock_gtod_update_fn(struct work_struct *work)
6966 {
6967         struct kvm *kvm;
6968
6969         struct kvm_vcpu *vcpu;
6970         int i;
6971
6972         mutex_lock(&kvm_lock);
6973         list_for_each_entry(kvm, &vm_list, vm_list)
6974                 kvm_for_each_vcpu(i, vcpu, kvm)
6975                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6976         atomic_set(&kvm_guest_has_master_clock, 0);
6977         mutex_unlock(&kvm_lock);
6978 }
6979
6980 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6981
6982 /*
6983  * Notification about pvclock gtod data update.
6984  */
6985 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6986                                void *priv)
6987 {
6988         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6989         struct timekeeper *tk = priv;
6990
6991         update_pvclock_gtod(tk);
6992
6993         /* disable master clock if host does not trust, or does not
6994          * use, TSC based clocksource.
6995          */
6996         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6997             atomic_read(&kvm_guest_has_master_clock) != 0)
6998                 queue_work(system_long_wq, &pvclock_gtod_work);
6999
7000         return 0;
7001 }
7002
7003 static struct notifier_block pvclock_gtod_notifier = {
7004         .notifier_call = pvclock_gtod_notify,
7005 };
7006 #endif
7007
7008 int kvm_arch_init(void *opaque)
7009 {
7010         int r;
7011         struct kvm_x86_ops *ops = opaque;
7012
7013         if (kvm_x86_ops) {
7014                 printk(KERN_ERR "kvm: already loaded the other module\n");
7015                 r = -EEXIST;
7016                 goto out;
7017         }
7018
7019         if (!ops->cpu_has_kvm_support()) {
7020                 printk(KERN_ERR "kvm: no hardware support\n");
7021                 r = -EOPNOTSUPP;
7022                 goto out;
7023         }
7024         if (ops->disabled_by_bios()) {
7025                 printk(KERN_ERR "kvm: disabled by bios\n");
7026                 r = -EOPNOTSUPP;
7027                 goto out;
7028         }
7029
7030         /*
7031          * KVM explicitly assumes that the guest has an FPU and
7032          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7033          * vCPU's FPU state as a fxregs_state struct.
7034          */
7035         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7036                 printk(KERN_ERR "kvm: inadequate fpu\n");
7037                 r = -EOPNOTSUPP;
7038                 goto out;
7039         }
7040
7041         r = -ENOMEM;
7042         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7043                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7044                                           NULL);
7045         if (!x86_fpu_cache) {
7046                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7047                 goto out;
7048         }
7049
7050         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7051         if (!shared_msrs) {
7052                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7053                 goto out_free_x86_fpu_cache;
7054         }
7055
7056         r = kvm_mmu_module_init();
7057         if (r)
7058                 goto out_free_percpu;
7059
7060         kvm_x86_ops = ops;
7061
7062         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7063                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7064                         PT_PRESENT_MASK, 0, sme_me_mask);
7065         kvm_timer_init();
7066
7067         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7068
7069         if (boot_cpu_has(X86_FEATURE_XSAVE))
7070                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7071
7072         kvm_lapic_init();
7073 #ifdef CONFIG_X86_64
7074         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7075
7076         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7077                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7078 #endif
7079
7080         return 0;
7081
7082 out_free_percpu:
7083         free_percpu(shared_msrs);
7084 out_free_x86_fpu_cache:
7085         kmem_cache_destroy(x86_fpu_cache);
7086 out:
7087         return r;
7088 }
7089
7090 void kvm_arch_exit(void)
7091 {
7092 #ifdef CONFIG_X86_64
7093         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7094                 clear_hv_tscchange_cb();
7095 #endif
7096         kvm_lapic_exit();
7097         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7098
7099         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7100                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7101                                             CPUFREQ_TRANSITION_NOTIFIER);
7102         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7103 #ifdef CONFIG_X86_64
7104         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7105 #endif
7106         kvm_x86_ops = NULL;
7107         kvm_mmu_module_exit();
7108         free_percpu(shared_msrs);
7109         kmem_cache_destroy(x86_fpu_cache);
7110 }
7111
7112 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7113 {
7114         ++vcpu->stat.halt_exits;
7115         if (lapic_in_kernel(vcpu)) {
7116                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7117                 return 1;
7118         } else {
7119                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7120                 return 0;
7121         }
7122 }
7123 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7124
7125 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7126 {
7127         int ret = kvm_skip_emulated_instruction(vcpu);
7128         /*
7129          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7130          * KVM_EXIT_DEBUG here.
7131          */
7132         return kvm_vcpu_halt(vcpu) && ret;
7133 }
7134 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7135
7136 #ifdef CONFIG_X86_64
7137 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7138                                 unsigned long clock_type)
7139 {
7140         struct kvm_clock_pairing clock_pairing;
7141         struct timespec64 ts;
7142         u64 cycle;
7143         int ret;
7144
7145         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7146                 return -KVM_EOPNOTSUPP;
7147
7148         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7149                 return -KVM_EOPNOTSUPP;
7150
7151         clock_pairing.sec = ts.tv_sec;
7152         clock_pairing.nsec = ts.tv_nsec;
7153         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7154         clock_pairing.flags = 0;
7155         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7156
7157         ret = 0;
7158         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7159                             sizeof(struct kvm_clock_pairing)))
7160                 ret = -KVM_EFAULT;
7161
7162         return ret;
7163 }
7164 #endif
7165
7166 /*
7167  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7168  *
7169  * @apicid - apicid of vcpu to be kicked.
7170  */
7171 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7172 {
7173         struct kvm_lapic_irq lapic_irq;
7174
7175         lapic_irq.shorthand = 0;
7176         lapic_irq.dest_mode = 0;
7177         lapic_irq.level = 0;
7178         lapic_irq.dest_id = apicid;
7179         lapic_irq.msi_redir_hint = false;
7180
7181         lapic_irq.delivery_mode = APIC_DM_REMRD;
7182         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7183 }
7184
7185 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7186 {
7187         if (!lapic_in_kernel(vcpu)) {
7188                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7189                 return;
7190         }
7191         if (!vcpu->arch.apicv_active)
7192                 return;
7193
7194         vcpu->arch.apicv_active = false;
7195         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7196 }
7197
7198 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7199 {
7200         struct kvm_vcpu *target = NULL;
7201         struct kvm_apic_map *map;
7202
7203         rcu_read_lock();
7204         map = rcu_dereference(kvm->arch.apic_map);
7205
7206         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7207                 target = map->phys_map[dest_id]->vcpu;
7208
7209         rcu_read_unlock();
7210
7211         if (target)
7212                 kvm_vcpu_yield_to(target);
7213 }
7214
7215 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7216 {
7217         unsigned long nr, a0, a1, a2, a3, ret;
7218         int op_64_bit;
7219
7220         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7221                 return kvm_hv_hypercall(vcpu);
7222
7223         nr = kvm_rax_read(vcpu);
7224         a0 = kvm_rbx_read(vcpu);
7225         a1 = kvm_rcx_read(vcpu);
7226         a2 = kvm_rdx_read(vcpu);
7227         a3 = kvm_rsi_read(vcpu);
7228
7229         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7230
7231         op_64_bit = is_64_bit_mode(vcpu);
7232         if (!op_64_bit) {
7233                 nr &= 0xFFFFFFFF;
7234                 a0 &= 0xFFFFFFFF;
7235                 a1 &= 0xFFFFFFFF;
7236                 a2 &= 0xFFFFFFFF;
7237                 a3 &= 0xFFFFFFFF;
7238         }
7239
7240         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7241                 ret = -KVM_EPERM;
7242                 goto out;
7243         }
7244
7245         switch (nr) {
7246         case KVM_HC_VAPIC_POLL_IRQ:
7247                 ret = 0;
7248                 break;
7249         case KVM_HC_KICK_CPU:
7250                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7251                 ret = 0;
7252                 break;
7253 #ifdef CONFIG_X86_64
7254         case KVM_HC_CLOCK_PAIRING:
7255                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7256                 break;
7257 #endif
7258         case KVM_HC_SEND_IPI:
7259                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7260                 break;
7261         case KVM_HC_SCHED_YIELD:
7262                 kvm_sched_yield(vcpu->kvm, a0);
7263                 ret = 0;
7264                 break;
7265         default:
7266                 ret = -KVM_ENOSYS;
7267                 break;
7268         }
7269 out:
7270         if (!op_64_bit)
7271                 ret = (u32)ret;
7272         kvm_rax_write(vcpu, ret);
7273
7274         ++vcpu->stat.hypercalls;
7275         return kvm_skip_emulated_instruction(vcpu);
7276 }
7277 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7278
7279 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7280 {
7281         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7282         char instruction[3];
7283         unsigned long rip = kvm_rip_read(vcpu);
7284
7285         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7286
7287         return emulator_write_emulated(ctxt, rip, instruction, 3,
7288                 &ctxt->exception);
7289 }
7290
7291 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7292 {
7293         return vcpu->run->request_interrupt_window &&
7294                 likely(!pic_in_kernel(vcpu->kvm));
7295 }
7296
7297 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7298 {
7299         struct kvm_run *kvm_run = vcpu->run;
7300
7301         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7302         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7303         kvm_run->cr8 = kvm_get_cr8(vcpu);
7304         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7305         kvm_run->ready_for_interrupt_injection =
7306                 pic_in_kernel(vcpu->kvm) ||
7307                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7308 }
7309
7310 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7311 {
7312         int max_irr, tpr;
7313
7314         if (!kvm_x86_ops->update_cr8_intercept)
7315                 return;
7316
7317         if (!lapic_in_kernel(vcpu))
7318                 return;
7319
7320         if (vcpu->arch.apicv_active)
7321                 return;
7322
7323         if (!vcpu->arch.apic->vapic_addr)
7324                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7325         else
7326                 max_irr = -1;
7327
7328         if (max_irr != -1)
7329                 max_irr >>= 4;
7330
7331         tpr = kvm_lapic_get_cr8(vcpu);
7332
7333         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7334 }
7335
7336 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7337 {
7338         int r;
7339
7340         /* try to reinject previous events if any */
7341
7342         if (vcpu->arch.exception.injected)
7343                 kvm_x86_ops->queue_exception(vcpu);
7344         /*
7345          * Do not inject an NMI or interrupt if there is a pending
7346          * exception.  Exceptions and interrupts are recognized at
7347          * instruction boundaries, i.e. the start of an instruction.
7348          * Trap-like exceptions, e.g. #DB, have higher priority than
7349          * NMIs and interrupts, i.e. traps are recognized before an
7350          * NMI/interrupt that's pending on the same instruction.
7351          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7352          * priority, but are only generated (pended) during instruction
7353          * execution, i.e. a pending fault-like exception means the
7354          * fault occurred on the *previous* instruction and must be
7355          * serviced prior to recognizing any new events in order to
7356          * fully complete the previous instruction.
7357          */
7358         else if (!vcpu->arch.exception.pending) {
7359                 if (vcpu->arch.nmi_injected)
7360                         kvm_x86_ops->set_nmi(vcpu);
7361                 else if (vcpu->arch.interrupt.injected)
7362                         kvm_x86_ops->set_irq(vcpu);
7363         }
7364
7365         /*
7366          * Call check_nested_events() even if we reinjected a previous event
7367          * in order for caller to determine if it should require immediate-exit
7368          * from L2 to L1 due to pending L1 events which require exit
7369          * from L2 to L1.
7370          */
7371         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7372                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7373                 if (r != 0)
7374                         return r;
7375         }
7376
7377         /* try to inject new event if pending */
7378         if (vcpu->arch.exception.pending) {
7379                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7380                                         vcpu->arch.exception.has_error_code,
7381                                         vcpu->arch.exception.error_code);
7382
7383                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7384                 vcpu->arch.exception.pending = false;
7385                 vcpu->arch.exception.injected = true;
7386
7387                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7388                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7389                                              X86_EFLAGS_RF);
7390
7391                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7392                         /*
7393                          * This code assumes that nSVM doesn't use
7394                          * check_nested_events(). If it does, the
7395                          * DR6/DR7 changes should happen before L1
7396                          * gets a #VMEXIT for an intercepted #DB in
7397                          * L2.  (Under VMX, on the other hand, the
7398                          * DR6/DR7 changes should not happen in the
7399                          * event of a VM-exit to L1 for an intercepted
7400                          * #DB in L2.)
7401                          */
7402                         kvm_deliver_exception_payload(vcpu);
7403                         if (vcpu->arch.dr7 & DR7_GD) {
7404                                 vcpu->arch.dr7 &= ~DR7_GD;
7405                                 kvm_update_dr7(vcpu);
7406                         }
7407                 }
7408
7409                 kvm_x86_ops->queue_exception(vcpu);
7410         }
7411
7412         /* Don't consider new event if we re-injected an event */
7413         if (kvm_event_needs_reinjection(vcpu))
7414                 return 0;
7415
7416         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7417             kvm_x86_ops->smi_allowed(vcpu)) {
7418                 vcpu->arch.smi_pending = false;
7419                 ++vcpu->arch.smi_count;
7420                 enter_smm(vcpu);
7421         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7422                 --vcpu->arch.nmi_pending;
7423                 vcpu->arch.nmi_injected = true;
7424                 kvm_x86_ops->set_nmi(vcpu);
7425         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7426                 /*
7427                  * Because interrupts can be injected asynchronously, we are
7428                  * calling check_nested_events again here to avoid a race condition.
7429                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7430                  * proposal and current concerns.  Perhaps we should be setting
7431                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7432                  */
7433                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7434                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7435                         if (r != 0)
7436                                 return r;
7437                 }
7438                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7439                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7440                                             false);
7441                         kvm_x86_ops->set_irq(vcpu);
7442                 }
7443         }
7444
7445         return 0;
7446 }
7447
7448 static void process_nmi(struct kvm_vcpu *vcpu)
7449 {
7450         unsigned limit = 2;
7451
7452         /*
7453          * x86 is limited to one NMI running, and one NMI pending after it.
7454          * If an NMI is already in progress, limit further NMIs to just one.
7455          * Otherwise, allow two (and we'll inject the first one immediately).
7456          */
7457         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7458                 limit = 1;
7459
7460         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7461         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7462         kvm_make_request(KVM_REQ_EVENT, vcpu);
7463 }
7464
7465 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7466 {
7467         u32 flags = 0;
7468         flags |= seg->g       << 23;
7469         flags |= seg->db      << 22;
7470         flags |= seg->l       << 21;
7471         flags |= seg->avl     << 20;
7472         flags |= seg->present << 15;
7473         flags |= seg->dpl     << 13;
7474         flags |= seg->s       << 12;
7475         flags |= seg->type    << 8;
7476         return flags;
7477 }
7478
7479 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7480 {
7481         struct kvm_segment seg;
7482         int offset;
7483
7484         kvm_get_segment(vcpu, &seg, n);
7485         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7486
7487         if (n < 3)
7488                 offset = 0x7f84 + n * 12;
7489         else
7490                 offset = 0x7f2c + (n - 3) * 12;
7491
7492         put_smstate(u32, buf, offset + 8, seg.base);
7493         put_smstate(u32, buf, offset + 4, seg.limit);
7494         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7495 }
7496
7497 #ifdef CONFIG_X86_64
7498 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7499 {
7500         struct kvm_segment seg;
7501         int offset;
7502         u16 flags;
7503
7504         kvm_get_segment(vcpu, &seg, n);
7505         offset = 0x7e00 + n * 16;
7506
7507         flags = enter_smm_get_segment_flags(&seg) >> 8;
7508         put_smstate(u16, buf, offset, seg.selector);
7509         put_smstate(u16, buf, offset + 2, flags);
7510         put_smstate(u32, buf, offset + 4, seg.limit);
7511         put_smstate(u64, buf, offset + 8, seg.base);
7512 }
7513 #endif
7514
7515 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7516 {
7517         struct desc_ptr dt;
7518         struct kvm_segment seg;
7519         unsigned long val;
7520         int i;
7521
7522         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7523         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7524         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7525         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7526
7527         for (i = 0; i < 8; i++)
7528                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7529
7530         kvm_get_dr(vcpu, 6, &val);
7531         put_smstate(u32, buf, 0x7fcc, (u32)val);
7532         kvm_get_dr(vcpu, 7, &val);
7533         put_smstate(u32, buf, 0x7fc8, (u32)val);
7534
7535         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7536         put_smstate(u32, buf, 0x7fc4, seg.selector);
7537         put_smstate(u32, buf, 0x7f64, seg.base);
7538         put_smstate(u32, buf, 0x7f60, seg.limit);
7539         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7540
7541         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7542         put_smstate(u32, buf, 0x7fc0, seg.selector);
7543         put_smstate(u32, buf, 0x7f80, seg.base);
7544         put_smstate(u32, buf, 0x7f7c, seg.limit);
7545         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7546
7547         kvm_x86_ops->get_gdt(vcpu, &dt);
7548         put_smstate(u32, buf, 0x7f74, dt.address);
7549         put_smstate(u32, buf, 0x7f70, dt.size);
7550
7551         kvm_x86_ops->get_idt(vcpu, &dt);
7552         put_smstate(u32, buf, 0x7f58, dt.address);
7553         put_smstate(u32, buf, 0x7f54, dt.size);
7554
7555         for (i = 0; i < 6; i++)
7556                 enter_smm_save_seg_32(vcpu, buf, i);
7557
7558         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7559
7560         /* revision id */
7561         put_smstate(u32, buf, 0x7efc, 0x00020000);
7562         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7563 }
7564
7565 #ifdef CONFIG_X86_64
7566 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7567 {
7568         struct desc_ptr dt;
7569         struct kvm_segment seg;
7570         unsigned long val;
7571         int i;
7572
7573         for (i = 0; i < 16; i++)
7574                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7575
7576         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7577         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7578
7579         kvm_get_dr(vcpu, 6, &val);
7580         put_smstate(u64, buf, 0x7f68, val);
7581         kvm_get_dr(vcpu, 7, &val);
7582         put_smstate(u64, buf, 0x7f60, val);
7583
7584         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7585         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7586         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7587
7588         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7589
7590         /* revision id */
7591         put_smstate(u32, buf, 0x7efc, 0x00020064);
7592
7593         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7594
7595         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7596         put_smstate(u16, buf, 0x7e90, seg.selector);
7597         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7598         put_smstate(u32, buf, 0x7e94, seg.limit);
7599         put_smstate(u64, buf, 0x7e98, seg.base);
7600
7601         kvm_x86_ops->get_idt(vcpu, &dt);
7602         put_smstate(u32, buf, 0x7e84, dt.size);
7603         put_smstate(u64, buf, 0x7e88, dt.address);
7604
7605         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7606         put_smstate(u16, buf, 0x7e70, seg.selector);
7607         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7608         put_smstate(u32, buf, 0x7e74, seg.limit);
7609         put_smstate(u64, buf, 0x7e78, seg.base);
7610
7611         kvm_x86_ops->get_gdt(vcpu, &dt);
7612         put_smstate(u32, buf, 0x7e64, dt.size);
7613         put_smstate(u64, buf, 0x7e68, dt.address);
7614
7615         for (i = 0; i < 6; i++)
7616                 enter_smm_save_seg_64(vcpu, buf, i);
7617 }
7618 #endif
7619
7620 static void enter_smm(struct kvm_vcpu *vcpu)
7621 {
7622         struct kvm_segment cs, ds;
7623         struct desc_ptr dt;
7624         char buf[512];
7625         u32 cr0;
7626
7627         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7628         memset(buf, 0, 512);
7629 #ifdef CONFIG_X86_64
7630         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7631                 enter_smm_save_state_64(vcpu, buf);
7632         else
7633 #endif
7634                 enter_smm_save_state_32(vcpu, buf);
7635
7636         /*
7637          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7638          * vCPU state (e.g. leave guest mode) after we've saved the state into
7639          * the SMM state-save area.
7640          */
7641         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7642
7643         vcpu->arch.hflags |= HF_SMM_MASK;
7644         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7645
7646         if (kvm_x86_ops->get_nmi_mask(vcpu))
7647                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7648         else
7649                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7650
7651         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7652         kvm_rip_write(vcpu, 0x8000);
7653
7654         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7655         kvm_x86_ops->set_cr0(vcpu, cr0);
7656         vcpu->arch.cr0 = cr0;
7657
7658         kvm_x86_ops->set_cr4(vcpu, 0);
7659
7660         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7661         dt.address = dt.size = 0;
7662         kvm_x86_ops->set_idt(vcpu, &dt);
7663
7664         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7665
7666         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7667         cs.base = vcpu->arch.smbase;
7668
7669         ds.selector = 0;
7670         ds.base = 0;
7671
7672         cs.limit    = ds.limit = 0xffffffff;
7673         cs.type     = ds.type = 0x3;
7674         cs.dpl      = ds.dpl = 0;
7675         cs.db       = ds.db = 0;
7676         cs.s        = ds.s = 1;
7677         cs.l        = ds.l = 0;
7678         cs.g        = ds.g = 1;
7679         cs.avl      = ds.avl = 0;
7680         cs.present  = ds.present = 1;
7681         cs.unusable = ds.unusable = 0;
7682         cs.padding  = ds.padding = 0;
7683
7684         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7685         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7686         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7687         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7688         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7689         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7690
7691 #ifdef CONFIG_X86_64
7692         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7693                 kvm_x86_ops->set_efer(vcpu, 0);
7694 #endif
7695
7696         kvm_update_cpuid(vcpu);
7697         kvm_mmu_reset_context(vcpu);
7698 }
7699
7700 static void process_smi(struct kvm_vcpu *vcpu)
7701 {
7702         vcpu->arch.smi_pending = true;
7703         kvm_make_request(KVM_REQ_EVENT, vcpu);
7704 }
7705
7706 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7707 {
7708         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7709 }
7710
7711 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7712 {
7713         if (!kvm_apic_present(vcpu))
7714                 return;
7715
7716         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7717
7718         if (irqchip_split(vcpu->kvm))
7719                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7720         else {
7721                 if (vcpu->arch.apicv_active)
7722                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7723                 if (ioapic_in_kernel(vcpu->kvm))
7724                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7725         }
7726
7727         if (is_guest_mode(vcpu))
7728                 vcpu->arch.load_eoi_exitmap_pending = true;
7729         else
7730                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7731 }
7732
7733 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7734 {
7735         u64 eoi_exit_bitmap[4];
7736
7737         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7738                 return;
7739
7740         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7741                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7742         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7743 }
7744
7745 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7746                 unsigned long start, unsigned long end,
7747                 bool blockable)
7748 {
7749         unsigned long apic_address;
7750
7751         /*
7752          * The physical address of apic access page is stored in the VMCS.
7753          * Update it when it becomes invalid.
7754          */
7755         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7756         if (start <= apic_address && apic_address < end)
7757                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7758
7759         return 0;
7760 }
7761
7762 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7763 {
7764         struct page *page = NULL;
7765
7766         if (!lapic_in_kernel(vcpu))
7767                 return;
7768
7769         if (!kvm_x86_ops->set_apic_access_page_addr)
7770                 return;
7771
7772         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7773         if (is_error_page(page))
7774                 return;
7775         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7776
7777         /*
7778          * Do not pin apic access page in memory, the MMU notifier
7779          * will call us again if it is migrated or swapped out.
7780          */
7781         put_page(page);
7782 }
7783 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7784
7785 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7786 {
7787         smp_send_reschedule(vcpu->cpu);
7788 }
7789 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7790
7791 /*
7792  * Returns 1 to let vcpu_run() continue the guest execution loop without
7793  * exiting to the userspace.  Otherwise, the value will be returned to the
7794  * userspace.
7795  */
7796 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7797 {
7798         int r;
7799         bool req_int_win =
7800                 dm_request_for_irq_injection(vcpu) &&
7801                 kvm_cpu_accept_dm_intr(vcpu);
7802
7803         bool req_immediate_exit = false;
7804
7805         if (kvm_request_pending(vcpu)) {
7806                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7807                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7808                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7809                         kvm_mmu_unload(vcpu);
7810                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7811                         __kvm_migrate_timers(vcpu);
7812                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7813                         kvm_gen_update_masterclock(vcpu->kvm);
7814                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7815                         kvm_gen_kvmclock_update(vcpu);
7816                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7817                         r = kvm_guest_time_update(vcpu);
7818                         if (unlikely(r))
7819                                 goto out;
7820                 }
7821                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7822                         kvm_mmu_sync_roots(vcpu);
7823                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7824                         kvm_mmu_load_cr3(vcpu);
7825                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7826                         kvm_vcpu_flush_tlb(vcpu, true);
7827                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7828                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7829                         r = 0;
7830                         goto out;
7831                 }
7832                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7833                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7834                         vcpu->mmio_needed = 0;
7835                         r = 0;
7836                         goto out;
7837                 }
7838                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7839                         /* Page is swapped out. Do synthetic halt */
7840                         vcpu->arch.apf.halted = true;
7841                         r = 1;
7842                         goto out;
7843                 }
7844                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7845                         record_steal_time(vcpu);
7846                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7847                         process_smi(vcpu);
7848                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7849                         process_nmi(vcpu);
7850                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7851                         kvm_pmu_handle_event(vcpu);
7852                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7853                         kvm_pmu_deliver_pmi(vcpu);
7854                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7855                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7856                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7857                                      vcpu->arch.ioapic_handled_vectors)) {
7858                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7859                                 vcpu->run->eoi.vector =
7860                                                 vcpu->arch.pending_ioapic_eoi;
7861                                 r = 0;
7862                                 goto out;
7863                         }
7864                 }
7865                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7866                         vcpu_scan_ioapic(vcpu);
7867                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7868                         vcpu_load_eoi_exitmap(vcpu);
7869                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7870                         kvm_vcpu_reload_apic_access_page(vcpu);
7871                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7872                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7873                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7874                         r = 0;
7875                         goto out;
7876                 }
7877                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7878                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7879                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7880                         r = 0;
7881                         goto out;
7882                 }
7883                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7884                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7885                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7886                         r = 0;
7887                         goto out;
7888                 }
7889
7890                 /*
7891                  * KVM_REQ_HV_STIMER has to be processed after
7892                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7893                  * depend on the guest clock being up-to-date
7894                  */
7895                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7896                         kvm_hv_process_stimers(vcpu);
7897         }
7898
7899         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7900                 ++vcpu->stat.req_event;
7901                 kvm_apic_accept_events(vcpu);
7902                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7903                         r = 1;
7904                         goto out;
7905                 }
7906
7907                 if (inject_pending_event(vcpu, req_int_win) != 0)
7908                         req_immediate_exit = true;
7909                 else {
7910                         /* Enable SMI/NMI/IRQ window open exits if needed.
7911                          *
7912                          * SMIs have three cases:
7913                          * 1) They can be nested, and then there is nothing to
7914                          *    do here because RSM will cause a vmexit anyway.
7915                          * 2) There is an ISA-specific reason why SMI cannot be
7916                          *    injected, and the moment when this changes can be
7917                          *    intercepted.
7918                          * 3) Or the SMI can be pending because
7919                          *    inject_pending_event has completed the injection
7920                          *    of an IRQ or NMI from the previous vmexit, and
7921                          *    then we request an immediate exit to inject the
7922                          *    SMI.
7923                          */
7924                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7925                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7926                                         req_immediate_exit = true;
7927                         if (vcpu->arch.nmi_pending)
7928                                 kvm_x86_ops->enable_nmi_window(vcpu);
7929                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7930                                 kvm_x86_ops->enable_irq_window(vcpu);
7931                         WARN_ON(vcpu->arch.exception.pending);
7932                 }
7933
7934                 if (kvm_lapic_enabled(vcpu)) {
7935                         update_cr8_intercept(vcpu);
7936                         kvm_lapic_sync_to_vapic(vcpu);
7937                 }
7938         }
7939
7940         r = kvm_mmu_reload(vcpu);
7941         if (unlikely(r)) {
7942                 goto cancel_injection;
7943         }
7944
7945         preempt_disable();
7946
7947         kvm_x86_ops->prepare_guest_switch(vcpu);
7948
7949         /*
7950          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7951          * IPI are then delayed after guest entry, which ensures that they
7952          * result in virtual interrupt delivery.
7953          */
7954         local_irq_disable();
7955         vcpu->mode = IN_GUEST_MODE;
7956
7957         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7958
7959         /*
7960          * 1) We should set ->mode before checking ->requests.  Please see
7961          * the comment in kvm_vcpu_exiting_guest_mode().
7962          *
7963          * 2) For APICv, we should set ->mode before checking PID.ON. This
7964          * pairs with the memory barrier implicit in pi_test_and_set_on
7965          * (see vmx_deliver_posted_interrupt).
7966          *
7967          * 3) This also orders the write to mode from any reads to the page
7968          * tables done while the VCPU is running.  Please see the comment
7969          * in kvm_flush_remote_tlbs.
7970          */
7971         smp_mb__after_srcu_read_unlock();
7972
7973         /*
7974          * This handles the case where a posted interrupt was
7975          * notified with kvm_vcpu_kick.
7976          */
7977         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7978                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7979
7980         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7981             || need_resched() || signal_pending(current)) {
7982                 vcpu->mode = OUTSIDE_GUEST_MODE;
7983                 smp_wmb();
7984                 local_irq_enable();
7985                 preempt_enable();
7986                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7987                 r = 1;
7988                 goto cancel_injection;
7989         }
7990
7991         if (req_immediate_exit) {
7992                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7993                 kvm_x86_ops->request_immediate_exit(vcpu);
7994         }
7995
7996         trace_kvm_entry(vcpu->vcpu_id);
7997         guest_enter_irqoff();
7998
7999         fpregs_assert_state_consistent();
8000         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8001                 switch_fpu_return();
8002
8003         if (unlikely(vcpu->arch.switch_db_regs)) {
8004                 set_debugreg(0, 7);
8005                 set_debugreg(vcpu->arch.eff_db[0], 0);
8006                 set_debugreg(vcpu->arch.eff_db[1], 1);
8007                 set_debugreg(vcpu->arch.eff_db[2], 2);
8008                 set_debugreg(vcpu->arch.eff_db[3], 3);
8009                 set_debugreg(vcpu->arch.dr6, 6);
8010                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8011         }
8012
8013         kvm_x86_ops->run(vcpu);
8014
8015         /*
8016          * Do this here before restoring debug registers on the host.  And
8017          * since we do this before handling the vmexit, a DR access vmexit
8018          * can (a) read the correct value of the debug registers, (b) set
8019          * KVM_DEBUGREG_WONT_EXIT again.
8020          */
8021         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8022                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8023                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8024                 kvm_update_dr0123(vcpu);
8025                 kvm_update_dr6(vcpu);
8026                 kvm_update_dr7(vcpu);
8027                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8028         }
8029
8030         /*
8031          * If the guest has used debug registers, at least dr7
8032          * will be disabled while returning to the host.
8033          * If we don't have active breakpoints in the host, we don't
8034          * care about the messed up debug address registers. But if
8035          * we have some of them active, restore the old state.
8036          */
8037         if (hw_breakpoint_active())
8038                 hw_breakpoint_restore();
8039
8040         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8041
8042         vcpu->mode = OUTSIDE_GUEST_MODE;
8043         smp_wmb();
8044
8045         kvm_x86_ops->handle_exit_irqoff(vcpu);
8046
8047         /*
8048          * Consume any pending interrupts, including the possible source of
8049          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8050          * An instruction is required after local_irq_enable() to fully unblock
8051          * interrupts on processors that implement an interrupt shadow, the
8052          * stat.exits increment will do nicely.
8053          */
8054         kvm_before_interrupt(vcpu);
8055         local_irq_enable();
8056         ++vcpu->stat.exits;
8057         local_irq_disable();
8058         kvm_after_interrupt(vcpu);
8059
8060         guest_exit_irqoff();
8061         if (lapic_in_kernel(vcpu)) {
8062                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8063                 if (delta != S64_MIN) {
8064                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8065                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8066                 }
8067         }
8068
8069         local_irq_enable();
8070         preempt_enable();
8071
8072         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8073
8074         /*
8075          * Profile KVM exit RIPs:
8076          */
8077         if (unlikely(prof_on == KVM_PROFILING)) {
8078                 unsigned long rip = kvm_rip_read(vcpu);
8079                 profile_hit(KVM_PROFILING, (void *)rip);
8080         }
8081
8082         if (unlikely(vcpu->arch.tsc_always_catchup))
8083                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8084
8085         if (vcpu->arch.apic_attention)
8086                 kvm_lapic_sync_from_vapic(vcpu);
8087
8088         vcpu->arch.gpa_available = false;
8089         r = kvm_x86_ops->handle_exit(vcpu);
8090         return r;
8091
8092 cancel_injection:
8093         kvm_x86_ops->cancel_injection(vcpu);
8094         if (unlikely(vcpu->arch.apic_attention))
8095                 kvm_lapic_sync_from_vapic(vcpu);
8096 out:
8097         return r;
8098 }
8099
8100 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8101 {
8102         if (!kvm_arch_vcpu_runnable(vcpu) &&
8103             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8104                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8105                 kvm_vcpu_block(vcpu);
8106                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8107
8108                 if (kvm_x86_ops->post_block)
8109                         kvm_x86_ops->post_block(vcpu);
8110
8111                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8112                         return 1;
8113         }
8114
8115         kvm_apic_accept_events(vcpu);
8116         switch(vcpu->arch.mp_state) {
8117         case KVM_MP_STATE_HALTED:
8118                 vcpu->arch.pv.pv_unhalted = false;
8119                 vcpu->arch.mp_state =
8120                         KVM_MP_STATE_RUNNABLE;
8121                 /* fall through */
8122         case KVM_MP_STATE_RUNNABLE:
8123                 vcpu->arch.apf.halted = false;
8124                 break;
8125         case KVM_MP_STATE_INIT_RECEIVED:
8126                 break;
8127         default:
8128                 return -EINTR;
8129                 break;
8130         }
8131         return 1;
8132 }
8133
8134 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8135 {
8136         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8137                 kvm_x86_ops->check_nested_events(vcpu, false);
8138
8139         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8140                 !vcpu->arch.apf.halted);
8141 }
8142
8143 static int vcpu_run(struct kvm_vcpu *vcpu)
8144 {
8145         int r;
8146         struct kvm *kvm = vcpu->kvm;
8147
8148         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8149         vcpu->arch.l1tf_flush_l1d = true;
8150
8151         for (;;) {
8152                 if (kvm_vcpu_running(vcpu)) {
8153                         r = vcpu_enter_guest(vcpu);
8154                 } else {
8155                         r = vcpu_block(kvm, vcpu);
8156                 }
8157
8158                 if (r <= 0)
8159                         break;
8160
8161                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8162                 if (kvm_cpu_has_pending_timer(vcpu))
8163                         kvm_inject_pending_timer_irqs(vcpu);
8164
8165                 if (dm_request_for_irq_injection(vcpu) &&
8166                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8167                         r = 0;
8168                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8169                         ++vcpu->stat.request_irq_exits;
8170                         break;
8171                 }
8172
8173                 kvm_check_async_pf_completion(vcpu);
8174
8175                 if (signal_pending(current)) {
8176                         r = -EINTR;
8177                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8178                         ++vcpu->stat.signal_exits;
8179                         break;
8180                 }
8181                 if (need_resched()) {
8182                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8183                         cond_resched();
8184                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8185                 }
8186         }
8187
8188         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8189
8190         return r;
8191 }
8192
8193 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8194 {
8195         int r;
8196         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8197         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8198         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8199         if (r != EMULATE_DONE)
8200                 return 0;
8201         return 1;
8202 }
8203
8204 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8205 {
8206         BUG_ON(!vcpu->arch.pio.count);
8207
8208         return complete_emulated_io(vcpu);
8209 }
8210
8211 /*
8212  * Implements the following, as a state machine:
8213  *
8214  * read:
8215  *   for each fragment
8216  *     for each mmio piece in the fragment
8217  *       write gpa, len
8218  *       exit
8219  *       copy data
8220  *   execute insn
8221  *
8222  * write:
8223  *   for each fragment
8224  *     for each mmio piece in the fragment
8225  *       write gpa, len
8226  *       copy data
8227  *       exit
8228  */
8229 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8230 {
8231         struct kvm_run *run = vcpu->run;
8232         struct kvm_mmio_fragment *frag;
8233         unsigned len;
8234
8235         BUG_ON(!vcpu->mmio_needed);
8236
8237         /* Complete previous fragment */
8238         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8239         len = min(8u, frag->len);
8240         if (!vcpu->mmio_is_write)
8241                 memcpy(frag->data, run->mmio.data, len);
8242
8243         if (frag->len <= 8) {
8244                 /* Switch to the next fragment. */
8245                 frag++;
8246                 vcpu->mmio_cur_fragment++;
8247         } else {
8248                 /* Go forward to the next mmio piece. */
8249                 frag->data += len;
8250                 frag->gpa += len;
8251                 frag->len -= len;
8252         }
8253
8254         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8255                 vcpu->mmio_needed = 0;
8256
8257                 /* FIXME: return into emulator if single-stepping.  */
8258                 if (vcpu->mmio_is_write)
8259                         return 1;
8260                 vcpu->mmio_read_completed = 1;
8261                 return complete_emulated_io(vcpu);
8262         }
8263
8264         run->exit_reason = KVM_EXIT_MMIO;
8265         run->mmio.phys_addr = frag->gpa;
8266         if (vcpu->mmio_is_write)
8267                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8268         run->mmio.len = min(8u, frag->len);
8269         run->mmio.is_write = vcpu->mmio_is_write;
8270         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8271         return 0;
8272 }
8273
8274 /* Swap (qemu) user FPU context for the guest FPU context. */
8275 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8276 {
8277         fpregs_lock();
8278
8279         copy_fpregs_to_fpstate(&current->thread.fpu);
8280         /* PKRU is separately restored in kvm_x86_ops->run.  */
8281         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8282                                 ~XFEATURE_MASK_PKRU);
8283
8284         fpregs_mark_activate();
8285         fpregs_unlock();
8286
8287         trace_kvm_fpu(1);
8288 }
8289
8290 /* When vcpu_run ends, restore user space FPU context. */
8291 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8292 {
8293         fpregs_lock();
8294
8295         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8296         copy_kernel_to_fpregs(&current->thread.fpu.state);
8297
8298         fpregs_mark_activate();
8299         fpregs_unlock();
8300
8301         ++vcpu->stat.fpu_reload;
8302         trace_kvm_fpu(0);
8303 }
8304
8305 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8306 {
8307         int r;
8308
8309         vcpu_load(vcpu);
8310         kvm_sigset_activate(vcpu);
8311         kvm_load_guest_fpu(vcpu);
8312
8313         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8314                 if (kvm_run->immediate_exit) {
8315                         r = -EINTR;
8316                         goto out;
8317                 }
8318                 kvm_vcpu_block(vcpu);
8319                 kvm_apic_accept_events(vcpu);
8320                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8321                 r = -EAGAIN;
8322                 if (signal_pending(current)) {
8323                         r = -EINTR;
8324                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8325                         ++vcpu->stat.signal_exits;
8326                 }
8327                 goto out;
8328         }
8329
8330         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8331                 r = -EINVAL;
8332                 goto out;
8333         }
8334
8335         if (vcpu->run->kvm_dirty_regs) {
8336                 r = sync_regs(vcpu);
8337                 if (r != 0)
8338                         goto out;
8339         }
8340
8341         /* re-sync apic's tpr */
8342         if (!lapic_in_kernel(vcpu)) {
8343                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8344                         r = -EINVAL;
8345                         goto out;
8346                 }
8347         }
8348
8349         if (unlikely(vcpu->arch.complete_userspace_io)) {
8350                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8351                 vcpu->arch.complete_userspace_io = NULL;
8352                 r = cui(vcpu);
8353                 if (r <= 0)
8354                         goto out;
8355         } else
8356                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8357
8358         if (kvm_run->immediate_exit)
8359                 r = -EINTR;
8360         else
8361                 r = vcpu_run(vcpu);
8362
8363 out:
8364         kvm_put_guest_fpu(vcpu);
8365         if (vcpu->run->kvm_valid_regs)
8366                 store_regs(vcpu);
8367         post_kvm_run_save(vcpu);
8368         kvm_sigset_deactivate(vcpu);
8369
8370         vcpu_put(vcpu);
8371         return r;
8372 }
8373
8374 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8375 {
8376         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8377                 /*
8378                  * We are here if userspace calls get_regs() in the middle of
8379                  * instruction emulation. Registers state needs to be copied
8380                  * back from emulation context to vcpu. Userspace shouldn't do
8381                  * that usually, but some bad designed PV devices (vmware
8382                  * backdoor interface) need this to work
8383                  */
8384                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8385                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8386         }
8387         regs->rax = kvm_rax_read(vcpu);
8388         regs->rbx = kvm_rbx_read(vcpu);
8389         regs->rcx = kvm_rcx_read(vcpu);
8390         regs->rdx = kvm_rdx_read(vcpu);
8391         regs->rsi = kvm_rsi_read(vcpu);
8392         regs->rdi = kvm_rdi_read(vcpu);
8393         regs->rsp = kvm_rsp_read(vcpu);
8394         regs->rbp = kvm_rbp_read(vcpu);
8395 #ifdef CONFIG_X86_64
8396         regs->r8 = kvm_r8_read(vcpu);
8397         regs->r9 = kvm_r9_read(vcpu);
8398         regs->r10 = kvm_r10_read(vcpu);
8399         regs->r11 = kvm_r11_read(vcpu);
8400         regs->r12 = kvm_r12_read(vcpu);
8401         regs->r13 = kvm_r13_read(vcpu);
8402         regs->r14 = kvm_r14_read(vcpu);
8403         regs->r15 = kvm_r15_read(vcpu);
8404 #endif
8405
8406         regs->rip = kvm_rip_read(vcpu);
8407         regs->rflags = kvm_get_rflags(vcpu);
8408 }
8409
8410 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8411 {
8412         vcpu_load(vcpu);
8413         __get_regs(vcpu, regs);
8414         vcpu_put(vcpu);
8415         return 0;
8416 }
8417
8418 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8419 {
8420         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8421         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8422
8423         kvm_rax_write(vcpu, regs->rax);
8424         kvm_rbx_write(vcpu, regs->rbx);
8425         kvm_rcx_write(vcpu, regs->rcx);
8426         kvm_rdx_write(vcpu, regs->rdx);
8427         kvm_rsi_write(vcpu, regs->rsi);
8428         kvm_rdi_write(vcpu, regs->rdi);
8429         kvm_rsp_write(vcpu, regs->rsp);
8430         kvm_rbp_write(vcpu, regs->rbp);
8431 #ifdef CONFIG_X86_64
8432         kvm_r8_write(vcpu, regs->r8);
8433         kvm_r9_write(vcpu, regs->r9);
8434         kvm_r10_write(vcpu, regs->r10);
8435         kvm_r11_write(vcpu, regs->r11);
8436         kvm_r12_write(vcpu, regs->r12);
8437         kvm_r13_write(vcpu, regs->r13);
8438         kvm_r14_write(vcpu, regs->r14);
8439         kvm_r15_write(vcpu, regs->r15);
8440 #endif
8441
8442         kvm_rip_write(vcpu, regs->rip);
8443         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8444
8445         vcpu->arch.exception.pending = false;
8446
8447         kvm_make_request(KVM_REQ_EVENT, vcpu);
8448 }
8449
8450 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8451 {
8452         vcpu_load(vcpu);
8453         __set_regs(vcpu, regs);
8454         vcpu_put(vcpu);
8455         return 0;
8456 }
8457
8458 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8459 {
8460         struct kvm_segment cs;
8461
8462         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8463         *db = cs.db;
8464         *l = cs.l;
8465 }
8466 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8467
8468 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8469 {
8470         struct desc_ptr dt;
8471
8472         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8473         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8474         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8475         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8476         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8477         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8478
8479         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8480         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8481
8482         kvm_x86_ops->get_idt(vcpu, &dt);
8483         sregs->idt.limit = dt.size;
8484         sregs->idt.base = dt.address;
8485         kvm_x86_ops->get_gdt(vcpu, &dt);
8486         sregs->gdt.limit = dt.size;
8487         sregs->gdt.base = dt.address;
8488
8489         sregs->cr0 = kvm_read_cr0(vcpu);
8490         sregs->cr2 = vcpu->arch.cr2;
8491         sregs->cr3 = kvm_read_cr3(vcpu);
8492         sregs->cr4 = kvm_read_cr4(vcpu);
8493         sregs->cr8 = kvm_get_cr8(vcpu);
8494         sregs->efer = vcpu->arch.efer;
8495         sregs->apic_base = kvm_get_apic_base(vcpu);
8496
8497         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8498
8499         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8500                 set_bit(vcpu->arch.interrupt.nr,
8501                         (unsigned long *)sregs->interrupt_bitmap);
8502 }
8503
8504 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8505                                   struct kvm_sregs *sregs)
8506 {
8507         vcpu_load(vcpu);
8508         __get_sregs(vcpu, sregs);
8509         vcpu_put(vcpu);
8510         return 0;
8511 }
8512
8513 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8514                                     struct kvm_mp_state *mp_state)
8515 {
8516         vcpu_load(vcpu);
8517
8518         kvm_apic_accept_events(vcpu);
8519         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8520                                         vcpu->arch.pv.pv_unhalted)
8521                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8522         else
8523                 mp_state->mp_state = vcpu->arch.mp_state;
8524
8525         vcpu_put(vcpu);
8526         return 0;
8527 }
8528
8529 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8530                                     struct kvm_mp_state *mp_state)
8531 {
8532         int ret = -EINVAL;
8533
8534         vcpu_load(vcpu);
8535
8536         if (!lapic_in_kernel(vcpu) &&
8537             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8538                 goto out;
8539
8540         /* INITs are latched while in SMM */
8541         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8542             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8543              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8544                 goto out;
8545
8546         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8547                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8548                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8549         } else
8550                 vcpu->arch.mp_state = mp_state->mp_state;
8551         kvm_make_request(KVM_REQ_EVENT, vcpu);
8552
8553         ret = 0;
8554 out:
8555         vcpu_put(vcpu);
8556         return ret;
8557 }
8558
8559 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8560                     int reason, bool has_error_code, u32 error_code)
8561 {
8562         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8563         int ret;
8564
8565         init_emulate_ctxt(vcpu);
8566
8567         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8568                                    has_error_code, error_code);
8569
8570         if (ret)
8571                 return EMULATE_FAIL;
8572
8573         kvm_rip_write(vcpu, ctxt->eip);
8574         kvm_set_rflags(vcpu, ctxt->eflags);
8575         kvm_make_request(KVM_REQ_EVENT, vcpu);
8576         return EMULATE_DONE;
8577 }
8578 EXPORT_SYMBOL_GPL(kvm_task_switch);
8579
8580 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8581 {
8582         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8583                         (sregs->cr4 & X86_CR4_OSXSAVE))
8584                 return  -EINVAL;
8585
8586         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8587                 /*
8588                  * When EFER.LME and CR0.PG are set, the processor is in
8589                  * 64-bit mode (though maybe in a 32-bit code segment).
8590                  * CR4.PAE and EFER.LMA must be set.
8591                  */
8592                 if (!(sregs->cr4 & X86_CR4_PAE)
8593                     || !(sregs->efer & EFER_LMA))
8594                         return -EINVAL;
8595         } else {
8596                 /*
8597                  * Not in 64-bit mode: EFER.LMA is clear and the code
8598                  * segment cannot be 64-bit.
8599                  */
8600                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8601                         return -EINVAL;
8602         }
8603
8604         return 0;
8605 }
8606
8607 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8608 {
8609         struct msr_data apic_base_msr;
8610         int mmu_reset_needed = 0;
8611         int cpuid_update_needed = 0;
8612         int pending_vec, max_bits, idx;
8613         struct desc_ptr dt;
8614         int ret = -EINVAL;
8615
8616         if (kvm_valid_sregs(vcpu, sregs))
8617                 goto out;
8618
8619         apic_base_msr.data = sregs->apic_base;
8620         apic_base_msr.host_initiated = true;
8621         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8622                 goto out;
8623
8624         dt.size = sregs->idt.limit;
8625         dt.address = sregs->idt.base;
8626         kvm_x86_ops->set_idt(vcpu, &dt);
8627         dt.size = sregs->gdt.limit;
8628         dt.address = sregs->gdt.base;
8629         kvm_x86_ops->set_gdt(vcpu, &dt);
8630
8631         vcpu->arch.cr2 = sregs->cr2;
8632         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8633         vcpu->arch.cr3 = sregs->cr3;
8634         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8635
8636         kvm_set_cr8(vcpu, sregs->cr8);
8637
8638         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8639         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8640
8641         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8642         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8643         vcpu->arch.cr0 = sregs->cr0;
8644
8645         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8646         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8647                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8648         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8649         if (cpuid_update_needed)
8650                 kvm_update_cpuid(vcpu);
8651
8652         idx = srcu_read_lock(&vcpu->kvm->srcu);
8653         if (is_pae_paging(vcpu)) {
8654                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8655                 mmu_reset_needed = 1;
8656         }
8657         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8658
8659         if (mmu_reset_needed)
8660                 kvm_mmu_reset_context(vcpu);
8661
8662         max_bits = KVM_NR_INTERRUPTS;
8663         pending_vec = find_first_bit(
8664                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8665         if (pending_vec < max_bits) {
8666                 kvm_queue_interrupt(vcpu, pending_vec, false);
8667                 pr_debug("Set back pending irq %d\n", pending_vec);
8668         }
8669
8670         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8671         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8672         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8673         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8674         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8675         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8676
8677         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8678         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8679
8680         update_cr8_intercept(vcpu);
8681
8682         /* Older userspace won't unhalt the vcpu on reset. */
8683         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8684             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8685             !is_protmode(vcpu))
8686                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8687
8688         kvm_make_request(KVM_REQ_EVENT, vcpu);
8689
8690         ret = 0;
8691 out:
8692         return ret;
8693 }
8694
8695 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8696                                   struct kvm_sregs *sregs)
8697 {
8698         int ret;
8699
8700         vcpu_load(vcpu);
8701         ret = __set_sregs(vcpu, sregs);
8702         vcpu_put(vcpu);
8703         return ret;
8704 }
8705
8706 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8707                                         struct kvm_guest_debug *dbg)
8708 {
8709         unsigned long rflags;
8710         int i, r;
8711
8712         vcpu_load(vcpu);
8713
8714         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8715                 r = -EBUSY;
8716                 if (vcpu->arch.exception.pending)
8717                         goto out;
8718                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8719                         kvm_queue_exception(vcpu, DB_VECTOR);
8720                 else
8721                         kvm_queue_exception(vcpu, BP_VECTOR);
8722         }
8723
8724         /*
8725          * Read rflags as long as potentially injected trace flags are still
8726          * filtered out.
8727          */
8728         rflags = kvm_get_rflags(vcpu);
8729
8730         vcpu->guest_debug = dbg->control;
8731         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8732                 vcpu->guest_debug = 0;
8733
8734         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8735                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8736                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8737                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8738         } else {
8739                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8740                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8741         }
8742         kvm_update_dr7(vcpu);
8743
8744         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8745                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8746                         get_segment_base(vcpu, VCPU_SREG_CS);
8747
8748         /*
8749          * Trigger an rflags update that will inject or remove the trace
8750          * flags.
8751          */
8752         kvm_set_rflags(vcpu, rflags);
8753
8754         kvm_x86_ops->update_bp_intercept(vcpu);
8755
8756         r = 0;
8757
8758 out:
8759         vcpu_put(vcpu);
8760         return r;
8761 }
8762
8763 /*
8764  * Translate a guest virtual address to a guest physical address.
8765  */
8766 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8767                                     struct kvm_translation *tr)
8768 {
8769         unsigned long vaddr = tr->linear_address;
8770         gpa_t gpa;
8771         int idx;
8772
8773         vcpu_load(vcpu);
8774
8775         idx = srcu_read_lock(&vcpu->kvm->srcu);
8776         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8777         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8778         tr->physical_address = gpa;
8779         tr->valid = gpa != UNMAPPED_GVA;
8780         tr->writeable = 1;
8781         tr->usermode = 0;
8782
8783         vcpu_put(vcpu);
8784         return 0;
8785 }
8786
8787 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8788 {
8789         struct fxregs_state *fxsave;
8790
8791         vcpu_load(vcpu);
8792
8793         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8794         memcpy(fpu->fpr, fxsave->st_space, 128);
8795         fpu->fcw = fxsave->cwd;
8796         fpu->fsw = fxsave->swd;
8797         fpu->ftwx = fxsave->twd;
8798         fpu->last_opcode = fxsave->fop;
8799         fpu->last_ip = fxsave->rip;
8800         fpu->last_dp = fxsave->rdp;
8801         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8802
8803         vcpu_put(vcpu);
8804         return 0;
8805 }
8806
8807 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8808 {
8809         struct fxregs_state *fxsave;
8810
8811         vcpu_load(vcpu);
8812
8813         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8814
8815         memcpy(fxsave->st_space, fpu->fpr, 128);
8816         fxsave->cwd = fpu->fcw;
8817         fxsave->swd = fpu->fsw;
8818         fxsave->twd = fpu->ftwx;
8819         fxsave->fop = fpu->last_opcode;
8820         fxsave->rip = fpu->last_ip;
8821         fxsave->rdp = fpu->last_dp;
8822         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8823
8824         vcpu_put(vcpu);
8825         return 0;
8826 }
8827
8828 static void store_regs(struct kvm_vcpu *vcpu)
8829 {
8830         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8831
8832         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8833                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8834
8835         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8836                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8837
8838         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8839                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8840                                 vcpu, &vcpu->run->s.regs.events);
8841 }
8842
8843 static int sync_regs(struct kvm_vcpu *vcpu)
8844 {
8845         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8846                 return -EINVAL;
8847
8848         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8849                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8850                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8851         }
8852         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8853                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8854                         return -EINVAL;
8855                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8856         }
8857         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8858                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8859                                 vcpu, &vcpu->run->s.regs.events))
8860                         return -EINVAL;
8861                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8862         }
8863
8864         return 0;
8865 }
8866
8867 static void fx_init(struct kvm_vcpu *vcpu)
8868 {
8869         fpstate_init(&vcpu->arch.guest_fpu->state);
8870         if (boot_cpu_has(X86_FEATURE_XSAVES))
8871                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
8872                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8873
8874         /*
8875          * Ensure guest xcr0 is valid for loading
8876          */
8877         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8878
8879         vcpu->arch.cr0 |= X86_CR0_ET;
8880 }
8881
8882 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8883 {
8884         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8885
8886         kvmclock_reset(vcpu);
8887
8888         kvm_x86_ops->vcpu_free(vcpu);
8889         free_cpumask_var(wbinvd_dirty_mask);
8890 }
8891
8892 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8893                                                 unsigned int id)
8894 {
8895         struct kvm_vcpu *vcpu;
8896
8897         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8898                 printk_once(KERN_WARNING
8899                 "kvm: SMP vm created on host with unstable TSC; "
8900                 "guest TSC will not be reliable\n");
8901
8902         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8903
8904         return vcpu;
8905 }
8906
8907 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8908 {
8909         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
8910         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8911         kvm_vcpu_mtrr_init(vcpu);
8912         vcpu_load(vcpu);
8913         kvm_vcpu_reset(vcpu, false);
8914         kvm_init_mmu(vcpu, false);
8915         vcpu_put(vcpu);
8916         return 0;
8917 }
8918
8919 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8920 {
8921         struct msr_data msr;
8922         struct kvm *kvm = vcpu->kvm;
8923
8924         kvm_hv_vcpu_postcreate(vcpu);
8925
8926         if (mutex_lock_killable(&vcpu->mutex))
8927                 return;
8928         vcpu_load(vcpu);
8929         msr.data = 0x0;
8930         msr.index = MSR_IA32_TSC;
8931         msr.host_initiated = true;
8932         kvm_write_tsc(vcpu, &msr);
8933         vcpu_put(vcpu);
8934
8935         /* poll control enabled by default */
8936         vcpu->arch.msr_kvm_poll_control = 1;
8937
8938         mutex_unlock(&vcpu->mutex);
8939
8940         if (!kvmclock_periodic_sync)
8941                 return;
8942
8943         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8944                                         KVMCLOCK_SYNC_PERIOD);
8945 }
8946
8947 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8948 {
8949         vcpu->arch.apf.msr_val = 0;
8950
8951         vcpu_load(vcpu);
8952         kvm_mmu_unload(vcpu);
8953         vcpu_put(vcpu);
8954
8955         kvm_x86_ops->vcpu_free(vcpu);
8956 }
8957
8958 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8959 {
8960         kvm_lapic_reset(vcpu, init_event);
8961
8962         vcpu->arch.hflags = 0;
8963
8964         vcpu->arch.smi_pending = 0;
8965         vcpu->arch.smi_count = 0;
8966         atomic_set(&vcpu->arch.nmi_queued, 0);
8967         vcpu->arch.nmi_pending = 0;
8968         vcpu->arch.nmi_injected = false;
8969         kvm_clear_interrupt_queue(vcpu);
8970         kvm_clear_exception_queue(vcpu);
8971         vcpu->arch.exception.pending = false;
8972
8973         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8974         kvm_update_dr0123(vcpu);
8975         vcpu->arch.dr6 = DR6_INIT;
8976         kvm_update_dr6(vcpu);
8977         vcpu->arch.dr7 = DR7_FIXED_1;
8978         kvm_update_dr7(vcpu);
8979
8980         vcpu->arch.cr2 = 0;
8981
8982         kvm_make_request(KVM_REQ_EVENT, vcpu);
8983         vcpu->arch.apf.msr_val = 0;
8984         vcpu->arch.st.msr_val = 0;
8985
8986         kvmclock_reset(vcpu);
8987
8988         kvm_clear_async_pf_completion_queue(vcpu);
8989         kvm_async_pf_hash_reset(vcpu);
8990         vcpu->arch.apf.halted = false;
8991
8992         if (kvm_mpx_supported()) {
8993                 void *mpx_state_buffer;
8994
8995                 /*
8996                  * To avoid have the INIT path from kvm_apic_has_events() that be
8997                  * called with loaded FPU and does not let userspace fix the state.
8998                  */
8999                 if (init_event)
9000                         kvm_put_guest_fpu(vcpu);
9001                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9002                                         XFEATURE_BNDREGS);
9003                 if (mpx_state_buffer)
9004                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9005                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9006                                         XFEATURE_BNDCSR);
9007                 if (mpx_state_buffer)
9008                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9009                 if (init_event)
9010                         kvm_load_guest_fpu(vcpu);
9011         }
9012
9013         if (!init_event) {
9014                 kvm_pmu_reset(vcpu);
9015                 vcpu->arch.smbase = 0x30000;
9016
9017                 vcpu->arch.msr_misc_features_enables = 0;
9018
9019                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9020         }
9021
9022         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9023         vcpu->arch.regs_avail = ~0;
9024         vcpu->arch.regs_dirty = ~0;
9025
9026         vcpu->arch.ia32_xss = 0;
9027
9028         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9029 }
9030
9031 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9032 {
9033         struct kvm_segment cs;
9034
9035         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9036         cs.selector = vector << 8;
9037         cs.base = vector << 12;
9038         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9039         kvm_rip_write(vcpu, 0);
9040 }
9041
9042 int kvm_arch_hardware_enable(void)
9043 {
9044         struct kvm *kvm;
9045         struct kvm_vcpu *vcpu;
9046         int i;
9047         int ret;
9048         u64 local_tsc;
9049         u64 max_tsc = 0;
9050         bool stable, backwards_tsc = false;
9051
9052         kvm_shared_msr_cpu_online();
9053         ret = kvm_x86_ops->hardware_enable();
9054         if (ret != 0)
9055                 return ret;
9056
9057         local_tsc = rdtsc();
9058         stable = !kvm_check_tsc_unstable();
9059         list_for_each_entry(kvm, &vm_list, vm_list) {
9060                 kvm_for_each_vcpu(i, vcpu, kvm) {
9061                         if (!stable && vcpu->cpu == smp_processor_id())
9062                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9063                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9064                                 backwards_tsc = true;
9065                                 if (vcpu->arch.last_host_tsc > max_tsc)
9066                                         max_tsc = vcpu->arch.last_host_tsc;
9067                         }
9068                 }
9069         }
9070
9071         /*
9072          * Sometimes, even reliable TSCs go backwards.  This happens on
9073          * platforms that reset TSC during suspend or hibernate actions, but
9074          * maintain synchronization.  We must compensate.  Fortunately, we can
9075          * detect that condition here, which happens early in CPU bringup,
9076          * before any KVM threads can be running.  Unfortunately, we can't
9077          * bring the TSCs fully up to date with real time, as we aren't yet far
9078          * enough into CPU bringup that we know how much real time has actually
9079          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9080          * variables that haven't been updated yet.
9081          *
9082          * So we simply find the maximum observed TSC above, then record the
9083          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9084          * the adjustment will be applied.  Note that we accumulate
9085          * adjustments, in case multiple suspend cycles happen before some VCPU
9086          * gets a chance to run again.  In the event that no KVM threads get a
9087          * chance to run, we will miss the entire elapsed period, as we'll have
9088          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9089          * loose cycle time.  This isn't too big a deal, since the loss will be
9090          * uniform across all VCPUs (not to mention the scenario is extremely
9091          * unlikely). It is possible that a second hibernate recovery happens
9092          * much faster than a first, causing the observed TSC here to be
9093          * smaller; this would require additional padding adjustment, which is
9094          * why we set last_host_tsc to the local tsc observed here.
9095          *
9096          * N.B. - this code below runs only on platforms with reliable TSC,
9097          * as that is the only way backwards_tsc is set above.  Also note
9098          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9099          * have the same delta_cyc adjustment applied if backwards_tsc
9100          * is detected.  Note further, this adjustment is only done once,
9101          * as we reset last_host_tsc on all VCPUs to stop this from being
9102          * called multiple times (one for each physical CPU bringup).
9103          *
9104          * Platforms with unreliable TSCs don't have to deal with this, they
9105          * will be compensated by the logic in vcpu_load, which sets the TSC to
9106          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9107          * guarantee that they stay in perfect synchronization.
9108          */
9109         if (backwards_tsc) {
9110                 u64 delta_cyc = max_tsc - local_tsc;
9111                 list_for_each_entry(kvm, &vm_list, vm_list) {
9112                         kvm->arch.backwards_tsc_observed = true;
9113                         kvm_for_each_vcpu(i, vcpu, kvm) {
9114                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9115                                 vcpu->arch.last_host_tsc = local_tsc;
9116                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9117                         }
9118
9119                         /*
9120                          * We have to disable TSC offset matching.. if you were
9121                          * booting a VM while issuing an S4 host suspend....
9122                          * you may have some problem.  Solving this issue is
9123                          * left as an exercise to the reader.
9124                          */
9125                         kvm->arch.last_tsc_nsec = 0;
9126                         kvm->arch.last_tsc_write = 0;
9127                 }
9128
9129         }
9130         return 0;
9131 }
9132
9133 void kvm_arch_hardware_disable(void)
9134 {
9135         kvm_x86_ops->hardware_disable();
9136         drop_user_return_notifiers();
9137 }
9138
9139 int kvm_arch_hardware_setup(void)
9140 {
9141         int r;
9142
9143         r = kvm_x86_ops->hardware_setup();
9144         if (r != 0)
9145                 return r;
9146
9147         if (kvm_has_tsc_control) {
9148                 /*
9149                  * Make sure the user can only configure tsc_khz values that
9150                  * fit into a signed integer.
9151                  * A min value is not calculated because it will always
9152                  * be 1 on all machines.
9153                  */
9154                 u64 max = min(0x7fffffffULL,
9155                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9156                 kvm_max_guest_tsc_khz = max;
9157
9158                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9159         }
9160
9161         kvm_init_msr_list();
9162         return 0;
9163 }
9164
9165 void kvm_arch_hardware_unsetup(void)
9166 {
9167         kvm_x86_ops->hardware_unsetup();
9168 }
9169
9170 int kvm_arch_check_processor_compat(void)
9171 {
9172         return kvm_x86_ops->check_processor_compatibility();
9173 }
9174
9175 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9176 {
9177         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9178 }
9179 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9180
9181 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9182 {
9183         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9184 }
9185
9186 struct static_key kvm_no_apic_vcpu __read_mostly;
9187 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9188
9189 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9190 {
9191         struct page *page;
9192         int r;
9193
9194         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9195         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9196                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9197         else
9198                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9199
9200         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9201         if (!page) {
9202                 r = -ENOMEM;
9203                 goto fail;
9204         }
9205         vcpu->arch.pio_data = page_address(page);
9206
9207         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9208
9209         r = kvm_mmu_create(vcpu);
9210         if (r < 0)
9211                 goto fail_free_pio_data;
9212
9213         if (irqchip_in_kernel(vcpu->kvm)) {
9214                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9215                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9216                 if (r < 0)
9217                         goto fail_mmu_destroy;
9218         } else
9219                 static_key_slow_inc(&kvm_no_apic_vcpu);
9220
9221         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9222                                        GFP_KERNEL_ACCOUNT);
9223         if (!vcpu->arch.mce_banks) {
9224                 r = -ENOMEM;
9225                 goto fail_free_lapic;
9226         }
9227         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9228
9229         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9230                                 GFP_KERNEL_ACCOUNT)) {
9231                 r = -ENOMEM;
9232                 goto fail_free_mce_banks;
9233         }
9234
9235         fx_init(vcpu);
9236
9237         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9238
9239         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9240
9241         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9242
9243         kvm_async_pf_hash_reset(vcpu);
9244         kvm_pmu_init(vcpu);
9245
9246         vcpu->arch.pending_external_vector = -1;
9247         vcpu->arch.preempted_in_kernel = false;
9248
9249         kvm_hv_vcpu_init(vcpu);
9250
9251         return 0;
9252
9253 fail_free_mce_banks:
9254         kfree(vcpu->arch.mce_banks);
9255 fail_free_lapic:
9256         kvm_free_lapic(vcpu);
9257 fail_mmu_destroy:
9258         kvm_mmu_destroy(vcpu);
9259 fail_free_pio_data:
9260         free_page((unsigned long)vcpu->arch.pio_data);
9261 fail:
9262         return r;
9263 }
9264
9265 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9266 {
9267         int idx;
9268
9269         kvm_hv_vcpu_uninit(vcpu);
9270         kvm_pmu_destroy(vcpu);
9271         kfree(vcpu->arch.mce_banks);
9272         kvm_free_lapic(vcpu);
9273         idx = srcu_read_lock(&vcpu->kvm->srcu);
9274         kvm_mmu_destroy(vcpu);
9275         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9276         free_page((unsigned long)vcpu->arch.pio_data);
9277         if (!lapic_in_kernel(vcpu))
9278                 static_key_slow_dec(&kvm_no_apic_vcpu);
9279 }
9280
9281 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9282 {
9283         vcpu->arch.l1tf_flush_l1d = true;
9284         kvm_x86_ops->sched_in(vcpu, cpu);
9285 }
9286
9287 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9288 {
9289         if (type)
9290                 return -EINVAL;
9291
9292         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9293         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9294         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9295         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9296
9297         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9298         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9299         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9300         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9301                 &kvm->arch.irq_sources_bitmap);
9302
9303         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9304         mutex_init(&kvm->arch.apic_map_lock);
9305         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9306
9307         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9308         pvclock_update_vm_gtod_copy(kvm);
9309
9310         kvm->arch.guest_can_read_msr_platform_info = true;
9311
9312         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9313         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9314
9315         kvm_hv_init_vm(kvm);
9316         kvm_page_track_init(kvm);
9317         kvm_mmu_init_vm(kvm);
9318
9319         if (kvm_x86_ops->vm_init)
9320                 return kvm_x86_ops->vm_init(kvm);
9321
9322         return 0;
9323 }
9324
9325 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9326 {
9327         vcpu_load(vcpu);
9328         kvm_mmu_unload(vcpu);
9329         vcpu_put(vcpu);
9330 }
9331
9332 static void kvm_free_vcpus(struct kvm *kvm)
9333 {
9334         unsigned int i;
9335         struct kvm_vcpu *vcpu;
9336
9337         /*
9338          * Unpin any mmu pages first.
9339          */
9340         kvm_for_each_vcpu(i, vcpu, kvm) {
9341                 kvm_clear_async_pf_completion_queue(vcpu);
9342                 kvm_unload_vcpu_mmu(vcpu);
9343         }
9344         kvm_for_each_vcpu(i, vcpu, kvm)
9345                 kvm_arch_vcpu_free(vcpu);
9346
9347         mutex_lock(&kvm->lock);
9348         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9349                 kvm->vcpus[i] = NULL;
9350
9351         atomic_set(&kvm->online_vcpus, 0);
9352         mutex_unlock(&kvm->lock);
9353 }
9354
9355 void kvm_arch_sync_events(struct kvm *kvm)
9356 {
9357         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9358         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9359         kvm_free_pit(kvm);
9360 }
9361
9362 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9363 {
9364         int i, r;
9365         unsigned long hva;
9366         struct kvm_memslots *slots = kvm_memslots(kvm);
9367         struct kvm_memory_slot *slot, old;
9368
9369         /* Called with kvm->slots_lock held.  */
9370         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9371                 return -EINVAL;
9372
9373         slot = id_to_memslot(slots, id);
9374         if (size) {
9375                 if (slot->npages)
9376                         return -EEXIST;
9377
9378                 /*
9379                  * MAP_SHARED to prevent internal slot pages from being moved
9380                  * by fork()/COW.
9381                  */
9382                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9383                               MAP_SHARED | MAP_ANONYMOUS, 0);
9384                 if (IS_ERR((void *)hva))
9385                         return PTR_ERR((void *)hva);
9386         } else {
9387                 if (!slot->npages)
9388                         return 0;
9389
9390                 hva = 0;
9391         }
9392
9393         old = *slot;
9394         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9395                 struct kvm_userspace_memory_region m;
9396
9397                 m.slot = id | (i << 16);
9398                 m.flags = 0;
9399                 m.guest_phys_addr = gpa;
9400                 m.userspace_addr = hva;
9401                 m.memory_size = size;
9402                 r = __kvm_set_memory_region(kvm, &m);
9403                 if (r < 0)
9404                         return r;
9405         }
9406
9407         if (!size)
9408                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9409
9410         return 0;
9411 }
9412 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9413
9414 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9415 {
9416         int r;
9417
9418         mutex_lock(&kvm->slots_lock);
9419         r = __x86_set_memory_region(kvm, id, gpa, size);
9420         mutex_unlock(&kvm->slots_lock);
9421
9422         return r;
9423 }
9424 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9425
9426 void kvm_arch_destroy_vm(struct kvm *kvm)
9427 {
9428         if (current->mm == kvm->mm) {
9429                 /*
9430                  * Free memory regions allocated on behalf of userspace,
9431                  * unless the the memory map has changed due to process exit
9432                  * or fd copying.
9433                  */
9434                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9435                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9436                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9437         }
9438         if (kvm_x86_ops->vm_destroy)
9439                 kvm_x86_ops->vm_destroy(kvm);
9440         kvm_pic_destroy(kvm);
9441         kvm_ioapic_destroy(kvm);
9442         kvm_free_vcpus(kvm);
9443         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9444         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9445         kvm_mmu_uninit_vm(kvm);
9446         kvm_page_track_cleanup(kvm);
9447         kvm_hv_destroy_vm(kvm);
9448 }
9449
9450 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9451                            struct kvm_memory_slot *dont)
9452 {
9453         int i;
9454
9455         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9456                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9457                         kvfree(free->arch.rmap[i]);
9458                         free->arch.rmap[i] = NULL;
9459                 }
9460                 if (i == 0)
9461                         continue;
9462
9463                 if (!dont || free->arch.lpage_info[i - 1] !=
9464                              dont->arch.lpage_info[i - 1]) {
9465                         kvfree(free->arch.lpage_info[i - 1]);
9466                         free->arch.lpage_info[i - 1] = NULL;
9467                 }
9468         }
9469
9470         kvm_page_track_free_memslot(free, dont);
9471 }
9472
9473 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9474                             unsigned long npages)
9475 {
9476         int i;
9477
9478         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9479                 struct kvm_lpage_info *linfo;
9480                 unsigned long ugfn;
9481                 int lpages;
9482                 int level = i + 1;
9483
9484                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9485                                       slot->base_gfn, level) + 1;
9486
9487                 slot->arch.rmap[i] =
9488                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9489                                  GFP_KERNEL_ACCOUNT);
9490                 if (!slot->arch.rmap[i])
9491                         goto out_free;
9492                 if (i == 0)
9493                         continue;
9494
9495                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9496                 if (!linfo)
9497                         goto out_free;
9498
9499                 slot->arch.lpage_info[i - 1] = linfo;
9500
9501                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9502                         linfo[0].disallow_lpage = 1;
9503                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9504                         linfo[lpages - 1].disallow_lpage = 1;
9505                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9506                 /*
9507                  * If the gfn and userspace address are not aligned wrt each
9508                  * other, or if explicitly asked to, disable large page
9509                  * support for this slot
9510                  */
9511                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9512                     !kvm_largepages_enabled()) {
9513                         unsigned long j;
9514
9515                         for (j = 0; j < lpages; ++j)
9516                                 linfo[j].disallow_lpage = 1;
9517                 }
9518         }
9519
9520         if (kvm_page_track_create_memslot(slot, npages))
9521                 goto out_free;
9522
9523         return 0;
9524
9525 out_free:
9526         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9527                 kvfree(slot->arch.rmap[i]);
9528                 slot->arch.rmap[i] = NULL;
9529                 if (i == 0)
9530                         continue;
9531
9532                 kvfree(slot->arch.lpage_info[i - 1]);
9533                 slot->arch.lpage_info[i - 1] = NULL;
9534         }
9535         return -ENOMEM;
9536 }
9537
9538 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9539 {
9540         /*
9541          * memslots->generation has been incremented.
9542          * mmio generation may have reached its maximum value.
9543          */
9544         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9545 }
9546
9547 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9548                                 struct kvm_memory_slot *memslot,
9549                                 const struct kvm_userspace_memory_region *mem,
9550                                 enum kvm_mr_change change)
9551 {
9552         return 0;
9553 }
9554
9555 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9556                                      struct kvm_memory_slot *new)
9557 {
9558         /* Still write protect RO slot */
9559         if (new->flags & KVM_MEM_READONLY) {
9560                 kvm_mmu_slot_remove_write_access(kvm, new);
9561                 return;
9562         }
9563
9564         /*
9565          * Call kvm_x86_ops dirty logging hooks when they are valid.
9566          *
9567          * kvm_x86_ops->slot_disable_log_dirty is called when:
9568          *
9569          *  - KVM_MR_CREATE with dirty logging is disabled
9570          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9571          *
9572          * The reason is, in case of PML, we need to set D-bit for any slots
9573          * with dirty logging disabled in order to eliminate unnecessary GPA
9574          * logging in PML buffer (and potential PML buffer full VMEXT). This
9575          * guarantees leaving PML enabled during guest's lifetime won't have
9576          * any additional overhead from PML when guest is running with dirty
9577          * logging disabled for memory slots.
9578          *
9579          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9580          * to dirty logging mode.
9581          *
9582          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9583          *
9584          * In case of write protect:
9585          *
9586          * Write protect all pages for dirty logging.
9587          *
9588          * All the sptes including the large sptes which point to this
9589          * slot are set to readonly. We can not create any new large
9590          * spte on this slot until the end of the logging.
9591          *
9592          * See the comments in fast_page_fault().
9593          */
9594         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9595                 if (kvm_x86_ops->slot_enable_log_dirty)
9596                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9597                 else
9598                         kvm_mmu_slot_remove_write_access(kvm, new);
9599         } else {
9600                 if (kvm_x86_ops->slot_disable_log_dirty)
9601                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9602         }
9603 }
9604
9605 void kvm_arch_commit_memory_region(struct kvm *kvm,
9606                                 const struct kvm_userspace_memory_region *mem,
9607                                 const struct kvm_memory_slot *old,
9608                                 const struct kvm_memory_slot *new,
9609                                 enum kvm_mr_change change)
9610 {
9611         if (!kvm->arch.n_requested_mmu_pages)
9612                 kvm_mmu_change_mmu_pages(kvm,
9613                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9614
9615         /*
9616          * Dirty logging tracks sptes in 4k granularity, meaning that large
9617          * sptes have to be split.  If live migration is successful, the guest
9618          * in the source machine will be destroyed and large sptes will be
9619          * created in the destination. However, if the guest continues to run
9620          * in the source machine (for example if live migration fails), small
9621          * sptes will remain around and cause bad performance.
9622          *
9623          * Scan sptes if dirty logging has been stopped, dropping those
9624          * which can be collapsed into a single large-page spte.  Later
9625          * page faults will create the large-page sptes.
9626          */
9627         if ((change != KVM_MR_DELETE) &&
9628                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9629                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9630                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9631
9632         /*
9633          * Set up write protection and/or dirty logging for the new slot.
9634          *
9635          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9636          * been zapped so no dirty logging staff is needed for old slot. For
9637          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9638          * new and it's also covered when dealing with the new slot.
9639          *
9640          * FIXME: const-ify all uses of struct kvm_memory_slot.
9641          */
9642         if (change != KVM_MR_DELETE)
9643                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9644 }
9645
9646 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9647 {
9648         kvm_mmu_zap_all(kvm);
9649 }
9650
9651 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9652                                    struct kvm_memory_slot *slot)
9653 {
9654         kvm_page_track_flush_slot(kvm, slot);
9655 }
9656
9657 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9658 {
9659         return (is_guest_mode(vcpu) &&
9660                         kvm_x86_ops->guest_apic_has_interrupt &&
9661                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9662 }
9663
9664 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9665 {
9666         if (!list_empty_careful(&vcpu->async_pf.done))
9667                 return true;
9668
9669         if (kvm_apic_has_events(vcpu))
9670                 return true;
9671
9672         if (vcpu->arch.pv.pv_unhalted)
9673                 return true;
9674
9675         if (vcpu->arch.exception.pending)
9676                 return true;
9677
9678         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9679             (vcpu->arch.nmi_pending &&
9680              kvm_x86_ops->nmi_allowed(vcpu)))
9681                 return true;
9682
9683         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9684             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9685                 return true;
9686
9687         if (kvm_arch_interrupt_allowed(vcpu) &&
9688             (kvm_cpu_has_interrupt(vcpu) ||
9689             kvm_guest_apic_has_interrupt(vcpu)))
9690                 return true;
9691
9692         if (kvm_hv_has_stimer_pending(vcpu))
9693                 return true;
9694
9695         return false;
9696 }
9697
9698 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9699 {
9700         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9701 }
9702
9703 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9704 {
9705         return vcpu->arch.preempted_in_kernel;
9706 }
9707
9708 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9709 {
9710         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9711 }
9712
9713 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9714 {
9715         return kvm_x86_ops->interrupt_allowed(vcpu);
9716 }
9717
9718 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9719 {
9720         if (is_64_bit_mode(vcpu))
9721                 return kvm_rip_read(vcpu);
9722         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9723                      kvm_rip_read(vcpu));
9724 }
9725 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9726
9727 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9728 {
9729         return kvm_get_linear_rip(vcpu) == linear_rip;
9730 }
9731 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9732
9733 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9734 {
9735         unsigned long rflags;
9736
9737         rflags = kvm_x86_ops->get_rflags(vcpu);
9738         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9739                 rflags &= ~X86_EFLAGS_TF;
9740         return rflags;
9741 }
9742 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9743
9744 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9745 {
9746         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9747             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9748                 rflags |= X86_EFLAGS_TF;
9749         kvm_x86_ops->set_rflags(vcpu, rflags);
9750 }
9751
9752 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9753 {
9754         __kvm_set_rflags(vcpu, rflags);
9755         kvm_make_request(KVM_REQ_EVENT, vcpu);
9756 }
9757 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9758
9759 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9760 {
9761         int r;
9762
9763         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9764               work->wakeup_all)
9765                 return;
9766
9767         r = kvm_mmu_reload(vcpu);
9768         if (unlikely(r))
9769                 return;
9770
9771         if (!vcpu->arch.mmu->direct_map &&
9772               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9773                 return;
9774
9775         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9776 }
9777
9778 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9779 {
9780         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9781 }
9782
9783 static inline u32 kvm_async_pf_next_probe(u32 key)
9784 {
9785         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9786 }
9787
9788 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9789 {
9790         u32 key = kvm_async_pf_hash_fn(gfn);
9791
9792         while (vcpu->arch.apf.gfns[key] != ~0)
9793                 key = kvm_async_pf_next_probe(key);
9794
9795         vcpu->arch.apf.gfns[key] = gfn;
9796 }
9797
9798 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9799 {
9800         int i;
9801         u32 key = kvm_async_pf_hash_fn(gfn);
9802
9803         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9804                      (vcpu->arch.apf.gfns[key] != gfn &&
9805                       vcpu->arch.apf.gfns[key] != ~0); i++)
9806                 key = kvm_async_pf_next_probe(key);
9807
9808         return key;
9809 }
9810
9811 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9812 {
9813         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9814 }
9815
9816 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9817 {
9818         u32 i, j, k;
9819
9820         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9821         while (true) {
9822                 vcpu->arch.apf.gfns[i] = ~0;
9823                 do {
9824                         j = kvm_async_pf_next_probe(j);
9825                         if (vcpu->arch.apf.gfns[j] == ~0)
9826                                 return;
9827                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9828                         /*
9829                          * k lies cyclically in ]i,j]
9830                          * |    i.k.j |
9831                          * |....j i.k.| or  |.k..j i...|
9832                          */
9833                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9834                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9835                 i = j;
9836         }
9837 }
9838
9839 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9840 {
9841
9842         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9843                                       sizeof(val));
9844 }
9845
9846 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9847 {
9848
9849         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9850                                       sizeof(u32));
9851 }
9852
9853 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
9854 {
9855         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
9856                 return false;
9857
9858         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9859             (vcpu->arch.apf.send_user_only &&
9860              kvm_x86_ops->get_cpl(vcpu) == 0))
9861                 return false;
9862
9863         return true;
9864 }
9865
9866 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
9867 {
9868         if (unlikely(!lapic_in_kernel(vcpu) ||
9869                      kvm_event_needs_reinjection(vcpu) ||
9870                      vcpu->arch.exception.pending))
9871                 return false;
9872
9873         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
9874                 return false;
9875
9876         /*
9877          * If interrupts are off we cannot even use an artificial
9878          * halt state.
9879          */
9880         return kvm_x86_ops->interrupt_allowed(vcpu);
9881 }
9882
9883 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9884                                      struct kvm_async_pf *work)
9885 {
9886         struct x86_exception fault;
9887
9888         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9889         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9890
9891         if (kvm_can_deliver_async_pf(vcpu) &&
9892             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9893                 fault.vector = PF_VECTOR;
9894                 fault.error_code_valid = true;
9895                 fault.error_code = 0;
9896                 fault.nested_page_fault = false;
9897                 fault.address = work->arch.token;
9898                 fault.async_page_fault = true;
9899                 kvm_inject_page_fault(vcpu, &fault);
9900         } else {
9901                 /*
9902                  * It is not possible to deliver a paravirtualized asynchronous
9903                  * page fault, but putting the guest in an artificial halt state
9904                  * can be beneficial nevertheless: if an interrupt arrives, we
9905                  * can deliver it timely and perhaps the guest will schedule
9906                  * another process.  When the instruction that triggered a page
9907                  * fault is retried, hopefully the page will be ready in the host.
9908                  */
9909                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9910         }
9911 }
9912
9913 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9914                                  struct kvm_async_pf *work)
9915 {
9916         struct x86_exception fault;
9917         u32 val;
9918
9919         if (work->wakeup_all)
9920                 work->arch.token = ~0; /* broadcast wakeup */
9921         else
9922                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9923         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9924
9925         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9926             !apf_get_user(vcpu, &val)) {
9927                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9928                     vcpu->arch.exception.pending &&
9929                     vcpu->arch.exception.nr == PF_VECTOR &&
9930                     !apf_put_user(vcpu, 0)) {
9931                         vcpu->arch.exception.injected = false;
9932                         vcpu->arch.exception.pending = false;
9933                         vcpu->arch.exception.nr = 0;
9934                         vcpu->arch.exception.has_error_code = false;
9935                         vcpu->arch.exception.error_code = 0;
9936                         vcpu->arch.exception.has_payload = false;
9937                         vcpu->arch.exception.payload = 0;
9938                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9939                         fault.vector = PF_VECTOR;
9940                         fault.error_code_valid = true;
9941                         fault.error_code = 0;
9942                         fault.nested_page_fault = false;
9943                         fault.address = work->arch.token;
9944                         fault.async_page_fault = true;
9945                         kvm_inject_page_fault(vcpu, &fault);
9946                 }
9947         }
9948         vcpu->arch.apf.halted = false;
9949         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9950 }
9951
9952 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9953 {
9954         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9955                 return true;
9956         else
9957                 return kvm_can_do_async_pf(vcpu);
9958 }
9959
9960 void kvm_arch_start_assignment(struct kvm *kvm)
9961 {
9962         atomic_inc(&kvm->arch.assigned_device_count);
9963 }
9964 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9965
9966 void kvm_arch_end_assignment(struct kvm *kvm)
9967 {
9968         atomic_dec(&kvm->arch.assigned_device_count);
9969 }
9970 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9971
9972 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9973 {
9974         return atomic_read(&kvm->arch.assigned_device_count);
9975 }
9976 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9977
9978 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9979 {
9980         atomic_inc(&kvm->arch.noncoherent_dma_count);
9981 }
9982 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9983
9984 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9985 {
9986         atomic_dec(&kvm->arch.noncoherent_dma_count);
9987 }
9988 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9989
9990 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9991 {
9992         return atomic_read(&kvm->arch.noncoherent_dma_count);
9993 }
9994 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9995
9996 bool kvm_arch_has_irq_bypass(void)
9997 {
9998         return kvm_x86_ops->update_pi_irte != NULL;
9999 }
10000
10001 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10002                                       struct irq_bypass_producer *prod)
10003 {
10004         struct kvm_kernel_irqfd *irqfd =
10005                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10006
10007         irqfd->producer = prod;
10008
10009         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10010                                            prod->irq, irqfd->gsi, 1);
10011 }
10012
10013 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10014                                       struct irq_bypass_producer *prod)
10015 {
10016         int ret;
10017         struct kvm_kernel_irqfd *irqfd =
10018                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10019
10020         WARN_ON(irqfd->producer != prod);
10021         irqfd->producer = NULL;
10022
10023         /*
10024          * When producer of consumer is unregistered, we change back to
10025          * remapped mode, so we can re-use the current implementation
10026          * when the irq is masked/disabled or the consumer side (KVM
10027          * int this case doesn't want to receive the interrupts.
10028         */
10029         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10030         if (ret)
10031                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10032                        " fails: %d\n", irqfd->consumer.token, ret);
10033 }
10034
10035 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10036                                    uint32_t guest_irq, bool set)
10037 {
10038         if (!kvm_x86_ops->update_pi_irte)
10039                 return -EINVAL;
10040
10041         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10042 }
10043
10044 bool kvm_vector_hashing_enabled(void)
10045 {
10046         return vector_hashing;
10047 }
10048 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10049
10050 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10051 {
10052         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10053 }
10054 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10055
10056
10057 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10058 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10059 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10060 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10061 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10062 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10063 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10064 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10065 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10066 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10067 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10068 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10069 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10070 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10071 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
10072 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10073 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10074 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10075 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);