2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
70 #include <asm/mshyperv.h>
71 #include <asm/hypervisor.h>
73 #define CREATE_TRACE_POINTS
76 #define MAX_IO_MSRS 256
77 #define KVM_MAX_MCE_BANKS 32
78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
81 #define emul_to_vcpu(ctxt) \
82 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
85 * - enable syscall per default because its emulated by KVM
86 * - enable LME and LMA per default on 64 bit KVM
90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
99 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
102 static void process_nmi(struct kvm_vcpu *vcpu);
103 static void enter_smm(struct kvm_vcpu *vcpu);
104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
105 static void store_regs(struct kvm_vcpu *vcpu);
106 static int sync_regs(struct kvm_vcpu *vcpu);
108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
111 static bool __read_mostly ignore_msrs = 0;
112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
114 static bool __read_mostly report_ignored_msrs = true;
115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
117 unsigned int min_timer_period_us = 500;
118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
120 static bool __read_mostly kvmclock_periodic_sync = true;
121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
123 bool __read_mostly kvm_has_tsc_control;
124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
125 u32 __read_mostly kvm_max_guest_tsc_khz;
126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
127 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
129 u64 __read_mostly kvm_max_tsc_scaling_ratio;
130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
135 static u32 __read_mostly tsc_tolerance_ppm = 250;
136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
139 unsigned int __read_mostly lapic_timer_advance_ns = 0;
140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
142 static bool __read_mostly vector_hashing = true;
143 module_param(vector_hashing, bool, S_IRUGO);
145 #define KVM_NR_SHARED_MSRS 16
147 struct kvm_shared_msrs_global {
149 u32 msrs[KVM_NR_SHARED_MSRS];
152 struct kvm_shared_msrs {
153 struct user_return_notifier urn;
155 struct kvm_shared_msr_values {
158 } values[KVM_NR_SHARED_MSRS];
161 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
162 static struct kvm_shared_msrs __percpu *shared_msrs;
164 struct kvm_stats_debugfs_item debugfs_entries[] = {
165 { "pf_fixed", VCPU_STAT(pf_fixed) },
166 { "pf_guest", VCPU_STAT(pf_guest) },
167 { "tlb_flush", VCPU_STAT(tlb_flush) },
168 { "invlpg", VCPU_STAT(invlpg) },
169 { "exits", VCPU_STAT(exits) },
170 { "io_exits", VCPU_STAT(io_exits) },
171 { "mmio_exits", VCPU_STAT(mmio_exits) },
172 { "signal_exits", VCPU_STAT(signal_exits) },
173 { "irq_window", VCPU_STAT(irq_window_exits) },
174 { "nmi_window", VCPU_STAT(nmi_window_exits) },
175 { "halt_exits", VCPU_STAT(halt_exits) },
176 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
177 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
178 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
179 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
180 { "hypercalls", VCPU_STAT(hypercalls) },
181 { "request_irq", VCPU_STAT(request_irq_exits) },
182 { "irq_exits", VCPU_STAT(irq_exits) },
183 { "host_state_reload", VCPU_STAT(host_state_reload) },
184 { "fpu_reload", VCPU_STAT(fpu_reload) },
185 { "insn_emulation", VCPU_STAT(insn_emulation) },
186 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
187 { "irq_injections", VCPU_STAT(irq_injections) },
188 { "nmi_injections", VCPU_STAT(nmi_injections) },
189 { "req_event", VCPU_STAT(req_event) },
190 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
191 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
192 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
193 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
194 { "mmu_flooded", VM_STAT(mmu_flooded) },
195 { "mmu_recycled", VM_STAT(mmu_recycled) },
196 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
197 { "mmu_unsync", VM_STAT(mmu_unsync) },
198 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
199 { "largepages", VM_STAT(lpages) },
200 { "max_mmu_page_hash_collisions",
201 VM_STAT(max_mmu_page_hash_collisions) },
205 u64 __read_mostly host_xcr0;
207 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
209 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
212 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
213 vcpu->arch.apf.gfns[i] = ~0;
216 static void kvm_on_user_return(struct user_return_notifier *urn)
219 struct kvm_shared_msrs *locals
220 = container_of(urn, struct kvm_shared_msrs, urn);
221 struct kvm_shared_msr_values *values;
225 * Disabling irqs at this point since the following code could be
226 * interrupted and executed through kvm_arch_hardware_disable()
228 local_irq_save(flags);
229 if (locals->registered) {
230 locals->registered = false;
231 user_return_notifier_unregister(urn);
233 local_irq_restore(flags);
234 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
235 values = &locals->values[slot];
236 if (values->host != values->curr) {
237 wrmsrl(shared_msrs_global.msrs[slot], values->host);
238 values->curr = values->host;
243 static void shared_msr_update(unsigned slot, u32 msr)
246 unsigned int cpu = smp_processor_id();
247 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
249 /* only read, and nobody should modify it at this time,
250 * so don't need lock */
251 if (slot >= shared_msrs_global.nr) {
252 printk(KERN_ERR "kvm: invalid MSR slot!");
255 rdmsrl_safe(msr, &value);
256 smsr->values[slot].host = value;
257 smsr->values[slot].curr = value;
260 void kvm_define_shared_msr(unsigned slot, u32 msr)
262 BUG_ON(slot >= KVM_NR_SHARED_MSRS);
263 shared_msrs_global.msrs[slot] = msr;
264 if (slot >= shared_msrs_global.nr)
265 shared_msrs_global.nr = slot + 1;
267 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
269 static void kvm_shared_msr_cpu_online(void)
273 for (i = 0; i < shared_msrs_global.nr; ++i)
274 shared_msr_update(i, shared_msrs_global.msrs[i]);
277 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
279 unsigned int cpu = smp_processor_id();
280 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
283 if (((value ^ smsr->values[slot].curr) & mask) == 0)
285 smsr->values[slot].curr = value;
286 err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
290 if (!smsr->registered) {
291 smsr->urn.on_user_return = kvm_on_user_return;
292 user_return_notifier_register(&smsr->urn);
293 smsr->registered = true;
297 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
299 static void drop_user_return_notifiers(void)
301 unsigned int cpu = smp_processor_id();
302 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
304 if (smsr->registered)
305 kvm_on_user_return(&smsr->urn);
308 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
310 return vcpu->arch.apic_base;
312 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
314 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
316 u64 old_state = vcpu->arch.apic_base &
317 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
318 u64 new_state = msr_info->data &
319 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
320 u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
321 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
323 if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
325 if (!msr_info->host_initiated &&
326 ((new_state == MSR_IA32_APICBASE_ENABLE &&
327 old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
328 (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
332 kvm_lapic_set_base(vcpu, msr_info->data);
335 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
337 asmlinkage __visible void kvm_spurious_fault(void)
339 /* Fault while not rebooting. We want the trace. */
342 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
344 #define EXCPT_BENIGN 0
345 #define EXCPT_CONTRIBUTORY 1
348 static int exception_class(int vector)
358 return EXCPT_CONTRIBUTORY;
365 #define EXCPT_FAULT 0
367 #define EXCPT_ABORT 2
368 #define EXCPT_INTERRUPT 3
370 static int exception_type(int vector)
374 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
375 return EXCPT_INTERRUPT;
379 /* #DB is trap, as instruction watchpoints are handled elsewhere */
380 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
383 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
386 /* Reserved exceptions will result in fault */
390 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
391 unsigned nr, bool has_error, u32 error_code,
397 kvm_make_request(KVM_REQ_EVENT, vcpu);
399 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
401 if (has_error && !is_protmode(vcpu))
405 * On vmentry, vcpu->arch.exception.pending is only
406 * true if an event injection was blocked by
407 * nested_run_pending. In that case, however,
408 * vcpu_enter_guest requests an immediate exit,
409 * and the guest shouldn't proceed far enough to
412 WARN_ON_ONCE(vcpu->arch.exception.pending);
413 vcpu->arch.exception.injected = true;
415 vcpu->arch.exception.pending = true;
416 vcpu->arch.exception.injected = false;
418 vcpu->arch.exception.has_error_code = has_error;
419 vcpu->arch.exception.nr = nr;
420 vcpu->arch.exception.error_code = error_code;
424 /* to check exception */
425 prev_nr = vcpu->arch.exception.nr;
426 if (prev_nr == DF_VECTOR) {
427 /* triple fault -> shutdown */
428 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
431 class1 = exception_class(prev_nr);
432 class2 = exception_class(nr);
433 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
434 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
436 * Generate double fault per SDM Table 5-5. Set
437 * exception.pending = true so that the double fault
438 * can trigger a nested vmexit.
440 vcpu->arch.exception.pending = true;
441 vcpu->arch.exception.injected = false;
442 vcpu->arch.exception.has_error_code = true;
443 vcpu->arch.exception.nr = DF_VECTOR;
444 vcpu->arch.exception.error_code = 0;
446 /* replace previous exception with a new one in a hope
447 that instruction re-execution will regenerate lost
452 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
454 kvm_multiple_exception(vcpu, nr, false, 0, false);
456 EXPORT_SYMBOL_GPL(kvm_queue_exception);
458 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
460 kvm_multiple_exception(vcpu, nr, false, 0, true);
462 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
464 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
467 kvm_inject_gp(vcpu, 0);
469 return kvm_skip_emulated_instruction(vcpu);
473 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
475 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
477 ++vcpu->stat.pf_guest;
478 vcpu->arch.exception.nested_apf =
479 is_guest_mode(vcpu) && fault->async_page_fault;
480 if (vcpu->arch.exception.nested_apf)
481 vcpu->arch.apf.nested_apf_token = fault->address;
483 vcpu->arch.cr2 = fault->address;
484 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
486 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
488 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
490 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
491 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
493 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
495 return fault->nested_page_fault;
498 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
500 atomic_inc(&vcpu->arch.nmi_queued);
501 kvm_make_request(KVM_REQ_NMI, vcpu);
503 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
505 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
507 kvm_multiple_exception(vcpu, nr, true, error_code, false);
509 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
511 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
513 kvm_multiple_exception(vcpu, nr, true, error_code, true);
515 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
518 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
519 * a #GP and return false.
521 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
523 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
525 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
528 EXPORT_SYMBOL_GPL(kvm_require_cpl);
530 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
532 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
535 kvm_queue_exception(vcpu, UD_VECTOR);
538 EXPORT_SYMBOL_GPL(kvm_require_dr);
541 * This function will be used to read from the physical memory of the currently
542 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
543 * can read from guest physical or from the guest's guest physical memory.
545 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
546 gfn_t ngfn, void *data, int offset, int len,
549 struct x86_exception exception;
553 ngpa = gfn_to_gpa(ngfn);
554 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
555 if (real_gfn == UNMAPPED_GVA)
558 real_gfn = gpa_to_gfn(real_gfn);
560 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
562 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
564 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
565 void *data, int offset, int len, u32 access)
567 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
568 data, offset, len, access);
572 * Load the pae pdptrs. Return true is they are all valid.
574 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
576 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
577 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
580 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
582 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
583 offset * sizeof(u64), sizeof(pdpte),
584 PFERR_USER_MASK|PFERR_WRITE_MASK);
589 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
590 if ((pdpte[i] & PT_PRESENT_MASK) &&
592 vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
599 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
600 __set_bit(VCPU_EXREG_PDPTR,
601 (unsigned long *)&vcpu->arch.regs_avail);
602 __set_bit(VCPU_EXREG_PDPTR,
603 (unsigned long *)&vcpu->arch.regs_dirty);
608 EXPORT_SYMBOL_GPL(load_pdptrs);
610 bool pdptrs_changed(struct kvm_vcpu *vcpu)
612 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
618 if (is_long_mode(vcpu) || !is_pae(vcpu))
621 if (!test_bit(VCPU_EXREG_PDPTR,
622 (unsigned long *)&vcpu->arch.regs_avail))
625 gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
626 offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
627 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
628 PFERR_USER_MASK | PFERR_WRITE_MASK);
631 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
636 EXPORT_SYMBOL_GPL(pdptrs_changed);
638 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
640 unsigned long old_cr0 = kvm_read_cr0(vcpu);
641 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
646 if (cr0 & 0xffffffff00000000UL)
650 cr0 &= ~CR0_RESERVED_BITS;
652 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
655 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
658 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
660 if ((vcpu->arch.efer & EFER_LME)) {
665 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
670 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
675 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
678 kvm_x86_ops->set_cr0(vcpu, cr0);
680 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
681 kvm_clear_async_pf_completion_queue(vcpu);
682 kvm_async_pf_hash_reset(vcpu);
685 if ((cr0 ^ old_cr0) & update_bits)
686 kvm_mmu_reset_context(vcpu);
688 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
689 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
690 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
691 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
695 EXPORT_SYMBOL_GPL(kvm_set_cr0);
697 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
699 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
701 EXPORT_SYMBOL_GPL(kvm_lmsw);
703 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
705 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
706 !vcpu->guest_xcr0_loaded) {
707 /* kvm_set_xcr() also depends on this */
708 if (vcpu->arch.xcr0 != host_xcr0)
709 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
710 vcpu->guest_xcr0_loaded = 1;
714 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
716 if (vcpu->guest_xcr0_loaded) {
717 if (vcpu->arch.xcr0 != host_xcr0)
718 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
719 vcpu->guest_xcr0_loaded = 0;
723 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
726 u64 old_xcr0 = vcpu->arch.xcr0;
729 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
730 if (index != XCR_XFEATURE_ENABLED_MASK)
732 if (!(xcr0 & XFEATURE_MASK_FP))
734 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
738 * Do not allow the guest to set bits that we do not support
739 * saving. However, xcr0 bit 0 is always set, even if the
740 * emulated CPU does not support XSAVE (see fx_init).
742 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
743 if (xcr0 & ~valid_bits)
746 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
747 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
750 if (xcr0 & XFEATURE_MASK_AVX512) {
751 if (!(xcr0 & XFEATURE_MASK_YMM))
753 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
756 vcpu->arch.xcr0 = xcr0;
758 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
759 kvm_update_cpuid(vcpu);
763 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
765 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
766 __kvm_set_xcr(vcpu, index, xcr)) {
767 kvm_inject_gp(vcpu, 0);
772 EXPORT_SYMBOL_GPL(kvm_set_xcr);
774 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
776 unsigned long old_cr4 = kvm_read_cr4(vcpu);
777 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
778 X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
780 if (cr4 & CR4_RESERVED_BITS)
783 if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
786 if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
789 if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
792 if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
795 if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
798 if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
801 if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
804 if (is_long_mode(vcpu)) {
805 if (!(cr4 & X86_CR4_PAE))
807 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
808 && ((cr4 ^ old_cr4) & pdptr_bits)
809 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
813 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
814 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
817 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
818 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
822 if (kvm_x86_ops->set_cr4(vcpu, cr4))
825 if (((cr4 ^ old_cr4) & pdptr_bits) ||
826 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
827 kvm_mmu_reset_context(vcpu);
829 if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
830 kvm_update_cpuid(vcpu);
834 EXPORT_SYMBOL_GPL(kvm_set_cr4);
836 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
839 cr3 &= ~CR3_PCID_INVD;
842 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
843 kvm_mmu_sync_roots(vcpu);
844 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
848 if (is_long_mode(vcpu) &&
849 (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 62)))
851 else if (is_pae(vcpu) && is_paging(vcpu) &&
852 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
855 vcpu->arch.cr3 = cr3;
856 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
857 kvm_mmu_new_cr3(vcpu);
860 EXPORT_SYMBOL_GPL(kvm_set_cr3);
862 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
864 if (cr8 & CR8_RESERVED_BITS)
866 if (lapic_in_kernel(vcpu))
867 kvm_lapic_set_tpr(vcpu, cr8);
869 vcpu->arch.cr8 = cr8;
872 EXPORT_SYMBOL_GPL(kvm_set_cr8);
874 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
876 if (lapic_in_kernel(vcpu))
877 return kvm_lapic_get_cr8(vcpu);
879 return vcpu->arch.cr8;
881 EXPORT_SYMBOL_GPL(kvm_get_cr8);
883 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
887 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
888 for (i = 0; i < KVM_NR_DB_REGS; i++)
889 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
890 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
894 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
896 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
897 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
900 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
904 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
905 dr7 = vcpu->arch.guest_debug_dr7;
907 dr7 = vcpu->arch.dr7;
908 kvm_x86_ops->set_dr7(vcpu, dr7);
909 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
910 if (dr7 & DR7_BP_EN_MASK)
911 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
914 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
916 u64 fixed = DR6_FIXED_1;
918 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
923 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
927 vcpu->arch.db[dr] = val;
928 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
929 vcpu->arch.eff_db[dr] = val;
934 if (val & 0xffffffff00000000ULL)
936 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
937 kvm_update_dr6(vcpu);
942 if (val & 0xffffffff00000000ULL)
944 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
945 kvm_update_dr7(vcpu);
952 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
954 if (__kvm_set_dr(vcpu, dr, val)) {
955 kvm_inject_gp(vcpu, 0);
960 EXPORT_SYMBOL_GPL(kvm_set_dr);
962 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
966 *val = vcpu->arch.db[dr];
971 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
972 *val = vcpu->arch.dr6;
974 *val = kvm_x86_ops->get_dr6(vcpu);
979 *val = vcpu->arch.dr7;
984 EXPORT_SYMBOL_GPL(kvm_get_dr);
986 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
988 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
992 err = kvm_pmu_rdpmc(vcpu, ecx, &data);
995 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
996 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
999 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1002 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1003 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1005 * This list is modified at module load time to reflect the
1006 * capabilities of the host cpu. This capabilities test skips MSRs that are
1007 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1008 * may depend on host virtualization features rather than host cpu features.
1011 static u32 msrs_to_save[] = {
1012 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1014 #ifdef CONFIG_X86_64
1015 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1017 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1018 MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1019 MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1022 static unsigned num_msrs_to_save;
1024 static u32 emulated_msrs[] = {
1025 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1026 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1027 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1028 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1029 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1030 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1031 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1033 HV_X64_MSR_VP_INDEX,
1034 HV_X64_MSR_VP_RUNTIME,
1035 HV_X64_MSR_SCONTROL,
1036 HV_X64_MSR_STIMER0_CONFIG,
1037 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1040 MSR_IA32_TSC_ADJUST,
1041 MSR_IA32_TSCDEADLINE,
1042 MSR_IA32_MISC_ENABLE,
1043 MSR_IA32_MCG_STATUS,
1045 MSR_IA32_MCG_EXT_CTL,
1049 MSR_MISC_FEATURES_ENABLES,
1052 static unsigned num_emulated_msrs;
1055 * List of msr numbers which are used to expose MSR-based features that
1056 * can be used by a hypervisor to validate requested CPU features.
1058 static u32 msr_based_features[] = {
1060 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1061 MSR_IA32_VMX_PINBASED_CTLS,
1062 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1063 MSR_IA32_VMX_PROCBASED_CTLS,
1064 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1065 MSR_IA32_VMX_EXIT_CTLS,
1066 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1067 MSR_IA32_VMX_ENTRY_CTLS,
1069 MSR_IA32_VMX_CR0_FIXED0,
1070 MSR_IA32_VMX_CR0_FIXED1,
1071 MSR_IA32_VMX_CR4_FIXED0,
1072 MSR_IA32_VMX_CR4_FIXED1,
1073 MSR_IA32_VMX_VMCS_ENUM,
1074 MSR_IA32_VMX_PROCBASED_CTLS2,
1075 MSR_IA32_VMX_EPT_VPID_CAP,
1076 MSR_IA32_VMX_VMFUNC,
1082 static unsigned int num_msr_based_features;
1084 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1086 switch (msr->index) {
1087 case MSR_IA32_UCODE_REV:
1088 rdmsrl(msr->index, msr->data);
1091 if (kvm_x86_ops->get_msr_feature(msr))
1097 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1099 struct kvm_msr_entry msr;
1103 r = kvm_get_msr_feature(&msr);
1112 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1114 if (efer & efer_reserved_bits)
1117 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1120 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1125 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1127 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1129 u64 old_efer = vcpu->arch.efer;
1131 if (!kvm_valid_efer(vcpu, efer))
1135 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1139 efer |= vcpu->arch.efer & EFER_LMA;
1141 kvm_x86_ops->set_efer(vcpu, efer);
1143 /* Update reserved bits */
1144 if ((efer ^ old_efer) & EFER_NX)
1145 kvm_mmu_reset_context(vcpu);
1150 void kvm_enable_efer_bits(u64 mask)
1152 efer_reserved_bits &= ~mask;
1154 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1157 * Writes msr value into into the appropriate "register".
1158 * Returns 0 on success, non-0 otherwise.
1159 * Assumes vcpu_load() was already called.
1161 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1163 switch (msr->index) {
1166 case MSR_KERNEL_GS_BASE:
1169 if (is_noncanonical_address(msr->data, vcpu))
1172 case MSR_IA32_SYSENTER_EIP:
1173 case MSR_IA32_SYSENTER_ESP:
1175 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1176 * non-canonical address is written on Intel but not on
1177 * AMD (which ignores the top 32-bits, because it does
1178 * not implement 64-bit SYSENTER).
1180 * 64-bit code should hence be able to write a non-canonical
1181 * value on AMD. Making the address canonical ensures that
1182 * vmentry does not fail on Intel after writing a non-canonical
1183 * value, and that something deterministic happens if the guest
1184 * invokes 64-bit SYSENTER.
1186 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1188 return kvm_x86_ops->set_msr(vcpu, msr);
1190 EXPORT_SYMBOL_GPL(kvm_set_msr);
1193 * Adapt set_msr() to msr_io()'s calling convention
1195 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1197 struct msr_data msr;
1201 msr.host_initiated = true;
1202 r = kvm_get_msr(vcpu, &msr);
1210 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1212 struct msr_data msr;
1216 msr.host_initiated = true;
1217 return kvm_set_msr(vcpu, &msr);
1220 #ifdef CONFIG_X86_64
1221 struct pvclock_gtod_data {
1224 struct { /* extract of a clocksource struct */
1237 static struct pvclock_gtod_data pvclock_gtod_data;
1239 static void update_pvclock_gtod(struct timekeeper *tk)
1241 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1244 boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1246 write_seqcount_begin(&vdata->seq);
1248 /* copy pvclock gtod data */
1249 vdata->clock.vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;
1250 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
1251 vdata->clock.mask = tk->tkr_mono.mask;
1252 vdata->clock.mult = tk->tkr_mono.mult;
1253 vdata->clock.shift = tk->tkr_mono.shift;
1255 vdata->boot_ns = boot_ns;
1256 vdata->nsec_base = tk->tkr_mono.xtime_nsec;
1258 vdata->wall_time_sec = tk->xtime_sec;
1260 write_seqcount_end(&vdata->seq);
1264 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1267 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1268 * vcpu_enter_guest. This function is only called from
1269 * the physical CPU that is running vcpu.
1271 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1274 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1278 struct pvclock_wall_clock wc;
1279 struct timespec64 boot;
1284 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1289 ++version; /* first time write, random junk */
1293 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1297 * The guest calculates current wall clock time by adding
1298 * system time (updated by kvm_guest_time_update below) to the
1299 * wall clock specified here. guest system time equals host
1300 * system time for us, thus we must fill in host boot time here.
1302 getboottime64(&boot);
1304 if (kvm->arch.kvmclock_offset) {
1305 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1306 boot = timespec64_sub(boot, ts);
1308 wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1309 wc.nsec = boot.tv_nsec;
1310 wc.version = version;
1312 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1315 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1318 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1320 do_shl32_div32(dividend, divisor);
1324 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1325 s8 *pshift, u32 *pmultiplier)
1333 scaled64 = scaled_hz;
1334 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1339 tps32 = (uint32_t)tps64;
1340 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1341 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1349 *pmultiplier = div_frac(scaled64, tps32);
1351 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1352 __func__, base_hz, scaled_hz, shift, *pmultiplier);
1355 #ifdef CONFIG_X86_64
1356 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1359 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1360 static unsigned long max_tsc_khz;
1362 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1364 u64 v = (u64)khz * (1000000 + ppm);
1369 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1373 /* Guest TSC same frequency as host TSC? */
1375 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1379 /* TSC scaling supported? */
1380 if (!kvm_has_tsc_control) {
1381 if (user_tsc_khz > tsc_khz) {
1382 vcpu->arch.tsc_catchup = 1;
1383 vcpu->arch.tsc_always_catchup = 1;
1386 WARN(1, "user requested TSC rate below hardware speed\n");
1391 /* TSC scaling required - calculate ratio */
1392 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1393 user_tsc_khz, tsc_khz);
1395 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1396 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1401 vcpu->arch.tsc_scaling_ratio = ratio;
1405 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1407 u32 thresh_lo, thresh_hi;
1408 int use_scaling = 0;
1410 /* tsc_khz can be zero if TSC calibration fails */
1411 if (user_tsc_khz == 0) {
1412 /* set tsc_scaling_ratio to a safe value */
1413 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1417 /* Compute a scale to convert nanoseconds in TSC cycles */
1418 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1419 &vcpu->arch.virtual_tsc_shift,
1420 &vcpu->arch.virtual_tsc_mult);
1421 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1424 * Compute the variation in TSC rate which is acceptable
1425 * within the range of tolerance and decide if the
1426 * rate being applied is within that bounds of the hardware
1427 * rate. If so, no scaling or compensation need be done.
1429 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1430 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1431 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1432 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1435 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1438 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1440 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1441 vcpu->arch.virtual_tsc_mult,
1442 vcpu->arch.virtual_tsc_shift);
1443 tsc += vcpu->arch.this_tsc_write;
1447 static inline int gtod_is_based_on_tsc(int mode)
1449 return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1452 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1454 #ifdef CONFIG_X86_64
1456 struct kvm_arch *ka = &vcpu->kvm->arch;
1457 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1459 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1460 atomic_read(&vcpu->kvm->online_vcpus));
1463 * Once the masterclock is enabled, always perform request in
1464 * order to update it.
1466 * In order to enable masterclock, the host clocksource must be TSC
1467 * and the vcpus need to have matched TSCs. When that happens,
1468 * perform request to enable masterclock.
1470 if (ka->use_master_clock ||
1471 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1472 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1474 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1475 atomic_read(&vcpu->kvm->online_vcpus),
1476 ka->use_master_clock, gtod->clock.vclock_mode);
1480 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1482 u64 curr_offset = vcpu->arch.tsc_offset;
1483 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1487 * Multiply tsc by a fixed point number represented by ratio.
1489 * The most significant 64-N bits (mult) of ratio represent the
1490 * integral part of the fixed point number; the remaining N bits
1491 * (frac) represent the fractional part, ie. ratio represents a fixed
1492 * point number (mult + frac * 2^(-N)).
1494 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1496 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1498 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1501 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1504 u64 ratio = vcpu->arch.tsc_scaling_ratio;
1506 if (ratio != kvm_default_tsc_scaling_ratio)
1507 _tsc = __scale_tsc(ratio, tsc);
1511 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1513 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1517 tsc = kvm_scale_tsc(vcpu, rdtsc());
1519 return target_tsc - tsc;
1522 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1524 return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1526 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1528 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1530 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1531 vcpu->arch.tsc_offset = offset;
1534 static inline bool kvm_check_tsc_unstable(void)
1536 #ifdef CONFIG_X86_64
1538 * TSC is marked unstable when we're running on Hyper-V,
1539 * 'TSC page' clocksource is good.
1541 if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1544 return check_tsc_unstable();
1547 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1549 struct kvm *kvm = vcpu->kvm;
1550 u64 offset, ns, elapsed;
1551 unsigned long flags;
1553 bool already_matched;
1554 u64 data = msr->data;
1555 bool synchronizing = false;
1557 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1558 offset = kvm_compute_tsc_offset(vcpu, data);
1559 ns = ktime_get_boot_ns();
1560 elapsed = ns - kvm->arch.last_tsc_nsec;
1562 if (vcpu->arch.virtual_tsc_khz) {
1563 if (data == 0 && msr->host_initiated) {
1565 * detection of vcpu initialization -- need to sync
1566 * with other vCPUs. This particularly helps to keep
1567 * kvm_clock stable after CPU hotplug
1569 synchronizing = true;
1571 u64 tsc_exp = kvm->arch.last_tsc_write +
1572 nsec_to_cycles(vcpu, elapsed);
1573 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1575 * Special case: TSC write with a small delta (1 second)
1576 * of virtual cycle time against real time is
1577 * interpreted as an attempt to synchronize the CPU.
1579 synchronizing = data < tsc_exp + tsc_hz &&
1580 data + tsc_hz > tsc_exp;
1585 * For a reliable TSC, we can match TSC offsets, and for an unstable
1586 * TSC, we add elapsed time in this computation. We could let the
1587 * compensation code attempt to catch up if we fall behind, but
1588 * it's better to try to match offsets from the beginning.
1590 if (synchronizing &&
1591 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1592 if (!kvm_check_tsc_unstable()) {
1593 offset = kvm->arch.cur_tsc_offset;
1594 pr_debug("kvm: matched tsc offset for %llu\n", data);
1596 u64 delta = nsec_to_cycles(vcpu, elapsed);
1598 offset = kvm_compute_tsc_offset(vcpu, data);
1599 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1602 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1605 * We split periods of matched TSC writes into generations.
1606 * For each generation, we track the original measured
1607 * nanosecond time, offset, and write, so if TSCs are in
1608 * sync, we can match exact offset, and if not, we can match
1609 * exact software computation in compute_guest_tsc()
1611 * These values are tracked in kvm->arch.cur_xxx variables.
1613 kvm->arch.cur_tsc_generation++;
1614 kvm->arch.cur_tsc_nsec = ns;
1615 kvm->arch.cur_tsc_write = data;
1616 kvm->arch.cur_tsc_offset = offset;
1618 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1619 kvm->arch.cur_tsc_generation, data);
1623 * We also track th most recent recorded KHZ, write and time to
1624 * allow the matching interval to be extended at each write.
1626 kvm->arch.last_tsc_nsec = ns;
1627 kvm->arch.last_tsc_write = data;
1628 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1630 vcpu->arch.last_guest_tsc = data;
1632 /* Keep track of which generation this VCPU has synchronized to */
1633 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1634 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1635 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1637 if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1638 update_ia32_tsc_adjust_msr(vcpu, offset);
1640 kvm_vcpu_write_tsc_offset(vcpu, offset);
1641 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1643 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1645 kvm->arch.nr_vcpus_matched_tsc = 0;
1646 } else if (!already_matched) {
1647 kvm->arch.nr_vcpus_matched_tsc++;
1650 kvm_track_tsc_matching(vcpu);
1651 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1654 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1656 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1659 kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1662 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1664 if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1665 WARN_ON(adjustment < 0);
1666 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1667 adjust_tsc_offset_guest(vcpu, adjustment);
1670 #ifdef CONFIG_X86_64
1672 static u64 read_tsc(void)
1674 u64 ret = (u64)rdtsc_ordered();
1675 u64 last = pvclock_gtod_data.clock.cycle_last;
1677 if (likely(ret >= last))
1681 * GCC likes to generate cmov here, but this branch is extremely
1682 * predictable (it's just a function of time and the likely is
1683 * very likely) and there's a data dependence, so force GCC
1684 * to generate a branch instead. I don't barrier() because
1685 * we don't actually need a barrier, and if this function
1686 * ever gets inlined it will generate worse code.
1692 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1695 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1698 switch (gtod->clock.vclock_mode) {
1699 case VCLOCK_HVCLOCK:
1700 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1702 if (tsc_pg_val != U64_MAX) {
1703 /* TSC page valid */
1704 *mode = VCLOCK_HVCLOCK;
1705 v = (tsc_pg_val - gtod->clock.cycle_last) &
1708 /* TSC page invalid */
1709 *mode = VCLOCK_NONE;
1714 *tsc_timestamp = read_tsc();
1715 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1719 *mode = VCLOCK_NONE;
1722 if (*mode == VCLOCK_NONE)
1723 *tsc_timestamp = v = 0;
1725 return v * gtod->clock.mult;
1728 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1730 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1736 seq = read_seqcount_begin(>od->seq);
1737 ns = gtod->nsec_base;
1738 ns += vgettsc(tsc_timestamp, &mode);
1739 ns >>= gtod->clock.shift;
1740 ns += gtod->boot_ns;
1741 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1747 static int do_realtime(struct timespec *ts, u64 *tsc_timestamp)
1749 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1755 seq = read_seqcount_begin(>od->seq);
1756 ts->tv_sec = gtod->wall_time_sec;
1757 ns = gtod->nsec_base;
1758 ns += vgettsc(tsc_timestamp, &mode);
1759 ns >>= gtod->clock.shift;
1760 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1762 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1768 /* returns true if host is using TSC based clocksource */
1769 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1771 /* checked again under seqlock below */
1772 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1775 return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1779 /* returns true if host is using TSC based clocksource */
1780 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1783 /* checked again under seqlock below */
1784 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1787 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1793 * Assuming a stable TSC across physical CPUS, and a stable TSC
1794 * across virtual CPUs, the following condition is possible.
1795 * Each numbered line represents an event visible to both
1796 * CPUs at the next numbered event.
1798 * "timespecX" represents host monotonic time. "tscX" represents
1801 * VCPU0 on CPU0 | VCPU1 on CPU1
1803 * 1. read timespec0,tsc0
1804 * 2. | timespec1 = timespec0 + N
1806 * 3. transition to guest | transition to guest
1807 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1808 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1809 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1811 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1814 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1816 * - 0 < N - M => M < N
1818 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1819 * always the case (the difference between two distinct xtime instances
1820 * might be smaller then the difference between corresponding TSC reads,
1821 * when updating guest vcpus pvclock areas).
1823 * To avoid that problem, do not allow visibility of distinct
1824 * system_timestamp/tsc_timestamp values simultaneously: use a master
1825 * copy of host monotonic time values. Update that master copy
1828 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1832 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1834 #ifdef CONFIG_X86_64
1835 struct kvm_arch *ka = &kvm->arch;
1837 bool host_tsc_clocksource, vcpus_matched;
1839 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1840 atomic_read(&kvm->online_vcpus));
1843 * If the host uses TSC clock, then passthrough TSC as stable
1846 host_tsc_clocksource = kvm_get_time_and_clockread(
1847 &ka->master_kernel_ns,
1848 &ka->master_cycle_now);
1850 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1851 && !ka->backwards_tsc_observed
1852 && !ka->boot_vcpu_runs_old_kvmclock;
1854 if (ka->use_master_clock)
1855 atomic_set(&kvm_guest_has_master_clock, 1);
1857 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1858 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1863 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1865 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1868 static void kvm_gen_update_masterclock(struct kvm *kvm)
1870 #ifdef CONFIG_X86_64
1872 struct kvm_vcpu *vcpu;
1873 struct kvm_arch *ka = &kvm->arch;
1875 spin_lock(&ka->pvclock_gtod_sync_lock);
1876 kvm_make_mclock_inprogress_request(kvm);
1877 /* no guest entries from this point */
1878 pvclock_update_vm_gtod_copy(kvm);
1880 kvm_for_each_vcpu(i, vcpu, kvm)
1881 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1883 /* guest entries allowed */
1884 kvm_for_each_vcpu(i, vcpu, kvm)
1885 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1887 spin_unlock(&ka->pvclock_gtod_sync_lock);
1891 u64 get_kvmclock_ns(struct kvm *kvm)
1893 struct kvm_arch *ka = &kvm->arch;
1894 struct pvclock_vcpu_time_info hv_clock;
1897 spin_lock(&ka->pvclock_gtod_sync_lock);
1898 if (!ka->use_master_clock) {
1899 spin_unlock(&ka->pvclock_gtod_sync_lock);
1900 return ktime_get_boot_ns() + ka->kvmclock_offset;
1903 hv_clock.tsc_timestamp = ka->master_cycle_now;
1904 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1905 spin_unlock(&ka->pvclock_gtod_sync_lock);
1907 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1910 if (__this_cpu_read(cpu_tsc_khz)) {
1911 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1912 &hv_clock.tsc_shift,
1913 &hv_clock.tsc_to_system_mul);
1914 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1916 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1923 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1925 struct kvm_vcpu_arch *vcpu = &v->arch;
1926 struct pvclock_vcpu_time_info guest_hv_clock;
1928 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1929 &guest_hv_clock, sizeof(guest_hv_clock))))
1932 /* This VCPU is paused, but it's legal for a guest to read another
1933 * VCPU's kvmclock, so we really have to follow the specification where
1934 * it says that version is odd if data is being modified, and even after
1937 * Version field updates must be kept separate. This is because
1938 * kvm_write_guest_cached might use a "rep movs" instruction, and
1939 * writes within a string instruction are weakly ordered. So there
1940 * are three writes overall.
1942 * As a small optimization, only write the version field in the first
1943 * and third write. The vcpu->pv_time cache is still valid, because the
1944 * version field is the first in the struct.
1946 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1948 if (guest_hv_clock.version & 1)
1949 ++guest_hv_clock.version; /* first time write, random junk */
1951 vcpu->hv_clock.version = guest_hv_clock.version + 1;
1952 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1954 sizeof(vcpu->hv_clock.version));
1958 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1959 vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1961 if (vcpu->pvclock_set_guest_stopped_request) {
1962 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1963 vcpu->pvclock_set_guest_stopped_request = false;
1966 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1968 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1970 sizeof(vcpu->hv_clock));
1974 vcpu->hv_clock.version++;
1975 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1977 sizeof(vcpu->hv_clock.version));
1980 static int kvm_guest_time_update(struct kvm_vcpu *v)
1982 unsigned long flags, tgt_tsc_khz;
1983 struct kvm_vcpu_arch *vcpu = &v->arch;
1984 struct kvm_arch *ka = &v->kvm->arch;
1986 u64 tsc_timestamp, host_tsc;
1988 bool use_master_clock;
1994 * If the host uses TSC clock, then passthrough TSC as stable
1997 spin_lock(&ka->pvclock_gtod_sync_lock);
1998 use_master_clock = ka->use_master_clock;
1999 if (use_master_clock) {
2000 host_tsc = ka->master_cycle_now;
2001 kernel_ns = ka->master_kernel_ns;
2003 spin_unlock(&ka->pvclock_gtod_sync_lock);
2005 /* Keep irq disabled to prevent changes to the clock */
2006 local_irq_save(flags);
2007 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2008 if (unlikely(tgt_tsc_khz == 0)) {
2009 local_irq_restore(flags);
2010 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2013 if (!use_master_clock) {
2015 kernel_ns = ktime_get_boot_ns();
2018 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2021 * We may have to catch up the TSC to match elapsed wall clock
2022 * time for two reasons, even if kvmclock is used.
2023 * 1) CPU could have been running below the maximum TSC rate
2024 * 2) Broken TSC compensation resets the base at each VCPU
2025 * entry to avoid unknown leaps of TSC even when running
2026 * again on the same CPU. This may cause apparent elapsed
2027 * time to disappear, and the guest to stand still or run
2030 if (vcpu->tsc_catchup) {
2031 u64 tsc = compute_guest_tsc(v, kernel_ns);
2032 if (tsc > tsc_timestamp) {
2033 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2034 tsc_timestamp = tsc;
2038 local_irq_restore(flags);
2040 /* With all the info we got, fill in the values */
2042 if (kvm_has_tsc_control)
2043 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2045 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2046 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2047 &vcpu->hv_clock.tsc_shift,
2048 &vcpu->hv_clock.tsc_to_system_mul);
2049 vcpu->hw_tsc_khz = tgt_tsc_khz;
2052 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2053 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2054 vcpu->last_guest_tsc = tsc_timestamp;
2056 /* If the host uses TSC clocksource, then it is stable */
2058 if (use_master_clock)
2059 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2061 vcpu->hv_clock.flags = pvclock_flags;
2063 if (vcpu->pv_time_enabled)
2064 kvm_setup_pvclock_page(v);
2065 if (v == kvm_get_vcpu(v->kvm, 0))
2066 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2071 * kvmclock updates which are isolated to a given vcpu, such as
2072 * vcpu->cpu migration, should not allow system_timestamp from
2073 * the rest of the vcpus to remain static. Otherwise ntp frequency
2074 * correction applies to one vcpu's system_timestamp but not
2077 * So in those cases, request a kvmclock update for all vcpus.
2078 * We need to rate-limit these requests though, as they can
2079 * considerably slow guests that have a large number of vcpus.
2080 * The time for a remote vcpu to update its kvmclock is bound
2081 * by the delay we use to rate-limit the updates.
2084 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2086 static void kvmclock_update_fn(struct work_struct *work)
2089 struct delayed_work *dwork = to_delayed_work(work);
2090 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2091 kvmclock_update_work);
2092 struct kvm *kvm = container_of(ka, struct kvm, arch);
2093 struct kvm_vcpu *vcpu;
2095 kvm_for_each_vcpu(i, vcpu, kvm) {
2096 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2097 kvm_vcpu_kick(vcpu);
2101 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2103 struct kvm *kvm = v->kvm;
2105 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2106 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2107 KVMCLOCK_UPDATE_DELAY);
2110 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2112 static void kvmclock_sync_fn(struct work_struct *work)
2114 struct delayed_work *dwork = to_delayed_work(work);
2115 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2116 kvmclock_sync_work);
2117 struct kvm *kvm = container_of(ka, struct kvm, arch);
2119 if (!kvmclock_periodic_sync)
2122 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2123 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2124 KVMCLOCK_SYNC_PERIOD);
2127 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2129 u64 mcg_cap = vcpu->arch.mcg_cap;
2130 unsigned bank_num = mcg_cap & 0xff;
2131 u32 msr = msr_info->index;
2132 u64 data = msr_info->data;
2135 case MSR_IA32_MCG_STATUS:
2136 vcpu->arch.mcg_status = data;
2138 case MSR_IA32_MCG_CTL:
2139 if (!(mcg_cap & MCG_CTL_P))
2141 if (data != 0 && data != ~(u64)0)
2143 vcpu->arch.mcg_ctl = data;
2146 if (msr >= MSR_IA32_MC0_CTL &&
2147 msr < MSR_IA32_MCx_CTL(bank_num)) {
2148 u32 offset = msr - MSR_IA32_MC0_CTL;
2149 /* only 0 or all 1s can be written to IA32_MCi_CTL
2150 * some Linux kernels though clear bit 10 in bank 4 to
2151 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2152 * this to avoid an uncatched #GP in the guest
2154 if ((offset & 0x3) == 0 &&
2155 data != 0 && (data | (1 << 10)) != ~(u64)0)
2157 if (!msr_info->host_initiated &&
2158 (offset & 0x3) == 1 && data != 0)
2160 vcpu->arch.mce_banks[offset] = data;
2168 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2170 struct kvm *kvm = vcpu->kvm;
2171 int lm = is_long_mode(vcpu);
2172 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2173 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2174 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2175 : kvm->arch.xen_hvm_config.blob_size_32;
2176 u32 page_num = data & ~PAGE_MASK;
2177 u64 page_addr = data & PAGE_MASK;
2182 if (page_num >= blob_size)
2185 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2190 if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2199 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2201 gpa_t gpa = data & ~0x3f;
2203 /* Bits 3:5 are reserved, Should be zero */
2207 vcpu->arch.apf.msr_val = data;
2209 if (!(data & KVM_ASYNC_PF_ENABLED)) {
2210 kvm_clear_async_pf_completion_queue(vcpu);
2211 kvm_async_pf_hash_reset(vcpu);
2215 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2219 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2220 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2221 kvm_async_pf_wakeup_all(vcpu);
2225 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2227 vcpu->arch.pv_time_enabled = false;
2230 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2232 ++vcpu->stat.tlb_flush;
2233 kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2236 static void record_steal_time(struct kvm_vcpu *vcpu)
2238 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2241 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2242 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2246 * Doing a TLB flush here, on the guest's behalf, can avoid
2249 if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2250 kvm_vcpu_flush_tlb(vcpu, false);
2252 if (vcpu->arch.st.steal.version & 1)
2253 vcpu->arch.st.steal.version += 1; /* first time write, random junk */
2255 vcpu->arch.st.steal.version += 1;
2257 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2258 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2262 vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2263 vcpu->arch.st.last_steal;
2264 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2266 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2267 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2271 vcpu->arch.st.steal.version += 1;
2273 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2274 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2277 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2280 u32 msr = msr_info->index;
2281 u64 data = msr_info->data;
2284 case MSR_AMD64_NB_CFG:
2285 case MSR_IA32_UCODE_WRITE:
2286 case MSR_VM_HSAVE_PA:
2287 case MSR_AMD64_PATCH_LOADER:
2288 case MSR_AMD64_BU_CFG2:
2289 case MSR_AMD64_DC_CFG:
2292 case MSR_IA32_UCODE_REV:
2293 if (msr_info->host_initiated)
2294 vcpu->arch.microcode_version = data;
2297 return set_efer(vcpu, data);
2299 data &= ~(u64)0x40; /* ignore flush filter disable */
2300 data &= ~(u64)0x100; /* ignore ignne emulation enable */
2301 data &= ~(u64)0x8; /* ignore TLB cache disable */
2302 data &= ~(u64)0x40000; /* ignore Mc status write enable */
2304 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2309 case MSR_FAM10H_MMIO_CONF_BASE:
2311 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2316 case MSR_IA32_DEBUGCTLMSR:
2318 /* We support the non-activated case already */
2320 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2321 /* Values other than LBR and BTF are vendor-specific,
2322 thus reserved and should throw a #GP */
2325 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2328 case 0x200 ... 0x2ff:
2329 return kvm_mtrr_set_msr(vcpu, msr, data);
2330 case MSR_IA32_APICBASE:
2331 return kvm_set_apic_base(vcpu, msr_info);
2332 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2333 return kvm_x2apic_msr_write(vcpu, msr, data);
2334 case MSR_IA32_TSCDEADLINE:
2335 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2337 case MSR_IA32_TSC_ADJUST:
2338 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2339 if (!msr_info->host_initiated) {
2340 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2341 adjust_tsc_offset_guest(vcpu, adj);
2343 vcpu->arch.ia32_tsc_adjust_msr = data;
2346 case MSR_IA32_MISC_ENABLE:
2347 vcpu->arch.ia32_misc_enable_msr = data;
2349 case MSR_IA32_SMBASE:
2350 if (!msr_info->host_initiated)
2352 vcpu->arch.smbase = data;
2355 if (!msr_info->host_initiated)
2357 vcpu->arch.smi_count = data;
2359 case MSR_KVM_WALL_CLOCK_NEW:
2360 case MSR_KVM_WALL_CLOCK:
2361 vcpu->kvm->arch.wall_clock = data;
2362 kvm_write_wall_clock(vcpu->kvm, data);
2364 case MSR_KVM_SYSTEM_TIME_NEW:
2365 case MSR_KVM_SYSTEM_TIME: {
2366 struct kvm_arch *ka = &vcpu->kvm->arch;
2368 kvmclock_reset(vcpu);
2370 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2371 bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2373 if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2374 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2376 ka->boot_vcpu_runs_old_kvmclock = tmp;
2379 vcpu->arch.time = data;
2380 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2382 /* we verify if the enable bit is set... */
2386 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2387 &vcpu->arch.pv_time, data & ~1ULL,
2388 sizeof(struct pvclock_vcpu_time_info)))
2389 vcpu->arch.pv_time_enabled = false;
2391 vcpu->arch.pv_time_enabled = true;
2395 case MSR_KVM_ASYNC_PF_EN:
2396 if (kvm_pv_enable_async_pf(vcpu, data))
2399 case MSR_KVM_STEAL_TIME:
2401 if (unlikely(!sched_info_on()))
2404 if (data & KVM_STEAL_RESERVED_MASK)
2407 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2408 data & KVM_STEAL_VALID_BITS,
2409 sizeof(struct kvm_steal_time)))
2412 vcpu->arch.st.msr_val = data;
2414 if (!(data & KVM_MSR_ENABLED))
2417 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2420 case MSR_KVM_PV_EOI_EN:
2421 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2425 case MSR_IA32_MCG_CTL:
2426 case MSR_IA32_MCG_STATUS:
2427 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2428 return set_msr_mce(vcpu, msr_info);
2430 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2431 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2432 pr = true; /* fall through */
2433 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2434 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2435 if (kvm_pmu_is_valid_msr(vcpu, msr))
2436 return kvm_pmu_set_msr(vcpu, msr_info);
2438 if (pr || data != 0)
2439 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2440 "0x%x data 0x%llx\n", msr, data);
2442 case MSR_K7_CLK_CTL:
2444 * Ignore all writes to this no longer documented MSR.
2445 * Writes are only relevant for old K7 processors,
2446 * all pre-dating SVM, but a recommended workaround from
2447 * AMD for these chips. It is possible to specify the
2448 * affected processor models on the command line, hence
2449 * the need to ignore the workaround.
2452 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2453 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2454 case HV_X64_MSR_CRASH_CTL:
2455 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2456 return kvm_hv_set_msr_common(vcpu, msr, data,
2457 msr_info->host_initiated);
2458 case MSR_IA32_BBL_CR_CTL3:
2459 /* Drop writes to this legacy MSR -- see rdmsr
2460 * counterpart for further detail.
2462 if (report_ignored_msrs)
2463 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2466 case MSR_AMD64_OSVW_ID_LENGTH:
2467 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2469 vcpu->arch.osvw.length = data;
2471 case MSR_AMD64_OSVW_STATUS:
2472 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2474 vcpu->arch.osvw.status = data;
2476 case MSR_PLATFORM_INFO:
2477 if (!msr_info->host_initiated ||
2478 data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2479 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2480 cpuid_fault_enabled(vcpu)))
2482 vcpu->arch.msr_platform_info = data;
2484 case MSR_MISC_FEATURES_ENABLES:
2485 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2486 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2487 !supports_cpuid_fault(vcpu)))
2489 vcpu->arch.msr_misc_features_enables = data;
2492 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2493 return xen_hvm_config(vcpu, data);
2494 if (kvm_pmu_is_valid_msr(vcpu, msr))
2495 return kvm_pmu_set_msr(vcpu, msr_info);
2497 vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2501 if (report_ignored_msrs)
2503 "ignored wrmsr: 0x%x data 0x%llx\n",
2510 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2514 * Reads an msr value (of 'msr_index') into 'pdata'.
2515 * Returns 0 on success, non-0 otherwise.
2516 * Assumes vcpu_load() was already called.
2518 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2520 return kvm_x86_ops->get_msr(vcpu, msr);
2522 EXPORT_SYMBOL_GPL(kvm_get_msr);
2524 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2527 u64 mcg_cap = vcpu->arch.mcg_cap;
2528 unsigned bank_num = mcg_cap & 0xff;
2531 case MSR_IA32_P5_MC_ADDR:
2532 case MSR_IA32_P5_MC_TYPE:
2535 case MSR_IA32_MCG_CAP:
2536 data = vcpu->arch.mcg_cap;
2538 case MSR_IA32_MCG_CTL:
2539 if (!(mcg_cap & MCG_CTL_P))
2541 data = vcpu->arch.mcg_ctl;
2543 case MSR_IA32_MCG_STATUS:
2544 data = vcpu->arch.mcg_status;
2547 if (msr >= MSR_IA32_MC0_CTL &&
2548 msr < MSR_IA32_MCx_CTL(bank_num)) {
2549 u32 offset = msr - MSR_IA32_MC0_CTL;
2550 data = vcpu->arch.mce_banks[offset];
2559 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2561 switch (msr_info->index) {
2562 case MSR_IA32_PLATFORM_ID:
2563 case MSR_IA32_EBL_CR_POWERON:
2564 case MSR_IA32_DEBUGCTLMSR:
2565 case MSR_IA32_LASTBRANCHFROMIP:
2566 case MSR_IA32_LASTBRANCHTOIP:
2567 case MSR_IA32_LASTINTFROMIP:
2568 case MSR_IA32_LASTINTTOIP:
2570 case MSR_K8_TSEG_ADDR:
2571 case MSR_K8_TSEG_MASK:
2573 case MSR_VM_HSAVE_PA:
2574 case MSR_K8_INT_PENDING_MSG:
2575 case MSR_AMD64_NB_CFG:
2576 case MSR_FAM10H_MMIO_CONF_BASE:
2577 case MSR_AMD64_BU_CFG2:
2578 case MSR_IA32_PERF_CTL:
2579 case MSR_AMD64_DC_CFG:
2582 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2583 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2584 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2585 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2586 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2587 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2588 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2591 case MSR_IA32_UCODE_REV:
2592 msr_info->data = vcpu->arch.microcode_version;
2595 case 0x200 ... 0x2ff:
2596 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2597 case 0xcd: /* fsb frequency */
2601 * MSR_EBC_FREQUENCY_ID
2602 * Conservative value valid for even the basic CPU models.
2603 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2604 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2605 * and 266MHz for model 3, or 4. Set Core Clock
2606 * Frequency to System Bus Frequency Ratio to 1 (bits
2607 * 31:24) even though these are only valid for CPU
2608 * models > 2, however guests may end up dividing or
2609 * multiplying by zero otherwise.
2611 case MSR_EBC_FREQUENCY_ID:
2612 msr_info->data = 1 << 24;
2614 case MSR_IA32_APICBASE:
2615 msr_info->data = kvm_get_apic_base(vcpu);
2617 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2618 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2620 case MSR_IA32_TSCDEADLINE:
2621 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2623 case MSR_IA32_TSC_ADJUST:
2624 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2626 case MSR_IA32_MISC_ENABLE:
2627 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2629 case MSR_IA32_SMBASE:
2630 if (!msr_info->host_initiated)
2632 msr_info->data = vcpu->arch.smbase;
2635 msr_info->data = vcpu->arch.smi_count;
2637 case MSR_IA32_PERF_STATUS:
2638 /* TSC increment by tick */
2639 msr_info->data = 1000ULL;
2640 /* CPU multiplier */
2641 msr_info->data |= (((uint64_t)4ULL) << 40);
2644 msr_info->data = vcpu->arch.efer;
2646 case MSR_KVM_WALL_CLOCK:
2647 case MSR_KVM_WALL_CLOCK_NEW:
2648 msr_info->data = vcpu->kvm->arch.wall_clock;
2650 case MSR_KVM_SYSTEM_TIME:
2651 case MSR_KVM_SYSTEM_TIME_NEW:
2652 msr_info->data = vcpu->arch.time;
2654 case MSR_KVM_ASYNC_PF_EN:
2655 msr_info->data = vcpu->arch.apf.msr_val;
2657 case MSR_KVM_STEAL_TIME:
2658 msr_info->data = vcpu->arch.st.msr_val;
2660 case MSR_KVM_PV_EOI_EN:
2661 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2663 case MSR_IA32_P5_MC_ADDR:
2664 case MSR_IA32_P5_MC_TYPE:
2665 case MSR_IA32_MCG_CAP:
2666 case MSR_IA32_MCG_CTL:
2667 case MSR_IA32_MCG_STATUS:
2668 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2669 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2670 case MSR_K7_CLK_CTL:
2672 * Provide expected ramp-up count for K7. All other
2673 * are set to zero, indicating minimum divisors for
2676 * This prevents guest kernels on AMD host with CPU
2677 * type 6, model 8 and higher from exploding due to
2678 * the rdmsr failing.
2680 msr_info->data = 0x20000000;
2682 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2683 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2684 case HV_X64_MSR_CRASH_CTL:
2685 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2686 return kvm_hv_get_msr_common(vcpu,
2687 msr_info->index, &msr_info->data);
2689 case MSR_IA32_BBL_CR_CTL3:
2690 /* This legacy MSR exists but isn't fully documented in current
2691 * silicon. It is however accessed by winxp in very narrow
2692 * scenarios where it sets bit #19, itself documented as
2693 * a "reserved" bit. Best effort attempt to source coherent
2694 * read data here should the balance of the register be
2695 * interpreted by the guest:
2697 * L2 cache control register 3: 64GB range, 256KB size,
2698 * enabled, latency 0x1, configured
2700 msr_info->data = 0xbe702111;
2702 case MSR_AMD64_OSVW_ID_LENGTH:
2703 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2705 msr_info->data = vcpu->arch.osvw.length;
2707 case MSR_AMD64_OSVW_STATUS:
2708 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2710 msr_info->data = vcpu->arch.osvw.status;
2712 case MSR_PLATFORM_INFO:
2713 msr_info->data = vcpu->arch.msr_platform_info;
2715 case MSR_MISC_FEATURES_ENABLES:
2716 msr_info->data = vcpu->arch.msr_misc_features_enables;
2719 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2720 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2722 vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2726 if (report_ignored_msrs)
2727 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2735 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2738 * Read or write a bunch of msrs. All parameters are kernel addresses.
2740 * @return number of msrs set successfully.
2742 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2743 struct kvm_msr_entry *entries,
2744 int (*do_msr)(struct kvm_vcpu *vcpu,
2745 unsigned index, u64 *data))
2749 for (i = 0; i < msrs->nmsrs; ++i)
2750 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2757 * Read or write a bunch of msrs. Parameters are user addresses.
2759 * @return number of msrs set successfully.
2761 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2762 int (*do_msr)(struct kvm_vcpu *vcpu,
2763 unsigned index, u64 *data),
2766 struct kvm_msrs msrs;
2767 struct kvm_msr_entry *entries;
2772 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2776 if (msrs.nmsrs >= MAX_IO_MSRS)
2779 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2780 entries = memdup_user(user_msrs->entries, size);
2781 if (IS_ERR(entries)) {
2782 r = PTR_ERR(entries);
2786 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2791 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2802 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2807 case KVM_CAP_IRQCHIP:
2809 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2810 case KVM_CAP_SET_TSS_ADDR:
2811 case KVM_CAP_EXT_CPUID:
2812 case KVM_CAP_EXT_EMUL_CPUID:
2813 case KVM_CAP_CLOCKSOURCE:
2815 case KVM_CAP_NOP_IO_DELAY:
2816 case KVM_CAP_MP_STATE:
2817 case KVM_CAP_SYNC_MMU:
2818 case KVM_CAP_USER_NMI:
2819 case KVM_CAP_REINJECT_CONTROL:
2820 case KVM_CAP_IRQ_INJECT_STATUS:
2821 case KVM_CAP_IOEVENTFD:
2822 case KVM_CAP_IOEVENTFD_NO_LENGTH:
2824 case KVM_CAP_PIT_STATE2:
2825 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2826 case KVM_CAP_XEN_HVM:
2827 case KVM_CAP_VCPU_EVENTS:
2828 case KVM_CAP_HYPERV:
2829 case KVM_CAP_HYPERV_VAPIC:
2830 case KVM_CAP_HYPERV_SPIN:
2831 case KVM_CAP_HYPERV_SYNIC:
2832 case KVM_CAP_HYPERV_SYNIC2:
2833 case KVM_CAP_HYPERV_VP_INDEX:
2834 case KVM_CAP_HYPERV_EVENTFD:
2835 case KVM_CAP_PCI_SEGMENT:
2836 case KVM_CAP_DEBUGREGS:
2837 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2839 case KVM_CAP_ASYNC_PF:
2840 case KVM_CAP_GET_TSC_KHZ:
2841 case KVM_CAP_KVMCLOCK_CTRL:
2842 case KVM_CAP_READONLY_MEM:
2843 case KVM_CAP_HYPERV_TIME:
2844 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2845 case KVM_CAP_TSC_DEADLINE_TIMER:
2846 case KVM_CAP_ENABLE_CAP_VM:
2847 case KVM_CAP_DISABLE_QUIRKS:
2848 case KVM_CAP_SET_BOOT_CPU_ID:
2849 case KVM_CAP_SPLIT_IRQCHIP:
2850 case KVM_CAP_IMMEDIATE_EXIT:
2851 case KVM_CAP_GET_MSR_FEATURES:
2854 case KVM_CAP_SYNC_REGS:
2855 r = KVM_SYNC_X86_VALID_FIELDS;
2857 case KVM_CAP_ADJUST_CLOCK:
2858 r = KVM_CLOCK_TSC_STABLE;
2860 case KVM_CAP_X86_GUEST_MWAIT:
2861 r = kvm_mwait_in_guest();
2863 case KVM_CAP_X86_SMM:
2864 /* SMBASE is usually relocated above 1M on modern chipsets,
2865 * and SMM handlers might indeed rely on 4G segment limits,
2866 * so do not report SMM to be available if real mode is
2867 * emulated via vm86 mode. Still, do not go to great lengths
2868 * to avoid userspace's usage of the feature, because it is a
2869 * fringe case that is not enabled except via specific settings
2870 * of the module parameters.
2872 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2875 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2877 case KVM_CAP_NR_VCPUS:
2878 r = KVM_SOFT_MAX_VCPUS;
2880 case KVM_CAP_MAX_VCPUS:
2883 case KVM_CAP_NR_MEMSLOTS:
2884 r = KVM_USER_MEM_SLOTS;
2886 case KVM_CAP_PV_MMU: /* obsolete */
2890 r = KVM_MAX_MCE_BANKS;
2893 r = boot_cpu_has(X86_FEATURE_XSAVE);
2895 case KVM_CAP_TSC_CONTROL:
2896 r = kvm_has_tsc_control;
2898 case KVM_CAP_X2APIC_API:
2899 r = KVM_X2APIC_API_VALID_FLAGS;
2909 long kvm_arch_dev_ioctl(struct file *filp,
2910 unsigned int ioctl, unsigned long arg)
2912 void __user *argp = (void __user *)arg;
2916 case KVM_GET_MSR_INDEX_LIST: {
2917 struct kvm_msr_list __user *user_msr_list = argp;
2918 struct kvm_msr_list msr_list;
2922 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2925 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2926 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2929 if (n < msr_list.nmsrs)
2932 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2933 num_msrs_to_save * sizeof(u32)))
2935 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2937 num_emulated_msrs * sizeof(u32)))
2942 case KVM_GET_SUPPORTED_CPUID:
2943 case KVM_GET_EMULATED_CPUID: {
2944 struct kvm_cpuid2 __user *cpuid_arg = argp;
2945 struct kvm_cpuid2 cpuid;
2948 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2951 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2957 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2962 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2964 if (copy_to_user(argp, &kvm_mce_cap_supported,
2965 sizeof(kvm_mce_cap_supported)))
2969 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
2970 struct kvm_msr_list __user *user_msr_list = argp;
2971 struct kvm_msr_list msr_list;
2975 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
2978 msr_list.nmsrs = num_msr_based_features;
2979 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
2982 if (n < msr_list.nmsrs)
2985 if (copy_to_user(user_msr_list->indices, &msr_based_features,
2986 num_msr_based_features * sizeof(u32)))
2992 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3002 static void wbinvd_ipi(void *garbage)
3007 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3009 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3012 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3014 /* Address WBINVD may be executed by guest */
3015 if (need_emulate_wbinvd(vcpu)) {
3016 if (kvm_x86_ops->has_wbinvd_exit())
3017 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3018 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3019 smp_call_function_single(vcpu->cpu,
3020 wbinvd_ipi, NULL, 1);
3023 kvm_x86_ops->vcpu_load(vcpu, cpu);
3025 /* Apply any externally detected TSC adjustments (due to suspend) */
3026 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3027 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3028 vcpu->arch.tsc_offset_adjustment = 0;
3029 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3032 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3033 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3034 rdtsc() - vcpu->arch.last_host_tsc;
3036 mark_tsc_unstable("KVM discovered backwards TSC");
3038 if (kvm_check_tsc_unstable()) {
3039 u64 offset = kvm_compute_tsc_offset(vcpu,
3040 vcpu->arch.last_guest_tsc);
3041 kvm_vcpu_write_tsc_offset(vcpu, offset);
3042 vcpu->arch.tsc_catchup = 1;
3045 if (kvm_lapic_hv_timer_in_use(vcpu))
3046 kvm_lapic_restart_hv_timer(vcpu);
3049 * On a host with synchronized TSC, there is no need to update
3050 * kvmclock on vcpu->cpu migration
3052 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3053 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3054 if (vcpu->cpu != cpu)
3055 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3059 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3062 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3064 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3067 vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3069 kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3070 &vcpu->arch.st.steal.preempted,
3071 offsetof(struct kvm_steal_time, preempted),
3072 sizeof(vcpu->arch.st.steal.preempted));
3075 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3079 if (vcpu->preempted)
3080 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3083 * Disable page faults because we're in atomic context here.
3084 * kvm_write_guest_offset_cached() would call might_fault()
3085 * that relies on pagefault_disable() to tell if there's a
3086 * bug. NOTE: the write to guest memory may not go through if
3087 * during postcopy live migration or if there's heavy guest
3090 pagefault_disable();
3092 * kvm_memslots() will be called by
3093 * kvm_write_guest_offset_cached() so take the srcu lock.
3095 idx = srcu_read_lock(&vcpu->kvm->srcu);
3096 kvm_steal_time_set_preempted(vcpu);
3097 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3099 kvm_x86_ops->vcpu_put(vcpu);
3100 vcpu->arch.last_host_tsc = rdtsc();
3102 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3103 * on every vmexit, but if not, we might have a stale dr6 from the
3104 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3109 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3110 struct kvm_lapic_state *s)
3112 if (vcpu->arch.apicv_active)
3113 kvm_x86_ops->sync_pir_to_irr(vcpu);
3115 return kvm_apic_get_state(vcpu, s);
3118 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3119 struct kvm_lapic_state *s)
3123 r = kvm_apic_set_state(vcpu, s);
3126 update_cr8_intercept(vcpu);
3131 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3133 return (!lapic_in_kernel(vcpu) ||
3134 kvm_apic_accept_pic_intr(vcpu));
3138 * if userspace requested an interrupt window, check that the
3139 * interrupt window is open.
3141 * No need to exit to userspace if we already have an interrupt queued.
3143 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3145 return kvm_arch_interrupt_allowed(vcpu) &&
3146 !kvm_cpu_has_interrupt(vcpu) &&
3147 !kvm_event_needs_reinjection(vcpu) &&
3148 kvm_cpu_accept_dm_intr(vcpu);
3151 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3152 struct kvm_interrupt *irq)
3154 if (irq->irq >= KVM_NR_INTERRUPTS)
3157 if (!irqchip_in_kernel(vcpu->kvm)) {
3158 kvm_queue_interrupt(vcpu, irq->irq, false);
3159 kvm_make_request(KVM_REQ_EVENT, vcpu);
3164 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3165 * fail for in-kernel 8259.
3167 if (pic_in_kernel(vcpu->kvm))
3170 if (vcpu->arch.pending_external_vector != -1)
3173 vcpu->arch.pending_external_vector = irq->irq;
3174 kvm_make_request(KVM_REQ_EVENT, vcpu);
3178 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3180 kvm_inject_nmi(vcpu);
3185 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3187 kvm_make_request(KVM_REQ_SMI, vcpu);
3192 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3193 struct kvm_tpr_access_ctl *tac)
3197 vcpu->arch.tpr_access_reporting = !!tac->enabled;
3201 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3205 unsigned bank_num = mcg_cap & 0xff, bank;
3208 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3210 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3213 vcpu->arch.mcg_cap = mcg_cap;
3214 /* Init IA32_MCG_CTL to all 1s */
3215 if (mcg_cap & MCG_CTL_P)
3216 vcpu->arch.mcg_ctl = ~(u64)0;
3217 /* Init IA32_MCi_CTL to all 1s */
3218 for (bank = 0; bank < bank_num; bank++)
3219 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3221 if (kvm_x86_ops->setup_mce)
3222 kvm_x86_ops->setup_mce(vcpu);
3227 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3228 struct kvm_x86_mce *mce)
3230 u64 mcg_cap = vcpu->arch.mcg_cap;
3231 unsigned bank_num = mcg_cap & 0xff;
3232 u64 *banks = vcpu->arch.mce_banks;
3234 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3237 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3238 * reporting is disabled
3240 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3241 vcpu->arch.mcg_ctl != ~(u64)0)
3243 banks += 4 * mce->bank;
3245 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3246 * reporting is disabled for the bank
3248 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3250 if (mce->status & MCI_STATUS_UC) {
3251 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3252 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3253 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3256 if (banks[1] & MCI_STATUS_VAL)
3257 mce->status |= MCI_STATUS_OVER;
3258 banks[2] = mce->addr;
3259 banks[3] = mce->misc;
3260 vcpu->arch.mcg_status = mce->mcg_status;
3261 banks[1] = mce->status;
3262 kvm_queue_exception(vcpu, MC_VECTOR);
3263 } else if (!(banks[1] & MCI_STATUS_VAL)
3264 || !(banks[1] & MCI_STATUS_UC)) {
3265 if (banks[1] & MCI_STATUS_VAL)
3266 mce->status |= MCI_STATUS_OVER;
3267 banks[2] = mce->addr;
3268 banks[3] = mce->misc;
3269 banks[1] = mce->status;
3271 banks[1] |= MCI_STATUS_OVER;
3275 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3276 struct kvm_vcpu_events *events)
3280 * FIXME: pass injected and pending separately. This is only
3281 * needed for nested virtualization, whose state cannot be
3282 * migrated yet. For now we can combine them.
3284 events->exception.injected =
3285 (vcpu->arch.exception.pending ||
3286 vcpu->arch.exception.injected) &&
3287 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3288 events->exception.nr = vcpu->arch.exception.nr;
3289 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3290 events->exception.pad = 0;
3291 events->exception.error_code = vcpu->arch.exception.error_code;
3293 events->interrupt.injected =
3294 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3295 events->interrupt.nr = vcpu->arch.interrupt.nr;
3296 events->interrupt.soft = 0;
3297 events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3299 events->nmi.injected = vcpu->arch.nmi_injected;
3300 events->nmi.pending = vcpu->arch.nmi_pending != 0;
3301 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3302 events->nmi.pad = 0;
3304 events->sipi_vector = 0; /* never valid when reporting to user space */
3306 events->smi.smm = is_smm(vcpu);
3307 events->smi.pending = vcpu->arch.smi_pending;
3308 events->smi.smm_inside_nmi =
3309 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3310 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3312 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3313 | KVM_VCPUEVENT_VALID_SHADOW
3314 | KVM_VCPUEVENT_VALID_SMM);
3315 memset(&events->reserved, 0, sizeof(events->reserved));
3318 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3320 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3321 struct kvm_vcpu_events *events)
3323 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3324 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3325 | KVM_VCPUEVENT_VALID_SHADOW
3326 | KVM_VCPUEVENT_VALID_SMM))
3329 if (events->exception.injected &&
3330 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3331 is_guest_mode(vcpu)))
3334 /* INITs are latched while in SMM */
3335 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3336 (events->smi.smm || events->smi.pending) &&
3337 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3341 vcpu->arch.exception.injected = false;
3342 vcpu->arch.exception.pending = events->exception.injected;
3343 vcpu->arch.exception.nr = events->exception.nr;
3344 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3345 vcpu->arch.exception.error_code = events->exception.error_code;
3347 vcpu->arch.interrupt.pending = events->interrupt.injected;
3348 vcpu->arch.interrupt.nr = events->interrupt.nr;
3349 vcpu->arch.interrupt.soft = events->interrupt.soft;
3350 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3351 kvm_x86_ops->set_interrupt_shadow(vcpu,
3352 events->interrupt.shadow);
3354 vcpu->arch.nmi_injected = events->nmi.injected;
3355 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3356 vcpu->arch.nmi_pending = events->nmi.pending;
3357 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3359 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3360 lapic_in_kernel(vcpu))
3361 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3363 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3364 u32 hflags = vcpu->arch.hflags;
3365 if (events->smi.smm)
3366 hflags |= HF_SMM_MASK;
3368 hflags &= ~HF_SMM_MASK;
3369 kvm_set_hflags(vcpu, hflags);
3371 vcpu->arch.smi_pending = events->smi.pending;
3373 if (events->smi.smm) {
3374 if (events->smi.smm_inside_nmi)
3375 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3377 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3378 if (lapic_in_kernel(vcpu)) {
3379 if (events->smi.latched_init)
3380 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3382 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3387 kvm_make_request(KVM_REQ_EVENT, vcpu);
3392 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3393 struct kvm_debugregs *dbgregs)
3397 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3398 kvm_get_dr(vcpu, 6, &val);
3400 dbgregs->dr7 = vcpu->arch.dr7;
3402 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3405 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3406 struct kvm_debugregs *dbgregs)
3411 if (dbgregs->dr6 & ~0xffffffffull)
3413 if (dbgregs->dr7 & ~0xffffffffull)
3416 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3417 kvm_update_dr0123(vcpu);
3418 vcpu->arch.dr6 = dbgregs->dr6;
3419 kvm_update_dr6(vcpu);
3420 vcpu->arch.dr7 = dbgregs->dr7;
3421 kvm_update_dr7(vcpu);
3426 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3428 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3430 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3431 u64 xstate_bv = xsave->header.xfeatures;
3435 * Copy legacy XSAVE area, to avoid complications with CPUID
3436 * leaves 0 and 1 in the loop below.
3438 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3441 xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3442 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3445 * Copy each region from the possibly compacted offset to the
3446 * non-compacted offset.
3448 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3450 u64 feature = valid & -valid;
3451 int index = fls64(feature) - 1;
3452 void *src = get_xsave_addr(xsave, feature);
3455 u32 size, offset, ecx, edx;
3456 cpuid_count(XSTATE_CPUID, index,
3457 &size, &offset, &ecx, &edx);
3458 if (feature == XFEATURE_MASK_PKRU)
3459 memcpy(dest + offset, &vcpu->arch.pkru,
3460 sizeof(vcpu->arch.pkru));
3462 memcpy(dest + offset, src, size);
3470 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3472 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3473 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3477 * Copy legacy XSAVE area, to avoid complications with CPUID
3478 * leaves 0 and 1 in the loop below.
3480 memcpy(xsave, src, XSAVE_HDR_OFFSET);
3482 /* Set XSTATE_BV and possibly XCOMP_BV. */
3483 xsave->header.xfeatures = xstate_bv;
3484 if (boot_cpu_has(X86_FEATURE_XSAVES))
3485 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3488 * Copy each region from the non-compacted offset to the
3489 * possibly compacted offset.
3491 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3493 u64 feature = valid & -valid;
3494 int index = fls64(feature) - 1;
3495 void *dest = get_xsave_addr(xsave, feature);
3498 u32 size, offset, ecx, edx;
3499 cpuid_count(XSTATE_CPUID, index,
3500 &size, &offset, &ecx, &edx);
3501 if (feature == XFEATURE_MASK_PKRU)
3502 memcpy(&vcpu->arch.pkru, src + offset,
3503 sizeof(vcpu->arch.pkru));
3505 memcpy(dest, src + offset, size);
3512 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3513 struct kvm_xsave *guest_xsave)
3515 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3516 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3517 fill_xsave((u8 *) guest_xsave->region, vcpu);
3519 memcpy(guest_xsave->region,
3520 &vcpu->arch.guest_fpu.state.fxsave,
3521 sizeof(struct fxregs_state));
3522 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3523 XFEATURE_MASK_FPSSE;
3527 #define XSAVE_MXCSR_OFFSET 24
3529 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3530 struct kvm_xsave *guest_xsave)
3533 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3534 u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3536 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3538 * Here we allow setting states that are not present in
3539 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3540 * with old userspace.
3542 if (xstate_bv & ~kvm_supported_xcr0() ||
3543 mxcsr & ~mxcsr_feature_mask)
3545 load_xsave(vcpu, (u8 *)guest_xsave->region);
3547 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3548 mxcsr & ~mxcsr_feature_mask)
3550 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3551 guest_xsave->region, sizeof(struct fxregs_state));
3556 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3557 struct kvm_xcrs *guest_xcrs)
3559 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3560 guest_xcrs->nr_xcrs = 0;
3564 guest_xcrs->nr_xcrs = 1;
3565 guest_xcrs->flags = 0;
3566 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3567 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3570 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3571 struct kvm_xcrs *guest_xcrs)
3575 if (!boot_cpu_has(X86_FEATURE_XSAVE))
3578 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3581 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3582 /* Only support XCR0 currently */
3583 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3584 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3585 guest_xcrs->xcrs[i].value);
3594 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3595 * stopped by the hypervisor. This function will be called from the host only.
3596 * EINVAL is returned when the host attempts to set the flag for a guest that
3597 * does not support pv clocks.
3599 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3601 if (!vcpu->arch.pv_time_enabled)
3603 vcpu->arch.pvclock_set_guest_stopped_request = true;
3604 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3608 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3609 struct kvm_enable_cap *cap)
3615 case KVM_CAP_HYPERV_SYNIC2:
3618 case KVM_CAP_HYPERV_SYNIC:
3619 if (!irqchip_in_kernel(vcpu->kvm))
3621 return kvm_hv_activate_synic(vcpu, cap->cap ==
3622 KVM_CAP_HYPERV_SYNIC2);
3628 long kvm_arch_vcpu_ioctl(struct file *filp,
3629 unsigned int ioctl, unsigned long arg)
3631 struct kvm_vcpu *vcpu = filp->private_data;
3632 void __user *argp = (void __user *)arg;
3635 struct kvm_lapic_state *lapic;
3636 struct kvm_xsave *xsave;
3637 struct kvm_xcrs *xcrs;
3645 case KVM_GET_LAPIC: {
3647 if (!lapic_in_kernel(vcpu))
3649 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3654 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3658 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3663 case KVM_SET_LAPIC: {
3665 if (!lapic_in_kernel(vcpu))
3667 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3668 if (IS_ERR(u.lapic)) {
3669 r = PTR_ERR(u.lapic);
3673 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3676 case KVM_INTERRUPT: {
3677 struct kvm_interrupt irq;
3680 if (copy_from_user(&irq, argp, sizeof irq))
3682 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3686 r = kvm_vcpu_ioctl_nmi(vcpu);
3690 r = kvm_vcpu_ioctl_smi(vcpu);
3693 case KVM_SET_CPUID: {
3694 struct kvm_cpuid __user *cpuid_arg = argp;
3695 struct kvm_cpuid cpuid;
3698 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3700 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3703 case KVM_SET_CPUID2: {
3704 struct kvm_cpuid2 __user *cpuid_arg = argp;
3705 struct kvm_cpuid2 cpuid;
3708 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3710 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3711 cpuid_arg->entries);
3714 case KVM_GET_CPUID2: {
3715 struct kvm_cpuid2 __user *cpuid_arg = argp;
3716 struct kvm_cpuid2 cpuid;
3719 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3721 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3722 cpuid_arg->entries);
3726 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3731 case KVM_GET_MSRS: {
3732 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3733 r = msr_io(vcpu, argp, do_get_msr, 1);
3734 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3737 case KVM_SET_MSRS: {
3738 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3739 r = msr_io(vcpu, argp, do_set_msr, 0);
3740 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3743 case KVM_TPR_ACCESS_REPORTING: {
3744 struct kvm_tpr_access_ctl tac;
3747 if (copy_from_user(&tac, argp, sizeof tac))
3749 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3753 if (copy_to_user(argp, &tac, sizeof tac))
3758 case KVM_SET_VAPIC_ADDR: {
3759 struct kvm_vapic_addr va;
3763 if (!lapic_in_kernel(vcpu))
3766 if (copy_from_user(&va, argp, sizeof va))
3768 idx = srcu_read_lock(&vcpu->kvm->srcu);
3769 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3770 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3773 case KVM_X86_SETUP_MCE: {
3777 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3779 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3782 case KVM_X86_SET_MCE: {
3783 struct kvm_x86_mce mce;
3786 if (copy_from_user(&mce, argp, sizeof mce))
3788 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3791 case KVM_GET_VCPU_EVENTS: {
3792 struct kvm_vcpu_events events;
3794 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3797 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3802 case KVM_SET_VCPU_EVENTS: {
3803 struct kvm_vcpu_events events;
3806 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3809 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3812 case KVM_GET_DEBUGREGS: {
3813 struct kvm_debugregs dbgregs;
3815 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3818 if (copy_to_user(argp, &dbgregs,
3819 sizeof(struct kvm_debugregs)))
3824 case KVM_SET_DEBUGREGS: {
3825 struct kvm_debugregs dbgregs;
3828 if (copy_from_user(&dbgregs, argp,
3829 sizeof(struct kvm_debugregs)))
3832 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3835 case KVM_GET_XSAVE: {
3836 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3841 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3844 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3849 case KVM_SET_XSAVE: {
3850 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3851 if (IS_ERR(u.xsave)) {
3852 r = PTR_ERR(u.xsave);
3856 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3859 case KVM_GET_XCRS: {
3860 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3865 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3868 if (copy_to_user(argp, u.xcrs,
3869 sizeof(struct kvm_xcrs)))
3874 case KVM_SET_XCRS: {
3875 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3876 if (IS_ERR(u.xcrs)) {
3877 r = PTR_ERR(u.xcrs);
3881 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3884 case KVM_SET_TSC_KHZ: {
3888 user_tsc_khz = (u32)arg;
3890 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3893 if (user_tsc_khz == 0)
3894 user_tsc_khz = tsc_khz;
3896 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3901 case KVM_GET_TSC_KHZ: {
3902 r = vcpu->arch.virtual_tsc_khz;
3905 case KVM_KVMCLOCK_CTRL: {
3906 r = kvm_set_guest_paused(vcpu);
3909 case KVM_ENABLE_CAP: {
3910 struct kvm_enable_cap cap;
3913 if (copy_from_user(&cap, argp, sizeof(cap)))
3915 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3928 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3930 return VM_FAULT_SIGBUS;
3933 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3937 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3939 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3943 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3946 kvm->arch.ept_identity_map_addr = ident_addr;
3950 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3951 u32 kvm_nr_mmu_pages)
3953 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3956 mutex_lock(&kvm->slots_lock);
3958 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3959 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3961 mutex_unlock(&kvm->slots_lock);
3965 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3967 return kvm->arch.n_max_mmu_pages;
3970 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3972 struct kvm_pic *pic = kvm->arch.vpic;
3976 switch (chip->chip_id) {
3977 case KVM_IRQCHIP_PIC_MASTER:
3978 memcpy(&chip->chip.pic, &pic->pics[0],
3979 sizeof(struct kvm_pic_state));
3981 case KVM_IRQCHIP_PIC_SLAVE:
3982 memcpy(&chip->chip.pic, &pic->pics[1],
3983 sizeof(struct kvm_pic_state));
3985 case KVM_IRQCHIP_IOAPIC:
3986 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3995 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3997 struct kvm_pic *pic = kvm->arch.vpic;
4001 switch (chip->chip_id) {
4002 case KVM_IRQCHIP_PIC_MASTER:
4003 spin_lock(&pic->lock);
4004 memcpy(&pic->pics[0], &chip->chip.pic,
4005 sizeof(struct kvm_pic_state));
4006 spin_unlock(&pic->lock);
4008 case KVM_IRQCHIP_PIC_SLAVE:
4009 spin_lock(&pic->lock);
4010 memcpy(&pic->pics[1], &chip->chip.pic,
4011 sizeof(struct kvm_pic_state));
4012 spin_unlock(&pic->lock);
4014 case KVM_IRQCHIP_IOAPIC:
4015 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4021 kvm_pic_update_irq(pic);
4025 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4027 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4029 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4031 mutex_lock(&kps->lock);
4032 memcpy(ps, &kps->channels, sizeof(*ps));
4033 mutex_unlock(&kps->lock);
4037 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4040 struct kvm_pit *pit = kvm->arch.vpit;
4042 mutex_lock(&pit->pit_state.lock);
4043 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4044 for (i = 0; i < 3; i++)
4045 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4046 mutex_unlock(&pit->pit_state.lock);
4050 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4052 mutex_lock(&kvm->arch.vpit->pit_state.lock);
4053 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4054 sizeof(ps->channels));
4055 ps->flags = kvm->arch.vpit->pit_state.flags;
4056 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4057 memset(&ps->reserved, 0, sizeof(ps->reserved));
4061 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4065 u32 prev_legacy, cur_legacy;
4066 struct kvm_pit *pit = kvm->arch.vpit;
4068 mutex_lock(&pit->pit_state.lock);
4069 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4070 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4071 if (!prev_legacy && cur_legacy)
4073 memcpy(&pit->pit_state.channels, &ps->channels,
4074 sizeof(pit->pit_state.channels));
4075 pit->pit_state.flags = ps->flags;
4076 for (i = 0; i < 3; i++)
4077 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4079 mutex_unlock(&pit->pit_state.lock);
4083 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4084 struct kvm_reinject_control *control)
4086 struct kvm_pit *pit = kvm->arch.vpit;
4091 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4092 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4093 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4095 mutex_lock(&pit->pit_state.lock);
4096 kvm_pit_set_reinject(pit, control->pit_reinject);
4097 mutex_unlock(&pit->pit_state.lock);
4103 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4104 * @kvm: kvm instance
4105 * @log: slot id and address to which we copy the log
4107 * Steps 1-4 below provide general overview of dirty page logging. See
4108 * kvm_get_dirty_log_protect() function description for additional details.
4110 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4111 * always flush the TLB (step 4) even if previous step failed and the dirty
4112 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4113 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4114 * writes will be marked dirty for next log read.
4116 * 1. Take a snapshot of the bit and clear it if needed.
4117 * 2. Write protect the corresponding page.
4118 * 3. Copy the snapshot to the userspace.
4119 * 4. Flush TLB's if needed.
4121 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4123 bool is_dirty = false;
4126 mutex_lock(&kvm->slots_lock);
4129 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4131 if (kvm_x86_ops->flush_log_dirty)
4132 kvm_x86_ops->flush_log_dirty(kvm);
4134 r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4137 * All the TLBs can be flushed out of mmu lock, see the comments in
4138 * kvm_mmu_slot_remove_write_access().
4140 lockdep_assert_held(&kvm->slots_lock);
4142 kvm_flush_remote_tlbs(kvm);
4144 mutex_unlock(&kvm->slots_lock);
4148 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4151 if (!irqchip_in_kernel(kvm))
4154 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4155 irq_event->irq, irq_event->level,
4160 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4161 struct kvm_enable_cap *cap)
4169 case KVM_CAP_DISABLE_QUIRKS:
4170 kvm->arch.disabled_quirks = cap->args[0];
4173 case KVM_CAP_SPLIT_IRQCHIP: {
4174 mutex_lock(&kvm->lock);
4176 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4177 goto split_irqchip_unlock;
4179 if (irqchip_in_kernel(kvm))
4180 goto split_irqchip_unlock;
4181 if (kvm->created_vcpus)
4182 goto split_irqchip_unlock;
4183 r = kvm_setup_empty_irq_routing(kvm);
4185 goto split_irqchip_unlock;
4186 /* Pairs with irqchip_in_kernel. */
4188 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4189 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4191 split_irqchip_unlock:
4192 mutex_unlock(&kvm->lock);
4195 case KVM_CAP_X2APIC_API:
4197 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4200 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4201 kvm->arch.x2apic_format = true;
4202 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4203 kvm->arch.x2apic_broadcast_quirk_disabled = true;
4214 long kvm_arch_vm_ioctl(struct file *filp,
4215 unsigned int ioctl, unsigned long arg)
4217 struct kvm *kvm = filp->private_data;
4218 void __user *argp = (void __user *)arg;
4221 * This union makes it completely explicit to gcc-3.x
4222 * that these two variables' stack usage should be
4223 * combined, not added together.
4226 struct kvm_pit_state ps;
4227 struct kvm_pit_state2 ps2;
4228 struct kvm_pit_config pit_config;
4232 case KVM_SET_TSS_ADDR:
4233 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4235 case KVM_SET_IDENTITY_MAP_ADDR: {
4238 mutex_lock(&kvm->lock);
4240 if (kvm->created_vcpus)
4241 goto set_identity_unlock;
4243 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4244 goto set_identity_unlock;
4245 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4246 set_identity_unlock:
4247 mutex_unlock(&kvm->lock);
4250 case KVM_SET_NR_MMU_PAGES:
4251 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4253 case KVM_GET_NR_MMU_PAGES:
4254 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4256 case KVM_CREATE_IRQCHIP: {
4257 mutex_lock(&kvm->lock);
4260 if (irqchip_in_kernel(kvm))
4261 goto create_irqchip_unlock;
4264 if (kvm->created_vcpus)
4265 goto create_irqchip_unlock;
4267 r = kvm_pic_init(kvm);
4269 goto create_irqchip_unlock;
4271 r = kvm_ioapic_init(kvm);
4273 kvm_pic_destroy(kvm);
4274 goto create_irqchip_unlock;
4277 r = kvm_setup_default_irq_routing(kvm);
4279 kvm_ioapic_destroy(kvm);
4280 kvm_pic_destroy(kvm);
4281 goto create_irqchip_unlock;
4283 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4285 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4286 create_irqchip_unlock:
4287 mutex_unlock(&kvm->lock);
4290 case KVM_CREATE_PIT:
4291 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4293 case KVM_CREATE_PIT2:
4295 if (copy_from_user(&u.pit_config, argp,
4296 sizeof(struct kvm_pit_config)))
4299 mutex_lock(&kvm->lock);
4302 goto create_pit_unlock;
4304 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4308 mutex_unlock(&kvm->lock);
4310 case KVM_GET_IRQCHIP: {
4311 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4312 struct kvm_irqchip *chip;
4314 chip = memdup_user(argp, sizeof(*chip));
4321 if (!irqchip_kernel(kvm))
4322 goto get_irqchip_out;
4323 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4325 goto get_irqchip_out;
4327 if (copy_to_user(argp, chip, sizeof *chip))
4328 goto get_irqchip_out;
4334 case KVM_SET_IRQCHIP: {
4335 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4336 struct kvm_irqchip *chip;
4338 chip = memdup_user(argp, sizeof(*chip));
4345 if (!irqchip_kernel(kvm))
4346 goto set_irqchip_out;
4347 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4349 goto set_irqchip_out;
4357 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4360 if (!kvm->arch.vpit)
4362 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4366 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4373 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4376 if (!kvm->arch.vpit)
4378 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4381 case KVM_GET_PIT2: {
4383 if (!kvm->arch.vpit)
4385 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4389 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4394 case KVM_SET_PIT2: {
4396 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4399 if (!kvm->arch.vpit)
4401 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4404 case KVM_REINJECT_CONTROL: {
4405 struct kvm_reinject_control control;
4407 if (copy_from_user(&control, argp, sizeof(control)))
4409 r = kvm_vm_ioctl_reinject(kvm, &control);
4412 case KVM_SET_BOOT_CPU_ID:
4414 mutex_lock(&kvm->lock);
4415 if (kvm->created_vcpus)
4418 kvm->arch.bsp_vcpu_id = arg;
4419 mutex_unlock(&kvm->lock);
4421 case KVM_XEN_HVM_CONFIG: {
4422 struct kvm_xen_hvm_config xhc;
4424 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4429 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4433 case KVM_SET_CLOCK: {
4434 struct kvm_clock_data user_ns;
4438 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4447 * TODO: userspace has to take care of races with VCPU_RUN, so
4448 * kvm_gen_update_masterclock() can be cut down to locked
4449 * pvclock_update_vm_gtod_copy().
4451 kvm_gen_update_masterclock(kvm);
4452 now_ns = get_kvmclock_ns(kvm);
4453 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4454 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4457 case KVM_GET_CLOCK: {
4458 struct kvm_clock_data user_ns;
4461 now_ns = get_kvmclock_ns(kvm);
4462 user_ns.clock = now_ns;
4463 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4464 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4467 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4472 case KVM_ENABLE_CAP: {
4473 struct kvm_enable_cap cap;
4476 if (copy_from_user(&cap, argp, sizeof(cap)))
4478 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4481 case KVM_MEMORY_ENCRYPT_OP: {
4483 if (kvm_x86_ops->mem_enc_op)
4484 r = kvm_x86_ops->mem_enc_op(kvm, argp);
4487 case KVM_MEMORY_ENCRYPT_REG_REGION: {
4488 struct kvm_enc_region region;
4491 if (copy_from_user(®ion, argp, sizeof(region)))
4495 if (kvm_x86_ops->mem_enc_reg_region)
4496 r = kvm_x86_ops->mem_enc_reg_region(kvm, ®ion);
4499 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4500 struct kvm_enc_region region;
4503 if (copy_from_user(®ion, argp, sizeof(region)))
4507 if (kvm_x86_ops->mem_enc_unreg_region)
4508 r = kvm_x86_ops->mem_enc_unreg_region(kvm, ®ion);
4511 case KVM_HYPERV_EVENTFD: {
4512 struct kvm_hyperv_eventfd hvevfd;
4515 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4517 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4527 static void kvm_init_msr_list(void)
4532 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4533 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4537 * Even MSRs that are valid in the host may not be exposed
4538 * to the guests in some cases.
4540 switch (msrs_to_save[i]) {
4541 case MSR_IA32_BNDCFGS:
4542 if (!kvm_x86_ops->mpx_supported())
4546 if (!kvm_x86_ops->rdtscp_supported())
4554 msrs_to_save[j] = msrs_to_save[i];
4557 num_msrs_to_save = j;
4559 for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4560 switch (emulated_msrs[i]) {
4561 case MSR_IA32_SMBASE:
4562 if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4570 emulated_msrs[j] = emulated_msrs[i];
4573 num_emulated_msrs = j;
4575 for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4576 struct kvm_msr_entry msr;
4578 msr.index = msr_based_features[i];
4579 if (kvm_get_msr_feature(&msr))
4583 msr_based_features[j] = msr_based_features[i];
4586 num_msr_based_features = j;
4589 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4597 if (!(lapic_in_kernel(vcpu) &&
4598 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4599 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4610 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4617 if (!(lapic_in_kernel(vcpu) &&
4618 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4620 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4622 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4632 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4633 struct kvm_segment *var, int seg)
4635 kvm_x86_ops->set_segment(vcpu, var, seg);
4638 void kvm_get_segment(struct kvm_vcpu *vcpu,
4639 struct kvm_segment *var, int seg)
4641 kvm_x86_ops->get_segment(vcpu, var, seg);
4644 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4645 struct x86_exception *exception)
4649 BUG_ON(!mmu_is_nested(vcpu));
4651 /* NPT walks are always user-walks */
4652 access |= PFERR_USER_MASK;
4653 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4658 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4659 struct x86_exception *exception)
4661 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4662 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4665 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4666 struct x86_exception *exception)
4668 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4669 access |= PFERR_FETCH_MASK;
4670 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4673 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4674 struct x86_exception *exception)
4676 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4677 access |= PFERR_WRITE_MASK;
4678 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4681 /* uses this to access any guest's mapped memory without checking CPL */
4682 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4683 struct x86_exception *exception)
4685 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4688 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4689 struct kvm_vcpu *vcpu, u32 access,
4690 struct x86_exception *exception)
4693 int r = X86EMUL_CONTINUE;
4696 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4698 unsigned offset = addr & (PAGE_SIZE-1);
4699 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4702 if (gpa == UNMAPPED_GVA)
4703 return X86EMUL_PROPAGATE_FAULT;
4704 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4707 r = X86EMUL_IO_NEEDED;
4719 /* used for instruction fetching */
4720 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4721 gva_t addr, void *val, unsigned int bytes,
4722 struct x86_exception *exception)
4724 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4725 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4729 /* Inline kvm_read_guest_virt_helper for speed. */
4730 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4732 if (unlikely(gpa == UNMAPPED_GVA))
4733 return X86EMUL_PROPAGATE_FAULT;
4735 offset = addr & (PAGE_SIZE-1);
4736 if (WARN_ON(offset + bytes > PAGE_SIZE))
4737 bytes = (unsigned)PAGE_SIZE - offset;
4738 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4740 if (unlikely(ret < 0))
4741 return X86EMUL_IO_NEEDED;
4743 return X86EMUL_CONTINUE;
4746 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4747 gva_t addr, void *val, unsigned int bytes,
4748 struct x86_exception *exception)
4750 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4751 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4753 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4756 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4758 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4759 gva_t addr, void *val, unsigned int bytes,
4760 struct x86_exception *exception)
4762 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4763 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4766 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4767 unsigned long addr, void *val, unsigned int bytes)
4769 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4770 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4772 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4775 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4776 gva_t addr, void *val,
4778 struct x86_exception *exception)
4780 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4782 int r = X86EMUL_CONTINUE;
4785 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4788 unsigned offset = addr & (PAGE_SIZE-1);
4789 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4792 if (gpa == UNMAPPED_GVA)
4793 return X86EMUL_PROPAGATE_FAULT;
4794 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4796 r = X86EMUL_IO_NEEDED;
4807 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4809 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4810 gpa_t gpa, bool write)
4812 /* For APIC access vmexit */
4813 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4816 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4817 trace_vcpu_match_mmio(gva, gpa, write, true);
4824 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4825 gpa_t *gpa, struct x86_exception *exception,
4828 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4829 | (write ? PFERR_WRITE_MASK : 0);
4832 * currently PKRU is only applied to ept enabled guest so
4833 * there is no pkey in EPT page table for L1 guest or EPT
4834 * shadow page table for L2 guest.
4836 if (vcpu_match_mmio_gva(vcpu, gva)
4837 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4838 vcpu->arch.access, 0, access)) {
4839 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4840 (gva & (PAGE_SIZE - 1));
4841 trace_vcpu_match_mmio(gva, *gpa, write, false);
4845 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4847 if (*gpa == UNMAPPED_GVA)
4850 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4853 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4854 const void *val, int bytes)
4858 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4861 kvm_page_track_write(vcpu, gpa, val, bytes);
4865 struct read_write_emulator_ops {
4866 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4868 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4869 void *val, int bytes);
4870 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4871 int bytes, void *val);
4872 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4873 void *val, int bytes);
4877 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4879 if (vcpu->mmio_read_completed) {
4880 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4881 vcpu->mmio_fragments[0].gpa, val);
4882 vcpu->mmio_read_completed = 0;
4889 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4890 void *val, int bytes)
4892 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4895 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4896 void *val, int bytes)
4898 return emulator_write_phys(vcpu, gpa, val, bytes);
4901 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4903 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
4904 return vcpu_mmio_write(vcpu, gpa, bytes, val);
4907 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4908 void *val, int bytes)
4910 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
4911 return X86EMUL_IO_NEEDED;
4914 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4915 void *val, int bytes)
4917 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4919 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4920 return X86EMUL_CONTINUE;
4923 static const struct read_write_emulator_ops read_emultor = {
4924 .read_write_prepare = read_prepare,
4925 .read_write_emulate = read_emulate,
4926 .read_write_mmio = vcpu_mmio_read,
4927 .read_write_exit_mmio = read_exit_mmio,
4930 static const struct read_write_emulator_ops write_emultor = {
4931 .read_write_emulate = write_emulate,
4932 .read_write_mmio = write_mmio,
4933 .read_write_exit_mmio = write_exit_mmio,
4937 static int emulator_read_write_onepage(unsigned long addr, void *val,
4939 struct x86_exception *exception,
4940 struct kvm_vcpu *vcpu,
4941 const struct read_write_emulator_ops *ops)
4945 bool write = ops->write;
4946 struct kvm_mmio_fragment *frag;
4947 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4950 * If the exit was due to a NPF we may already have a GPA.
4951 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4952 * Note, this cannot be used on string operations since string
4953 * operation using rep will only have the initial GPA from the NPF
4956 if (vcpu->arch.gpa_available &&
4957 emulator_can_use_gpa(ctxt) &&
4958 (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
4959 gpa = vcpu->arch.gpa_val;
4960 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
4962 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4964 return X86EMUL_PROPAGATE_FAULT;
4967 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
4968 return X86EMUL_CONTINUE;
4971 * Is this MMIO handled locally?
4973 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4974 if (handled == bytes)
4975 return X86EMUL_CONTINUE;
4981 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4982 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4986 return X86EMUL_CONTINUE;
4989 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4991 void *val, unsigned int bytes,
4992 struct x86_exception *exception,
4993 const struct read_write_emulator_ops *ops)
4995 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4999 if (ops->read_write_prepare &&
5000 ops->read_write_prepare(vcpu, val, bytes))
5001 return X86EMUL_CONTINUE;
5003 vcpu->mmio_nr_fragments = 0;
5005 /* Crossing a page boundary? */
5006 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5009 now = -addr & ~PAGE_MASK;
5010 rc = emulator_read_write_onepage(addr, val, now, exception,
5013 if (rc != X86EMUL_CONTINUE)
5016 if (ctxt->mode != X86EMUL_MODE_PROT64)
5022 rc = emulator_read_write_onepage(addr, val, bytes, exception,
5024 if (rc != X86EMUL_CONTINUE)
5027 if (!vcpu->mmio_nr_fragments)
5030 gpa = vcpu->mmio_fragments[0].gpa;
5032 vcpu->mmio_needed = 1;
5033 vcpu->mmio_cur_fragment = 0;
5035 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5036 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5037 vcpu->run->exit_reason = KVM_EXIT_MMIO;
5038 vcpu->run->mmio.phys_addr = gpa;
5040 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5043 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5047 struct x86_exception *exception)
5049 return emulator_read_write(ctxt, addr, val, bytes,
5050 exception, &read_emultor);
5053 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5057 struct x86_exception *exception)
5059 return emulator_read_write(ctxt, addr, (void *)val, bytes,
5060 exception, &write_emultor);
5063 #define CMPXCHG_TYPE(t, ptr, old, new) \
5064 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5066 #ifdef CONFIG_X86_64
5067 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5069 # define CMPXCHG64(ptr, old, new) \
5070 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5073 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5078 struct x86_exception *exception)
5080 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5086 /* guests cmpxchg8b have to be emulated atomically */
5087 if (bytes > 8 || (bytes & (bytes - 1)))
5090 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5092 if (gpa == UNMAPPED_GVA ||
5093 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5096 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5099 page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5100 if (is_error_page(page))
5103 kaddr = kmap_atomic(page);
5104 kaddr += offset_in_page(gpa);
5107 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5110 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5113 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5116 exchanged = CMPXCHG64(kaddr, old, new);
5121 kunmap_atomic(kaddr);
5122 kvm_release_page_dirty(page);
5125 return X86EMUL_CMPXCHG_FAILED;
5127 kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5128 kvm_page_track_write(vcpu, gpa, new, bytes);
5130 return X86EMUL_CONTINUE;
5133 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5135 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5138 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5142 for (i = 0; i < vcpu->arch.pio.count; i++) {
5143 if (vcpu->arch.pio.in)
5144 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5145 vcpu->arch.pio.size, pd);
5147 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5148 vcpu->arch.pio.port, vcpu->arch.pio.size,
5152 pd += vcpu->arch.pio.size;
5157 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5158 unsigned short port, void *val,
5159 unsigned int count, bool in)
5161 vcpu->arch.pio.port = port;
5162 vcpu->arch.pio.in = in;
5163 vcpu->arch.pio.count = count;
5164 vcpu->arch.pio.size = size;
5166 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5167 vcpu->arch.pio.count = 0;
5171 vcpu->run->exit_reason = KVM_EXIT_IO;
5172 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5173 vcpu->run->io.size = size;
5174 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5175 vcpu->run->io.count = count;
5176 vcpu->run->io.port = port;
5181 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5182 int size, unsigned short port, void *val,
5185 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5188 if (vcpu->arch.pio.count)
5191 memset(vcpu->arch.pio_data, 0, size * count);
5193 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5196 memcpy(val, vcpu->arch.pio_data, size * count);
5197 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5198 vcpu->arch.pio.count = 0;
5205 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5206 int size, unsigned short port,
5207 const void *val, unsigned int count)
5209 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5211 memcpy(vcpu->arch.pio_data, val, size * count);
5212 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5213 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5216 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5218 return kvm_x86_ops->get_segment_base(vcpu, seg);
5221 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5223 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5226 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5228 if (!need_emulate_wbinvd(vcpu))
5229 return X86EMUL_CONTINUE;
5231 if (kvm_x86_ops->has_wbinvd_exit()) {
5232 int cpu = get_cpu();
5234 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5235 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5236 wbinvd_ipi, NULL, 1);
5238 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5241 return X86EMUL_CONTINUE;
5244 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5246 kvm_emulate_wbinvd_noskip(vcpu);
5247 return kvm_skip_emulated_instruction(vcpu);
5249 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5253 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5255 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5258 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5259 unsigned long *dest)
5261 return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5264 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5265 unsigned long value)
5268 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5271 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5273 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5276 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5278 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5279 unsigned long value;
5283 value = kvm_read_cr0(vcpu);
5286 value = vcpu->arch.cr2;
5289 value = kvm_read_cr3(vcpu);
5292 value = kvm_read_cr4(vcpu);
5295 value = kvm_get_cr8(vcpu);
5298 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5305 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5307 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5312 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5315 vcpu->arch.cr2 = val;
5318 res = kvm_set_cr3(vcpu, val);
5321 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5324 res = kvm_set_cr8(vcpu, val);
5327 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5334 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5336 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5339 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5341 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5344 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5346 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5349 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5351 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5354 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5356 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5359 static unsigned long emulator_get_cached_segment_base(
5360 struct x86_emulate_ctxt *ctxt, int seg)
5362 return get_segment_base(emul_to_vcpu(ctxt), seg);
5365 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5366 struct desc_struct *desc, u32 *base3,
5369 struct kvm_segment var;
5371 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5372 *selector = var.selector;
5375 memset(desc, 0, sizeof(*desc));
5383 set_desc_limit(desc, var.limit);
5384 set_desc_base(desc, (unsigned long)var.base);
5385 #ifdef CONFIG_X86_64
5387 *base3 = var.base >> 32;
5389 desc->type = var.type;
5391 desc->dpl = var.dpl;
5392 desc->p = var.present;
5393 desc->avl = var.avl;
5401 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5402 struct desc_struct *desc, u32 base3,
5405 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5406 struct kvm_segment var;
5408 var.selector = selector;
5409 var.base = get_desc_base(desc);
5410 #ifdef CONFIG_X86_64
5411 var.base |= ((u64)base3) << 32;
5413 var.limit = get_desc_limit(desc);
5415 var.limit = (var.limit << 12) | 0xfff;
5416 var.type = desc->type;
5417 var.dpl = desc->dpl;
5422 var.avl = desc->avl;
5423 var.present = desc->p;
5424 var.unusable = !var.present;
5427 kvm_set_segment(vcpu, &var, seg);
5431 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5432 u32 msr_index, u64 *pdata)
5434 struct msr_data msr;
5437 msr.index = msr_index;
5438 msr.host_initiated = false;
5439 r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5447 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5448 u32 msr_index, u64 data)
5450 struct msr_data msr;
5453 msr.index = msr_index;
5454 msr.host_initiated = false;
5455 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5458 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5460 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5462 return vcpu->arch.smbase;
5465 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5467 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5469 vcpu->arch.smbase = smbase;
5472 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5475 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5478 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5479 u32 pmc, u64 *pdata)
5481 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5484 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5486 emul_to_vcpu(ctxt)->arch.halt_request = 1;
5489 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5490 struct x86_instruction_info *info,
5491 enum x86_intercept_stage stage)
5493 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5496 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5497 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5499 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5502 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5504 return kvm_register_read(emul_to_vcpu(ctxt), reg);
5507 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5509 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5512 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5514 kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5517 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5519 return emul_to_vcpu(ctxt)->arch.hflags;
5522 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5524 kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5527 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5529 return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5532 static const struct x86_emulate_ops emulate_ops = {
5533 .read_gpr = emulator_read_gpr,
5534 .write_gpr = emulator_write_gpr,
5535 .read_std = kvm_read_guest_virt_system,
5536 .write_std = kvm_write_guest_virt_system,
5537 .read_phys = kvm_read_guest_phys_system,
5538 .fetch = kvm_fetch_guest_virt,
5539 .read_emulated = emulator_read_emulated,
5540 .write_emulated = emulator_write_emulated,
5541 .cmpxchg_emulated = emulator_cmpxchg_emulated,
5542 .invlpg = emulator_invlpg,
5543 .pio_in_emulated = emulator_pio_in_emulated,
5544 .pio_out_emulated = emulator_pio_out_emulated,
5545 .get_segment = emulator_get_segment,
5546 .set_segment = emulator_set_segment,
5547 .get_cached_segment_base = emulator_get_cached_segment_base,
5548 .get_gdt = emulator_get_gdt,
5549 .get_idt = emulator_get_idt,
5550 .set_gdt = emulator_set_gdt,
5551 .set_idt = emulator_set_idt,
5552 .get_cr = emulator_get_cr,
5553 .set_cr = emulator_set_cr,
5554 .cpl = emulator_get_cpl,
5555 .get_dr = emulator_get_dr,
5556 .set_dr = emulator_set_dr,
5557 .get_smbase = emulator_get_smbase,
5558 .set_smbase = emulator_set_smbase,
5559 .set_msr = emulator_set_msr,
5560 .get_msr = emulator_get_msr,
5561 .check_pmc = emulator_check_pmc,
5562 .read_pmc = emulator_read_pmc,
5563 .halt = emulator_halt,
5564 .wbinvd = emulator_wbinvd,
5565 .fix_hypercall = emulator_fix_hypercall,
5566 .intercept = emulator_intercept,
5567 .get_cpuid = emulator_get_cpuid,
5568 .set_nmi_mask = emulator_set_nmi_mask,
5569 .get_hflags = emulator_get_hflags,
5570 .set_hflags = emulator_set_hflags,
5571 .pre_leave_smm = emulator_pre_leave_smm,
5574 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5576 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5578 * an sti; sti; sequence only disable interrupts for the first
5579 * instruction. So, if the last instruction, be it emulated or
5580 * not, left the system with the INT_STI flag enabled, it
5581 * means that the last instruction is an sti. We should not
5582 * leave the flag on in this case. The same goes for mov ss
5584 if (int_shadow & mask)
5586 if (unlikely(int_shadow || mask)) {
5587 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5589 kvm_make_request(KVM_REQ_EVENT, vcpu);
5593 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5595 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5596 if (ctxt->exception.vector == PF_VECTOR)
5597 return kvm_propagate_fault(vcpu, &ctxt->exception);
5599 if (ctxt->exception.error_code_valid)
5600 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5601 ctxt->exception.error_code);
5603 kvm_queue_exception(vcpu, ctxt->exception.vector);
5607 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5609 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5612 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5614 ctxt->eflags = kvm_get_rflags(vcpu);
5615 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5617 ctxt->eip = kvm_rip_read(vcpu);
5618 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5619 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
5620 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
5621 cs_db ? X86EMUL_MODE_PROT32 :
5622 X86EMUL_MODE_PROT16;
5623 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5624 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5625 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5627 init_decode_cache(ctxt);
5628 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5631 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5633 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5636 init_emulate_ctxt(vcpu);
5640 ctxt->_eip = ctxt->eip + inc_eip;
5641 ret = emulate_int_real(ctxt, irq);
5643 if (ret != X86EMUL_CONTINUE)
5644 return EMULATE_FAIL;
5646 ctxt->eip = ctxt->_eip;
5647 kvm_rip_write(vcpu, ctxt->eip);
5648 kvm_set_rflags(vcpu, ctxt->eflags);
5650 if (irq == NMI_VECTOR)
5651 vcpu->arch.nmi_pending = 0;
5653 vcpu->arch.interrupt.pending = false;
5655 return EMULATE_DONE;
5657 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5659 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5661 int r = EMULATE_DONE;
5663 ++vcpu->stat.insn_emulation_fail;
5664 trace_kvm_emulate_insn_failed(vcpu);
5665 if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5666 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5667 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5668 vcpu->run->internal.ndata = 0;
5669 r = EMULATE_USER_EXIT;
5671 kvm_queue_exception(vcpu, UD_VECTOR);
5676 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5677 bool write_fault_to_shadow_pgtable,
5683 if (emulation_type & EMULTYPE_NO_REEXECUTE)
5686 if (!vcpu->arch.mmu.direct_map) {
5688 * Write permission should be allowed since only
5689 * write access need to be emulated.
5691 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5694 * If the mapping is invalid in guest, let cpu retry
5695 * it to generate fault.
5697 if (gpa == UNMAPPED_GVA)
5702 * Do not retry the unhandleable instruction if it faults on the
5703 * readonly host memory, otherwise it will goto a infinite loop:
5704 * retry instruction -> write #PF -> emulation fail -> retry
5705 * instruction -> ...
5707 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5710 * If the instruction failed on the error pfn, it can not be fixed,
5711 * report the error to userspace.
5713 if (is_error_noslot_pfn(pfn))
5716 kvm_release_pfn_clean(pfn);
5718 /* The instructions are well-emulated on direct mmu. */
5719 if (vcpu->arch.mmu.direct_map) {
5720 unsigned int indirect_shadow_pages;
5722 spin_lock(&vcpu->kvm->mmu_lock);
5723 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5724 spin_unlock(&vcpu->kvm->mmu_lock);
5726 if (indirect_shadow_pages)
5727 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5733 * if emulation was due to access to shadowed page table
5734 * and it failed try to unshadow page and re-enter the
5735 * guest to let CPU execute the instruction.
5737 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5740 * If the access faults on its page table, it can not
5741 * be fixed by unprotecting shadow page and it should
5742 * be reported to userspace.
5744 return !write_fault_to_shadow_pgtable;
5747 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5748 unsigned long cr2, int emulation_type)
5750 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5751 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5753 last_retry_eip = vcpu->arch.last_retry_eip;
5754 last_retry_addr = vcpu->arch.last_retry_addr;
5757 * If the emulation is caused by #PF and it is non-page_table
5758 * writing instruction, it means the VM-EXIT is caused by shadow
5759 * page protected, we can zap the shadow page and retry this
5760 * instruction directly.
5762 * Note: if the guest uses a non-page-table modifying instruction
5763 * on the PDE that points to the instruction, then we will unmap
5764 * the instruction and go to an infinite loop. So, we cache the
5765 * last retried eip and the last fault address, if we meet the eip
5766 * and the address again, we can break out of the potential infinite
5769 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5771 if (!(emulation_type & EMULTYPE_RETRY))
5774 if (x86_page_table_writing_insn(ctxt))
5777 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5780 vcpu->arch.last_retry_eip = ctxt->eip;
5781 vcpu->arch.last_retry_addr = cr2;
5783 if (!vcpu->arch.mmu.direct_map)
5784 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5786 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5791 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5792 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5794 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5796 if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5797 /* This is a good place to trace that we are exiting SMM. */
5798 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5800 /* Process a latched INIT or SMI, if any. */
5801 kvm_make_request(KVM_REQ_EVENT, vcpu);
5804 kvm_mmu_reset_context(vcpu);
5807 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5809 unsigned changed = vcpu->arch.hflags ^ emul_flags;
5811 vcpu->arch.hflags = emul_flags;
5813 if (changed & HF_SMM_MASK)
5814 kvm_smm_changed(vcpu);
5817 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5826 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5827 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5832 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5834 struct kvm_run *kvm_run = vcpu->run;
5836 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5837 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5838 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5839 kvm_run->debug.arch.exception = DB_VECTOR;
5840 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5841 *r = EMULATE_USER_EXIT;
5844 * "Certain debug exceptions may clear bit 0-3. The
5845 * remaining contents of the DR6 register are never
5846 * cleared by the processor".
5848 vcpu->arch.dr6 &= ~15;
5849 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5850 kvm_queue_exception(vcpu, DB_VECTOR);
5854 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5856 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5857 int r = EMULATE_DONE;
5859 kvm_x86_ops->skip_emulated_instruction(vcpu);
5862 * rflags is the old, "raw" value of the flags. The new value has
5863 * not been saved yet.
5865 * This is correct even for TF set by the guest, because "the
5866 * processor will not generate this exception after the instruction
5867 * that sets the TF flag".
5869 if (unlikely(rflags & X86_EFLAGS_TF))
5870 kvm_vcpu_do_singlestep(vcpu, &r);
5871 return r == EMULATE_DONE;
5873 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5875 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5877 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5878 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5879 struct kvm_run *kvm_run = vcpu->run;
5880 unsigned long eip = kvm_get_linear_rip(vcpu);
5881 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5882 vcpu->arch.guest_debug_dr7,
5886 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5887 kvm_run->debug.arch.pc = eip;
5888 kvm_run->debug.arch.exception = DB_VECTOR;
5889 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5890 *r = EMULATE_USER_EXIT;
5895 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5896 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5897 unsigned long eip = kvm_get_linear_rip(vcpu);
5898 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5903 vcpu->arch.dr6 &= ~15;
5904 vcpu->arch.dr6 |= dr6 | DR6_RTM;
5905 kvm_queue_exception(vcpu, DB_VECTOR);
5914 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5921 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5922 bool writeback = true;
5923 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5926 * Clear write_fault_to_shadow_pgtable here to ensure it is
5929 vcpu->arch.write_fault_to_shadow_pgtable = false;
5930 kvm_clear_exception_queue(vcpu);
5932 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5933 init_emulate_ctxt(vcpu);
5936 * We will reenter on the same instruction since
5937 * we do not set complete_userspace_io. This does not
5938 * handle watchpoints yet, those would be handled in
5941 if (!(emulation_type & EMULTYPE_SKIP) &&
5942 kvm_vcpu_check_breakpoint(vcpu, &r))
5945 ctxt->interruptibility = 0;
5946 ctxt->have_exception = false;
5947 ctxt->exception.vector = -1;
5948 ctxt->perm_ok = false;
5950 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5952 r = x86_decode_insn(ctxt, insn, insn_len);
5954 trace_kvm_emulate_insn_start(vcpu);
5955 ++vcpu->stat.insn_emulation;
5956 if (r != EMULATION_OK) {
5957 if (emulation_type & EMULTYPE_TRAP_UD)
5958 return EMULATE_FAIL;
5959 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5961 return EMULATE_DONE;
5962 if (ctxt->have_exception && inject_emulated_exception(vcpu))
5963 return EMULATE_DONE;
5964 if (emulation_type & EMULTYPE_SKIP)
5965 return EMULATE_FAIL;
5966 return handle_emulation_failure(vcpu);
5970 if (emulation_type & EMULTYPE_SKIP) {
5971 kvm_rip_write(vcpu, ctxt->_eip);
5972 if (ctxt->eflags & X86_EFLAGS_RF)
5973 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5974 return EMULATE_DONE;
5977 if (retry_instruction(ctxt, cr2, emulation_type))
5978 return EMULATE_DONE;
5980 /* this is needed for vmware backdoor interface to work since it
5981 changes registers values during IO operation */
5982 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5983 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5984 emulator_invalidate_register_cache(ctxt);
5988 /* Save the faulting GPA (cr2) in the address field */
5989 ctxt->exception.address = cr2;
5991 r = x86_emulate_insn(ctxt);
5993 if (r == EMULATION_INTERCEPTED)
5994 return EMULATE_DONE;
5996 if (r == EMULATION_FAILED) {
5997 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5999 return EMULATE_DONE;
6001 return handle_emulation_failure(vcpu);
6004 if (ctxt->have_exception) {
6006 if (inject_emulated_exception(vcpu))
6008 } else if (vcpu->arch.pio.count) {
6009 if (!vcpu->arch.pio.in) {
6010 /* FIXME: return into emulator if single-stepping. */
6011 vcpu->arch.pio.count = 0;
6014 vcpu->arch.complete_userspace_io = complete_emulated_pio;
6016 r = EMULATE_USER_EXIT;
6017 } else if (vcpu->mmio_needed) {
6018 if (!vcpu->mmio_is_write)
6020 r = EMULATE_USER_EXIT;
6021 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6022 } else if (r == EMULATION_RESTART)
6028 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6029 toggle_interruptibility(vcpu, ctxt->interruptibility);
6030 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6031 kvm_rip_write(vcpu, ctxt->eip);
6032 if (r == EMULATE_DONE &&
6033 (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6034 kvm_vcpu_do_singlestep(vcpu, &r);
6035 if (!ctxt->have_exception ||
6036 exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6037 __kvm_set_rflags(vcpu, ctxt->eflags);
6040 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6041 * do nothing, and it will be requested again as soon as
6042 * the shadow expires. But we still need to check here,
6043 * because POPF has no interrupt shadow.
6045 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6046 kvm_make_request(KVM_REQ_EVENT, vcpu);
6048 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6052 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
6054 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
6056 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6057 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6058 size, port, &val, 1);
6059 /* do not return to emulator after return from userspace */
6060 vcpu->arch.pio.count = 0;
6063 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
6065 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6069 /* We should only ever be called with arch.pio.count equal to 1 */
6070 BUG_ON(vcpu->arch.pio.count != 1);
6072 /* For size less than 4 we merge, else we zero extend */
6073 val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6077 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6078 * the copy and tracing
6080 emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6081 vcpu->arch.pio.port, &val, 1);
6082 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6087 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
6092 /* For size less than 4 we merge, else we zero extend */
6093 val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6095 ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6098 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6102 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6106 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
6108 static int kvmclock_cpu_down_prep(unsigned int cpu)
6110 __this_cpu_write(cpu_tsc_khz, 0);
6114 static void tsc_khz_changed(void *data)
6116 struct cpufreq_freqs *freq = data;
6117 unsigned long khz = 0;
6121 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6122 khz = cpufreq_quick_get(raw_smp_processor_id());
6125 __this_cpu_write(cpu_tsc_khz, khz);
6128 #ifdef CONFIG_X86_64
6129 static void kvm_hyperv_tsc_notifier(void)
6132 struct kvm_vcpu *vcpu;
6135 spin_lock(&kvm_lock);
6136 list_for_each_entry(kvm, &vm_list, vm_list)
6137 kvm_make_mclock_inprogress_request(kvm);
6139 hyperv_stop_tsc_emulation();
6141 /* TSC frequency always matches when on Hyper-V */
6142 for_each_present_cpu(cpu)
6143 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6144 kvm_max_guest_tsc_khz = tsc_khz;
6146 list_for_each_entry(kvm, &vm_list, vm_list) {
6147 struct kvm_arch *ka = &kvm->arch;
6149 spin_lock(&ka->pvclock_gtod_sync_lock);
6151 pvclock_update_vm_gtod_copy(kvm);
6153 kvm_for_each_vcpu(cpu, vcpu, kvm)
6154 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6156 kvm_for_each_vcpu(cpu, vcpu, kvm)
6157 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6159 spin_unlock(&ka->pvclock_gtod_sync_lock);
6161 spin_unlock(&kvm_lock);
6165 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6168 struct cpufreq_freqs *freq = data;
6170 struct kvm_vcpu *vcpu;
6171 int i, send_ipi = 0;
6174 * We allow guests to temporarily run on slowing clocks,
6175 * provided we notify them after, or to run on accelerating
6176 * clocks, provided we notify them before. Thus time never
6179 * However, we have a problem. We can't atomically update
6180 * the frequency of a given CPU from this function; it is
6181 * merely a notifier, which can be called from any CPU.
6182 * Changing the TSC frequency at arbitrary points in time
6183 * requires a recomputation of local variables related to
6184 * the TSC for each VCPU. We must flag these local variables
6185 * to be updated and be sure the update takes place with the
6186 * new frequency before any guests proceed.
6188 * Unfortunately, the combination of hotplug CPU and frequency
6189 * change creates an intractable locking scenario; the order
6190 * of when these callouts happen is undefined with respect to
6191 * CPU hotplug, and they can race with each other. As such,
6192 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6193 * undefined; you can actually have a CPU frequency change take
6194 * place in between the computation of X and the setting of the
6195 * variable. To protect against this problem, all updates of
6196 * the per_cpu tsc_khz variable are done in an interrupt
6197 * protected IPI, and all callers wishing to update the value
6198 * must wait for a synchronous IPI to complete (which is trivial
6199 * if the caller is on the CPU already). This establishes the
6200 * necessary total order on variable updates.
6202 * Note that because a guest time update may take place
6203 * anytime after the setting of the VCPU's request bit, the
6204 * correct TSC value must be set before the request. However,
6205 * to ensure the update actually makes it to any guest which
6206 * starts running in hardware virtualization between the set
6207 * and the acquisition of the spinlock, we must also ping the
6208 * CPU after setting the request bit.
6212 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6214 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6217 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6219 spin_lock(&kvm_lock);
6220 list_for_each_entry(kvm, &vm_list, vm_list) {
6221 kvm_for_each_vcpu(i, vcpu, kvm) {
6222 if (vcpu->cpu != freq->cpu)
6224 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6225 if (vcpu->cpu != smp_processor_id())
6229 spin_unlock(&kvm_lock);
6231 if (freq->old < freq->new && send_ipi) {
6233 * We upscale the frequency. Must make the guest
6234 * doesn't see old kvmclock values while running with
6235 * the new frequency, otherwise we risk the guest sees
6236 * time go backwards.
6238 * In case we update the frequency for another cpu
6239 * (which might be in guest context) send an interrupt
6240 * to kick the cpu out of guest context. Next time
6241 * guest context is entered kvmclock will be updated,
6242 * so the guest will not see stale values.
6244 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6249 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6250 .notifier_call = kvmclock_cpufreq_notifier
6253 static int kvmclock_cpu_online(unsigned int cpu)
6255 tsc_khz_changed(NULL);
6259 static void kvm_timer_init(void)
6261 max_tsc_khz = tsc_khz;
6263 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6264 #ifdef CONFIG_CPU_FREQ
6265 struct cpufreq_policy policy;
6268 memset(&policy, 0, sizeof(policy));
6270 cpufreq_get_policy(&policy, cpu);
6271 if (policy.cpuinfo.max_freq)
6272 max_tsc_khz = policy.cpuinfo.max_freq;
6275 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6276 CPUFREQ_TRANSITION_NOTIFIER);
6278 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6280 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6281 kvmclock_cpu_online, kvmclock_cpu_down_prep);
6284 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6286 int kvm_is_in_guest(void)
6288 return __this_cpu_read(current_vcpu) != NULL;
6291 static int kvm_is_user_mode(void)
6295 if (__this_cpu_read(current_vcpu))
6296 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6298 return user_mode != 0;
6301 static unsigned long kvm_get_guest_ip(void)
6303 unsigned long ip = 0;
6305 if (__this_cpu_read(current_vcpu))
6306 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6311 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6312 .is_in_guest = kvm_is_in_guest,
6313 .is_user_mode = kvm_is_user_mode,
6314 .get_guest_ip = kvm_get_guest_ip,
6317 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
6319 __this_cpu_write(current_vcpu, vcpu);
6321 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
6323 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6325 __this_cpu_write(current_vcpu, NULL);
6327 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6329 static void kvm_set_mmio_spte_mask(void)
6332 int maxphyaddr = boot_cpu_data.x86_phys_bits;
6335 * Set the reserved bits and the present bit of an paging-structure
6336 * entry to generate page fault with PFER.RSV = 1.
6338 /* Mask the reserved physical address bits. */
6339 mask = rsvd_bits(maxphyaddr, 51);
6341 /* Set the present bit. */
6344 #ifdef CONFIG_X86_64
6346 * If reserved bit is not supported, clear the present bit to disable
6349 if (maxphyaddr == 52)
6353 kvm_mmu_set_mmio_spte_mask(mask, mask);
6356 #ifdef CONFIG_X86_64
6357 static void pvclock_gtod_update_fn(struct work_struct *work)
6361 struct kvm_vcpu *vcpu;
6364 spin_lock(&kvm_lock);
6365 list_for_each_entry(kvm, &vm_list, vm_list)
6366 kvm_for_each_vcpu(i, vcpu, kvm)
6367 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6368 atomic_set(&kvm_guest_has_master_clock, 0);
6369 spin_unlock(&kvm_lock);
6372 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6375 * Notification about pvclock gtod data update.
6377 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6380 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6381 struct timekeeper *tk = priv;
6383 update_pvclock_gtod(tk);
6385 /* disable master clock if host does not trust, or does not
6386 * use, TSC based clocksource.
6388 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6389 atomic_read(&kvm_guest_has_master_clock) != 0)
6390 queue_work(system_long_wq, &pvclock_gtod_work);
6395 static struct notifier_block pvclock_gtod_notifier = {
6396 .notifier_call = pvclock_gtod_notify,
6400 int kvm_arch_init(void *opaque)
6403 struct kvm_x86_ops *ops = opaque;
6406 printk(KERN_ERR "kvm: already loaded the other module\n");
6411 if (!ops->cpu_has_kvm_support()) {
6412 printk(KERN_ERR "kvm: no hardware support\n");
6416 if (ops->disabled_by_bios()) {
6417 printk(KERN_ERR "kvm: disabled by bios\n");
6423 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6425 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6429 r = kvm_mmu_module_init();
6431 goto out_free_percpu;
6433 kvm_set_mmio_spte_mask();
6437 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6438 PT_DIRTY_MASK, PT64_NX_MASK, 0,
6439 PT_PRESENT_MASK, 0, sme_me_mask);
6442 perf_register_guest_info_callbacks(&kvm_guest_cbs);
6444 if (boot_cpu_has(X86_FEATURE_XSAVE))
6445 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6448 #ifdef CONFIG_X86_64
6449 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6451 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6452 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6458 free_percpu(shared_msrs);
6463 void kvm_arch_exit(void)
6465 #ifdef CONFIG_X86_64
6466 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6467 clear_hv_tscchange_cb();
6470 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6472 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6473 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6474 CPUFREQ_TRANSITION_NOTIFIER);
6475 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6476 #ifdef CONFIG_X86_64
6477 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6480 kvm_mmu_module_exit();
6481 free_percpu(shared_msrs);
6484 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6486 ++vcpu->stat.halt_exits;
6487 if (lapic_in_kernel(vcpu)) {
6488 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6491 vcpu->run->exit_reason = KVM_EXIT_HLT;
6495 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6497 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6499 int ret = kvm_skip_emulated_instruction(vcpu);
6501 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6502 * KVM_EXIT_DEBUG here.
6504 return kvm_vcpu_halt(vcpu) && ret;
6506 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6508 #ifdef CONFIG_X86_64
6509 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6510 unsigned long clock_type)
6512 struct kvm_clock_pairing clock_pairing;
6517 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6518 return -KVM_EOPNOTSUPP;
6520 if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6521 return -KVM_EOPNOTSUPP;
6523 clock_pairing.sec = ts.tv_sec;
6524 clock_pairing.nsec = ts.tv_nsec;
6525 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6526 clock_pairing.flags = 0;
6529 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6530 sizeof(struct kvm_clock_pairing)))
6538 * kvm_pv_kick_cpu_op: Kick a vcpu.
6540 * @apicid - apicid of vcpu to be kicked.
6542 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6544 struct kvm_lapic_irq lapic_irq;
6546 lapic_irq.shorthand = 0;
6547 lapic_irq.dest_mode = 0;
6548 lapic_irq.level = 0;
6549 lapic_irq.dest_id = apicid;
6550 lapic_irq.msi_redir_hint = false;
6552 lapic_irq.delivery_mode = APIC_DM_REMRD;
6553 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6556 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6558 vcpu->arch.apicv_active = false;
6559 kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6562 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6564 unsigned long nr, a0, a1, a2, a3, ret;
6567 r = kvm_skip_emulated_instruction(vcpu);
6569 if (kvm_hv_hypercall_enabled(vcpu->kvm))
6570 return kvm_hv_hypercall(vcpu);
6572 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6573 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6574 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6575 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6576 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6578 trace_kvm_hypercall(nr, a0, a1, a2, a3);
6580 op_64_bit = is_64_bit_mode(vcpu);
6589 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6595 case KVM_HC_VAPIC_POLL_IRQ:
6598 case KVM_HC_KICK_CPU:
6599 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6602 #ifdef CONFIG_X86_64
6603 case KVM_HC_CLOCK_PAIRING:
6604 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6614 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6615 ++vcpu->stat.hypercalls;
6618 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6620 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6622 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6623 char instruction[3];
6624 unsigned long rip = kvm_rip_read(vcpu);
6626 kvm_x86_ops->patch_hypercall(vcpu, instruction);
6628 return emulator_write_emulated(ctxt, rip, instruction, 3,
6632 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6634 return vcpu->run->request_interrupt_window &&
6635 likely(!pic_in_kernel(vcpu->kvm));
6638 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6640 struct kvm_run *kvm_run = vcpu->run;
6642 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6643 kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6644 kvm_run->cr8 = kvm_get_cr8(vcpu);
6645 kvm_run->apic_base = kvm_get_apic_base(vcpu);
6646 kvm_run->ready_for_interrupt_injection =
6647 pic_in_kernel(vcpu->kvm) ||
6648 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6651 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6655 if (!kvm_x86_ops->update_cr8_intercept)
6658 if (!lapic_in_kernel(vcpu))
6661 if (vcpu->arch.apicv_active)
6664 if (!vcpu->arch.apic->vapic_addr)
6665 max_irr = kvm_lapic_find_highest_irr(vcpu);
6672 tpr = kvm_lapic_get_cr8(vcpu);
6674 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6677 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6681 /* try to reinject previous events if any */
6682 if (vcpu->arch.exception.injected) {
6683 kvm_x86_ops->queue_exception(vcpu);
6688 * Exceptions must be injected immediately, or the exception
6689 * frame will have the address of the NMI or interrupt handler.
6691 if (!vcpu->arch.exception.pending) {
6692 if (vcpu->arch.nmi_injected) {
6693 kvm_x86_ops->set_nmi(vcpu);
6697 if (vcpu->arch.interrupt.pending) {
6698 kvm_x86_ops->set_irq(vcpu);
6703 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6704 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6709 /* try to inject new event if pending */
6710 if (vcpu->arch.exception.pending) {
6711 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6712 vcpu->arch.exception.has_error_code,
6713 vcpu->arch.exception.error_code);
6715 vcpu->arch.exception.pending = false;
6716 vcpu->arch.exception.injected = true;
6718 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6719 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6722 if (vcpu->arch.exception.nr == DB_VECTOR &&
6723 (vcpu->arch.dr7 & DR7_GD)) {
6724 vcpu->arch.dr7 &= ~DR7_GD;
6725 kvm_update_dr7(vcpu);
6728 kvm_x86_ops->queue_exception(vcpu);
6729 } else if (vcpu->arch.smi_pending && !is_smm(vcpu) && kvm_x86_ops->smi_allowed(vcpu)) {
6730 vcpu->arch.smi_pending = false;
6731 ++vcpu->arch.smi_count;
6733 } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6734 --vcpu->arch.nmi_pending;
6735 vcpu->arch.nmi_injected = true;
6736 kvm_x86_ops->set_nmi(vcpu);
6737 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6739 * Because interrupts can be injected asynchronously, we are
6740 * calling check_nested_events again here to avoid a race condition.
6741 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6742 * proposal and current concerns. Perhaps we should be setting
6743 * KVM_REQ_EVENT only on certain events and not unconditionally?
6745 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6746 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6750 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6751 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6753 kvm_x86_ops->set_irq(vcpu);
6760 static void process_nmi(struct kvm_vcpu *vcpu)
6765 * x86 is limited to one NMI running, and one NMI pending after it.
6766 * If an NMI is already in progress, limit further NMIs to just one.
6767 * Otherwise, allow two (and we'll inject the first one immediately).
6769 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6772 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6773 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6774 kvm_make_request(KVM_REQ_EVENT, vcpu);
6777 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6780 flags |= seg->g << 23;
6781 flags |= seg->db << 22;
6782 flags |= seg->l << 21;
6783 flags |= seg->avl << 20;
6784 flags |= seg->present << 15;
6785 flags |= seg->dpl << 13;
6786 flags |= seg->s << 12;
6787 flags |= seg->type << 8;
6791 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6793 struct kvm_segment seg;
6796 kvm_get_segment(vcpu, &seg, n);
6797 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6800 offset = 0x7f84 + n * 12;
6802 offset = 0x7f2c + (n - 3) * 12;
6804 put_smstate(u32, buf, offset + 8, seg.base);
6805 put_smstate(u32, buf, offset + 4, seg.limit);
6806 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6809 #ifdef CONFIG_X86_64
6810 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6812 struct kvm_segment seg;
6816 kvm_get_segment(vcpu, &seg, n);
6817 offset = 0x7e00 + n * 16;
6819 flags = enter_smm_get_segment_flags(&seg) >> 8;
6820 put_smstate(u16, buf, offset, seg.selector);
6821 put_smstate(u16, buf, offset + 2, flags);
6822 put_smstate(u32, buf, offset + 4, seg.limit);
6823 put_smstate(u64, buf, offset + 8, seg.base);
6827 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6830 struct kvm_segment seg;
6834 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6835 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6836 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6837 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6839 for (i = 0; i < 8; i++)
6840 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6842 kvm_get_dr(vcpu, 6, &val);
6843 put_smstate(u32, buf, 0x7fcc, (u32)val);
6844 kvm_get_dr(vcpu, 7, &val);
6845 put_smstate(u32, buf, 0x7fc8, (u32)val);
6847 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6848 put_smstate(u32, buf, 0x7fc4, seg.selector);
6849 put_smstate(u32, buf, 0x7f64, seg.base);
6850 put_smstate(u32, buf, 0x7f60, seg.limit);
6851 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6853 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6854 put_smstate(u32, buf, 0x7fc0, seg.selector);
6855 put_smstate(u32, buf, 0x7f80, seg.base);
6856 put_smstate(u32, buf, 0x7f7c, seg.limit);
6857 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6859 kvm_x86_ops->get_gdt(vcpu, &dt);
6860 put_smstate(u32, buf, 0x7f74, dt.address);
6861 put_smstate(u32, buf, 0x7f70, dt.size);
6863 kvm_x86_ops->get_idt(vcpu, &dt);
6864 put_smstate(u32, buf, 0x7f58, dt.address);
6865 put_smstate(u32, buf, 0x7f54, dt.size);
6867 for (i = 0; i < 6; i++)
6868 enter_smm_save_seg_32(vcpu, buf, i);
6870 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6873 put_smstate(u32, buf, 0x7efc, 0x00020000);
6874 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6877 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6879 #ifdef CONFIG_X86_64
6881 struct kvm_segment seg;
6885 for (i = 0; i < 16; i++)
6886 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6888 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6889 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6891 kvm_get_dr(vcpu, 6, &val);
6892 put_smstate(u64, buf, 0x7f68, val);
6893 kvm_get_dr(vcpu, 7, &val);
6894 put_smstate(u64, buf, 0x7f60, val);
6896 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6897 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6898 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6900 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6903 put_smstate(u32, buf, 0x7efc, 0x00020064);
6905 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6907 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6908 put_smstate(u16, buf, 0x7e90, seg.selector);
6909 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6910 put_smstate(u32, buf, 0x7e94, seg.limit);
6911 put_smstate(u64, buf, 0x7e98, seg.base);
6913 kvm_x86_ops->get_idt(vcpu, &dt);
6914 put_smstate(u32, buf, 0x7e84, dt.size);
6915 put_smstate(u64, buf, 0x7e88, dt.address);
6917 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6918 put_smstate(u16, buf, 0x7e70, seg.selector);
6919 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6920 put_smstate(u32, buf, 0x7e74, seg.limit);
6921 put_smstate(u64, buf, 0x7e78, seg.base);
6923 kvm_x86_ops->get_gdt(vcpu, &dt);
6924 put_smstate(u32, buf, 0x7e64, dt.size);
6925 put_smstate(u64, buf, 0x7e68, dt.address);
6927 for (i = 0; i < 6; i++)
6928 enter_smm_save_seg_64(vcpu, buf, i);
6934 static void enter_smm(struct kvm_vcpu *vcpu)
6936 struct kvm_segment cs, ds;
6941 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6942 memset(buf, 0, 512);
6943 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6944 enter_smm_save_state_64(vcpu, buf);
6946 enter_smm_save_state_32(vcpu, buf);
6949 * Give pre_enter_smm() a chance to make ISA-specific changes to the
6950 * vCPU state (e.g. leave guest mode) after we've saved the state into
6951 * the SMM state-save area.
6953 kvm_x86_ops->pre_enter_smm(vcpu, buf);
6955 vcpu->arch.hflags |= HF_SMM_MASK;
6956 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6958 if (kvm_x86_ops->get_nmi_mask(vcpu))
6959 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6961 kvm_x86_ops->set_nmi_mask(vcpu, true);
6963 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6964 kvm_rip_write(vcpu, 0x8000);
6966 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6967 kvm_x86_ops->set_cr0(vcpu, cr0);
6968 vcpu->arch.cr0 = cr0;
6970 kvm_x86_ops->set_cr4(vcpu, 0);
6972 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6973 dt.address = dt.size = 0;
6974 kvm_x86_ops->set_idt(vcpu, &dt);
6976 __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6978 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6979 cs.base = vcpu->arch.smbase;
6984 cs.limit = ds.limit = 0xffffffff;
6985 cs.type = ds.type = 0x3;
6986 cs.dpl = ds.dpl = 0;
6991 cs.avl = ds.avl = 0;
6992 cs.present = ds.present = 1;
6993 cs.unusable = ds.unusable = 0;
6994 cs.padding = ds.padding = 0;
6996 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6997 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6998 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6999 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7000 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7001 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7003 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7004 kvm_x86_ops->set_efer(vcpu, 0);
7006 kvm_update_cpuid(vcpu);
7007 kvm_mmu_reset_context(vcpu);
7010 static void process_smi(struct kvm_vcpu *vcpu)
7012 vcpu->arch.smi_pending = true;
7013 kvm_make_request(KVM_REQ_EVENT, vcpu);
7016 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7018 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7021 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7023 u64 eoi_exit_bitmap[4];
7025 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7028 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7030 if (irqchip_split(vcpu->kvm))
7031 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7033 if (vcpu->arch.apicv_active)
7034 kvm_x86_ops->sync_pir_to_irr(vcpu);
7035 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7037 bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7038 vcpu_to_synic(vcpu)->vec_bitmap, 256);
7039 kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7042 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7043 unsigned long start, unsigned long end)
7045 unsigned long apic_address;
7048 * The physical address of apic access page is stored in the VMCS.
7049 * Update it when it becomes invalid.
7051 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7052 if (start <= apic_address && apic_address < end)
7053 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7056 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7058 struct page *page = NULL;
7060 if (!lapic_in_kernel(vcpu))
7063 if (!kvm_x86_ops->set_apic_access_page_addr)
7066 page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7067 if (is_error_page(page))
7069 kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7072 * Do not pin apic access page in memory, the MMU notifier
7073 * will call us again if it is migrated or swapped out.
7077 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7080 * Returns 1 to let vcpu_run() continue the guest execution loop without
7081 * exiting to the userspace. Otherwise, the value will be returned to the
7084 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7088 dm_request_for_irq_injection(vcpu) &&
7089 kvm_cpu_accept_dm_intr(vcpu);
7091 bool req_immediate_exit = false;
7093 if (kvm_request_pending(vcpu)) {
7094 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7095 kvm_mmu_unload(vcpu);
7096 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7097 __kvm_migrate_timers(vcpu);
7098 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7099 kvm_gen_update_masterclock(vcpu->kvm);
7100 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7101 kvm_gen_kvmclock_update(vcpu);
7102 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7103 r = kvm_guest_time_update(vcpu);
7107 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7108 kvm_mmu_sync_roots(vcpu);
7109 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7110 kvm_vcpu_flush_tlb(vcpu, true);
7111 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7112 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7116 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7117 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7118 vcpu->mmio_needed = 0;
7122 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7123 /* Page is swapped out. Do synthetic halt */
7124 vcpu->arch.apf.halted = true;
7128 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7129 record_steal_time(vcpu);
7130 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7132 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7134 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7135 kvm_pmu_handle_event(vcpu);
7136 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7137 kvm_pmu_deliver_pmi(vcpu);
7138 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7139 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7140 if (test_bit(vcpu->arch.pending_ioapic_eoi,
7141 vcpu->arch.ioapic_handled_vectors)) {
7142 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7143 vcpu->run->eoi.vector =
7144 vcpu->arch.pending_ioapic_eoi;
7149 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7150 vcpu_scan_ioapic(vcpu);
7151 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7152 kvm_vcpu_reload_apic_access_page(vcpu);
7153 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7154 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7155 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7159 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7160 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7161 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7165 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7166 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7167 vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7173 * KVM_REQ_HV_STIMER has to be processed after
7174 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7175 * depend on the guest clock being up-to-date
7177 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7178 kvm_hv_process_stimers(vcpu);
7181 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7182 ++vcpu->stat.req_event;
7183 kvm_apic_accept_events(vcpu);
7184 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7189 if (inject_pending_event(vcpu, req_int_win) != 0)
7190 req_immediate_exit = true;
7192 /* Enable SMI/NMI/IRQ window open exits if needed.
7194 * SMIs have three cases:
7195 * 1) They can be nested, and then there is nothing to
7196 * do here because RSM will cause a vmexit anyway.
7197 * 2) There is an ISA-specific reason why SMI cannot be
7198 * injected, and the moment when this changes can be
7200 * 3) Or the SMI can be pending because
7201 * inject_pending_event has completed the injection
7202 * of an IRQ or NMI from the previous vmexit, and
7203 * then we request an immediate exit to inject the
7206 if (vcpu->arch.smi_pending && !is_smm(vcpu))
7207 if (!kvm_x86_ops->enable_smi_window(vcpu))
7208 req_immediate_exit = true;
7209 if (vcpu->arch.nmi_pending)
7210 kvm_x86_ops->enable_nmi_window(vcpu);
7211 if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7212 kvm_x86_ops->enable_irq_window(vcpu);
7213 WARN_ON(vcpu->arch.exception.pending);
7216 if (kvm_lapic_enabled(vcpu)) {
7217 update_cr8_intercept(vcpu);
7218 kvm_lapic_sync_to_vapic(vcpu);
7222 r = kvm_mmu_reload(vcpu);
7224 goto cancel_injection;
7229 kvm_x86_ops->prepare_guest_switch(vcpu);
7232 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7233 * IPI are then delayed after guest entry, which ensures that they
7234 * result in virtual interrupt delivery.
7236 local_irq_disable();
7237 vcpu->mode = IN_GUEST_MODE;
7239 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7242 * 1) We should set ->mode before checking ->requests. Please see
7243 * the comment in kvm_vcpu_exiting_guest_mode().
7245 * 2) For APICv, we should set ->mode before checking PIR.ON. This
7246 * pairs with the memory barrier implicit in pi_test_and_set_on
7247 * (see vmx_deliver_posted_interrupt).
7249 * 3) This also orders the write to mode from any reads to the page
7250 * tables done while the VCPU is running. Please see the comment
7251 * in kvm_flush_remote_tlbs.
7253 smp_mb__after_srcu_read_unlock();
7256 * This handles the case where a posted interrupt was
7257 * notified with kvm_vcpu_kick.
7259 if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7260 kvm_x86_ops->sync_pir_to_irr(vcpu);
7262 if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7263 || need_resched() || signal_pending(current)) {
7264 vcpu->mode = OUTSIDE_GUEST_MODE;
7268 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7270 goto cancel_injection;
7273 kvm_load_guest_xcr0(vcpu);
7275 if (req_immediate_exit) {
7276 kvm_make_request(KVM_REQ_EVENT, vcpu);
7277 smp_send_reschedule(vcpu->cpu);
7280 trace_kvm_entry(vcpu->vcpu_id);
7281 if (lapic_timer_advance_ns)
7282 wait_lapic_expire(vcpu);
7283 guest_enter_irqoff();
7285 if (unlikely(vcpu->arch.switch_db_regs)) {
7287 set_debugreg(vcpu->arch.eff_db[0], 0);
7288 set_debugreg(vcpu->arch.eff_db[1], 1);
7289 set_debugreg(vcpu->arch.eff_db[2], 2);
7290 set_debugreg(vcpu->arch.eff_db[3], 3);
7291 set_debugreg(vcpu->arch.dr6, 6);
7292 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7295 kvm_x86_ops->run(vcpu);
7298 * Do this here before restoring debug registers on the host. And
7299 * since we do this before handling the vmexit, a DR access vmexit
7300 * can (a) read the correct value of the debug registers, (b) set
7301 * KVM_DEBUGREG_WONT_EXIT again.
7303 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7304 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7305 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7306 kvm_update_dr0123(vcpu);
7307 kvm_update_dr6(vcpu);
7308 kvm_update_dr7(vcpu);
7309 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7313 * If the guest has used debug registers, at least dr7
7314 * will be disabled while returning to the host.
7315 * If we don't have active breakpoints in the host, we don't
7316 * care about the messed up debug address registers. But if
7317 * we have some of them active, restore the old state.
7319 if (hw_breakpoint_active())
7320 hw_breakpoint_restore();
7322 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7324 vcpu->mode = OUTSIDE_GUEST_MODE;
7327 kvm_put_guest_xcr0(vcpu);
7329 kvm_x86_ops->handle_external_intr(vcpu);
7333 guest_exit_irqoff();
7338 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7341 * Profile KVM exit RIPs:
7343 if (unlikely(prof_on == KVM_PROFILING)) {
7344 unsigned long rip = kvm_rip_read(vcpu);
7345 profile_hit(KVM_PROFILING, (void *)rip);
7348 if (unlikely(vcpu->arch.tsc_always_catchup))
7349 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7351 if (vcpu->arch.apic_attention)
7352 kvm_lapic_sync_from_vapic(vcpu);
7354 vcpu->arch.gpa_available = false;
7355 r = kvm_x86_ops->handle_exit(vcpu);
7359 kvm_x86_ops->cancel_injection(vcpu);
7360 if (unlikely(vcpu->arch.apic_attention))
7361 kvm_lapic_sync_from_vapic(vcpu);
7366 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7368 if (!kvm_arch_vcpu_runnable(vcpu) &&
7369 (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7370 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7371 kvm_vcpu_block(vcpu);
7372 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7374 if (kvm_x86_ops->post_block)
7375 kvm_x86_ops->post_block(vcpu);
7377 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7381 kvm_apic_accept_events(vcpu);
7382 switch(vcpu->arch.mp_state) {
7383 case KVM_MP_STATE_HALTED:
7384 vcpu->arch.pv.pv_unhalted = false;
7385 vcpu->arch.mp_state =
7386 KVM_MP_STATE_RUNNABLE;
7387 case KVM_MP_STATE_RUNNABLE:
7388 vcpu->arch.apf.halted = false;
7390 case KVM_MP_STATE_INIT_RECEIVED:
7399 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7401 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7402 kvm_x86_ops->check_nested_events(vcpu, false);
7404 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7405 !vcpu->arch.apf.halted);
7408 static int vcpu_run(struct kvm_vcpu *vcpu)
7411 struct kvm *kvm = vcpu->kvm;
7413 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7416 if (kvm_vcpu_running(vcpu)) {
7417 r = vcpu_enter_guest(vcpu);
7419 r = vcpu_block(kvm, vcpu);
7425 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7426 if (kvm_cpu_has_pending_timer(vcpu))
7427 kvm_inject_pending_timer_irqs(vcpu);
7429 if (dm_request_for_irq_injection(vcpu) &&
7430 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7432 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7433 ++vcpu->stat.request_irq_exits;
7437 kvm_check_async_pf_completion(vcpu);
7439 if (signal_pending(current)) {
7441 vcpu->run->exit_reason = KVM_EXIT_INTR;
7442 ++vcpu->stat.signal_exits;
7445 if (need_resched()) {
7446 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7448 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7452 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7457 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7460 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7461 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7462 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7463 if (r != EMULATE_DONE)
7468 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7470 BUG_ON(!vcpu->arch.pio.count);
7472 return complete_emulated_io(vcpu);
7476 * Implements the following, as a state machine:
7480 * for each mmio piece in the fragment
7488 * for each mmio piece in the fragment
7493 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7495 struct kvm_run *run = vcpu->run;
7496 struct kvm_mmio_fragment *frag;
7499 BUG_ON(!vcpu->mmio_needed);
7501 /* Complete previous fragment */
7502 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7503 len = min(8u, frag->len);
7504 if (!vcpu->mmio_is_write)
7505 memcpy(frag->data, run->mmio.data, len);
7507 if (frag->len <= 8) {
7508 /* Switch to the next fragment. */
7510 vcpu->mmio_cur_fragment++;
7512 /* Go forward to the next mmio piece. */
7518 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7519 vcpu->mmio_needed = 0;
7521 /* FIXME: return into emulator if single-stepping. */
7522 if (vcpu->mmio_is_write)
7524 vcpu->mmio_read_completed = 1;
7525 return complete_emulated_io(vcpu);
7528 run->exit_reason = KVM_EXIT_MMIO;
7529 run->mmio.phys_addr = frag->gpa;
7530 if (vcpu->mmio_is_write)
7531 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7532 run->mmio.len = min(8u, frag->len);
7533 run->mmio.is_write = vcpu->mmio_is_write;
7534 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7538 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7543 kvm_sigset_activate(vcpu);
7544 kvm_load_guest_fpu(vcpu);
7546 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7547 if (kvm_run->immediate_exit) {
7551 kvm_vcpu_block(vcpu);
7552 kvm_apic_accept_events(vcpu);
7553 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7555 if (signal_pending(current)) {
7557 vcpu->run->exit_reason = KVM_EXIT_INTR;
7558 ++vcpu->stat.signal_exits;
7563 if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
7568 if (vcpu->run->kvm_dirty_regs) {
7569 r = sync_regs(vcpu);
7574 /* re-sync apic's tpr */
7575 if (!lapic_in_kernel(vcpu)) {
7576 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7582 if (unlikely(vcpu->arch.complete_userspace_io)) {
7583 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7584 vcpu->arch.complete_userspace_io = NULL;
7589 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7591 if (kvm_run->immediate_exit)
7597 kvm_put_guest_fpu(vcpu);
7598 if (vcpu->run->kvm_valid_regs)
7600 post_kvm_run_save(vcpu);
7601 kvm_sigset_deactivate(vcpu);
7607 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7609 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7611 * We are here if userspace calls get_regs() in the middle of
7612 * instruction emulation. Registers state needs to be copied
7613 * back from emulation context to vcpu. Userspace shouldn't do
7614 * that usually, but some bad designed PV devices (vmware
7615 * backdoor interface) need this to work
7617 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7618 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7620 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7621 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7622 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7623 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7624 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7625 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7626 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7627 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7628 #ifdef CONFIG_X86_64
7629 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7630 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7631 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7632 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7633 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7634 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7635 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7636 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7639 regs->rip = kvm_rip_read(vcpu);
7640 regs->rflags = kvm_get_rflags(vcpu);
7643 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7646 __get_regs(vcpu, regs);
7651 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7653 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7654 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7656 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7657 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7658 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7659 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7660 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7661 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7662 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7663 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7664 #ifdef CONFIG_X86_64
7665 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7666 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7667 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7668 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7669 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7670 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7671 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7672 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7675 kvm_rip_write(vcpu, regs->rip);
7676 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7678 vcpu->arch.exception.pending = false;
7680 kvm_make_request(KVM_REQ_EVENT, vcpu);
7683 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7686 __set_regs(vcpu, regs);
7691 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7693 struct kvm_segment cs;
7695 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7699 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7701 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7705 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7706 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7707 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7708 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7709 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7710 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7712 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7713 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7715 kvm_x86_ops->get_idt(vcpu, &dt);
7716 sregs->idt.limit = dt.size;
7717 sregs->idt.base = dt.address;
7718 kvm_x86_ops->get_gdt(vcpu, &dt);
7719 sregs->gdt.limit = dt.size;
7720 sregs->gdt.base = dt.address;
7722 sregs->cr0 = kvm_read_cr0(vcpu);
7723 sregs->cr2 = vcpu->arch.cr2;
7724 sregs->cr3 = kvm_read_cr3(vcpu);
7725 sregs->cr4 = kvm_read_cr4(vcpu);
7726 sregs->cr8 = kvm_get_cr8(vcpu);
7727 sregs->efer = vcpu->arch.efer;
7728 sregs->apic_base = kvm_get_apic_base(vcpu);
7730 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7732 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7733 set_bit(vcpu->arch.interrupt.nr,
7734 (unsigned long *)sregs->interrupt_bitmap);
7737 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7738 struct kvm_sregs *sregs)
7741 __get_sregs(vcpu, sregs);
7746 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7747 struct kvm_mp_state *mp_state)
7751 kvm_apic_accept_events(vcpu);
7752 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7753 vcpu->arch.pv.pv_unhalted)
7754 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7756 mp_state->mp_state = vcpu->arch.mp_state;
7762 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7763 struct kvm_mp_state *mp_state)
7769 if (!lapic_in_kernel(vcpu) &&
7770 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7773 /* INITs are latched while in SMM */
7774 if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7775 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7776 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7779 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7780 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7781 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7783 vcpu->arch.mp_state = mp_state->mp_state;
7784 kvm_make_request(KVM_REQ_EVENT, vcpu);
7792 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7793 int reason, bool has_error_code, u32 error_code)
7795 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7798 init_emulate_ctxt(vcpu);
7800 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7801 has_error_code, error_code);
7804 return EMULATE_FAIL;
7806 kvm_rip_write(vcpu, ctxt->eip);
7807 kvm_set_rflags(vcpu, ctxt->eflags);
7808 kvm_make_request(KVM_REQ_EVENT, vcpu);
7809 return EMULATE_DONE;
7811 EXPORT_SYMBOL_GPL(kvm_task_switch);
7813 int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7815 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
7817 * When EFER.LME and CR0.PG are set, the processor is in
7818 * 64-bit mode (though maybe in a 32-bit code segment).
7819 * CR4.PAE and EFER.LMA must be set.
7821 if (!(sregs->cr4 & X86_CR4_PAE)
7822 || !(sregs->efer & EFER_LMA))
7826 * Not in 64-bit mode: EFER.LMA is clear and the code
7827 * segment cannot be 64-bit.
7829 if (sregs->efer & EFER_LMA || sregs->cs.l)
7836 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7838 struct msr_data apic_base_msr;
7839 int mmu_reset_needed = 0;
7840 int pending_vec, max_bits, idx;
7844 if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7845 (sregs->cr4 & X86_CR4_OSXSAVE))
7848 if (kvm_valid_sregs(vcpu, sregs))
7851 apic_base_msr.data = sregs->apic_base;
7852 apic_base_msr.host_initiated = true;
7853 if (kvm_set_apic_base(vcpu, &apic_base_msr))
7856 dt.size = sregs->idt.limit;
7857 dt.address = sregs->idt.base;
7858 kvm_x86_ops->set_idt(vcpu, &dt);
7859 dt.size = sregs->gdt.limit;
7860 dt.address = sregs->gdt.base;
7861 kvm_x86_ops->set_gdt(vcpu, &dt);
7863 vcpu->arch.cr2 = sregs->cr2;
7864 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7865 vcpu->arch.cr3 = sregs->cr3;
7866 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7868 kvm_set_cr8(vcpu, sregs->cr8);
7870 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7871 kvm_x86_ops->set_efer(vcpu, sregs->efer);
7873 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7874 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7875 vcpu->arch.cr0 = sregs->cr0;
7877 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7878 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7879 if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7880 kvm_update_cpuid(vcpu);
7882 idx = srcu_read_lock(&vcpu->kvm->srcu);
7883 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7884 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7885 mmu_reset_needed = 1;
7887 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7889 if (mmu_reset_needed)
7890 kvm_mmu_reset_context(vcpu);
7892 max_bits = KVM_NR_INTERRUPTS;
7893 pending_vec = find_first_bit(
7894 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7895 if (pending_vec < max_bits) {
7896 kvm_queue_interrupt(vcpu, pending_vec, false);
7897 pr_debug("Set back pending irq %d\n", pending_vec);
7900 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7901 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7902 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7903 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7904 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7905 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7907 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7908 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7910 update_cr8_intercept(vcpu);
7912 /* Older userspace won't unhalt the vcpu on reset. */
7913 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7914 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7916 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7918 kvm_make_request(KVM_REQ_EVENT, vcpu);
7925 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7926 struct kvm_sregs *sregs)
7931 ret = __set_sregs(vcpu, sregs);
7936 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7937 struct kvm_guest_debug *dbg)
7939 unsigned long rflags;
7944 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7946 if (vcpu->arch.exception.pending)
7948 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7949 kvm_queue_exception(vcpu, DB_VECTOR);
7951 kvm_queue_exception(vcpu, BP_VECTOR);
7955 * Read rflags as long as potentially injected trace flags are still
7958 rflags = kvm_get_rflags(vcpu);
7960 vcpu->guest_debug = dbg->control;
7961 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7962 vcpu->guest_debug = 0;
7964 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7965 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7966 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7967 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7969 for (i = 0; i < KVM_NR_DB_REGS; i++)
7970 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7972 kvm_update_dr7(vcpu);
7974 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7975 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7976 get_segment_base(vcpu, VCPU_SREG_CS);
7979 * Trigger an rflags update that will inject or remove the trace
7982 kvm_set_rflags(vcpu, rflags);
7984 kvm_x86_ops->update_bp_intercept(vcpu);
7994 * Translate a guest virtual address to a guest physical address.
7996 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7997 struct kvm_translation *tr)
7999 unsigned long vaddr = tr->linear_address;
8005 idx = srcu_read_lock(&vcpu->kvm->srcu);
8006 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8007 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8008 tr->physical_address = gpa;
8009 tr->valid = gpa != UNMAPPED_GVA;
8017 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8019 struct fxregs_state *fxsave;
8023 fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8024 memcpy(fpu->fpr, fxsave->st_space, 128);
8025 fpu->fcw = fxsave->cwd;
8026 fpu->fsw = fxsave->swd;
8027 fpu->ftwx = fxsave->twd;
8028 fpu->last_opcode = fxsave->fop;
8029 fpu->last_ip = fxsave->rip;
8030 fpu->last_dp = fxsave->rdp;
8031 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
8037 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8039 struct fxregs_state *fxsave;
8043 fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8045 memcpy(fxsave->st_space, fpu->fpr, 128);
8046 fxsave->cwd = fpu->fcw;
8047 fxsave->swd = fpu->fsw;
8048 fxsave->twd = fpu->ftwx;
8049 fxsave->fop = fpu->last_opcode;
8050 fxsave->rip = fpu->last_ip;
8051 fxsave->rdp = fpu->last_dp;
8052 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
8058 static void store_regs(struct kvm_vcpu *vcpu)
8060 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8062 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8063 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8065 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8066 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8068 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8069 kvm_vcpu_ioctl_x86_get_vcpu_events(
8070 vcpu, &vcpu->run->s.regs.events);
8073 static int sync_regs(struct kvm_vcpu *vcpu)
8075 if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8078 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8079 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8080 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8082 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8083 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8085 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8087 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8088 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8089 vcpu, &vcpu->run->s.regs.events))
8091 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8097 static void fx_init(struct kvm_vcpu *vcpu)
8099 fpstate_init(&vcpu->arch.guest_fpu.state);
8100 if (boot_cpu_has(X86_FEATURE_XSAVES))
8101 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8102 host_xcr0 | XSTATE_COMPACTION_ENABLED;
8105 * Ensure guest xcr0 is valid for loading
8107 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8109 vcpu->arch.cr0 |= X86_CR0_ET;
8112 /* Swap (qemu) user FPU context for the guest FPU context. */
8113 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8116 copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8117 /* PKRU is separately restored in kvm_x86_ops->run. */
8118 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8119 ~XFEATURE_MASK_PKRU);
8124 /* When vcpu_run ends, restore user space FPU context. */
8125 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8128 copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8129 copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8131 ++vcpu->stat.fpu_reload;
8135 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8137 void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8139 kvmclock_reset(vcpu);
8141 kvm_x86_ops->vcpu_free(vcpu);
8142 free_cpumask_var(wbinvd_dirty_mask);
8145 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8148 struct kvm_vcpu *vcpu;
8150 if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8151 printk_once(KERN_WARNING
8152 "kvm: SMP vm created on host with unstable TSC; "
8153 "guest TSC will not be reliable\n");
8155 vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8160 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8162 kvm_vcpu_mtrr_init(vcpu);
8164 kvm_vcpu_reset(vcpu, false);
8165 kvm_mmu_setup(vcpu);
8170 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8172 struct msr_data msr;
8173 struct kvm *kvm = vcpu->kvm;
8175 kvm_hv_vcpu_postcreate(vcpu);
8177 if (mutex_lock_killable(&vcpu->mutex))
8181 msr.index = MSR_IA32_TSC;
8182 msr.host_initiated = true;
8183 kvm_write_tsc(vcpu, &msr);
8185 mutex_unlock(&vcpu->mutex);
8187 if (!kvmclock_periodic_sync)
8190 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8191 KVMCLOCK_SYNC_PERIOD);
8194 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8196 vcpu->arch.apf.msr_val = 0;
8199 kvm_mmu_unload(vcpu);
8202 kvm_x86_ops->vcpu_free(vcpu);
8205 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8207 kvm_lapic_reset(vcpu, init_event);
8209 vcpu->arch.hflags = 0;
8211 vcpu->arch.smi_pending = 0;
8212 vcpu->arch.smi_count = 0;
8213 atomic_set(&vcpu->arch.nmi_queued, 0);
8214 vcpu->arch.nmi_pending = 0;
8215 vcpu->arch.nmi_injected = false;
8216 kvm_clear_interrupt_queue(vcpu);
8217 kvm_clear_exception_queue(vcpu);
8218 vcpu->arch.exception.pending = false;
8220 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8221 kvm_update_dr0123(vcpu);
8222 vcpu->arch.dr6 = DR6_INIT;
8223 kvm_update_dr6(vcpu);
8224 vcpu->arch.dr7 = DR7_FIXED_1;
8225 kvm_update_dr7(vcpu);
8229 kvm_make_request(KVM_REQ_EVENT, vcpu);
8230 vcpu->arch.apf.msr_val = 0;
8231 vcpu->arch.st.msr_val = 0;
8233 kvmclock_reset(vcpu);
8235 kvm_clear_async_pf_completion_queue(vcpu);
8236 kvm_async_pf_hash_reset(vcpu);
8237 vcpu->arch.apf.halted = false;
8239 if (kvm_mpx_supported()) {
8240 void *mpx_state_buffer;
8243 * To avoid have the INIT path from kvm_apic_has_events() that be
8244 * called with loaded FPU and does not let userspace fix the state.
8247 kvm_put_guest_fpu(vcpu);
8248 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8249 XFEATURE_MASK_BNDREGS);
8250 if (mpx_state_buffer)
8251 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8252 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8253 XFEATURE_MASK_BNDCSR);
8254 if (mpx_state_buffer)
8255 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8257 kvm_load_guest_fpu(vcpu);
8261 kvm_pmu_reset(vcpu);
8262 vcpu->arch.smbase = 0x30000;
8264 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8265 vcpu->arch.msr_misc_features_enables = 0;
8267 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8270 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8271 vcpu->arch.regs_avail = ~0;
8272 vcpu->arch.regs_dirty = ~0;
8274 vcpu->arch.ia32_xss = 0;
8276 kvm_x86_ops->vcpu_reset(vcpu, init_event);
8279 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8281 struct kvm_segment cs;
8283 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8284 cs.selector = vector << 8;
8285 cs.base = vector << 12;
8286 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8287 kvm_rip_write(vcpu, 0);
8290 int kvm_arch_hardware_enable(void)
8293 struct kvm_vcpu *vcpu;
8298 bool stable, backwards_tsc = false;
8300 kvm_shared_msr_cpu_online();
8301 ret = kvm_x86_ops->hardware_enable();
8305 local_tsc = rdtsc();
8306 stable = !kvm_check_tsc_unstable();
8307 list_for_each_entry(kvm, &vm_list, vm_list) {
8308 kvm_for_each_vcpu(i, vcpu, kvm) {
8309 if (!stable && vcpu->cpu == smp_processor_id())
8310 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8311 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8312 backwards_tsc = true;
8313 if (vcpu->arch.last_host_tsc > max_tsc)
8314 max_tsc = vcpu->arch.last_host_tsc;
8320 * Sometimes, even reliable TSCs go backwards. This happens on
8321 * platforms that reset TSC during suspend or hibernate actions, but
8322 * maintain synchronization. We must compensate. Fortunately, we can
8323 * detect that condition here, which happens early in CPU bringup,
8324 * before any KVM threads can be running. Unfortunately, we can't
8325 * bring the TSCs fully up to date with real time, as we aren't yet far
8326 * enough into CPU bringup that we know how much real time has actually
8327 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8328 * variables that haven't been updated yet.
8330 * So we simply find the maximum observed TSC above, then record the
8331 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8332 * the adjustment will be applied. Note that we accumulate
8333 * adjustments, in case multiple suspend cycles happen before some VCPU
8334 * gets a chance to run again. In the event that no KVM threads get a
8335 * chance to run, we will miss the entire elapsed period, as we'll have
8336 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8337 * loose cycle time. This isn't too big a deal, since the loss will be
8338 * uniform across all VCPUs (not to mention the scenario is extremely
8339 * unlikely). It is possible that a second hibernate recovery happens
8340 * much faster than a first, causing the observed TSC here to be
8341 * smaller; this would require additional padding adjustment, which is
8342 * why we set last_host_tsc to the local tsc observed here.
8344 * N.B. - this code below runs only on platforms with reliable TSC,
8345 * as that is the only way backwards_tsc is set above. Also note
8346 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8347 * have the same delta_cyc adjustment applied if backwards_tsc
8348 * is detected. Note further, this adjustment is only done once,
8349 * as we reset last_host_tsc on all VCPUs to stop this from being
8350 * called multiple times (one for each physical CPU bringup).
8352 * Platforms with unreliable TSCs don't have to deal with this, they
8353 * will be compensated by the logic in vcpu_load, which sets the TSC to
8354 * catchup mode. This will catchup all VCPUs to real time, but cannot
8355 * guarantee that they stay in perfect synchronization.
8357 if (backwards_tsc) {
8358 u64 delta_cyc = max_tsc - local_tsc;
8359 list_for_each_entry(kvm, &vm_list, vm_list) {
8360 kvm->arch.backwards_tsc_observed = true;
8361 kvm_for_each_vcpu(i, vcpu, kvm) {
8362 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8363 vcpu->arch.last_host_tsc = local_tsc;
8364 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8368 * We have to disable TSC offset matching.. if you were
8369 * booting a VM while issuing an S4 host suspend....
8370 * you may have some problem. Solving this issue is
8371 * left as an exercise to the reader.
8373 kvm->arch.last_tsc_nsec = 0;
8374 kvm->arch.last_tsc_write = 0;
8381 void kvm_arch_hardware_disable(void)
8383 kvm_x86_ops->hardware_disable();
8384 drop_user_return_notifiers();
8387 int kvm_arch_hardware_setup(void)
8391 r = kvm_x86_ops->hardware_setup();
8395 if (kvm_has_tsc_control) {
8397 * Make sure the user can only configure tsc_khz values that
8398 * fit into a signed integer.
8399 * A min value is not calculated needed because it will always
8400 * be 1 on all machines.
8402 u64 max = min(0x7fffffffULL,
8403 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8404 kvm_max_guest_tsc_khz = max;
8406 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8409 kvm_init_msr_list();
8413 void kvm_arch_hardware_unsetup(void)
8415 kvm_x86_ops->hardware_unsetup();
8418 void kvm_arch_check_processor_compat(void *rtn)
8420 kvm_x86_ops->check_processor_compatibility(rtn);
8423 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8425 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8427 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8429 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8431 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8434 struct static_key kvm_no_apic_vcpu __read_mostly;
8435 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8437 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8442 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8443 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8444 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8445 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8447 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8449 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8454 vcpu->arch.pio_data = page_address(page);
8456 kvm_set_tsc_khz(vcpu, max_tsc_khz);
8458 r = kvm_mmu_create(vcpu);
8460 goto fail_free_pio_data;
8462 if (irqchip_in_kernel(vcpu->kvm)) {
8463 r = kvm_create_lapic(vcpu);
8465 goto fail_mmu_destroy;
8467 static_key_slow_inc(&kvm_no_apic_vcpu);
8469 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8471 if (!vcpu->arch.mce_banks) {
8473 goto fail_free_lapic;
8475 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8477 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8479 goto fail_free_mce_banks;
8484 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8486 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8488 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8490 kvm_async_pf_hash_reset(vcpu);
8493 vcpu->arch.pending_external_vector = -1;
8494 vcpu->arch.preempted_in_kernel = false;
8496 kvm_hv_vcpu_init(vcpu);
8500 fail_free_mce_banks:
8501 kfree(vcpu->arch.mce_banks);
8503 kvm_free_lapic(vcpu);
8505 kvm_mmu_destroy(vcpu);
8507 free_page((unsigned long)vcpu->arch.pio_data);
8512 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8516 kvm_hv_vcpu_uninit(vcpu);
8517 kvm_pmu_destroy(vcpu);
8518 kfree(vcpu->arch.mce_banks);
8519 kvm_free_lapic(vcpu);
8520 idx = srcu_read_lock(&vcpu->kvm->srcu);
8521 kvm_mmu_destroy(vcpu);
8522 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8523 free_page((unsigned long)vcpu->arch.pio_data);
8524 if (!lapic_in_kernel(vcpu))
8525 static_key_slow_dec(&kvm_no_apic_vcpu);
8528 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8530 kvm_x86_ops->sched_in(vcpu, cpu);
8533 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8538 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8539 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8540 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8541 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8542 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8544 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8545 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8546 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8547 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8548 &kvm->arch.irq_sources_bitmap);
8550 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8551 mutex_init(&kvm->arch.apic_map_lock);
8552 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8554 kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8555 pvclock_update_vm_gtod_copy(kvm);
8557 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8558 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8560 kvm_hv_init_vm(kvm);
8561 kvm_page_track_init(kvm);
8562 kvm_mmu_init_vm(kvm);
8564 if (kvm_x86_ops->vm_init)
8565 return kvm_x86_ops->vm_init(kvm);
8570 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8573 kvm_mmu_unload(vcpu);
8577 static void kvm_free_vcpus(struct kvm *kvm)
8580 struct kvm_vcpu *vcpu;
8583 * Unpin any mmu pages first.
8585 kvm_for_each_vcpu(i, vcpu, kvm) {
8586 kvm_clear_async_pf_completion_queue(vcpu);
8587 kvm_unload_vcpu_mmu(vcpu);
8589 kvm_for_each_vcpu(i, vcpu, kvm)
8590 kvm_arch_vcpu_free(vcpu);
8592 mutex_lock(&kvm->lock);
8593 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8594 kvm->vcpus[i] = NULL;
8596 atomic_set(&kvm->online_vcpus, 0);
8597 mutex_unlock(&kvm->lock);
8600 void kvm_arch_sync_events(struct kvm *kvm)
8602 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8603 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8607 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8611 struct kvm_memslots *slots = kvm_memslots(kvm);
8612 struct kvm_memory_slot *slot, old;
8614 /* Called with kvm->slots_lock held. */
8615 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8618 slot = id_to_memslot(slots, id);
8624 * MAP_SHARED to prevent internal slot pages from being moved
8627 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8628 MAP_SHARED | MAP_ANONYMOUS, 0);
8629 if (IS_ERR((void *)hva))
8630 return PTR_ERR((void *)hva);
8639 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8640 struct kvm_userspace_memory_region m;
8642 m.slot = id | (i << 16);
8644 m.guest_phys_addr = gpa;
8645 m.userspace_addr = hva;
8646 m.memory_size = size;
8647 r = __kvm_set_memory_region(kvm, &m);
8653 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8657 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8659 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8663 mutex_lock(&kvm->slots_lock);
8664 r = __x86_set_memory_region(kvm, id, gpa, size);
8665 mutex_unlock(&kvm->slots_lock);
8669 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8671 void kvm_arch_destroy_vm(struct kvm *kvm)
8673 if (current->mm == kvm->mm) {
8675 * Free memory regions allocated on behalf of userspace,
8676 * unless the the memory map has changed due to process exit
8679 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8680 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8681 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8683 if (kvm_x86_ops->vm_destroy)
8684 kvm_x86_ops->vm_destroy(kvm);
8685 kvm_pic_destroy(kvm);
8686 kvm_ioapic_destroy(kvm);
8687 kvm_free_vcpus(kvm);
8688 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8689 kvm_mmu_uninit_vm(kvm);
8690 kvm_page_track_cleanup(kvm);
8691 kvm_hv_destroy_vm(kvm);
8694 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8695 struct kvm_memory_slot *dont)
8699 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8700 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8701 kvfree(free->arch.rmap[i]);
8702 free->arch.rmap[i] = NULL;
8707 if (!dont || free->arch.lpage_info[i - 1] !=
8708 dont->arch.lpage_info[i - 1]) {
8709 kvfree(free->arch.lpage_info[i - 1]);
8710 free->arch.lpage_info[i - 1] = NULL;
8714 kvm_page_track_free_memslot(free, dont);
8717 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8718 unsigned long npages)
8722 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8723 struct kvm_lpage_info *linfo;
8728 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8729 slot->base_gfn, level) + 1;
8731 slot->arch.rmap[i] =
8732 kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8733 if (!slot->arch.rmap[i])
8738 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8742 slot->arch.lpage_info[i - 1] = linfo;
8744 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8745 linfo[0].disallow_lpage = 1;
8746 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8747 linfo[lpages - 1].disallow_lpage = 1;
8748 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8750 * If the gfn and userspace address are not aligned wrt each
8751 * other, or if explicitly asked to, disable large page
8752 * support for this slot
8754 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8755 !kvm_largepages_enabled()) {
8758 for (j = 0; j < lpages; ++j)
8759 linfo[j].disallow_lpage = 1;
8763 if (kvm_page_track_create_memslot(slot, npages))
8769 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8770 kvfree(slot->arch.rmap[i]);
8771 slot->arch.rmap[i] = NULL;
8775 kvfree(slot->arch.lpage_info[i - 1]);
8776 slot->arch.lpage_info[i - 1] = NULL;
8781 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8784 * memslots->generation has been incremented.
8785 * mmio generation may have reached its maximum value.
8787 kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8790 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8791 struct kvm_memory_slot *memslot,
8792 const struct kvm_userspace_memory_region *mem,
8793 enum kvm_mr_change change)
8798 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8799 struct kvm_memory_slot *new)
8801 /* Still write protect RO slot */
8802 if (new->flags & KVM_MEM_READONLY) {
8803 kvm_mmu_slot_remove_write_access(kvm, new);
8808 * Call kvm_x86_ops dirty logging hooks when they are valid.
8810 * kvm_x86_ops->slot_disable_log_dirty is called when:
8812 * - KVM_MR_CREATE with dirty logging is disabled
8813 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8815 * The reason is, in case of PML, we need to set D-bit for any slots
8816 * with dirty logging disabled in order to eliminate unnecessary GPA
8817 * logging in PML buffer (and potential PML buffer full VMEXT). This
8818 * guarantees leaving PML enabled during guest's lifetime won't have
8819 * any additonal overhead from PML when guest is running with dirty
8820 * logging disabled for memory slots.
8822 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8823 * to dirty logging mode.
8825 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8827 * In case of write protect:
8829 * Write protect all pages for dirty logging.
8831 * All the sptes including the large sptes which point to this
8832 * slot are set to readonly. We can not create any new large
8833 * spte on this slot until the end of the logging.
8835 * See the comments in fast_page_fault().
8837 if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8838 if (kvm_x86_ops->slot_enable_log_dirty)
8839 kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8841 kvm_mmu_slot_remove_write_access(kvm, new);
8843 if (kvm_x86_ops->slot_disable_log_dirty)
8844 kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8848 void kvm_arch_commit_memory_region(struct kvm *kvm,
8849 const struct kvm_userspace_memory_region *mem,
8850 const struct kvm_memory_slot *old,
8851 const struct kvm_memory_slot *new,
8852 enum kvm_mr_change change)
8854 int nr_mmu_pages = 0;
8856 if (!kvm->arch.n_requested_mmu_pages)
8857 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8860 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8863 * Dirty logging tracks sptes in 4k granularity, meaning that large
8864 * sptes have to be split. If live migration is successful, the guest
8865 * in the source machine will be destroyed and large sptes will be
8866 * created in the destination. However, if the guest continues to run
8867 * in the source machine (for example if live migration fails), small
8868 * sptes will remain around and cause bad performance.
8870 * Scan sptes if dirty logging has been stopped, dropping those
8871 * which can be collapsed into a single large-page spte. Later
8872 * page faults will create the large-page sptes.
8874 if ((change != KVM_MR_DELETE) &&
8875 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8876 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8877 kvm_mmu_zap_collapsible_sptes(kvm, new);
8880 * Set up write protection and/or dirty logging for the new slot.
8882 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8883 * been zapped so no dirty logging staff is needed for old slot. For
8884 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8885 * new and it's also covered when dealing with the new slot.
8887 * FIXME: const-ify all uses of struct kvm_memory_slot.
8889 if (change != KVM_MR_DELETE)
8890 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8893 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8895 kvm_mmu_invalidate_zap_all_pages(kvm);
8898 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8899 struct kvm_memory_slot *slot)
8901 kvm_page_track_flush_slot(kvm, slot);
8904 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8906 if (!list_empty_careful(&vcpu->async_pf.done))
8909 if (kvm_apic_has_events(vcpu))
8912 if (vcpu->arch.pv.pv_unhalted)
8915 if (vcpu->arch.exception.pending)
8918 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8919 (vcpu->arch.nmi_pending &&
8920 kvm_x86_ops->nmi_allowed(vcpu)))
8923 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8924 (vcpu->arch.smi_pending && !is_smm(vcpu)))
8927 if (kvm_arch_interrupt_allowed(vcpu) &&
8928 kvm_cpu_has_interrupt(vcpu))
8931 if (kvm_hv_has_stimer_pending(vcpu))
8937 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8939 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8942 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
8944 return vcpu->arch.preempted_in_kernel;
8947 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8949 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8952 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8954 return kvm_x86_ops->interrupt_allowed(vcpu);
8957 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8959 if (is_64_bit_mode(vcpu))
8960 return kvm_rip_read(vcpu);
8961 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8962 kvm_rip_read(vcpu));
8964 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8966 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8968 return kvm_get_linear_rip(vcpu) == linear_rip;
8970 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8972 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8974 unsigned long rflags;
8976 rflags = kvm_x86_ops->get_rflags(vcpu);
8977 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8978 rflags &= ~X86_EFLAGS_TF;
8981 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8983 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8985 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8986 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8987 rflags |= X86_EFLAGS_TF;
8988 kvm_x86_ops->set_rflags(vcpu, rflags);
8991 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8993 __kvm_set_rflags(vcpu, rflags);
8994 kvm_make_request(KVM_REQ_EVENT, vcpu);
8996 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8998 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9002 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
9006 r = kvm_mmu_reload(vcpu);
9010 if (!vcpu->arch.mmu.direct_map &&
9011 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
9014 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
9017 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9019 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9022 static inline u32 kvm_async_pf_next_probe(u32 key)
9024 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9027 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9029 u32 key = kvm_async_pf_hash_fn(gfn);
9031 while (vcpu->arch.apf.gfns[key] != ~0)
9032 key = kvm_async_pf_next_probe(key);
9034 vcpu->arch.apf.gfns[key] = gfn;
9037 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9040 u32 key = kvm_async_pf_hash_fn(gfn);
9042 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9043 (vcpu->arch.apf.gfns[key] != gfn &&
9044 vcpu->arch.apf.gfns[key] != ~0); i++)
9045 key = kvm_async_pf_next_probe(key);
9050 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9052 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9055 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9059 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9061 vcpu->arch.apf.gfns[i] = ~0;
9063 j = kvm_async_pf_next_probe(j);
9064 if (vcpu->arch.apf.gfns[j] == ~0)
9066 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9068 * k lies cyclically in ]i,j]
9070 * |....j i.k.| or |.k..j i...|
9072 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9073 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9078 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9081 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9085 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9088 return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9092 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9093 struct kvm_async_pf *work)
9095 struct x86_exception fault;
9097 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9098 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9100 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9101 (vcpu->arch.apf.send_user_only &&
9102 kvm_x86_ops->get_cpl(vcpu) == 0))
9103 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9104 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9105 fault.vector = PF_VECTOR;
9106 fault.error_code_valid = true;
9107 fault.error_code = 0;
9108 fault.nested_page_fault = false;
9109 fault.address = work->arch.token;
9110 fault.async_page_fault = true;
9111 kvm_inject_page_fault(vcpu, &fault);
9115 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9116 struct kvm_async_pf *work)
9118 struct x86_exception fault;
9121 if (work->wakeup_all)
9122 work->arch.token = ~0; /* broadcast wakeup */
9124 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9125 trace_kvm_async_pf_ready(work->arch.token, work->gva);
9127 if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9128 !apf_get_user(vcpu, &val)) {
9129 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9130 vcpu->arch.exception.pending &&
9131 vcpu->arch.exception.nr == PF_VECTOR &&
9132 !apf_put_user(vcpu, 0)) {
9133 vcpu->arch.exception.injected = false;
9134 vcpu->arch.exception.pending = false;
9135 vcpu->arch.exception.nr = 0;
9136 vcpu->arch.exception.has_error_code = false;
9137 vcpu->arch.exception.error_code = 0;
9138 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9139 fault.vector = PF_VECTOR;
9140 fault.error_code_valid = true;
9141 fault.error_code = 0;
9142 fault.nested_page_fault = false;
9143 fault.address = work->arch.token;
9144 fault.async_page_fault = true;
9145 kvm_inject_page_fault(vcpu, &fault);
9148 vcpu->arch.apf.halted = false;
9149 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9152 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9154 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9157 return kvm_can_do_async_pf(vcpu);
9160 void kvm_arch_start_assignment(struct kvm *kvm)
9162 atomic_inc(&kvm->arch.assigned_device_count);
9164 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9166 void kvm_arch_end_assignment(struct kvm *kvm)
9168 atomic_dec(&kvm->arch.assigned_device_count);
9170 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9172 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9174 return atomic_read(&kvm->arch.assigned_device_count);
9176 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9178 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9180 atomic_inc(&kvm->arch.noncoherent_dma_count);
9182 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9184 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9186 atomic_dec(&kvm->arch.noncoherent_dma_count);
9188 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9190 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9192 return atomic_read(&kvm->arch.noncoherent_dma_count);
9194 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9196 bool kvm_arch_has_irq_bypass(void)
9198 return kvm_x86_ops->update_pi_irte != NULL;
9201 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9202 struct irq_bypass_producer *prod)
9204 struct kvm_kernel_irqfd *irqfd =
9205 container_of(cons, struct kvm_kernel_irqfd, consumer);
9207 irqfd->producer = prod;
9209 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9210 prod->irq, irqfd->gsi, 1);
9213 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9214 struct irq_bypass_producer *prod)
9217 struct kvm_kernel_irqfd *irqfd =
9218 container_of(cons, struct kvm_kernel_irqfd, consumer);
9220 WARN_ON(irqfd->producer != prod);
9221 irqfd->producer = NULL;
9224 * When producer of consumer is unregistered, we change back to
9225 * remapped mode, so we can re-use the current implementation
9226 * when the irq is masked/disabled or the consumer side (KVM
9227 * int this case doesn't want to receive the interrupts.
9229 ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9231 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9232 " fails: %d\n", irqfd->consumer.token, ret);
9235 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9236 uint32_t guest_irq, bool set)
9238 if (!kvm_x86_ops->update_pi_irte)
9241 return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9244 bool kvm_vector_hashing_enabled(void)
9246 return vector_hashing;
9248 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9250 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9251 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9252 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9253 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9254 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9255 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9256 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9257 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9258 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9259 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9260 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9261 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9262 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9263 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9264 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9265 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9266 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9267 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9268 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);