arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72 #include <asm/intel_pt.h>
  73
  74 #define CREATE_TRACE_POINTS
  75 #include "trace.h"
  76
  77 #define MAX_IO_MSRS 256
  78 #define KVM_MAX_MCE_BANKS 32
  79 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  80 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  81
  82 #define emul_to_vcpu(ctxt) \
  83         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  84
  85 /* EFER defaults:
  86  * - enable syscall per default because its emulated by KVM
  87  * - enable LME and LMA per default on 64 bit KVM
  88  */
  89 #ifdef CONFIG_X86_64
  90 static
  91 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  92 #else
  93 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  94 #endif
  95
  96 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  97 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  98
  99 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 100                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 101
 102 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 103 static void process_nmi(struct kvm_vcpu *vcpu);
 104 static void enter_smm(struct kvm_vcpu *vcpu);
 105 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 106 static void store_regs(struct kvm_vcpu *vcpu);
 107 static int sync_regs(struct kvm_vcpu *vcpu);
 108
 109 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 110 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 111
 112 static bool __read_mostly ignore_msrs = 0;
 113 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 114
 115 static bool __read_mostly report_ignored_msrs = true;
 116 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 117
 118 unsigned int min_timer_period_us = 200;
 119 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 120
 121 static bool __read_mostly kvmclock_periodic_sync = true;
 122 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 123
 124 bool __read_mostly kvm_has_tsc_control;
 125 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 126 u32  __read_mostly kvm_max_guest_tsc_khz;
 127 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 128 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 129 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 130 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 131 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 132 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 133 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 134
 135 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 136 static u32 __read_mostly tsc_tolerance_ppm = 250;
 137 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 138
 139 /*
 140  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 141  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 142  * advancement entirely.  Any other value is used as-is and disables adaptive
 143  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 144  */
 145 static int __read_mostly lapic_timer_advance_ns = -1;
 146 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 147
 148 static bool __read_mostly vector_hashing = true;
 149 module_param(vector_hashing, bool, S_IRUGO);
 150
 151 bool __read_mostly enable_vmware_backdoor = false;
 152 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 153 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 154
 155 static bool __read_mostly force_emulation_prefix = false;
 156 module_param(force_emulation_prefix, bool, S_IRUGO);
 157
 158 #define KVM_NR_SHARED_MSRS 16
 159
 160 struct kvm_shared_msrs_global {
 161         int nr;
 162         u32 msrs[KVM_NR_SHARED_MSRS];
 163 };
 164
 165 struct kvm_shared_msrs {
 166         struct user_return_notifier urn;
 167         bool registered;
 168         struct kvm_shared_msr_values {
 169                 u64 host;
 170                 u64 curr;
 171         } values[KVM_NR_SHARED_MSRS];
 172 };
 173
 174 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 175 static struct kvm_shared_msrs __percpu *shared_msrs;
 176
 177 struct kvm_stats_debugfs_item debugfs_entries[] = {
 178         { "pf_fixed", VCPU_STAT(pf_fixed) },
 179         { "pf_guest", VCPU_STAT(pf_guest) },
 180         { "tlb_flush", VCPU_STAT(tlb_flush) },
 181         { "invlpg", VCPU_STAT(invlpg) },
 182         { "exits", VCPU_STAT(exits) },
 183         { "io_exits", VCPU_STAT(io_exits) },
 184         { "mmio_exits", VCPU_STAT(mmio_exits) },
 185         { "signal_exits", VCPU_STAT(signal_exits) },
 186         { "irq_window", VCPU_STAT(irq_window_exits) },
 187         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 188         { "halt_exits", VCPU_STAT(halt_exits) },
 189         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 190         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 191         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 192         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 193         { "hypercalls", VCPU_STAT(hypercalls) },
 194         { "request_irq", VCPU_STAT(request_irq_exits) },
 195         { "irq_exits", VCPU_STAT(irq_exits) },
 196         { "host_state_reload", VCPU_STAT(host_state_reload) },
 197         { "fpu_reload", VCPU_STAT(fpu_reload) },
 198         { "insn_emulation", VCPU_STAT(insn_emulation) },
 199         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 200         { "irq_injections", VCPU_STAT(irq_injections) },
 201         { "nmi_injections", VCPU_STAT(nmi_injections) },
 202         { "req_event", VCPU_STAT(req_event) },
 203         { "l1d_flush", VCPU_STAT(l1d_flush) },
 204         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 205         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 206         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 207         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 208         { "mmu_flooded", VM_STAT(mmu_flooded) },
 209         { "mmu_recycled", VM_STAT(mmu_recycled) },
 210         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 211         { "mmu_unsync", VM_STAT(mmu_unsync) },
 212         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 213         { "largepages", VM_STAT(lpages) },
 214         { "max_mmu_page_hash_collisions",
 215                 VM_STAT(max_mmu_page_hash_collisions) },
 216         { NULL }
 217 };
 218
 219 u64 __read_mostly host_xcr0;
 220
 221 struct kmem_cache *x86_fpu_cache;
 222 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 223
 224 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 225
 226 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 227 {
 228         int i;
 229         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 230                 vcpu->arch.apf.gfns[i] = ~0;
 231 }
 232
 233 static void kvm_on_user_return(struct user_return_notifier *urn)
 234 {
 235         unsigned slot;
 236         struct kvm_shared_msrs *locals
 237                 = container_of(urn, struct kvm_shared_msrs, urn);
 238         struct kvm_shared_msr_values *values;
 239         unsigned long flags;
 240
 241         /*
 242          * Disabling irqs at this point since the following code could be
 243          * interrupted and executed through kvm_arch_hardware_disable()
 244          */
 245         local_irq_save(flags);
 246         if (locals->registered) {
 247                 locals->registered = false;
 248                 user_return_notifier_unregister(urn);
 249         }
 250         local_irq_restore(flags);
 251         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 252                 values = &locals->values[slot];
 253                 if (values->host != values->curr) {
 254                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 255                         values->curr = values->host;
 256                 }
 257         }
 258 }
 259
 260 static void shared_msr_update(unsigned slot, u32 msr)
 261 {
 262         u64 value;
 263         unsigned int cpu = smp_processor_id();
 264         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 265
 266         /* only read, and nobody should modify it at this time,
 267          * so don't need lock */
 268         if (slot >= shared_msrs_global.nr) {
 269                 printk(KERN_ERR "kvm: invalid MSR slot!");
 270                 return;
 271         }
 272         rdmsrl_safe(msr, &value);
 273         smsr->values[slot].host = value;
 274         smsr->values[slot].curr = value;
 275 }
 276
 277 void kvm_define_shared_msr(unsigned slot, u32 msr)
 278 {
 279         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 280         shared_msrs_global.msrs[slot] = msr;
 281         if (slot >= shared_msrs_global.nr)
 282                 shared_msrs_global.nr = slot + 1;
 283 }
 284 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 285
 286 static void kvm_shared_msr_cpu_online(void)
 287 {
 288         unsigned i;
 289
 290         for (i = 0; i < shared_msrs_global.nr; ++i)
 291                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 292 }
 293
 294 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 295 {
 296         unsigned int cpu = smp_processor_id();
 297         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 298         int err;
 299
 300         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 301                 return 0;
 302         smsr->values[slot].curr = value;
 303         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 304         if (err)
 305                 return 1;
 306
 307         if (!smsr->registered) {
 308                 smsr->urn.on_user_return = kvm_on_user_return;
 309                 user_return_notifier_register(&smsr->urn);
 310                 smsr->registered = true;
 311         }
 312         return 0;
 313 }
 314 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 315
 316 static void drop_user_return_notifiers(void)
 317 {
 318         unsigned int cpu = smp_processor_id();
 319         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 320
 321         if (smsr->registered)
 322                 kvm_on_user_return(&smsr->urn);
 323 }
 324
 325 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 326 {
 327         return vcpu->arch.apic_base;
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 330
 331 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 332 {
 333         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 336
 337 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 338 {
 339         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 340         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 341         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 342                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 343
 344         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 345                 return 1;
 346         if (!msr_info->host_initiated) {
 347                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 348                         return 1;
 349                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 350                         return 1;
 351         }
 352
 353         kvm_lapic_set_base(vcpu, msr_info->data);
 354         return 0;
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 357
 358 asmlinkage __visible void kvm_spurious_fault(void)
 359 {
 360         /* Fault while not rebooting.  We want the trace. */
 361         BUG();
 362 }
 363 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 364
 365 #define EXCPT_BENIGN            0
 366 #define EXCPT_CONTRIBUTORY      1
 367 #define EXCPT_PF                2
 368
 369 static int exception_class(int vector)
 370 {
 371         switch (vector) {
 372         case PF_VECTOR:
 373                 return EXCPT_PF;
 374         case DE_VECTOR:
 375         case TS_VECTOR:
 376         case NP_VECTOR:
 377         case SS_VECTOR:
 378         case GP_VECTOR:
 379                 return EXCPT_CONTRIBUTORY;
 380         default:
 381                 break;
 382         }
 383         return EXCPT_BENIGN;
 384 }
 385
 386 #define EXCPT_FAULT             0
 387 #define EXCPT_TRAP              1
 388 #define EXCPT_ABORT             2
 389 #define EXCPT_INTERRUPT         3
 390
 391 static int exception_type(int vector)
 392 {
 393         unsigned int mask;
 394
 395         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 396                 return EXCPT_INTERRUPT;
 397
 398         mask = 1 << vector;
 399
 400         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 401         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 402                 return EXCPT_TRAP;
 403
 404         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 405                 return EXCPT_ABORT;
 406
 407         /* Reserved exceptions will result in fault */
 408         return EXCPT_FAULT;
 409 }
 410
 411 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 412 {
 413         unsigned nr = vcpu->arch.exception.nr;
 414         bool has_payload = vcpu->arch.exception.has_payload;
 415         unsigned long payload = vcpu->arch.exception.payload;
 416
 417         if (!has_payload)
 418                 return;
 419
 420         switch (nr) {
 421         case DB_VECTOR:
 422                 /*
 423                  * "Certain debug exceptions may clear bit 0-3.  The
 424                  * remaining contents of the DR6 register are never
 425                  * cleared by the processor".
 426                  */
 427                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 428                 /*
 429                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 430                  */
 431                 vcpu->arch.dr6 |= DR6_RTM;
 432                 vcpu->arch.dr6 |= payload;
 433                 /*
 434                  * Bit 16 should be set in the payload whenever the #DB
 435                  * exception should clear DR6.RTM. This makes the payload
 436                  * compatible with the pending debug exceptions under VMX.
 437                  * Though not currently documented in the SDM, this also
 438                  * makes the payload compatible with the exit qualification
 439                  * for #DB exceptions under VMX.
 440                  */
 441                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 442                 break;
 443         case PF_VECTOR:
 444                 vcpu->arch.cr2 = payload;
 445                 break;
 446         }
 447
 448         vcpu->arch.exception.has_payload = false;
 449         vcpu->arch.exception.payload = 0;
 450 }
 451 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 452
 453 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 454                 unsigned nr, bool has_error, u32 error_code,
 455                 bool has_payload, unsigned long payload, bool reinject)
 456 {
 457         u32 prev_nr;
 458         int class1, class2;
 459
 460         kvm_make_request(KVM_REQ_EVENT, vcpu);
 461
 462         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 463         queue:
 464                 if (has_error && !is_protmode(vcpu))
 465                         has_error = false;
 466                 if (reinject) {
 467                         /*
 468                          * On vmentry, vcpu->arch.exception.pending is only
 469                          * true if an event injection was blocked by
 470                          * nested_run_pending.  In that case, however,
 471                          * vcpu_enter_guest requests an immediate exit,
 472                          * and the guest shouldn't proceed far enough to
 473                          * need reinjection.
 474                          */
 475                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 476                         vcpu->arch.exception.injected = true;
 477                         if (WARN_ON_ONCE(has_payload)) {
 478                                 /*
 479                                  * A reinjected event has already
 480                                  * delivered its payload.
 481                                  */
 482                                 has_payload = false;
 483                                 payload = 0;
 484                         }
 485                 } else {
 486                         vcpu->arch.exception.pending = true;
 487                         vcpu->arch.exception.injected = false;
 488                 }
 489                 vcpu->arch.exception.has_error_code = has_error;
 490                 vcpu->arch.exception.nr = nr;
 491                 vcpu->arch.exception.error_code = error_code;
 492                 vcpu->arch.exception.has_payload = has_payload;
 493                 vcpu->arch.exception.payload = payload;
 494                 /*
 495                  * In guest mode, payload delivery should be deferred,
 496                  * so that the L1 hypervisor can intercept #PF before
 497                  * CR2 is modified (or intercept #DB before DR6 is
 498                  * modified under nVMX).  However, for ABI
 499                  * compatibility with KVM_GET_VCPU_EVENTS and
 500                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 501                  * delivery unless userspace has enabled this
 502                  * functionality via the per-VM capability,
 503                  * KVM_CAP_EXCEPTION_PAYLOAD.
 504                  */
 505                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 506                     !is_guest_mode(vcpu))
 507                         kvm_deliver_exception_payload(vcpu);
 508                 return;
 509         }
 510
 511         /* to check exception */
 512         prev_nr = vcpu->arch.exception.nr;
 513         if (prev_nr == DF_VECTOR) {
 514                 /* triple fault -> shutdown */
 515                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 516                 return;
 517         }
 518         class1 = exception_class(prev_nr);
 519         class2 = exception_class(nr);
 520         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 521                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 522                 /*
 523                  * Generate double fault per SDM Table 5-5.  Set
 524                  * exception.pending = true so that the double fault
 525                  * can trigger a nested vmexit.
 526                  */
 527                 vcpu->arch.exception.pending = true;
 528                 vcpu->arch.exception.injected = false;
 529                 vcpu->arch.exception.has_error_code = true;
 530                 vcpu->arch.exception.nr = DF_VECTOR;
 531                 vcpu->arch.exception.error_code = 0;
 532                 vcpu->arch.exception.has_payload = false;
 533                 vcpu->arch.exception.payload = 0;
 534         } else
 535                 /* replace previous exception with a new one in a hope
 536                    that instruction re-execution will regenerate lost
 537                    exception */
 538                 goto queue;
 539 }
 540
 541 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 542 {
 543         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 544 }
 545 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 546
 547 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 548 {
 549         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 550 }
 551 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 552
 553 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 554                                   unsigned long payload)
 555 {
 556         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 557 }
 558
 559 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 560                                     u32 error_code, unsigned long payload)
 561 {
 562         kvm_multiple_exception(vcpu, nr, true, error_code,
 563                                true, payload, false);
 564 }
 565
 566 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 567 {
 568         if (err)
 569                 kvm_inject_gp(vcpu, 0);
 570         else
 571                 return kvm_skip_emulated_instruction(vcpu);
 572
 573         return 1;
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 576
 577 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 578 {
 579         ++vcpu->stat.pf_guest;
 580         vcpu->arch.exception.nested_apf =
 581                 is_guest_mode(vcpu) && fault->async_page_fault;
 582         if (vcpu->arch.exception.nested_apf) {
 583                 vcpu->arch.apf.nested_apf_token = fault->address;
 584                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 585         } else {
 586                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 587                                         fault->address);
 588         }
 589 }
 590 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 591
 592 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 593 {
 594         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 595                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 596         else
 597                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 598
 599         return fault->nested_page_fault;
 600 }
 601
 602 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 603 {
 604         atomic_inc(&vcpu->arch.nmi_queued);
 605         kvm_make_request(KVM_REQ_NMI, vcpu);
 606 }
 607 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 608
 609 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 610 {
 611         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 612 }
 613 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 614
 615 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 616 {
 617         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 618 }
 619 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 620
 621 /*
 622  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 623  * a #GP and return false.
 624  */
 625 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 626 {
 627         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 628                 return true;
 629         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 630         return false;
 631 }
 632 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 633
 634 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 635 {
 636         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 637                 return true;
 638
 639         kvm_queue_exception(vcpu, UD_VECTOR);
 640         return false;
 641 }
 642 EXPORT_SYMBOL_GPL(kvm_require_dr);
 643
 644 /*
 645  * This function will be used to read from the physical memory of the currently
 646  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 647  * can read from guest physical or from the guest's guest physical memory.
 648  */
 649 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 650                             gfn_t ngfn, void *data, int offset, int len,
 651                             u32 access)
 652 {
 653         struct x86_exception exception;
 654         gfn_t real_gfn;
 655         gpa_t ngpa;
 656
 657         ngpa     = gfn_to_gpa(ngfn);
 658         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 659         if (real_gfn == UNMAPPED_GVA)
 660                 return -EFAULT;
 661
 662         real_gfn = gpa_to_gfn(real_gfn);
 663
 664         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 667
 668 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 669                                void *data, int offset, int len, u32 access)
 670 {
 671         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 672                                        data, offset, len, access);
 673 }
 674
 675 /*
 676  * Load the pae pdptrs.  Return true is they are all valid.
 677  */
 678 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 679 {
 680         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 681         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 682         int i;
 683         int ret;
 684         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 685
 686         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 687                                       offset * sizeof(u64), sizeof(pdpte),
 688                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 689         if (ret < 0) {
 690                 ret = 0;
 691                 goto out;
 692         }
 693         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 694                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 695                     (pdpte[i] &
 696                      vcpu->arch.mmu->guest_rsvd_check.rsvd_bits_mask[0][2])) {
 697                         ret = 0;
 698                         goto out;
 699                 }
 700         }
 701         ret = 1;
 702
 703         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 704         __set_bit(VCPU_EXREG_PDPTR,
 705                   (unsigned long *)&vcpu->arch.regs_avail);
 706         __set_bit(VCPU_EXREG_PDPTR,
 707                   (unsigned long *)&vcpu->arch.regs_dirty);
 708 out:
 709
 710         return ret;
 711 }
 712 EXPORT_SYMBOL_GPL(load_pdptrs);
 713
 714 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 715 {
 716         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 717         bool changed = true;
 718         int offset;
 719         gfn_t gfn;
 720         int r;
 721
 722         if (!is_pae_paging(vcpu))
 723                 return false;
 724
 725         if (!test_bit(VCPU_EXREG_PDPTR,
 726                       (unsigned long *)&vcpu->arch.regs_avail))
 727                 return true;
 728
 729         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 730         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 731         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 732                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 733         if (r < 0)
 734                 goto out;
 735         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 736 out:
 737
 738         return changed;
 739 }
 740 EXPORT_SYMBOL_GPL(pdptrs_changed);
 741
 742 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 743 {
 744         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 745         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 746
 747         cr0 |= X86_CR0_ET;
 748
 749 #ifdef CONFIG_X86_64
 750         if (cr0 & 0xffffffff00000000UL)
 751                 return 1;
 752 #endif
 753
 754         cr0 &= ~CR0_RESERVED_BITS;
 755
 756         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 757                 return 1;
 758
 759         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 760                 return 1;
 761
 762         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 763 #ifdef CONFIG_X86_64
 764                 if ((vcpu->arch.efer & EFER_LME)) {
 765                         int cs_db, cs_l;
 766
 767                         if (!is_pae(vcpu))
 768                                 return 1;
 769                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 770                         if (cs_l)
 771                                 return 1;
 772                 } else
 773 #endif
 774                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 775                                                  kvm_read_cr3(vcpu)))
 776                         return 1;
 777         }
 778
 779         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 780                 return 1;
 781
 782         kvm_x86_ops->set_cr0(vcpu, cr0);
 783
 784         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 785                 kvm_clear_async_pf_completion_queue(vcpu);
 786                 kvm_async_pf_hash_reset(vcpu);
 787         }
 788
 789         if ((cr0 ^ old_cr0) & update_bits)
 790                 kvm_mmu_reset_context(vcpu);
 791
 792         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 793             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 794             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 795                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 796
 797         return 0;
 798 }
 799 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 800
 801 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 802 {
 803         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 804 }
 805 EXPORT_SYMBOL_GPL(kvm_lmsw);
 806
 807 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 808 {
 809         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 810                         !vcpu->guest_xcr0_loaded) {
 811                 /* kvm_set_xcr() also depends on this */
 812                 if (vcpu->arch.xcr0 != host_xcr0)
 813                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 814                 vcpu->guest_xcr0_loaded = 1;
 815         }
 816 }
 817 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 818
 819 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 820 {
 821         if (vcpu->guest_xcr0_loaded) {
 822                 if (vcpu->arch.xcr0 != host_xcr0)
 823                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 824                 vcpu->guest_xcr0_loaded = 0;
 825         }
 826 }
 827 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 828
 829 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 830 {
 831         u64 xcr0 = xcr;
 832         u64 old_xcr0 = vcpu->arch.xcr0;
 833         u64 valid_bits;
 834
 835         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 836         if (index != XCR_XFEATURE_ENABLED_MASK)
 837                 return 1;
 838         if (!(xcr0 & XFEATURE_MASK_FP))
 839                 return 1;
 840         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 841                 return 1;
 842
 843         /*
 844          * Do not allow the guest to set bits that we do not support
 845          * saving.  However, xcr0 bit 0 is always set, even if the
 846          * emulated CPU does not support XSAVE (see fx_init).
 847          */
 848         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 849         if (xcr0 & ~valid_bits)
 850                 return 1;
 851
 852         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 853             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 854                 return 1;
 855
 856         if (xcr0 & XFEATURE_MASK_AVX512) {
 857                 if (!(xcr0 & XFEATURE_MASK_YMM))
 858                         return 1;
 859                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 860                         return 1;
 861         }
 862         vcpu->arch.xcr0 = xcr0;
 863
 864         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 865                 kvm_update_cpuid(vcpu);
 866         return 0;
 867 }
 868
 869 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 870 {
 871         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 872             __kvm_set_xcr(vcpu, index, xcr)) {
 873                 kvm_inject_gp(vcpu, 0);
 874                 return 1;
 875         }
 876         return 0;
 877 }
 878 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 879
 880 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 881 {
 882         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 883         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 884                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 885
 886         if (cr4 & CR4_RESERVED_BITS)
 887                 return 1;
 888
 889         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 890                 return 1;
 891
 892         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 893                 return 1;
 894
 895         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 896                 return 1;
 897
 898         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 899                 return 1;
 900
 901         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 902                 return 1;
 903
 904         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 905                 return 1;
 906
 907         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 908                 return 1;
 909
 910         if (is_long_mode(vcpu)) {
 911                 if (!(cr4 & X86_CR4_PAE))
 912                         return 1;
 913         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 914                    && ((cr4 ^ old_cr4) & pdptr_bits)
 915                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 916                                    kvm_read_cr3(vcpu)))
 917                 return 1;
 918
 919         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 920                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 921                         return 1;
 922
 923                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 924                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 925                         return 1;
 926         }
 927
 928         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 929                 return 1;
 930
 931         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 932             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 933                 kvm_mmu_reset_context(vcpu);
 934
 935         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 936                 kvm_update_cpuid(vcpu);
 937
 938         return 0;
 939 }
 940 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 941
 942 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 943 {
 944         bool skip_tlb_flush = false;
 945 #ifdef CONFIG_X86_64
 946         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 947
 948         if (pcid_enabled) {
 949                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 950                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 951         }
 952 #endif
 953
 954         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 955                 if (!skip_tlb_flush) {
 956                         kvm_mmu_sync_roots(vcpu);
 957                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 958                 }
 959                 return 0;
 960         }
 961
 962         if (is_long_mode(vcpu) &&
 963             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 964                 return 1;
 965         else if (is_pae_paging(vcpu) &&
 966                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 967                 return 1;
 968
 969         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 970         vcpu->arch.cr3 = cr3;
 971         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 972
 973         return 0;
 974 }
 975 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 976
 977 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 978 {
 979         if (cr8 & CR8_RESERVED_BITS)
 980                 return 1;
 981         if (lapic_in_kernel(vcpu))
 982                 kvm_lapic_set_tpr(vcpu, cr8);
 983         else
 984                 vcpu->arch.cr8 = cr8;
 985         return 0;
 986 }
 987 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 988
 989 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 990 {
 991         if (lapic_in_kernel(vcpu))
 992                 return kvm_lapic_get_cr8(vcpu);
 993         else
 994                 return vcpu->arch.cr8;
 995 }
 996 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 997
 998 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 999 {
1000         int i;
1001
1002         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1003                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1004                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1005                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1006         }
1007 }
1008
1009 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1010 {
1011         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1012                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1013 }
1014
1015 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1016 {
1017         unsigned long dr7;
1018
1019         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1020                 dr7 = vcpu->arch.guest_debug_dr7;
1021         else
1022                 dr7 = vcpu->arch.dr7;
1023         kvm_x86_ops->set_dr7(vcpu, dr7);
1024         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1025         if (dr7 & DR7_BP_EN_MASK)
1026                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1027 }
1028
1029 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1030 {
1031         u64 fixed = DR6_FIXED_1;
1032
1033         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1034                 fixed |= DR6_RTM;
1035         return fixed;
1036 }
1037
1038 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1039 {
1040         switch (dr) {
1041         case 0 ... 3:
1042                 vcpu->arch.db[dr] = val;
1043                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1044                         vcpu->arch.eff_db[dr] = val;
1045                 break;
1046         case 4:
1047                 /* fall through */
1048         case 6:
1049                 if (val & 0xffffffff00000000ULL)
1050                         return -1; /* #GP */
1051                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1052                 kvm_update_dr6(vcpu);
1053                 break;
1054         case 5:
1055                 /* fall through */
1056         default: /* 7 */
1057                 if (val & 0xffffffff00000000ULL)
1058                         return -1; /* #GP */
1059                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1060                 kvm_update_dr7(vcpu);
1061                 break;
1062         }
1063
1064         return 0;
1065 }
1066
1067 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1068 {
1069         if (__kvm_set_dr(vcpu, dr, val)) {
1070                 kvm_inject_gp(vcpu, 0);
1071                 return 1;
1072         }
1073         return 0;
1074 }
1075 EXPORT_SYMBOL_GPL(kvm_set_dr);
1076
1077 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1078 {
1079         switch (dr) {
1080         case 0 ... 3:
1081                 *val = vcpu->arch.db[dr];
1082                 break;
1083         case 4:
1084                 /* fall through */
1085         case 6:
1086                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1087                         *val = vcpu->arch.dr6;
1088                 else
1089                         *val = kvm_x86_ops->get_dr6(vcpu);
1090                 break;
1091         case 5:
1092                 /* fall through */
1093         default: /* 7 */
1094                 *val = vcpu->arch.dr7;
1095                 break;
1096         }
1097         return 0;
1098 }
1099 EXPORT_SYMBOL_GPL(kvm_get_dr);
1100
1101 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1102 {
1103         u32 ecx = kvm_rcx_read(vcpu);
1104         u64 data;
1105         int err;
1106
1107         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1108         if (err)
1109                 return err;
1110         kvm_rax_write(vcpu, (u32)data);
1111         kvm_rdx_write(vcpu, data >> 32);
1112         return err;
1113 }
1114 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1115
1116 /*
1117  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1118  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1119  *
1120  * This list is modified at module load time to reflect the
1121  * capabilities of the host cpu. This capabilities test skips MSRs that are
1122  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1123  * may depend on host virtualization features rather than host cpu features.
1124  */
1125
1126 static u32 msrs_to_save[] = {
1127         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1128         MSR_STAR,
1129 #ifdef CONFIG_X86_64
1130         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1131 #endif
1132         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1133         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1134         MSR_IA32_SPEC_CTRL,
1135         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1136         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1137         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1138         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1139         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1140         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1141 };
1142
1143 static unsigned num_msrs_to_save;
1144
1145 static u32 emulated_msrs[] = {
1146         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1147         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1148         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1149         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1150         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1151         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1152         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1153         HV_X64_MSR_RESET,
1154         HV_X64_MSR_VP_INDEX,
1155         HV_X64_MSR_VP_RUNTIME,
1156         HV_X64_MSR_SCONTROL,
1157         HV_X64_MSR_STIMER0_CONFIG,
1158         HV_X64_MSR_VP_ASSIST_PAGE,
1159         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1160         HV_X64_MSR_TSC_EMULATION_STATUS,
1161
1162         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1163         MSR_KVM_PV_EOI_EN,
1164
1165         MSR_IA32_TSC_ADJUST,
1166         MSR_IA32_TSCDEADLINE,
1167         MSR_IA32_ARCH_CAPABILITIES,
1168         MSR_IA32_MISC_ENABLE,
1169         MSR_IA32_MCG_STATUS,
1170         MSR_IA32_MCG_CTL,
1171         MSR_IA32_MCG_EXT_CTL,
1172         MSR_IA32_SMBASE,
1173         MSR_SMI_COUNT,
1174         MSR_PLATFORM_INFO,
1175         MSR_MISC_FEATURES_ENABLES,
1176         MSR_AMD64_VIRT_SPEC_CTRL,
1177         MSR_IA32_POWER_CTL,
1178
1179         /*
1180          * The following list leaves out MSRs whose values are determined
1181          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1182          * We always support the "true" VMX control MSRs, even if the host
1183          * processor does not, so I am putting these registers here rather
1184          * than in msrs_to_save.
1185          */
1186         MSR_IA32_VMX_BASIC,
1187         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1188         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1189         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1190         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1191         MSR_IA32_VMX_MISC,
1192         MSR_IA32_VMX_CR0_FIXED0,
1193         MSR_IA32_VMX_CR4_FIXED0,
1194         MSR_IA32_VMX_VMCS_ENUM,
1195         MSR_IA32_VMX_PROCBASED_CTLS2,
1196         MSR_IA32_VMX_EPT_VPID_CAP,
1197         MSR_IA32_VMX_VMFUNC,
1198
1199         MSR_K7_HWCR,
1200         MSR_KVM_POLL_CONTROL,
1201 };
1202
1203 static unsigned num_emulated_msrs;
1204
1205 /*
1206  * List of msr numbers which are used to expose MSR-based features that
1207  * can be used by a hypervisor to validate requested CPU features.
1208  */
1209 static u32 msr_based_features[] = {
1210         MSR_IA32_VMX_BASIC,
1211         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1212         MSR_IA32_VMX_PINBASED_CTLS,
1213         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1214         MSR_IA32_VMX_PROCBASED_CTLS,
1215         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1216         MSR_IA32_VMX_EXIT_CTLS,
1217         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1218         MSR_IA32_VMX_ENTRY_CTLS,
1219         MSR_IA32_VMX_MISC,
1220         MSR_IA32_VMX_CR0_FIXED0,
1221         MSR_IA32_VMX_CR0_FIXED1,
1222         MSR_IA32_VMX_CR4_FIXED0,
1223         MSR_IA32_VMX_CR4_FIXED1,
1224         MSR_IA32_VMX_VMCS_ENUM,
1225         MSR_IA32_VMX_PROCBASED_CTLS2,
1226         MSR_IA32_VMX_EPT_VPID_CAP,
1227         MSR_IA32_VMX_VMFUNC,
1228
1229         MSR_F10H_DECFG,
1230         MSR_IA32_UCODE_REV,
1231         MSR_IA32_ARCH_CAPABILITIES,
1232 };
1233
1234 static unsigned int num_msr_based_features;
1235
1236 static u64 kvm_get_arch_capabilities(void)
1237 {
1238         u64 data = 0;
1239
1240         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1241                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1242
1243         /*
1244          * If we're doing cache flushes (either "always" or "cond")
1245          * we will do one whenever the guest does a vmlaunch/vmresume.
1246          * If an outer hypervisor is doing the cache flush for us
1247          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1248          * capability to the guest too, and if EPT is disabled we're not
1249          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1250          * require a nested hypervisor to do a flush of its own.
1251          */
1252         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1253                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1254
1255         return data;
1256 }
1257
1258 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1259 {
1260         switch (msr->index) {
1261         case MSR_IA32_ARCH_CAPABILITIES:
1262                 msr->data = kvm_get_arch_capabilities();
1263                 break;
1264         case MSR_IA32_UCODE_REV:
1265                 rdmsrl_safe(msr->index, &msr->data);
1266                 break;
1267         default:
1268                 if (kvm_x86_ops->get_msr_feature(msr))
1269                         return 1;
1270         }
1271         return 0;
1272 }
1273
1274 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1275 {
1276         struct kvm_msr_entry msr;
1277         int r;
1278
1279         msr.index = index;
1280         r = kvm_get_msr_feature(&msr);
1281         if (r)
1282                 return r;
1283
1284         *data = msr.data;
1285
1286         return 0;
1287 }
1288
1289 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1290 {
1291         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1292                 return false;
1293
1294         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1295                 return false;
1296
1297         if (efer & (EFER_LME | EFER_LMA) &&
1298             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1299                 return false;
1300
1301         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1302                 return false;
1303
1304         return true;
1305
1306 }
1307 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1308 {
1309         if (efer & efer_reserved_bits)
1310                 return false;
1311
1312         return __kvm_valid_efer(vcpu, efer);
1313 }
1314 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1315
1316 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1317 {
1318         u64 old_efer = vcpu->arch.efer;
1319         u64 efer = msr_info->data;
1320
1321         if (efer & efer_reserved_bits)
1322                 return 1;
1323
1324         if (!msr_info->host_initiated) {
1325                 if (!__kvm_valid_efer(vcpu, efer))
1326                         return 1;
1327
1328                 if (is_paging(vcpu) &&
1329                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1330                         return 1;
1331         }
1332
1333         efer &= ~EFER_LMA;
1334         efer |= vcpu->arch.efer & EFER_LMA;
1335
1336         kvm_x86_ops->set_efer(vcpu, efer);
1337
1338         /* Update reserved bits */
1339         if ((efer ^ old_efer) & EFER_NX)
1340                 kvm_mmu_reset_context(vcpu);
1341
1342         return 0;
1343 }
1344
1345 void kvm_enable_efer_bits(u64 mask)
1346 {
1347        efer_reserved_bits &= ~mask;
1348 }
1349 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1350
1351 /*
1352  * Writes msr value into into the appropriate "register".
1353  * Returns 0 on success, non-0 otherwise.
1354  * Assumes vcpu_load() was already called.
1355  */
1356 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1357 {
1358         switch (msr->index) {
1359         case MSR_FS_BASE:
1360         case MSR_GS_BASE:
1361         case MSR_KERNEL_GS_BASE:
1362         case MSR_CSTAR:
1363         case MSR_LSTAR:
1364                 if (is_noncanonical_address(msr->data, vcpu))
1365                         return 1;
1366                 break;
1367         case MSR_IA32_SYSENTER_EIP:
1368         case MSR_IA32_SYSENTER_ESP:
1369                 /*
1370                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1371                  * non-canonical address is written on Intel but not on
1372                  * AMD (which ignores the top 32-bits, because it does
1373                  * not implement 64-bit SYSENTER).
1374                  *
1375                  * 64-bit code should hence be able to write a non-canonical
1376                  * value on AMD.  Making the address canonical ensures that
1377                  * vmentry does not fail on Intel after writing a non-canonical
1378                  * value, and that something deterministic happens if the guest
1379                  * invokes 64-bit SYSENTER.
1380                  */
1381                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1382         }
1383         return kvm_x86_ops->set_msr(vcpu, msr);
1384 }
1385 EXPORT_SYMBOL_GPL(kvm_set_msr);
1386
1387 /*
1388  * Adapt set_msr() to msr_io()'s calling convention
1389  */
1390 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1391 {
1392         struct msr_data msr;
1393         int r;
1394
1395         msr.index = index;
1396         msr.host_initiated = true;
1397         r = kvm_get_msr(vcpu, &msr);
1398         if (r)
1399                 return r;
1400
1401         *data = msr.data;
1402         return 0;
1403 }
1404
1405 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1406 {
1407         struct msr_data msr;
1408
1409         msr.data = *data;
1410         msr.index = index;
1411         msr.host_initiated = true;
1412         return kvm_set_msr(vcpu, &msr);
1413 }
1414
1415 #ifdef CONFIG_X86_64
1416 struct pvclock_gtod_data {
1417         seqcount_t      seq;
1418
1419         struct { /* extract of a clocksource struct */
1420                 int vclock_mode;
1421                 u64     cycle_last;
1422                 u64     mask;
1423                 u32     mult;
1424                 u32     shift;
1425         } clock;
1426
1427         u64             boot_ns;
1428         u64             nsec_base;
1429         u64             wall_time_sec;
1430 };
1431
1432 static struct pvclock_gtod_data pvclock_gtod_data;
1433
1434 static void update_pvclock_gtod(struct timekeeper *tk)
1435 {
1436         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1437         u64 boot_ns;
1438
1439         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1440
1441         write_seqcount_begin(&vdata->seq);
1442
1443         /* copy pvclock gtod data */
1444         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1445         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1446         vdata->clock.mask               = tk->tkr_mono.mask;
1447         vdata->clock.mult               = tk->tkr_mono.mult;
1448         vdata->clock.shift              = tk->tkr_mono.shift;
1449
1450         vdata->boot_ns                  = boot_ns;
1451         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1452
1453         vdata->wall_time_sec            = tk->xtime_sec;
1454
1455         write_seqcount_end(&vdata->seq);
1456 }
1457 #endif
1458
1459 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1460 {
1461         /*
1462          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1463          * vcpu_enter_guest.  This function is only called from
1464          * the physical CPU that is running vcpu.
1465          */
1466         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1467 }
1468
1469 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1470 {
1471         int version;
1472         int r;
1473         struct pvclock_wall_clock wc;
1474         struct timespec64 boot;
1475
1476         if (!wall_clock)
1477                 return;
1478
1479         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1480         if (r)
1481                 return;
1482
1483         if (version & 1)
1484                 ++version;  /* first time write, random junk */
1485
1486         ++version;
1487
1488         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1489                 return;
1490
1491         /*
1492          * The guest calculates current wall clock time by adding
1493          * system time (updated by kvm_guest_time_update below) to the
1494          * wall clock specified here.  guest system time equals host
1495          * system time for us, thus we must fill in host boot time here.
1496          */
1497         getboottime64(&boot);
1498
1499         if (kvm->arch.kvmclock_offset) {
1500                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1501                 boot = timespec64_sub(boot, ts);
1502         }
1503         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1504         wc.nsec = boot.tv_nsec;
1505         wc.version = version;
1506
1507         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1508
1509         version++;
1510         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1511 }
1512
1513 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1514 {
1515         do_shl32_div32(dividend, divisor);
1516         return dividend;
1517 }
1518
1519 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1520                                s8 *pshift, u32 *pmultiplier)
1521 {
1522         uint64_t scaled64;
1523         int32_t  shift = 0;
1524         uint64_t tps64;
1525         uint32_t tps32;
1526
1527         tps64 = base_hz;
1528         scaled64 = scaled_hz;
1529         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1530                 tps64 >>= 1;
1531                 shift--;
1532         }
1533
1534         tps32 = (uint32_t)tps64;
1535         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1536                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1537                         scaled64 >>= 1;
1538                 else
1539                         tps32 <<= 1;
1540                 shift++;
1541         }
1542
1543         *pshift = shift;
1544         *pmultiplier = div_frac(scaled64, tps32);
1545
1546         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1547                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1548 }
1549
1550 #ifdef CONFIG_X86_64
1551 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1552 #endif
1553
1554 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1555 static unsigned long max_tsc_khz;
1556
1557 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1558 {
1559         u64 v = (u64)khz * (1000000 + ppm);
1560         do_div(v, 1000000);
1561         return v;
1562 }
1563
1564 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1565 {
1566         u64 ratio;
1567
1568         /* Guest TSC same frequency as host TSC? */
1569         if (!scale) {
1570                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1571                 return 0;
1572         }
1573
1574         /* TSC scaling supported? */
1575         if (!kvm_has_tsc_control) {
1576                 if (user_tsc_khz > tsc_khz) {
1577                         vcpu->arch.tsc_catchup = 1;
1578                         vcpu->arch.tsc_always_catchup = 1;
1579                         return 0;
1580                 } else {
1581                         WARN(1, "user requested TSC rate below hardware speed\n");
1582                         return -1;
1583                 }
1584         }
1585
1586         /* TSC scaling required  - calculate ratio */
1587         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1588                                 user_tsc_khz, tsc_khz);
1589
1590         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1591                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1592                           user_tsc_khz);
1593                 return -1;
1594         }
1595
1596         vcpu->arch.tsc_scaling_ratio = ratio;
1597         return 0;
1598 }
1599
1600 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1601 {
1602         u32 thresh_lo, thresh_hi;
1603         int use_scaling = 0;
1604
1605         /* tsc_khz can be zero if TSC calibration fails */
1606         if (user_tsc_khz == 0) {
1607                 /* set tsc_scaling_ratio to a safe value */
1608                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1609                 return -1;
1610         }
1611
1612         /* Compute a scale to convert nanoseconds in TSC cycles */
1613         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1614                            &vcpu->arch.virtual_tsc_shift,
1615                            &vcpu->arch.virtual_tsc_mult);
1616         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1617
1618         /*
1619          * Compute the variation in TSC rate which is acceptable
1620          * within the range of tolerance and decide if the
1621          * rate being applied is within that bounds of the hardware
1622          * rate.  If so, no scaling or compensation need be done.
1623          */
1624         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1625         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1626         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1627                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1628                 use_scaling = 1;
1629         }
1630         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1631 }
1632
1633 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1634 {
1635         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1636                                       vcpu->arch.virtual_tsc_mult,
1637                                       vcpu->arch.virtual_tsc_shift);
1638         tsc += vcpu->arch.this_tsc_write;
1639         return tsc;
1640 }
1641
1642 static inline int gtod_is_based_on_tsc(int mode)
1643 {
1644         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1645 }
1646
1647 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1648 {
1649 #ifdef CONFIG_X86_64
1650         bool vcpus_matched;
1651         struct kvm_arch *ka = &vcpu->kvm->arch;
1652         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1653
1654         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1655                          atomic_read(&vcpu->kvm->online_vcpus));
1656
1657         /*
1658          * Once the masterclock is enabled, always perform request in
1659          * order to update it.
1660          *
1661          * In order to enable masterclock, the host clocksource must be TSC
1662          * and the vcpus need to have matched TSCs.  When that happens,
1663          * perform request to enable masterclock.
1664          */
1665         if (ka->use_master_clock ||
1666             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1667                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1668
1669         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1670                             atomic_read(&vcpu->kvm->online_vcpus),
1671                             ka->use_master_clock, gtod->clock.vclock_mode);
1672 #endif
1673 }
1674
1675 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1676 {
1677         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1678         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1679 }
1680
1681 /*
1682  * Multiply tsc by a fixed point number represented by ratio.
1683  *
1684  * The most significant 64-N bits (mult) of ratio represent the
1685  * integral part of the fixed point number; the remaining N bits
1686  * (frac) represent the fractional part, ie. ratio represents a fixed
1687  * point number (mult + frac * 2^(-N)).
1688  *
1689  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1690  */
1691 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1692 {
1693         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1694 }
1695
1696 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1697 {
1698         u64 _tsc = tsc;
1699         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1700
1701         if (ratio != kvm_default_tsc_scaling_ratio)
1702                 _tsc = __scale_tsc(ratio, tsc);
1703
1704         return _tsc;
1705 }
1706 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1707
1708 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1709 {
1710         u64 tsc;
1711
1712         tsc = kvm_scale_tsc(vcpu, rdtsc());
1713
1714         return target_tsc - tsc;
1715 }
1716
1717 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1718 {
1719         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1720
1721         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1722 }
1723 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1724
1725 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1726 {
1727         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1728 }
1729
1730 static inline bool kvm_check_tsc_unstable(void)
1731 {
1732 #ifdef CONFIG_X86_64
1733         /*
1734          * TSC is marked unstable when we're running on Hyper-V,
1735          * 'TSC page' clocksource is good.
1736          */
1737         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1738                 return false;
1739 #endif
1740         return check_tsc_unstable();
1741 }
1742
1743 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1744 {
1745         struct kvm *kvm = vcpu->kvm;
1746         u64 offset, ns, elapsed;
1747         unsigned long flags;
1748         bool matched;
1749         bool already_matched;
1750         u64 data = msr->data;
1751         bool synchronizing = false;
1752
1753         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1754         offset = kvm_compute_tsc_offset(vcpu, data);
1755         ns = ktime_get_boot_ns();
1756         elapsed = ns - kvm->arch.last_tsc_nsec;
1757
1758         if (vcpu->arch.virtual_tsc_khz) {
1759                 if (data == 0 && msr->host_initiated) {
1760                         /*
1761                          * detection of vcpu initialization -- need to sync
1762                          * with other vCPUs. This particularly helps to keep
1763                          * kvm_clock stable after CPU hotplug
1764                          */
1765                         synchronizing = true;
1766                 } else {
1767                         u64 tsc_exp = kvm->arch.last_tsc_write +
1768                                                 nsec_to_cycles(vcpu, elapsed);
1769                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1770                         /*
1771                          * Special case: TSC write with a small delta (1 second)
1772                          * of virtual cycle time against real time is
1773                          * interpreted as an attempt to synchronize the CPU.
1774                          */
1775                         synchronizing = data < tsc_exp + tsc_hz &&
1776                                         data + tsc_hz > tsc_exp;
1777                 }
1778         }
1779
1780         /*
1781          * For a reliable TSC, we can match TSC offsets, and for an unstable
1782          * TSC, we add elapsed time in this computation.  We could let the
1783          * compensation code attempt to catch up if we fall behind, but
1784          * it's better to try to match offsets from the beginning.
1785          */
1786         if (synchronizing &&
1787             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1788                 if (!kvm_check_tsc_unstable()) {
1789                         offset = kvm->arch.cur_tsc_offset;
1790                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1791                 } else {
1792                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1793                         data += delta;
1794                         offset = kvm_compute_tsc_offset(vcpu, data);
1795                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1796                 }
1797                 matched = true;
1798                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1799         } else {
1800                 /*
1801                  * We split periods of matched TSC writes into generations.
1802                  * For each generation, we track the original measured
1803                  * nanosecond time, offset, and write, so if TSCs are in
1804                  * sync, we can match exact offset, and if not, we can match
1805                  * exact software computation in compute_guest_tsc()
1806                  *
1807                  * These values are tracked in kvm->arch.cur_xxx variables.
1808                  */
1809                 kvm->arch.cur_tsc_generation++;
1810                 kvm->arch.cur_tsc_nsec = ns;
1811                 kvm->arch.cur_tsc_write = data;
1812                 kvm->arch.cur_tsc_offset = offset;
1813                 matched = false;
1814                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1815                          kvm->arch.cur_tsc_generation, data);
1816         }
1817
1818         /*
1819          * We also track th most recent recorded KHZ, write and time to
1820          * allow the matching interval to be extended at each write.
1821          */
1822         kvm->arch.last_tsc_nsec = ns;
1823         kvm->arch.last_tsc_write = data;
1824         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1825
1826         vcpu->arch.last_guest_tsc = data;
1827
1828         /* Keep track of which generation this VCPU has synchronized to */
1829         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1830         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1831         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1832
1833         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1834                 update_ia32_tsc_adjust_msr(vcpu, offset);
1835
1836         kvm_vcpu_write_tsc_offset(vcpu, offset);
1837         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1838
1839         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1840         if (!matched) {
1841                 kvm->arch.nr_vcpus_matched_tsc = 0;
1842         } else if (!already_matched) {
1843                 kvm->arch.nr_vcpus_matched_tsc++;
1844         }
1845
1846         kvm_track_tsc_matching(vcpu);
1847         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1848 }
1849
1850 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1851
1852 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1853                                            s64 adjustment)
1854 {
1855         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1856         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1857 }
1858
1859 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1860 {
1861         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1862                 WARN_ON(adjustment < 0);
1863         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1864         adjust_tsc_offset_guest(vcpu, adjustment);
1865 }
1866
1867 #ifdef CONFIG_X86_64
1868
1869 static u64 read_tsc(void)
1870 {
1871         u64 ret = (u64)rdtsc_ordered();
1872         u64 last = pvclock_gtod_data.clock.cycle_last;
1873
1874         if (likely(ret >= last))
1875                 return ret;
1876
1877         /*
1878          * GCC likes to generate cmov here, but this branch is extremely
1879          * predictable (it's just a function of time and the likely is
1880          * very likely) and there's a data dependence, so force GCC
1881          * to generate a branch instead.  I don't barrier() because
1882          * we don't actually need a barrier, and if this function
1883          * ever gets inlined it will generate worse code.
1884          */
1885         asm volatile ("");
1886         return last;
1887 }
1888
1889 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1890 {
1891         long v;
1892         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1893         u64 tsc_pg_val;
1894
1895         switch (gtod->clock.vclock_mode) {
1896         case VCLOCK_HVCLOCK:
1897                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1898                                                   tsc_timestamp);
1899                 if (tsc_pg_val != U64_MAX) {
1900                         /* TSC page valid */
1901                         *mode = VCLOCK_HVCLOCK;
1902                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1903                                 gtod->clock.mask;
1904                 } else {
1905                         /* TSC page invalid */
1906                         *mode = VCLOCK_NONE;
1907                 }
1908                 break;
1909         case VCLOCK_TSC:
1910                 *mode = VCLOCK_TSC;
1911                 *tsc_timestamp = read_tsc();
1912                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1913                         gtod->clock.mask;
1914                 break;
1915         default:
1916                 *mode = VCLOCK_NONE;
1917         }
1918
1919         if (*mode == VCLOCK_NONE)
1920                 *tsc_timestamp = v = 0;
1921
1922         return v * gtod->clock.mult;
1923 }
1924
1925 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1926 {
1927         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1928         unsigned long seq;
1929         int mode;
1930         u64 ns;
1931
1932         do {
1933                 seq = read_seqcount_begin(&gtod->seq);
1934                 ns = gtod->nsec_base;
1935                 ns += vgettsc(tsc_timestamp, &mode);
1936                 ns >>= gtod->clock.shift;
1937                 ns += gtod->boot_ns;
1938         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1939         *t = ns;
1940
1941         return mode;
1942 }
1943
1944 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1945 {
1946         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1947         unsigned long seq;
1948         int mode;
1949         u64 ns;
1950
1951         do {
1952                 seq = read_seqcount_begin(&gtod->seq);
1953                 ts->tv_sec = gtod->wall_time_sec;
1954                 ns = gtod->nsec_base;
1955                 ns += vgettsc(tsc_timestamp, &mode);
1956                 ns >>= gtod->clock.shift;
1957         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1958
1959         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1960         ts->tv_nsec = ns;
1961
1962         return mode;
1963 }
1964
1965 /* returns true if host is using TSC based clocksource */
1966 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1967 {
1968         /* checked again under seqlock below */
1969         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1970                 return false;
1971
1972         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1973                                                       tsc_timestamp));
1974 }
1975
1976 /* returns true if host is using TSC based clocksource */
1977 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1978                                            u64 *tsc_timestamp)
1979 {
1980         /* checked again under seqlock below */
1981         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1982                 return false;
1983
1984         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1985 }
1986 #endif
1987
1988 /*
1989  *
1990  * Assuming a stable TSC across physical CPUS, and a stable TSC
1991  * across virtual CPUs, the following condition is possible.
1992  * Each numbered line represents an event visible to both
1993  * CPUs at the next numbered event.
1994  *
1995  * "timespecX" represents host monotonic time. "tscX" represents
1996  * RDTSC value.
1997  *
1998  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1999  *
2000  * 1.  read timespec0,tsc0
2001  * 2.                                   | timespec1 = timespec0 + N
2002  *                                      | tsc1 = tsc0 + M
2003  * 3. transition to guest               | transition to guest
2004  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2005  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2006  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2007  *
2008  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2009  *
2010  *      - ret0 < ret1
2011  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2012  *              ...
2013  *      - 0 < N - M => M < N
2014  *
2015  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2016  * always the case (the difference between two distinct xtime instances
2017  * might be smaller then the difference between corresponding TSC reads,
2018  * when updating guest vcpus pvclock areas).
2019  *
2020  * To avoid that problem, do not allow visibility of distinct
2021  * system_timestamp/tsc_timestamp values simultaneously: use a master
2022  * copy of host monotonic time values. Update that master copy
2023  * in lockstep.
2024  *
2025  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2026  *
2027  */
2028
2029 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2030 {
2031 #ifdef CONFIG_X86_64
2032         struct kvm_arch *ka = &kvm->arch;
2033         int vclock_mode;
2034         bool host_tsc_clocksource, vcpus_matched;
2035
2036         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2037                         atomic_read(&kvm->online_vcpus));
2038
2039         /*
2040          * If the host uses TSC clock, then passthrough TSC as stable
2041          * to the guest.
2042          */
2043         host_tsc_clocksource = kvm_get_time_and_clockread(
2044                                         &ka->master_kernel_ns,
2045                                         &ka->master_cycle_now);
2046
2047         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2048                                 && !ka->backwards_tsc_observed
2049                                 && !ka->boot_vcpu_runs_old_kvmclock;
2050
2051         if (ka->use_master_clock)
2052                 atomic_set(&kvm_guest_has_master_clock, 1);
2053
2054         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2055         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2056                                         vcpus_matched);
2057 #endif
2058 }
2059
2060 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2061 {
2062         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2063 }
2064
2065 static void kvm_gen_update_masterclock(struct kvm *kvm)
2066 {
2067 #ifdef CONFIG_X86_64
2068         int i;
2069         struct kvm_vcpu *vcpu;
2070         struct kvm_arch *ka = &kvm->arch;
2071
2072         spin_lock(&ka->pvclock_gtod_sync_lock);
2073         kvm_make_mclock_inprogress_request(kvm);
2074         /* no guest entries from this point */
2075         pvclock_update_vm_gtod_copy(kvm);
2076
2077         kvm_for_each_vcpu(i, vcpu, kvm)
2078                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2079
2080         /* guest entries allowed */
2081         kvm_for_each_vcpu(i, vcpu, kvm)
2082                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2083
2084         spin_unlock(&ka->pvclock_gtod_sync_lock);
2085 #endif
2086 }
2087
2088 u64 get_kvmclock_ns(struct kvm *kvm)
2089 {
2090         struct kvm_arch *ka = &kvm->arch;
2091         struct pvclock_vcpu_time_info hv_clock;
2092         u64 ret;
2093
2094         spin_lock(&ka->pvclock_gtod_sync_lock);
2095         if (!ka->use_master_clock) {
2096                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2097                 return ktime_get_boot_ns() + ka->kvmclock_offset;
2098         }
2099
2100         hv_clock.tsc_timestamp = ka->master_cycle_now;
2101         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2102         spin_unlock(&ka->pvclock_gtod_sync_lock);
2103
2104         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2105         get_cpu();
2106
2107         if (__this_cpu_read(cpu_tsc_khz)) {
2108                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2109                                    &hv_clock.tsc_shift,
2110                                    &hv_clock.tsc_to_system_mul);
2111                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2112         } else
2113                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
2114
2115         put_cpu();
2116
2117         return ret;
2118 }
2119
2120 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2121 {
2122         struct kvm_vcpu_arch *vcpu = &v->arch;
2123         struct pvclock_vcpu_time_info guest_hv_clock;
2124
2125         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2126                 &guest_hv_clock, sizeof(guest_hv_clock))))
2127                 return;
2128
2129         /* This VCPU is paused, but it's legal for a guest to read another
2130          * VCPU's kvmclock, so we really have to follow the specification where
2131          * it says that version is odd if data is being modified, and even after
2132          * it is consistent.
2133          *
2134          * Version field updates must be kept separate.  This is because
2135          * kvm_write_guest_cached might use a "rep movs" instruction, and
2136          * writes within a string instruction are weakly ordered.  So there
2137          * are three writes overall.
2138          *
2139          * As a small optimization, only write the version field in the first
2140          * and third write.  The vcpu->pv_time cache is still valid, because the
2141          * version field is the first in the struct.
2142          */
2143         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2144
2145         if (guest_hv_clock.version & 1)
2146                 ++guest_hv_clock.version;  /* first time write, random junk */
2147
2148         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2149         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2150                                 &vcpu->hv_clock,
2151                                 sizeof(vcpu->hv_clock.version));
2152
2153         smp_wmb();
2154
2155         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2156         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2157
2158         if (vcpu->pvclock_set_guest_stopped_request) {
2159                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2160                 vcpu->pvclock_set_guest_stopped_request = false;
2161         }
2162
2163         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2164
2165         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2166                                 &vcpu->hv_clock,
2167                                 sizeof(vcpu->hv_clock));
2168
2169         smp_wmb();
2170
2171         vcpu->hv_clock.version++;
2172         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2173                                 &vcpu->hv_clock,
2174                                 sizeof(vcpu->hv_clock.version));
2175 }
2176
2177 static int kvm_guest_time_update(struct kvm_vcpu *v)
2178 {
2179         unsigned long flags, tgt_tsc_khz;
2180         struct kvm_vcpu_arch *vcpu = &v->arch;
2181         struct kvm_arch *ka = &v->kvm->arch;
2182         s64 kernel_ns;
2183         u64 tsc_timestamp, host_tsc;
2184         u8 pvclock_flags;
2185         bool use_master_clock;
2186
2187         kernel_ns = 0;
2188         host_tsc = 0;
2189
2190         /*
2191          * If the host uses TSC clock, then passthrough TSC as stable
2192          * to the guest.
2193          */
2194         spin_lock(&ka->pvclock_gtod_sync_lock);
2195         use_master_clock = ka->use_master_clock;
2196         if (use_master_clock) {
2197                 host_tsc = ka->master_cycle_now;
2198                 kernel_ns = ka->master_kernel_ns;
2199         }
2200         spin_unlock(&ka->pvclock_gtod_sync_lock);
2201
2202         /* Keep irq disabled to prevent changes to the clock */
2203         local_irq_save(flags);
2204         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2205         if (unlikely(tgt_tsc_khz == 0)) {
2206                 local_irq_restore(flags);
2207                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2208                 return 1;
2209         }
2210         if (!use_master_clock) {
2211                 host_tsc = rdtsc();
2212                 kernel_ns = ktime_get_boot_ns();
2213         }
2214
2215         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2216
2217         /*
2218          * We may have to catch up the TSC to match elapsed wall clock
2219          * time for two reasons, even if kvmclock is used.
2220          *   1) CPU could have been running below the maximum TSC rate
2221          *   2) Broken TSC compensation resets the base at each VCPU
2222          *      entry to avoid unknown leaps of TSC even when running
2223          *      again on the same CPU.  This may cause apparent elapsed
2224          *      time to disappear, and the guest to stand still or run
2225          *      very slowly.
2226          */
2227         if (vcpu->tsc_catchup) {
2228                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2229                 if (tsc > tsc_timestamp) {
2230                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2231                         tsc_timestamp = tsc;
2232                 }
2233         }
2234
2235         local_irq_restore(flags);
2236
2237         /* With all the info we got, fill in the values */
2238
2239         if (kvm_has_tsc_control)
2240                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2241
2242         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2243                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2244                                    &vcpu->hv_clock.tsc_shift,
2245                                    &vcpu->hv_clock.tsc_to_system_mul);
2246                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2247         }
2248
2249         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2250         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2251         vcpu->last_guest_tsc = tsc_timestamp;
2252
2253         /* If the host uses TSC clocksource, then it is stable */
2254         pvclock_flags = 0;
2255         if (use_master_clock)
2256                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2257
2258         vcpu->hv_clock.flags = pvclock_flags;
2259
2260         if (vcpu->pv_time_enabled)
2261                 kvm_setup_pvclock_page(v);
2262         if (v == kvm_get_vcpu(v->kvm, 0))
2263                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2264         return 0;
2265 }
2266
2267 /*
2268  * kvmclock updates which are isolated to a given vcpu, such as
2269  * vcpu->cpu migration, should not allow system_timestamp from
2270  * the rest of the vcpus to remain static. Otherwise ntp frequency
2271  * correction applies to one vcpu's system_timestamp but not
2272  * the others.
2273  *
2274  * So in those cases, request a kvmclock update for all vcpus.
2275  * We need to rate-limit these requests though, as they can
2276  * considerably slow guests that have a large number of vcpus.
2277  * The time for a remote vcpu to update its kvmclock is bound
2278  * by the delay we use to rate-limit the updates.
2279  */
2280
2281 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2282
2283 static void kvmclock_update_fn(struct work_struct *work)
2284 {
2285         int i;
2286         struct delayed_work *dwork = to_delayed_work(work);
2287         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2288                                            kvmclock_update_work);
2289         struct kvm *kvm = container_of(ka, struct kvm, arch);
2290         struct kvm_vcpu *vcpu;
2291
2292         kvm_for_each_vcpu(i, vcpu, kvm) {
2293                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2294                 kvm_vcpu_kick(vcpu);
2295         }
2296 }
2297
2298 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2299 {
2300         struct kvm *kvm = v->kvm;
2301
2302         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2303         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2304                                         KVMCLOCK_UPDATE_DELAY);
2305 }
2306
2307 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2308
2309 static void kvmclock_sync_fn(struct work_struct *work)
2310 {
2311         struct delayed_work *dwork = to_delayed_work(work);
2312         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2313                                            kvmclock_sync_work);
2314         struct kvm *kvm = container_of(ka, struct kvm, arch);
2315
2316         if (!kvmclock_periodic_sync)
2317                 return;
2318
2319         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2320         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2321                                         KVMCLOCK_SYNC_PERIOD);
2322 }
2323
2324 /*
2325  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2326  */
2327 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2328 {
2329         /* McStatusWrEn enabled? */
2330         if (guest_cpuid_is_amd(vcpu))
2331                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2332
2333         return false;
2334 }
2335
2336 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2337 {
2338         u64 mcg_cap = vcpu->arch.mcg_cap;
2339         unsigned bank_num = mcg_cap & 0xff;
2340         u32 msr = msr_info->index;
2341         u64 data = msr_info->data;
2342
2343         switch (msr) {
2344         case MSR_IA32_MCG_STATUS:
2345                 vcpu->arch.mcg_status = data;
2346                 break;
2347         case MSR_IA32_MCG_CTL:
2348                 if (!(mcg_cap & MCG_CTL_P) &&
2349                     (data || !msr_info->host_initiated))
2350                         return 1;
2351                 if (data != 0 && data != ~(u64)0)
2352                         return 1;
2353                 vcpu->arch.mcg_ctl = data;
2354                 break;
2355         default:
2356                 if (msr >= MSR_IA32_MC0_CTL &&
2357                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2358                         u32 offset = msr - MSR_IA32_MC0_CTL;
2359                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2360                          * some Linux kernels though clear bit 10 in bank 4 to
2361                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2362                          * this to avoid an uncatched #GP in the guest
2363                          */
2364                         if ((offset & 0x3) == 0 &&
2365                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2366                                 return -1;
2367
2368                         /* MCi_STATUS */
2369                         if (!msr_info->host_initiated &&
2370                             (offset & 0x3) == 1 && data != 0) {
2371                                 if (!can_set_mci_status(vcpu))
2372                                         return -1;
2373                         }
2374
2375                         vcpu->arch.mce_banks[offset] = data;
2376                         break;
2377                 }
2378                 return 1;
2379         }
2380         return 0;
2381 }
2382
2383 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2384 {
2385         struct kvm *kvm = vcpu->kvm;
2386         int lm = is_long_mode(vcpu);
2387         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2388                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2389         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2390                 : kvm->arch.xen_hvm_config.blob_size_32;
2391         u32 page_num = data & ~PAGE_MASK;
2392         u64 page_addr = data & PAGE_MASK;
2393         u8 *page;
2394         int r;
2395
2396         r = -E2BIG;
2397         if (page_num >= blob_size)
2398                 goto out;
2399         r = -ENOMEM;
2400         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2401         if (IS_ERR(page)) {
2402                 r = PTR_ERR(page);
2403                 goto out;
2404         }
2405         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2406                 goto out_free;
2407         r = 0;
2408 out_free:
2409         kfree(page);
2410 out:
2411         return r;
2412 }
2413
2414 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2415 {
2416         gpa_t gpa = data & ~0x3f;
2417
2418         /* Bits 3:5 are reserved, Should be zero */
2419         if (data & 0x38)
2420                 return 1;
2421
2422         vcpu->arch.apf.msr_val = data;
2423
2424         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2425                 kvm_clear_async_pf_completion_queue(vcpu);
2426                 kvm_async_pf_hash_reset(vcpu);
2427                 return 0;
2428         }
2429
2430         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2431                                         sizeof(u32)))
2432                 return 1;
2433
2434         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2435         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2436         kvm_async_pf_wakeup_all(vcpu);
2437         return 0;
2438 }
2439
2440 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2441 {
2442         vcpu->arch.pv_time_enabled = false;
2443 }
2444
2445 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2446 {
2447         ++vcpu->stat.tlb_flush;
2448         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2449 }
2450
2451 static void record_steal_time(struct kvm_vcpu *vcpu)
2452 {
2453         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2454                 return;
2455
2456         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2457                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2458                 return;
2459
2460         /*
2461          * Doing a TLB flush here, on the guest's behalf, can avoid
2462          * expensive IPIs.
2463          */
2464         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2465                 kvm_vcpu_flush_tlb(vcpu, false);
2466
2467         if (vcpu->arch.st.steal.version & 1)
2468                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2469
2470         vcpu->arch.st.steal.version += 1;
2471
2472         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2473                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2474
2475         smp_wmb();
2476
2477         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2478                 vcpu->arch.st.last_steal;
2479         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2480
2481         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2482                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2483
2484         smp_wmb();
2485
2486         vcpu->arch.st.steal.version += 1;
2487
2488         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2489                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2490 }
2491
2492 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2493 {
2494         bool pr = false;
2495         u32 msr = msr_info->index;
2496         u64 data = msr_info->data;
2497
2498         switch (msr) {
2499         case MSR_AMD64_NB_CFG:
2500         case MSR_IA32_UCODE_WRITE:
2501         case MSR_VM_HSAVE_PA:
2502         case MSR_AMD64_PATCH_LOADER:
2503         case MSR_AMD64_BU_CFG2:
2504         case MSR_AMD64_DC_CFG:
2505         case MSR_F15H_EX_CFG:
2506                 break;
2507
2508         case MSR_IA32_UCODE_REV:
2509                 if (msr_info->host_initiated)
2510                         vcpu->arch.microcode_version = data;
2511                 break;
2512         case MSR_IA32_ARCH_CAPABILITIES:
2513                 if (!msr_info->host_initiated)
2514                         return 1;
2515                 vcpu->arch.arch_capabilities = data;
2516                 break;
2517         case MSR_EFER:
2518                 return set_efer(vcpu, msr_info);
2519         case MSR_K7_HWCR:
2520                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2521                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2522                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2523
2524                 /* Handle McStatusWrEn */
2525                 if (data == BIT_ULL(18)) {
2526                         vcpu->arch.msr_hwcr = data;
2527                 } else if (data != 0) {
2528                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2529                                     data);
2530                         return 1;
2531                 }
2532                 break;
2533         case MSR_FAM10H_MMIO_CONF_BASE:
2534                 if (data != 0) {
2535                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2536                                     "0x%llx\n", data);
2537                         return 1;
2538                 }
2539                 break;
2540         case MSR_IA32_DEBUGCTLMSR:
2541                 if (!data) {
2542                         /* We support the non-activated case already */
2543                         break;
2544                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2545                         /* Values other than LBR and BTF are vendor-specific,
2546                            thus reserved and should throw a #GP */
2547                         return 1;
2548                 }
2549                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2550                             __func__, data);
2551                 break;
2552         case 0x200 ... 0x2ff:
2553                 return kvm_mtrr_set_msr(vcpu, msr, data);
2554         case MSR_IA32_APICBASE:
2555                 return kvm_set_apic_base(vcpu, msr_info);
2556         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2557                 return kvm_x2apic_msr_write(vcpu, msr, data);
2558         case MSR_IA32_TSCDEADLINE:
2559                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2560                 break;
2561         case MSR_IA32_TSC_ADJUST:
2562                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2563                         if (!msr_info->host_initiated) {
2564                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2565                                 adjust_tsc_offset_guest(vcpu, adj);
2566                         }
2567                         vcpu->arch.ia32_tsc_adjust_msr = data;
2568                 }
2569                 break;
2570         case MSR_IA32_MISC_ENABLE:
2571                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2572                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2573                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2574                                 return 1;
2575                         vcpu->arch.ia32_misc_enable_msr = data;
2576                         kvm_update_cpuid(vcpu);
2577                 } else {
2578                         vcpu->arch.ia32_misc_enable_msr = data;
2579                 }
2580                 break;
2581         case MSR_IA32_SMBASE:
2582                 if (!msr_info->host_initiated)
2583                         return 1;
2584                 vcpu->arch.smbase = data;
2585                 break;
2586         case MSR_IA32_POWER_CTL:
2587                 vcpu->arch.msr_ia32_power_ctl = data;
2588                 break;
2589         case MSR_IA32_TSC:
2590                 kvm_write_tsc(vcpu, msr_info);
2591                 break;
2592         case MSR_SMI_COUNT:
2593                 if (!msr_info->host_initiated)
2594                         return 1;
2595                 vcpu->arch.smi_count = data;
2596                 break;
2597         case MSR_KVM_WALL_CLOCK_NEW:
2598         case MSR_KVM_WALL_CLOCK:
2599                 vcpu->kvm->arch.wall_clock = data;
2600                 kvm_write_wall_clock(vcpu->kvm, data);
2601                 break;
2602         case MSR_KVM_SYSTEM_TIME_NEW:
2603         case MSR_KVM_SYSTEM_TIME: {
2604                 struct kvm_arch *ka = &vcpu->kvm->arch;
2605
2606                 kvmclock_reset(vcpu);
2607
2608                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2609                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2610
2611                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2612                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2613
2614                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2615                 }
2616
2617                 vcpu->arch.time = data;
2618                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2619
2620                 /* we verify if the enable bit is set... */
2621                 if (!(data & 1))
2622                         break;
2623
2624                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2625                      &vcpu->arch.pv_time, data & ~1ULL,
2626                      sizeof(struct pvclock_vcpu_time_info)))
2627                         vcpu->arch.pv_time_enabled = false;
2628                 else
2629                         vcpu->arch.pv_time_enabled = true;
2630
2631                 break;
2632         }
2633         case MSR_KVM_ASYNC_PF_EN:
2634                 if (kvm_pv_enable_async_pf(vcpu, data))
2635                         return 1;
2636                 break;
2637         case MSR_KVM_STEAL_TIME:
2638
2639                 if (unlikely(!sched_info_on()))
2640                         return 1;
2641
2642                 if (data & KVM_STEAL_RESERVED_MASK)
2643                         return 1;
2644
2645                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2646                                                 data & KVM_STEAL_VALID_BITS,
2647                                                 sizeof(struct kvm_steal_time)))
2648                         return 1;
2649
2650                 vcpu->arch.st.msr_val = data;
2651
2652                 if (!(data & KVM_MSR_ENABLED))
2653                         break;
2654
2655                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2656
2657                 break;
2658         case MSR_KVM_PV_EOI_EN:
2659                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2660                         return 1;
2661                 break;
2662
2663         case MSR_KVM_POLL_CONTROL:
2664                 /* only enable bit supported */
2665                 if (data & (-1ULL << 1))
2666                         return 1;
2667
2668                 vcpu->arch.msr_kvm_poll_control = data;
2669                 break;
2670
2671         case MSR_IA32_MCG_CTL:
2672         case MSR_IA32_MCG_STATUS:
2673         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2674                 return set_msr_mce(vcpu, msr_info);
2675
2676         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2677         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2678                 pr = true; /* fall through */
2679         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2680         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2681                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2682                         return kvm_pmu_set_msr(vcpu, msr_info);
2683
2684                 if (pr || data != 0)
2685                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2686                                     "0x%x data 0x%llx\n", msr, data);
2687                 break;
2688         case MSR_K7_CLK_CTL:
2689                 /*
2690                  * Ignore all writes to this no longer documented MSR.
2691                  * Writes are only relevant for old K7 processors,
2692                  * all pre-dating SVM, but a recommended workaround from
2693                  * AMD for these chips. It is possible to specify the
2694                  * affected processor models on the command line, hence
2695                  * the need to ignore the workaround.
2696                  */
2697                 break;
2698         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2699         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2700         case HV_X64_MSR_CRASH_CTL:
2701         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2702         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2703         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2704         case HV_X64_MSR_TSC_EMULATION_STATUS:
2705                 return kvm_hv_set_msr_common(vcpu, msr, data,
2706                                              msr_info->host_initiated);
2707         case MSR_IA32_BBL_CR_CTL3:
2708                 /* Drop writes to this legacy MSR -- see rdmsr
2709                  * counterpart for further detail.
2710                  */
2711                 if (report_ignored_msrs)
2712                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2713                                 msr, data);
2714                 break;
2715         case MSR_AMD64_OSVW_ID_LENGTH:
2716                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2717                         return 1;
2718                 vcpu->arch.osvw.length = data;
2719                 break;
2720         case MSR_AMD64_OSVW_STATUS:
2721                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2722                         return 1;
2723                 vcpu->arch.osvw.status = data;
2724                 break;
2725         case MSR_PLATFORM_INFO:
2726                 if (!msr_info->host_initiated ||
2727                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2728                      cpuid_fault_enabled(vcpu)))
2729                         return 1;
2730                 vcpu->arch.msr_platform_info = data;
2731                 break;
2732         case MSR_MISC_FEATURES_ENABLES:
2733                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2734                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2735                      !supports_cpuid_fault(vcpu)))
2736                         return 1;
2737                 vcpu->arch.msr_misc_features_enables = data;
2738                 break;
2739         default:
2740                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2741                         return xen_hvm_config(vcpu, data);
2742                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2743                         return kvm_pmu_set_msr(vcpu, msr_info);
2744                 if (!ignore_msrs) {
2745                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2746                                     msr, data);
2747                         return 1;
2748                 } else {
2749                         if (report_ignored_msrs)
2750                                 vcpu_unimpl(vcpu,
2751                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2752                                         msr, data);
2753                         break;
2754                 }
2755         }
2756         return 0;
2757 }
2758 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2759
2760
2761 /*
2762  * Reads an msr value (of 'msr_index') into 'pdata'.
2763  * Returns 0 on success, non-0 otherwise.
2764  * Assumes vcpu_load() was already called.
2765  */
2766 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2767 {
2768         return kvm_x86_ops->get_msr(vcpu, msr);
2769 }
2770 EXPORT_SYMBOL_GPL(kvm_get_msr);
2771
2772 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2773 {
2774         u64 data;
2775         u64 mcg_cap = vcpu->arch.mcg_cap;
2776         unsigned bank_num = mcg_cap & 0xff;
2777
2778         switch (msr) {
2779         case MSR_IA32_P5_MC_ADDR:
2780         case MSR_IA32_P5_MC_TYPE:
2781                 data = 0;
2782                 break;
2783         case MSR_IA32_MCG_CAP:
2784                 data = vcpu->arch.mcg_cap;
2785                 break;
2786         case MSR_IA32_MCG_CTL:
2787                 if (!(mcg_cap & MCG_CTL_P) && !host)
2788                         return 1;
2789                 data = vcpu->arch.mcg_ctl;
2790                 break;
2791         case MSR_IA32_MCG_STATUS:
2792                 data = vcpu->arch.mcg_status;
2793                 break;
2794         default:
2795                 if (msr >= MSR_IA32_MC0_CTL &&
2796                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2797                         u32 offset = msr - MSR_IA32_MC0_CTL;
2798                         data = vcpu->arch.mce_banks[offset];
2799                         break;
2800                 }
2801                 return 1;
2802         }
2803         *pdata = data;
2804         return 0;
2805 }
2806
2807 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2808 {
2809         switch (msr_info->index) {
2810         case MSR_IA32_PLATFORM_ID:
2811         case MSR_IA32_EBL_CR_POWERON:
2812         case MSR_IA32_DEBUGCTLMSR:
2813         case MSR_IA32_LASTBRANCHFROMIP:
2814         case MSR_IA32_LASTBRANCHTOIP:
2815         case MSR_IA32_LASTINTFROMIP:
2816         case MSR_IA32_LASTINTTOIP:
2817         case MSR_K8_SYSCFG:
2818         case MSR_K8_TSEG_ADDR:
2819         case MSR_K8_TSEG_MASK:
2820         case MSR_VM_HSAVE_PA:
2821         case MSR_K8_INT_PENDING_MSG:
2822         case MSR_AMD64_NB_CFG:
2823         case MSR_FAM10H_MMIO_CONF_BASE:
2824         case MSR_AMD64_BU_CFG2:
2825         case MSR_IA32_PERF_CTL:
2826         case MSR_AMD64_DC_CFG:
2827         case MSR_F15H_EX_CFG:
2828                 msr_info->data = 0;
2829                 break;
2830         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2831         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2832         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2833         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2834         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2835                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2836                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2837                 msr_info->data = 0;
2838                 break;
2839         case MSR_IA32_UCODE_REV:
2840                 msr_info->data = vcpu->arch.microcode_version;
2841                 break;
2842         case MSR_IA32_ARCH_CAPABILITIES:
2843                 if (!msr_info->host_initiated &&
2844                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2845                         return 1;
2846                 msr_info->data = vcpu->arch.arch_capabilities;
2847                 break;
2848         case MSR_IA32_POWER_CTL:
2849                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2850                 break;
2851         case MSR_IA32_TSC:
2852                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2853                 break;
2854         case MSR_MTRRcap:
2855         case 0x200 ... 0x2ff:
2856                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2857         case 0xcd: /* fsb frequency */
2858                 msr_info->data = 3;
2859                 break;
2860                 /*
2861                  * MSR_EBC_FREQUENCY_ID
2862                  * Conservative value valid for even the basic CPU models.
2863                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2864                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2865                  * and 266MHz for model 3, or 4. Set Core Clock
2866                  * Frequency to System Bus Frequency Ratio to 1 (bits
2867                  * 31:24) even though these are only valid for CPU
2868                  * models > 2, however guests may end up dividing or
2869                  * multiplying by zero otherwise.
2870                  */
2871         case MSR_EBC_FREQUENCY_ID:
2872                 msr_info->data = 1 << 24;
2873                 break;
2874         case MSR_IA32_APICBASE:
2875                 msr_info->data = kvm_get_apic_base(vcpu);
2876                 break;
2877         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2878                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2879                 break;
2880         case MSR_IA32_TSCDEADLINE:
2881                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2882                 break;
2883         case MSR_IA32_TSC_ADJUST:
2884                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2885                 break;
2886         case MSR_IA32_MISC_ENABLE:
2887                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2888                 break;
2889         case MSR_IA32_SMBASE:
2890                 if (!msr_info->host_initiated)
2891                         return 1;
2892                 msr_info->data = vcpu->arch.smbase;
2893                 break;
2894         case MSR_SMI_COUNT:
2895                 msr_info->data = vcpu->arch.smi_count;
2896                 break;
2897         case MSR_IA32_PERF_STATUS:
2898                 /* TSC increment by tick */
2899                 msr_info->data = 1000ULL;
2900                 /* CPU multiplier */
2901                 msr_info->data |= (((uint64_t)4ULL) << 40);
2902                 break;
2903         case MSR_EFER:
2904                 msr_info->data = vcpu->arch.efer;
2905                 break;
2906         case MSR_KVM_WALL_CLOCK:
2907         case MSR_KVM_WALL_CLOCK_NEW:
2908                 msr_info->data = vcpu->kvm->arch.wall_clock;
2909                 break;
2910         case MSR_KVM_SYSTEM_TIME:
2911         case MSR_KVM_SYSTEM_TIME_NEW:
2912                 msr_info->data = vcpu->arch.time;
2913                 break;
2914         case MSR_KVM_ASYNC_PF_EN:
2915                 msr_info->data = vcpu->arch.apf.msr_val;
2916                 break;
2917         case MSR_KVM_STEAL_TIME:
2918                 msr_info->data = vcpu->arch.st.msr_val;
2919                 break;
2920         case MSR_KVM_PV_EOI_EN:
2921                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2922                 break;
2923         case MSR_KVM_POLL_CONTROL:
2924                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
2925                 break;
2926         case MSR_IA32_P5_MC_ADDR:
2927         case MSR_IA32_P5_MC_TYPE:
2928         case MSR_IA32_MCG_CAP:
2929         case MSR_IA32_MCG_CTL:
2930         case MSR_IA32_MCG_STATUS:
2931         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2932                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2933                                    msr_info->host_initiated);
2934         case MSR_K7_CLK_CTL:
2935                 /*
2936                  * Provide expected ramp-up count for K7. All other
2937                  * are set to zero, indicating minimum divisors for
2938                  * every field.
2939                  *
2940                  * This prevents guest kernels on AMD host with CPU
2941                  * type 6, model 8 and higher from exploding due to
2942                  * the rdmsr failing.
2943                  */
2944                 msr_info->data = 0x20000000;
2945                 break;
2946         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2947         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2948         case HV_X64_MSR_CRASH_CTL:
2949         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2950         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2951         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2952         case HV_X64_MSR_TSC_EMULATION_STATUS:
2953                 return kvm_hv_get_msr_common(vcpu,
2954                                              msr_info->index, &msr_info->data,
2955                                              msr_info->host_initiated);
2956                 break;
2957         case MSR_IA32_BBL_CR_CTL3:
2958                 /* This legacy MSR exists but isn't fully documented in current
2959                  * silicon.  It is however accessed by winxp in very narrow
2960                  * scenarios where it sets bit #19, itself documented as
2961                  * a "reserved" bit.  Best effort attempt to source coherent
2962                  * read data here should the balance of the register be
2963                  * interpreted by the guest:
2964                  *
2965                  * L2 cache control register 3: 64GB range, 256KB size,
2966                  * enabled, latency 0x1, configured
2967                  */
2968                 msr_info->data = 0xbe702111;
2969                 break;
2970         case MSR_AMD64_OSVW_ID_LENGTH:
2971                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2972                         return 1;
2973                 msr_info->data = vcpu->arch.osvw.length;
2974                 break;
2975         case MSR_AMD64_OSVW_STATUS:
2976                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2977                         return 1;
2978                 msr_info->data = vcpu->arch.osvw.status;
2979                 break;
2980         case MSR_PLATFORM_INFO:
2981                 if (!msr_info->host_initiated &&
2982                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
2983                         return 1;
2984                 msr_info->data = vcpu->arch.msr_platform_info;
2985                 break;
2986         case MSR_MISC_FEATURES_ENABLES:
2987                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2988                 break;
2989         case MSR_K7_HWCR:
2990                 msr_info->data = vcpu->arch.msr_hwcr;
2991                 break;
2992         default:
2993                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2994                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2995                 if (!ignore_msrs) {
2996                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2997                                                msr_info->index);
2998                         return 1;
2999                 } else {
3000                         if (report_ignored_msrs)
3001                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3002                                         msr_info->index);
3003                         msr_info->data = 0;
3004                 }
3005                 break;
3006         }
3007         return 0;
3008 }
3009 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3010
3011 /*
3012  * Read or write a bunch of msrs. All parameters are kernel addresses.
3013  *
3014  * @return number of msrs set successfully.
3015  */
3016 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3017                     struct kvm_msr_entry *entries,
3018                     int (*do_msr)(struct kvm_vcpu *vcpu,
3019                                   unsigned index, u64 *data))
3020 {
3021         int i;
3022
3023         for (i = 0; i < msrs->nmsrs; ++i)
3024                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3025                         break;
3026
3027         return i;
3028 }
3029
3030 /*
3031  * Read or write a bunch of msrs. Parameters are user addresses.
3032  *
3033  * @return number of msrs set successfully.
3034  */
3035 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3036                   int (*do_msr)(struct kvm_vcpu *vcpu,
3037                                 unsigned index, u64 *data),
3038                   int writeback)
3039 {
3040         struct kvm_msrs msrs;
3041         struct kvm_msr_entry *entries;
3042         int r, n;
3043         unsigned size;
3044
3045         r = -EFAULT;
3046         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3047                 goto out;
3048
3049         r = -E2BIG;
3050         if (msrs.nmsrs >= MAX_IO_MSRS)
3051                 goto out;
3052
3053         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3054         entries = memdup_user(user_msrs->entries, size);
3055         if (IS_ERR(entries)) {
3056                 r = PTR_ERR(entries);
3057                 goto out;
3058         }
3059
3060         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3061         if (r < 0)
3062                 goto out_free;
3063
3064         r = -EFAULT;
3065         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3066                 goto out_free;
3067
3068         r = n;
3069
3070 out_free:
3071         kfree(entries);
3072 out:
3073         return r;
3074 }
3075
3076 static inline bool kvm_can_mwait_in_guest(void)
3077 {
3078         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3079                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3080                 boot_cpu_has(X86_FEATURE_ARAT);
3081 }
3082
3083 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3084 {
3085         int r = 0;
3086
3087         switch (ext) {
3088         case KVM_CAP_IRQCHIP:
3089         case KVM_CAP_HLT:
3090         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3091         case KVM_CAP_SET_TSS_ADDR:
3092         case KVM_CAP_EXT_CPUID:
3093         case KVM_CAP_EXT_EMUL_CPUID:
3094         case KVM_CAP_CLOCKSOURCE:
3095         case KVM_CAP_PIT:
3096         case KVM_CAP_NOP_IO_DELAY:
3097         case KVM_CAP_MP_STATE:
3098         case KVM_CAP_SYNC_MMU:
3099         case KVM_CAP_USER_NMI:
3100         case KVM_CAP_REINJECT_CONTROL:
3101         case KVM_CAP_IRQ_INJECT_STATUS:
3102         case KVM_CAP_IOEVENTFD:
3103         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3104         case KVM_CAP_PIT2:
3105         case KVM_CAP_PIT_STATE2:
3106         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3107         case KVM_CAP_XEN_HVM:
3108         case KVM_CAP_VCPU_EVENTS:
3109         case KVM_CAP_HYPERV:
3110         case KVM_CAP_HYPERV_VAPIC:
3111         case KVM_CAP_HYPERV_SPIN:
3112         case KVM_CAP_HYPERV_SYNIC:
3113         case KVM_CAP_HYPERV_SYNIC2:
3114         case KVM_CAP_HYPERV_VP_INDEX:
3115         case KVM_CAP_HYPERV_EVENTFD:
3116         case KVM_CAP_HYPERV_TLBFLUSH:
3117         case KVM_CAP_HYPERV_SEND_IPI:
3118         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3119         case KVM_CAP_HYPERV_CPUID:
3120         case KVM_CAP_PCI_SEGMENT:
3121         case KVM_CAP_DEBUGREGS:
3122         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3123         case KVM_CAP_XSAVE:
3124         case KVM_CAP_ASYNC_PF:
3125         case KVM_CAP_GET_TSC_KHZ:
3126         case KVM_CAP_KVMCLOCK_CTRL:
3127         case KVM_CAP_READONLY_MEM:
3128         case KVM_CAP_HYPERV_TIME:
3129         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3130         case KVM_CAP_TSC_DEADLINE_TIMER:
3131         case KVM_CAP_DISABLE_QUIRKS:
3132         case KVM_CAP_SET_BOOT_CPU_ID:
3133         case KVM_CAP_SPLIT_IRQCHIP:
3134         case KVM_CAP_IMMEDIATE_EXIT:
3135         case KVM_CAP_PMU_EVENT_FILTER:
3136         case KVM_CAP_GET_MSR_FEATURES:
3137         case KVM_CAP_MSR_PLATFORM_INFO:
3138         case KVM_CAP_EXCEPTION_PAYLOAD:
3139                 r = 1;
3140                 break;
3141         case KVM_CAP_SYNC_REGS:
3142                 r = KVM_SYNC_X86_VALID_FIELDS;
3143                 break;
3144         case KVM_CAP_ADJUST_CLOCK:
3145                 r = KVM_CLOCK_TSC_STABLE;
3146                 break;
3147         case KVM_CAP_X86_DISABLE_EXITS:
3148                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3149                       KVM_X86_DISABLE_EXITS_CSTATE;
3150                 if(kvm_can_mwait_in_guest())
3151                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3152                 break;
3153         case KVM_CAP_X86_SMM:
3154                 /* SMBASE is usually relocated above 1M on modern chipsets,
3155                  * and SMM handlers might indeed rely on 4G segment limits,
3156                  * so do not report SMM to be available if real mode is
3157                  * emulated via vm86 mode.  Still, do not go to great lengths
3158                  * to avoid userspace's usage of the feature, because it is a
3159                  * fringe case that is not enabled except via specific settings
3160                  * of the module parameters.
3161                  */
3162                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3163                 break;
3164         case KVM_CAP_VAPIC:
3165                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3166                 break;
3167         case KVM_CAP_NR_VCPUS:
3168                 r = KVM_SOFT_MAX_VCPUS;
3169                 break;
3170         case KVM_CAP_MAX_VCPUS:
3171                 r = KVM_MAX_VCPUS;
3172                 break;
3173         case KVM_CAP_MAX_VCPU_ID:
3174                 r = KVM_MAX_VCPU_ID;
3175                 break;
3176         case KVM_CAP_PV_MMU:    /* obsolete */
3177                 r = 0;
3178                 break;
3179         case KVM_CAP_MCE:
3180                 r = KVM_MAX_MCE_BANKS;
3181                 break;
3182         case KVM_CAP_XCRS:
3183                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3184                 break;
3185         case KVM_CAP_TSC_CONTROL:
3186                 r = kvm_has_tsc_control;
3187                 break;
3188         case KVM_CAP_X2APIC_API:
3189                 r = KVM_X2APIC_API_VALID_FLAGS;
3190                 break;
3191         case KVM_CAP_NESTED_STATE:
3192                 r = kvm_x86_ops->get_nested_state ?
3193                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3194                 break;
3195         default:
3196                 break;
3197         }
3198         return r;
3199
3200 }
3201
3202 long kvm_arch_dev_ioctl(struct file *filp,
3203                         unsigned int ioctl, unsigned long arg)
3204 {
3205         void __user *argp = (void __user *)arg;
3206         long r;
3207
3208         switch (ioctl) {
3209         case KVM_GET_MSR_INDEX_LIST: {
3210                 struct kvm_msr_list __user *user_msr_list = argp;
3211                 struct kvm_msr_list msr_list;
3212                 unsigned n;
3213
3214                 r = -EFAULT;
3215                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3216                         goto out;
3217                 n = msr_list.nmsrs;
3218                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3219                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3220                         goto out;
3221                 r = -E2BIG;
3222                 if (n < msr_list.nmsrs)
3223                         goto out;
3224                 r = -EFAULT;
3225                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3226                                  num_msrs_to_save * sizeof(u32)))
3227                         goto out;
3228                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3229                                  &emulated_msrs,
3230                                  num_emulated_msrs * sizeof(u32)))
3231                         goto out;
3232                 r = 0;
3233                 break;
3234         }
3235         case KVM_GET_SUPPORTED_CPUID:
3236         case KVM_GET_EMULATED_CPUID: {
3237                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3238                 struct kvm_cpuid2 cpuid;
3239
3240                 r = -EFAULT;
3241                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3242                         goto out;
3243
3244                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3245                                             ioctl);
3246                 if (r)
3247                         goto out;
3248
3249                 r = -EFAULT;
3250                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3251                         goto out;
3252                 r = 0;
3253                 break;
3254         }
3255         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3256                 r = -EFAULT;
3257                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3258                                  sizeof(kvm_mce_cap_supported)))
3259                         goto out;
3260                 r = 0;
3261                 break;
3262         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3263                 struct kvm_msr_list __user *user_msr_list = argp;
3264                 struct kvm_msr_list msr_list;
3265                 unsigned int n;
3266
3267                 r = -EFAULT;
3268                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3269                         goto out;
3270                 n = msr_list.nmsrs;
3271                 msr_list.nmsrs = num_msr_based_features;
3272                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3273                         goto out;
3274                 r = -E2BIG;
3275                 if (n < msr_list.nmsrs)
3276                         goto out;
3277                 r = -EFAULT;
3278                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3279                                  num_msr_based_features * sizeof(u32)))
3280                         goto out;
3281                 r = 0;
3282                 break;
3283         }
3284         case KVM_GET_MSRS:
3285                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3286                 break;
3287         }
3288         default:
3289                 r = -EINVAL;
3290         }
3291 out:
3292         return r;
3293 }
3294
3295 static void wbinvd_ipi(void *garbage)
3296 {
3297         wbinvd();
3298 }
3299
3300 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3301 {
3302         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3303 }
3304
3305 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3306 {
3307         /* Address WBINVD may be executed by guest */
3308         if (need_emulate_wbinvd(vcpu)) {
3309                 if (kvm_x86_ops->has_wbinvd_exit())
3310                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3311                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3312                         smp_call_function_single(vcpu->cpu,
3313                                         wbinvd_ipi, NULL, 1);
3314         }
3315
3316         kvm_x86_ops->vcpu_load(vcpu, cpu);
3317
3318         /* Apply any externally detected TSC adjustments (due to suspend) */
3319         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3320                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3321                 vcpu->arch.tsc_offset_adjustment = 0;
3322                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3323         }
3324
3325         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3326                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3327                                 rdtsc() - vcpu->arch.last_host_tsc;
3328                 if (tsc_delta < 0)
3329                         mark_tsc_unstable("KVM discovered backwards TSC");
3330
3331                 if (kvm_check_tsc_unstable()) {
3332                         u64 offset = kvm_compute_tsc_offset(vcpu,
3333                                                 vcpu->arch.last_guest_tsc);
3334                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3335                         vcpu->arch.tsc_catchup = 1;
3336                 }
3337
3338                 if (kvm_lapic_hv_timer_in_use(vcpu))
3339                         kvm_lapic_restart_hv_timer(vcpu);
3340
3341                 /*
3342                  * On a host with synchronized TSC, there is no need to update
3343                  * kvmclock on vcpu->cpu migration
3344                  */
3345                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3346                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3347                 if (vcpu->cpu != cpu)
3348                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3349                 vcpu->cpu = cpu;
3350         }
3351
3352         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3353 }
3354
3355 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3356 {
3357         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3358                 return;
3359
3360         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3361
3362         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3363                         &vcpu->arch.st.steal.preempted,
3364                         offsetof(struct kvm_steal_time, preempted),
3365                         sizeof(vcpu->arch.st.steal.preempted));
3366 }
3367
3368 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3369 {
3370         int idx;
3371
3372         if (vcpu->preempted)
3373                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3374
3375         /*
3376          * Disable page faults because we're in atomic context here.
3377          * kvm_write_guest_offset_cached() would call might_fault()
3378          * that relies on pagefault_disable() to tell if there's a
3379          * bug. NOTE: the write to guest memory may not go through if
3380          * during postcopy live migration or if there's heavy guest
3381          * paging.
3382          */
3383         pagefault_disable();
3384         /*
3385          * kvm_memslots() will be called by
3386          * kvm_write_guest_offset_cached() so take the srcu lock.
3387          */
3388         idx = srcu_read_lock(&vcpu->kvm->srcu);
3389         kvm_steal_time_set_preempted(vcpu);
3390         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3391         pagefault_enable();
3392         kvm_x86_ops->vcpu_put(vcpu);
3393         vcpu->arch.last_host_tsc = rdtsc();
3394         /*
3395          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3396          * on every vmexit, but if not, we might have a stale dr6 from the
3397          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3398          */
3399         set_debugreg(0, 6);
3400 }
3401
3402 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3403                                     struct kvm_lapic_state *s)
3404 {
3405         if (vcpu->arch.apicv_active)
3406                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3407
3408         return kvm_apic_get_state(vcpu, s);
3409 }
3410
3411 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3412                                     struct kvm_lapic_state *s)
3413 {
3414         int r;
3415
3416         r = kvm_apic_set_state(vcpu, s);
3417         if (r)
3418                 return r;
3419         update_cr8_intercept(vcpu);
3420
3421         return 0;
3422 }
3423
3424 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3425 {
3426         return (!lapic_in_kernel(vcpu) ||
3427                 kvm_apic_accept_pic_intr(vcpu));
3428 }
3429
3430 /*
3431  * if userspace requested an interrupt window, check that the
3432  * interrupt window is open.
3433  *
3434  * No need to exit to userspace if we already have an interrupt queued.
3435  */
3436 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3437 {
3438         return kvm_arch_interrupt_allowed(vcpu) &&
3439                 !kvm_cpu_has_interrupt(vcpu) &&
3440                 !kvm_event_needs_reinjection(vcpu) &&
3441                 kvm_cpu_accept_dm_intr(vcpu);
3442 }
3443
3444 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3445                                     struct kvm_interrupt *irq)
3446 {
3447         if (irq->irq >= KVM_NR_INTERRUPTS)
3448                 return -EINVAL;
3449
3450         if (!irqchip_in_kernel(vcpu->kvm)) {
3451                 kvm_queue_interrupt(vcpu, irq->irq, false);
3452                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3453                 return 0;
3454         }
3455
3456         /*
3457          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3458          * fail for in-kernel 8259.
3459          */
3460         if (pic_in_kernel(vcpu->kvm))
3461                 return -ENXIO;
3462
3463         if (vcpu->arch.pending_external_vector != -1)
3464                 return -EEXIST;
3465
3466         vcpu->arch.pending_external_vector = irq->irq;
3467         kvm_make_request(KVM_REQ_EVENT, vcpu);
3468         return 0;
3469 }
3470
3471 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3472 {
3473         kvm_inject_nmi(vcpu);
3474
3475         return 0;
3476 }
3477
3478 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3479 {
3480         kvm_make_request(KVM_REQ_SMI, vcpu);
3481
3482         return 0;
3483 }
3484
3485 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3486                                            struct kvm_tpr_access_ctl *tac)
3487 {
3488         if (tac->flags)
3489                 return -EINVAL;
3490         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3491         return 0;
3492 }
3493
3494 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3495                                         u64 mcg_cap)
3496 {
3497         int r;
3498         unsigned bank_num = mcg_cap & 0xff, bank;
3499
3500         r = -EINVAL;
3501         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3502                 goto out;
3503         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3504                 goto out;
3505         r = 0;
3506         vcpu->arch.mcg_cap = mcg_cap;
3507         /* Init IA32_MCG_CTL to all 1s */
3508         if (mcg_cap & MCG_CTL_P)
3509                 vcpu->arch.mcg_ctl = ~(u64)0;
3510         /* Init IA32_MCi_CTL to all 1s */
3511         for (bank = 0; bank < bank_num; bank++)
3512                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3513
3514         if (kvm_x86_ops->setup_mce)
3515                 kvm_x86_ops->setup_mce(vcpu);
3516 out:
3517         return r;
3518 }
3519
3520 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3521                                       struct kvm_x86_mce *mce)
3522 {
3523         u64 mcg_cap = vcpu->arch.mcg_cap;
3524         unsigned bank_num = mcg_cap & 0xff;
3525         u64 *banks = vcpu->arch.mce_banks;
3526
3527         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3528                 return -EINVAL;
3529         /*
3530          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3531          * reporting is disabled
3532          */
3533         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3534             vcpu->arch.mcg_ctl != ~(u64)0)
3535                 return 0;
3536         banks += 4 * mce->bank;
3537         /*
3538          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3539          * reporting is disabled for the bank
3540          */
3541         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3542                 return 0;
3543         if (mce->status & MCI_STATUS_UC) {
3544                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3545                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3546                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3547                         return 0;
3548                 }
3549                 if (banks[1] & MCI_STATUS_VAL)
3550                         mce->status |= MCI_STATUS_OVER;
3551                 banks[2] = mce->addr;
3552                 banks[3] = mce->misc;
3553                 vcpu->arch.mcg_status = mce->mcg_status;
3554                 banks[1] = mce->status;
3555                 kvm_queue_exception(vcpu, MC_VECTOR);
3556         } else if (!(banks[1] & MCI_STATUS_VAL)
3557                    || !(banks[1] & MCI_STATUS_UC)) {
3558                 if (banks[1] & MCI_STATUS_VAL)
3559                         mce->status |= MCI_STATUS_OVER;
3560                 banks[2] = mce->addr;
3561                 banks[3] = mce->misc;
3562                 banks[1] = mce->status;
3563         } else
3564                 banks[1] |= MCI_STATUS_OVER;
3565         return 0;
3566 }
3567
3568 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3569                                                struct kvm_vcpu_events *events)
3570 {
3571         process_nmi(vcpu);
3572
3573         /*
3574          * The API doesn't provide the instruction length for software
3575          * exceptions, so don't report them. As long as the guest RIP
3576          * isn't advanced, we should expect to encounter the exception
3577          * again.
3578          */
3579         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3580                 events->exception.injected = 0;
3581                 events->exception.pending = 0;
3582         } else {
3583                 events->exception.injected = vcpu->arch.exception.injected;
3584                 events->exception.pending = vcpu->arch.exception.pending;
3585                 /*
3586                  * For ABI compatibility, deliberately conflate
3587                  * pending and injected exceptions when
3588                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3589                  */
3590                 if (!vcpu->kvm->arch.exception_payload_enabled)
3591                         events->exception.injected |=
3592                                 vcpu->arch.exception.pending;
3593         }
3594         events->exception.nr = vcpu->arch.exception.nr;
3595         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3596         events->exception.error_code = vcpu->arch.exception.error_code;
3597         events->exception_has_payload = vcpu->arch.exception.has_payload;
3598         events->exception_payload = vcpu->arch.exception.payload;
3599
3600         events->interrupt.injected =
3601                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3602         events->interrupt.nr = vcpu->arch.interrupt.nr;
3603         events->interrupt.soft = 0;
3604         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3605
3606         events->nmi.injected = vcpu->arch.nmi_injected;
3607         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3608         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3609         events->nmi.pad = 0;
3610
3611         events->sipi_vector = 0; /* never valid when reporting to user space */
3612
3613         events->smi.smm = is_smm(vcpu);
3614         events->smi.pending = vcpu->arch.smi_pending;
3615         events->smi.smm_inside_nmi =
3616                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3617         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3618
3619         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3620                          | KVM_VCPUEVENT_VALID_SHADOW
3621                          | KVM_VCPUEVENT_VALID_SMM);
3622         if (vcpu->kvm->arch.exception_payload_enabled)
3623                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3624
3625         memset(&events->reserved, 0, sizeof(events->reserved));
3626 }
3627
3628 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3629
3630 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3631                                               struct kvm_vcpu_events *events)
3632 {
3633         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3634                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3635                               | KVM_VCPUEVENT_VALID_SHADOW
3636                               | KVM_VCPUEVENT_VALID_SMM
3637                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3638                 return -EINVAL;
3639
3640         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3641                 if (!vcpu->kvm->arch.exception_payload_enabled)
3642                         return -EINVAL;
3643                 if (events->exception.pending)
3644                         events->exception.injected = 0;
3645                 else
3646                         events->exception_has_payload = 0;
3647         } else {
3648                 events->exception.pending = 0;
3649                 events->exception_has_payload = 0;
3650         }
3651
3652         if ((events->exception.injected || events->exception.pending) &&
3653             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3654                 return -EINVAL;
3655
3656         /* INITs are latched while in SMM */
3657         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3658             (events->smi.smm || events->smi.pending) &&
3659             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3660                 return -EINVAL;
3661
3662         process_nmi(vcpu);
3663         vcpu->arch.exception.injected = events->exception.injected;
3664         vcpu->arch.exception.pending = events->exception.pending;
3665         vcpu->arch.exception.nr = events->exception.nr;
3666         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3667         vcpu->arch.exception.error_code = events->exception.error_code;
3668         vcpu->arch.exception.has_payload = events->exception_has_payload;
3669         vcpu->arch.exception.payload = events->exception_payload;
3670
3671         vcpu->arch.interrupt.injected = events->interrupt.injected;
3672         vcpu->arch.interrupt.nr = events->interrupt.nr;
3673         vcpu->arch.interrupt.soft = events->interrupt.soft;
3674         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3675                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3676                                                   events->interrupt.shadow);
3677
3678         vcpu->arch.nmi_injected = events->nmi.injected;
3679         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3680                 vcpu->arch.nmi_pending = events->nmi.pending;
3681         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3682
3683         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3684             lapic_in_kernel(vcpu))
3685                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3686
3687         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3688                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3689                         if (events->smi.smm)
3690                                 vcpu->arch.hflags |= HF_SMM_MASK;
3691                         else
3692                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3693                         kvm_smm_changed(vcpu);
3694                 }
3695
3696                 vcpu->arch.smi_pending = events->smi.pending;
3697
3698                 if (events->smi.smm) {
3699                         if (events->smi.smm_inside_nmi)
3700                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3701                         else
3702                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3703                         if (lapic_in_kernel(vcpu)) {
3704                                 if (events->smi.latched_init)
3705                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3706                                 else
3707                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3708                         }
3709                 }
3710         }
3711
3712         kvm_make_request(KVM_REQ_EVENT, vcpu);
3713
3714         return 0;
3715 }
3716
3717 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3718                                              struct kvm_debugregs *dbgregs)
3719 {
3720         unsigned long val;
3721
3722         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3723         kvm_get_dr(vcpu, 6, &val);
3724         dbgregs->dr6 = val;
3725         dbgregs->dr7 = vcpu->arch.dr7;
3726         dbgregs->flags = 0;
3727         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3728 }
3729
3730 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3731                                             struct kvm_debugregs *dbgregs)
3732 {
3733         if (dbgregs->flags)
3734                 return -EINVAL;
3735
3736         if (dbgregs->dr6 & ~0xffffffffull)
3737                 return -EINVAL;
3738         if (dbgregs->dr7 & ~0xffffffffull)
3739                 return -EINVAL;
3740
3741         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3742         kvm_update_dr0123(vcpu);
3743         vcpu->arch.dr6 = dbgregs->dr6;
3744         kvm_update_dr6(vcpu);
3745         vcpu->arch.dr7 = dbgregs->dr7;
3746         kvm_update_dr7(vcpu);
3747
3748         return 0;
3749 }
3750
3751 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3752
3753 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3754 {
3755         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3756         u64 xstate_bv = xsave->header.xfeatures;
3757         u64 valid;
3758
3759         /*
3760          * Copy legacy XSAVE area, to avoid complications with CPUID
3761          * leaves 0 and 1 in the loop below.
3762          */
3763         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3764
3765         /* Set XSTATE_BV */
3766         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3767         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3768
3769         /*
3770          * Copy each region from the possibly compacted offset to the
3771          * non-compacted offset.
3772          */
3773         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3774         while (valid) {
3775                 u64 xfeature_mask = valid & -valid;
3776                 int xfeature_nr = fls64(xfeature_mask) - 1;
3777                 void *src = get_xsave_addr(xsave, xfeature_nr);
3778
3779                 if (src) {
3780                         u32 size, offset, ecx, edx;
3781                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3782                                     &size, &offset, &ecx, &edx);
3783                         if (xfeature_nr == XFEATURE_PKRU)
3784                                 memcpy(dest + offset, &vcpu->arch.pkru,
3785                                        sizeof(vcpu->arch.pkru));
3786                         else
3787                                 memcpy(dest + offset, src, size);
3788
3789                 }
3790
3791                 valid -= xfeature_mask;
3792         }
3793 }
3794
3795 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3796 {
3797         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3798         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3799         u64 valid;
3800
3801         /*
3802          * Copy legacy XSAVE area, to avoid complications with CPUID
3803          * leaves 0 and 1 in the loop below.
3804          */
3805         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3806
3807         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3808         xsave->header.xfeatures = xstate_bv;
3809         if (boot_cpu_has(X86_FEATURE_XSAVES))
3810                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3811
3812         /*
3813          * Copy each region from the non-compacted offset to the
3814          * possibly compacted offset.
3815          */
3816         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3817         while (valid) {
3818                 u64 xfeature_mask = valid & -valid;
3819                 int xfeature_nr = fls64(xfeature_mask) - 1;
3820                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3821
3822                 if (dest) {
3823                         u32 size, offset, ecx, edx;
3824                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3825                                     &size, &offset, &ecx, &edx);
3826                         if (xfeature_nr == XFEATURE_PKRU)
3827                                 memcpy(&vcpu->arch.pkru, src + offset,
3828                                        sizeof(vcpu->arch.pkru));
3829                         else
3830                                 memcpy(dest, src + offset, size);
3831                 }
3832
3833                 valid -= xfeature_mask;
3834         }
3835 }
3836
3837 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3838                                          struct kvm_xsave *guest_xsave)
3839 {
3840         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3841                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3842                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3843         } else {
3844                 memcpy(guest_xsave->region,
3845                         &vcpu->arch.guest_fpu->state.fxsave,
3846                         sizeof(struct fxregs_state));
3847                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3848                         XFEATURE_MASK_FPSSE;
3849         }
3850 }
3851
3852 #define XSAVE_MXCSR_OFFSET 24
3853
3854 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3855                                         struct kvm_xsave *guest_xsave)
3856 {
3857         u64 xstate_bv =
3858                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3859         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3860
3861         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3862                 /*
3863                  * Here we allow setting states that are not present in
3864                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3865                  * with old userspace.
3866                  */
3867                 if (xstate_bv & ~kvm_supported_xcr0() ||
3868                         mxcsr & ~mxcsr_feature_mask)
3869                         return -EINVAL;
3870                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3871         } else {
3872                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3873                         mxcsr & ~mxcsr_feature_mask)
3874                         return -EINVAL;
3875                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3876                         guest_xsave->region, sizeof(struct fxregs_state));
3877         }
3878         return 0;
3879 }
3880
3881 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3882                                         struct kvm_xcrs *guest_xcrs)
3883 {
3884         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3885                 guest_xcrs->nr_xcrs = 0;
3886                 return;
3887         }
3888
3889         guest_xcrs->nr_xcrs = 1;
3890         guest_xcrs->flags = 0;
3891         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3892         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3893 }
3894
3895 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3896                                        struct kvm_xcrs *guest_xcrs)
3897 {
3898         int i, r = 0;
3899
3900         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3901                 return -EINVAL;
3902
3903         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3904                 return -EINVAL;
3905
3906         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3907                 /* Only support XCR0 currently */
3908                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3909                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3910                                 guest_xcrs->xcrs[i].value);
3911                         break;
3912                 }
3913         if (r)
3914                 r = -EINVAL;
3915         return r;
3916 }
3917
3918 /*
3919  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3920  * stopped by the hypervisor.  This function will be called from the host only.
3921  * EINVAL is returned when the host attempts to set the flag for a guest that
3922  * does not support pv clocks.
3923  */
3924 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3925 {
3926         if (!vcpu->arch.pv_time_enabled)
3927                 return -EINVAL;
3928         vcpu->arch.pvclock_set_guest_stopped_request = true;
3929         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3930         return 0;
3931 }
3932
3933 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3934                                      struct kvm_enable_cap *cap)
3935 {
3936         int r;
3937         uint16_t vmcs_version;
3938         void __user *user_ptr;
3939
3940         if (cap->flags)
3941                 return -EINVAL;
3942
3943         switch (cap->cap) {
3944         case KVM_CAP_HYPERV_SYNIC2:
3945                 if (cap->args[0])
3946                         return -EINVAL;
3947                 /* fall through */
3948
3949         case KVM_CAP_HYPERV_SYNIC:
3950                 if (!irqchip_in_kernel(vcpu->kvm))
3951                         return -EINVAL;
3952                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3953                                              KVM_CAP_HYPERV_SYNIC2);
3954         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3955                 if (!kvm_x86_ops->nested_enable_evmcs)
3956                         return -ENOTTY;
3957                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
3958                 if (!r) {
3959                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
3960                         if (copy_to_user(user_ptr, &vmcs_version,
3961                                          sizeof(vmcs_version)))
3962                                 r = -EFAULT;
3963                 }
3964                 return r;
3965
3966         default:
3967                 return -EINVAL;
3968         }
3969 }
3970
3971 long kvm_arch_vcpu_ioctl(struct file *filp,
3972                          unsigned int ioctl, unsigned long arg)
3973 {
3974         struct kvm_vcpu *vcpu = filp->private_data;
3975         void __user *argp = (void __user *)arg;
3976         int r;
3977         union {
3978                 struct kvm_lapic_state *lapic;
3979                 struct kvm_xsave *xsave;
3980                 struct kvm_xcrs *xcrs;
3981                 void *buffer;
3982         } u;
3983
3984         vcpu_load(vcpu);
3985
3986         u.buffer = NULL;
3987         switch (ioctl) {
3988         case KVM_GET_LAPIC: {
3989                 r = -EINVAL;
3990                 if (!lapic_in_kernel(vcpu))
3991                         goto out;
3992                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
3993                                 GFP_KERNEL_ACCOUNT);
3994
3995                 r = -ENOMEM;
3996                 if (!u.lapic)
3997                         goto out;
3998                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3999                 if (r)
4000                         goto out;
4001                 r = -EFAULT;
4002                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4003                         goto out;
4004                 r = 0;
4005                 break;
4006         }
4007         case KVM_SET_LAPIC: {
4008                 r = -EINVAL;
4009                 if (!lapic_in_kernel(vcpu))
4010                         goto out;
4011                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4012                 if (IS_ERR(u.lapic)) {
4013                         r = PTR_ERR(u.lapic);
4014                         goto out_nofree;
4015                 }
4016
4017                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4018                 break;
4019         }
4020         case KVM_INTERRUPT: {
4021                 struct kvm_interrupt irq;
4022
4023                 r = -EFAULT;
4024                 if (copy_from_user(&irq, argp, sizeof(irq)))
4025                         goto out;
4026                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4027                 break;
4028         }
4029         case KVM_NMI: {
4030                 r = kvm_vcpu_ioctl_nmi(vcpu);
4031                 break;
4032         }
4033         case KVM_SMI: {
4034                 r = kvm_vcpu_ioctl_smi(vcpu);
4035                 break;
4036         }
4037         case KVM_SET_CPUID: {
4038                 struct kvm_cpuid __user *cpuid_arg = argp;
4039                 struct kvm_cpuid cpuid;
4040
4041                 r = -EFAULT;
4042                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4043                         goto out;
4044                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4045                 break;
4046         }
4047         case KVM_SET_CPUID2: {
4048                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4049                 struct kvm_cpuid2 cpuid;
4050
4051                 r = -EFAULT;
4052                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4053                         goto out;
4054                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4055                                               cpuid_arg->entries);
4056                 break;
4057         }
4058         case KVM_GET_CPUID2: {
4059                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4060                 struct kvm_cpuid2 cpuid;
4061
4062                 r = -EFAULT;
4063                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4064                         goto out;
4065                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4066                                               cpuid_arg->entries);
4067                 if (r)
4068                         goto out;
4069                 r = -EFAULT;
4070                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4071                         goto out;
4072                 r = 0;
4073                 break;
4074         }
4075         case KVM_GET_MSRS: {
4076                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4077                 r = msr_io(vcpu, argp, do_get_msr, 1);
4078                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4079                 break;
4080         }
4081         case KVM_SET_MSRS: {
4082                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4083                 r = msr_io(vcpu, argp, do_set_msr, 0);
4084                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4085                 break;
4086         }
4087         case KVM_TPR_ACCESS_REPORTING: {
4088                 struct kvm_tpr_access_ctl tac;
4089
4090                 r = -EFAULT;
4091                 if (copy_from_user(&tac, argp, sizeof(tac)))
4092                         goto out;
4093                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4094                 if (r)
4095                         goto out;
4096                 r = -EFAULT;
4097                 if (copy_to_user(argp, &tac, sizeof(tac)))
4098                         goto out;
4099                 r = 0;
4100                 break;
4101         };
4102         case KVM_SET_VAPIC_ADDR: {
4103                 struct kvm_vapic_addr va;
4104                 int idx;
4105
4106                 r = -EINVAL;
4107                 if (!lapic_in_kernel(vcpu))
4108                         goto out;
4109                 r = -EFAULT;
4110                 if (copy_from_user(&va, argp, sizeof(va)))
4111                         goto out;
4112                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4113                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4114                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4115                 break;
4116         }
4117         case KVM_X86_SETUP_MCE: {
4118                 u64 mcg_cap;
4119
4120                 r = -EFAULT;
4121                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4122                         goto out;
4123                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4124                 break;
4125         }
4126         case KVM_X86_SET_MCE: {
4127                 struct kvm_x86_mce mce;
4128
4129                 r = -EFAULT;
4130                 if (copy_from_user(&mce, argp, sizeof(mce)))
4131                         goto out;
4132                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4133                 break;
4134         }
4135         case KVM_GET_VCPU_EVENTS: {
4136                 struct kvm_vcpu_events events;
4137
4138                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4139
4140                 r = -EFAULT;
4141                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4142                         break;
4143                 r = 0;
4144                 break;
4145         }
4146         case KVM_SET_VCPU_EVENTS: {
4147                 struct kvm_vcpu_events events;
4148
4149                 r = -EFAULT;
4150                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4151                         break;
4152
4153                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4154                 break;
4155         }
4156         case KVM_GET_DEBUGREGS: {
4157                 struct kvm_debugregs dbgregs;
4158
4159                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4160
4161                 r = -EFAULT;
4162                 if (copy_to_user(argp, &dbgregs,
4163                                  sizeof(struct kvm_debugregs)))
4164                         break;
4165                 r = 0;
4166                 break;
4167         }
4168         case KVM_SET_DEBUGREGS: {
4169                 struct kvm_debugregs dbgregs;
4170
4171                 r = -EFAULT;
4172                 if (copy_from_user(&dbgregs, argp,
4173                                    sizeof(struct kvm_debugregs)))
4174                         break;
4175
4176                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4177                 break;
4178         }
4179         case KVM_GET_XSAVE: {
4180                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4181                 r = -ENOMEM;
4182                 if (!u.xsave)
4183                         break;
4184
4185                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4186
4187                 r = -EFAULT;
4188                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4189                         break;
4190                 r = 0;
4191                 break;
4192         }
4193         case KVM_SET_XSAVE: {
4194                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4195                 if (IS_ERR(u.xsave)) {
4196                         r = PTR_ERR(u.xsave);
4197                         goto out_nofree;
4198                 }
4199
4200                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4201                 break;
4202         }
4203         case KVM_GET_XCRS: {
4204                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4205                 r = -ENOMEM;
4206                 if (!u.xcrs)
4207                         break;
4208
4209                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4210
4211                 r = -EFAULT;
4212                 if (copy_to_user(argp, u.xcrs,
4213                                  sizeof(struct kvm_xcrs)))
4214                         break;
4215                 r = 0;
4216                 break;
4217         }
4218         case KVM_SET_XCRS: {
4219                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4220                 if (IS_ERR(u.xcrs)) {
4221                         r = PTR_ERR(u.xcrs);
4222                         goto out_nofree;
4223                 }
4224
4225                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4226                 break;
4227         }
4228         case KVM_SET_TSC_KHZ: {
4229                 u32 user_tsc_khz;
4230
4231                 r = -EINVAL;
4232                 user_tsc_khz = (u32)arg;
4233
4234                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4235                         goto out;
4236
4237                 if (user_tsc_khz == 0)
4238                         user_tsc_khz = tsc_khz;
4239
4240                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4241                         r = 0;
4242
4243                 goto out;
4244         }
4245         case KVM_GET_TSC_KHZ: {
4246                 r = vcpu->arch.virtual_tsc_khz;
4247                 goto out;
4248         }
4249         case KVM_KVMCLOCK_CTRL: {
4250                 r = kvm_set_guest_paused(vcpu);
4251                 goto out;
4252         }
4253         case KVM_ENABLE_CAP: {
4254                 struct kvm_enable_cap cap;
4255
4256                 r = -EFAULT;
4257                 if (copy_from_user(&cap, argp, sizeof(cap)))
4258                         goto out;
4259                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4260                 break;
4261         }
4262         case KVM_GET_NESTED_STATE: {
4263                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4264                 u32 user_data_size;
4265
4266                 r = -EINVAL;
4267                 if (!kvm_x86_ops->get_nested_state)
4268                         break;
4269
4270                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4271                 r = -EFAULT;
4272                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4273                         break;
4274
4275                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4276                                                   user_data_size);
4277                 if (r < 0)
4278                         break;
4279
4280                 if (r > user_data_size) {
4281                         if (put_user(r, &user_kvm_nested_state->size))
4282                                 r = -EFAULT;
4283                         else
4284                                 r = -E2BIG;
4285                         break;
4286                 }
4287
4288                 r = 0;
4289                 break;
4290         }
4291         case KVM_SET_NESTED_STATE: {
4292                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4293                 struct kvm_nested_state kvm_state;
4294
4295                 r = -EINVAL;
4296                 if (!kvm_x86_ops->set_nested_state)
4297                         break;
4298
4299                 r = -EFAULT;
4300                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4301                         break;
4302
4303                 r = -EINVAL;
4304                 if (kvm_state.size < sizeof(kvm_state))
4305                         break;
4306
4307                 if (kvm_state.flags &
4308                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4309                       | KVM_STATE_NESTED_EVMCS))
4310                         break;
4311
4312                 /* nested_run_pending implies guest_mode.  */
4313                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4314                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4315                         break;
4316
4317                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4318                 break;
4319         }
4320         case KVM_GET_SUPPORTED_HV_CPUID: {
4321                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4322                 struct kvm_cpuid2 cpuid;
4323
4324                 r = -EFAULT;
4325                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4326                         goto out;
4327
4328                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4329                                                 cpuid_arg->entries);
4330                 if (r)
4331                         goto out;
4332
4333                 r = -EFAULT;
4334                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4335                         goto out;
4336                 r = 0;
4337                 break;
4338         }
4339         default:
4340                 r = -EINVAL;
4341         }
4342 out:
4343         kfree(u.buffer);
4344 out_nofree:
4345         vcpu_put(vcpu);
4346         return r;
4347 }
4348
4349 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4350 {
4351         return VM_FAULT_SIGBUS;
4352 }
4353
4354 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4355 {
4356         int ret;
4357
4358         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4359                 return -EINVAL;
4360         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4361         return ret;
4362 }
4363
4364 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4365                                               u64 ident_addr)
4366 {
4367         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4368 }
4369
4370 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4371                                          unsigned long kvm_nr_mmu_pages)
4372 {
4373         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4374                 return -EINVAL;
4375
4376         mutex_lock(&kvm->slots_lock);
4377
4378         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4379         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4380
4381         mutex_unlock(&kvm->slots_lock);
4382         return 0;
4383 }
4384
4385 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4386 {
4387         return kvm->arch.n_max_mmu_pages;
4388 }
4389
4390 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4391 {
4392         struct kvm_pic *pic = kvm->arch.vpic;
4393         int r;
4394
4395         r = 0;
4396         switch (chip->chip_id) {
4397         case KVM_IRQCHIP_PIC_MASTER:
4398                 memcpy(&chip->chip.pic, &pic->pics[0],
4399                         sizeof(struct kvm_pic_state));
4400                 break;
4401         case KVM_IRQCHIP_PIC_SLAVE:
4402                 memcpy(&chip->chip.pic, &pic->pics[1],
4403                         sizeof(struct kvm_pic_state));
4404                 break;
4405         case KVM_IRQCHIP_IOAPIC:
4406                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4407                 break;
4408         default:
4409                 r = -EINVAL;
4410                 break;
4411         }
4412         return r;
4413 }
4414
4415 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4416 {
4417         struct kvm_pic *pic = kvm->arch.vpic;
4418         int r;
4419
4420         r = 0;
4421         switch (chip->chip_id) {
4422         case KVM_IRQCHIP_PIC_MASTER:
4423                 spin_lock(&pic->lock);
4424                 memcpy(&pic->pics[0], &chip->chip.pic,
4425                         sizeof(struct kvm_pic_state));
4426                 spin_unlock(&pic->lock);
4427                 break;
4428         case KVM_IRQCHIP_PIC_SLAVE:
4429                 spin_lock(&pic->lock);
4430                 memcpy(&pic->pics[1], &chip->chip.pic,
4431                         sizeof(struct kvm_pic_state));
4432                 spin_unlock(&pic->lock);
4433                 break;
4434         case KVM_IRQCHIP_IOAPIC:
4435                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4436                 break;
4437         default:
4438                 r = -EINVAL;
4439                 break;
4440         }
4441         kvm_pic_update_irq(pic);
4442         return r;
4443 }
4444
4445 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4446 {
4447         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4448
4449         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4450
4451         mutex_lock(&kps->lock);
4452         memcpy(ps, &kps->channels, sizeof(*ps));
4453         mutex_unlock(&kps->lock);
4454         return 0;
4455 }
4456
4457 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4458 {
4459         int i;
4460         struct kvm_pit *pit = kvm->arch.vpit;
4461
4462         mutex_lock(&pit->pit_state.lock);
4463         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4464         for (i = 0; i < 3; i++)
4465                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4466         mutex_unlock(&pit->pit_state.lock);
4467         return 0;
4468 }
4469
4470 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4471 {
4472         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4473         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4474                 sizeof(ps->channels));
4475         ps->flags = kvm->arch.vpit->pit_state.flags;
4476         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4477         memset(&ps->reserved, 0, sizeof(ps->reserved));
4478         return 0;
4479 }
4480
4481 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4482 {
4483         int start = 0;
4484         int i;
4485         u32 prev_legacy, cur_legacy;
4486         struct kvm_pit *pit = kvm->arch.vpit;
4487
4488         mutex_lock(&pit->pit_state.lock);
4489         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4490         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4491         if (!prev_legacy && cur_legacy)
4492                 start = 1;
4493         memcpy(&pit->pit_state.channels, &ps->channels,
4494                sizeof(pit->pit_state.channels));
4495         pit->pit_state.flags = ps->flags;
4496         for (i = 0; i < 3; i++)
4497                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4498                                    start && i == 0);
4499         mutex_unlock(&pit->pit_state.lock);
4500         return 0;
4501 }
4502
4503 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4504                                  struct kvm_reinject_control *control)
4505 {
4506         struct kvm_pit *pit = kvm->arch.vpit;
4507
4508         if (!pit)
4509                 return -ENXIO;
4510
4511         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4512          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4513          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4514          */
4515         mutex_lock(&pit->pit_state.lock);
4516         kvm_pit_set_reinject(pit, control->pit_reinject);
4517         mutex_unlock(&pit->pit_state.lock);
4518
4519         return 0;
4520 }
4521
4522 /**
4523  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4524  * @kvm: kvm instance
4525  * @log: slot id and address to which we copy the log
4526  *
4527  * Steps 1-4 below provide general overview of dirty page logging. See
4528  * kvm_get_dirty_log_protect() function description for additional details.
4529  *
4530  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4531  * always flush the TLB (step 4) even if previous step failed  and the dirty
4532  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4533  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4534  * writes will be marked dirty for next log read.
4535  *
4536  *   1. Take a snapshot of the bit and clear it if needed.
4537  *   2. Write protect the corresponding page.
4538  *   3. Copy the snapshot to the userspace.
4539  *   4. Flush TLB's if needed.
4540  */
4541 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4542 {
4543         bool flush = false;
4544         int r;
4545
4546         mutex_lock(&kvm->slots_lock);
4547
4548         /*
4549          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4550          */
4551         if (kvm_x86_ops->flush_log_dirty)
4552                 kvm_x86_ops->flush_log_dirty(kvm);
4553
4554         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4555
4556         /*
4557          * All the TLBs can be flushed out of mmu lock, see the comments in
4558          * kvm_mmu_slot_remove_write_access().
4559          */
4560         lockdep_assert_held(&kvm->slots_lock);
4561         if (flush)
4562                 kvm_flush_remote_tlbs(kvm);
4563
4564         mutex_unlock(&kvm->slots_lock);
4565         return r;
4566 }
4567
4568 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4569 {
4570         bool flush = false;
4571         int r;
4572
4573         mutex_lock(&kvm->slots_lock);
4574
4575         /*
4576          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4577          */
4578         if (kvm_x86_ops->flush_log_dirty)
4579                 kvm_x86_ops->flush_log_dirty(kvm);
4580
4581         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4582
4583         /*
4584          * All the TLBs can be flushed out of mmu lock, see the comments in
4585          * kvm_mmu_slot_remove_write_access().
4586          */
4587         lockdep_assert_held(&kvm->slots_lock);
4588         if (flush)
4589                 kvm_flush_remote_tlbs(kvm);
4590
4591         mutex_unlock(&kvm->slots_lock);
4592         return r;
4593 }
4594
4595 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4596                         bool line_status)
4597 {
4598         if (!irqchip_in_kernel(kvm))
4599                 return -ENXIO;
4600
4601         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4602                                         irq_event->irq, irq_event->level,
4603                                         line_status);
4604         return 0;
4605 }
4606
4607 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4608                             struct kvm_enable_cap *cap)
4609 {
4610         int r;
4611
4612         if (cap->flags)
4613                 return -EINVAL;
4614
4615         switch (cap->cap) {
4616         case KVM_CAP_DISABLE_QUIRKS:
4617                 kvm->arch.disabled_quirks = cap->args[0];
4618                 r = 0;
4619                 break;
4620         case KVM_CAP_SPLIT_IRQCHIP: {
4621                 mutex_lock(&kvm->lock);
4622                 r = -EINVAL;
4623                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4624                         goto split_irqchip_unlock;
4625                 r = -EEXIST;
4626                 if (irqchip_in_kernel(kvm))
4627                         goto split_irqchip_unlock;
4628                 if (kvm->created_vcpus)
4629                         goto split_irqchip_unlock;
4630                 r = kvm_setup_empty_irq_routing(kvm);
4631                 if (r)
4632                         goto split_irqchip_unlock;
4633                 /* Pairs with irqchip_in_kernel. */
4634                 smp_wmb();
4635                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4636                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4637                 r = 0;
4638 split_irqchip_unlock:
4639                 mutex_unlock(&kvm->lock);
4640                 break;
4641         }
4642         case KVM_CAP_X2APIC_API:
4643                 r = -EINVAL;
4644                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4645                         break;
4646
4647                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4648                         kvm->arch.x2apic_format = true;
4649                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4650                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4651
4652                 r = 0;
4653                 break;
4654         case KVM_CAP_X86_DISABLE_EXITS:
4655                 r = -EINVAL;
4656                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4657                         break;
4658
4659                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4660                         kvm_can_mwait_in_guest())
4661                         kvm->arch.mwait_in_guest = true;
4662                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4663                         kvm->arch.hlt_in_guest = true;
4664                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4665                         kvm->arch.pause_in_guest = true;
4666                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4667                         kvm->arch.cstate_in_guest = true;
4668                 r = 0;
4669                 break;
4670         case KVM_CAP_MSR_PLATFORM_INFO:
4671                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4672                 r = 0;
4673                 break;
4674         case KVM_CAP_EXCEPTION_PAYLOAD:
4675                 kvm->arch.exception_payload_enabled = cap->args[0];
4676                 r = 0;
4677                 break;
4678         default:
4679                 r = -EINVAL;
4680                 break;
4681         }
4682         return r;
4683 }
4684
4685 long kvm_arch_vm_ioctl(struct file *filp,
4686                        unsigned int ioctl, unsigned long arg)
4687 {
4688         struct kvm *kvm = filp->private_data;
4689         void __user *argp = (void __user *)arg;
4690         int r = -ENOTTY;
4691         /*
4692          * This union makes it completely explicit to gcc-3.x
4693          * that these two variables' stack usage should be
4694          * combined, not added together.
4695          */
4696         union {
4697                 struct kvm_pit_state ps;
4698                 struct kvm_pit_state2 ps2;
4699                 struct kvm_pit_config pit_config;
4700         } u;
4701
4702         switch (ioctl) {
4703         case KVM_SET_TSS_ADDR:
4704                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4705                 break;
4706         case KVM_SET_IDENTITY_MAP_ADDR: {
4707                 u64 ident_addr;
4708
4709                 mutex_lock(&kvm->lock);
4710                 r = -EINVAL;
4711                 if (kvm->created_vcpus)
4712                         goto set_identity_unlock;
4713                 r = -EFAULT;
4714                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4715                         goto set_identity_unlock;
4716                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4717 set_identity_unlock:
4718                 mutex_unlock(&kvm->lock);
4719                 break;
4720         }
4721         case KVM_SET_NR_MMU_PAGES:
4722                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4723                 break;
4724         case KVM_GET_NR_MMU_PAGES:
4725                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4726                 break;
4727         case KVM_CREATE_IRQCHIP: {
4728                 mutex_lock(&kvm->lock);
4729
4730                 r = -EEXIST;
4731                 if (irqchip_in_kernel(kvm))
4732                         goto create_irqchip_unlock;
4733
4734                 r = -EINVAL;
4735                 if (kvm->created_vcpus)
4736                         goto create_irqchip_unlock;
4737
4738                 r = kvm_pic_init(kvm);
4739                 if (r)
4740                         goto create_irqchip_unlock;
4741
4742                 r = kvm_ioapic_init(kvm);
4743                 if (r) {
4744                         kvm_pic_destroy(kvm);
4745                         goto create_irqchip_unlock;
4746                 }
4747
4748                 r = kvm_setup_default_irq_routing(kvm);
4749                 if (r) {
4750                         kvm_ioapic_destroy(kvm);
4751                         kvm_pic_destroy(kvm);
4752                         goto create_irqchip_unlock;
4753                 }
4754                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4755                 smp_wmb();
4756                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4757         create_irqchip_unlock:
4758                 mutex_unlock(&kvm->lock);
4759                 break;
4760         }
4761         case KVM_CREATE_PIT:
4762                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4763                 goto create_pit;
4764         case KVM_CREATE_PIT2:
4765                 r = -EFAULT;
4766                 if (copy_from_user(&u.pit_config, argp,
4767                                    sizeof(struct kvm_pit_config)))
4768                         goto out;
4769         create_pit:
4770                 mutex_lock(&kvm->lock);
4771                 r = -EEXIST;
4772                 if (kvm->arch.vpit)
4773                         goto create_pit_unlock;
4774                 r = -ENOMEM;
4775                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4776                 if (kvm->arch.vpit)
4777                         r = 0;
4778         create_pit_unlock:
4779                 mutex_unlock(&kvm->lock);
4780                 break;
4781         case KVM_GET_IRQCHIP: {
4782                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4783                 struct kvm_irqchip *chip;
4784
4785                 chip = memdup_user(argp, sizeof(*chip));
4786                 if (IS_ERR(chip)) {
4787                         r = PTR_ERR(chip);
4788                         goto out;
4789                 }
4790
4791                 r = -ENXIO;
4792                 if (!irqchip_kernel(kvm))
4793                         goto get_irqchip_out;
4794                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4795                 if (r)
4796                         goto get_irqchip_out;
4797                 r = -EFAULT;
4798                 if (copy_to_user(argp, chip, sizeof(*chip)))
4799                         goto get_irqchip_out;
4800                 r = 0;
4801         get_irqchip_out:
4802                 kfree(chip);
4803                 break;
4804         }
4805         case KVM_SET_IRQCHIP: {
4806                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4807                 struct kvm_irqchip *chip;
4808
4809                 chip = memdup_user(argp, sizeof(*chip));
4810                 if (IS_ERR(chip)) {
4811                         r = PTR_ERR(chip);
4812                         goto out;
4813                 }
4814
4815                 r = -ENXIO;
4816                 if (!irqchip_kernel(kvm))
4817                         goto set_irqchip_out;
4818                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4819                 if (r)
4820                         goto set_irqchip_out;
4821                 r = 0;
4822         set_irqchip_out:
4823                 kfree(chip);
4824                 break;
4825         }
4826         case KVM_GET_PIT: {
4827                 r = -EFAULT;
4828                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4829                         goto out;
4830                 r = -ENXIO;
4831                 if (!kvm->arch.vpit)
4832                         goto out;
4833                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4834                 if (r)
4835                         goto out;
4836                 r = -EFAULT;
4837                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4838                         goto out;
4839                 r = 0;
4840                 break;
4841         }
4842         case KVM_SET_PIT: {
4843                 r = -EFAULT;
4844                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4845                         goto out;
4846                 r = -ENXIO;
4847                 if (!kvm->arch.vpit)
4848                         goto out;
4849                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4850                 break;
4851         }
4852         case KVM_GET_PIT2: {
4853                 r = -ENXIO;
4854                 if (!kvm->arch.vpit)
4855                         goto out;
4856                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4857                 if (r)
4858                         goto out;
4859                 r = -EFAULT;
4860                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4861                         goto out;
4862                 r = 0;
4863                 break;
4864         }
4865         case KVM_SET_PIT2: {
4866                 r = -EFAULT;
4867                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4868                         goto out;
4869                 r = -ENXIO;
4870                 if (!kvm->arch.vpit)
4871                         goto out;
4872                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4873                 break;
4874         }
4875         case KVM_REINJECT_CONTROL: {
4876                 struct kvm_reinject_control control;
4877                 r =  -EFAULT;
4878                 if (copy_from_user(&control, argp, sizeof(control)))
4879                         goto out;
4880                 r = kvm_vm_ioctl_reinject(kvm, &control);
4881                 break;
4882         }
4883         case KVM_SET_BOOT_CPU_ID:
4884                 r = 0;
4885                 mutex_lock(&kvm->lock);
4886                 if (kvm->created_vcpus)
4887                         r = -EBUSY;
4888                 else
4889                         kvm->arch.bsp_vcpu_id = arg;
4890                 mutex_unlock(&kvm->lock);
4891                 break;
4892         case KVM_XEN_HVM_CONFIG: {
4893                 struct kvm_xen_hvm_config xhc;
4894                 r = -EFAULT;
4895                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4896                         goto out;
4897                 r = -EINVAL;
4898                 if (xhc.flags)
4899                         goto out;
4900                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4901                 r = 0;
4902                 break;
4903         }
4904         case KVM_SET_CLOCK: {
4905                 struct kvm_clock_data user_ns;
4906                 u64 now_ns;
4907
4908                 r = -EFAULT;
4909                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4910                         goto out;
4911
4912                 r = -EINVAL;
4913                 if (user_ns.flags)
4914                         goto out;
4915
4916                 r = 0;
4917                 /*
4918                  * TODO: userspace has to take care of races with VCPU_RUN, so
4919                  * kvm_gen_update_masterclock() can be cut down to locked
4920                  * pvclock_update_vm_gtod_copy().
4921                  */
4922                 kvm_gen_update_masterclock(kvm);
4923                 now_ns = get_kvmclock_ns(kvm);
4924                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4925                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4926                 break;
4927         }
4928         case KVM_GET_CLOCK: {
4929                 struct kvm_clock_data user_ns;
4930                 u64 now_ns;
4931
4932                 now_ns = get_kvmclock_ns(kvm);
4933                 user_ns.clock = now_ns;
4934                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4935                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4936
4937                 r = -EFAULT;
4938                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4939                         goto out;
4940                 r = 0;
4941                 break;
4942         }
4943         case KVM_MEMORY_ENCRYPT_OP: {
4944                 r = -ENOTTY;
4945                 if (kvm_x86_ops->mem_enc_op)
4946                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4947                 break;
4948         }
4949         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4950                 struct kvm_enc_region region;
4951
4952                 r = -EFAULT;
4953                 if (copy_from_user(&region, argp, sizeof(region)))
4954                         goto out;
4955
4956                 r = -ENOTTY;
4957                 if (kvm_x86_ops->mem_enc_reg_region)
4958                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4959                 break;
4960         }
4961         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4962                 struct kvm_enc_region region;
4963
4964                 r = -EFAULT;
4965                 if (copy_from_user(&region, argp, sizeof(region)))
4966                         goto out;
4967
4968                 r = -ENOTTY;
4969                 if (kvm_x86_ops->mem_enc_unreg_region)
4970                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4971                 break;
4972         }
4973         case KVM_HYPERV_EVENTFD: {
4974                 struct kvm_hyperv_eventfd hvevfd;
4975
4976                 r = -EFAULT;
4977                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4978                         goto out;
4979                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4980                 break;
4981         }
4982         case KVM_SET_PMU_EVENT_FILTER:
4983                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
4984                 break;
4985         default:
4986                 r = -ENOTTY;
4987         }
4988 out:
4989         return r;
4990 }
4991
4992 static void kvm_init_msr_list(void)
4993 {
4994         u32 dummy[2];
4995         unsigned i, j;
4996
4997         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4998                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4999                         continue;
5000
5001                 /*
5002                  * Even MSRs that are valid in the host may not be exposed
5003                  * to the guests in some cases.
5004                  */
5005                 switch (msrs_to_save[i]) {
5006                 case MSR_IA32_BNDCFGS:
5007                         if (!kvm_mpx_supported())
5008                                 continue;
5009                         break;
5010                 case MSR_TSC_AUX:
5011                         if (!kvm_x86_ops->rdtscp_supported())
5012                                 continue;
5013                         break;
5014                 case MSR_IA32_RTIT_CTL:
5015                 case MSR_IA32_RTIT_STATUS:
5016                         if (!kvm_x86_ops->pt_supported())
5017                                 continue;
5018                         break;
5019                 case MSR_IA32_RTIT_CR3_MATCH:
5020                         if (!kvm_x86_ops->pt_supported() ||
5021                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5022                                 continue;
5023                         break;
5024                 case MSR_IA32_RTIT_OUTPUT_BASE:
5025                 case MSR_IA32_RTIT_OUTPUT_MASK:
5026                         if (!kvm_x86_ops->pt_supported() ||
5027                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5028                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5029                                 continue;
5030                         break;
5031                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5032                         if (!kvm_x86_ops->pt_supported() ||
5033                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5034                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5035                                 continue;
5036                         break;
5037                 }
5038                 default:
5039                         break;
5040                 }
5041
5042                 if (j < i)
5043                         msrs_to_save[j] = msrs_to_save[i];
5044                 j++;
5045         }
5046         num_msrs_to_save = j;
5047
5048         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5049                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5050                         continue;
5051
5052                 if (j < i)
5053                         emulated_msrs[j] = emulated_msrs[i];
5054                 j++;
5055         }
5056         num_emulated_msrs = j;
5057
5058         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5059                 struct kvm_msr_entry msr;
5060
5061                 msr.index = msr_based_features[i];
5062                 if (kvm_get_msr_feature(&msr))
5063                         continue;
5064
5065                 if (j < i)
5066                         msr_based_features[j] = msr_based_features[i];
5067                 j++;
5068         }
5069         num_msr_based_features = j;
5070 }
5071
5072 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5073                            const void *v)
5074 {
5075         int handled = 0;
5076         int n;
5077
5078         do {
5079                 n = min(len, 8);
5080                 if (!(lapic_in_kernel(vcpu) &&
5081                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5082                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5083                         break;
5084                 handled += n;
5085                 addr += n;
5086                 len -= n;
5087                 v += n;
5088         } while (len);
5089
5090         return handled;
5091 }
5092
5093 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5094 {
5095         int handled = 0;
5096         int n;
5097
5098         do {
5099                 n = min(len, 8);
5100                 if (!(lapic_in_kernel(vcpu) &&
5101                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5102                                          addr, n, v))
5103                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5104                         break;
5105                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5106                 handled += n;
5107                 addr += n;
5108                 len -= n;
5109                 v += n;
5110         } while (len);
5111
5112         return handled;
5113 }
5114
5115 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5116                         struct kvm_segment *var, int seg)
5117 {
5118         kvm_x86_ops->set_segment(vcpu, var, seg);
5119 }
5120
5121 void kvm_get_segment(struct kvm_vcpu *vcpu,
5122                      struct kvm_segment *var, int seg)
5123 {
5124         kvm_x86_ops->get_segment(vcpu, var, seg);
5125 }
5126
5127 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5128                            struct x86_exception *exception)
5129 {
5130         gpa_t t_gpa;
5131
5132         BUG_ON(!mmu_is_nested(vcpu));
5133
5134         /* NPT walks are always user-walks */
5135         access |= PFERR_USER_MASK;
5136         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5137
5138         return t_gpa;
5139 }
5140
5141 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5142                               struct x86_exception *exception)
5143 {
5144         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5145         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5146 }
5147
5148  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5149                                 struct x86_exception *exception)
5150 {
5151         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5152         access |= PFERR_FETCH_MASK;
5153         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5154 }
5155
5156 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5157                                struct x86_exception *exception)
5158 {
5159         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5160         access |= PFERR_WRITE_MASK;
5161         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5162 }
5163
5164 /* uses this to access any guest's mapped memory without checking CPL */
5165 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5166                                 struct x86_exception *exception)
5167 {
5168         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5169 }
5170
5171 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5172                                       struct kvm_vcpu *vcpu, u32 access,
5173                                       struct x86_exception *exception)
5174 {
5175         void *data = val;
5176         int r = X86EMUL_CONTINUE;
5177
5178         while (bytes) {
5179                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5180                                                             exception);
5181                 unsigned offset = addr & (PAGE_SIZE-1);
5182                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5183                 int ret;
5184
5185                 if (gpa == UNMAPPED_GVA)
5186                         return X86EMUL_PROPAGATE_FAULT;
5187                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5188                                                offset, toread);
5189                 if (ret < 0) {
5190                         r = X86EMUL_IO_NEEDED;
5191                         goto out;
5192                 }
5193
5194                 bytes -= toread;
5195                 data += toread;
5196                 addr += toread;
5197         }
5198 out:
5199         return r;
5200 }
5201
5202 /* used for instruction fetching */
5203 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5204                                 gva_t addr, void *val, unsigned int bytes,
5205                                 struct x86_exception *exception)
5206 {
5207         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5208         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5209         unsigned offset;
5210         int ret;
5211
5212         /* Inline kvm_read_guest_virt_helper for speed.  */
5213         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5214                                                     exception);
5215         if (unlikely(gpa == UNMAPPED_GVA))
5216                 return X86EMUL_PROPAGATE_FAULT;
5217
5218         offset = addr & (PAGE_SIZE-1);
5219         if (WARN_ON(offset + bytes > PAGE_SIZE))
5220                 bytes = (unsigned)PAGE_SIZE - offset;
5221         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5222                                        offset, bytes);
5223         if (unlikely(ret < 0))
5224                 return X86EMUL_IO_NEEDED;
5225
5226         return X86EMUL_CONTINUE;
5227 }
5228
5229 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5230                                gva_t addr, void *val, unsigned int bytes,
5231                                struct x86_exception *exception)
5232 {
5233         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5234
5235         /*
5236          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5237          * is returned, but our callers are not ready for that and they blindly
5238          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5239          * uninitialized kernel stack memory into cr2 and error code.
5240          */
5241         memset(exception, 0, sizeof(*exception));
5242         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5243                                           exception);
5244 }
5245 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5246
5247 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5248                              gva_t addr, void *val, unsigned int bytes,
5249                              struct x86_exception *exception, bool system)
5250 {
5251         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5252         u32 access = 0;
5253
5254         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5255                 access |= PFERR_USER_MASK;
5256
5257         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5258 }
5259
5260 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5261                 unsigned long addr, void *val, unsigned int bytes)
5262 {
5263         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5264         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5265
5266         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5267 }
5268
5269 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5270                                       struct kvm_vcpu *vcpu, u32 access,
5271                                       struct x86_exception *exception)
5272 {
5273         void *data = val;
5274         int r = X86EMUL_CONTINUE;
5275
5276         while (bytes) {
5277                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5278                                                              access,
5279                                                              exception);
5280                 unsigned offset = addr & (PAGE_SIZE-1);
5281                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5282                 int ret;
5283
5284                 if (gpa == UNMAPPED_GVA)
5285                         return X86EMUL_PROPAGATE_FAULT;
5286                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5287                 if (ret < 0) {
5288                         r = X86EMUL_IO_NEEDED;
5289                         goto out;
5290                 }
5291
5292                 bytes -= towrite;
5293                 data += towrite;
5294                 addr += towrite;
5295         }
5296 out:
5297         return r;
5298 }
5299
5300 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5301                               unsigned int bytes, struct x86_exception *exception,
5302                               bool system)
5303 {
5304         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5305         u32 access = PFERR_WRITE_MASK;
5306
5307         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5308                 access |= PFERR_USER_MASK;
5309
5310         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5311                                            access, exception);
5312 }
5313
5314 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5315                                 unsigned int bytes, struct x86_exception *exception)
5316 {
5317         /* kvm_write_guest_virt_system can pull in tons of pages. */
5318         vcpu->arch.l1tf_flush_l1d = true;
5319
5320         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5321                                            PFERR_WRITE_MASK, exception);
5322 }
5323 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5324
5325 int handle_ud(struct kvm_vcpu *vcpu)
5326 {
5327         int emul_type = EMULTYPE_TRAP_UD;
5328         enum emulation_result er;
5329         char sig[5]; /* ud2; .ascii "kvm" */
5330         struct x86_exception e;
5331
5332         if (force_emulation_prefix &&
5333             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5334                                 sig, sizeof(sig), &e) == 0 &&
5335             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5336                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5337                 emul_type = 0;
5338         }
5339
5340         er = kvm_emulate_instruction(vcpu, emul_type);
5341         if (er == EMULATE_USER_EXIT)
5342                 return 0;
5343         if (er != EMULATE_DONE)
5344                 kvm_queue_exception(vcpu, UD_VECTOR);
5345         return 1;
5346 }
5347 EXPORT_SYMBOL_GPL(handle_ud);
5348
5349 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5350                             gpa_t gpa, bool write)
5351 {
5352         /* For APIC access vmexit */
5353         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5354                 return 1;
5355
5356         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5357                 trace_vcpu_match_mmio(gva, gpa, write, true);
5358                 return 1;
5359         }
5360
5361         return 0;
5362 }
5363
5364 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5365                                 gpa_t *gpa, struct x86_exception *exception,
5366                                 bool write)
5367 {
5368         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5369                 | (write ? PFERR_WRITE_MASK : 0);
5370
5371         /*
5372          * currently PKRU is only applied to ept enabled guest so
5373          * there is no pkey in EPT page table for L1 guest or EPT
5374          * shadow page table for L2 guest.
5375          */
5376         if (vcpu_match_mmio_gva(vcpu, gva)
5377             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5378                                  vcpu->arch.access, 0, access)) {
5379                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5380                                         (gva & (PAGE_SIZE - 1));
5381                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5382                 return 1;
5383         }
5384
5385         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5386
5387         if (*gpa == UNMAPPED_GVA)
5388                 return -1;
5389
5390         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5391 }
5392
5393 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5394                         const void *val, int bytes)
5395 {
5396         int ret;
5397
5398         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5399         if (ret < 0)
5400                 return 0;
5401         kvm_page_track_write(vcpu, gpa, val, bytes);
5402         return 1;
5403 }
5404
5405 struct read_write_emulator_ops {
5406         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5407                                   int bytes);
5408         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5409                                   void *val, int bytes);
5410         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5411                                int bytes, void *val);
5412         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5413                                     void *val, int bytes);
5414         bool write;
5415 };
5416
5417 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5418 {
5419         if (vcpu->mmio_read_completed) {
5420                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5421                                vcpu->mmio_fragments[0].gpa, val);
5422                 vcpu->mmio_read_completed = 0;
5423                 return 1;
5424         }
5425
5426         return 0;
5427 }
5428
5429 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5430                         void *val, int bytes)
5431 {
5432         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5433 }
5434
5435 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5436                          void *val, int bytes)
5437 {
5438         return emulator_write_phys(vcpu, gpa, val, bytes);
5439 }
5440
5441 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5442 {
5443         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5444         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5445 }
5446
5447 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5448                           void *val, int bytes)
5449 {
5450         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5451         return X86EMUL_IO_NEEDED;
5452 }
5453
5454 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5455                            void *val, int bytes)
5456 {
5457         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5458
5459         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5460         return X86EMUL_CONTINUE;
5461 }
5462
5463 static const struct read_write_emulator_ops read_emultor = {
5464         .read_write_prepare = read_prepare,
5465         .read_write_emulate = read_emulate,
5466         .read_write_mmio = vcpu_mmio_read,
5467         .read_write_exit_mmio = read_exit_mmio,
5468 };
5469
5470 static const struct read_write_emulator_ops write_emultor = {
5471         .read_write_emulate = write_emulate,
5472         .read_write_mmio = write_mmio,
5473         .read_write_exit_mmio = write_exit_mmio,
5474         .write = true,
5475 };
5476
5477 static int emulator_read_write_onepage(unsigned long addr, void *val,
5478                                        unsigned int bytes,
5479                                        struct x86_exception *exception,
5480                                        struct kvm_vcpu *vcpu,
5481                                        const struct read_write_emulator_ops *ops)
5482 {
5483         gpa_t gpa;
5484         int handled, ret;
5485         bool write = ops->write;
5486         struct kvm_mmio_fragment *frag;
5487         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5488
5489         /*
5490          * If the exit was due to a NPF we may already have a GPA.
5491          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5492          * Note, this cannot be used on string operations since string
5493          * operation using rep will only have the initial GPA from the NPF
5494          * occurred.
5495          */
5496         if (vcpu->arch.gpa_available &&
5497             emulator_can_use_gpa(ctxt) &&
5498             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5499                 gpa = vcpu->arch.gpa_val;
5500                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5501         } else {
5502                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5503                 if (ret < 0)
5504                         return X86EMUL_PROPAGATE_FAULT;
5505         }
5506
5507         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5508                 return X86EMUL_CONTINUE;
5509
5510         /*
5511          * Is this MMIO handled locally?
5512          */
5513         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5514         if (handled == bytes)
5515                 return X86EMUL_CONTINUE;
5516
5517         gpa += handled;
5518         bytes -= handled;
5519         val += handled;
5520
5521         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5522         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5523         frag->gpa = gpa;
5524         frag->data = val;
5525         frag->len = bytes;
5526         return X86EMUL_CONTINUE;
5527 }
5528
5529 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5530                         unsigned long addr,
5531                         void *val, unsigned int bytes,
5532                         struct x86_exception *exception,
5533                         const struct read_write_emulator_ops *ops)
5534 {
5535         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5536         gpa_t gpa;
5537         int rc;
5538
5539         if (ops->read_write_prepare &&
5540                   ops->read_write_prepare(vcpu, val, bytes))
5541                 return X86EMUL_CONTINUE;
5542
5543         vcpu->mmio_nr_fragments = 0;
5544
5545         /* Crossing a page boundary? */
5546         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5547                 int now;
5548
5549                 now = -addr & ~PAGE_MASK;
5550                 rc = emulator_read_write_onepage(addr, val, now, exception,
5551                                                  vcpu, ops);
5552
5553                 if (rc != X86EMUL_CONTINUE)
5554                         return rc;
5555                 addr += now;
5556                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5557                         addr = (u32)addr;
5558                 val += now;
5559                 bytes -= now;
5560         }
5561
5562         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5563                                          vcpu, ops);
5564         if (rc != X86EMUL_CONTINUE)
5565                 return rc;
5566
5567         if (!vcpu->mmio_nr_fragments)
5568                 return rc;
5569
5570         gpa = vcpu->mmio_fragments[0].gpa;
5571
5572         vcpu->mmio_needed = 1;
5573         vcpu->mmio_cur_fragment = 0;
5574
5575         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5576         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5577         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5578         vcpu->run->mmio.phys_addr = gpa;
5579
5580         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5581 }
5582
5583 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5584                                   unsigned long addr,
5585                                   void *val,
5586                                   unsigned int bytes,
5587                                   struct x86_exception *exception)
5588 {
5589         return emulator_read_write(ctxt, addr, val, bytes,
5590                                    exception, &read_emultor);
5591 }
5592
5593 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5594                             unsigned long addr,
5595                             const void *val,
5596                             unsigned int bytes,
5597                             struct x86_exception *exception)
5598 {
5599         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5600                                    exception, &write_emultor);
5601 }
5602
5603 #define CMPXCHG_TYPE(t, ptr, old, new) \
5604         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5605
5606 #ifdef CONFIG_X86_64
5607 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5608 #else
5609 #  define CMPXCHG64(ptr, old, new) \
5610         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5611 #endif
5612
5613 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5614                                      unsigned long addr,
5615                                      const void *old,
5616                                      const void *new,
5617                                      unsigned int bytes,
5618                                      struct x86_exception *exception)
5619 {
5620         struct kvm_host_map map;
5621         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5622         gpa_t gpa;
5623         char *kaddr;
5624         bool exchanged;
5625
5626         /* guests cmpxchg8b have to be emulated atomically */
5627         if (bytes > 8 || (bytes & (bytes - 1)))
5628                 goto emul_write;
5629
5630         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5631
5632         if (gpa == UNMAPPED_GVA ||
5633             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5634                 goto emul_write;
5635
5636         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5637                 goto emul_write;
5638
5639         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5640                 goto emul_write;
5641
5642         kaddr = map.hva + offset_in_page(gpa);
5643
5644         switch (bytes) {
5645         case 1:
5646                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5647                 break;
5648         case 2:
5649                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5650                 break;
5651         case 4:
5652                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5653                 break;
5654         case 8:
5655                 exchanged = CMPXCHG64(kaddr, old, new);
5656                 break;
5657         default:
5658                 BUG();
5659         }
5660
5661         kvm_vcpu_unmap(vcpu, &map, true);
5662
5663         if (!exchanged)
5664                 return X86EMUL_CMPXCHG_FAILED;
5665
5666         kvm_page_track_write(vcpu, gpa, new, bytes);
5667
5668         return X86EMUL_CONTINUE;
5669
5670 emul_write:
5671         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5672
5673         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5674 }
5675
5676 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5677 {
5678         int r = 0, i;
5679
5680         for (i = 0; i < vcpu->arch.pio.count; i++) {
5681                 if (vcpu->arch.pio.in)
5682                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5683                                             vcpu->arch.pio.size, pd);
5684                 else
5685                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5686                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5687                                              pd);
5688                 if (r)
5689                         break;
5690                 pd += vcpu->arch.pio.size;
5691         }
5692         return r;
5693 }
5694
5695 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5696                                unsigned short port, void *val,
5697                                unsigned int count, bool in)
5698 {
5699         vcpu->arch.pio.port = port;
5700         vcpu->arch.pio.in = in;
5701         vcpu->arch.pio.count  = count;
5702         vcpu->arch.pio.size = size;
5703
5704         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5705                 vcpu->arch.pio.count = 0;
5706                 return 1;
5707         }
5708
5709         vcpu->run->exit_reason = KVM_EXIT_IO;
5710         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5711         vcpu->run->io.size = size;
5712         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5713         vcpu->run->io.count = count;
5714         vcpu->run->io.port = port;
5715
5716         return 0;
5717 }
5718
5719 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5720                                     int size, unsigned short port, void *val,
5721                                     unsigned int count)
5722 {
5723         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5724         int ret;
5725
5726         if (vcpu->arch.pio.count)
5727                 goto data_avail;
5728
5729         memset(vcpu->arch.pio_data, 0, size * count);
5730
5731         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5732         if (ret) {
5733 data_avail:
5734                 memcpy(val, vcpu->arch.pio_data, size * count);
5735                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5736                 vcpu->arch.pio.count = 0;
5737                 return 1;
5738         }
5739
5740         return 0;
5741 }
5742
5743 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5744                                      int size, unsigned short port,
5745                                      const void *val, unsigned int count)
5746 {
5747         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5748
5749         memcpy(vcpu->arch.pio_data, val, size * count);
5750         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5751         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5752 }
5753
5754 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5755 {
5756         return kvm_x86_ops->get_segment_base(vcpu, seg);
5757 }
5758
5759 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5760 {
5761         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5762 }
5763
5764 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5765 {
5766         if (!need_emulate_wbinvd(vcpu))
5767                 return X86EMUL_CONTINUE;
5768
5769         if (kvm_x86_ops->has_wbinvd_exit()) {
5770                 int cpu = get_cpu();
5771
5772                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5773                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5774                                 wbinvd_ipi, NULL, 1);
5775                 put_cpu();
5776                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5777         } else
5778                 wbinvd();
5779         return X86EMUL_CONTINUE;
5780 }
5781
5782 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5783 {
5784         kvm_emulate_wbinvd_noskip(vcpu);
5785         return kvm_skip_emulated_instruction(vcpu);
5786 }
5787 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5788
5789
5790
5791 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5792 {
5793         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5794 }
5795
5796 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5797                            unsigned long *dest)
5798 {
5799         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5800 }
5801
5802 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5803                            unsigned long value)
5804 {
5805
5806         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5807 }
5808
5809 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5810 {
5811         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5812 }
5813
5814 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5815 {
5816         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5817         unsigned long value;
5818
5819         switch (cr) {
5820         case 0:
5821                 value = kvm_read_cr0(vcpu);
5822                 break;
5823         case 2:
5824                 value = vcpu->arch.cr2;
5825                 break;
5826         case 3:
5827                 value = kvm_read_cr3(vcpu);
5828                 break;
5829         case 4:
5830                 value = kvm_read_cr4(vcpu);
5831                 break;
5832         case 8:
5833                 value = kvm_get_cr8(vcpu);
5834                 break;
5835         default:
5836                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5837                 return 0;
5838         }
5839
5840         return value;
5841 }
5842
5843 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5844 {
5845         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5846         int res = 0;
5847
5848         switch (cr) {
5849         case 0:
5850                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5851                 break;
5852         case 2:
5853                 vcpu->arch.cr2 = val;
5854                 break;
5855         case 3:
5856                 res = kvm_set_cr3(vcpu, val);
5857                 break;
5858         case 4:
5859                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5860                 break;
5861         case 8:
5862                 res = kvm_set_cr8(vcpu, val);
5863                 break;
5864         default:
5865                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5866                 res = -1;
5867         }
5868
5869         return res;
5870 }
5871
5872 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5873 {
5874         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5875 }
5876
5877 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5878 {
5879         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5880 }
5881
5882 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5883 {
5884         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5885 }
5886
5887 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5888 {
5889         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5890 }
5891
5892 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5893 {
5894         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5895 }
5896
5897 static unsigned long emulator_get_cached_segment_base(
5898         struct x86_emulate_ctxt *ctxt, int seg)
5899 {
5900         return get_segment_base(emul_to_vcpu(ctxt), seg);
5901 }
5902
5903 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5904                                  struct desc_struct *desc, u32 *base3,
5905                                  int seg)
5906 {
5907         struct kvm_segment var;
5908
5909         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5910         *selector = var.selector;
5911
5912         if (var.unusable) {
5913                 memset(desc, 0, sizeof(*desc));
5914                 if (base3)
5915                         *base3 = 0;
5916                 return false;
5917         }
5918
5919         if (var.g)
5920                 var.limit >>= 12;
5921         set_desc_limit(desc, var.limit);
5922         set_desc_base(desc, (unsigned long)var.base);
5923 #ifdef CONFIG_X86_64
5924         if (base3)
5925                 *base3 = var.base >> 32;
5926 #endif
5927         desc->type = var.type;
5928         desc->s = var.s;
5929         desc->dpl = var.dpl;
5930         desc->p = var.present;
5931         desc->avl = var.avl;
5932         desc->l = var.l;
5933         desc->d = var.db;
5934         desc->g = var.g;
5935
5936         return true;
5937 }
5938
5939 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5940                                  struct desc_struct *desc, u32 base3,
5941                                  int seg)
5942 {
5943         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5944         struct kvm_segment var;
5945
5946         var.selector = selector;
5947         var.base = get_desc_base(desc);
5948 #ifdef CONFIG_X86_64
5949         var.base |= ((u64)base3) << 32;
5950 #endif
5951         var.limit = get_desc_limit(desc);
5952         if (desc->g)
5953                 var.limit = (var.limit << 12) | 0xfff;
5954         var.type = desc->type;
5955         var.dpl = desc->dpl;
5956         var.db = desc->d;
5957         var.s = desc->s;
5958         var.l = desc->l;
5959         var.g = desc->g;
5960         var.avl = desc->avl;
5961         var.present = desc->p;
5962         var.unusable = !var.present;
5963         var.padding = 0;
5964
5965         kvm_set_segment(vcpu, &var, seg);
5966         return;
5967 }
5968
5969 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5970                             u32 msr_index, u64 *pdata)
5971 {
5972         struct msr_data msr;
5973         int r;
5974
5975         msr.index = msr_index;
5976         msr.host_initiated = false;
5977         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5978         if (r)
5979                 return r;
5980
5981         *pdata = msr.data;
5982         return 0;
5983 }
5984
5985 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5986                             u32 msr_index, u64 data)
5987 {
5988         struct msr_data msr;
5989
5990         msr.data = data;
5991         msr.index = msr_index;
5992         msr.host_initiated = false;
5993         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5994 }
5995
5996 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5997 {
5998         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5999
6000         return vcpu->arch.smbase;
6001 }
6002
6003 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6004 {
6005         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6006
6007         vcpu->arch.smbase = smbase;
6008 }
6009
6010 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6011                               u32 pmc)
6012 {
6013         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6014 }
6015
6016 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6017                              u32 pmc, u64 *pdata)
6018 {
6019         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6020 }
6021
6022 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6023 {
6024         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6025 }
6026
6027 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6028                               struct x86_instruction_info *info,
6029                               enum x86_intercept_stage stage)
6030 {
6031         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6032 }
6033
6034 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6035                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6036 {
6037         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6038 }
6039
6040 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6041 {
6042         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6043 }
6044
6045 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6046 {
6047         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6048 }
6049
6050 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6051 {
6052         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6053 }
6054
6055 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6056 {
6057         return emul_to_vcpu(ctxt)->arch.hflags;
6058 }
6059
6060 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6061 {
6062         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6063 }
6064
6065 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6066                                   const char *smstate)
6067 {
6068         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6069 }
6070
6071 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6072 {
6073         kvm_smm_changed(emul_to_vcpu(ctxt));
6074 }
6075
6076 static const struct x86_emulate_ops emulate_ops = {
6077         .read_gpr            = emulator_read_gpr,
6078         .write_gpr           = emulator_write_gpr,
6079         .read_std            = emulator_read_std,
6080         .write_std           = emulator_write_std,
6081         .read_phys           = kvm_read_guest_phys_system,
6082         .fetch               = kvm_fetch_guest_virt,
6083         .read_emulated       = emulator_read_emulated,
6084         .write_emulated      = emulator_write_emulated,
6085         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6086         .invlpg              = emulator_invlpg,
6087         .pio_in_emulated     = emulator_pio_in_emulated,
6088         .pio_out_emulated    = emulator_pio_out_emulated,
6089         .get_segment         = emulator_get_segment,
6090         .set_segment         = emulator_set_segment,
6091         .get_cached_segment_base = emulator_get_cached_segment_base,
6092         .get_gdt             = emulator_get_gdt,
6093         .get_idt             = emulator_get_idt,
6094         .set_gdt             = emulator_set_gdt,
6095         .set_idt             = emulator_set_idt,
6096         .get_cr              = emulator_get_cr,
6097         .set_cr              = emulator_set_cr,
6098         .cpl                 = emulator_get_cpl,
6099         .get_dr              = emulator_get_dr,
6100         .set_dr              = emulator_set_dr,
6101         .get_smbase          = emulator_get_smbase,
6102         .set_smbase          = emulator_set_smbase,
6103         .set_msr             = emulator_set_msr,
6104         .get_msr             = emulator_get_msr,
6105         .check_pmc           = emulator_check_pmc,
6106         .read_pmc            = emulator_read_pmc,
6107         .halt                = emulator_halt,
6108         .wbinvd              = emulator_wbinvd,
6109         .fix_hypercall       = emulator_fix_hypercall,
6110         .intercept           = emulator_intercept,
6111         .get_cpuid           = emulator_get_cpuid,
6112         .set_nmi_mask        = emulator_set_nmi_mask,
6113         .get_hflags          = emulator_get_hflags,
6114         .set_hflags          = emulator_set_hflags,
6115         .pre_leave_smm       = emulator_pre_leave_smm,
6116         .post_leave_smm      = emulator_post_leave_smm,
6117 };
6118
6119 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6120 {
6121         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6122         /*
6123          * an sti; sti; sequence only disable interrupts for the first
6124          * instruction. So, if the last instruction, be it emulated or
6125          * not, left the system with the INT_STI flag enabled, it
6126          * means that the last instruction is an sti. We should not
6127          * leave the flag on in this case. The same goes for mov ss
6128          */
6129         if (int_shadow & mask)
6130                 mask = 0;
6131         if (unlikely(int_shadow || mask)) {
6132                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6133                 if (!mask)
6134                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6135         }
6136 }
6137
6138 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6139 {
6140         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6141         if (ctxt->exception.vector == PF_VECTOR)
6142                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6143
6144         if (ctxt->exception.error_code_valid)
6145                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6146                                       ctxt->exception.error_code);
6147         else
6148                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6149         return false;
6150 }
6151
6152 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6153 {
6154         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6155         int cs_db, cs_l;
6156
6157         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6158
6159         ctxt->eflags = kvm_get_rflags(vcpu);
6160         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6161
6162         ctxt->eip = kvm_rip_read(vcpu);
6163         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6164                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6165                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6166                      cs_db                              ? X86EMUL_MODE_PROT32 :
6167                                                           X86EMUL_MODE_PROT16;
6168         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6169         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6170         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6171
6172         init_decode_cache(ctxt);
6173         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6174 }
6175
6176 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6177 {
6178         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6179         int ret;
6180
6181         init_emulate_ctxt(vcpu);
6182
6183         ctxt->op_bytes = 2;
6184         ctxt->ad_bytes = 2;
6185         ctxt->_eip = ctxt->eip + inc_eip;
6186         ret = emulate_int_real(ctxt, irq);
6187
6188         if (ret != X86EMUL_CONTINUE)
6189                 return EMULATE_FAIL;
6190
6191         ctxt->eip = ctxt->_eip;
6192         kvm_rip_write(vcpu, ctxt->eip);
6193         kvm_set_rflags(vcpu, ctxt->eflags);
6194
6195         return EMULATE_DONE;
6196 }
6197 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6198
6199 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6200 {
6201         int r = EMULATE_DONE;
6202
6203         ++vcpu->stat.insn_emulation_fail;
6204         trace_kvm_emulate_insn_failed(vcpu);
6205
6206         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6207                 return EMULATE_FAIL;
6208
6209         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6210                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6211                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6212                 vcpu->run->internal.ndata = 0;
6213                 r = EMULATE_USER_EXIT;
6214         }
6215
6216         kvm_queue_exception(vcpu, UD_VECTOR);
6217
6218         return r;
6219 }
6220
6221 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6222                                   bool write_fault_to_shadow_pgtable,
6223                                   int emulation_type)
6224 {
6225         gpa_t gpa = cr2;
6226         kvm_pfn_t pfn;
6227
6228         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6229                 return false;
6230
6231         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6232                 return false;
6233
6234         if (!vcpu->arch.mmu->direct_map) {
6235                 /*
6236                  * Write permission should be allowed since only
6237                  * write access need to be emulated.
6238                  */
6239                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6240
6241                 /*
6242                  * If the mapping is invalid in guest, let cpu retry
6243                  * it to generate fault.
6244                  */
6245                 if (gpa == UNMAPPED_GVA)
6246                         return true;
6247         }
6248
6249         /*
6250          * Do not retry the unhandleable instruction if it faults on the
6251          * readonly host memory, otherwise it will goto a infinite loop:
6252          * retry instruction -> write #PF -> emulation fail -> retry
6253          * instruction -> ...
6254          */
6255         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6256
6257         /*
6258          * If the instruction failed on the error pfn, it can not be fixed,
6259          * report the error to userspace.
6260          */
6261         if (is_error_noslot_pfn(pfn))
6262                 return false;
6263
6264         kvm_release_pfn_clean(pfn);
6265
6266         /* The instructions are well-emulated on direct mmu. */
6267         if (vcpu->arch.mmu->direct_map) {
6268                 unsigned int indirect_shadow_pages;
6269
6270                 spin_lock(&vcpu->kvm->mmu_lock);
6271                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6272                 spin_unlock(&vcpu->kvm->mmu_lock);
6273
6274                 if (indirect_shadow_pages)
6275                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6276
6277                 return true;
6278         }
6279
6280         /*
6281          * if emulation was due to access to shadowed page table
6282          * and it failed try to unshadow page and re-enter the
6283          * guest to let CPU execute the instruction.
6284          */
6285         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6286
6287         /*
6288          * If the access faults on its page table, it can not
6289          * be fixed by unprotecting shadow page and it should
6290          * be reported to userspace.
6291          */
6292         return !write_fault_to_shadow_pgtable;
6293 }
6294
6295 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6296                               unsigned long cr2,  int emulation_type)
6297 {
6298         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6299         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6300
6301         last_retry_eip = vcpu->arch.last_retry_eip;
6302         last_retry_addr = vcpu->arch.last_retry_addr;
6303
6304         /*
6305          * If the emulation is caused by #PF and it is non-page_table
6306          * writing instruction, it means the VM-EXIT is caused by shadow
6307          * page protected, we can zap the shadow page and retry this
6308          * instruction directly.
6309          *
6310          * Note: if the guest uses a non-page-table modifying instruction
6311          * on the PDE that points to the instruction, then we will unmap
6312          * the instruction and go to an infinite loop. So, we cache the
6313          * last retried eip and the last fault address, if we meet the eip
6314          * and the address again, we can break out of the potential infinite
6315          * loop.
6316          */
6317         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6318
6319         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6320                 return false;
6321
6322         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6323                 return false;
6324
6325         if (x86_page_table_writing_insn(ctxt))
6326                 return false;
6327
6328         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6329                 return false;
6330
6331         vcpu->arch.last_retry_eip = ctxt->eip;
6332         vcpu->arch.last_retry_addr = cr2;
6333
6334         if (!vcpu->arch.mmu->direct_map)
6335                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6336
6337         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6338
6339         return true;
6340 }
6341
6342 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6343 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6344
6345 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6346 {
6347         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6348                 /* This is a good place to trace that we are exiting SMM.  */
6349                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6350
6351                 /* Process a latched INIT or SMI, if any.  */
6352                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6353         }
6354
6355         kvm_mmu_reset_context(vcpu);
6356 }
6357
6358 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6359                                 unsigned long *db)
6360 {
6361         u32 dr6 = 0;
6362         int i;
6363         u32 enable, rwlen;
6364
6365         enable = dr7;
6366         rwlen = dr7 >> 16;
6367         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6368                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6369                         dr6 |= (1 << i);
6370         return dr6;
6371 }
6372
6373 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6374 {
6375         struct kvm_run *kvm_run = vcpu->run;
6376
6377         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6378                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6379                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6380                 kvm_run->debug.arch.exception = DB_VECTOR;
6381                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6382                 *r = EMULATE_USER_EXIT;
6383         } else {
6384                 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6385         }
6386 }
6387
6388 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6389 {
6390         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6391         int r = EMULATE_DONE;
6392
6393         kvm_x86_ops->skip_emulated_instruction(vcpu);
6394
6395         /*
6396          * rflags is the old, "raw" value of the flags.  The new value has
6397          * not been saved yet.
6398          *
6399          * This is correct even for TF set by the guest, because "the
6400          * processor will not generate this exception after the instruction
6401          * that sets the TF flag".
6402          */
6403         if (unlikely(rflags & X86_EFLAGS_TF))
6404                 kvm_vcpu_do_singlestep(vcpu, &r);
6405         return r == EMULATE_DONE;
6406 }
6407 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6408
6409 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6410 {
6411         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6412             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6413                 struct kvm_run *kvm_run = vcpu->run;
6414                 unsigned long eip = kvm_get_linear_rip(vcpu);
6415                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6416                                            vcpu->arch.guest_debug_dr7,
6417                                            vcpu->arch.eff_db);
6418
6419                 if (dr6 != 0) {
6420                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6421                         kvm_run->debug.arch.pc = eip;
6422                         kvm_run->debug.arch.exception = DB_VECTOR;
6423                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6424                         *r = EMULATE_USER_EXIT;
6425                         return true;
6426                 }
6427         }
6428
6429         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6430             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6431                 unsigned long eip = kvm_get_linear_rip(vcpu);
6432                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6433                                            vcpu->arch.dr7,
6434                                            vcpu->arch.db);
6435
6436                 if (dr6 != 0) {
6437                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6438                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6439                         kvm_queue_exception(vcpu, DB_VECTOR);
6440                         *r = EMULATE_DONE;
6441                         return true;
6442                 }
6443         }
6444
6445         return false;
6446 }
6447
6448 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6449 {
6450         switch (ctxt->opcode_len) {
6451         case 1:
6452                 switch (ctxt->b) {
6453                 case 0xe4:      /* IN */
6454                 case 0xe5:
6455                 case 0xec:
6456                 case 0xed:
6457                 case 0xe6:      /* OUT */
6458                 case 0xe7:
6459                 case 0xee:
6460                 case 0xef:
6461                 case 0x6c:      /* INS */
6462                 case 0x6d:
6463                 case 0x6e:      /* OUTS */
6464                 case 0x6f:
6465                         return true;
6466                 }
6467                 break;
6468         case 2:
6469                 switch (ctxt->b) {
6470                 case 0x33:      /* RDPMC */
6471                         return true;
6472                 }
6473                 break;
6474         }
6475
6476         return false;
6477 }
6478
6479 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6480                             unsigned long cr2,
6481                             int emulation_type,
6482                             void *insn,
6483                             int insn_len)
6484 {
6485         int r;
6486         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6487         bool writeback = true;
6488         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6489
6490         vcpu->arch.l1tf_flush_l1d = true;
6491
6492         /*
6493          * Clear write_fault_to_shadow_pgtable here to ensure it is
6494          * never reused.
6495          */
6496         vcpu->arch.write_fault_to_shadow_pgtable = false;
6497         kvm_clear_exception_queue(vcpu);
6498
6499         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6500                 init_emulate_ctxt(vcpu);
6501
6502                 /*
6503                  * We will reenter on the same instruction since
6504                  * we do not set complete_userspace_io.  This does not
6505                  * handle watchpoints yet, those would be handled in
6506                  * the emulate_ops.
6507                  */
6508                 if (!(emulation_type & EMULTYPE_SKIP) &&
6509                     kvm_vcpu_check_breakpoint(vcpu, &r))
6510                         return r;
6511
6512                 ctxt->interruptibility = 0;
6513                 ctxt->have_exception = false;
6514                 ctxt->exception.vector = -1;
6515                 ctxt->perm_ok = false;
6516
6517                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6518
6519                 r = x86_decode_insn(ctxt, insn, insn_len);
6520
6521                 trace_kvm_emulate_insn_start(vcpu);
6522                 ++vcpu->stat.insn_emulation;
6523                 if (r != EMULATION_OK)  {
6524                         if (emulation_type & EMULTYPE_TRAP_UD)
6525                                 return EMULATE_FAIL;
6526                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6527                                                 emulation_type))
6528                                 return EMULATE_DONE;
6529                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6530                                 return EMULATE_DONE;
6531                         if (emulation_type & EMULTYPE_SKIP)
6532                                 return EMULATE_FAIL;
6533                         return handle_emulation_failure(vcpu, emulation_type);
6534                 }
6535         }
6536
6537         if ((emulation_type & EMULTYPE_VMWARE) &&
6538             !is_vmware_backdoor_opcode(ctxt))
6539                 return EMULATE_FAIL;
6540
6541         if (emulation_type & EMULTYPE_SKIP) {
6542                 kvm_rip_write(vcpu, ctxt->_eip);
6543                 if (ctxt->eflags & X86_EFLAGS_RF)
6544                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6545                 return EMULATE_DONE;
6546         }
6547
6548         if (retry_instruction(ctxt, cr2, emulation_type))
6549                 return EMULATE_DONE;
6550
6551         /* this is needed for vmware backdoor interface to work since it
6552            changes registers values  during IO operation */
6553         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6554                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6555                 emulator_invalidate_register_cache(ctxt);
6556         }
6557
6558 restart:
6559         /* Save the faulting GPA (cr2) in the address field */
6560         ctxt->exception.address = cr2;
6561
6562         r = x86_emulate_insn(ctxt);
6563
6564         if (r == EMULATION_INTERCEPTED)
6565                 return EMULATE_DONE;
6566
6567         if (r == EMULATION_FAILED) {
6568                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6569                                         emulation_type))
6570                         return EMULATE_DONE;
6571
6572                 return handle_emulation_failure(vcpu, emulation_type);
6573         }
6574
6575         if (ctxt->have_exception) {
6576                 r = EMULATE_DONE;
6577                 if (inject_emulated_exception(vcpu))
6578                         return r;
6579         } else if (vcpu->arch.pio.count) {
6580                 if (!vcpu->arch.pio.in) {
6581                         /* FIXME: return into emulator if single-stepping.  */
6582                         vcpu->arch.pio.count = 0;
6583                 } else {
6584                         writeback = false;
6585                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6586                 }
6587                 r = EMULATE_USER_EXIT;
6588         } else if (vcpu->mmio_needed) {
6589                 if (!vcpu->mmio_is_write)
6590                         writeback = false;
6591                 r = EMULATE_USER_EXIT;
6592                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6593         } else if (r == EMULATION_RESTART)
6594                 goto restart;
6595         else
6596                 r = EMULATE_DONE;
6597
6598         if (writeback) {
6599                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6600                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6601                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6602                 kvm_rip_write(vcpu, ctxt->eip);
6603                 if (r == EMULATE_DONE && ctxt->tf)
6604                         kvm_vcpu_do_singlestep(vcpu, &r);
6605                 if (!ctxt->have_exception ||
6606                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6607                         __kvm_set_rflags(vcpu, ctxt->eflags);
6608
6609                 /*
6610                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6611                  * do nothing, and it will be requested again as soon as
6612                  * the shadow expires.  But we still need to check here,
6613                  * because POPF has no interrupt shadow.
6614                  */
6615                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6616                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6617         } else
6618                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6619
6620         return r;
6621 }
6622
6623 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6624 {
6625         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6626 }
6627 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6628
6629 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6630                                         void *insn, int insn_len)
6631 {
6632         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6633 }
6634 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6635
6636 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6637 {
6638         vcpu->arch.pio.count = 0;
6639         return 1;
6640 }
6641
6642 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6643 {
6644         vcpu->arch.pio.count = 0;
6645
6646         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6647                 return 1;
6648
6649         return kvm_skip_emulated_instruction(vcpu);
6650 }
6651
6652 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6653                             unsigned short port)
6654 {
6655         unsigned long val = kvm_rax_read(vcpu);
6656         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6657                                             size, port, &val, 1);
6658         if (ret)
6659                 return ret;
6660
6661         /*
6662          * Workaround userspace that relies on old KVM behavior of %rip being
6663          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6664          */
6665         if (port == 0x7e &&
6666             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6667                 vcpu->arch.complete_userspace_io =
6668                         complete_fast_pio_out_port_0x7e;
6669                 kvm_skip_emulated_instruction(vcpu);
6670         } else {
6671                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6672                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6673         }
6674         return 0;
6675 }
6676
6677 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6678 {
6679         unsigned long val;
6680
6681         /* We should only ever be called with arch.pio.count equal to 1 */
6682         BUG_ON(vcpu->arch.pio.count != 1);
6683
6684         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6685                 vcpu->arch.pio.count = 0;
6686                 return 1;
6687         }
6688
6689         /* For size less than 4 we merge, else we zero extend */
6690         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6691
6692         /*
6693          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6694          * the copy and tracing
6695          */
6696         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6697                                  vcpu->arch.pio.port, &val, 1);
6698         kvm_rax_write(vcpu, val);
6699
6700         return kvm_skip_emulated_instruction(vcpu);
6701 }
6702
6703 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6704                            unsigned short port)
6705 {
6706         unsigned long val;
6707         int ret;
6708
6709         /* For size less than 4 we merge, else we zero extend */
6710         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6711
6712         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6713                                        &val, 1);
6714         if (ret) {
6715                 kvm_rax_write(vcpu, val);
6716                 return ret;
6717         }
6718
6719         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6720         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6721
6722         return 0;
6723 }
6724
6725 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6726 {
6727         int ret;
6728
6729         if (in)
6730                 ret = kvm_fast_pio_in(vcpu, size, port);
6731         else
6732                 ret = kvm_fast_pio_out(vcpu, size, port);
6733         return ret && kvm_skip_emulated_instruction(vcpu);
6734 }
6735 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6736
6737 static int kvmclock_cpu_down_prep(unsigned int cpu)
6738 {
6739         __this_cpu_write(cpu_tsc_khz, 0);
6740         return 0;
6741 }
6742
6743 static void tsc_khz_changed(void *data)
6744 {
6745         struct cpufreq_freqs *freq = data;
6746         unsigned long khz = 0;
6747
6748         if (data)
6749                 khz = freq->new;
6750         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6751                 khz = cpufreq_quick_get(raw_smp_processor_id());
6752         if (!khz)
6753                 khz = tsc_khz;
6754         __this_cpu_write(cpu_tsc_khz, khz);
6755 }
6756
6757 #ifdef CONFIG_X86_64
6758 static void kvm_hyperv_tsc_notifier(void)
6759 {
6760         struct kvm *kvm;
6761         struct kvm_vcpu *vcpu;
6762         int cpu;
6763
6764         mutex_lock(&kvm_lock);
6765         list_for_each_entry(kvm, &vm_list, vm_list)
6766                 kvm_make_mclock_inprogress_request(kvm);
6767
6768         hyperv_stop_tsc_emulation();
6769
6770         /* TSC frequency always matches when on Hyper-V */
6771         for_each_present_cpu(cpu)
6772                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6773         kvm_max_guest_tsc_khz = tsc_khz;
6774
6775         list_for_each_entry(kvm, &vm_list, vm_list) {
6776                 struct kvm_arch *ka = &kvm->arch;
6777
6778                 spin_lock(&ka->pvclock_gtod_sync_lock);
6779
6780                 pvclock_update_vm_gtod_copy(kvm);
6781
6782                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6783                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6784
6785                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6786                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6787
6788                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6789         }
6790         mutex_unlock(&kvm_lock);
6791 }
6792 #endif
6793
6794 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6795 {
6796         struct kvm *kvm;
6797         struct kvm_vcpu *vcpu;
6798         int i, send_ipi = 0;
6799
6800         /*
6801          * We allow guests to temporarily run on slowing clocks,
6802          * provided we notify them after, or to run on accelerating
6803          * clocks, provided we notify them before.  Thus time never
6804          * goes backwards.
6805          *
6806          * However, we have a problem.  We can't atomically update
6807          * the frequency of a given CPU from this function; it is
6808          * merely a notifier, which can be called from any CPU.
6809          * Changing the TSC frequency at arbitrary points in time
6810          * requires a recomputation of local variables related to
6811          * the TSC for each VCPU.  We must flag these local variables
6812          * to be updated and be sure the update takes place with the
6813          * new frequency before any guests proceed.
6814          *
6815          * Unfortunately, the combination of hotplug CPU and frequency
6816          * change creates an intractable locking scenario; the order
6817          * of when these callouts happen is undefined with respect to
6818          * CPU hotplug, and they can race with each other.  As such,
6819          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6820          * undefined; you can actually have a CPU frequency change take
6821          * place in between the computation of X and the setting of the
6822          * variable.  To protect against this problem, all updates of
6823          * the per_cpu tsc_khz variable are done in an interrupt
6824          * protected IPI, and all callers wishing to update the value
6825          * must wait for a synchronous IPI to complete (which is trivial
6826          * if the caller is on the CPU already).  This establishes the
6827          * necessary total order on variable updates.
6828          *
6829          * Note that because a guest time update may take place
6830          * anytime after the setting of the VCPU's request bit, the
6831          * correct TSC value must be set before the request.  However,
6832          * to ensure the update actually makes it to any guest which
6833          * starts running in hardware virtualization between the set
6834          * and the acquisition of the spinlock, we must also ping the
6835          * CPU after setting the request bit.
6836          *
6837          */
6838
6839         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6840
6841         mutex_lock(&kvm_lock);
6842         list_for_each_entry(kvm, &vm_list, vm_list) {
6843                 kvm_for_each_vcpu(i, vcpu, kvm) {
6844                         if (vcpu->cpu != cpu)
6845                                 continue;
6846                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6847                         if (vcpu->cpu != raw_smp_processor_id())
6848                                 send_ipi = 1;
6849                 }
6850         }
6851         mutex_unlock(&kvm_lock);
6852
6853         if (freq->old < freq->new && send_ipi) {
6854                 /*
6855                  * We upscale the frequency.  Must make the guest
6856                  * doesn't see old kvmclock values while running with
6857                  * the new frequency, otherwise we risk the guest sees
6858                  * time go backwards.
6859                  *
6860                  * In case we update the frequency for another cpu
6861                  * (which might be in guest context) send an interrupt
6862                  * to kick the cpu out of guest context.  Next time
6863                  * guest context is entered kvmclock will be updated,
6864                  * so the guest will not see stale values.
6865                  */
6866                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6867         }
6868 }
6869
6870 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6871                                      void *data)
6872 {
6873         struct cpufreq_freqs *freq = data;
6874         int cpu;
6875
6876         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6877                 return 0;
6878         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6879                 return 0;
6880
6881         for_each_cpu(cpu, freq->policy->cpus)
6882                 __kvmclock_cpufreq_notifier(freq, cpu);
6883
6884         return 0;
6885 }
6886
6887 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6888         .notifier_call  = kvmclock_cpufreq_notifier
6889 };
6890
6891 static int kvmclock_cpu_online(unsigned int cpu)
6892 {
6893         tsc_khz_changed(NULL);
6894         return 0;
6895 }
6896
6897 static void kvm_timer_init(void)
6898 {
6899         max_tsc_khz = tsc_khz;
6900
6901         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6902 #ifdef CONFIG_CPU_FREQ
6903                 struct cpufreq_policy policy;
6904                 int cpu;
6905
6906                 memset(&policy, 0, sizeof(policy));
6907                 cpu = get_cpu();
6908                 cpufreq_get_policy(&policy, cpu);
6909                 if (policy.cpuinfo.max_freq)
6910                         max_tsc_khz = policy.cpuinfo.max_freq;
6911                 put_cpu();
6912 #endif
6913                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6914                                           CPUFREQ_TRANSITION_NOTIFIER);
6915         }
6916         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6917
6918         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6919                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6920 }
6921
6922 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6923 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6924
6925 int kvm_is_in_guest(void)
6926 {
6927         return __this_cpu_read(current_vcpu) != NULL;
6928 }
6929
6930 static int kvm_is_user_mode(void)
6931 {
6932         int user_mode = 3;
6933
6934         if (__this_cpu_read(current_vcpu))
6935                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6936
6937         return user_mode != 0;
6938 }
6939
6940 static unsigned long kvm_get_guest_ip(void)
6941 {
6942         unsigned long ip = 0;
6943
6944         if (__this_cpu_read(current_vcpu))
6945                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6946
6947         return ip;
6948 }
6949
6950 static void kvm_handle_intel_pt_intr(void)
6951 {
6952         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
6953
6954         kvm_make_request(KVM_REQ_PMI, vcpu);
6955         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
6956                         (unsigned long *)&vcpu->arch.pmu.global_status);
6957 }
6958
6959 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6960         .is_in_guest            = kvm_is_in_guest,
6961         .is_user_mode           = kvm_is_user_mode,
6962         .get_guest_ip           = kvm_get_guest_ip,
6963         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
6964 };
6965
6966 #ifdef CONFIG_X86_64
6967 static void pvclock_gtod_update_fn(struct work_struct *work)
6968 {
6969         struct kvm *kvm;
6970
6971         struct kvm_vcpu *vcpu;
6972         int i;
6973
6974         mutex_lock(&kvm_lock);
6975         list_for_each_entry(kvm, &vm_list, vm_list)
6976                 kvm_for_each_vcpu(i, vcpu, kvm)
6977                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6978         atomic_set(&kvm_guest_has_master_clock, 0);
6979         mutex_unlock(&kvm_lock);
6980 }
6981
6982 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6983
6984 /*
6985  * Notification about pvclock gtod data update.
6986  */
6987 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6988                                void *priv)
6989 {
6990         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6991         struct timekeeper *tk = priv;
6992
6993         update_pvclock_gtod(tk);
6994
6995         /* disable master clock if host does not trust, or does not
6996          * use, TSC based clocksource.
6997          */
6998         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6999             atomic_read(&kvm_guest_has_master_clock) != 0)
7000                 queue_work(system_long_wq, &pvclock_gtod_work);
7001
7002         return 0;
7003 }
7004
7005 static struct notifier_block pvclock_gtod_notifier = {
7006         .notifier_call = pvclock_gtod_notify,
7007 };
7008 #endif
7009
7010 int kvm_arch_init(void *opaque)
7011 {
7012         int r;
7013         struct kvm_x86_ops *ops = opaque;
7014
7015         if (kvm_x86_ops) {
7016                 printk(KERN_ERR "kvm: already loaded the other module\n");
7017                 r = -EEXIST;
7018                 goto out;
7019         }
7020
7021         if (!ops->cpu_has_kvm_support()) {
7022                 printk(KERN_ERR "kvm: no hardware support\n");
7023                 r = -EOPNOTSUPP;
7024                 goto out;
7025         }
7026         if (ops->disabled_by_bios()) {
7027                 printk(KERN_ERR "kvm: disabled by bios\n");
7028                 r = -EOPNOTSUPP;
7029                 goto out;
7030         }
7031
7032         /*
7033          * KVM explicitly assumes that the guest has an FPU and
7034          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7035          * vCPU's FPU state as a fxregs_state struct.
7036          */
7037         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7038                 printk(KERN_ERR "kvm: inadequate fpu\n");
7039                 r = -EOPNOTSUPP;
7040                 goto out;
7041         }
7042
7043         r = -ENOMEM;
7044         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7045                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7046                                           NULL);
7047         if (!x86_fpu_cache) {
7048                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7049                 goto out;
7050         }
7051
7052         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7053         if (!shared_msrs) {
7054                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7055                 goto out_free_x86_fpu_cache;
7056         }
7057
7058         r = kvm_mmu_module_init();
7059         if (r)
7060                 goto out_free_percpu;
7061
7062         kvm_x86_ops = ops;
7063
7064         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7065                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7066                         PT_PRESENT_MASK, 0, sme_me_mask);
7067         kvm_timer_init();
7068
7069         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7070
7071         if (boot_cpu_has(X86_FEATURE_XSAVE))
7072                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7073
7074         kvm_lapic_init();
7075 #ifdef CONFIG_X86_64
7076         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7077
7078         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7079                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7080 #endif
7081
7082         return 0;
7083
7084 out_free_percpu:
7085         free_percpu(shared_msrs);
7086 out_free_x86_fpu_cache:
7087         kmem_cache_destroy(x86_fpu_cache);
7088 out:
7089         return r;
7090 }
7091
7092 void kvm_arch_exit(void)
7093 {
7094 #ifdef CONFIG_X86_64
7095         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7096                 clear_hv_tscchange_cb();
7097 #endif
7098         kvm_lapic_exit();
7099         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7100
7101         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7102                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7103                                             CPUFREQ_TRANSITION_NOTIFIER);
7104         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7105 #ifdef CONFIG_X86_64
7106         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7107 #endif
7108         kvm_x86_ops = NULL;
7109         kvm_mmu_module_exit();
7110         free_percpu(shared_msrs);
7111         kmem_cache_destroy(x86_fpu_cache);
7112 }
7113
7114 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7115 {
7116         ++vcpu->stat.halt_exits;
7117         if (lapic_in_kernel(vcpu)) {
7118                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7119                 return 1;
7120         } else {
7121                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7122                 return 0;
7123         }
7124 }
7125 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7126
7127 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7128 {
7129         int ret = kvm_skip_emulated_instruction(vcpu);
7130         /*
7131          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7132          * KVM_EXIT_DEBUG here.
7133          */
7134         return kvm_vcpu_halt(vcpu) && ret;
7135 }
7136 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7137
7138 #ifdef CONFIG_X86_64
7139 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7140                                 unsigned long clock_type)
7141 {
7142         struct kvm_clock_pairing clock_pairing;
7143         struct timespec64 ts;
7144         u64 cycle;
7145         int ret;
7146
7147         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7148                 return -KVM_EOPNOTSUPP;
7149
7150         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7151                 return -KVM_EOPNOTSUPP;
7152
7153         clock_pairing.sec = ts.tv_sec;
7154         clock_pairing.nsec = ts.tv_nsec;
7155         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7156         clock_pairing.flags = 0;
7157         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7158
7159         ret = 0;
7160         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7161                             sizeof(struct kvm_clock_pairing)))
7162                 ret = -KVM_EFAULT;
7163
7164         return ret;
7165 }
7166 #endif
7167
7168 /*
7169  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7170  *
7171  * @apicid - apicid of vcpu to be kicked.
7172  */
7173 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7174 {
7175         struct kvm_lapic_irq lapic_irq;
7176
7177         lapic_irq.shorthand = 0;
7178         lapic_irq.dest_mode = 0;
7179         lapic_irq.level = 0;
7180         lapic_irq.dest_id = apicid;
7181         lapic_irq.msi_redir_hint = false;
7182
7183         lapic_irq.delivery_mode = APIC_DM_REMRD;
7184         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7185 }
7186
7187 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7188 {
7189         if (!lapic_in_kernel(vcpu)) {
7190                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7191                 return;
7192         }
7193         if (!vcpu->arch.apicv_active)
7194                 return;
7195
7196         vcpu->arch.apicv_active = false;
7197         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7198 }
7199
7200 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7201 {
7202         struct kvm_vcpu *target = NULL;
7203         struct kvm_apic_map *map;
7204
7205         rcu_read_lock();
7206         map = rcu_dereference(kvm->arch.apic_map);
7207
7208         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7209                 target = map->phys_map[dest_id]->vcpu;
7210
7211         rcu_read_unlock();
7212
7213         if (target)
7214                 kvm_vcpu_yield_to(target);
7215 }
7216
7217 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7218 {
7219         unsigned long nr, a0, a1, a2, a3, ret;
7220         int op_64_bit;
7221
7222         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7223                 return kvm_hv_hypercall(vcpu);
7224
7225         nr = kvm_rax_read(vcpu);
7226         a0 = kvm_rbx_read(vcpu);
7227         a1 = kvm_rcx_read(vcpu);
7228         a2 = kvm_rdx_read(vcpu);
7229         a3 = kvm_rsi_read(vcpu);
7230
7231         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7232
7233         op_64_bit = is_64_bit_mode(vcpu);
7234         if (!op_64_bit) {
7235                 nr &= 0xFFFFFFFF;
7236                 a0 &= 0xFFFFFFFF;
7237                 a1 &= 0xFFFFFFFF;
7238                 a2 &= 0xFFFFFFFF;
7239                 a3 &= 0xFFFFFFFF;
7240         }
7241
7242         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7243                 ret = -KVM_EPERM;
7244                 goto out;
7245         }
7246
7247         switch (nr) {
7248         case KVM_HC_VAPIC_POLL_IRQ:
7249                 ret = 0;
7250                 break;
7251         case KVM_HC_KICK_CPU:
7252                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7253                 ret = 0;
7254                 break;
7255 #ifdef CONFIG_X86_64
7256         case KVM_HC_CLOCK_PAIRING:
7257                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7258                 break;
7259 #endif
7260         case KVM_HC_SEND_IPI:
7261                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7262                 break;
7263         case KVM_HC_SCHED_YIELD:
7264                 kvm_sched_yield(vcpu->kvm, a0);
7265                 ret = 0;
7266                 break;
7267         default:
7268                 ret = -KVM_ENOSYS;
7269                 break;
7270         }
7271 out:
7272         if (!op_64_bit)
7273                 ret = (u32)ret;
7274         kvm_rax_write(vcpu, ret);
7275
7276         ++vcpu->stat.hypercalls;
7277         return kvm_skip_emulated_instruction(vcpu);
7278 }
7279 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7280
7281 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7282 {
7283         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7284         char instruction[3];
7285         unsigned long rip = kvm_rip_read(vcpu);
7286
7287         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7288
7289         return emulator_write_emulated(ctxt, rip, instruction, 3,
7290                 &ctxt->exception);
7291 }
7292
7293 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7294 {
7295         return vcpu->run->request_interrupt_window &&
7296                 likely(!pic_in_kernel(vcpu->kvm));
7297 }
7298
7299 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7300 {
7301         struct kvm_run *kvm_run = vcpu->run;
7302
7303         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7304         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7305         kvm_run->cr8 = kvm_get_cr8(vcpu);
7306         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7307         kvm_run->ready_for_interrupt_injection =
7308                 pic_in_kernel(vcpu->kvm) ||
7309                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7310 }
7311
7312 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7313 {
7314         int max_irr, tpr;
7315
7316         if (!kvm_x86_ops->update_cr8_intercept)
7317                 return;
7318
7319         if (!lapic_in_kernel(vcpu))
7320                 return;
7321
7322         if (vcpu->arch.apicv_active)
7323                 return;
7324
7325         if (!vcpu->arch.apic->vapic_addr)
7326                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7327         else
7328                 max_irr = -1;
7329
7330         if (max_irr != -1)
7331                 max_irr >>= 4;
7332
7333         tpr = kvm_lapic_get_cr8(vcpu);
7334
7335         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7336 }
7337
7338 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7339 {
7340         int r;
7341
7342         /* try to reinject previous events if any */
7343
7344         if (vcpu->arch.exception.injected)
7345                 kvm_x86_ops->queue_exception(vcpu);
7346         /*
7347          * Do not inject an NMI or interrupt if there is a pending
7348          * exception.  Exceptions and interrupts are recognized at
7349          * instruction boundaries, i.e. the start of an instruction.
7350          * Trap-like exceptions, e.g. #DB, have higher priority than
7351          * NMIs and interrupts, i.e. traps are recognized before an
7352          * NMI/interrupt that's pending on the same instruction.
7353          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7354          * priority, but are only generated (pended) during instruction
7355          * execution, i.e. a pending fault-like exception means the
7356          * fault occurred on the *previous* instruction and must be
7357          * serviced prior to recognizing any new events in order to
7358          * fully complete the previous instruction.
7359          */
7360         else if (!vcpu->arch.exception.pending) {
7361                 if (vcpu->arch.nmi_injected)
7362                         kvm_x86_ops->set_nmi(vcpu);
7363                 else if (vcpu->arch.interrupt.injected)
7364                         kvm_x86_ops->set_irq(vcpu);
7365         }
7366
7367         /*
7368          * Call check_nested_events() even if we reinjected a previous event
7369          * in order for caller to determine if it should require immediate-exit
7370          * from L2 to L1 due to pending L1 events which require exit
7371          * from L2 to L1.
7372          */
7373         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7374                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7375                 if (r != 0)
7376                         return r;
7377         }
7378
7379         /* try to inject new event if pending */
7380         if (vcpu->arch.exception.pending) {
7381                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7382                                         vcpu->arch.exception.has_error_code,
7383                                         vcpu->arch.exception.error_code);
7384
7385                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7386                 vcpu->arch.exception.pending = false;
7387                 vcpu->arch.exception.injected = true;
7388
7389                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7390                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7391                                              X86_EFLAGS_RF);
7392
7393                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7394                         /*
7395                          * This code assumes that nSVM doesn't use
7396                          * check_nested_events(). If it does, the
7397                          * DR6/DR7 changes should happen before L1
7398                          * gets a #VMEXIT for an intercepted #DB in
7399                          * L2.  (Under VMX, on the other hand, the
7400                          * DR6/DR7 changes should not happen in the
7401                          * event of a VM-exit to L1 for an intercepted
7402                          * #DB in L2.)
7403                          */
7404                         kvm_deliver_exception_payload(vcpu);
7405                         if (vcpu->arch.dr7 & DR7_GD) {
7406                                 vcpu->arch.dr7 &= ~DR7_GD;
7407                                 kvm_update_dr7(vcpu);
7408                         }
7409                 }
7410
7411                 kvm_x86_ops->queue_exception(vcpu);
7412         }
7413
7414         /* Don't consider new event if we re-injected an event */
7415         if (kvm_event_needs_reinjection(vcpu))
7416                 return 0;
7417
7418         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7419             kvm_x86_ops->smi_allowed(vcpu)) {
7420                 vcpu->arch.smi_pending = false;
7421                 ++vcpu->arch.smi_count;
7422                 enter_smm(vcpu);
7423         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7424                 --vcpu->arch.nmi_pending;
7425                 vcpu->arch.nmi_injected = true;
7426                 kvm_x86_ops->set_nmi(vcpu);
7427         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7428                 /*
7429                  * Because interrupts can be injected asynchronously, we are
7430                  * calling check_nested_events again here to avoid a race condition.
7431                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7432                  * proposal and current concerns.  Perhaps we should be setting
7433                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7434                  */
7435                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7436                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7437                         if (r != 0)
7438                                 return r;
7439                 }
7440                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7441                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7442                                             false);
7443                         kvm_x86_ops->set_irq(vcpu);
7444                 }
7445         }
7446
7447         return 0;
7448 }
7449
7450 static void process_nmi(struct kvm_vcpu *vcpu)
7451 {
7452         unsigned limit = 2;
7453
7454         /*
7455          * x86 is limited to one NMI running, and one NMI pending after it.
7456          * If an NMI is already in progress, limit further NMIs to just one.
7457          * Otherwise, allow two (and we'll inject the first one immediately).
7458          */
7459         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7460                 limit = 1;
7461
7462         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7463         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7464         kvm_make_request(KVM_REQ_EVENT, vcpu);
7465 }
7466
7467 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7468 {
7469         u32 flags = 0;
7470         flags |= seg->g       << 23;
7471         flags |= seg->db      << 22;
7472         flags |= seg->l       << 21;
7473         flags |= seg->avl     << 20;
7474         flags |= seg->present << 15;
7475         flags |= seg->dpl     << 13;
7476         flags |= seg->s       << 12;
7477         flags |= seg->type    << 8;
7478         return flags;
7479 }
7480
7481 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7482 {
7483         struct kvm_segment seg;
7484         int offset;
7485
7486         kvm_get_segment(vcpu, &seg, n);
7487         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7488
7489         if (n < 3)
7490                 offset = 0x7f84 + n * 12;
7491         else
7492                 offset = 0x7f2c + (n - 3) * 12;
7493
7494         put_smstate(u32, buf, offset + 8, seg.base);
7495         put_smstate(u32, buf, offset + 4, seg.limit);
7496         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7497 }
7498
7499 #ifdef CONFIG_X86_64
7500 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7501 {
7502         struct kvm_segment seg;
7503         int offset;
7504         u16 flags;
7505
7506         kvm_get_segment(vcpu, &seg, n);
7507         offset = 0x7e00 + n * 16;
7508
7509         flags = enter_smm_get_segment_flags(&seg) >> 8;
7510         put_smstate(u16, buf, offset, seg.selector);
7511         put_smstate(u16, buf, offset + 2, flags);
7512         put_smstate(u32, buf, offset + 4, seg.limit);
7513         put_smstate(u64, buf, offset + 8, seg.base);
7514 }
7515 #endif
7516
7517 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7518 {
7519         struct desc_ptr dt;
7520         struct kvm_segment seg;
7521         unsigned long val;
7522         int i;
7523
7524         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7525         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7526         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7527         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7528
7529         for (i = 0; i < 8; i++)
7530                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7531
7532         kvm_get_dr(vcpu, 6, &val);
7533         put_smstate(u32, buf, 0x7fcc, (u32)val);
7534         kvm_get_dr(vcpu, 7, &val);
7535         put_smstate(u32, buf, 0x7fc8, (u32)val);
7536
7537         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7538         put_smstate(u32, buf, 0x7fc4, seg.selector);
7539         put_smstate(u32, buf, 0x7f64, seg.base);
7540         put_smstate(u32, buf, 0x7f60, seg.limit);
7541         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7542
7543         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7544         put_smstate(u32, buf, 0x7fc0, seg.selector);
7545         put_smstate(u32, buf, 0x7f80, seg.base);
7546         put_smstate(u32, buf, 0x7f7c, seg.limit);
7547         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7548
7549         kvm_x86_ops->get_gdt(vcpu, &dt);
7550         put_smstate(u32, buf, 0x7f74, dt.address);
7551         put_smstate(u32, buf, 0x7f70, dt.size);
7552
7553         kvm_x86_ops->get_idt(vcpu, &dt);
7554         put_smstate(u32, buf, 0x7f58, dt.address);
7555         put_smstate(u32, buf, 0x7f54, dt.size);
7556
7557         for (i = 0; i < 6; i++)
7558                 enter_smm_save_seg_32(vcpu, buf, i);
7559
7560         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7561
7562         /* revision id */
7563         put_smstate(u32, buf, 0x7efc, 0x00020000);
7564         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7565 }
7566
7567 #ifdef CONFIG_X86_64
7568 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7569 {
7570         struct desc_ptr dt;
7571         struct kvm_segment seg;
7572         unsigned long val;
7573         int i;
7574
7575         for (i = 0; i < 16; i++)
7576                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7577
7578         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7579         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7580
7581         kvm_get_dr(vcpu, 6, &val);
7582         put_smstate(u64, buf, 0x7f68, val);
7583         kvm_get_dr(vcpu, 7, &val);
7584         put_smstate(u64, buf, 0x7f60, val);
7585
7586         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7587         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7588         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7589
7590         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7591
7592         /* revision id */
7593         put_smstate(u32, buf, 0x7efc, 0x00020064);
7594
7595         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7596
7597         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7598         put_smstate(u16, buf, 0x7e90, seg.selector);
7599         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7600         put_smstate(u32, buf, 0x7e94, seg.limit);
7601         put_smstate(u64, buf, 0x7e98, seg.base);
7602
7603         kvm_x86_ops->get_idt(vcpu, &dt);
7604         put_smstate(u32, buf, 0x7e84, dt.size);
7605         put_smstate(u64, buf, 0x7e88, dt.address);
7606
7607         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7608         put_smstate(u16, buf, 0x7e70, seg.selector);
7609         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7610         put_smstate(u32, buf, 0x7e74, seg.limit);
7611         put_smstate(u64, buf, 0x7e78, seg.base);
7612
7613         kvm_x86_ops->get_gdt(vcpu, &dt);
7614         put_smstate(u32, buf, 0x7e64, dt.size);
7615         put_smstate(u64, buf, 0x7e68, dt.address);
7616
7617         for (i = 0; i < 6; i++)
7618                 enter_smm_save_seg_64(vcpu, buf, i);
7619 }
7620 #endif
7621
7622 static void enter_smm(struct kvm_vcpu *vcpu)
7623 {
7624         struct kvm_segment cs, ds;
7625         struct desc_ptr dt;
7626         char buf[512];
7627         u32 cr0;
7628
7629         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7630         memset(buf, 0, 512);
7631 #ifdef CONFIG_X86_64
7632         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7633                 enter_smm_save_state_64(vcpu, buf);
7634         else
7635 #endif
7636                 enter_smm_save_state_32(vcpu, buf);
7637
7638         /*
7639          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7640          * vCPU state (e.g. leave guest mode) after we've saved the state into
7641          * the SMM state-save area.
7642          */
7643         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7644
7645         vcpu->arch.hflags |= HF_SMM_MASK;
7646         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7647
7648         if (kvm_x86_ops->get_nmi_mask(vcpu))
7649                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7650         else
7651                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7652
7653         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7654         kvm_rip_write(vcpu, 0x8000);
7655
7656         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7657         kvm_x86_ops->set_cr0(vcpu, cr0);
7658         vcpu->arch.cr0 = cr0;
7659
7660         kvm_x86_ops->set_cr4(vcpu, 0);
7661
7662         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7663         dt.address = dt.size = 0;
7664         kvm_x86_ops->set_idt(vcpu, &dt);
7665
7666         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7667
7668         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7669         cs.base = vcpu->arch.smbase;
7670
7671         ds.selector = 0;
7672         ds.base = 0;
7673
7674         cs.limit    = ds.limit = 0xffffffff;
7675         cs.type     = ds.type = 0x3;
7676         cs.dpl      = ds.dpl = 0;
7677         cs.db       = ds.db = 0;
7678         cs.s        = ds.s = 1;
7679         cs.l        = ds.l = 0;
7680         cs.g        = ds.g = 1;
7681         cs.avl      = ds.avl = 0;
7682         cs.present  = ds.present = 1;
7683         cs.unusable = ds.unusable = 0;
7684         cs.padding  = ds.padding = 0;
7685
7686         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7687         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7688         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7689         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7690         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7691         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7692
7693 #ifdef CONFIG_X86_64
7694         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7695                 kvm_x86_ops->set_efer(vcpu, 0);
7696 #endif
7697
7698         kvm_update_cpuid(vcpu);
7699         kvm_mmu_reset_context(vcpu);
7700 }
7701
7702 static void process_smi(struct kvm_vcpu *vcpu)
7703 {
7704         vcpu->arch.smi_pending = true;
7705         kvm_make_request(KVM_REQ_EVENT, vcpu);
7706 }
7707
7708 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7709 {
7710         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7711 }
7712
7713 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7714 {
7715         if (!kvm_apic_present(vcpu))
7716                 return;
7717
7718         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7719
7720         if (irqchip_split(vcpu->kvm))
7721                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7722         else {
7723                 if (vcpu->arch.apicv_active)
7724                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7725                 if (ioapic_in_kernel(vcpu->kvm))
7726                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7727         }
7728
7729         if (is_guest_mode(vcpu))
7730                 vcpu->arch.load_eoi_exitmap_pending = true;
7731         else
7732                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7733 }
7734
7735 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7736 {
7737         u64 eoi_exit_bitmap[4];
7738
7739         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7740                 return;
7741
7742         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7743                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7744         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7745 }
7746
7747 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7748                 unsigned long start, unsigned long end,
7749                 bool blockable)
7750 {
7751         unsigned long apic_address;
7752
7753         /*
7754          * The physical address of apic access page is stored in the VMCS.
7755          * Update it when it becomes invalid.
7756          */
7757         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7758         if (start <= apic_address && apic_address < end)
7759                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7760
7761         return 0;
7762 }
7763
7764 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7765 {
7766         struct page *page = NULL;
7767
7768         if (!lapic_in_kernel(vcpu))
7769                 return;
7770
7771         if (!kvm_x86_ops->set_apic_access_page_addr)
7772                 return;
7773
7774         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7775         if (is_error_page(page))
7776                 return;
7777         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7778
7779         /*
7780          * Do not pin apic access page in memory, the MMU notifier
7781          * will call us again if it is migrated or swapped out.
7782          */
7783         put_page(page);
7784 }
7785 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7786
7787 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7788 {
7789         smp_send_reschedule(vcpu->cpu);
7790 }
7791 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7792
7793 /*
7794  * Returns 1 to let vcpu_run() continue the guest execution loop without
7795  * exiting to the userspace.  Otherwise, the value will be returned to the
7796  * userspace.
7797  */
7798 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7799 {
7800         int r;
7801         bool req_int_win =
7802                 dm_request_for_irq_injection(vcpu) &&
7803                 kvm_cpu_accept_dm_intr(vcpu);
7804
7805         bool req_immediate_exit = false;
7806
7807         if (kvm_request_pending(vcpu)) {
7808                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7809                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7810                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7811                         kvm_mmu_unload(vcpu);
7812                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7813                         __kvm_migrate_timers(vcpu);
7814                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7815                         kvm_gen_update_masterclock(vcpu->kvm);
7816                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7817                         kvm_gen_kvmclock_update(vcpu);
7818                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7819                         r = kvm_guest_time_update(vcpu);
7820                         if (unlikely(r))
7821                                 goto out;
7822                 }
7823                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7824                         kvm_mmu_sync_roots(vcpu);
7825                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7826                         kvm_mmu_load_cr3(vcpu);
7827                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7828                         kvm_vcpu_flush_tlb(vcpu, true);
7829                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7830                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7831                         r = 0;
7832                         goto out;
7833                 }
7834                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7835                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7836                         vcpu->mmio_needed = 0;
7837                         r = 0;
7838                         goto out;
7839                 }
7840                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7841                         /* Page is swapped out. Do synthetic halt */
7842                         vcpu->arch.apf.halted = true;
7843                         r = 1;
7844                         goto out;
7845                 }
7846                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7847                         record_steal_time(vcpu);
7848                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7849                         process_smi(vcpu);
7850                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7851                         process_nmi(vcpu);
7852                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7853                         kvm_pmu_handle_event(vcpu);
7854                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7855                         kvm_pmu_deliver_pmi(vcpu);
7856                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7857                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7858                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7859                                      vcpu->arch.ioapic_handled_vectors)) {
7860                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7861                                 vcpu->run->eoi.vector =
7862                                                 vcpu->arch.pending_ioapic_eoi;
7863                                 r = 0;
7864                                 goto out;
7865                         }
7866                 }
7867                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7868                         vcpu_scan_ioapic(vcpu);
7869                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7870                         vcpu_load_eoi_exitmap(vcpu);
7871                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7872                         kvm_vcpu_reload_apic_access_page(vcpu);
7873                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7874                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7875                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7876                         r = 0;
7877                         goto out;
7878                 }
7879                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7880                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7881                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7882                         r = 0;
7883                         goto out;
7884                 }
7885                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7886                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7887                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7888                         r = 0;
7889                         goto out;
7890                 }
7891
7892                 /*
7893                  * KVM_REQ_HV_STIMER has to be processed after
7894                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7895                  * depend on the guest clock being up-to-date
7896                  */
7897                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7898                         kvm_hv_process_stimers(vcpu);
7899         }
7900
7901         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7902                 ++vcpu->stat.req_event;
7903                 kvm_apic_accept_events(vcpu);
7904                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7905                         r = 1;
7906                         goto out;
7907                 }
7908
7909                 if (inject_pending_event(vcpu, req_int_win) != 0)
7910                         req_immediate_exit = true;
7911                 else {
7912                         /* Enable SMI/NMI/IRQ window open exits if needed.
7913                          *
7914                          * SMIs have three cases:
7915                          * 1) They can be nested, and then there is nothing to
7916                          *    do here because RSM will cause a vmexit anyway.
7917                          * 2) There is an ISA-specific reason why SMI cannot be
7918                          *    injected, and the moment when this changes can be
7919                          *    intercepted.
7920                          * 3) Or the SMI can be pending because
7921                          *    inject_pending_event has completed the injection
7922                          *    of an IRQ or NMI from the previous vmexit, and
7923                          *    then we request an immediate exit to inject the
7924                          *    SMI.
7925                          */
7926                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7927                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7928                                         req_immediate_exit = true;
7929                         if (vcpu->arch.nmi_pending)
7930                                 kvm_x86_ops->enable_nmi_window(vcpu);
7931                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7932                                 kvm_x86_ops->enable_irq_window(vcpu);
7933                         WARN_ON(vcpu->arch.exception.pending);
7934                 }
7935
7936                 if (kvm_lapic_enabled(vcpu)) {
7937                         update_cr8_intercept(vcpu);
7938                         kvm_lapic_sync_to_vapic(vcpu);
7939                 }
7940         }
7941
7942         r = kvm_mmu_reload(vcpu);
7943         if (unlikely(r)) {
7944                 goto cancel_injection;
7945         }
7946
7947         preempt_disable();
7948
7949         kvm_x86_ops->prepare_guest_switch(vcpu);
7950
7951         /*
7952          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7953          * IPI are then delayed after guest entry, which ensures that they
7954          * result in virtual interrupt delivery.
7955          */
7956         local_irq_disable();
7957         vcpu->mode = IN_GUEST_MODE;
7958
7959         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7960
7961         /*
7962          * 1) We should set ->mode before checking ->requests.  Please see
7963          * the comment in kvm_vcpu_exiting_guest_mode().
7964          *
7965          * 2) For APICv, we should set ->mode before checking PID.ON. This
7966          * pairs with the memory barrier implicit in pi_test_and_set_on
7967          * (see vmx_deliver_posted_interrupt).
7968          *
7969          * 3) This also orders the write to mode from any reads to the page
7970          * tables done while the VCPU is running.  Please see the comment
7971          * in kvm_flush_remote_tlbs.
7972          */
7973         smp_mb__after_srcu_read_unlock();
7974
7975         /*
7976          * This handles the case where a posted interrupt was
7977          * notified with kvm_vcpu_kick.
7978          */
7979         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7980                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7981
7982         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7983             || need_resched() || signal_pending(current)) {
7984                 vcpu->mode = OUTSIDE_GUEST_MODE;
7985                 smp_wmb();
7986                 local_irq_enable();
7987                 preempt_enable();
7988                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7989                 r = 1;
7990                 goto cancel_injection;
7991         }
7992
7993         if (req_immediate_exit) {
7994                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7995                 kvm_x86_ops->request_immediate_exit(vcpu);
7996         }
7997
7998         trace_kvm_entry(vcpu->vcpu_id);
7999         guest_enter_irqoff();
8000
8001         fpregs_assert_state_consistent();
8002         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8003                 switch_fpu_return();
8004
8005         if (unlikely(vcpu->arch.switch_db_regs)) {
8006                 set_debugreg(0, 7);
8007                 set_debugreg(vcpu->arch.eff_db[0], 0);
8008                 set_debugreg(vcpu->arch.eff_db[1], 1);
8009                 set_debugreg(vcpu->arch.eff_db[2], 2);
8010                 set_debugreg(vcpu->arch.eff_db[3], 3);
8011                 set_debugreg(vcpu->arch.dr6, 6);
8012                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8013         }
8014
8015         kvm_x86_ops->run(vcpu);
8016
8017         /*
8018          * Do this here before restoring debug registers on the host.  And
8019          * since we do this before handling the vmexit, a DR access vmexit
8020          * can (a) read the correct value of the debug registers, (b) set
8021          * KVM_DEBUGREG_WONT_EXIT again.
8022          */
8023         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8024                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8025                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8026                 kvm_update_dr0123(vcpu);
8027                 kvm_update_dr6(vcpu);
8028                 kvm_update_dr7(vcpu);
8029                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8030         }
8031
8032         /*
8033          * If the guest has used debug registers, at least dr7
8034          * will be disabled while returning to the host.
8035          * If we don't have active breakpoints in the host, we don't
8036          * care about the messed up debug address registers. But if
8037          * we have some of them active, restore the old state.
8038          */
8039         if (hw_breakpoint_active())
8040                 hw_breakpoint_restore();
8041
8042         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8043
8044         vcpu->mode = OUTSIDE_GUEST_MODE;
8045         smp_wmb();
8046
8047         kvm_x86_ops->handle_exit_irqoff(vcpu);
8048
8049         ++vcpu->stat.exits;
8050
8051         guest_exit_irqoff();
8052         if (lapic_in_kernel(vcpu)) {
8053                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8054                 if (delta != S64_MIN) {
8055                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8056                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8057                 }
8058         }
8059
8060         local_irq_enable();
8061         preempt_enable();
8062
8063         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8064
8065         /*
8066          * Profile KVM exit RIPs:
8067          */
8068         if (unlikely(prof_on == KVM_PROFILING)) {
8069                 unsigned long rip = kvm_rip_read(vcpu);
8070                 profile_hit(KVM_PROFILING, (void *)rip);
8071         }
8072
8073         if (unlikely(vcpu->arch.tsc_always_catchup))
8074                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8075
8076         if (vcpu->arch.apic_attention)
8077                 kvm_lapic_sync_from_vapic(vcpu);
8078
8079         vcpu->arch.gpa_available = false;
8080         r = kvm_x86_ops->handle_exit(vcpu);
8081         return r;
8082
8083 cancel_injection:
8084         kvm_x86_ops->cancel_injection(vcpu);
8085         if (unlikely(vcpu->arch.apic_attention))
8086                 kvm_lapic_sync_from_vapic(vcpu);
8087 out:
8088         return r;
8089 }
8090
8091 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8092 {
8093         if (!kvm_arch_vcpu_runnable(vcpu) &&
8094             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8095                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8096                 kvm_vcpu_block(vcpu);
8097                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8098
8099                 if (kvm_x86_ops->post_block)
8100                         kvm_x86_ops->post_block(vcpu);
8101
8102                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8103                         return 1;
8104         }
8105
8106         kvm_apic_accept_events(vcpu);
8107         switch(vcpu->arch.mp_state) {
8108         case KVM_MP_STATE_HALTED:
8109                 vcpu->arch.pv.pv_unhalted = false;
8110                 vcpu->arch.mp_state =
8111                         KVM_MP_STATE_RUNNABLE;
8112                 /* fall through */
8113         case KVM_MP_STATE_RUNNABLE:
8114                 vcpu->arch.apf.halted = false;
8115                 break;
8116         case KVM_MP_STATE_INIT_RECEIVED:
8117                 break;
8118         default:
8119                 return -EINTR;
8120                 break;
8121         }
8122         return 1;
8123 }
8124
8125 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8126 {
8127         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8128                 kvm_x86_ops->check_nested_events(vcpu, false);
8129
8130         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8131                 !vcpu->arch.apf.halted);
8132 }
8133
8134 static int vcpu_run(struct kvm_vcpu *vcpu)
8135 {
8136         int r;
8137         struct kvm *kvm = vcpu->kvm;
8138
8139         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8140         vcpu->arch.l1tf_flush_l1d = true;
8141
8142         for (;;) {
8143                 if (kvm_vcpu_running(vcpu)) {
8144                         r = vcpu_enter_guest(vcpu);
8145                 } else {
8146                         r = vcpu_block(kvm, vcpu);
8147                 }
8148
8149                 if (r <= 0)
8150                         break;
8151
8152                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8153                 if (kvm_cpu_has_pending_timer(vcpu))
8154                         kvm_inject_pending_timer_irqs(vcpu);
8155
8156                 if (dm_request_for_irq_injection(vcpu) &&
8157                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8158                         r = 0;
8159                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8160                         ++vcpu->stat.request_irq_exits;
8161                         break;
8162                 }
8163
8164                 kvm_check_async_pf_completion(vcpu);
8165
8166                 if (signal_pending(current)) {
8167                         r = -EINTR;
8168                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8169                         ++vcpu->stat.signal_exits;
8170                         break;
8171                 }
8172                 if (need_resched()) {
8173                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8174                         cond_resched();
8175                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8176                 }
8177         }
8178
8179         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8180
8181         return r;
8182 }
8183
8184 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8185 {
8186         int r;
8187         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8188         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8189         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8190         if (r != EMULATE_DONE)
8191                 return 0;
8192         return 1;
8193 }
8194
8195 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8196 {
8197         BUG_ON(!vcpu->arch.pio.count);
8198
8199         return complete_emulated_io(vcpu);
8200 }
8201
8202 /*
8203  * Implements the following, as a state machine:
8204  *
8205  * read:
8206  *   for each fragment
8207  *     for each mmio piece in the fragment
8208  *       write gpa, len
8209  *       exit
8210  *       copy data
8211  *   execute insn
8212  *
8213  * write:
8214  *   for each fragment
8215  *     for each mmio piece in the fragment
8216  *       write gpa, len
8217  *       copy data
8218  *       exit
8219  */
8220 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8221 {
8222         struct kvm_run *run = vcpu->run;
8223         struct kvm_mmio_fragment *frag;
8224         unsigned len;
8225
8226         BUG_ON(!vcpu->mmio_needed);
8227
8228         /* Complete previous fragment */
8229         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8230         len = min(8u, frag->len);
8231         if (!vcpu->mmio_is_write)
8232                 memcpy(frag->data, run->mmio.data, len);
8233
8234         if (frag->len <= 8) {
8235                 /* Switch to the next fragment. */
8236                 frag++;
8237                 vcpu->mmio_cur_fragment++;
8238         } else {
8239                 /* Go forward to the next mmio piece. */
8240                 frag->data += len;
8241                 frag->gpa += len;
8242                 frag->len -= len;
8243         }
8244
8245         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8246                 vcpu->mmio_needed = 0;
8247
8248                 /* FIXME: return into emulator if single-stepping.  */
8249                 if (vcpu->mmio_is_write)
8250                         return 1;
8251                 vcpu->mmio_read_completed = 1;
8252                 return complete_emulated_io(vcpu);
8253         }
8254
8255         run->exit_reason = KVM_EXIT_MMIO;
8256         run->mmio.phys_addr = frag->gpa;
8257         if (vcpu->mmio_is_write)
8258                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8259         run->mmio.len = min(8u, frag->len);
8260         run->mmio.is_write = vcpu->mmio_is_write;
8261         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8262         return 0;
8263 }
8264
8265 /* Swap (qemu) user FPU context for the guest FPU context. */
8266 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8267 {
8268         fpregs_lock();
8269
8270         copy_fpregs_to_fpstate(&current->thread.fpu);
8271         /* PKRU is separately restored in kvm_x86_ops->run.  */
8272         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8273                                 ~XFEATURE_MASK_PKRU);
8274
8275         fpregs_mark_activate();
8276         fpregs_unlock();
8277
8278         trace_kvm_fpu(1);
8279 }
8280
8281 /* When vcpu_run ends, restore user space FPU context. */
8282 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8283 {
8284         fpregs_lock();
8285
8286         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8287         copy_kernel_to_fpregs(&current->thread.fpu.state);
8288
8289         fpregs_mark_activate();
8290         fpregs_unlock();
8291
8292         ++vcpu->stat.fpu_reload;
8293         trace_kvm_fpu(0);
8294 }
8295
8296 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8297 {
8298         int r;
8299
8300         vcpu_load(vcpu);
8301         kvm_sigset_activate(vcpu);
8302         kvm_load_guest_fpu(vcpu);
8303
8304         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8305                 if (kvm_run->immediate_exit) {
8306                         r = -EINTR;
8307                         goto out;
8308                 }
8309                 kvm_vcpu_block(vcpu);
8310                 kvm_apic_accept_events(vcpu);
8311                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8312                 r = -EAGAIN;
8313                 if (signal_pending(current)) {
8314                         r = -EINTR;
8315                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8316                         ++vcpu->stat.signal_exits;
8317                 }
8318                 goto out;
8319         }
8320
8321         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8322                 r = -EINVAL;
8323                 goto out;
8324         }
8325
8326         if (vcpu->run->kvm_dirty_regs) {
8327                 r = sync_regs(vcpu);
8328                 if (r != 0)
8329                         goto out;
8330         }
8331
8332         /* re-sync apic's tpr */
8333         if (!lapic_in_kernel(vcpu)) {
8334                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8335                         r = -EINVAL;
8336                         goto out;
8337                 }
8338         }
8339
8340         if (unlikely(vcpu->arch.complete_userspace_io)) {
8341                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8342                 vcpu->arch.complete_userspace_io = NULL;
8343                 r = cui(vcpu);
8344                 if (r <= 0)
8345                         goto out;
8346         } else
8347                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8348
8349         if (kvm_run->immediate_exit)
8350                 r = -EINTR;
8351         else
8352                 r = vcpu_run(vcpu);
8353
8354 out:
8355         kvm_put_guest_fpu(vcpu);
8356         if (vcpu->run->kvm_valid_regs)
8357                 store_regs(vcpu);
8358         post_kvm_run_save(vcpu);
8359         kvm_sigset_deactivate(vcpu);
8360
8361         vcpu_put(vcpu);
8362         return r;
8363 }
8364
8365 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8366 {
8367         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8368                 /*
8369                  * We are here if userspace calls get_regs() in the middle of
8370                  * instruction emulation. Registers state needs to be copied
8371                  * back from emulation context to vcpu. Userspace shouldn't do
8372                  * that usually, but some bad designed PV devices (vmware
8373                  * backdoor interface) need this to work
8374                  */
8375                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8376                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8377         }
8378         regs->rax = kvm_rax_read(vcpu);
8379         regs->rbx = kvm_rbx_read(vcpu);
8380         regs->rcx = kvm_rcx_read(vcpu);
8381         regs->rdx = kvm_rdx_read(vcpu);
8382         regs->rsi = kvm_rsi_read(vcpu);
8383         regs->rdi = kvm_rdi_read(vcpu);
8384         regs->rsp = kvm_rsp_read(vcpu);
8385         regs->rbp = kvm_rbp_read(vcpu);
8386 #ifdef CONFIG_X86_64
8387         regs->r8 = kvm_r8_read(vcpu);
8388         regs->r9 = kvm_r9_read(vcpu);
8389         regs->r10 = kvm_r10_read(vcpu);
8390         regs->r11 = kvm_r11_read(vcpu);
8391         regs->r12 = kvm_r12_read(vcpu);
8392         regs->r13 = kvm_r13_read(vcpu);
8393         regs->r14 = kvm_r14_read(vcpu);
8394         regs->r15 = kvm_r15_read(vcpu);
8395 #endif
8396
8397         regs->rip = kvm_rip_read(vcpu);
8398         regs->rflags = kvm_get_rflags(vcpu);
8399 }
8400
8401 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8402 {
8403         vcpu_load(vcpu);
8404         __get_regs(vcpu, regs);
8405         vcpu_put(vcpu);
8406         return 0;
8407 }
8408
8409 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8410 {
8411         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8412         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8413
8414         kvm_rax_write(vcpu, regs->rax);
8415         kvm_rbx_write(vcpu, regs->rbx);
8416         kvm_rcx_write(vcpu, regs->rcx);
8417         kvm_rdx_write(vcpu, regs->rdx);
8418         kvm_rsi_write(vcpu, regs->rsi);
8419         kvm_rdi_write(vcpu, regs->rdi);
8420         kvm_rsp_write(vcpu, regs->rsp);
8421         kvm_rbp_write(vcpu, regs->rbp);
8422 #ifdef CONFIG_X86_64
8423         kvm_r8_write(vcpu, regs->r8);
8424         kvm_r9_write(vcpu, regs->r9);
8425         kvm_r10_write(vcpu, regs->r10);
8426         kvm_r11_write(vcpu, regs->r11);
8427         kvm_r12_write(vcpu, regs->r12);
8428         kvm_r13_write(vcpu, regs->r13);
8429         kvm_r14_write(vcpu, regs->r14);
8430         kvm_r15_write(vcpu, regs->r15);
8431 #endif
8432
8433         kvm_rip_write(vcpu, regs->rip);
8434         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8435
8436         vcpu->arch.exception.pending = false;
8437
8438         kvm_make_request(KVM_REQ_EVENT, vcpu);
8439 }
8440
8441 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8442 {
8443         vcpu_load(vcpu);
8444         __set_regs(vcpu, regs);
8445         vcpu_put(vcpu);
8446         return 0;
8447 }
8448
8449 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8450 {
8451         struct kvm_segment cs;
8452
8453         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8454         *db = cs.db;
8455         *l = cs.l;
8456 }
8457 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8458
8459 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8460 {
8461         struct desc_ptr dt;
8462
8463         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8464         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8465         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8466         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8467         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8468         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8469
8470         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8471         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8472
8473         kvm_x86_ops->get_idt(vcpu, &dt);
8474         sregs->idt.limit = dt.size;
8475         sregs->idt.base = dt.address;
8476         kvm_x86_ops->get_gdt(vcpu, &dt);
8477         sregs->gdt.limit = dt.size;
8478         sregs->gdt.base = dt.address;
8479
8480         sregs->cr0 = kvm_read_cr0(vcpu);
8481         sregs->cr2 = vcpu->arch.cr2;
8482         sregs->cr3 = kvm_read_cr3(vcpu);
8483         sregs->cr4 = kvm_read_cr4(vcpu);
8484         sregs->cr8 = kvm_get_cr8(vcpu);
8485         sregs->efer = vcpu->arch.efer;
8486         sregs->apic_base = kvm_get_apic_base(vcpu);
8487
8488         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8489
8490         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8491                 set_bit(vcpu->arch.interrupt.nr,
8492                         (unsigned long *)sregs->interrupt_bitmap);
8493 }
8494
8495 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8496                                   struct kvm_sregs *sregs)
8497 {
8498         vcpu_load(vcpu);
8499         __get_sregs(vcpu, sregs);
8500         vcpu_put(vcpu);
8501         return 0;
8502 }
8503
8504 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8505                                     struct kvm_mp_state *mp_state)
8506 {
8507         vcpu_load(vcpu);
8508
8509         kvm_apic_accept_events(vcpu);
8510         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8511                                         vcpu->arch.pv.pv_unhalted)
8512                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8513         else
8514                 mp_state->mp_state = vcpu->arch.mp_state;
8515
8516         vcpu_put(vcpu);
8517         return 0;
8518 }
8519
8520 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8521                                     struct kvm_mp_state *mp_state)
8522 {
8523         int ret = -EINVAL;
8524
8525         vcpu_load(vcpu);
8526
8527         if (!lapic_in_kernel(vcpu) &&
8528             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8529                 goto out;
8530
8531         /* INITs are latched while in SMM */
8532         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8533             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8534              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8535                 goto out;
8536
8537         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8538                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8539                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8540         } else
8541                 vcpu->arch.mp_state = mp_state->mp_state;
8542         kvm_make_request(KVM_REQ_EVENT, vcpu);
8543
8544         ret = 0;
8545 out:
8546         vcpu_put(vcpu);
8547         return ret;
8548 }
8549
8550 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8551                     int reason, bool has_error_code, u32 error_code)
8552 {
8553         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8554         int ret;
8555
8556         init_emulate_ctxt(vcpu);
8557
8558         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8559                                    has_error_code, error_code);
8560
8561         if (ret)
8562                 return EMULATE_FAIL;
8563
8564         kvm_rip_write(vcpu, ctxt->eip);
8565         kvm_set_rflags(vcpu, ctxt->eflags);
8566         kvm_make_request(KVM_REQ_EVENT, vcpu);
8567         return EMULATE_DONE;
8568 }
8569 EXPORT_SYMBOL_GPL(kvm_task_switch);
8570
8571 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8572 {
8573         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8574                         (sregs->cr4 & X86_CR4_OSXSAVE))
8575                 return  -EINVAL;
8576
8577         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8578                 /*
8579                  * When EFER.LME and CR0.PG are set, the processor is in
8580                  * 64-bit mode (though maybe in a 32-bit code segment).
8581                  * CR4.PAE and EFER.LMA must be set.
8582                  */
8583                 if (!(sregs->cr4 & X86_CR4_PAE)
8584                     || !(sregs->efer & EFER_LMA))
8585                         return -EINVAL;
8586         } else {
8587                 /*
8588                  * Not in 64-bit mode: EFER.LMA is clear and the code
8589                  * segment cannot be 64-bit.
8590                  */
8591                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8592                         return -EINVAL;
8593         }
8594
8595         return 0;
8596 }
8597
8598 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8599 {
8600         struct msr_data apic_base_msr;
8601         int mmu_reset_needed = 0;
8602         int cpuid_update_needed = 0;
8603         int pending_vec, max_bits, idx;
8604         struct desc_ptr dt;
8605         int ret = -EINVAL;
8606
8607         if (kvm_valid_sregs(vcpu, sregs))
8608                 goto out;
8609
8610         apic_base_msr.data = sregs->apic_base;
8611         apic_base_msr.host_initiated = true;
8612         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8613                 goto out;
8614
8615         dt.size = sregs->idt.limit;
8616         dt.address = sregs->idt.base;
8617         kvm_x86_ops->set_idt(vcpu, &dt);
8618         dt.size = sregs->gdt.limit;
8619         dt.address = sregs->gdt.base;
8620         kvm_x86_ops->set_gdt(vcpu, &dt);
8621
8622         vcpu->arch.cr2 = sregs->cr2;
8623         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8624         vcpu->arch.cr3 = sregs->cr3;
8625         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8626
8627         kvm_set_cr8(vcpu, sregs->cr8);
8628
8629         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8630         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8631
8632         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8633         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8634         vcpu->arch.cr0 = sregs->cr0;
8635
8636         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8637         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8638                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8639         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8640         if (cpuid_update_needed)
8641                 kvm_update_cpuid(vcpu);
8642
8643         idx = srcu_read_lock(&vcpu->kvm->srcu);
8644         if (is_pae_paging(vcpu)) {
8645                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8646                 mmu_reset_needed = 1;
8647         }
8648         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8649
8650         if (mmu_reset_needed)
8651                 kvm_mmu_reset_context(vcpu);
8652
8653         max_bits = KVM_NR_INTERRUPTS;
8654         pending_vec = find_first_bit(
8655                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8656         if (pending_vec < max_bits) {
8657                 kvm_queue_interrupt(vcpu, pending_vec, false);
8658                 pr_debug("Set back pending irq %d\n", pending_vec);
8659         }
8660
8661         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8662         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8663         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8664         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8665         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8666         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8667
8668         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8669         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8670
8671         update_cr8_intercept(vcpu);
8672
8673         /* Older userspace won't unhalt the vcpu on reset. */
8674         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8675             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8676             !is_protmode(vcpu))
8677                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8678
8679         kvm_make_request(KVM_REQ_EVENT, vcpu);
8680
8681         ret = 0;
8682 out:
8683         return ret;
8684 }
8685
8686 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8687                                   struct kvm_sregs *sregs)
8688 {
8689         int ret;
8690
8691         vcpu_load(vcpu);
8692         ret = __set_sregs(vcpu, sregs);
8693         vcpu_put(vcpu);
8694         return ret;
8695 }
8696
8697 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8698                                         struct kvm_guest_debug *dbg)
8699 {
8700         unsigned long rflags;
8701         int i, r;
8702
8703         vcpu_load(vcpu);
8704
8705         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8706                 r = -EBUSY;
8707                 if (vcpu->arch.exception.pending)
8708                         goto out;
8709                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8710                         kvm_queue_exception(vcpu, DB_VECTOR);
8711                 else
8712                         kvm_queue_exception(vcpu, BP_VECTOR);
8713         }
8714
8715         /*
8716          * Read rflags as long as potentially injected trace flags are still
8717          * filtered out.
8718          */
8719         rflags = kvm_get_rflags(vcpu);
8720
8721         vcpu->guest_debug = dbg->control;
8722         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8723                 vcpu->guest_debug = 0;
8724
8725         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8726                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8727                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8728                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8729         } else {
8730                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8731                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8732         }
8733         kvm_update_dr7(vcpu);
8734
8735         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8736                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8737                         get_segment_base(vcpu, VCPU_SREG_CS);
8738
8739         /*
8740          * Trigger an rflags update that will inject or remove the trace
8741          * flags.
8742          */
8743         kvm_set_rflags(vcpu, rflags);
8744
8745         kvm_x86_ops->update_bp_intercept(vcpu);
8746
8747         r = 0;
8748
8749 out:
8750         vcpu_put(vcpu);
8751         return r;
8752 }
8753
8754 /*
8755  * Translate a guest virtual address to a guest physical address.
8756  */
8757 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8758                                     struct kvm_translation *tr)
8759 {
8760         unsigned long vaddr = tr->linear_address;
8761         gpa_t gpa;
8762         int idx;
8763
8764         vcpu_load(vcpu);
8765
8766         idx = srcu_read_lock(&vcpu->kvm->srcu);
8767         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8768         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8769         tr->physical_address = gpa;
8770         tr->valid = gpa != UNMAPPED_GVA;
8771         tr->writeable = 1;
8772         tr->usermode = 0;
8773
8774         vcpu_put(vcpu);
8775         return 0;
8776 }
8777
8778 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8779 {
8780         struct fxregs_state *fxsave;
8781
8782         vcpu_load(vcpu);
8783
8784         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8785         memcpy(fpu->fpr, fxsave->st_space, 128);
8786         fpu->fcw = fxsave->cwd;
8787         fpu->fsw = fxsave->swd;
8788         fpu->ftwx = fxsave->twd;
8789         fpu->last_opcode = fxsave->fop;
8790         fpu->last_ip = fxsave->rip;
8791         fpu->last_dp = fxsave->rdp;
8792         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8793
8794         vcpu_put(vcpu);
8795         return 0;
8796 }
8797
8798 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8799 {
8800         struct fxregs_state *fxsave;
8801
8802         vcpu_load(vcpu);
8803
8804         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8805
8806         memcpy(fxsave->st_space, fpu->fpr, 128);
8807         fxsave->cwd = fpu->fcw;
8808         fxsave->swd = fpu->fsw;
8809         fxsave->twd = fpu->ftwx;
8810         fxsave->fop = fpu->last_opcode;
8811         fxsave->rip = fpu->last_ip;
8812         fxsave->rdp = fpu->last_dp;
8813         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8814
8815         vcpu_put(vcpu);
8816         return 0;
8817 }
8818
8819 static void store_regs(struct kvm_vcpu *vcpu)
8820 {
8821         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8822
8823         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8824                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8825
8826         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8827                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8828
8829         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8830                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8831                                 vcpu, &vcpu->run->s.regs.events);
8832 }
8833
8834 static int sync_regs(struct kvm_vcpu *vcpu)
8835 {
8836         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8837                 return -EINVAL;
8838
8839         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8840                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8841                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8842         }
8843         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8844                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8845                         return -EINVAL;
8846                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8847         }
8848         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8849                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8850                                 vcpu, &vcpu->run->s.regs.events))
8851                         return -EINVAL;
8852                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8853         }
8854
8855         return 0;
8856 }
8857
8858 static void fx_init(struct kvm_vcpu *vcpu)
8859 {
8860         fpstate_init(&vcpu->arch.guest_fpu->state);
8861         if (boot_cpu_has(X86_FEATURE_XSAVES))
8862                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
8863                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8864
8865         /*
8866          * Ensure guest xcr0 is valid for loading
8867          */
8868         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8869
8870         vcpu->arch.cr0 |= X86_CR0_ET;
8871 }
8872
8873 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8874 {
8875         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8876
8877         kvmclock_reset(vcpu);
8878
8879         kvm_x86_ops->vcpu_free(vcpu);
8880         free_cpumask_var(wbinvd_dirty_mask);
8881 }
8882
8883 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8884                                                 unsigned int id)
8885 {
8886         struct kvm_vcpu *vcpu;
8887
8888         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8889                 printk_once(KERN_WARNING
8890                 "kvm: SMP vm created on host with unstable TSC; "
8891                 "guest TSC will not be reliable\n");
8892
8893         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8894
8895         return vcpu;
8896 }
8897
8898 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8899 {
8900         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
8901         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8902         kvm_vcpu_mtrr_init(vcpu);
8903         vcpu_load(vcpu);
8904         kvm_vcpu_reset(vcpu, false);
8905         kvm_init_mmu(vcpu, false);
8906         vcpu_put(vcpu);
8907         return 0;
8908 }
8909
8910 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8911 {
8912         struct msr_data msr;
8913         struct kvm *kvm = vcpu->kvm;
8914
8915         kvm_hv_vcpu_postcreate(vcpu);
8916
8917         if (mutex_lock_killable(&vcpu->mutex))
8918                 return;
8919         vcpu_load(vcpu);
8920         msr.data = 0x0;
8921         msr.index = MSR_IA32_TSC;
8922         msr.host_initiated = true;
8923         kvm_write_tsc(vcpu, &msr);
8924         vcpu_put(vcpu);
8925
8926         /* poll control enabled by default */
8927         vcpu->arch.msr_kvm_poll_control = 1;
8928
8929         mutex_unlock(&vcpu->mutex);
8930
8931         if (!kvmclock_periodic_sync)
8932                 return;
8933
8934         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8935                                         KVMCLOCK_SYNC_PERIOD);
8936 }
8937
8938 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8939 {
8940         vcpu->arch.apf.msr_val = 0;
8941
8942         vcpu_load(vcpu);
8943         kvm_mmu_unload(vcpu);
8944         vcpu_put(vcpu);
8945
8946         kvm_x86_ops->vcpu_free(vcpu);
8947 }
8948
8949 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8950 {
8951         kvm_lapic_reset(vcpu, init_event);
8952
8953         vcpu->arch.hflags = 0;
8954
8955         vcpu->arch.smi_pending = 0;
8956         vcpu->arch.smi_count = 0;
8957         atomic_set(&vcpu->arch.nmi_queued, 0);
8958         vcpu->arch.nmi_pending = 0;
8959         vcpu->arch.nmi_injected = false;
8960         kvm_clear_interrupt_queue(vcpu);
8961         kvm_clear_exception_queue(vcpu);
8962         vcpu->arch.exception.pending = false;
8963
8964         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8965         kvm_update_dr0123(vcpu);
8966         vcpu->arch.dr6 = DR6_INIT;
8967         kvm_update_dr6(vcpu);
8968         vcpu->arch.dr7 = DR7_FIXED_1;
8969         kvm_update_dr7(vcpu);
8970
8971         vcpu->arch.cr2 = 0;
8972
8973         kvm_make_request(KVM_REQ_EVENT, vcpu);
8974         vcpu->arch.apf.msr_val = 0;
8975         vcpu->arch.st.msr_val = 0;
8976
8977         kvmclock_reset(vcpu);
8978
8979         kvm_clear_async_pf_completion_queue(vcpu);
8980         kvm_async_pf_hash_reset(vcpu);
8981         vcpu->arch.apf.halted = false;
8982
8983         if (kvm_mpx_supported()) {
8984                 void *mpx_state_buffer;
8985
8986                 /*
8987                  * To avoid have the INIT path from kvm_apic_has_events() that be
8988                  * called with loaded FPU and does not let userspace fix the state.
8989                  */
8990                 if (init_event)
8991                         kvm_put_guest_fpu(vcpu);
8992                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
8993                                         XFEATURE_BNDREGS);
8994                 if (mpx_state_buffer)
8995                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8996                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
8997                                         XFEATURE_BNDCSR);
8998                 if (mpx_state_buffer)
8999                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9000                 if (init_event)
9001                         kvm_load_guest_fpu(vcpu);
9002         }
9003
9004         if (!init_event) {
9005                 kvm_pmu_reset(vcpu);
9006                 vcpu->arch.smbase = 0x30000;
9007
9008                 vcpu->arch.msr_misc_features_enables = 0;
9009
9010                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9011         }
9012
9013         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9014         vcpu->arch.regs_avail = ~0;
9015         vcpu->arch.regs_dirty = ~0;
9016
9017         vcpu->arch.ia32_xss = 0;
9018
9019         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9020 }
9021
9022 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9023 {
9024         struct kvm_segment cs;
9025
9026         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9027         cs.selector = vector << 8;
9028         cs.base = vector << 12;
9029         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9030         kvm_rip_write(vcpu, 0);
9031 }
9032
9033 int kvm_arch_hardware_enable(void)
9034 {
9035         struct kvm *kvm;
9036         struct kvm_vcpu *vcpu;
9037         int i;
9038         int ret;
9039         u64 local_tsc;
9040         u64 max_tsc = 0;
9041         bool stable, backwards_tsc = false;
9042
9043         kvm_shared_msr_cpu_online();
9044         ret = kvm_x86_ops->hardware_enable();
9045         if (ret != 0)
9046                 return ret;
9047
9048         local_tsc = rdtsc();
9049         stable = !kvm_check_tsc_unstable();
9050         list_for_each_entry(kvm, &vm_list, vm_list) {
9051                 kvm_for_each_vcpu(i, vcpu, kvm) {
9052                         if (!stable && vcpu->cpu == smp_processor_id())
9053                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9054                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9055                                 backwards_tsc = true;
9056                                 if (vcpu->arch.last_host_tsc > max_tsc)
9057                                         max_tsc = vcpu->arch.last_host_tsc;
9058                         }
9059                 }
9060         }
9061
9062         /*
9063          * Sometimes, even reliable TSCs go backwards.  This happens on
9064          * platforms that reset TSC during suspend or hibernate actions, but
9065          * maintain synchronization.  We must compensate.  Fortunately, we can
9066          * detect that condition here, which happens early in CPU bringup,
9067          * before any KVM threads can be running.  Unfortunately, we can't
9068          * bring the TSCs fully up to date with real time, as we aren't yet far
9069          * enough into CPU bringup that we know how much real time has actually
9070          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
9071          * variables that haven't been updated yet.
9072          *
9073          * So we simply find the maximum observed TSC above, then record the
9074          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9075          * the adjustment will be applied.  Note that we accumulate
9076          * adjustments, in case multiple suspend cycles happen before some VCPU
9077          * gets a chance to run again.  In the event that no KVM threads get a
9078          * chance to run, we will miss the entire elapsed period, as we'll have
9079          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9080          * loose cycle time.  This isn't too big a deal, since the loss will be
9081          * uniform across all VCPUs (not to mention the scenario is extremely
9082          * unlikely). It is possible that a second hibernate recovery happens
9083          * much faster than a first, causing the observed TSC here to be
9084          * smaller; this would require additional padding adjustment, which is
9085          * why we set last_host_tsc to the local tsc observed here.
9086          *
9087          * N.B. - this code below runs only on platforms with reliable TSC,
9088          * as that is the only way backwards_tsc is set above.  Also note
9089          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9090          * have the same delta_cyc adjustment applied if backwards_tsc
9091          * is detected.  Note further, this adjustment is only done once,
9092          * as we reset last_host_tsc on all VCPUs to stop this from being
9093          * called multiple times (one for each physical CPU bringup).
9094          *
9095          * Platforms with unreliable TSCs don't have to deal with this, they
9096          * will be compensated by the logic in vcpu_load, which sets the TSC to
9097          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9098          * guarantee that they stay in perfect synchronization.
9099          */
9100         if (backwards_tsc) {
9101                 u64 delta_cyc = max_tsc - local_tsc;
9102                 list_for_each_entry(kvm, &vm_list, vm_list) {
9103                         kvm->arch.backwards_tsc_observed = true;
9104                         kvm_for_each_vcpu(i, vcpu, kvm) {
9105                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9106                                 vcpu->arch.last_host_tsc = local_tsc;
9107                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9108                         }
9109
9110                         /*
9111                          * We have to disable TSC offset matching.. if you were
9112                          * booting a VM while issuing an S4 host suspend....
9113                          * you may have some problem.  Solving this issue is
9114                          * left as an exercise to the reader.
9115                          */
9116                         kvm->arch.last_tsc_nsec = 0;
9117                         kvm->arch.last_tsc_write = 0;
9118                 }
9119
9120         }
9121         return 0;
9122 }
9123
9124 void kvm_arch_hardware_disable(void)
9125 {
9126         kvm_x86_ops->hardware_disable();
9127         drop_user_return_notifiers();
9128 }
9129
9130 int kvm_arch_hardware_setup(void)
9131 {
9132         int r;
9133
9134         r = kvm_x86_ops->hardware_setup();
9135         if (r != 0)
9136                 return r;
9137
9138         if (kvm_has_tsc_control) {
9139                 /*
9140                  * Make sure the user can only configure tsc_khz values that
9141                  * fit into a signed integer.
9142                  * A min value is not calculated because it will always
9143                  * be 1 on all machines.
9144                  */
9145                 u64 max = min(0x7fffffffULL,
9146                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9147                 kvm_max_guest_tsc_khz = max;
9148
9149                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9150         }
9151
9152         kvm_init_msr_list();
9153         return 0;
9154 }
9155
9156 void kvm_arch_hardware_unsetup(void)
9157 {
9158         kvm_x86_ops->hardware_unsetup();
9159 }
9160
9161 int kvm_arch_check_processor_compat(void)
9162 {
9163         return kvm_x86_ops->check_processor_compatibility();
9164 }
9165
9166 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9167 {
9168         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9169 }
9170 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9171
9172 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9173 {
9174         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9175 }
9176
9177 struct static_key kvm_no_apic_vcpu __read_mostly;
9178 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9179
9180 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9181 {
9182         struct page *page;
9183         int r;
9184
9185         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9186         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9187                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9188         else
9189                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9190
9191         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9192         if (!page) {
9193                 r = -ENOMEM;
9194                 goto fail;
9195         }
9196         vcpu->arch.pio_data = page_address(page);
9197
9198         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9199
9200         r = kvm_mmu_create(vcpu);
9201         if (r < 0)
9202                 goto fail_free_pio_data;
9203
9204         if (irqchip_in_kernel(vcpu->kvm)) {
9205                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9206                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9207                 if (r < 0)
9208                         goto fail_mmu_destroy;
9209         } else
9210                 static_key_slow_inc(&kvm_no_apic_vcpu);
9211
9212         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9213                                        GFP_KERNEL_ACCOUNT);
9214         if (!vcpu->arch.mce_banks) {
9215                 r = -ENOMEM;
9216                 goto fail_free_lapic;
9217         }
9218         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9219
9220         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9221                                 GFP_KERNEL_ACCOUNT)) {
9222                 r = -ENOMEM;
9223                 goto fail_free_mce_banks;
9224         }
9225
9226         fx_init(vcpu);
9227
9228         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9229
9230         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9231
9232         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9233
9234         kvm_async_pf_hash_reset(vcpu);
9235         kvm_pmu_init(vcpu);
9236
9237         vcpu->arch.pending_external_vector = -1;
9238         vcpu->arch.preempted_in_kernel = false;
9239
9240         kvm_hv_vcpu_init(vcpu);
9241
9242         return 0;
9243
9244 fail_free_mce_banks:
9245         kfree(vcpu->arch.mce_banks);
9246 fail_free_lapic:
9247         kvm_free_lapic(vcpu);
9248 fail_mmu_destroy:
9249         kvm_mmu_destroy(vcpu);
9250 fail_free_pio_data:
9251         free_page((unsigned long)vcpu->arch.pio_data);
9252 fail:
9253         return r;
9254 }
9255
9256 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9257 {
9258         int idx;
9259
9260         kvm_hv_vcpu_uninit(vcpu);
9261         kvm_pmu_destroy(vcpu);
9262         kfree(vcpu->arch.mce_banks);
9263         kvm_free_lapic(vcpu);
9264         idx = srcu_read_lock(&vcpu->kvm->srcu);
9265         kvm_mmu_destroy(vcpu);
9266         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9267         free_page((unsigned long)vcpu->arch.pio_data);
9268         if (!lapic_in_kernel(vcpu))
9269                 static_key_slow_dec(&kvm_no_apic_vcpu);
9270 }
9271
9272 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9273 {
9274         vcpu->arch.l1tf_flush_l1d = true;
9275         kvm_x86_ops->sched_in(vcpu, cpu);
9276 }
9277
9278 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9279 {
9280         if (type)
9281                 return -EINVAL;
9282
9283         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9284         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9285         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9286         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9287
9288         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9289         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9290         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9291         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9292                 &kvm->arch.irq_sources_bitmap);
9293
9294         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9295         mutex_init(&kvm->arch.apic_map_lock);
9296         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9297
9298         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
9299         pvclock_update_vm_gtod_copy(kvm);
9300
9301         kvm->arch.guest_can_read_msr_platform_info = true;
9302
9303         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9304         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9305
9306         kvm_hv_init_vm(kvm);
9307         kvm_page_track_init(kvm);
9308         kvm_mmu_init_vm(kvm);
9309
9310         if (kvm_x86_ops->vm_init)
9311                 return kvm_x86_ops->vm_init(kvm);
9312
9313         return 0;
9314 }
9315
9316 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9317 {
9318         vcpu_load(vcpu);
9319         kvm_mmu_unload(vcpu);
9320         vcpu_put(vcpu);
9321 }
9322
9323 static void kvm_free_vcpus(struct kvm *kvm)
9324 {
9325         unsigned int i;
9326         struct kvm_vcpu *vcpu;
9327
9328         /*
9329          * Unpin any mmu pages first.
9330          */
9331         kvm_for_each_vcpu(i, vcpu, kvm) {
9332                 kvm_clear_async_pf_completion_queue(vcpu);
9333                 kvm_unload_vcpu_mmu(vcpu);
9334         }
9335         kvm_for_each_vcpu(i, vcpu, kvm)
9336                 kvm_arch_vcpu_free(vcpu);
9337
9338         mutex_lock(&kvm->lock);
9339         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9340                 kvm->vcpus[i] = NULL;
9341
9342         atomic_set(&kvm->online_vcpus, 0);
9343         mutex_unlock(&kvm->lock);
9344 }
9345
9346 void kvm_arch_sync_events(struct kvm *kvm)
9347 {
9348         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9349         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9350         kvm_free_pit(kvm);
9351 }
9352
9353 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9354 {
9355         int i, r;
9356         unsigned long hva;
9357         struct kvm_memslots *slots = kvm_memslots(kvm);
9358         struct kvm_memory_slot *slot, old;
9359
9360         /* Called with kvm->slots_lock held.  */
9361         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9362                 return -EINVAL;
9363
9364         slot = id_to_memslot(slots, id);
9365         if (size) {
9366                 if (slot->npages)
9367                         return -EEXIST;
9368
9369                 /*
9370                  * MAP_SHARED to prevent internal slot pages from being moved
9371                  * by fork()/COW.
9372                  */
9373                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9374                               MAP_SHARED | MAP_ANONYMOUS, 0);
9375                 if (IS_ERR((void *)hva))
9376                         return PTR_ERR((void *)hva);
9377         } else {
9378                 if (!slot->npages)
9379                         return 0;
9380
9381                 hva = 0;
9382         }
9383
9384         old = *slot;
9385         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9386                 struct kvm_userspace_memory_region m;
9387
9388                 m.slot = id | (i << 16);
9389                 m.flags = 0;
9390                 m.guest_phys_addr = gpa;
9391                 m.userspace_addr = hva;
9392                 m.memory_size = size;
9393                 r = __kvm_set_memory_region(kvm, &m);
9394                 if (r < 0)
9395                         return r;
9396         }
9397
9398         if (!size)
9399                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9400
9401         return 0;
9402 }
9403 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9404
9405 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9406 {
9407         int r;
9408
9409         mutex_lock(&kvm->slots_lock);
9410         r = __x86_set_memory_region(kvm, id, gpa, size);
9411         mutex_unlock(&kvm->slots_lock);
9412
9413         return r;
9414 }
9415 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9416
9417 void kvm_arch_destroy_vm(struct kvm *kvm)
9418 {
9419         if (current->mm == kvm->mm) {
9420                 /*
9421                  * Free memory regions allocated on behalf of userspace,
9422                  * unless the the memory map has changed due to process exit
9423                  * or fd copying.
9424                  */
9425                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9426                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9427                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9428         }
9429         if (kvm_x86_ops->vm_destroy)
9430                 kvm_x86_ops->vm_destroy(kvm);
9431         kvm_pic_destroy(kvm);
9432         kvm_ioapic_destroy(kvm);
9433         kvm_free_vcpus(kvm);
9434         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9435         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9436         kvm_mmu_uninit_vm(kvm);
9437         kvm_page_track_cleanup(kvm);
9438         kvm_hv_destroy_vm(kvm);
9439 }
9440
9441 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9442                            struct kvm_memory_slot *dont)
9443 {
9444         int i;
9445
9446         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9447                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9448                         kvfree(free->arch.rmap[i]);
9449                         free->arch.rmap[i] = NULL;
9450                 }
9451                 if (i == 0)
9452                         continue;
9453
9454                 if (!dont || free->arch.lpage_info[i - 1] !=
9455                              dont->arch.lpage_info[i - 1]) {
9456                         kvfree(free->arch.lpage_info[i - 1]);
9457                         free->arch.lpage_info[i - 1] = NULL;
9458                 }
9459         }
9460
9461         kvm_page_track_free_memslot(free, dont);
9462 }
9463
9464 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9465                             unsigned long npages)
9466 {
9467         int i;
9468
9469         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9470                 struct kvm_lpage_info *linfo;
9471                 unsigned long ugfn;
9472                 int lpages;
9473                 int level = i + 1;
9474
9475                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9476                                       slot->base_gfn, level) + 1;
9477
9478                 slot->arch.rmap[i] =
9479                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9480                                  GFP_KERNEL_ACCOUNT);
9481                 if (!slot->arch.rmap[i])
9482                         goto out_free;
9483                 if (i == 0)
9484                         continue;
9485
9486                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9487                 if (!linfo)
9488                         goto out_free;
9489
9490                 slot->arch.lpage_info[i - 1] = linfo;
9491
9492                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9493                         linfo[0].disallow_lpage = 1;
9494                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9495                         linfo[lpages - 1].disallow_lpage = 1;
9496                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9497                 /*
9498                  * If the gfn and userspace address are not aligned wrt each
9499                  * other, or if explicitly asked to, disable large page
9500                  * support for this slot
9501                  */
9502                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9503                     !kvm_largepages_enabled()) {
9504                         unsigned long j;
9505
9506                         for (j = 0; j < lpages; ++j)
9507                                 linfo[j].disallow_lpage = 1;
9508                 }
9509         }
9510
9511         if (kvm_page_track_create_memslot(slot, npages))
9512                 goto out_free;
9513
9514         return 0;
9515
9516 out_free:
9517         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9518                 kvfree(slot->arch.rmap[i]);
9519                 slot->arch.rmap[i] = NULL;
9520                 if (i == 0)
9521                         continue;
9522
9523                 kvfree(slot->arch.lpage_info[i - 1]);
9524                 slot->arch.lpage_info[i - 1] = NULL;
9525         }
9526         return -ENOMEM;
9527 }
9528
9529 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9530 {
9531         /*
9532          * memslots->generation has been incremented.
9533          * mmio generation may have reached its maximum value.
9534          */
9535         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9536 }
9537
9538 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9539                                 struct kvm_memory_slot *memslot,
9540                                 const struct kvm_userspace_memory_region *mem,
9541                                 enum kvm_mr_change change)
9542 {
9543         return 0;
9544 }
9545
9546 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9547                                      struct kvm_memory_slot *new)
9548 {
9549         /* Still write protect RO slot */
9550         if (new->flags & KVM_MEM_READONLY) {
9551                 kvm_mmu_slot_remove_write_access(kvm, new);
9552                 return;
9553         }
9554
9555         /*
9556          * Call kvm_x86_ops dirty logging hooks when they are valid.
9557          *
9558          * kvm_x86_ops->slot_disable_log_dirty is called when:
9559          *
9560          *  - KVM_MR_CREATE with dirty logging is disabled
9561          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9562          *
9563          * The reason is, in case of PML, we need to set D-bit for any slots
9564          * with dirty logging disabled in order to eliminate unnecessary GPA
9565          * logging in PML buffer (and potential PML buffer full VMEXT). This
9566          * guarantees leaving PML enabled during guest's lifetime won't have
9567          * any additional overhead from PML when guest is running with dirty
9568          * logging disabled for memory slots.
9569          *
9570          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9571          * to dirty logging mode.
9572          *
9573          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9574          *
9575          * In case of write protect:
9576          *
9577          * Write protect all pages for dirty logging.
9578          *
9579          * All the sptes including the large sptes which point to this
9580          * slot are set to readonly. We can not create any new large
9581          * spte on this slot until the end of the logging.
9582          *
9583          * See the comments in fast_page_fault().
9584          */
9585         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9586                 if (kvm_x86_ops->slot_enable_log_dirty)
9587                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9588                 else
9589                         kvm_mmu_slot_remove_write_access(kvm, new);
9590         } else {
9591                 if (kvm_x86_ops->slot_disable_log_dirty)
9592                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9593         }
9594 }
9595
9596 void kvm_arch_commit_memory_region(struct kvm *kvm,
9597                                 const struct kvm_userspace_memory_region *mem,
9598                                 const struct kvm_memory_slot *old,
9599                                 const struct kvm_memory_slot *new,
9600                                 enum kvm_mr_change change)
9601 {
9602         if (!kvm->arch.n_requested_mmu_pages)
9603                 kvm_mmu_change_mmu_pages(kvm,
9604                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9605
9606         /*
9607          * Dirty logging tracks sptes in 4k granularity, meaning that large
9608          * sptes have to be split.  If live migration is successful, the guest
9609          * in the source machine will be destroyed and large sptes will be
9610          * created in the destination. However, if the guest continues to run
9611          * in the source machine (for example if live migration fails), small
9612          * sptes will remain around and cause bad performance.
9613          *
9614          * Scan sptes if dirty logging has been stopped, dropping those
9615          * which can be collapsed into a single large-page spte.  Later
9616          * page faults will create the large-page sptes.
9617          */
9618         if ((change != KVM_MR_DELETE) &&
9619                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9620                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9621                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9622
9623         /*
9624          * Set up write protection and/or dirty logging for the new slot.
9625          *
9626          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9627          * been zapped so no dirty logging staff is needed for old slot. For
9628          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9629          * new and it's also covered when dealing with the new slot.
9630          *
9631          * FIXME: const-ify all uses of struct kvm_memory_slot.
9632          */
9633         if (change != KVM_MR_DELETE)
9634                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9635 }
9636
9637 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9638 {
9639         kvm_mmu_zap_all(kvm);
9640 }
9641
9642 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9643                                    struct kvm_memory_slot *slot)
9644 {
9645         kvm_page_track_flush_slot(kvm, slot);
9646 }
9647
9648 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9649 {
9650         return (is_guest_mode(vcpu) &&
9651                         kvm_x86_ops->guest_apic_has_interrupt &&
9652                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9653 }
9654
9655 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9656 {
9657         if (!list_empty_careful(&vcpu->async_pf.done))
9658                 return true;
9659
9660         if (kvm_apic_has_events(vcpu))
9661                 return true;
9662
9663         if (vcpu->arch.pv.pv_unhalted)
9664                 return true;
9665
9666         if (vcpu->arch.exception.pending)
9667                 return true;
9668
9669         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9670             (vcpu->arch.nmi_pending &&
9671              kvm_x86_ops->nmi_allowed(vcpu)))
9672                 return true;
9673
9674         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9675             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9676                 return true;
9677
9678         if (kvm_arch_interrupt_allowed(vcpu) &&
9679             (kvm_cpu_has_interrupt(vcpu) ||
9680             kvm_guest_apic_has_interrupt(vcpu)))
9681                 return true;
9682
9683         if (kvm_hv_has_stimer_pending(vcpu))
9684                 return true;
9685
9686         return false;
9687 }
9688
9689 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9690 {
9691         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9692 }
9693
9694 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9695 {
9696         return vcpu->arch.preempted_in_kernel;
9697 }
9698
9699 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9700 {
9701         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9702 }
9703
9704 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9705 {
9706         return kvm_x86_ops->interrupt_allowed(vcpu);
9707 }
9708
9709 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9710 {
9711         if (is_64_bit_mode(vcpu))
9712                 return kvm_rip_read(vcpu);
9713         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9714                      kvm_rip_read(vcpu));
9715 }
9716 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9717
9718 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9719 {
9720         return kvm_get_linear_rip(vcpu) == linear_rip;
9721 }
9722 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9723
9724 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9725 {
9726         unsigned long rflags;
9727
9728         rflags = kvm_x86_ops->get_rflags(vcpu);
9729         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9730                 rflags &= ~X86_EFLAGS_TF;
9731         return rflags;
9732 }
9733 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9734
9735 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9736 {
9737         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9738             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9739                 rflags |= X86_EFLAGS_TF;
9740         kvm_x86_ops->set_rflags(vcpu, rflags);
9741 }
9742
9743 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9744 {
9745         __kvm_set_rflags(vcpu, rflags);
9746         kvm_make_request(KVM_REQ_EVENT, vcpu);
9747 }
9748 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9749
9750 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9751 {
9752         int r;
9753
9754         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9755               work->wakeup_all)
9756                 return;
9757
9758         r = kvm_mmu_reload(vcpu);
9759         if (unlikely(r))
9760                 return;
9761
9762         if (!vcpu->arch.mmu->direct_map &&
9763               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9764                 return;
9765
9766         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9767 }
9768
9769 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9770 {
9771         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9772 }
9773
9774 static inline u32 kvm_async_pf_next_probe(u32 key)
9775 {
9776         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9777 }
9778
9779 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9780 {
9781         u32 key = kvm_async_pf_hash_fn(gfn);
9782
9783         while (vcpu->arch.apf.gfns[key] != ~0)
9784                 key = kvm_async_pf_next_probe(key);
9785
9786         vcpu->arch.apf.gfns[key] = gfn;
9787 }
9788
9789 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9790 {
9791         int i;
9792         u32 key = kvm_async_pf_hash_fn(gfn);
9793
9794         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9795                      (vcpu->arch.apf.gfns[key] != gfn &&
9796                       vcpu->arch.apf.gfns[key] != ~0); i++)
9797                 key = kvm_async_pf_next_probe(key);
9798
9799         return key;
9800 }
9801
9802 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9803 {
9804         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9805 }
9806
9807 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9808 {
9809         u32 i, j, k;
9810
9811         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9812         while (true) {
9813                 vcpu->arch.apf.gfns[i] = ~0;
9814                 do {
9815                         j = kvm_async_pf_next_probe(j);
9816                         if (vcpu->arch.apf.gfns[j] == ~0)
9817                                 return;
9818                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9819                         /*
9820                          * k lies cyclically in ]i,j]
9821                          * |    i.k.j |
9822                          * |....j i.k.| or  |.k..j i...|
9823                          */
9824                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9825                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9826                 i = j;
9827         }
9828 }
9829
9830 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9831 {
9832
9833         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9834                                       sizeof(val));
9835 }
9836
9837 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9838 {
9839
9840         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9841                                       sizeof(u32));
9842 }
9843
9844 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
9845 {
9846         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
9847                 return false;
9848
9849         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9850             (vcpu->arch.apf.send_user_only &&
9851              kvm_x86_ops->get_cpl(vcpu) == 0))
9852                 return false;
9853
9854         return true;
9855 }
9856
9857 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
9858 {
9859         if (unlikely(!lapic_in_kernel(vcpu) ||
9860                      kvm_event_needs_reinjection(vcpu) ||
9861                      vcpu->arch.exception.pending))
9862                 return false;
9863
9864         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
9865                 return false;
9866
9867         /*
9868          * If interrupts are off we cannot even use an artificial
9869          * halt state.
9870          */
9871         return kvm_x86_ops->interrupt_allowed(vcpu);
9872 }
9873
9874 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9875                                      struct kvm_async_pf *work)
9876 {
9877         struct x86_exception fault;
9878
9879         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9880         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9881
9882         if (kvm_can_deliver_async_pf(vcpu) &&
9883             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9884                 fault.vector = PF_VECTOR;
9885                 fault.error_code_valid = true;
9886                 fault.error_code = 0;
9887                 fault.nested_page_fault = false;
9888                 fault.address = work->arch.token;
9889                 fault.async_page_fault = true;
9890                 kvm_inject_page_fault(vcpu, &fault);
9891         } else {
9892                 /*
9893                  * It is not possible to deliver a paravirtualized asynchronous
9894                  * page fault, but putting the guest in an artificial halt state
9895                  * can be beneficial nevertheless: if an interrupt arrives, we
9896                  * can deliver it timely and perhaps the guest will schedule
9897                  * another process.  When the instruction that triggered a page
9898                  * fault is retried, hopefully the page will be ready in the host.
9899                  */
9900                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9901         }
9902 }
9903
9904 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9905                                  struct kvm_async_pf *work)
9906 {
9907         struct x86_exception fault;
9908         u32 val;
9909
9910         if (work->wakeup_all)
9911                 work->arch.token = ~0; /* broadcast wakeup */
9912         else
9913                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9914         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9915
9916         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9917             !apf_get_user(vcpu, &val)) {
9918                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9919                     vcpu->arch.exception.pending &&
9920                     vcpu->arch.exception.nr == PF_VECTOR &&
9921                     !apf_put_user(vcpu, 0)) {
9922                         vcpu->arch.exception.injected = false;
9923                         vcpu->arch.exception.pending = false;
9924                         vcpu->arch.exception.nr = 0;
9925                         vcpu->arch.exception.has_error_code = false;
9926                         vcpu->arch.exception.error_code = 0;
9927                         vcpu->arch.exception.has_payload = false;
9928                         vcpu->arch.exception.payload = 0;
9929                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9930                         fault.vector = PF_VECTOR;
9931                         fault.error_code_valid = true;
9932                         fault.error_code = 0;
9933                         fault.nested_page_fault = false;
9934                         fault.address = work->arch.token;
9935                         fault.async_page_fault = true;
9936                         kvm_inject_page_fault(vcpu, &fault);
9937                 }
9938         }
9939         vcpu->arch.apf.halted = false;
9940         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9941 }
9942
9943 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9944 {
9945         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9946                 return true;
9947         else
9948                 return kvm_can_do_async_pf(vcpu);
9949 }
9950
9951 void kvm_arch_start_assignment(struct kvm *kvm)
9952 {
9953         atomic_inc(&kvm->arch.assigned_device_count);
9954 }
9955 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9956
9957 void kvm_arch_end_assignment(struct kvm *kvm)
9958 {
9959         atomic_dec(&kvm->arch.assigned_device_count);
9960 }
9961 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9962
9963 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9964 {
9965         return atomic_read(&kvm->arch.assigned_device_count);
9966 }
9967 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9968
9969 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9970 {
9971         atomic_inc(&kvm->arch.noncoherent_dma_count);
9972 }
9973 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9974
9975 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9976 {
9977         atomic_dec(&kvm->arch.noncoherent_dma_count);
9978 }
9979 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9980
9981 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9982 {
9983         return atomic_read(&kvm->arch.noncoherent_dma_count);
9984 }
9985 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9986
9987 bool kvm_arch_has_irq_bypass(void)
9988 {
9989         return kvm_x86_ops->update_pi_irte != NULL;
9990 }
9991
9992 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9993                                       struct irq_bypass_producer *prod)
9994 {
9995         struct kvm_kernel_irqfd *irqfd =
9996                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9997
9998         irqfd->producer = prod;
9999
10000         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10001                                            prod->irq, irqfd->gsi, 1);
10002 }
10003
10004 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10005                                       struct irq_bypass_producer *prod)
10006 {
10007         int ret;
10008         struct kvm_kernel_irqfd *irqfd =
10009                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10010
10011         WARN_ON(irqfd->producer != prod);
10012         irqfd->producer = NULL;
10013
10014         /*
10015          * When producer of consumer is unregistered, we change back to
10016          * remapped mode, so we can re-use the current implementation
10017          * when the irq is masked/disabled or the consumer side (KVM
10018          * int this case doesn't want to receive the interrupts.
10019         */
10020         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10021         if (ret)
10022                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10023                        " fails: %d\n", irqfd->consumer.token, ret);
10024 }
10025
10026 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10027                                    uint32_t guest_irq, bool set)
10028 {
10029         if (!kvm_x86_ops->update_pi_irte)
10030                 return -EINVAL;
10031
10032         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10033 }
10034
10035 bool kvm_vector_hashing_enabled(void)
10036 {
10037         return vector_hashing;
10038 }
10039 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10040
10041 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10042 {
10043         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10044 }
10045 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10046
10047
10048 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10049 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10050 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10051 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10052 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10053 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10054 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10055 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10056 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10057 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10058 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10059 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10060 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10061 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10062 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
10063 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10064 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10065 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10066 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);