arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72 #include <asm/intel_pt.h>
  73
  74 #define CREATE_TRACE_POINTS
  75 #include "trace.h"
  76
  77 #define MAX_IO_MSRS 256
  78 #define KVM_MAX_MCE_BANKS 32
  79 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  80 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  81
  82 #define emul_to_vcpu(ctxt) \
  83         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  84
  85 /* EFER defaults:
  86  * - enable syscall per default because its emulated by KVM
  87  * - enable LME and LMA per default on 64 bit KVM
  88  */
  89 #ifdef CONFIG_X86_64
  90 static
  91 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  92 #else
  93 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  94 #endif
  95
  96 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  97 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  98
  99 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 100                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 101
 102 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 103 static void process_nmi(struct kvm_vcpu *vcpu);
 104 static void enter_smm(struct kvm_vcpu *vcpu);
 105 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 106 static void store_regs(struct kvm_vcpu *vcpu);
 107 static int sync_regs(struct kvm_vcpu *vcpu);
 108
 109 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 110 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 111
 112 static bool __read_mostly ignore_msrs = 0;
 113 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 114
 115 static bool __read_mostly report_ignored_msrs = true;
 116 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 117
 118 unsigned int min_timer_period_us = 200;
 119 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 120
 121 static bool __read_mostly kvmclock_periodic_sync = true;
 122 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 123
 124 bool __read_mostly kvm_has_tsc_control;
 125 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 126 u32  __read_mostly kvm_max_guest_tsc_khz;
 127 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 128 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 129 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 130 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 131 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 132 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 133 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 134
 135 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 136 static u32 __read_mostly tsc_tolerance_ppm = 250;
 137 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 138
 139 /*
 140  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 141  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 142  * advancement entirely.  Any other value is used as-is and disables adaptive
 143  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 144  */
 145 static int __read_mostly lapic_timer_advance_ns = -1;
 146 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 147
 148 static bool __read_mostly vector_hashing = true;
 149 module_param(vector_hashing, bool, S_IRUGO);
 150
 151 bool __read_mostly enable_vmware_backdoor = false;
 152 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 153 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 154
 155 static bool __read_mostly force_emulation_prefix = false;
 156 module_param(force_emulation_prefix, bool, S_IRUGO);
 157
 158 #define KVM_NR_SHARED_MSRS 16
 159
 160 struct kvm_shared_msrs_global {
 161         int nr;
 162         u32 msrs[KVM_NR_SHARED_MSRS];
 163 };
 164
 165 struct kvm_shared_msrs {
 166         struct user_return_notifier urn;
 167         bool registered;
 168         struct kvm_shared_msr_values {
 169                 u64 host;
 170                 u64 curr;
 171         } values[KVM_NR_SHARED_MSRS];
 172 };
 173
 174 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 175 static struct kvm_shared_msrs __percpu *shared_msrs;
 176
 177 struct kvm_stats_debugfs_item debugfs_entries[] = {
 178         { "pf_fixed", VCPU_STAT(pf_fixed) },
 179         { "pf_guest", VCPU_STAT(pf_guest) },
 180         { "tlb_flush", VCPU_STAT(tlb_flush) },
 181         { "invlpg", VCPU_STAT(invlpg) },
 182         { "exits", VCPU_STAT(exits) },
 183         { "io_exits", VCPU_STAT(io_exits) },
 184         { "mmio_exits", VCPU_STAT(mmio_exits) },
 185         { "signal_exits", VCPU_STAT(signal_exits) },
 186         { "irq_window", VCPU_STAT(irq_window_exits) },
 187         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 188         { "halt_exits", VCPU_STAT(halt_exits) },
 189         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 190         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 191         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 192         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 193         { "hypercalls", VCPU_STAT(hypercalls) },
 194         { "request_irq", VCPU_STAT(request_irq_exits) },
 195         { "irq_exits", VCPU_STAT(irq_exits) },
 196         { "host_state_reload", VCPU_STAT(host_state_reload) },
 197         { "fpu_reload", VCPU_STAT(fpu_reload) },
 198         { "insn_emulation", VCPU_STAT(insn_emulation) },
 199         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 200         { "irq_injections", VCPU_STAT(irq_injections) },
 201         { "nmi_injections", VCPU_STAT(nmi_injections) },
 202         { "req_event", VCPU_STAT(req_event) },
 203         { "l1d_flush", VCPU_STAT(l1d_flush) },
 204         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 205         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 206         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 207         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 208         { "mmu_flooded", VM_STAT(mmu_flooded) },
 209         { "mmu_recycled", VM_STAT(mmu_recycled) },
 210         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 211         { "mmu_unsync", VM_STAT(mmu_unsync) },
 212         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 213         { "largepages", VM_STAT(lpages) },
 214         { "max_mmu_page_hash_collisions",
 215                 VM_STAT(max_mmu_page_hash_collisions) },
 216         { NULL }
 217 };
 218
 219 u64 __read_mostly host_xcr0;
 220
 221 struct kmem_cache *x86_fpu_cache;
 222 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 223
 224 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 225
 226 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 227 {
 228         int i;
 229         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 230                 vcpu->arch.apf.gfns[i] = ~0;
 231 }
 232
 233 static void kvm_on_user_return(struct user_return_notifier *urn)
 234 {
 235         unsigned slot;
 236         struct kvm_shared_msrs *locals
 237                 = container_of(urn, struct kvm_shared_msrs, urn);
 238         struct kvm_shared_msr_values *values;
 239         unsigned long flags;
 240
 241         /*
 242          * Disabling irqs at this point since the following code could be
 243          * interrupted and executed through kvm_arch_hardware_disable()
 244          */
 245         local_irq_save(flags);
 246         if (locals->registered) {
 247                 locals->registered = false;
 248                 user_return_notifier_unregister(urn);
 249         }
 250         local_irq_restore(flags);
 251         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 252                 values = &locals->values[slot];
 253                 if (values->host != values->curr) {
 254                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 255                         values->curr = values->host;
 256                 }
 257         }
 258 }
 259
 260 static void shared_msr_update(unsigned slot, u32 msr)
 261 {
 262         u64 value;
 263         unsigned int cpu = smp_processor_id();
 264         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 265
 266         /* only read, and nobody should modify it at this time,
 267          * so don't need lock */
 268         if (slot >= shared_msrs_global.nr) {
 269                 printk(KERN_ERR "kvm: invalid MSR slot!");
 270                 return;
 271         }
 272         rdmsrl_safe(msr, &value);
 273         smsr->values[slot].host = value;
 274         smsr->values[slot].curr = value;
 275 }
 276
 277 void kvm_define_shared_msr(unsigned slot, u32 msr)
 278 {
 279         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 280         shared_msrs_global.msrs[slot] = msr;
 281         if (slot >= shared_msrs_global.nr)
 282                 shared_msrs_global.nr = slot + 1;
 283 }
 284 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 285
 286 static void kvm_shared_msr_cpu_online(void)
 287 {
 288         unsigned i;
 289
 290         for (i = 0; i < shared_msrs_global.nr; ++i)
 291                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 292 }
 293
 294 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 295 {
 296         unsigned int cpu = smp_processor_id();
 297         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 298         int err;
 299
 300         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 301                 return 0;
 302         smsr->values[slot].curr = value;
 303         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 304         if (err)
 305                 return 1;
 306
 307         if (!smsr->registered) {
 308                 smsr->urn.on_user_return = kvm_on_user_return;
 309                 user_return_notifier_register(&smsr->urn);
 310                 smsr->registered = true;
 311         }
 312         return 0;
 313 }
 314 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 315
 316 static void drop_user_return_notifiers(void)
 317 {
 318         unsigned int cpu = smp_processor_id();
 319         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 320
 321         if (smsr->registered)
 322                 kvm_on_user_return(&smsr->urn);
 323 }
 324
 325 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 326 {
 327         return vcpu->arch.apic_base;
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 330
 331 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 332 {
 333         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 336
 337 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 338 {
 339         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 340         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 341         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 342                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 343
 344         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 345                 return 1;
 346         if (!msr_info->host_initiated) {
 347                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 348                         return 1;
 349                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 350                         return 1;
 351         }
 352
 353         kvm_lapic_set_base(vcpu, msr_info->data);
 354         return 0;
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 357
 358 asmlinkage __visible void kvm_spurious_fault(void)
 359 {
 360         /* Fault while not rebooting.  We want the trace. */
 361         BUG();
 362 }
 363 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 364
 365 #define EXCPT_BENIGN            0
 366 #define EXCPT_CONTRIBUTORY      1
 367 #define EXCPT_PF                2
 368
 369 static int exception_class(int vector)
 370 {
 371         switch (vector) {
 372         case PF_VECTOR:
 373                 return EXCPT_PF;
 374         case DE_VECTOR:
 375         case TS_VECTOR:
 376         case NP_VECTOR:
 377         case SS_VECTOR:
 378         case GP_VECTOR:
 379                 return EXCPT_CONTRIBUTORY;
 380         default:
 381                 break;
 382         }
 383         return EXCPT_BENIGN;
 384 }
 385
 386 #define EXCPT_FAULT             0
 387 #define EXCPT_TRAP              1
 388 #define EXCPT_ABORT             2
 389 #define EXCPT_INTERRUPT         3
 390
 391 static int exception_type(int vector)
 392 {
 393         unsigned int mask;
 394
 395         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 396                 return EXCPT_INTERRUPT;
 397
 398         mask = 1 << vector;
 399
 400         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 401         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 402                 return EXCPT_TRAP;
 403
 404         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 405                 return EXCPT_ABORT;
 406
 407         /* Reserved exceptions will result in fault */
 408         return EXCPT_FAULT;
 409 }
 410
 411 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 412 {
 413         unsigned nr = vcpu->arch.exception.nr;
 414         bool has_payload = vcpu->arch.exception.has_payload;
 415         unsigned long payload = vcpu->arch.exception.payload;
 416
 417         if (!has_payload)
 418                 return;
 419
 420         switch (nr) {
 421         case DB_VECTOR:
 422                 /*
 423                  * "Certain debug exceptions may clear bit 0-3.  The
 424                  * remaining contents of the DR6 register are never
 425                  * cleared by the processor".
 426                  */
 427                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 428                 /*
 429                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 430                  */
 431                 vcpu->arch.dr6 |= DR6_RTM;
 432                 vcpu->arch.dr6 |= payload;
 433                 /*
 434                  * Bit 16 should be set in the payload whenever the #DB
 435                  * exception should clear DR6.RTM. This makes the payload
 436                  * compatible with the pending debug exceptions under VMX.
 437                  * Though not currently documented in the SDM, this also
 438                  * makes the payload compatible with the exit qualification
 439                  * for #DB exceptions under VMX.
 440                  */
 441                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 442                 break;
 443         case PF_VECTOR:
 444                 vcpu->arch.cr2 = payload;
 445                 break;
 446         }
 447
 448         vcpu->arch.exception.has_payload = false;
 449         vcpu->arch.exception.payload = 0;
 450 }
 451 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 452
 453 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 454                 unsigned nr, bool has_error, u32 error_code,
 455                 bool has_payload, unsigned long payload, bool reinject)
 456 {
 457         u32 prev_nr;
 458         int class1, class2;
 459
 460         kvm_make_request(KVM_REQ_EVENT, vcpu);
 461
 462         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 463         queue:
 464                 if (has_error && !is_protmode(vcpu))
 465                         has_error = false;
 466                 if (reinject) {
 467                         /*
 468                          * On vmentry, vcpu->arch.exception.pending is only
 469                          * true if an event injection was blocked by
 470                          * nested_run_pending.  In that case, however,
 471                          * vcpu_enter_guest requests an immediate exit,
 472                          * and the guest shouldn't proceed far enough to
 473                          * need reinjection.
 474                          */
 475                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 476                         vcpu->arch.exception.injected = true;
 477                         if (WARN_ON_ONCE(has_payload)) {
 478                                 /*
 479                                  * A reinjected event has already
 480                                  * delivered its payload.
 481                                  */
 482                                 has_payload = false;
 483                                 payload = 0;
 484                         }
 485                 } else {
 486                         vcpu->arch.exception.pending = true;
 487                         vcpu->arch.exception.injected = false;
 488                 }
 489                 vcpu->arch.exception.has_error_code = has_error;
 490                 vcpu->arch.exception.nr = nr;
 491                 vcpu->arch.exception.error_code = error_code;
 492                 vcpu->arch.exception.has_payload = has_payload;
 493                 vcpu->arch.exception.payload = payload;
 494                 /*
 495                  * In guest mode, payload delivery should be deferred,
 496                  * so that the L1 hypervisor can intercept #PF before
 497                  * CR2 is modified (or intercept #DB before DR6 is
 498                  * modified under nVMX).  However, for ABI
 499                  * compatibility with KVM_GET_VCPU_EVENTS and
 500                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 501                  * delivery unless userspace has enabled this
 502                  * functionality via the per-VM capability,
 503                  * KVM_CAP_EXCEPTION_PAYLOAD.
 504                  */
 505                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 506                     !is_guest_mode(vcpu))
 507                         kvm_deliver_exception_payload(vcpu);
 508                 return;
 509         }
 510
 511         /* to check exception */
 512         prev_nr = vcpu->arch.exception.nr;
 513         if (prev_nr == DF_VECTOR) {
 514                 /* triple fault -> shutdown */
 515                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 516                 return;
 517         }
 518         class1 = exception_class(prev_nr);
 519         class2 = exception_class(nr);
 520         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 521                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 522                 /*
 523                  * Generate double fault per SDM Table 5-5.  Set
 524                  * exception.pending = true so that the double fault
 525                  * can trigger a nested vmexit.
 526                  */
 527                 vcpu->arch.exception.pending = true;
 528                 vcpu->arch.exception.injected = false;
 529                 vcpu->arch.exception.has_error_code = true;
 530                 vcpu->arch.exception.nr = DF_VECTOR;
 531                 vcpu->arch.exception.error_code = 0;
 532                 vcpu->arch.exception.has_payload = false;
 533                 vcpu->arch.exception.payload = 0;
 534         } else
 535                 /* replace previous exception with a new one in a hope
 536                    that instruction re-execution will regenerate lost
 537                    exception */
 538                 goto queue;
 539 }
 540
 541 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 542 {
 543         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 544 }
 545 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 546
 547 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 548 {
 549         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 550 }
 551 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 552
 553 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 554                                   unsigned long payload)
 555 {
 556         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 557 }
 558
 559 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 560                                     u32 error_code, unsigned long payload)
 561 {
 562         kvm_multiple_exception(vcpu, nr, true, error_code,
 563                                true, payload, false);
 564 }
 565
 566 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 567 {
 568         if (err)
 569                 kvm_inject_gp(vcpu, 0);
 570         else
 571                 return kvm_skip_emulated_instruction(vcpu);
 572
 573         return 1;
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 576
 577 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 578 {
 579         ++vcpu->stat.pf_guest;
 580         vcpu->arch.exception.nested_apf =
 581                 is_guest_mode(vcpu) && fault->async_page_fault;
 582         if (vcpu->arch.exception.nested_apf) {
 583                 vcpu->arch.apf.nested_apf_token = fault->address;
 584                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 585         } else {
 586                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 587                                         fault->address);
 588         }
 589 }
 590 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 591
 592 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 593 {
 594         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 595                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 596         else
 597                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 598
 599         return fault->nested_page_fault;
 600 }
 601
 602 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 603 {
 604         atomic_inc(&vcpu->arch.nmi_queued);
 605         kvm_make_request(KVM_REQ_NMI, vcpu);
 606 }
 607 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 608
 609 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 610 {
 611         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 612 }
 613 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 614
 615 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 616 {
 617         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 618 }
 619 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 620
 621 /*
 622  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 623  * a #GP and return false.
 624  */
 625 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 626 {
 627         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 628                 return true;
 629         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 630         return false;
 631 }
 632 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 633
 634 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 635 {
 636         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 637                 return true;
 638
 639         kvm_queue_exception(vcpu, UD_VECTOR);
 640         return false;
 641 }
 642 EXPORT_SYMBOL_GPL(kvm_require_dr);
 643
 644 /*
 645  * This function will be used to read from the physical memory of the currently
 646  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 647  * can read from guest physical or from the guest's guest physical memory.
 648  */
 649 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 650                             gfn_t ngfn, void *data, int offset, int len,
 651                             u32 access)
 652 {
 653         struct x86_exception exception;
 654         gfn_t real_gfn;
 655         gpa_t ngpa;
 656
 657         ngpa     = gfn_to_gpa(ngfn);
 658         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 659         if (real_gfn == UNMAPPED_GVA)
 660                 return -EFAULT;
 661
 662         real_gfn = gpa_to_gfn(real_gfn);
 663
 664         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 667
 668 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 669                                void *data, int offset, int len, u32 access)
 670 {
 671         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 672                                        data, offset, len, access);
 673 }
 674
 675 /*
 676  * Load the pae pdptrs.  Return true is they are all valid.
 677  */
 678 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 679 {
 680         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 681         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 682         int i;
 683         int ret;
 684         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 685
 686         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 687                                       offset * sizeof(u64), sizeof(pdpte),
 688                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 689         if (ret < 0) {
 690                 ret = 0;
 691                 goto out;
 692         }
 693         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 694                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 695                     (pdpte[i] &
 696                      vcpu->arch.mmu->guest_rsvd_check.rsvd_bits_mask[0][2])) {
 697                         ret = 0;
 698                         goto out;
 699                 }
 700         }
 701         ret = 1;
 702
 703         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 704         __set_bit(VCPU_EXREG_PDPTR,
 705                   (unsigned long *)&vcpu->arch.regs_avail);
 706         __set_bit(VCPU_EXREG_PDPTR,
 707                   (unsigned long *)&vcpu->arch.regs_dirty);
 708 out:
 709
 710         return ret;
 711 }
 712 EXPORT_SYMBOL_GPL(load_pdptrs);
 713
 714 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 715 {
 716         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 717         bool changed = true;
 718         int offset;
 719         gfn_t gfn;
 720         int r;
 721
 722         if (is_long_mode(vcpu) || !is_pae(vcpu) || !is_paging(vcpu))
 723                 return false;
 724
 725         if (!test_bit(VCPU_EXREG_PDPTR,
 726                       (unsigned long *)&vcpu->arch.regs_avail))
 727                 return true;
 728
 729         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 730         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 731         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 732                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 733         if (r < 0)
 734                 goto out;
 735         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 736 out:
 737
 738         return changed;
 739 }
 740 EXPORT_SYMBOL_GPL(pdptrs_changed);
 741
 742 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 743 {
 744         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 745         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 746
 747         cr0 |= X86_CR0_ET;
 748
 749 #ifdef CONFIG_X86_64
 750         if (cr0 & 0xffffffff00000000UL)
 751                 return 1;
 752 #endif
 753
 754         cr0 &= ~CR0_RESERVED_BITS;
 755
 756         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 757                 return 1;
 758
 759         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 760                 return 1;
 761
 762         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 763 #ifdef CONFIG_X86_64
 764                 if ((vcpu->arch.efer & EFER_LME)) {
 765                         int cs_db, cs_l;
 766
 767                         if (!is_pae(vcpu))
 768                                 return 1;
 769                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 770                         if (cs_l)
 771                                 return 1;
 772                 } else
 773 #endif
 774                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 775                                                  kvm_read_cr3(vcpu)))
 776                         return 1;
 777         }
 778
 779         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 780                 return 1;
 781
 782         kvm_x86_ops->set_cr0(vcpu, cr0);
 783
 784         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 785                 kvm_clear_async_pf_completion_queue(vcpu);
 786                 kvm_async_pf_hash_reset(vcpu);
 787         }
 788
 789         if ((cr0 ^ old_cr0) & update_bits)
 790                 kvm_mmu_reset_context(vcpu);
 791
 792         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 793             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 794             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 795                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 796
 797         return 0;
 798 }
 799 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 800
 801 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 802 {
 803         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 804 }
 805 EXPORT_SYMBOL_GPL(kvm_lmsw);
 806
 807 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 808 {
 809         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 810                         !vcpu->guest_xcr0_loaded) {
 811                 /* kvm_set_xcr() also depends on this */
 812                 if (vcpu->arch.xcr0 != host_xcr0)
 813                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 814                 vcpu->guest_xcr0_loaded = 1;
 815         }
 816 }
 817 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 818
 819 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 820 {
 821         if (vcpu->guest_xcr0_loaded) {
 822                 if (vcpu->arch.xcr0 != host_xcr0)
 823                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 824                 vcpu->guest_xcr0_loaded = 0;
 825         }
 826 }
 827 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 828
 829 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 830 {
 831         u64 xcr0 = xcr;
 832         u64 old_xcr0 = vcpu->arch.xcr0;
 833         u64 valid_bits;
 834
 835         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 836         if (index != XCR_XFEATURE_ENABLED_MASK)
 837                 return 1;
 838         if (!(xcr0 & XFEATURE_MASK_FP))
 839                 return 1;
 840         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 841                 return 1;
 842
 843         /*
 844          * Do not allow the guest to set bits that we do not support
 845          * saving.  However, xcr0 bit 0 is always set, even if the
 846          * emulated CPU does not support XSAVE (see fx_init).
 847          */
 848         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 849         if (xcr0 & ~valid_bits)
 850                 return 1;
 851
 852         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 853             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 854                 return 1;
 855
 856         if (xcr0 & XFEATURE_MASK_AVX512) {
 857                 if (!(xcr0 & XFEATURE_MASK_YMM))
 858                         return 1;
 859                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 860                         return 1;
 861         }
 862         vcpu->arch.xcr0 = xcr0;
 863
 864         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 865                 kvm_update_cpuid(vcpu);
 866         return 0;
 867 }
 868
 869 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 870 {
 871         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 872             __kvm_set_xcr(vcpu, index, xcr)) {
 873                 kvm_inject_gp(vcpu, 0);
 874                 return 1;
 875         }
 876         return 0;
 877 }
 878 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 879
 880 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 881 {
 882         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 883         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 884                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 885
 886         if (cr4 & CR4_RESERVED_BITS)
 887                 return 1;
 888
 889         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 890                 return 1;
 891
 892         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 893                 return 1;
 894
 895         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 896                 return 1;
 897
 898         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 899                 return 1;
 900
 901         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 902                 return 1;
 903
 904         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 905                 return 1;
 906
 907         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 908                 return 1;
 909
 910         if (is_long_mode(vcpu)) {
 911                 if (!(cr4 & X86_CR4_PAE))
 912                         return 1;
 913         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 914                    && ((cr4 ^ old_cr4) & pdptr_bits)
 915                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 916                                    kvm_read_cr3(vcpu)))
 917                 return 1;
 918
 919         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 920                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 921                         return 1;
 922
 923                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 924                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 925                         return 1;
 926         }
 927
 928         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 929                 return 1;
 930
 931         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 932             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 933                 kvm_mmu_reset_context(vcpu);
 934
 935         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 936                 kvm_update_cpuid(vcpu);
 937
 938         return 0;
 939 }
 940 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 941
 942 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 943 {
 944         bool skip_tlb_flush = false;
 945 #ifdef CONFIG_X86_64
 946         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 947
 948         if (pcid_enabled) {
 949                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 950                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 951         }
 952 #endif
 953
 954         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 955                 if (!skip_tlb_flush) {
 956                         kvm_mmu_sync_roots(vcpu);
 957                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 958                 }
 959                 return 0;
 960         }
 961
 962         if (is_long_mode(vcpu) &&
 963             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 964                 return 1;
 965         else if (is_pae(vcpu) && is_paging(vcpu) &&
 966                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 967                 return 1;
 968
 969         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 970         vcpu->arch.cr3 = cr3;
 971         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 972
 973         return 0;
 974 }
 975 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 976
 977 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 978 {
 979         if (cr8 & CR8_RESERVED_BITS)
 980                 return 1;
 981         if (lapic_in_kernel(vcpu))
 982                 kvm_lapic_set_tpr(vcpu, cr8);
 983         else
 984                 vcpu->arch.cr8 = cr8;
 985         return 0;
 986 }
 987 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 988
 989 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 990 {
 991         if (lapic_in_kernel(vcpu))
 992                 return kvm_lapic_get_cr8(vcpu);
 993         else
 994                 return vcpu->arch.cr8;
 995 }
 996 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 997
 998 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 999 {
1000         int i;
1001
1002         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1003                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1004                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1005                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1006         }
1007 }
1008
1009 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1010 {
1011         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1012                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1013 }
1014
1015 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1016 {
1017         unsigned long dr7;
1018
1019         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1020                 dr7 = vcpu->arch.guest_debug_dr7;
1021         else
1022                 dr7 = vcpu->arch.dr7;
1023         kvm_x86_ops->set_dr7(vcpu, dr7);
1024         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1025         if (dr7 & DR7_BP_EN_MASK)
1026                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1027 }
1028
1029 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1030 {
1031         u64 fixed = DR6_FIXED_1;
1032
1033         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1034                 fixed |= DR6_RTM;
1035         return fixed;
1036 }
1037
1038 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1039 {
1040         switch (dr) {
1041         case 0 ... 3:
1042                 vcpu->arch.db[dr] = val;
1043                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1044                         vcpu->arch.eff_db[dr] = val;
1045                 break;
1046         case 4:
1047                 /* fall through */
1048         case 6:
1049                 if (val & 0xffffffff00000000ULL)
1050                         return -1; /* #GP */
1051                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1052                 kvm_update_dr6(vcpu);
1053                 break;
1054         case 5:
1055                 /* fall through */
1056         default: /* 7 */
1057                 if (val & 0xffffffff00000000ULL)
1058                         return -1; /* #GP */
1059                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1060                 kvm_update_dr7(vcpu);
1061                 break;
1062         }
1063
1064         return 0;
1065 }
1066
1067 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1068 {
1069         if (__kvm_set_dr(vcpu, dr, val)) {
1070                 kvm_inject_gp(vcpu, 0);
1071                 return 1;
1072         }
1073         return 0;
1074 }
1075 EXPORT_SYMBOL_GPL(kvm_set_dr);
1076
1077 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1078 {
1079         switch (dr) {
1080         case 0 ... 3:
1081                 *val = vcpu->arch.db[dr];
1082                 break;
1083         case 4:
1084                 /* fall through */
1085         case 6:
1086                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1087                         *val = vcpu->arch.dr6;
1088                 else
1089                         *val = kvm_x86_ops->get_dr6(vcpu);
1090                 break;
1091         case 5:
1092                 /* fall through */
1093         default: /* 7 */
1094                 *val = vcpu->arch.dr7;
1095                 break;
1096         }
1097         return 0;
1098 }
1099 EXPORT_SYMBOL_GPL(kvm_get_dr);
1100
1101 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1102 {
1103         u32 ecx = kvm_rcx_read(vcpu);
1104         u64 data;
1105         int err;
1106
1107         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1108         if (err)
1109                 return err;
1110         kvm_rax_write(vcpu, (u32)data);
1111         kvm_rdx_write(vcpu, data >> 32);
1112         return err;
1113 }
1114 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1115
1116 /*
1117  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1118  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1119  *
1120  * This list is modified at module load time to reflect the
1121  * capabilities of the host cpu. This capabilities test skips MSRs that are
1122  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1123  * may depend on host virtualization features rather than host cpu features.
1124  */
1125
1126 static u32 msrs_to_save[] = {
1127         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1128         MSR_STAR,
1129 #ifdef CONFIG_X86_64
1130         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1131 #endif
1132         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1133         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1134         MSR_IA32_SPEC_CTRL,
1135         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1136         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1137         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1138         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1139         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1140         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1141 };
1142
1143 static unsigned num_msrs_to_save;
1144
1145 static u32 emulated_msrs[] = {
1146         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1147         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1148         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1149         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1150         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1151         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1152         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1153         HV_X64_MSR_RESET,
1154         HV_X64_MSR_VP_INDEX,
1155         HV_X64_MSR_VP_RUNTIME,
1156         HV_X64_MSR_SCONTROL,
1157         HV_X64_MSR_STIMER0_CONFIG,
1158         HV_X64_MSR_VP_ASSIST_PAGE,
1159         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1160         HV_X64_MSR_TSC_EMULATION_STATUS,
1161
1162         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1163         MSR_KVM_PV_EOI_EN,
1164
1165         MSR_IA32_TSC_ADJUST,
1166         MSR_IA32_TSCDEADLINE,
1167         MSR_IA32_ARCH_CAPABILITIES,
1168         MSR_IA32_MISC_ENABLE,
1169         MSR_IA32_MCG_STATUS,
1170         MSR_IA32_MCG_CTL,
1171         MSR_IA32_MCG_EXT_CTL,
1172         MSR_IA32_SMBASE,
1173         MSR_SMI_COUNT,
1174         MSR_PLATFORM_INFO,
1175         MSR_MISC_FEATURES_ENABLES,
1176         MSR_AMD64_VIRT_SPEC_CTRL,
1177         MSR_IA32_POWER_CTL,
1178
1179         MSR_K7_HWCR,
1180         MSR_KVM_POLL_CONTROL,
1181 };
1182
1183 static unsigned num_emulated_msrs;
1184
1185 /*
1186  * List of msr numbers which are used to expose MSR-based features that
1187  * can be used by a hypervisor to validate requested CPU features.
1188  */
1189 static u32 msr_based_features[] = {
1190         MSR_IA32_VMX_BASIC,
1191         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1192         MSR_IA32_VMX_PINBASED_CTLS,
1193         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1194         MSR_IA32_VMX_PROCBASED_CTLS,
1195         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1196         MSR_IA32_VMX_EXIT_CTLS,
1197         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1198         MSR_IA32_VMX_ENTRY_CTLS,
1199         MSR_IA32_VMX_MISC,
1200         MSR_IA32_VMX_CR0_FIXED0,
1201         MSR_IA32_VMX_CR0_FIXED1,
1202         MSR_IA32_VMX_CR4_FIXED0,
1203         MSR_IA32_VMX_CR4_FIXED1,
1204         MSR_IA32_VMX_VMCS_ENUM,
1205         MSR_IA32_VMX_PROCBASED_CTLS2,
1206         MSR_IA32_VMX_EPT_VPID_CAP,
1207         MSR_IA32_VMX_VMFUNC,
1208
1209         MSR_F10H_DECFG,
1210         MSR_IA32_UCODE_REV,
1211         MSR_IA32_ARCH_CAPABILITIES,
1212 };
1213
1214 static unsigned int num_msr_based_features;
1215
1216 static u64 kvm_get_arch_capabilities(void)
1217 {
1218         u64 data = 0;
1219
1220         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1221                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1222
1223         /*
1224          * If we're doing cache flushes (either "always" or "cond")
1225          * we will do one whenever the guest does a vmlaunch/vmresume.
1226          * If an outer hypervisor is doing the cache flush for us
1227          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1228          * capability to the guest too, and if EPT is disabled we're not
1229          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1230          * require a nested hypervisor to do a flush of its own.
1231          */
1232         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1233                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1234
1235         return data;
1236 }
1237
1238 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1239 {
1240         switch (msr->index) {
1241         case MSR_IA32_ARCH_CAPABILITIES:
1242                 msr->data = kvm_get_arch_capabilities();
1243                 break;
1244         case MSR_IA32_UCODE_REV:
1245                 rdmsrl_safe(msr->index, &msr->data);
1246                 break;
1247         default:
1248                 if (kvm_x86_ops->get_msr_feature(msr))
1249                         return 1;
1250         }
1251         return 0;
1252 }
1253
1254 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1255 {
1256         struct kvm_msr_entry msr;
1257         int r;
1258
1259         msr.index = index;
1260         r = kvm_get_msr_feature(&msr);
1261         if (r)
1262                 return r;
1263
1264         *data = msr.data;
1265
1266         return 0;
1267 }
1268
1269 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1270 {
1271         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1272                 return false;
1273
1274         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1275                 return false;
1276
1277         if (efer & (EFER_LME | EFER_LMA) &&
1278             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1279                 return false;
1280
1281         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1282                 return false;
1283
1284         return true;
1285
1286 }
1287 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1288 {
1289         if (efer & efer_reserved_bits)
1290                 return false;
1291
1292         return __kvm_valid_efer(vcpu, efer);
1293 }
1294 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1295
1296 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1297 {
1298         u64 old_efer = vcpu->arch.efer;
1299         u64 efer = msr_info->data;
1300
1301         if (efer & efer_reserved_bits)
1302                 return 1;
1303
1304         if (!msr_info->host_initiated) {
1305                 if (!__kvm_valid_efer(vcpu, efer))
1306                         return 1;
1307
1308                 if (is_paging(vcpu) &&
1309                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1310                         return 1;
1311         }
1312
1313         efer &= ~EFER_LMA;
1314         efer |= vcpu->arch.efer & EFER_LMA;
1315
1316         kvm_x86_ops->set_efer(vcpu, efer);
1317
1318         /* Update reserved bits */
1319         if ((efer ^ old_efer) & EFER_NX)
1320                 kvm_mmu_reset_context(vcpu);
1321
1322         return 0;
1323 }
1324
1325 void kvm_enable_efer_bits(u64 mask)
1326 {
1327        efer_reserved_bits &= ~mask;
1328 }
1329 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1330
1331 /*
1332  * Writes msr value into into the appropriate "register".
1333  * Returns 0 on success, non-0 otherwise.
1334  * Assumes vcpu_load() was already called.
1335  */
1336 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1337 {
1338         switch (msr->index) {
1339         case MSR_FS_BASE:
1340         case MSR_GS_BASE:
1341         case MSR_KERNEL_GS_BASE:
1342         case MSR_CSTAR:
1343         case MSR_LSTAR:
1344                 if (is_noncanonical_address(msr->data, vcpu))
1345                         return 1;
1346                 break;
1347         case MSR_IA32_SYSENTER_EIP:
1348         case MSR_IA32_SYSENTER_ESP:
1349                 /*
1350                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1351                  * non-canonical address is written on Intel but not on
1352                  * AMD (which ignores the top 32-bits, because it does
1353                  * not implement 64-bit SYSENTER).
1354                  *
1355                  * 64-bit code should hence be able to write a non-canonical
1356                  * value on AMD.  Making the address canonical ensures that
1357                  * vmentry does not fail on Intel after writing a non-canonical
1358                  * value, and that something deterministic happens if the guest
1359                  * invokes 64-bit SYSENTER.
1360                  */
1361                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1362         }
1363         return kvm_x86_ops->set_msr(vcpu, msr);
1364 }
1365 EXPORT_SYMBOL_GPL(kvm_set_msr);
1366
1367 /*
1368  * Adapt set_msr() to msr_io()'s calling convention
1369  */
1370 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1371 {
1372         struct msr_data msr;
1373         int r;
1374
1375         msr.index = index;
1376         msr.host_initiated = true;
1377         r = kvm_get_msr(vcpu, &msr);
1378         if (r)
1379                 return r;
1380
1381         *data = msr.data;
1382         return 0;
1383 }
1384
1385 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1386 {
1387         struct msr_data msr;
1388
1389         msr.data = *data;
1390         msr.index = index;
1391         msr.host_initiated = true;
1392         return kvm_set_msr(vcpu, &msr);
1393 }
1394
1395 #ifdef CONFIG_X86_64
1396 struct pvclock_gtod_data {
1397         seqcount_t      seq;
1398
1399         struct { /* extract of a clocksource struct */
1400                 int vclock_mode;
1401                 u64     cycle_last;
1402                 u64     mask;
1403                 u32     mult;
1404                 u32     shift;
1405         } clock;
1406
1407         u64             boot_ns;
1408         u64             nsec_base;
1409         u64             wall_time_sec;
1410 };
1411
1412 static struct pvclock_gtod_data pvclock_gtod_data;
1413
1414 static void update_pvclock_gtod(struct timekeeper *tk)
1415 {
1416         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1417         u64 boot_ns;
1418
1419         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1420
1421         write_seqcount_begin(&vdata->seq);
1422
1423         /* copy pvclock gtod data */
1424         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1425         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1426         vdata->clock.mask               = tk->tkr_mono.mask;
1427         vdata->clock.mult               = tk->tkr_mono.mult;
1428         vdata->clock.shift              = tk->tkr_mono.shift;
1429
1430         vdata->boot_ns                  = boot_ns;
1431         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1432
1433         vdata->wall_time_sec            = tk->xtime_sec;
1434
1435         write_seqcount_end(&vdata->seq);
1436 }
1437 #endif
1438
1439 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1440 {
1441         /*
1442          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1443          * vcpu_enter_guest.  This function is only called from
1444          * the physical CPU that is running vcpu.
1445          */
1446         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1447 }
1448
1449 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1450 {
1451         int version;
1452         int r;
1453         struct pvclock_wall_clock wc;
1454         struct timespec64 boot;
1455
1456         if (!wall_clock)
1457                 return;
1458
1459         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1460         if (r)
1461                 return;
1462
1463         if (version & 1)
1464                 ++version;  /* first time write, random junk */
1465
1466         ++version;
1467
1468         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1469                 return;
1470
1471         /*
1472          * The guest calculates current wall clock time by adding
1473          * system time (updated by kvm_guest_time_update below) to the
1474          * wall clock specified here.  guest system time equals host
1475          * system time for us, thus we must fill in host boot time here.
1476          */
1477         getboottime64(&boot);
1478
1479         if (kvm->arch.kvmclock_offset) {
1480                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1481                 boot = timespec64_sub(boot, ts);
1482         }
1483         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1484         wc.nsec = boot.tv_nsec;
1485         wc.version = version;
1486
1487         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1488
1489         version++;
1490         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1491 }
1492
1493 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1494 {
1495         do_shl32_div32(dividend, divisor);
1496         return dividend;
1497 }
1498
1499 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1500                                s8 *pshift, u32 *pmultiplier)
1501 {
1502         uint64_t scaled64;
1503         int32_t  shift = 0;
1504         uint64_t tps64;
1505         uint32_t tps32;
1506
1507         tps64 = base_hz;
1508         scaled64 = scaled_hz;
1509         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1510                 tps64 >>= 1;
1511                 shift--;
1512         }
1513
1514         tps32 = (uint32_t)tps64;
1515         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1516                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1517                         scaled64 >>= 1;
1518                 else
1519                         tps32 <<= 1;
1520                 shift++;
1521         }
1522
1523         *pshift = shift;
1524         *pmultiplier = div_frac(scaled64, tps32);
1525
1526         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1527                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1528 }
1529
1530 #ifdef CONFIG_X86_64
1531 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1532 #endif
1533
1534 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1535 static unsigned long max_tsc_khz;
1536
1537 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1538 {
1539         u64 v = (u64)khz * (1000000 + ppm);
1540         do_div(v, 1000000);
1541         return v;
1542 }
1543
1544 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1545 {
1546         u64 ratio;
1547
1548         /* Guest TSC same frequency as host TSC? */
1549         if (!scale) {
1550                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1551                 return 0;
1552         }
1553
1554         /* TSC scaling supported? */
1555         if (!kvm_has_tsc_control) {
1556                 if (user_tsc_khz > tsc_khz) {
1557                         vcpu->arch.tsc_catchup = 1;
1558                         vcpu->arch.tsc_always_catchup = 1;
1559                         return 0;
1560                 } else {
1561                         WARN(1, "user requested TSC rate below hardware speed\n");
1562                         return -1;
1563                 }
1564         }
1565
1566         /* TSC scaling required  - calculate ratio */
1567         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1568                                 user_tsc_khz, tsc_khz);
1569
1570         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1571                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1572                           user_tsc_khz);
1573                 return -1;
1574         }
1575
1576         vcpu->arch.tsc_scaling_ratio = ratio;
1577         return 0;
1578 }
1579
1580 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1581 {
1582         u32 thresh_lo, thresh_hi;
1583         int use_scaling = 0;
1584
1585         /* tsc_khz can be zero if TSC calibration fails */
1586         if (user_tsc_khz == 0) {
1587                 /* set tsc_scaling_ratio to a safe value */
1588                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1589                 return -1;
1590         }
1591
1592         /* Compute a scale to convert nanoseconds in TSC cycles */
1593         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1594                            &vcpu->arch.virtual_tsc_shift,
1595                            &vcpu->arch.virtual_tsc_mult);
1596         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1597
1598         /*
1599          * Compute the variation in TSC rate which is acceptable
1600          * within the range of tolerance and decide if the
1601          * rate being applied is within that bounds of the hardware
1602          * rate.  If so, no scaling or compensation need be done.
1603          */
1604         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1605         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1606         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1607                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1608                 use_scaling = 1;
1609         }
1610         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1611 }
1612
1613 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1614 {
1615         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1616                                       vcpu->arch.virtual_tsc_mult,
1617                                       vcpu->arch.virtual_tsc_shift);
1618         tsc += vcpu->arch.this_tsc_write;
1619         return tsc;
1620 }
1621
1622 static inline int gtod_is_based_on_tsc(int mode)
1623 {
1624         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1625 }
1626
1627 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1628 {
1629 #ifdef CONFIG_X86_64
1630         bool vcpus_matched;
1631         struct kvm_arch *ka = &vcpu->kvm->arch;
1632         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1633
1634         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1635                          atomic_read(&vcpu->kvm->online_vcpus));
1636
1637         /*
1638          * Once the masterclock is enabled, always perform request in
1639          * order to update it.
1640          *
1641          * In order to enable masterclock, the host clocksource must be TSC
1642          * and the vcpus need to have matched TSCs.  When that happens,
1643          * perform request to enable masterclock.
1644          */
1645         if (ka->use_master_clock ||
1646             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1647                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1648
1649         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1650                             atomic_read(&vcpu->kvm->online_vcpus),
1651                             ka->use_master_clock, gtod->clock.vclock_mode);
1652 #endif
1653 }
1654
1655 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1656 {
1657         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1658         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1659 }
1660
1661 /*
1662  * Multiply tsc by a fixed point number represented by ratio.
1663  *
1664  * The most significant 64-N bits (mult) of ratio represent the
1665  * integral part of the fixed point number; the remaining N bits
1666  * (frac) represent the fractional part, ie. ratio represents a fixed
1667  * point number (mult + frac * 2^(-N)).
1668  *
1669  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1670  */
1671 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1672 {
1673         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1674 }
1675
1676 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1677 {
1678         u64 _tsc = tsc;
1679         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1680
1681         if (ratio != kvm_default_tsc_scaling_ratio)
1682                 _tsc = __scale_tsc(ratio, tsc);
1683
1684         return _tsc;
1685 }
1686 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1687
1688 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1689 {
1690         u64 tsc;
1691
1692         tsc = kvm_scale_tsc(vcpu, rdtsc());
1693
1694         return target_tsc - tsc;
1695 }
1696
1697 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1698 {
1699         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1700
1701         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1702 }
1703 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1704
1705 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1706 {
1707         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1708 }
1709
1710 static inline bool kvm_check_tsc_unstable(void)
1711 {
1712 #ifdef CONFIG_X86_64
1713         /*
1714          * TSC is marked unstable when we're running on Hyper-V,
1715          * 'TSC page' clocksource is good.
1716          */
1717         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1718                 return false;
1719 #endif
1720         return check_tsc_unstable();
1721 }
1722
1723 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1724 {
1725         struct kvm *kvm = vcpu->kvm;
1726         u64 offset, ns, elapsed;
1727         unsigned long flags;
1728         bool matched;
1729         bool already_matched;
1730         u64 data = msr->data;
1731         bool synchronizing = false;
1732
1733         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1734         offset = kvm_compute_tsc_offset(vcpu, data);
1735         ns = ktime_get_boot_ns();
1736         elapsed = ns - kvm->arch.last_tsc_nsec;
1737
1738         if (vcpu->arch.virtual_tsc_khz) {
1739                 if (data == 0 && msr->host_initiated) {
1740                         /*
1741                          * detection of vcpu initialization -- need to sync
1742                          * with other vCPUs. This particularly helps to keep
1743                          * kvm_clock stable after CPU hotplug
1744                          */
1745                         synchronizing = true;
1746                 } else {
1747                         u64 tsc_exp = kvm->arch.last_tsc_write +
1748                                                 nsec_to_cycles(vcpu, elapsed);
1749                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1750                         /*
1751                          * Special case: TSC write with a small delta (1 second)
1752                          * of virtual cycle time against real time is
1753                          * interpreted as an attempt to synchronize the CPU.
1754                          */
1755                         synchronizing = data < tsc_exp + tsc_hz &&
1756                                         data + tsc_hz > tsc_exp;
1757                 }
1758         }
1759
1760         /*
1761          * For a reliable TSC, we can match TSC offsets, and for an unstable
1762          * TSC, we add elapsed time in this computation.  We could let the
1763          * compensation code attempt to catch up if we fall behind, but
1764          * it's better to try to match offsets from the beginning.
1765          */
1766         if (synchronizing &&
1767             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1768                 if (!kvm_check_tsc_unstable()) {
1769                         offset = kvm->arch.cur_tsc_offset;
1770                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1771                 } else {
1772                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1773                         data += delta;
1774                         offset = kvm_compute_tsc_offset(vcpu, data);
1775                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1776                 }
1777                 matched = true;
1778                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1779         } else {
1780                 /*
1781                  * We split periods of matched TSC writes into generations.
1782                  * For each generation, we track the original measured
1783                  * nanosecond time, offset, and write, so if TSCs are in
1784                  * sync, we can match exact offset, and if not, we can match
1785                  * exact software computation in compute_guest_tsc()
1786                  *
1787                  * These values are tracked in kvm->arch.cur_xxx variables.
1788                  */
1789                 kvm->arch.cur_tsc_generation++;
1790                 kvm->arch.cur_tsc_nsec = ns;
1791                 kvm->arch.cur_tsc_write = data;
1792                 kvm->arch.cur_tsc_offset = offset;
1793                 matched = false;
1794                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1795                          kvm->arch.cur_tsc_generation, data);
1796         }
1797
1798         /*
1799          * We also track th most recent recorded KHZ, write and time to
1800          * allow the matching interval to be extended at each write.
1801          */
1802         kvm->arch.last_tsc_nsec = ns;
1803         kvm->arch.last_tsc_write = data;
1804         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1805
1806         vcpu->arch.last_guest_tsc = data;
1807
1808         /* Keep track of which generation this VCPU has synchronized to */
1809         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1810         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1811         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1812
1813         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1814                 update_ia32_tsc_adjust_msr(vcpu, offset);
1815
1816         kvm_vcpu_write_tsc_offset(vcpu, offset);
1817         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1818
1819         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1820         if (!matched) {
1821                 kvm->arch.nr_vcpus_matched_tsc = 0;
1822         } else if (!already_matched) {
1823                 kvm->arch.nr_vcpus_matched_tsc++;
1824         }
1825
1826         kvm_track_tsc_matching(vcpu);
1827         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1828 }
1829
1830 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1831
1832 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1833                                            s64 adjustment)
1834 {
1835         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1836         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1837 }
1838
1839 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1840 {
1841         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1842                 WARN_ON(adjustment < 0);
1843         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1844         adjust_tsc_offset_guest(vcpu, adjustment);
1845 }
1846
1847 #ifdef CONFIG_X86_64
1848
1849 static u64 read_tsc(void)
1850 {
1851         u64 ret = (u64)rdtsc_ordered();
1852         u64 last = pvclock_gtod_data.clock.cycle_last;
1853
1854         if (likely(ret >= last))
1855                 return ret;
1856
1857         /*
1858          * GCC likes to generate cmov here, but this branch is extremely
1859          * predictable (it's just a function of time and the likely is
1860          * very likely) and there's a data dependence, so force GCC
1861          * to generate a branch instead.  I don't barrier() because
1862          * we don't actually need a barrier, and if this function
1863          * ever gets inlined it will generate worse code.
1864          */
1865         asm volatile ("");
1866         return last;
1867 }
1868
1869 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1870 {
1871         long v;
1872         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1873         u64 tsc_pg_val;
1874
1875         switch (gtod->clock.vclock_mode) {
1876         case VCLOCK_HVCLOCK:
1877                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1878                                                   tsc_timestamp);
1879                 if (tsc_pg_val != U64_MAX) {
1880                         /* TSC page valid */
1881                         *mode = VCLOCK_HVCLOCK;
1882                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1883                                 gtod->clock.mask;
1884                 } else {
1885                         /* TSC page invalid */
1886                         *mode = VCLOCK_NONE;
1887                 }
1888                 break;
1889         case VCLOCK_TSC:
1890                 *mode = VCLOCK_TSC;
1891                 *tsc_timestamp = read_tsc();
1892                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1893                         gtod->clock.mask;
1894                 break;
1895         default:
1896                 *mode = VCLOCK_NONE;
1897         }
1898
1899         if (*mode == VCLOCK_NONE)
1900                 *tsc_timestamp = v = 0;
1901
1902         return v * gtod->clock.mult;
1903 }
1904
1905 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1906 {
1907         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1908         unsigned long seq;
1909         int mode;
1910         u64 ns;
1911
1912         do {
1913                 seq = read_seqcount_begin(&gtod->seq);
1914                 ns = gtod->nsec_base;
1915                 ns += vgettsc(tsc_timestamp, &mode);
1916                 ns >>= gtod->clock.shift;
1917                 ns += gtod->boot_ns;
1918         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1919         *t = ns;
1920
1921         return mode;
1922 }
1923
1924 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1925 {
1926         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1927         unsigned long seq;
1928         int mode;
1929         u64 ns;
1930
1931         do {
1932                 seq = read_seqcount_begin(&gtod->seq);
1933                 ts->tv_sec = gtod->wall_time_sec;
1934                 ns = gtod->nsec_base;
1935                 ns += vgettsc(tsc_timestamp, &mode);
1936                 ns >>= gtod->clock.shift;
1937         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1938
1939         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1940         ts->tv_nsec = ns;
1941
1942         return mode;
1943 }
1944
1945 /* returns true if host is using TSC based clocksource */
1946 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1947 {
1948         /* checked again under seqlock below */
1949         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1950                 return false;
1951
1952         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1953                                                       tsc_timestamp));
1954 }
1955
1956 /* returns true if host is using TSC based clocksource */
1957 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1958                                            u64 *tsc_timestamp)
1959 {
1960         /* checked again under seqlock below */
1961         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1962                 return false;
1963
1964         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1965 }
1966 #endif
1967
1968 /*
1969  *
1970  * Assuming a stable TSC across physical CPUS, and a stable TSC
1971  * across virtual CPUs, the following condition is possible.
1972  * Each numbered line represents an event visible to both
1973  * CPUs at the next numbered event.
1974  *
1975  * "timespecX" represents host monotonic time. "tscX" represents
1976  * RDTSC value.
1977  *
1978  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1979  *
1980  * 1.  read timespec0,tsc0
1981  * 2.                                   | timespec1 = timespec0 + N
1982  *                                      | tsc1 = tsc0 + M
1983  * 3. transition to guest               | transition to guest
1984  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1985  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1986  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1987  *
1988  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1989  *
1990  *      - ret0 < ret1
1991  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1992  *              ...
1993  *      - 0 < N - M => M < N
1994  *
1995  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1996  * always the case (the difference between two distinct xtime instances
1997  * might be smaller then the difference between corresponding TSC reads,
1998  * when updating guest vcpus pvclock areas).
1999  *
2000  * To avoid that problem, do not allow visibility of distinct
2001  * system_timestamp/tsc_timestamp values simultaneously: use a master
2002  * copy of host monotonic time values. Update that master copy
2003  * in lockstep.
2004  *
2005  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2006  *
2007  */
2008
2009 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2010 {
2011 #ifdef CONFIG_X86_64
2012         struct kvm_arch *ka = &kvm->arch;
2013         int vclock_mode;
2014         bool host_tsc_clocksource, vcpus_matched;
2015
2016         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2017                         atomic_read(&kvm->online_vcpus));
2018
2019         /*
2020          * If the host uses TSC clock, then passthrough TSC as stable
2021          * to the guest.
2022          */
2023         host_tsc_clocksource = kvm_get_time_and_clockread(
2024                                         &ka->master_kernel_ns,
2025                                         &ka->master_cycle_now);
2026
2027         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2028                                 && !ka->backwards_tsc_observed
2029                                 && !ka->boot_vcpu_runs_old_kvmclock;
2030
2031         if (ka->use_master_clock)
2032                 atomic_set(&kvm_guest_has_master_clock, 1);
2033
2034         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2035         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2036                                         vcpus_matched);
2037 #endif
2038 }
2039
2040 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2041 {
2042         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2043 }
2044
2045 static void kvm_gen_update_masterclock(struct kvm *kvm)
2046 {
2047 #ifdef CONFIG_X86_64
2048         int i;
2049         struct kvm_vcpu *vcpu;
2050         struct kvm_arch *ka = &kvm->arch;
2051
2052         spin_lock(&ka->pvclock_gtod_sync_lock);
2053         kvm_make_mclock_inprogress_request(kvm);
2054         /* no guest entries from this point */
2055         pvclock_update_vm_gtod_copy(kvm);
2056
2057         kvm_for_each_vcpu(i, vcpu, kvm)
2058                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2059
2060         /* guest entries allowed */
2061         kvm_for_each_vcpu(i, vcpu, kvm)
2062                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2063
2064         spin_unlock(&ka->pvclock_gtod_sync_lock);
2065 #endif
2066 }
2067
2068 u64 get_kvmclock_ns(struct kvm *kvm)
2069 {
2070         struct kvm_arch *ka = &kvm->arch;
2071         struct pvclock_vcpu_time_info hv_clock;
2072         u64 ret;
2073
2074         spin_lock(&ka->pvclock_gtod_sync_lock);
2075         if (!ka->use_master_clock) {
2076                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2077                 return ktime_get_boot_ns() + ka->kvmclock_offset;
2078         }
2079
2080         hv_clock.tsc_timestamp = ka->master_cycle_now;
2081         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2082         spin_unlock(&ka->pvclock_gtod_sync_lock);
2083
2084         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2085         get_cpu();
2086
2087         if (__this_cpu_read(cpu_tsc_khz)) {
2088                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2089                                    &hv_clock.tsc_shift,
2090                                    &hv_clock.tsc_to_system_mul);
2091                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2092         } else
2093                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
2094
2095         put_cpu();
2096
2097         return ret;
2098 }
2099
2100 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2101 {
2102         struct kvm_vcpu_arch *vcpu = &v->arch;
2103         struct pvclock_vcpu_time_info guest_hv_clock;
2104
2105         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2106                 &guest_hv_clock, sizeof(guest_hv_clock))))
2107                 return;
2108
2109         /* This VCPU is paused, but it's legal for a guest to read another
2110          * VCPU's kvmclock, so we really have to follow the specification where
2111          * it says that version is odd if data is being modified, and even after
2112          * it is consistent.
2113          *
2114          * Version field updates must be kept separate.  This is because
2115          * kvm_write_guest_cached might use a "rep movs" instruction, and
2116          * writes within a string instruction are weakly ordered.  So there
2117          * are three writes overall.
2118          *
2119          * As a small optimization, only write the version field in the first
2120          * and third write.  The vcpu->pv_time cache is still valid, because the
2121          * version field is the first in the struct.
2122          */
2123         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2124
2125         if (guest_hv_clock.version & 1)
2126                 ++guest_hv_clock.version;  /* first time write, random junk */
2127
2128         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2129         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2130                                 &vcpu->hv_clock,
2131                                 sizeof(vcpu->hv_clock.version));
2132
2133         smp_wmb();
2134
2135         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2136         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2137
2138         if (vcpu->pvclock_set_guest_stopped_request) {
2139                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2140                 vcpu->pvclock_set_guest_stopped_request = false;
2141         }
2142
2143         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2144
2145         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2146                                 &vcpu->hv_clock,
2147                                 sizeof(vcpu->hv_clock));
2148
2149         smp_wmb();
2150
2151         vcpu->hv_clock.version++;
2152         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2153                                 &vcpu->hv_clock,
2154                                 sizeof(vcpu->hv_clock.version));
2155 }
2156
2157 static int kvm_guest_time_update(struct kvm_vcpu *v)
2158 {
2159         unsigned long flags, tgt_tsc_khz;
2160         struct kvm_vcpu_arch *vcpu = &v->arch;
2161         struct kvm_arch *ka = &v->kvm->arch;
2162         s64 kernel_ns;
2163         u64 tsc_timestamp, host_tsc;
2164         u8 pvclock_flags;
2165         bool use_master_clock;
2166
2167         kernel_ns = 0;
2168         host_tsc = 0;
2169
2170         /*
2171          * If the host uses TSC clock, then passthrough TSC as stable
2172          * to the guest.
2173          */
2174         spin_lock(&ka->pvclock_gtod_sync_lock);
2175         use_master_clock = ka->use_master_clock;
2176         if (use_master_clock) {
2177                 host_tsc = ka->master_cycle_now;
2178                 kernel_ns = ka->master_kernel_ns;
2179         }
2180         spin_unlock(&ka->pvclock_gtod_sync_lock);
2181
2182         /* Keep irq disabled to prevent changes to the clock */
2183         local_irq_save(flags);
2184         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2185         if (unlikely(tgt_tsc_khz == 0)) {
2186                 local_irq_restore(flags);
2187                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2188                 return 1;
2189         }
2190         if (!use_master_clock) {
2191                 host_tsc = rdtsc();
2192                 kernel_ns = ktime_get_boot_ns();
2193         }
2194
2195         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2196
2197         /*
2198          * We may have to catch up the TSC to match elapsed wall clock
2199          * time for two reasons, even if kvmclock is used.
2200          *   1) CPU could have been running below the maximum TSC rate
2201          *   2) Broken TSC compensation resets the base at each VCPU
2202          *      entry to avoid unknown leaps of TSC even when running
2203          *      again on the same CPU.  This may cause apparent elapsed
2204          *      time to disappear, and the guest to stand still or run
2205          *      very slowly.
2206          */
2207         if (vcpu->tsc_catchup) {
2208                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2209                 if (tsc > tsc_timestamp) {
2210                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2211                         tsc_timestamp = tsc;
2212                 }
2213         }
2214
2215         local_irq_restore(flags);
2216
2217         /* With all the info we got, fill in the values */
2218
2219         if (kvm_has_tsc_control)
2220                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2221
2222         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2223                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2224                                    &vcpu->hv_clock.tsc_shift,
2225                                    &vcpu->hv_clock.tsc_to_system_mul);
2226                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2227         }
2228
2229         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2230         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2231         vcpu->last_guest_tsc = tsc_timestamp;
2232
2233         /* If the host uses TSC clocksource, then it is stable */
2234         pvclock_flags = 0;
2235         if (use_master_clock)
2236                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2237
2238         vcpu->hv_clock.flags = pvclock_flags;
2239
2240         if (vcpu->pv_time_enabled)
2241                 kvm_setup_pvclock_page(v);
2242         if (v == kvm_get_vcpu(v->kvm, 0))
2243                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2244         return 0;
2245 }
2246
2247 /*
2248  * kvmclock updates which are isolated to a given vcpu, such as
2249  * vcpu->cpu migration, should not allow system_timestamp from
2250  * the rest of the vcpus to remain static. Otherwise ntp frequency
2251  * correction applies to one vcpu's system_timestamp but not
2252  * the others.
2253  *
2254  * So in those cases, request a kvmclock update for all vcpus.
2255  * We need to rate-limit these requests though, as they can
2256  * considerably slow guests that have a large number of vcpus.
2257  * The time for a remote vcpu to update its kvmclock is bound
2258  * by the delay we use to rate-limit the updates.
2259  */
2260
2261 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2262
2263 static void kvmclock_update_fn(struct work_struct *work)
2264 {
2265         int i;
2266         struct delayed_work *dwork = to_delayed_work(work);
2267         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2268                                            kvmclock_update_work);
2269         struct kvm *kvm = container_of(ka, struct kvm, arch);
2270         struct kvm_vcpu *vcpu;
2271
2272         kvm_for_each_vcpu(i, vcpu, kvm) {
2273                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2274                 kvm_vcpu_kick(vcpu);
2275         }
2276 }
2277
2278 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2279 {
2280         struct kvm *kvm = v->kvm;
2281
2282         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2283         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2284                                         KVMCLOCK_UPDATE_DELAY);
2285 }
2286
2287 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2288
2289 static void kvmclock_sync_fn(struct work_struct *work)
2290 {
2291         struct delayed_work *dwork = to_delayed_work(work);
2292         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2293                                            kvmclock_sync_work);
2294         struct kvm *kvm = container_of(ka, struct kvm, arch);
2295
2296         if (!kvmclock_periodic_sync)
2297                 return;
2298
2299         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2300         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2301                                         KVMCLOCK_SYNC_PERIOD);
2302 }
2303
2304 /*
2305  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2306  */
2307 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2308 {
2309         /* McStatusWrEn enabled? */
2310         if (guest_cpuid_is_amd(vcpu))
2311                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2312
2313         return false;
2314 }
2315
2316 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2317 {
2318         u64 mcg_cap = vcpu->arch.mcg_cap;
2319         unsigned bank_num = mcg_cap & 0xff;
2320         u32 msr = msr_info->index;
2321         u64 data = msr_info->data;
2322
2323         switch (msr) {
2324         case MSR_IA32_MCG_STATUS:
2325                 vcpu->arch.mcg_status = data;
2326                 break;
2327         case MSR_IA32_MCG_CTL:
2328                 if (!(mcg_cap & MCG_CTL_P) &&
2329                     (data || !msr_info->host_initiated))
2330                         return 1;
2331                 if (data != 0 && data != ~(u64)0)
2332                         return 1;
2333                 vcpu->arch.mcg_ctl = data;
2334                 break;
2335         default:
2336                 if (msr >= MSR_IA32_MC0_CTL &&
2337                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2338                         u32 offset = msr - MSR_IA32_MC0_CTL;
2339                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2340                          * some Linux kernels though clear bit 10 in bank 4 to
2341                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2342                          * this to avoid an uncatched #GP in the guest
2343                          */
2344                         if ((offset & 0x3) == 0 &&
2345                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2346                                 return -1;
2347
2348                         /* MCi_STATUS */
2349                         if (!msr_info->host_initiated &&
2350                             (offset & 0x3) == 1 && data != 0) {
2351                                 if (!can_set_mci_status(vcpu))
2352                                         return -1;
2353                         }
2354
2355                         vcpu->arch.mce_banks[offset] = data;
2356                         break;
2357                 }
2358                 return 1;
2359         }
2360         return 0;
2361 }
2362
2363 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2364 {
2365         struct kvm *kvm = vcpu->kvm;
2366         int lm = is_long_mode(vcpu);
2367         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2368                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2369         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2370                 : kvm->arch.xen_hvm_config.blob_size_32;
2371         u32 page_num = data & ~PAGE_MASK;
2372         u64 page_addr = data & PAGE_MASK;
2373         u8 *page;
2374         int r;
2375
2376         r = -E2BIG;
2377         if (page_num >= blob_size)
2378                 goto out;
2379         r = -ENOMEM;
2380         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2381         if (IS_ERR(page)) {
2382                 r = PTR_ERR(page);
2383                 goto out;
2384         }
2385         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2386                 goto out_free;
2387         r = 0;
2388 out_free:
2389         kfree(page);
2390 out:
2391         return r;
2392 }
2393
2394 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2395 {
2396         gpa_t gpa = data & ~0x3f;
2397
2398         /* Bits 3:5 are reserved, Should be zero */
2399         if (data & 0x38)
2400                 return 1;
2401
2402         vcpu->arch.apf.msr_val = data;
2403
2404         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2405                 kvm_clear_async_pf_completion_queue(vcpu);
2406                 kvm_async_pf_hash_reset(vcpu);
2407                 return 0;
2408         }
2409
2410         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2411                                         sizeof(u32)))
2412                 return 1;
2413
2414         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2415         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2416         kvm_async_pf_wakeup_all(vcpu);
2417         return 0;
2418 }
2419
2420 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2421 {
2422         vcpu->arch.pv_time_enabled = false;
2423 }
2424
2425 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2426 {
2427         ++vcpu->stat.tlb_flush;
2428         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2429 }
2430
2431 static void record_steal_time(struct kvm_vcpu *vcpu)
2432 {
2433         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2434                 return;
2435
2436         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2437                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2438                 return;
2439
2440         /*
2441          * Doing a TLB flush here, on the guest's behalf, can avoid
2442          * expensive IPIs.
2443          */
2444         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2445                 kvm_vcpu_flush_tlb(vcpu, false);
2446
2447         if (vcpu->arch.st.steal.version & 1)
2448                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2449
2450         vcpu->arch.st.steal.version += 1;
2451
2452         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2453                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2454
2455         smp_wmb();
2456
2457         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2458                 vcpu->arch.st.last_steal;
2459         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2460
2461         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2462                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2463
2464         smp_wmb();
2465
2466         vcpu->arch.st.steal.version += 1;
2467
2468         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2469                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2470 }
2471
2472 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2473 {
2474         bool pr = false;
2475         u32 msr = msr_info->index;
2476         u64 data = msr_info->data;
2477
2478         switch (msr) {
2479         case MSR_AMD64_NB_CFG:
2480         case MSR_IA32_UCODE_WRITE:
2481         case MSR_VM_HSAVE_PA:
2482         case MSR_AMD64_PATCH_LOADER:
2483         case MSR_AMD64_BU_CFG2:
2484         case MSR_AMD64_DC_CFG:
2485         case MSR_F15H_EX_CFG:
2486                 break;
2487
2488         case MSR_IA32_UCODE_REV:
2489                 if (msr_info->host_initiated)
2490                         vcpu->arch.microcode_version = data;
2491                 break;
2492         case MSR_IA32_ARCH_CAPABILITIES:
2493                 if (!msr_info->host_initiated)
2494                         return 1;
2495                 vcpu->arch.arch_capabilities = data;
2496                 break;
2497         case MSR_EFER:
2498                 return set_efer(vcpu, msr_info);
2499         case MSR_K7_HWCR:
2500                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2501                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2502                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2503
2504                 /* Handle McStatusWrEn */
2505                 if (data == BIT_ULL(18)) {
2506                         vcpu->arch.msr_hwcr = data;
2507                 } else if (data != 0) {
2508                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2509                                     data);
2510                         return 1;
2511                 }
2512                 break;
2513         case MSR_FAM10H_MMIO_CONF_BASE:
2514                 if (data != 0) {
2515                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2516                                     "0x%llx\n", data);
2517                         return 1;
2518                 }
2519                 break;
2520         case MSR_IA32_DEBUGCTLMSR:
2521                 if (!data) {
2522                         /* We support the non-activated case already */
2523                         break;
2524                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2525                         /* Values other than LBR and BTF are vendor-specific,
2526                            thus reserved and should throw a #GP */
2527                         return 1;
2528                 }
2529                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2530                             __func__, data);
2531                 break;
2532         case 0x200 ... 0x2ff:
2533                 return kvm_mtrr_set_msr(vcpu, msr, data);
2534         case MSR_IA32_APICBASE:
2535                 return kvm_set_apic_base(vcpu, msr_info);
2536         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2537                 return kvm_x2apic_msr_write(vcpu, msr, data);
2538         case MSR_IA32_TSCDEADLINE:
2539                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2540                 break;
2541         case MSR_IA32_TSC_ADJUST:
2542                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2543                         if (!msr_info->host_initiated) {
2544                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2545                                 adjust_tsc_offset_guest(vcpu, adj);
2546                         }
2547                         vcpu->arch.ia32_tsc_adjust_msr = data;
2548                 }
2549                 break;
2550         case MSR_IA32_MISC_ENABLE:
2551                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2552                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2553                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2554                                 return 1;
2555                         vcpu->arch.ia32_misc_enable_msr = data;
2556                         kvm_update_cpuid(vcpu);
2557                 } else {
2558                         vcpu->arch.ia32_misc_enable_msr = data;
2559                 }
2560                 break;
2561         case MSR_IA32_SMBASE:
2562                 if (!msr_info->host_initiated)
2563                         return 1;
2564                 vcpu->arch.smbase = data;
2565                 break;
2566         case MSR_IA32_POWER_CTL:
2567                 vcpu->arch.msr_ia32_power_ctl = data;
2568                 break;
2569         case MSR_IA32_TSC:
2570                 kvm_write_tsc(vcpu, msr_info);
2571                 break;
2572         case MSR_SMI_COUNT:
2573                 if (!msr_info->host_initiated)
2574                         return 1;
2575                 vcpu->arch.smi_count = data;
2576                 break;
2577         case MSR_KVM_WALL_CLOCK_NEW:
2578         case MSR_KVM_WALL_CLOCK:
2579                 vcpu->kvm->arch.wall_clock = data;
2580                 kvm_write_wall_clock(vcpu->kvm, data);
2581                 break;
2582         case MSR_KVM_SYSTEM_TIME_NEW:
2583         case MSR_KVM_SYSTEM_TIME: {
2584                 struct kvm_arch *ka = &vcpu->kvm->arch;
2585
2586                 kvmclock_reset(vcpu);
2587
2588                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2589                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2590
2591                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2592                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2593
2594                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2595                 }
2596
2597                 vcpu->arch.time = data;
2598                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2599
2600                 /* we verify if the enable bit is set... */
2601                 if (!(data & 1))
2602                         break;
2603
2604                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2605                      &vcpu->arch.pv_time, data & ~1ULL,
2606                      sizeof(struct pvclock_vcpu_time_info)))
2607                         vcpu->arch.pv_time_enabled = false;
2608                 else
2609                         vcpu->arch.pv_time_enabled = true;
2610
2611                 break;
2612         }
2613         case MSR_KVM_ASYNC_PF_EN:
2614                 if (kvm_pv_enable_async_pf(vcpu, data))
2615                         return 1;
2616                 break;
2617         case MSR_KVM_STEAL_TIME:
2618
2619                 if (unlikely(!sched_info_on()))
2620                         return 1;
2621
2622                 if (data & KVM_STEAL_RESERVED_MASK)
2623                         return 1;
2624
2625                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2626                                                 data & KVM_STEAL_VALID_BITS,
2627                                                 sizeof(struct kvm_steal_time)))
2628                         return 1;
2629
2630                 vcpu->arch.st.msr_val = data;
2631
2632                 if (!(data & KVM_MSR_ENABLED))
2633                         break;
2634
2635                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2636
2637                 break;
2638         case MSR_KVM_PV_EOI_EN:
2639                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2640                         return 1;
2641                 break;
2642
2643         case MSR_KVM_POLL_CONTROL:
2644                 /* only enable bit supported */
2645                 if (data & (-1ULL << 1))
2646                         return 1;
2647
2648                 vcpu->arch.msr_kvm_poll_control = data;
2649                 break;
2650
2651         case MSR_IA32_MCG_CTL:
2652         case MSR_IA32_MCG_STATUS:
2653         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2654                 return set_msr_mce(vcpu, msr_info);
2655
2656         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2657         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2658                 pr = true; /* fall through */
2659         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2660         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2661                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2662                         return kvm_pmu_set_msr(vcpu, msr_info);
2663
2664                 if (pr || data != 0)
2665                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2666                                     "0x%x data 0x%llx\n", msr, data);
2667                 break;
2668         case MSR_K7_CLK_CTL:
2669                 /*
2670                  * Ignore all writes to this no longer documented MSR.
2671                  * Writes are only relevant for old K7 processors,
2672                  * all pre-dating SVM, but a recommended workaround from
2673                  * AMD for these chips. It is possible to specify the
2674                  * affected processor models on the command line, hence
2675                  * the need to ignore the workaround.
2676                  */
2677                 break;
2678         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2679         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2680         case HV_X64_MSR_CRASH_CTL:
2681         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2682         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2683         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2684         case HV_X64_MSR_TSC_EMULATION_STATUS:
2685                 return kvm_hv_set_msr_common(vcpu, msr, data,
2686                                              msr_info->host_initiated);
2687         case MSR_IA32_BBL_CR_CTL3:
2688                 /* Drop writes to this legacy MSR -- see rdmsr
2689                  * counterpart for further detail.
2690                  */
2691                 if (report_ignored_msrs)
2692                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2693                                 msr, data);
2694                 break;
2695         case MSR_AMD64_OSVW_ID_LENGTH:
2696                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2697                         return 1;
2698                 vcpu->arch.osvw.length = data;
2699                 break;
2700         case MSR_AMD64_OSVW_STATUS:
2701                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2702                         return 1;
2703                 vcpu->arch.osvw.status = data;
2704                 break;
2705         case MSR_PLATFORM_INFO:
2706                 if (!msr_info->host_initiated ||
2707                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2708                      cpuid_fault_enabled(vcpu)))
2709                         return 1;
2710                 vcpu->arch.msr_platform_info = data;
2711                 break;
2712         case MSR_MISC_FEATURES_ENABLES:
2713                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2714                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2715                      !supports_cpuid_fault(vcpu)))
2716                         return 1;
2717                 vcpu->arch.msr_misc_features_enables = data;
2718                 break;
2719         default:
2720                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2721                         return xen_hvm_config(vcpu, data);
2722                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2723                         return kvm_pmu_set_msr(vcpu, msr_info);
2724                 if (!ignore_msrs) {
2725                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2726                                     msr, data);
2727                         return 1;
2728                 } else {
2729                         if (report_ignored_msrs)
2730                                 vcpu_unimpl(vcpu,
2731                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2732                                         msr, data);
2733                         break;
2734                 }
2735         }
2736         return 0;
2737 }
2738 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2739
2740
2741 /*
2742  * Reads an msr value (of 'msr_index') into 'pdata'.
2743  * Returns 0 on success, non-0 otherwise.
2744  * Assumes vcpu_load() was already called.
2745  */
2746 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2747 {
2748         return kvm_x86_ops->get_msr(vcpu, msr);
2749 }
2750 EXPORT_SYMBOL_GPL(kvm_get_msr);
2751
2752 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2753 {
2754         u64 data;
2755         u64 mcg_cap = vcpu->arch.mcg_cap;
2756         unsigned bank_num = mcg_cap & 0xff;
2757
2758         switch (msr) {
2759         case MSR_IA32_P5_MC_ADDR:
2760         case MSR_IA32_P5_MC_TYPE:
2761                 data = 0;
2762                 break;
2763         case MSR_IA32_MCG_CAP:
2764                 data = vcpu->arch.mcg_cap;
2765                 break;
2766         case MSR_IA32_MCG_CTL:
2767                 if (!(mcg_cap & MCG_CTL_P) && !host)
2768                         return 1;
2769                 data = vcpu->arch.mcg_ctl;
2770                 break;
2771         case MSR_IA32_MCG_STATUS:
2772                 data = vcpu->arch.mcg_status;
2773                 break;
2774         default:
2775                 if (msr >= MSR_IA32_MC0_CTL &&
2776                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2777                         u32 offset = msr - MSR_IA32_MC0_CTL;
2778                         data = vcpu->arch.mce_banks[offset];
2779                         break;
2780                 }
2781                 return 1;
2782         }
2783         *pdata = data;
2784         return 0;
2785 }
2786
2787 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2788 {
2789         switch (msr_info->index) {
2790         case MSR_IA32_PLATFORM_ID:
2791         case MSR_IA32_EBL_CR_POWERON:
2792         case MSR_IA32_DEBUGCTLMSR:
2793         case MSR_IA32_LASTBRANCHFROMIP:
2794         case MSR_IA32_LASTBRANCHTOIP:
2795         case MSR_IA32_LASTINTFROMIP:
2796         case MSR_IA32_LASTINTTOIP:
2797         case MSR_K8_SYSCFG:
2798         case MSR_K8_TSEG_ADDR:
2799         case MSR_K8_TSEG_MASK:
2800         case MSR_VM_HSAVE_PA:
2801         case MSR_K8_INT_PENDING_MSG:
2802         case MSR_AMD64_NB_CFG:
2803         case MSR_FAM10H_MMIO_CONF_BASE:
2804         case MSR_AMD64_BU_CFG2:
2805         case MSR_IA32_PERF_CTL:
2806         case MSR_AMD64_DC_CFG:
2807         case MSR_F15H_EX_CFG:
2808                 msr_info->data = 0;
2809                 break;
2810         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2811         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2812         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2813         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2814         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2815                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2816                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2817                 msr_info->data = 0;
2818                 break;
2819         case MSR_IA32_UCODE_REV:
2820                 msr_info->data = vcpu->arch.microcode_version;
2821                 break;
2822         case MSR_IA32_ARCH_CAPABILITIES:
2823                 if (!msr_info->host_initiated &&
2824                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2825                         return 1;
2826                 msr_info->data = vcpu->arch.arch_capabilities;
2827                 break;
2828         case MSR_IA32_POWER_CTL:
2829                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2830                 break;
2831         case MSR_IA32_TSC:
2832                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2833                 break;
2834         case MSR_MTRRcap:
2835         case 0x200 ... 0x2ff:
2836                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2837         case 0xcd: /* fsb frequency */
2838                 msr_info->data = 3;
2839                 break;
2840                 /*
2841                  * MSR_EBC_FREQUENCY_ID
2842                  * Conservative value valid for even the basic CPU models.
2843                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2844                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2845                  * and 266MHz for model 3, or 4. Set Core Clock
2846                  * Frequency to System Bus Frequency Ratio to 1 (bits
2847                  * 31:24) even though these are only valid for CPU
2848                  * models > 2, however guests may end up dividing or
2849                  * multiplying by zero otherwise.
2850                  */
2851         case MSR_EBC_FREQUENCY_ID:
2852                 msr_info->data = 1 << 24;
2853                 break;
2854         case MSR_IA32_APICBASE:
2855                 msr_info->data = kvm_get_apic_base(vcpu);
2856                 break;
2857         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2858                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2859                 break;
2860         case MSR_IA32_TSCDEADLINE:
2861                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2862                 break;
2863         case MSR_IA32_TSC_ADJUST:
2864                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2865                 break;
2866         case MSR_IA32_MISC_ENABLE:
2867                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2868                 break;
2869         case MSR_IA32_SMBASE:
2870                 if (!msr_info->host_initiated)
2871                         return 1;
2872                 msr_info->data = vcpu->arch.smbase;
2873                 break;
2874         case MSR_SMI_COUNT:
2875                 msr_info->data = vcpu->arch.smi_count;
2876                 break;
2877         case MSR_IA32_PERF_STATUS:
2878                 /* TSC increment by tick */
2879                 msr_info->data = 1000ULL;
2880                 /* CPU multiplier */
2881                 msr_info->data |= (((uint64_t)4ULL) << 40);
2882                 break;
2883         case MSR_EFER:
2884                 msr_info->data = vcpu->arch.efer;
2885                 break;
2886         case MSR_KVM_WALL_CLOCK:
2887         case MSR_KVM_WALL_CLOCK_NEW:
2888                 msr_info->data = vcpu->kvm->arch.wall_clock;
2889                 break;
2890         case MSR_KVM_SYSTEM_TIME:
2891         case MSR_KVM_SYSTEM_TIME_NEW:
2892                 msr_info->data = vcpu->arch.time;
2893                 break;
2894         case MSR_KVM_ASYNC_PF_EN:
2895                 msr_info->data = vcpu->arch.apf.msr_val;
2896                 break;
2897         case MSR_KVM_STEAL_TIME:
2898                 msr_info->data = vcpu->arch.st.msr_val;
2899                 break;
2900         case MSR_KVM_PV_EOI_EN:
2901                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2902                 break;
2903         case MSR_KVM_POLL_CONTROL:
2904                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
2905                 break;
2906         case MSR_IA32_P5_MC_ADDR:
2907         case MSR_IA32_P5_MC_TYPE:
2908         case MSR_IA32_MCG_CAP:
2909         case MSR_IA32_MCG_CTL:
2910         case MSR_IA32_MCG_STATUS:
2911         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2912                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2913                                    msr_info->host_initiated);
2914         case MSR_K7_CLK_CTL:
2915                 /*
2916                  * Provide expected ramp-up count for K7. All other
2917                  * are set to zero, indicating minimum divisors for
2918                  * every field.
2919                  *
2920                  * This prevents guest kernels on AMD host with CPU
2921                  * type 6, model 8 and higher from exploding due to
2922                  * the rdmsr failing.
2923                  */
2924                 msr_info->data = 0x20000000;
2925                 break;
2926         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2927         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2928         case HV_X64_MSR_CRASH_CTL:
2929         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2930         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2931         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2932         case HV_X64_MSR_TSC_EMULATION_STATUS:
2933                 return kvm_hv_get_msr_common(vcpu,
2934                                              msr_info->index, &msr_info->data,
2935                                              msr_info->host_initiated);
2936                 break;
2937         case MSR_IA32_BBL_CR_CTL3:
2938                 /* This legacy MSR exists but isn't fully documented in current
2939                  * silicon.  It is however accessed by winxp in very narrow
2940                  * scenarios where it sets bit #19, itself documented as
2941                  * a "reserved" bit.  Best effort attempt to source coherent
2942                  * read data here should the balance of the register be
2943                  * interpreted by the guest:
2944                  *
2945                  * L2 cache control register 3: 64GB range, 256KB size,
2946                  * enabled, latency 0x1, configured
2947                  */
2948                 msr_info->data = 0xbe702111;
2949                 break;
2950         case MSR_AMD64_OSVW_ID_LENGTH:
2951                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2952                         return 1;
2953                 msr_info->data = vcpu->arch.osvw.length;
2954                 break;
2955         case MSR_AMD64_OSVW_STATUS:
2956                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2957                         return 1;
2958                 msr_info->data = vcpu->arch.osvw.status;
2959                 break;
2960         case MSR_PLATFORM_INFO:
2961                 if (!msr_info->host_initiated &&
2962                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
2963                         return 1;
2964                 msr_info->data = vcpu->arch.msr_platform_info;
2965                 break;
2966         case MSR_MISC_FEATURES_ENABLES:
2967                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2968                 break;
2969         case MSR_K7_HWCR:
2970                 msr_info->data = vcpu->arch.msr_hwcr;
2971                 break;
2972         default:
2973                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2974                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2975                 if (!ignore_msrs) {
2976                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2977                                                msr_info->index);
2978                         return 1;
2979                 } else {
2980                         if (report_ignored_msrs)
2981                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2982                                         msr_info->index);
2983                         msr_info->data = 0;
2984                 }
2985                 break;
2986         }
2987         return 0;
2988 }
2989 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2990
2991 /*
2992  * Read or write a bunch of msrs. All parameters are kernel addresses.
2993  *
2994  * @return number of msrs set successfully.
2995  */
2996 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2997                     struct kvm_msr_entry *entries,
2998                     int (*do_msr)(struct kvm_vcpu *vcpu,
2999                                   unsigned index, u64 *data))
3000 {
3001         int i;
3002
3003         for (i = 0; i < msrs->nmsrs; ++i)
3004                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3005                         break;
3006
3007         return i;
3008 }
3009
3010 /*
3011  * Read or write a bunch of msrs. Parameters are user addresses.
3012  *
3013  * @return number of msrs set successfully.
3014  */
3015 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3016                   int (*do_msr)(struct kvm_vcpu *vcpu,
3017                                 unsigned index, u64 *data),
3018                   int writeback)
3019 {
3020         struct kvm_msrs msrs;
3021         struct kvm_msr_entry *entries;
3022         int r, n;
3023         unsigned size;
3024
3025         r = -EFAULT;
3026         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3027                 goto out;
3028
3029         r = -E2BIG;
3030         if (msrs.nmsrs >= MAX_IO_MSRS)
3031                 goto out;
3032
3033         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3034         entries = memdup_user(user_msrs->entries, size);
3035         if (IS_ERR(entries)) {
3036                 r = PTR_ERR(entries);
3037                 goto out;
3038         }
3039
3040         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3041         if (r < 0)
3042                 goto out_free;
3043
3044         r = -EFAULT;
3045         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3046                 goto out_free;
3047
3048         r = n;
3049
3050 out_free:
3051         kfree(entries);
3052 out:
3053         return r;
3054 }
3055
3056 static inline bool kvm_can_mwait_in_guest(void)
3057 {
3058         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3059                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3060                 boot_cpu_has(X86_FEATURE_ARAT);
3061 }
3062
3063 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3064 {
3065         int r = 0;
3066
3067         switch (ext) {
3068         case KVM_CAP_IRQCHIP:
3069         case KVM_CAP_HLT:
3070         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3071         case KVM_CAP_SET_TSS_ADDR:
3072         case KVM_CAP_EXT_CPUID:
3073         case KVM_CAP_EXT_EMUL_CPUID:
3074         case KVM_CAP_CLOCKSOURCE:
3075         case KVM_CAP_PIT:
3076         case KVM_CAP_NOP_IO_DELAY:
3077         case KVM_CAP_MP_STATE:
3078         case KVM_CAP_SYNC_MMU:
3079         case KVM_CAP_USER_NMI:
3080         case KVM_CAP_REINJECT_CONTROL:
3081         case KVM_CAP_IRQ_INJECT_STATUS:
3082         case KVM_CAP_IOEVENTFD:
3083         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3084         case KVM_CAP_PIT2:
3085         case KVM_CAP_PIT_STATE2:
3086         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3087         case KVM_CAP_XEN_HVM:
3088         case KVM_CAP_VCPU_EVENTS:
3089         case KVM_CAP_HYPERV:
3090         case KVM_CAP_HYPERV_VAPIC:
3091         case KVM_CAP_HYPERV_SPIN:
3092         case KVM_CAP_HYPERV_SYNIC:
3093         case KVM_CAP_HYPERV_SYNIC2:
3094         case KVM_CAP_HYPERV_VP_INDEX:
3095         case KVM_CAP_HYPERV_EVENTFD:
3096         case KVM_CAP_HYPERV_TLBFLUSH:
3097         case KVM_CAP_HYPERV_SEND_IPI:
3098         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3099         case KVM_CAP_HYPERV_CPUID:
3100         case KVM_CAP_PCI_SEGMENT:
3101         case KVM_CAP_DEBUGREGS:
3102         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3103         case KVM_CAP_XSAVE:
3104         case KVM_CAP_ASYNC_PF:
3105         case KVM_CAP_GET_TSC_KHZ:
3106         case KVM_CAP_KVMCLOCK_CTRL:
3107         case KVM_CAP_READONLY_MEM:
3108         case KVM_CAP_HYPERV_TIME:
3109         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3110         case KVM_CAP_TSC_DEADLINE_TIMER:
3111         case KVM_CAP_DISABLE_QUIRKS:
3112         case KVM_CAP_SET_BOOT_CPU_ID:
3113         case KVM_CAP_SPLIT_IRQCHIP:
3114         case KVM_CAP_IMMEDIATE_EXIT:
3115         case KVM_CAP_GET_MSR_FEATURES:
3116         case KVM_CAP_MSR_PLATFORM_INFO:
3117         case KVM_CAP_EXCEPTION_PAYLOAD:
3118                 r = 1;
3119                 break;
3120         case KVM_CAP_SYNC_REGS:
3121                 r = KVM_SYNC_X86_VALID_FIELDS;
3122                 break;
3123         case KVM_CAP_ADJUST_CLOCK:
3124                 r = KVM_CLOCK_TSC_STABLE;
3125                 break;
3126         case KVM_CAP_X86_DISABLE_EXITS:
3127                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3128                       KVM_X86_DISABLE_EXITS_CSTATE;
3129                 if(kvm_can_mwait_in_guest())
3130                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3131                 break;
3132         case KVM_CAP_X86_SMM:
3133                 /* SMBASE is usually relocated above 1M on modern chipsets,
3134                  * and SMM handlers might indeed rely on 4G segment limits,
3135                  * so do not report SMM to be available if real mode is
3136                  * emulated via vm86 mode.  Still, do not go to great lengths
3137                  * to avoid userspace's usage of the feature, because it is a
3138                  * fringe case that is not enabled except via specific settings
3139                  * of the module parameters.
3140                  */
3141                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3142                 break;
3143         case KVM_CAP_VAPIC:
3144                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3145                 break;
3146         case KVM_CAP_NR_VCPUS:
3147                 r = KVM_SOFT_MAX_VCPUS;
3148                 break;
3149         case KVM_CAP_MAX_VCPUS:
3150                 r = KVM_MAX_VCPUS;
3151                 break;
3152         case KVM_CAP_MAX_VCPU_ID:
3153                 r = KVM_MAX_VCPU_ID;
3154                 break;
3155         case KVM_CAP_PV_MMU:    /* obsolete */
3156                 r = 0;
3157                 break;
3158         case KVM_CAP_MCE:
3159                 r = KVM_MAX_MCE_BANKS;
3160                 break;
3161         case KVM_CAP_XCRS:
3162                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3163                 break;
3164         case KVM_CAP_TSC_CONTROL:
3165                 r = kvm_has_tsc_control;
3166                 break;
3167         case KVM_CAP_X2APIC_API:
3168                 r = KVM_X2APIC_API_VALID_FLAGS;
3169                 break;
3170         case KVM_CAP_NESTED_STATE:
3171                 r = kvm_x86_ops->get_nested_state ?
3172                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3173                 break;
3174         default:
3175                 break;
3176         }
3177         return r;
3178
3179 }
3180
3181 long kvm_arch_dev_ioctl(struct file *filp,
3182                         unsigned int ioctl, unsigned long arg)
3183 {
3184         void __user *argp = (void __user *)arg;
3185         long r;
3186
3187         switch (ioctl) {
3188         case KVM_GET_MSR_INDEX_LIST: {
3189                 struct kvm_msr_list __user *user_msr_list = argp;
3190                 struct kvm_msr_list msr_list;
3191                 unsigned n;
3192
3193                 r = -EFAULT;
3194                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3195                         goto out;
3196                 n = msr_list.nmsrs;
3197                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3198                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3199                         goto out;
3200                 r = -E2BIG;
3201                 if (n < msr_list.nmsrs)
3202                         goto out;
3203                 r = -EFAULT;
3204                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3205                                  num_msrs_to_save * sizeof(u32)))
3206                         goto out;
3207                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3208                                  &emulated_msrs,
3209                                  num_emulated_msrs * sizeof(u32)))
3210                         goto out;
3211                 r = 0;
3212                 break;
3213         }
3214         case KVM_GET_SUPPORTED_CPUID:
3215         case KVM_GET_EMULATED_CPUID: {
3216                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3217                 struct kvm_cpuid2 cpuid;
3218
3219                 r = -EFAULT;
3220                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3221                         goto out;
3222
3223                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3224                                             ioctl);
3225                 if (r)
3226                         goto out;
3227
3228                 r = -EFAULT;
3229                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3230                         goto out;
3231                 r = 0;
3232                 break;
3233         }
3234         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3235                 r = -EFAULT;
3236                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3237                                  sizeof(kvm_mce_cap_supported)))
3238                         goto out;
3239                 r = 0;
3240                 break;
3241         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3242                 struct kvm_msr_list __user *user_msr_list = argp;
3243                 struct kvm_msr_list msr_list;
3244                 unsigned int n;
3245
3246                 r = -EFAULT;
3247                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3248                         goto out;
3249                 n = msr_list.nmsrs;
3250                 msr_list.nmsrs = num_msr_based_features;
3251                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3252                         goto out;
3253                 r = -E2BIG;
3254                 if (n < msr_list.nmsrs)
3255                         goto out;
3256                 r = -EFAULT;
3257                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3258                                  num_msr_based_features * sizeof(u32)))
3259                         goto out;
3260                 r = 0;
3261                 break;
3262         }
3263         case KVM_GET_MSRS:
3264                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3265                 break;
3266         }
3267         default:
3268                 r = -EINVAL;
3269         }
3270 out:
3271         return r;
3272 }
3273
3274 static void wbinvd_ipi(void *garbage)
3275 {
3276         wbinvd();
3277 }
3278
3279 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3280 {
3281         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3282 }
3283
3284 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3285 {
3286         /* Address WBINVD may be executed by guest */
3287         if (need_emulate_wbinvd(vcpu)) {
3288                 if (kvm_x86_ops->has_wbinvd_exit())
3289                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3290                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3291                         smp_call_function_single(vcpu->cpu,
3292                                         wbinvd_ipi, NULL, 1);
3293         }
3294
3295         kvm_x86_ops->vcpu_load(vcpu, cpu);
3296
3297         /* Apply any externally detected TSC adjustments (due to suspend) */
3298         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3299                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3300                 vcpu->arch.tsc_offset_adjustment = 0;
3301                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3302         }
3303
3304         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3305                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3306                                 rdtsc() - vcpu->arch.last_host_tsc;
3307                 if (tsc_delta < 0)
3308                         mark_tsc_unstable("KVM discovered backwards TSC");
3309
3310                 if (kvm_check_tsc_unstable()) {
3311                         u64 offset = kvm_compute_tsc_offset(vcpu,
3312                                                 vcpu->arch.last_guest_tsc);
3313                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3314                         vcpu->arch.tsc_catchup = 1;
3315                 }
3316
3317                 if (kvm_lapic_hv_timer_in_use(vcpu))
3318                         kvm_lapic_restart_hv_timer(vcpu);
3319
3320                 /*
3321                  * On a host with synchronized TSC, there is no need to update
3322                  * kvmclock on vcpu->cpu migration
3323                  */
3324                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3325                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3326                 if (vcpu->cpu != cpu)
3327                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3328                 vcpu->cpu = cpu;
3329         }
3330
3331         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3332 }
3333
3334 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3335 {
3336         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3337                 return;
3338
3339         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3340
3341         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3342                         &vcpu->arch.st.steal.preempted,
3343                         offsetof(struct kvm_steal_time, preempted),
3344                         sizeof(vcpu->arch.st.steal.preempted));
3345 }
3346
3347 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3348 {
3349         int idx;
3350
3351         if (vcpu->preempted)
3352                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3353
3354         /*
3355          * Disable page faults because we're in atomic context here.
3356          * kvm_write_guest_offset_cached() would call might_fault()
3357          * that relies on pagefault_disable() to tell if there's a
3358          * bug. NOTE: the write to guest memory may not go through if
3359          * during postcopy live migration or if there's heavy guest
3360          * paging.
3361          */
3362         pagefault_disable();
3363         /*
3364          * kvm_memslots() will be called by
3365          * kvm_write_guest_offset_cached() so take the srcu lock.
3366          */
3367         idx = srcu_read_lock(&vcpu->kvm->srcu);
3368         kvm_steal_time_set_preempted(vcpu);
3369         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3370         pagefault_enable();
3371         kvm_x86_ops->vcpu_put(vcpu);
3372         vcpu->arch.last_host_tsc = rdtsc();
3373         /*
3374          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3375          * on every vmexit, but if not, we might have a stale dr6 from the
3376          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3377          */
3378         set_debugreg(0, 6);
3379 }
3380
3381 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3382                                     struct kvm_lapic_state *s)
3383 {
3384         if (vcpu->arch.apicv_active)
3385                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3386
3387         return kvm_apic_get_state(vcpu, s);
3388 }
3389
3390 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3391                                     struct kvm_lapic_state *s)
3392 {
3393         int r;
3394
3395         r = kvm_apic_set_state(vcpu, s);
3396         if (r)
3397                 return r;
3398         update_cr8_intercept(vcpu);
3399
3400         return 0;
3401 }
3402
3403 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3404 {
3405         return (!lapic_in_kernel(vcpu) ||
3406                 kvm_apic_accept_pic_intr(vcpu));
3407 }
3408
3409 /*
3410  * if userspace requested an interrupt window, check that the
3411  * interrupt window is open.
3412  *
3413  * No need to exit to userspace if we already have an interrupt queued.
3414  */
3415 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3416 {
3417         return kvm_arch_interrupt_allowed(vcpu) &&
3418                 !kvm_cpu_has_interrupt(vcpu) &&
3419                 !kvm_event_needs_reinjection(vcpu) &&
3420                 kvm_cpu_accept_dm_intr(vcpu);
3421 }
3422
3423 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3424                                     struct kvm_interrupt *irq)
3425 {
3426         if (irq->irq >= KVM_NR_INTERRUPTS)
3427                 return -EINVAL;
3428
3429         if (!irqchip_in_kernel(vcpu->kvm)) {
3430                 kvm_queue_interrupt(vcpu, irq->irq, false);
3431                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3432                 return 0;
3433         }
3434
3435         /*
3436          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3437          * fail for in-kernel 8259.
3438          */
3439         if (pic_in_kernel(vcpu->kvm))
3440                 return -ENXIO;
3441
3442         if (vcpu->arch.pending_external_vector != -1)
3443                 return -EEXIST;
3444
3445         vcpu->arch.pending_external_vector = irq->irq;
3446         kvm_make_request(KVM_REQ_EVENT, vcpu);
3447         return 0;
3448 }
3449
3450 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3451 {
3452         kvm_inject_nmi(vcpu);
3453
3454         return 0;
3455 }
3456
3457 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3458 {
3459         kvm_make_request(KVM_REQ_SMI, vcpu);
3460
3461         return 0;
3462 }
3463
3464 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3465                                            struct kvm_tpr_access_ctl *tac)
3466 {
3467         if (tac->flags)
3468                 return -EINVAL;
3469         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3470         return 0;
3471 }
3472
3473 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3474                                         u64 mcg_cap)
3475 {
3476         int r;
3477         unsigned bank_num = mcg_cap & 0xff, bank;
3478
3479         r = -EINVAL;
3480         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3481                 goto out;
3482         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3483                 goto out;
3484         r = 0;
3485         vcpu->arch.mcg_cap = mcg_cap;
3486         /* Init IA32_MCG_CTL to all 1s */
3487         if (mcg_cap & MCG_CTL_P)
3488                 vcpu->arch.mcg_ctl = ~(u64)0;
3489         /* Init IA32_MCi_CTL to all 1s */
3490         for (bank = 0; bank < bank_num; bank++)
3491                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3492
3493         if (kvm_x86_ops->setup_mce)
3494                 kvm_x86_ops->setup_mce(vcpu);
3495 out:
3496         return r;
3497 }
3498
3499 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3500                                       struct kvm_x86_mce *mce)
3501 {
3502         u64 mcg_cap = vcpu->arch.mcg_cap;
3503         unsigned bank_num = mcg_cap & 0xff;
3504         u64 *banks = vcpu->arch.mce_banks;
3505
3506         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3507                 return -EINVAL;
3508         /*
3509          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3510          * reporting is disabled
3511          */
3512         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3513             vcpu->arch.mcg_ctl != ~(u64)0)
3514                 return 0;
3515         banks += 4 * mce->bank;
3516         /*
3517          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3518          * reporting is disabled for the bank
3519          */
3520         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3521                 return 0;
3522         if (mce->status & MCI_STATUS_UC) {
3523                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3524                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3525                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3526                         return 0;
3527                 }
3528                 if (banks[1] & MCI_STATUS_VAL)
3529                         mce->status |= MCI_STATUS_OVER;
3530                 banks[2] = mce->addr;
3531                 banks[3] = mce->misc;
3532                 vcpu->arch.mcg_status = mce->mcg_status;
3533                 banks[1] = mce->status;
3534                 kvm_queue_exception(vcpu, MC_VECTOR);
3535         } else if (!(banks[1] & MCI_STATUS_VAL)
3536                    || !(banks[1] & MCI_STATUS_UC)) {
3537                 if (banks[1] & MCI_STATUS_VAL)
3538                         mce->status |= MCI_STATUS_OVER;
3539                 banks[2] = mce->addr;
3540                 banks[3] = mce->misc;
3541                 banks[1] = mce->status;
3542         } else
3543                 banks[1] |= MCI_STATUS_OVER;
3544         return 0;
3545 }
3546
3547 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3548                                                struct kvm_vcpu_events *events)
3549 {
3550         process_nmi(vcpu);
3551
3552         /*
3553          * The API doesn't provide the instruction length for software
3554          * exceptions, so don't report them. As long as the guest RIP
3555          * isn't advanced, we should expect to encounter the exception
3556          * again.
3557          */
3558         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3559                 events->exception.injected = 0;
3560                 events->exception.pending = 0;
3561         } else {
3562                 events->exception.injected = vcpu->arch.exception.injected;
3563                 events->exception.pending = vcpu->arch.exception.pending;
3564                 /*
3565                  * For ABI compatibility, deliberately conflate
3566                  * pending and injected exceptions when
3567                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3568                  */
3569                 if (!vcpu->kvm->arch.exception_payload_enabled)
3570                         events->exception.injected |=
3571                                 vcpu->arch.exception.pending;
3572         }
3573         events->exception.nr = vcpu->arch.exception.nr;
3574         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3575         events->exception.error_code = vcpu->arch.exception.error_code;
3576         events->exception_has_payload = vcpu->arch.exception.has_payload;
3577         events->exception_payload = vcpu->arch.exception.payload;
3578
3579         events->interrupt.injected =
3580                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3581         events->interrupt.nr = vcpu->arch.interrupt.nr;
3582         events->interrupt.soft = 0;
3583         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3584
3585         events->nmi.injected = vcpu->arch.nmi_injected;
3586         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3587         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3588         events->nmi.pad = 0;
3589
3590         events->sipi_vector = 0; /* never valid when reporting to user space */
3591
3592         events->smi.smm = is_smm(vcpu);
3593         events->smi.pending = vcpu->arch.smi_pending;
3594         events->smi.smm_inside_nmi =
3595                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3596         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3597
3598         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3599                          | KVM_VCPUEVENT_VALID_SHADOW
3600                          | KVM_VCPUEVENT_VALID_SMM);
3601         if (vcpu->kvm->arch.exception_payload_enabled)
3602                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3603
3604         memset(&events->reserved, 0, sizeof(events->reserved));
3605 }
3606
3607 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3608
3609 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3610                                               struct kvm_vcpu_events *events)
3611 {
3612         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3613                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3614                               | KVM_VCPUEVENT_VALID_SHADOW
3615                               | KVM_VCPUEVENT_VALID_SMM
3616                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3617                 return -EINVAL;
3618
3619         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3620                 if (!vcpu->kvm->arch.exception_payload_enabled)
3621                         return -EINVAL;
3622                 if (events->exception.pending)
3623                         events->exception.injected = 0;
3624                 else
3625                         events->exception_has_payload = 0;
3626         } else {
3627                 events->exception.pending = 0;
3628                 events->exception_has_payload = 0;
3629         }
3630
3631         if ((events->exception.injected || events->exception.pending) &&
3632             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3633                 return -EINVAL;
3634
3635         /* INITs are latched while in SMM */
3636         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3637             (events->smi.smm || events->smi.pending) &&
3638             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3639                 return -EINVAL;
3640
3641         process_nmi(vcpu);
3642         vcpu->arch.exception.injected = events->exception.injected;
3643         vcpu->arch.exception.pending = events->exception.pending;
3644         vcpu->arch.exception.nr = events->exception.nr;
3645         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3646         vcpu->arch.exception.error_code = events->exception.error_code;
3647         vcpu->arch.exception.has_payload = events->exception_has_payload;
3648         vcpu->arch.exception.payload = events->exception_payload;
3649
3650         vcpu->arch.interrupt.injected = events->interrupt.injected;
3651         vcpu->arch.interrupt.nr = events->interrupt.nr;
3652         vcpu->arch.interrupt.soft = events->interrupt.soft;
3653         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3654                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3655                                                   events->interrupt.shadow);
3656
3657         vcpu->arch.nmi_injected = events->nmi.injected;
3658         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3659                 vcpu->arch.nmi_pending = events->nmi.pending;
3660         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3661
3662         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3663             lapic_in_kernel(vcpu))
3664                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3665
3666         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3667                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3668                         if (events->smi.smm)
3669                                 vcpu->arch.hflags |= HF_SMM_MASK;
3670                         else
3671                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3672                         kvm_smm_changed(vcpu);
3673                 }
3674
3675                 vcpu->arch.smi_pending = events->smi.pending;
3676
3677                 if (events->smi.smm) {
3678                         if (events->smi.smm_inside_nmi)
3679                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3680                         else
3681                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3682                         if (lapic_in_kernel(vcpu)) {
3683                                 if (events->smi.latched_init)
3684                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3685                                 else
3686                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3687                         }
3688                 }
3689         }
3690
3691         kvm_make_request(KVM_REQ_EVENT, vcpu);
3692
3693         return 0;
3694 }
3695
3696 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3697                                              struct kvm_debugregs *dbgregs)
3698 {
3699         unsigned long val;
3700
3701         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3702         kvm_get_dr(vcpu, 6, &val);
3703         dbgregs->dr6 = val;
3704         dbgregs->dr7 = vcpu->arch.dr7;
3705         dbgregs->flags = 0;
3706         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3707 }
3708
3709 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3710                                             struct kvm_debugregs *dbgregs)
3711 {
3712         if (dbgregs->flags)
3713                 return -EINVAL;
3714
3715         if (dbgregs->dr6 & ~0xffffffffull)
3716                 return -EINVAL;
3717         if (dbgregs->dr7 & ~0xffffffffull)
3718                 return -EINVAL;
3719
3720         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3721         kvm_update_dr0123(vcpu);
3722         vcpu->arch.dr6 = dbgregs->dr6;
3723         kvm_update_dr6(vcpu);
3724         vcpu->arch.dr7 = dbgregs->dr7;
3725         kvm_update_dr7(vcpu);
3726
3727         return 0;
3728 }
3729
3730 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3731
3732 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3733 {
3734         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3735         u64 xstate_bv = xsave->header.xfeatures;
3736         u64 valid;
3737
3738         /*
3739          * Copy legacy XSAVE area, to avoid complications with CPUID
3740          * leaves 0 and 1 in the loop below.
3741          */
3742         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3743
3744         /* Set XSTATE_BV */
3745         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3746         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3747
3748         /*
3749          * Copy each region from the possibly compacted offset to the
3750          * non-compacted offset.
3751          */
3752         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3753         while (valid) {
3754                 u64 xfeature_mask = valid & -valid;
3755                 int xfeature_nr = fls64(xfeature_mask) - 1;
3756                 void *src = get_xsave_addr(xsave, xfeature_nr);
3757
3758                 if (src) {
3759                         u32 size, offset, ecx, edx;
3760                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3761                                     &size, &offset, &ecx, &edx);
3762                         if (xfeature_nr == XFEATURE_PKRU)
3763                                 memcpy(dest + offset, &vcpu->arch.pkru,
3764                                        sizeof(vcpu->arch.pkru));
3765                         else
3766                                 memcpy(dest + offset, src, size);
3767
3768                 }
3769
3770                 valid -= xfeature_mask;
3771         }
3772 }
3773
3774 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3775 {
3776         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3777         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3778         u64 valid;
3779
3780         /*
3781          * Copy legacy XSAVE area, to avoid complications with CPUID
3782          * leaves 0 and 1 in the loop below.
3783          */
3784         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3785
3786         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3787         xsave->header.xfeatures = xstate_bv;
3788         if (boot_cpu_has(X86_FEATURE_XSAVES))
3789                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3790
3791         /*
3792          * Copy each region from the non-compacted offset to the
3793          * possibly compacted offset.
3794          */
3795         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3796         while (valid) {
3797                 u64 xfeature_mask = valid & -valid;
3798                 int xfeature_nr = fls64(xfeature_mask) - 1;
3799                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3800
3801                 if (dest) {
3802                         u32 size, offset, ecx, edx;
3803                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3804                                     &size, &offset, &ecx, &edx);
3805                         if (xfeature_nr == XFEATURE_PKRU)
3806                                 memcpy(&vcpu->arch.pkru, src + offset,
3807                                        sizeof(vcpu->arch.pkru));
3808                         else
3809                                 memcpy(dest, src + offset, size);
3810                 }
3811
3812                 valid -= xfeature_mask;
3813         }
3814 }
3815
3816 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3817                                          struct kvm_xsave *guest_xsave)
3818 {
3819         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3820                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3821                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3822         } else {
3823                 memcpy(guest_xsave->region,
3824                         &vcpu->arch.guest_fpu->state.fxsave,
3825                         sizeof(struct fxregs_state));
3826                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3827                         XFEATURE_MASK_FPSSE;
3828         }
3829 }
3830
3831 #define XSAVE_MXCSR_OFFSET 24
3832
3833 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3834                                         struct kvm_xsave *guest_xsave)
3835 {
3836         u64 xstate_bv =
3837                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3838         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3839
3840         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3841                 /*
3842                  * Here we allow setting states that are not present in
3843                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3844                  * with old userspace.
3845                  */
3846                 if (xstate_bv & ~kvm_supported_xcr0() ||
3847                         mxcsr & ~mxcsr_feature_mask)
3848                         return -EINVAL;
3849                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3850         } else {
3851                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3852                         mxcsr & ~mxcsr_feature_mask)
3853                         return -EINVAL;
3854                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3855                         guest_xsave->region, sizeof(struct fxregs_state));
3856         }
3857         return 0;
3858 }
3859
3860 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3861                                         struct kvm_xcrs *guest_xcrs)
3862 {
3863         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3864                 guest_xcrs->nr_xcrs = 0;
3865                 return;
3866         }
3867
3868         guest_xcrs->nr_xcrs = 1;
3869         guest_xcrs->flags = 0;
3870         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3871         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3872 }
3873
3874 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3875                                        struct kvm_xcrs *guest_xcrs)
3876 {
3877         int i, r = 0;
3878
3879         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3880                 return -EINVAL;
3881
3882         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3883                 return -EINVAL;
3884
3885         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3886                 /* Only support XCR0 currently */
3887                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3888                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3889                                 guest_xcrs->xcrs[i].value);
3890                         break;
3891                 }
3892         if (r)
3893                 r = -EINVAL;
3894         return r;
3895 }
3896
3897 /*
3898  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3899  * stopped by the hypervisor.  This function will be called from the host only.
3900  * EINVAL is returned when the host attempts to set the flag for a guest that
3901  * does not support pv clocks.
3902  */
3903 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3904 {
3905         if (!vcpu->arch.pv_time_enabled)
3906                 return -EINVAL;
3907         vcpu->arch.pvclock_set_guest_stopped_request = true;
3908         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3909         return 0;
3910 }
3911
3912 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3913                                      struct kvm_enable_cap *cap)
3914 {
3915         int r;
3916         uint16_t vmcs_version;
3917         void __user *user_ptr;
3918
3919         if (cap->flags)
3920                 return -EINVAL;
3921
3922         switch (cap->cap) {
3923         case KVM_CAP_HYPERV_SYNIC2:
3924                 if (cap->args[0])
3925                         return -EINVAL;
3926                 /* fall through */
3927
3928         case KVM_CAP_HYPERV_SYNIC:
3929                 if (!irqchip_in_kernel(vcpu->kvm))
3930                         return -EINVAL;
3931                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3932                                              KVM_CAP_HYPERV_SYNIC2);
3933         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3934                 if (!kvm_x86_ops->nested_enable_evmcs)
3935                         return -ENOTTY;
3936                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
3937                 if (!r) {
3938                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
3939                         if (copy_to_user(user_ptr, &vmcs_version,
3940                                          sizeof(vmcs_version)))
3941                                 r = -EFAULT;
3942                 }
3943                 return r;
3944
3945         default:
3946                 return -EINVAL;
3947         }
3948 }
3949
3950 long kvm_arch_vcpu_ioctl(struct file *filp,
3951                          unsigned int ioctl, unsigned long arg)
3952 {
3953         struct kvm_vcpu *vcpu = filp->private_data;
3954         void __user *argp = (void __user *)arg;
3955         int r;
3956         union {
3957                 struct kvm_lapic_state *lapic;
3958                 struct kvm_xsave *xsave;
3959                 struct kvm_xcrs *xcrs;
3960                 void *buffer;
3961         } u;
3962
3963         vcpu_load(vcpu);
3964
3965         u.buffer = NULL;
3966         switch (ioctl) {
3967         case KVM_GET_LAPIC: {
3968                 r = -EINVAL;
3969                 if (!lapic_in_kernel(vcpu))
3970                         goto out;
3971                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
3972                                 GFP_KERNEL_ACCOUNT);
3973
3974                 r = -ENOMEM;
3975                 if (!u.lapic)
3976                         goto out;
3977                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3978                 if (r)
3979                         goto out;
3980                 r = -EFAULT;
3981                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3982                         goto out;
3983                 r = 0;
3984                 break;
3985         }
3986         case KVM_SET_LAPIC: {
3987                 r = -EINVAL;
3988                 if (!lapic_in_kernel(vcpu))
3989                         goto out;
3990                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3991                 if (IS_ERR(u.lapic)) {
3992                         r = PTR_ERR(u.lapic);
3993                         goto out_nofree;
3994                 }
3995
3996                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3997                 break;
3998         }
3999         case KVM_INTERRUPT: {
4000                 struct kvm_interrupt irq;
4001
4002                 r = -EFAULT;
4003                 if (copy_from_user(&irq, argp, sizeof(irq)))
4004                         goto out;
4005                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4006                 break;
4007         }
4008         case KVM_NMI: {
4009                 r = kvm_vcpu_ioctl_nmi(vcpu);
4010                 break;
4011         }
4012         case KVM_SMI: {
4013                 r = kvm_vcpu_ioctl_smi(vcpu);
4014                 break;
4015         }
4016         case KVM_SET_CPUID: {
4017                 struct kvm_cpuid __user *cpuid_arg = argp;
4018                 struct kvm_cpuid cpuid;
4019
4020                 r = -EFAULT;
4021                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4022                         goto out;
4023                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4024                 break;
4025         }
4026         case KVM_SET_CPUID2: {
4027                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4028                 struct kvm_cpuid2 cpuid;
4029
4030                 r = -EFAULT;
4031                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4032                         goto out;
4033                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4034                                               cpuid_arg->entries);
4035                 break;
4036         }
4037         case KVM_GET_CPUID2: {
4038                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4039                 struct kvm_cpuid2 cpuid;
4040
4041                 r = -EFAULT;
4042                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4043                         goto out;
4044                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4045                                               cpuid_arg->entries);
4046                 if (r)
4047                         goto out;
4048                 r = -EFAULT;
4049                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4050                         goto out;
4051                 r = 0;
4052                 break;
4053         }
4054         case KVM_GET_MSRS: {
4055                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4056                 r = msr_io(vcpu, argp, do_get_msr, 1);
4057                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4058                 break;
4059         }
4060         case KVM_SET_MSRS: {
4061                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4062                 r = msr_io(vcpu, argp, do_set_msr, 0);
4063                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4064                 break;
4065         }
4066         case KVM_TPR_ACCESS_REPORTING: {
4067                 struct kvm_tpr_access_ctl tac;
4068
4069                 r = -EFAULT;
4070                 if (copy_from_user(&tac, argp, sizeof(tac)))
4071                         goto out;
4072                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4073                 if (r)
4074                         goto out;
4075                 r = -EFAULT;
4076                 if (copy_to_user(argp, &tac, sizeof(tac)))
4077                         goto out;
4078                 r = 0;
4079                 break;
4080         };
4081         case KVM_SET_VAPIC_ADDR: {
4082                 struct kvm_vapic_addr va;
4083                 int idx;
4084
4085                 r = -EINVAL;
4086                 if (!lapic_in_kernel(vcpu))
4087                         goto out;
4088                 r = -EFAULT;
4089                 if (copy_from_user(&va, argp, sizeof(va)))
4090                         goto out;
4091                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4092                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4093                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4094                 break;
4095         }
4096         case KVM_X86_SETUP_MCE: {
4097                 u64 mcg_cap;
4098
4099                 r = -EFAULT;
4100                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4101                         goto out;
4102                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4103                 break;
4104         }
4105         case KVM_X86_SET_MCE: {
4106                 struct kvm_x86_mce mce;
4107
4108                 r = -EFAULT;
4109                 if (copy_from_user(&mce, argp, sizeof(mce)))
4110                         goto out;
4111                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4112                 break;
4113         }
4114         case KVM_GET_VCPU_EVENTS: {
4115                 struct kvm_vcpu_events events;
4116
4117                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4118
4119                 r = -EFAULT;
4120                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4121                         break;
4122                 r = 0;
4123                 break;
4124         }
4125         case KVM_SET_VCPU_EVENTS: {
4126                 struct kvm_vcpu_events events;
4127
4128                 r = -EFAULT;
4129                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4130                         break;
4131
4132                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4133                 break;
4134         }
4135         case KVM_GET_DEBUGREGS: {
4136                 struct kvm_debugregs dbgregs;
4137
4138                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4139
4140                 r = -EFAULT;
4141                 if (copy_to_user(argp, &dbgregs,
4142                                  sizeof(struct kvm_debugregs)))
4143                         break;
4144                 r = 0;
4145                 break;
4146         }
4147         case KVM_SET_DEBUGREGS: {
4148                 struct kvm_debugregs dbgregs;
4149
4150                 r = -EFAULT;
4151                 if (copy_from_user(&dbgregs, argp,
4152                                    sizeof(struct kvm_debugregs)))
4153                         break;
4154
4155                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4156                 break;
4157         }
4158         case KVM_GET_XSAVE: {
4159                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4160                 r = -ENOMEM;
4161                 if (!u.xsave)
4162                         break;
4163
4164                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4165
4166                 r = -EFAULT;
4167                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4168                         break;
4169                 r = 0;
4170                 break;
4171         }
4172         case KVM_SET_XSAVE: {
4173                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4174                 if (IS_ERR(u.xsave)) {
4175                         r = PTR_ERR(u.xsave);
4176                         goto out_nofree;
4177                 }
4178
4179                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4180                 break;
4181         }
4182         case KVM_GET_XCRS: {
4183                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4184                 r = -ENOMEM;
4185                 if (!u.xcrs)
4186                         break;
4187
4188                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4189
4190                 r = -EFAULT;
4191                 if (copy_to_user(argp, u.xcrs,
4192                                  sizeof(struct kvm_xcrs)))
4193                         break;
4194                 r = 0;
4195                 break;
4196         }
4197         case KVM_SET_XCRS: {
4198                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4199                 if (IS_ERR(u.xcrs)) {
4200                         r = PTR_ERR(u.xcrs);
4201                         goto out_nofree;
4202                 }
4203
4204                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4205                 break;
4206         }
4207         case KVM_SET_TSC_KHZ: {
4208                 u32 user_tsc_khz;
4209
4210                 r = -EINVAL;
4211                 user_tsc_khz = (u32)arg;
4212
4213                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4214                         goto out;
4215
4216                 if (user_tsc_khz == 0)
4217                         user_tsc_khz = tsc_khz;
4218
4219                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4220                         r = 0;
4221
4222                 goto out;
4223         }
4224         case KVM_GET_TSC_KHZ: {
4225                 r = vcpu->arch.virtual_tsc_khz;
4226                 goto out;
4227         }
4228         case KVM_KVMCLOCK_CTRL: {
4229                 r = kvm_set_guest_paused(vcpu);
4230                 goto out;
4231         }
4232         case KVM_ENABLE_CAP: {
4233                 struct kvm_enable_cap cap;
4234
4235                 r = -EFAULT;
4236                 if (copy_from_user(&cap, argp, sizeof(cap)))
4237                         goto out;
4238                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4239                 break;
4240         }
4241         case KVM_GET_NESTED_STATE: {
4242                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4243                 u32 user_data_size;
4244
4245                 r = -EINVAL;
4246                 if (!kvm_x86_ops->get_nested_state)
4247                         break;
4248
4249                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4250                 r = -EFAULT;
4251                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4252                         break;
4253
4254                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4255                                                   user_data_size);
4256                 if (r < 0)
4257                         break;
4258
4259                 if (r > user_data_size) {
4260                         if (put_user(r, &user_kvm_nested_state->size))
4261                                 r = -EFAULT;
4262                         else
4263                                 r = -E2BIG;
4264                         break;
4265                 }
4266
4267                 r = 0;
4268                 break;
4269         }
4270         case KVM_SET_NESTED_STATE: {
4271                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4272                 struct kvm_nested_state kvm_state;
4273
4274                 r = -EINVAL;
4275                 if (!kvm_x86_ops->set_nested_state)
4276                         break;
4277
4278                 r = -EFAULT;
4279                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4280                         break;
4281
4282                 r = -EINVAL;
4283                 if (kvm_state.size < sizeof(kvm_state))
4284                         break;
4285
4286                 if (kvm_state.flags &
4287                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4288                       | KVM_STATE_NESTED_EVMCS))
4289                         break;
4290
4291                 /* nested_run_pending implies guest_mode.  */
4292                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4293                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4294                         break;
4295
4296                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4297                 break;
4298         }
4299         case KVM_GET_SUPPORTED_HV_CPUID: {
4300                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4301                 struct kvm_cpuid2 cpuid;
4302
4303                 r = -EFAULT;
4304                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4305                         goto out;
4306
4307                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4308                                                 cpuid_arg->entries);
4309                 if (r)
4310                         goto out;
4311
4312                 r = -EFAULT;
4313                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4314                         goto out;
4315                 r = 0;
4316                 break;
4317         }
4318         default:
4319                 r = -EINVAL;
4320         }
4321 out:
4322         kfree(u.buffer);
4323 out_nofree:
4324         vcpu_put(vcpu);
4325         return r;
4326 }
4327
4328 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4329 {
4330         return VM_FAULT_SIGBUS;
4331 }
4332
4333 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4334 {
4335         int ret;
4336
4337         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4338                 return -EINVAL;
4339         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4340         return ret;
4341 }
4342
4343 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4344                                               u64 ident_addr)
4345 {
4346         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4347 }
4348
4349 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4350                                          unsigned long kvm_nr_mmu_pages)
4351 {
4352         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4353                 return -EINVAL;
4354
4355         mutex_lock(&kvm->slots_lock);
4356
4357         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4358         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4359
4360         mutex_unlock(&kvm->slots_lock);
4361         return 0;
4362 }
4363
4364 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4365 {
4366         return kvm->arch.n_max_mmu_pages;
4367 }
4368
4369 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4370 {
4371         struct kvm_pic *pic = kvm->arch.vpic;
4372         int r;
4373
4374         r = 0;
4375         switch (chip->chip_id) {
4376         case KVM_IRQCHIP_PIC_MASTER:
4377                 memcpy(&chip->chip.pic, &pic->pics[0],
4378                         sizeof(struct kvm_pic_state));
4379                 break;
4380         case KVM_IRQCHIP_PIC_SLAVE:
4381                 memcpy(&chip->chip.pic, &pic->pics[1],
4382                         sizeof(struct kvm_pic_state));
4383                 break;
4384         case KVM_IRQCHIP_IOAPIC:
4385                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4386                 break;
4387         default:
4388                 r = -EINVAL;
4389                 break;
4390         }
4391         return r;
4392 }
4393
4394 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4395 {
4396         struct kvm_pic *pic = kvm->arch.vpic;
4397         int r;
4398
4399         r = 0;
4400         switch (chip->chip_id) {
4401         case KVM_IRQCHIP_PIC_MASTER:
4402                 spin_lock(&pic->lock);
4403                 memcpy(&pic->pics[0], &chip->chip.pic,
4404                         sizeof(struct kvm_pic_state));
4405                 spin_unlock(&pic->lock);
4406                 break;
4407         case KVM_IRQCHIP_PIC_SLAVE:
4408                 spin_lock(&pic->lock);
4409                 memcpy(&pic->pics[1], &chip->chip.pic,
4410                         sizeof(struct kvm_pic_state));
4411                 spin_unlock(&pic->lock);
4412                 break;
4413         case KVM_IRQCHIP_IOAPIC:
4414                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4415                 break;
4416         default:
4417                 r = -EINVAL;
4418                 break;
4419         }
4420         kvm_pic_update_irq(pic);
4421         return r;
4422 }
4423
4424 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4425 {
4426         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4427
4428         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4429
4430         mutex_lock(&kps->lock);
4431         memcpy(ps, &kps->channels, sizeof(*ps));
4432         mutex_unlock(&kps->lock);
4433         return 0;
4434 }
4435
4436 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4437 {
4438         int i;
4439         struct kvm_pit *pit = kvm->arch.vpit;
4440
4441         mutex_lock(&pit->pit_state.lock);
4442         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4443         for (i = 0; i < 3; i++)
4444                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4445         mutex_unlock(&pit->pit_state.lock);
4446         return 0;
4447 }
4448
4449 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4450 {
4451         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4452         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4453                 sizeof(ps->channels));
4454         ps->flags = kvm->arch.vpit->pit_state.flags;
4455         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4456         memset(&ps->reserved, 0, sizeof(ps->reserved));
4457         return 0;
4458 }
4459
4460 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4461 {
4462         int start = 0;
4463         int i;
4464         u32 prev_legacy, cur_legacy;
4465         struct kvm_pit *pit = kvm->arch.vpit;
4466
4467         mutex_lock(&pit->pit_state.lock);
4468         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4469         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4470         if (!prev_legacy && cur_legacy)
4471                 start = 1;
4472         memcpy(&pit->pit_state.channels, &ps->channels,
4473                sizeof(pit->pit_state.channels));
4474         pit->pit_state.flags = ps->flags;
4475         for (i = 0; i < 3; i++)
4476                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4477                                    start && i == 0);
4478         mutex_unlock(&pit->pit_state.lock);
4479         return 0;
4480 }
4481
4482 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4483                                  struct kvm_reinject_control *control)
4484 {
4485         struct kvm_pit *pit = kvm->arch.vpit;
4486
4487         if (!pit)
4488                 return -ENXIO;
4489
4490         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4491          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4492          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4493          */
4494         mutex_lock(&pit->pit_state.lock);
4495         kvm_pit_set_reinject(pit, control->pit_reinject);
4496         mutex_unlock(&pit->pit_state.lock);
4497
4498         return 0;
4499 }
4500
4501 /**
4502  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4503  * @kvm: kvm instance
4504  * @log: slot id and address to which we copy the log
4505  *
4506  * Steps 1-4 below provide general overview of dirty page logging. See
4507  * kvm_get_dirty_log_protect() function description for additional details.
4508  *
4509  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4510  * always flush the TLB (step 4) even if previous step failed  and the dirty
4511  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4512  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4513  * writes will be marked dirty for next log read.
4514  *
4515  *   1. Take a snapshot of the bit and clear it if needed.
4516  *   2. Write protect the corresponding page.
4517  *   3. Copy the snapshot to the userspace.
4518  *   4. Flush TLB's if needed.
4519  */
4520 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4521 {
4522         bool flush = false;
4523         int r;
4524
4525         mutex_lock(&kvm->slots_lock);
4526
4527         /*
4528          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4529          */
4530         if (kvm_x86_ops->flush_log_dirty)
4531                 kvm_x86_ops->flush_log_dirty(kvm);
4532
4533         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4534
4535         /*
4536          * All the TLBs can be flushed out of mmu lock, see the comments in
4537          * kvm_mmu_slot_remove_write_access().
4538          */
4539         lockdep_assert_held(&kvm->slots_lock);
4540         if (flush)
4541                 kvm_flush_remote_tlbs(kvm);
4542
4543         mutex_unlock(&kvm->slots_lock);
4544         return r;
4545 }
4546
4547 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4548 {
4549         bool flush = false;
4550         int r;
4551
4552         mutex_lock(&kvm->slots_lock);
4553
4554         /*
4555          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4556          */
4557         if (kvm_x86_ops->flush_log_dirty)
4558                 kvm_x86_ops->flush_log_dirty(kvm);
4559
4560         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4561
4562         /*
4563          * All the TLBs can be flushed out of mmu lock, see the comments in
4564          * kvm_mmu_slot_remove_write_access().
4565          */
4566         lockdep_assert_held(&kvm->slots_lock);
4567         if (flush)
4568                 kvm_flush_remote_tlbs(kvm);
4569
4570         mutex_unlock(&kvm->slots_lock);
4571         return r;
4572 }
4573
4574 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4575                         bool line_status)
4576 {
4577         if (!irqchip_in_kernel(kvm))
4578                 return -ENXIO;
4579
4580         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4581                                         irq_event->irq, irq_event->level,
4582                                         line_status);
4583         return 0;
4584 }
4585
4586 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4587                             struct kvm_enable_cap *cap)
4588 {
4589         int r;
4590
4591         if (cap->flags)
4592                 return -EINVAL;
4593
4594         switch (cap->cap) {
4595         case KVM_CAP_DISABLE_QUIRKS:
4596                 kvm->arch.disabled_quirks = cap->args[0];
4597                 r = 0;
4598                 break;
4599         case KVM_CAP_SPLIT_IRQCHIP: {
4600                 mutex_lock(&kvm->lock);
4601                 r = -EINVAL;
4602                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4603                         goto split_irqchip_unlock;
4604                 r = -EEXIST;
4605                 if (irqchip_in_kernel(kvm))
4606                         goto split_irqchip_unlock;
4607                 if (kvm->created_vcpus)
4608                         goto split_irqchip_unlock;
4609                 r = kvm_setup_empty_irq_routing(kvm);
4610                 if (r)
4611                         goto split_irqchip_unlock;
4612                 /* Pairs with irqchip_in_kernel. */
4613                 smp_wmb();
4614                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4615                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4616                 r = 0;
4617 split_irqchip_unlock:
4618                 mutex_unlock(&kvm->lock);
4619                 break;
4620         }
4621         case KVM_CAP_X2APIC_API:
4622                 r = -EINVAL;
4623                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4624                         break;
4625
4626                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4627                         kvm->arch.x2apic_format = true;
4628                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4629                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4630
4631                 r = 0;
4632                 break;
4633         case KVM_CAP_X86_DISABLE_EXITS:
4634                 r = -EINVAL;
4635                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4636                         break;
4637
4638                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4639                         kvm_can_mwait_in_guest())
4640                         kvm->arch.mwait_in_guest = true;
4641                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4642                         kvm->arch.hlt_in_guest = true;
4643                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4644                         kvm->arch.pause_in_guest = true;
4645                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4646                         kvm->arch.cstate_in_guest = true;
4647                 r = 0;
4648                 break;
4649         case KVM_CAP_MSR_PLATFORM_INFO:
4650                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4651                 r = 0;
4652                 break;
4653         case KVM_CAP_EXCEPTION_PAYLOAD:
4654                 kvm->arch.exception_payload_enabled = cap->args[0];
4655                 r = 0;
4656                 break;
4657         default:
4658                 r = -EINVAL;
4659                 break;
4660         }
4661         return r;
4662 }
4663
4664 long kvm_arch_vm_ioctl(struct file *filp,
4665                        unsigned int ioctl, unsigned long arg)
4666 {
4667         struct kvm *kvm = filp->private_data;
4668         void __user *argp = (void __user *)arg;
4669         int r = -ENOTTY;
4670         /*
4671          * This union makes it completely explicit to gcc-3.x
4672          * that these two variables' stack usage should be
4673          * combined, not added together.
4674          */
4675         union {
4676                 struct kvm_pit_state ps;
4677                 struct kvm_pit_state2 ps2;
4678                 struct kvm_pit_config pit_config;
4679         } u;
4680
4681         switch (ioctl) {
4682         case KVM_SET_TSS_ADDR:
4683                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4684                 break;
4685         case KVM_SET_IDENTITY_MAP_ADDR: {
4686                 u64 ident_addr;
4687
4688                 mutex_lock(&kvm->lock);
4689                 r = -EINVAL;
4690                 if (kvm->created_vcpus)
4691                         goto set_identity_unlock;
4692                 r = -EFAULT;
4693                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4694                         goto set_identity_unlock;
4695                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4696 set_identity_unlock:
4697                 mutex_unlock(&kvm->lock);
4698                 break;
4699         }
4700         case KVM_SET_NR_MMU_PAGES:
4701                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4702                 break;
4703         case KVM_GET_NR_MMU_PAGES:
4704                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4705                 break;
4706         case KVM_CREATE_IRQCHIP: {
4707                 mutex_lock(&kvm->lock);
4708
4709                 r = -EEXIST;
4710                 if (irqchip_in_kernel(kvm))
4711                         goto create_irqchip_unlock;
4712
4713                 r = -EINVAL;
4714                 if (kvm->created_vcpus)
4715                         goto create_irqchip_unlock;
4716
4717                 r = kvm_pic_init(kvm);
4718                 if (r)
4719                         goto create_irqchip_unlock;
4720
4721                 r = kvm_ioapic_init(kvm);
4722                 if (r) {
4723                         kvm_pic_destroy(kvm);
4724                         goto create_irqchip_unlock;
4725                 }
4726
4727                 r = kvm_setup_default_irq_routing(kvm);
4728                 if (r) {
4729                         kvm_ioapic_destroy(kvm);
4730                         kvm_pic_destroy(kvm);
4731                         goto create_irqchip_unlock;
4732                 }
4733                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4734                 smp_wmb();
4735                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4736         create_irqchip_unlock:
4737                 mutex_unlock(&kvm->lock);
4738                 break;
4739         }
4740         case KVM_CREATE_PIT:
4741                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4742                 goto create_pit;
4743         case KVM_CREATE_PIT2:
4744                 r = -EFAULT;
4745                 if (copy_from_user(&u.pit_config, argp,
4746                                    sizeof(struct kvm_pit_config)))
4747                         goto out;
4748         create_pit:
4749                 mutex_lock(&kvm->lock);
4750                 r = -EEXIST;
4751                 if (kvm->arch.vpit)
4752                         goto create_pit_unlock;
4753                 r = -ENOMEM;
4754                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4755                 if (kvm->arch.vpit)
4756                         r = 0;
4757         create_pit_unlock:
4758                 mutex_unlock(&kvm->lock);
4759                 break;
4760         case KVM_GET_IRQCHIP: {
4761                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4762                 struct kvm_irqchip *chip;
4763
4764                 chip = memdup_user(argp, sizeof(*chip));
4765                 if (IS_ERR(chip)) {
4766                         r = PTR_ERR(chip);
4767                         goto out;
4768                 }
4769
4770                 r = -ENXIO;
4771                 if (!irqchip_kernel(kvm))
4772                         goto get_irqchip_out;
4773                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4774                 if (r)
4775                         goto get_irqchip_out;
4776                 r = -EFAULT;
4777                 if (copy_to_user(argp, chip, sizeof(*chip)))
4778                         goto get_irqchip_out;
4779                 r = 0;
4780         get_irqchip_out:
4781                 kfree(chip);
4782                 break;
4783         }
4784         case KVM_SET_IRQCHIP: {
4785                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4786                 struct kvm_irqchip *chip;
4787
4788                 chip = memdup_user(argp, sizeof(*chip));
4789                 if (IS_ERR(chip)) {
4790                         r = PTR_ERR(chip);
4791                         goto out;
4792                 }
4793
4794                 r = -ENXIO;
4795                 if (!irqchip_kernel(kvm))
4796                         goto set_irqchip_out;
4797                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4798                 if (r)
4799                         goto set_irqchip_out;
4800                 r = 0;
4801         set_irqchip_out:
4802                 kfree(chip);
4803                 break;
4804         }
4805         case KVM_GET_PIT: {
4806                 r = -EFAULT;
4807                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4808                         goto out;
4809                 r = -ENXIO;
4810                 if (!kvm->arch.vpit)
4811                         goto out;
4812                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4813                 if (r)
4814                         goto out;
4815                 r = -EFAULT;
4816                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4817                         goto out;
4818                 r = 0;
4819                 break;
4820         }
4821         case KVM_SET_PIT: {
4822                 r = -EFAULT;
4823                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4824                         goto out;
4825                 r = -ENXIO;
4826                 if (!kvm->arch.vpit)
4827                         goto out;
4828                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4829                 break;
4830         }
4831         case KVM_GET_PIT2: {
4832                 r = -ENXIO;
4833                 if (!kvm->arch.vpit)
4834                         goto out;
4835                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4836                 if (r)
4837                         goto out;
4838                 r = -EFAULT;
4839                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4840                         goto out;
4841                 r = 0;
4842                 break;
4843         }
4844         case KVM_SET_PIT2: {
4845                 r = -EFAULT;
4846                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4847                         goto out;
4848                 r = -ENXIO;
4849                 if (!kvm->arch.vpit)
4850                         goto out;
4851                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4852                 break;
4853         }
4854         case KVM_REINJECT_CONTROL: {
4855                 struct kvm_reinject_control control;
4856                 r =  -EFAULT;
4857                 if (copy_from_user(&control, argp, sizeof(control)))
4858                         goto out;
4859                 r = kvm_vm_ioctl_reinject(kvm, &control);
4860                 break;
4861         }
4862         case KVM_SET_BOOT_CPU_ID:
4863                 r = 0;
4864                 mutex_lock(&kvm->lock);
4865                 if (kvm->created_vcpus)
4866                         r = -EBUSY;
4867                 else
4868                         kvm->arch.bsp_vcpu_id = arg;
4869                 mutex_unlock(&kvm->lock);
4870                 break;
4871         case KVM_XEN_HVM_CONFIG: {
4872                 struct kvm_xen_hvm_config xhc;
4873                 r = -EFAULT;
4874                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4875                         goto out;
4876                 r = -EINVAL;
4877                 if (xhc.flags)
4878                         goto out;
4879                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4880                 r = 0;
4881                 break;
4882         }
4883         case KVM_SET_CLOCK: {
4884                 struct kvm_clock_data user_ns;
4885                 u64 now_ns;
4886
4887                 r = -EFAULT;
4888                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4889                         goto out;
4890
4891                 r = -EINVAL;
4892                 if (user_ns.flags)
4893                         goto out;
4894
4895                 r = 0;
4896                 /*
4897                  * TODO: userspace has to take care of races with VCPU_RUN, so
4898                  * kvm_gen_update_masterclock() can be cut down to locked
4899                  * pvclock_update_vm_gtod_copy().
4900                  */
4901                 kvm_gen_update_masterclock(kvm);
4902                 now_ns = get_kvmclock_ns(kvm);
4903                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4904                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4905                 break;
4906         }
4907         case KVM_GET_CLOCK: {
4908                 struct kvm_clock_data user_ns;
4909                 u64 now_ns;
4910
4911                 now_ns = get_kvmclock_ns(kvm);
4912                 user_ns.clock = now_ns;
4913                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4914                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4915
4916                 r = -EFAULT;
4917                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4918                         goto out;
4919                 r = 0;
4920                 break;
4921         }
4922         case KVM_MEMORY_ENCRYPT_OP: {
4923                 r = -ENOTTY;
4924                 if (kvm_x86_ops->mem_enc_op)
4925                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4926                 break;
4927         }
4928         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4929                 struct kvm_enc_region region;
4930
4931                 r = -EFAULT;
4932                 if (copy_from_user(&region, argp, sizeof(region)))
4933                         goto out;
4934
4935                 r = -ENOTTY;
4936                 if (kvm_x86_ops->mem_enc_reg_region)
4937                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4938                 break;
4939         }
4940         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4941                 struct kvm_enc_region region;
4942
4943                 r = -EFAULT;
4944                 if (copy_from_user(&region, argp, sizeof(region)))
4945                         goto out;
4946
4947                 r = -ENOTTY;
4948                 if (kvm_x86_ops->mem_enc_unreg_region)
4949                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4950                 break;
4951         }
4952         case KVM_HYPERV_EVENTFD: {
4953                 struct kvm_hyperv_eventfd hvevfd;
4954
4955                 r = -EFAULT;
4956                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4957                         goto out;
4958                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4959                 break;
4960         }
4961         default:
4962                 r = -ENOTTY;
4963         }
4964 out:
4965         return r;
4966 }
4967
4968 static void kvm_init_msr_list(void)
4969 {
4970         u32 dummy[2];
4971         unsigned i, j;
4972
4973         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4974                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4975                         continue;
4976
4977                 /*
4978                  * Even MSRs that are valid in the host may not be exposed
4979                  * to the guests in some cases.
4980                  */
4981                 switch (msrs_to_save[i]) {
4982                 case MSR_IA32_BNDCFGS:
4983                         if (!kvm_mpx_supported())
4984                                 continue;
4985                         break;
4986                 case MSR_TSC_AUX:
4987                         if (!kvm_x86_ops->rdtscp_supported())
4988                                 continue;
4989                         break;
4990                 case MSR_IA32_RTIT_CTL:
4991                 case MSR_IA32_RTIT_STATUS:
4992                         if (!kvm_x86_ops->pt_supported())
4993                                 continue;
4994                         break;
4995                 case MSR_IA32_RTIT_CR3_MATCH:
4996                         if (!kvm_x86_ops->pt_supported() ||
4997                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
4998                                 continue;
4999                         break;
5000                 case MSR_IA32_RTIT_OUTPUT_BASE:
5001                 case MSR_IA32_RTIT_OUTPUT_MASK:
5002                         if (!kvm_x86_ops->pt_supported() ||
5003                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5004                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5005                                 continue;
5006                         break;
5007                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5008                         if (!kvm_x86_ops->pt_supported() ||
5009                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5010                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5011                                 continue;
5012                         break;
5013                 }
5014                 default:
5015                         break;
5016                 }
5017
5018                 if (j < i)
5019                         msrs_to_save[j] = msrs_to_save[i];
5020                 j++;
5021         }
5022         num_msrs_to_save = j;
5023
5024         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5025                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5026                         continue;
5027
5028                 if (j < i)
5029                         emulated_msrs[j] = emulated_msrs[i];
5030                 j++;
5031         }
5032         num_emulated_msrs = j;
5033
5034         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5035                 struct kvm_msr_entry msr;
5036
5037                 msr.index = msr_based_features[i];
5038                 if (kvm_get_msr_feature(&msr))
5039                         continue;
5040
5041                 if (j < i)
5042                         msr_based_features[j] = msr_based_features[i];
5043                 j++;
5044         }
5045         num_msr_based_features = j;
5046 }
5047
5048 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5049                            const void *v)
5050 {
5051         int handled = 0;
5052         int n;
5053
5054         do {
5055                 n = min(len, 8);
5056                 if (!(lapic_in_kernel(vcpu) &&
5057                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5058                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5059                         break;
5060                 handled += n;
5061                 addr += n;
5062                 len -= n;
5063                 v += n;
5064         } while (len);
5065
5066         return handled;
5067 }
5068
5069 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5070 {
5071         int handled = 0;
5072         int n;
5073
5074         do {
5075                 n = min(len, 8);
5076                 if (!(lapic_in_kernel(vcpu) &&
5077                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5078                                          addr, n, v))
5079                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5080                         break;
5081                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5082                 handled += n;
5083                 addr += n;
5084                 len -= n;
5085                 v += n;
5086         } while (len);
5087
5088         return handled;
5089 }
5090
5091 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5092                         struct kvm_segment *var, int seg)
5093 {
5094         kvm_x86_ops->set_segment(vcpu, var, seg);
5095 }
5096
5097 void kvm_get_segment(struct kvm_vcpu *vcpu,
5098                      struct kvm_segment *var, int seg)
5099 {
5100         kvm_x86_ops->get_segment(vcpu, var, seg);
5101 }
5102
5103 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5104                            struct x86_exception *exception)
5105 {
5106         gpa_t t_gpa;
5107
5108         BUG_ON(!mmu_is_nested(vcpu));
5109
5110         /* NPT walks are always user-walks */
5111         access |= PFERR_USER_MASK;
5112         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5113
5114         return t_gpa;
5115 }
5116
5117 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5118                               struct x86_exception *exception)
5119 {
5120         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5121         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5122 }
5123
5124  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5125                                 struct x86_exception *exception)
5126 {
5127         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5128         access |= PFERR_FETCH_MASK;
5129         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5130 }
5131
5132 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5133                                struct x86_exception *exception)
5134 {
5135         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5136         access |= PFERR_WRITE_MASK;
5137         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5138 }
5139
5140 /* uses this to access any guest's mapped memory without checking CPL */
5141 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5142                                 struct x86_exception *exception)
5143 {
5144         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5145 }
5146
5147 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5148                                       struct kvm_vcpu *vcpu, u32 access,
5149                                       struct x86_exception *exception)
5150 {
5151         void *data = val;
5152         int r = X86EMUL_CONTINUE;
5153
5154         while (bytes) {
5155                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5156                                                             exception);
5157                 unsigned offset = addr & (PAGE_SIZE-1);
5158                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5159                 int ret;
5160
5161                 if (gpa == UNMAPPED_GVA)
5162                         return X86EMUL_PROPAGATE_FAULT;
5163                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5164                                                offset, toread);
5165                 if (ret < 0) {
5166                         r = X86EMUL_IO_NEEDED;
5167                         goto out;
5168                 }
5169
5170                 bytes -= toread;
5171                 data += toread;
5172                 addr += toread;
5173         }
5174 out:
5175         return r;
5176 }
5177
5178 /* used for instruction fetching */
5179 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5180                                 gva_t addr, void *val, unsigned int bytes,
5181                                 struct x86_exception *exception)
5182 {
5183         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5184         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5185         unsigned offset;
5186         int ret;
5187
5188         /* Inline kvm_read_guest_virt_helper for speed.  */
5189         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5190                                                     exception);
5191         if (unlikely(gpa == UNMAPPED_GVA))
5192                 return X86EMUL_PROPAGATE_FAULT;
5193
5194         offset = addr & (PAGE_SIZE-1);
5195         if (WARN_ON(offset + bytes > PAGE_SIZE))
5196                 bytes = (unsigned)PAGE_SIZE - offset;
5197         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5198                                        offset, bytes);
5199         if (unlikely(ret < 0))
5200                 return X86EMUL_IO_NEEDED;
5201
5202         return X86EMUL_CONTINUE;
5203 }
5204
5205 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5206                                gva_t addr, void *val, unsigned int bytes,
5207                                struct x86_exception *exception)
5208 {
5209         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5210
5211         /*
5212          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5213          * is returned, but our callers are not ready for that and they blindly
5214          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5215          * uninitialized kernel stack memory into cr2 and error code.
5216          */
5217         memset(exception, 0, sizeof(*exception));
5218         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5219                                           exception);
5220 }
5221 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5222
5223 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5224                              gva_t addr, void *val, unsigned int bytes,
5225                              struct x86_exception *exception, bool system)
5226 {
5227         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5228         u32 access = 0;
5229
5230         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5231                 access |= PFERR_USER_MASK;
5232
5233         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5234 }
5235
5236 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5237                 unsigned long addr, void *val, unsigned int bytes)
5238 {
5239         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5240         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5241
5242         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5243 }
5244
5245 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5246                                       struct kvm_vcpu *vcpu, u32 access,
5247                                       struct x86_exception *exception)
5248 {
5249         void *data = val;
5250         int r = X86EMUL_CONTINUE;
5251
5252         while (bytes) {
5253                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5254                                                              access,
5255                                                              exception);
5256                 unsigned offset = addr & (PAGE_SIZE-1);
5257                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5258                 int ret;
5259
5260                 if (gpa == UNMAPPED_GVA)
5261                         return X86EMUL_PROPAGATE_FAULT;
5262                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5263                 if (ret < 0) {
5264                         r = X86EMUL_IO_NEEDED;
5265                         goto out;
5266                 }
5267
5268                 bytes -= towrite;
5269                 data += towrite;
5270                 addr += towrite;
5271         }
5272 out:
5273         return r;
5274 }
5275
5276 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5277                               unsigned int bytes, struct x86_exception *exception,
5278                               bool system)
5279 {
5280         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5281         u32 access = PFERR_WRITE_MASK;
5282
5283         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5284                 access |= PFERR_USER_MASK;
5285
5286         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5287                                            access, exception);
5288 }
5289
5290 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5291                                 unsigned int bytes, struct x86_exception *exception)
5292 {
5293         /* kvm_write_guest_virt_system can pull in tons of pages. */
5294         vcpu->arch.l1tf_flush_l1d = true;
5295
5296         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5297                                            PFERR_WRITE_MASK, exception);
5298 }
5299 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5300
5301 int handle_ud(struct kvm_vcpu *vcpu)
5302 {
5303         int emul_type = EMULTYPE_TRAP_UD;
5304         enum emulation_result er;
5305         char sig[5]; /* ud2; .ascii "kvm" */
5306         struct x86_exception e;
5307
5308         if (force_emulation_prefix &&
5309             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5310                                 sig, sizeof(sig), &e) == 0 &&
5311             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5312                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5313                 emul_type = 0;
5314         }
5315
5316         er = kvm_emulate_instruction(vcpu, emul_type);
5317         if (er == EMULATE_USER_EXIT)
5318                 return 0;
5319         if (er != EMULATE_DONE)
5320                 kvm_queue_exception(vcpu, UD_VECTOR);
5321         return 1;
5322 }
5323 EXPORT_SYMBOL_GPL(handle_ud);
5324
5325 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5326                             gpa_t gpa, bool write)
5327 {
5328         /* For APIC access vmexit */
5329         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5330                 return 1;
5331
5332         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5333                 trace_vcpu_match_mmio(gva, gpa, write, true);
5334                 return 1;
5335         }
5336
5337         return 0;
5338 }
5339
5340 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5341                                 gpa_t *gpa, struct x86_exception *exception,
5342                                 bool write)
5343 {
5344         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5345                 | (write ? PFERR_WRITE_MASK : 0);
5346
5347         /*
5348          * currently PKRU is only applied to ept enabled guest so
5349          * there is no pkey in EPT page table for L1 guest or EPT
5350          * shadow page table for L2 guest.
5351          */
5352         if (vcpu_match_mmio_gva(vcpu, gva)
5353             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5354                                  vcpu->arch.access, 0, access)) {
5355                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5356                                         (gva & (PAGE_SIZE - 1));
5357                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5358                 return 1;
5359         }
5360
5361         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5362
5363         if (*gpa == UNMAPPED_GVA)
5364                 return -1;
5365
5366         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5367 }
5368
5369 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5370                         const void *val, int bytes)
5371 {
5372         int ret;
5373
5374         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5375         if (ret < 0)
5376                 return 0;
5377         kvm_page_track_write(vcpu, gpa, val, bytes);
5378         return 1;
5379 }
5380
5381 struct read_write_emulator_ops {
5382         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5383                                   int bytes);
5384         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5385                                   void *val, int bytes);
5386         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5387                                int bytes, void *val);
5388         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5389                                     void *val, int bytes);
5390         bool write;
5391 };
5392
5393 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5394 {
5395         if (vcpu->mmio_read_completed) {
5396                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5397                                vcpu->mmio_fragments[0].gpa, val);
5398                 vcpu->mmio_read_completed = 0;
5399                 return 1;
5400         }
5401
5402         return 0;
5403 }
5404
5405 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5406                         void *val, int bytes)
5407 {
5408         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5409 }
5410
5411 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5412                          void *val, int bytes)
5413 {
5414         return emulator_write_phys(vcpu, gpa, val, bytes);
5415 }
5416
5417 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5418 {
5419         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5420         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5421 }
5422
5423 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5424                           void *val, int bytes)
5425 {
5426         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5427         return X86EMUL_IO_NEEDED;
5428 }
5429
5430 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5431                            void *val, int bytes)
5432 {
5433         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5434
5435         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5436         return X86EMUL_CONTINUE;
5437 }
5438
5439 static const struct read_write_emulator_ops read_emultor = {
5440         .read_write_prepare = read_prepare,
5441         .read_write_emulate = read_emulate,
5442         .read_write_mmio = vcpu_mmio_read,
5443         .read_write_exit_mmio = read_exit_mmio,
5444 };
5445
5446 static const struct read_write_emulator_ops write_emultor = {
5447         .read_write_emulate = write_emulate,
5448         .read_write_mmio = write_mmio,
5449         .read_write_exit_mmio = write_exit_mmio,
5450         .write = true,
5451 };
5452
5453 static int emulator_read_write_onepage(unsigned long addr, void *val,
5454                                        unsigned int bytes,
5455                                        struct x86_exception *exception,
5456                                        struct kvm_vcpu *vcpu,
5457                                        const struct read_write_emulator_ops *ops)
5458 {
5459         gpa_t gpa;
5460         int handled, ret;
5461         bool write = ops->write;
5462         struct kvm_mmio_fragment *frag;
5463         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5464
5465         /*
5466          * If the exit was due to a NPF we may already have a GPA.
5467          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5468          * Note, this cannot be used on string operations since string
5469          * operation using rep will only have the initial GPA from the NPF
5470          * occurred.
5471          */
5472         if (vcpu->arch.gpa_available &&
5473             emulator_can_use_gpa(ctxt) &&
5474             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5475                 gpa = vcpu->arch.gpa_val;
5476                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5477         } else {
5478                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5479                 if (ret < 0)
5480                         return X86EMUL_PROPAGATE_FAULT;
5481         }
5482
5483         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5484                 return X86EMUL_CONTINUE;
5485
5486         /*
5487          * Is this MMIO handled locally?
5488          */
5489         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5490         if (handled == bytes)
5491                 return X86EMUL_CONTINUE;
5492
5493         gpa += handled;
5494         bytes -= handled;
5495         val += handled;
5496
5497         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5498         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5499         frag->gpa = gpa;
5500         frag->data = val;
5501         frag->len = bytes;
5502         return X86EMUL_CONTINUE;
5503 }
5504
5505 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5506                         unsigned long addr,
5507                         void *val, unsigned int bytes,
5508                         struct x86_exception *exception,
5509                         const struct read_write_emulator_ops *ops)
5510 {
5511         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5512         gpa_t gpa;
5513         int rc;
5514
5515         if (ops->read_write_prepare &&
5516                   ops->read_write_prepare(vcpu, val, bytes))
5517                 return X86EMUL_CONTINUE;
5518
5519         vcpu->mmio_nr_fragments = 0;
5520
5521         /* Crossing a page boundary? */
5522         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5523                 int now;
5524
5525                 now = -addr & ~PAGE_MASK;
5526                 rc = emulator_read_write_onepage(addr, val, now, exception,
5527                                                  vcpu, ops);
5528
5529                 if (rc != X86EMUL_CONTINUE)
5530                         return rc;
5531                 addr += now;
5532                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5533                         addr = (u32)addr;
5534                 val += now;
5535                 bytes -= now;
5536         }
5537
5538         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5539                                          vcpu, ops);
5540         if (rc != X86EMUL_CONTINUE)
5541                 return rc;
5542
5543         if (!vcpu->mmio_nr_fragments)
5544                 return rc;
5545
5546         gpa = vcpu->mmio_fragments[0].gpa;
5547
5548         vcpu->mmio_needed = 1;
5549         vcpu->mmio_cur_fragment = 0;
5550
5551         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5552         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5553         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5554         vcpu->run->mmio.phys_addr = gpa;
5555
5556         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5557 }
5558
5559 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5560                                   unsigned long addr,
5561                                   void *val,
5562                                   unsigned int bytes,
5563                                   struct x86_exception *exception)
5564 {
5565         return emulator_read_write(ctxt, addr, val, bytes,
5566                                    exception, &read_emultor);
5567 }
5568
5569 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5570                             unsigned long addr,
5571                             const void *val,
5572                             unsigned int bytes,
5573                             struct x86_exception *exception)
5574 {
5575         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5576                                    exception, &write_emultor);
5577 }
5578
5579 #define CMPXCHG_TYPE(t, ptr, old, new) \
5580         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5581
5582 #ifdef CONFIG_X86_64
5583 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5584 #else
5585 #  define CMPXCHG64(ptr, old, new) \
5586         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5587 #endif
5588
5589 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5590                                      unsigned long addr,
5591                                      const void *old,
5592                                      const void *new,
5593                                      unsigned int bytes,
5594                                      struct x86_exception *exception)
5595 {
5596         struct kvm_host_map map;
5597         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5598         gpa_t gpa;
5599         char *kaddr;
5600         bool exchanged;
5601
5602         /* guests cmpxchg8b have to be emulated atomically */
5603         if (bytes > 8 || (bytes & (bytes - 1)))
5604                 goto emul_write;
5605
5606         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5607
5608         if (gpa == UNMAPPED_GVA ||
5609             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5610                 goto emul_write;
5611
5612         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5613                 goto emul_write;
5614
5615         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5616                 goto emul_write;
5617
5618         kaddr = map.hva + offset_in_page(gpa);
5619
5620         switch (bytes) {
5621         case 1:
5622                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5623                 break;
5624         case 2:
5625                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5626                 break;
5627         case 4:
5628                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5629                 break;
5630         case 8:
5631                 exchanged = CMPXCHG64(kaddr, old, new);
5632                 break;
5633         default:
5634                 BUG();
5635         }
5636
5637         kvm_vcpu_unmap(vcpu, &map, true);
5638
5639         if (!exchanged)
5640                 return X86EMUL_CMPXCHG_FAILED;
5641
5642         kvm_page_track_write(vcpu, gpa, new, bytes);
5643
5644         return X86EMUL_CONTINUE;
5645
5646 emul_write:
5647         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5648
5649         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5650 }
5651
5652 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5653 {
5654         int r = 0, i;
5655
5656         for (i = 0; i < vcpu->arch.pio.count; i++) {
5657                 if (vcpu->arch.pio.in)
5658                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5659                                             vcpu->arch.pio.size, pd);
5660                 else
5661                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5662                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5663                                              pd);
5664                 if (r)
5665                         break;
5666                 pd += vcpu->arch.pio.size;
5667         }
5668         return r;
5669 }
5670
5671 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5672                                unsigned short port, void *val,
5673                                unsigned int count, bool in)
5674 {
5675         vcpu->arch.pio.port = port;
5676         vcpu->arch.pio.in = in;
5677         vcpu->arch.pio.count  = count;
5678         vcpu->arch.pio.size = size;
5679
5680         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5681                 vcpu->arch.pio.count = 0;
5682                 return 1;
5683         }
5684
5685         vcpu->run->exit_reason = KVM_EXIT_IO;
5686         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5687         vcpu->run->io.size = size;
5688         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5689         vcpu->run->io.count = count;
5690         vcpu->run->io.port = port;
5691
5692         return 0;
5693 }
5694
5695 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5696                                     int size, unsigned short port, void *val,
5697                                     unsigned int count)
5698 {
5699         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5700         int ret;
5701
5702         if (vcpu->arch.pio.count)
5703                 goto data_avail;
5704
5705         memset(vcpu->arch.pio_data, 0, size * count);
5706
5707         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5708         if (ret) {
5709 data_avail:
5710                 memcpy(val, vcpu->arch.pio_data, size * count);
5711                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5712                 vcpu->arch.pio.count = 0;
5713                 return 1;
5714         }
5715
5716         return 0;
5717 }
5718
5719 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5720                                      int size, unsigned short port,
5721                                      const void *val, unsigned int count)
5722 {
5723         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5724
5725         memcpy(vcpu->arch.pio_data, val, size * count);
5726         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5727         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5728 }
5729
5730 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5731 {
5732         return kvm_x86_ops->get_segment_base(vcpu, seg);
5733 }
5734
5735 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5736 {
5737         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5738 }
5739
5740 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5741 {
5742         if (!need_emulate_wbinvd(vcpu))
5743                 return X86EMUL_CONTINUE;
5744
5745         if (kvm_x86_ops->has_wbinvd_exit()) {
5746                 int cpu = get_cpu();
5747
5748                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5749                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5750                                 wbinvd_ipi, NULL, 1);
5751                 put_cpu();
5752                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5753         } else
5754                 wbinvd();
5755         return X86EMUL_CONTINUE;
5756 }
5757
5758 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5759 {
5760         kvm_emulate_wbinvd_noskip(vcpu);
5761         return kvm_skip_emulated_instruction(vcpu);
5762 }
5763 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5764
5765
5766
5767 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5768 {
5769         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5770 }
5771
5772 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5773                            unsigned long *dest)
5774 {
5775         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5776 }
5777
5778 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5779                            unsigned long value)
5780 {
5781
5782         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5783 }
5784
5785 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5786 {
5787         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5788 }
5789
5790 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5791 {
5792         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5793         unsigned long value;
5794
5795         switch (cr) {
5796         case 0:
5797                 value = kvm_read_cr0(vcpu);
5798                 break;
5799         case 2:
5800                 value = vcpu->arch.cr2;
5801                 break;
5802         case 3:
5803                 value = kvm_read_cr3(vcpu);
5804                 break;
5805         case 4:
5806                 value = kvm_read_cr4(vcpu);
5807                 break;
5808         case 8:
5809                 value = kvm_get_cr8(vcpu);
5810                 break;
5811         default:
5812                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5813                 return 0;
5814         }
5815
5816         return value;
5817 }
5818
5819 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5820 {
5821         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5822         int res = 0;
5823
5824         switch (cr) {
5825         case 0:
5826                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5827                 break;
5828         case 2:
5829                 vcpu->arch.cr2 = val;
5830                 break;
5831         case 3:
5832                 res = kvm_set_cr3(vcpu, val);
5833                 break;
5834         case 4:
5835                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5836                 break;
5837         case 8:
5838                 res = kvm_set_cr8(vcpu, val);
5839                 break;
5840         default:
5841                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5842                 res = -1;
5843         }
5844
5845         return res;
5846 }
5847
5848 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5849 {
5850         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5851 }
5852
5853 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5854 {
5855         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5856 }
5857
5858 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5859 {
5860         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5861 }
5862
5863 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5864 {
5865         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5866 }
5867
5868 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5869 {
5870         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5871 }
5872
5873 static unsigned long emulator_get_cached_segment_base(
5874         struct x86_emulate_ctxt *ctxt, int seg)
5875 {
5876         return get_segment_base(emul_to_vcpu(ctxt), seg);
5877 }
5878
5879 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5880                                  struct desc_struct *desc, u32 *base3,
5881                                  int seg)
5882 {
5883         struct kvm_segment var;
5884
5885         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5886         *selector = var.selector;
5887
5888         if (var.unusable) {
5889                 memset(desc, 0, sizeof(*desc));
5890                 if (base3)
5891                         *base3 = 0;
5892                 return false;
5893         }
5894
5895         if (var.g)
5896                 var.limit >>= 12;
5897         set_desc_limit(desc, var.limit);
5898         set_desc_base(desc, (unsigned long)var.base);
5899 #ifdef CONFIG_X86_64
5900         if (base3)
5901                 *base3 = var.base >> 32;
5902 #endif
5903         desc->type = var.type;
5904         desc->s = var.s;
5905         desc->dpl = var.dpl;
5906         desc->p = var.present;
5907         desc->avl = var.avl;
5908         desc->l = var.l;
5909         desc->d = var.db;
5910         desc->g = var.g;
5911
5912         return true;
5913 }
5914
5915 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5916                                  struct desc_struct *desc, u32 base3,
5917                                  int seg)
5918 {
5919         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5920         struct kvm_segment var;
5921
5922         var.selector = selector;
5923         var.base = get_desc_base(desc);
5924 #ifdef CONFIG_X86_64
5925         var.base |= ((u64)base3) << 32;
5926 #endif
5927         var.limit = get_desc_limit(desc);
5928         if (desc->g)
5929                 var.limit = (var.limit << 12) | 0xfff;
5930         var.type = desc->type;
5931         var.dpl = desc->dpl;
5932         var.db = desc->d;
5933         var.s = desc->s;
5934         var.l = desc->l;
5935         var.g = desc->g;
5936         var.avl = desc->avl;
5937         var.present = desc->p;
5938         var.unusable = !var.present;
5939         var.padding = 0;
5940
5941         kvm_set_segment(vcpu, &var, seg);
5942         return;
5943 }
5944
5945 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5946                             u32 msr_index, u64 *pdata)
5947 {
5948         struct msr_data msr;
5949         int r;
5950
5951         msr.index = msr_index;
5952         msr.host_initiated = false;
5953         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5954         if (r)
5955                 return r;
5956
5957         *pdata = msr.data;
5958         return 0;
5959 }
5960
5961 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5962                             u32 msr_index, u64 data)
5963 {
5964         struct msr_data msr;
5965
5966         msr.data = data;
5967         msr.index = msr_index;
5968         msr.host_initiated = false;
5969         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5970 }
5971
5972 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5973 {
5974         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5975
5976         return vcpu->arch.smbase;
5977 }
5978
5979 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5980 {
5981         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5982
5983         vcpu->arch.smbase = smbase;
5984 }
5985
5986 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5987                               u32 pmc)
5988 {
5989         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5990 }
5991
5992 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5993                              u32 pmc, u64 *pdata)
5994 {
5995         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5996 }
5997
5998 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5999 {
6000         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6001 }
6002
6003 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6004                               struct x86_instruction_info *info,
6005                               enum x86_intercept_stage stage)
6006 {
6007         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6008 }
6009
6010 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6011                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6012 {
6013         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6014 }
6015
6016 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6017 {
6018         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6019 }
6020
6021 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6022 {
6023         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6024 }
6025
6026 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6027 {
6028         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6029 }
6030
6031 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6032 {
6033         return emul_to_vcpu(ctxt)->arch.hflags;
6034 }
6035
6036 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6037 {
6038         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6039 }
6040
6041 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6042                                   const char *smstate)
6043 {
6044         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6045 }
6046
6047 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6048 {
6049         kvm_smm_changed(emul_to_vcpu(ctxt));
6050 }
6051
6052 static const struct x86_emulate_ops emulate_ops = {
6053         .read_gpr            = emulator_read_gpr,
6054         .write_gpr           = emulator_write_gpr,
6055         .read_std            = emulator_read_std,
6056         .write_std           = emulator_write_std,
6057         .read_phys           = kvm_read_guest_phys_system,
6058         .fetch               = kvm_fetch_guest_virt,
6059         .read_emulated       = emulator_read_emulated,
6060         .write_emulated      = emulator_write_emulated,
6061         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6062         .invlpg              = emulator_invlpg,
6063         .pio_in_emulated     = emulator_pio_in_emulated,
6064         .pio_out_emulated    = emulator_pio_out_emulated,
6065         .get_segment         = emulator_get_segment,
6066         .set_segment         = emulator_set_segment,
6067         .get_cached_segment_base = emulator_get_cached_segment_base,
6068         .get_gdt             = emulator_get_gdt,
6069         .get_idt             = emulator_get_idt,
6070         .set_gdt             = emulator_set_gdt,
6071         .set_idt             = emulator_set_idt,
6072         .get_cr              = emulator_get_cr,
6073         .set_cr              = emulator_set_cr,
6074         .cpl                 = emulator_get_cpl,
6075         .get_dr              = emulator_get_dr,
6076         .set_dr              = emulator_set_dr,
6077         .get_smbase          = emulator_get_smbase,
6078         .set_smbase          = emulator_set_smbase,
6079         .set_msr             = emulator_set_msr,
6080         .get_msr             = emulator_get_msr,
6081         .check_pmc           = emulator_check_pmc,
6082         .read_pmc            = emulator_read_pmc,
6083         .halt                = emulator_halt,
6084         .wbinvd              = emulator_wbinvd,
6085         .fix_hypercall       = emulator_fix_hypercall,
6086         .intercept           = emulator_intercept,
6087         .get_cpuid           = emulator_get_cpuid,
6088         .set_nmi_mask        = emulator_set_nmi_mask,
6089         .get_hflags          = emulator_get_hflags,
6090         .set_hflags          = emulator_set_hflags,
6091         .pre_leave_smm       = emulator_pre_leave_smm,
6092         .post_leave_smm      = emulator_post_leave_smm,
6093 };
6094
6095 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6096 {
6097         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6098         /*
6099          * an sti; sti; sequence only disable interrupts for the first
6100          * instruction. So, if the last instruction, be it emulated or
6101          * not, left the system with the INT_STI flag enabled, it
6102          * means that the last instruction is an sti. We should not
6103          * leave the flag on in this case. The same goes for mov ss
6104          */
6105         if (int_shadow & mask)
6106                 mask = 0;
6107         if (unlikely(int_shadow || mask)) {
6108                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6109                 if (!mask)
6110                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6111         }
6112 }
6113
6114 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6115 {
6116         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6117         if (ctxt->exception.vector == PF_VECTOR)
6118                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6119
6120         if (ctxt->exception.error_code_valid)
6121                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6122                                       ctxt->exception.error_code);
6123         else
6124                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6125         return false;
6126 }
6127
6128 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6129 {
6130         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6131         int cs_db, cs_l;
6132
6133         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6134
6135         ctxt->eflags = kvm_get_rflags(vcpu);
6136         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6137
6138         ctxt->eip = kvm_rip_read(vcpu);
6139         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6140                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6141                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6142                      cs_db                              ? X86EMUL_MODE_PROT32 :
6143                                                           X86EMUL_MODE_PROT16;
6144         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6145         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6146         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6147
6148         init_decode_cache(ctxt);
6149         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6150 }
6151
6152 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6153 {
6154         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6155         int ret;
6156
6157         init_emulate_ctxt(vcpu);
6158
6159         ctxt->op_bytes = 2;
6160         ctxt->ad_bytes = 2;
6161         ctxt->_eip = ctxt->eip + inc_eip;
6162         ret = emulate_int_real(ctxt, irq);
6163
6164         if (ret != X86EMUL_CONTINUE)
6165                 return EMULATE_FAIL;
6166
6167         ctxt->eip = ctxt->_eip;
6168         kvm_rip_write(vcpu, ctxt->eip);
6169         kvm_set_rflags(vcpu, ctxt->eflags);
6170
6171         return EMULATE_DONE;
6172 }
6173 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6174
6175 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6176 {
6177         int r = EMULATE_DONE;
6178
6179         ++vcpu->stat.insn_emulation_fail;
6180         trace_kvm_emulate_insn_failed(vcpu);
6181
6182         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6183                 return EMULATE_FAIL;
6184
6185         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6186                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6187                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6188                 vcpu->run->internal.ndata = 0;
6189                 r = EMULATE_USER_EXIT;
6190         }
6191
6192         kvm_queue_exception(vcpu, UD_VECTOR);
6193
6194         return r;
6195 }
6196
6197 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6198                                   bool write_fault_to_shadow_pgtable,
6199                                   int emulation_type)
6200 {
6201         gpa_t gpa = cr2;
6202         kvm_pfn_t pfn;
6203
6204         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6205                 return false;
6206
6207         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6208                 return false;
6209
6210         if (!vcpu->arch.mmu->direct_map) {
6211                 /*
6212                  * Write permission should be allowed since only
6213                  * write access need to be emulated.
6214                  */
6215                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6216
6217                 /*
6218                  * If the mapping is invalid in guest, let cpu retry
6219                  * it to generate fault.
6220                  */
6221                 if (gpa == UNMAPPED_GVA)
6222                         return true;
6223         }
6224
6225         /*
6226          * Do not retry the unhandleable instruction if it faults on the
6227          * readonly host memory, otherwise it will goto a infinite loop:
6228          * retry instruction -> write #PF -> emulation fail -> retry
6229          * instruction -> ...
6230          */
6231         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6232
6233         /*
6234          * If the instruction failed on the error pfn, it can not be fixed,
6235          * report the error to userspace.
6236          */
6237         if (is_error_noslot_pfn(pfn))
6238                 return false;
6239
6240         kvm_release_pfn_clean(pfn);
6241
6242         /* The instructions are well-emulated on direct mmu. */
6243         if (vcpu->arch.mmu->direct_map) {
6244                 unsigned int indirect_shadow_pages;
6245
6246                 spin_lock(&vcpu->kvm->mmu_lock);
6247                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6248                 spin_unlock(&vcpu->kvm->mmu_lock);
6249
6250                 if (indirect_shadow_pages)
6251                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6252
6253                 return true;
6254         }
6255
6256         /*
6257          * if emulation was due to access to shadowed page table
6258          * and it failed try to unshadow page and re-enter the
6259          * guest to let CPU execute the instruction.
6260          */
6261         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6262
6263         /*
6264          * If the access faults on its page table, it can not
6265          * be fixed by unprotecting shadow page and it should
6266          * be reported to userspace.
6267          */
6268         return !write_fault_to_shadow_pgtable;
6269 }
6270
6271 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6272                               unsigned long cr2,  int emulation_type)
6273 {
6274         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6275         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6276
6277         last_retry_eip = vcpu->arch.last_retry_eip;
6278         last_retry_addr = vcpu->arch.last_retry_addr;
6279
6280         /*
6281          * If the emulation is caused by #PF and it is non-page_table
6282          * writing instruction, it means the VM-EXIT is caused by shadow
6283          * page protected, we can zap the shadow page and retry this
6284          * instruction directly.
6285          *
6286          * Note: if the guest uses a non-page-table modifying instruction
6287          * on the PDE that points to the instruction, then we will unmap
6288          * the instruction and go to an infinite loop. So, we cache the
6289          * last retried eip and the last fault address, if we meet the eip
6290          * and the address again, we can break out of the potential infinite
6291          * loop.
6292          */
6293         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6294
6295         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6296                 return false;
6297
6298         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6299                 return false;
6300
6301         if (x86_page_table_writing_insn(ctxt))
6302                 return false;
6303
6304         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6305                 return false;
6306
6307         vcpu->arch.last_retry_eip = ctxt->eip;
6308         vcpu->arch.last_retry_addr = cr2;
6309
6310         if (!vcpu->arch.mmu->direct_map)
6311                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6312
6313         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6314
6315         return true;
6316 }
6317
6318 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6319 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6320
6321 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6322 {
6323         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6324                 /* This is a good place to trace that we are exiting SMM.  */
6325                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6326
6327                 /* Process a latched INIT or SMI, if any.  */
6328                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6329         }
6330
6331         kvm_mmu_reset_context(vcpu);
6332 }
6333
6334 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6335                                 unsigned long *db)
6336 {
6337         u32 dr6 = 0;
6338         int i;
6339         u32 enable, rwlen;
6340
6341         enable = dr7;
6342         rwlen = dr7 >> 16;
6343         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6344                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6345                         dr6 |= (1 << i);
6346         return dr6;
6347 }
6348
6349 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6350 {
6351         struct kvm_run *kvm_run = vcpu->run;
6352
6353         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6354                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6355                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6356                 kvm_run->debug.arch.exception = DB_VECTOR;
6357                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6358                 *r = EMULATE_USER_EXIT;
6359         } else {
6360                 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6361         }
6362 }
6363
6364 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6365 {
6366         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6367         int r = EMULATE_DONE;
6368
6369         kvm_x86_ops->skip_emulated_instruction(vcpu);
6370
6371         /*
6372          * rflags is the old, "raw" value of the flags.  The new value has
6373          * not been saved yet.
6374          *
6375          * This is correct even for TF set by the guest, because "the
6376          * processor will not generate this exception after the instruction
6377          * that sets the TF flag".
6378          */
6379         if (unlikely(rflags & X86_EFLAGS_TF))
6380                 kvm_vcpu_do_singlestep(vcpu, &r);
6381         return r == EMULATE_DONE;
6382 }
6383 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6384
6385 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6386 {
6387         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6388             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6389                 struct kvm_run *kvm_run = vcpu->run;
6390                 unsigned long eip = kvm_get_linear_rip(vcpu);
6391                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6392                                            vcpu->arch.guest_debug_dr7,
6393                                            vcpu->arch.eff_db);
6394
6395                 if (dr6 != 0) {
6396                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6397                         kvm_run->debug.arch.pc = eip;
6398                         kvm_run->debug.arch.exception = DB_VECTOR;
6399                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6400                         *r = EMULATE_USER_EXIT;
6401                         return true;
6402                 }
6403         }
6404
6405         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6406             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6407                 unsigned long eip = kvm_get_linear_rip(vcpu);
6408                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6409                                            vcpu->arch.dr7,
6410                                            vcpu->arch.db);
6411
6412                 if (dr6 != 0) {
6413                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6414                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6415                         kvm_queue_exception(vcpu, DB_VECTOR);
6416                         *r = EMULATE_DONE;
6417                         return true;
6418                 }
6419         }
6420
6421         return false;
6422 }
6423
6424 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6425 {
6426         switch (ctxt->opcode_len) {
6427         case 1:
6428                 switch (ctxt->b) {
6429                 case 0xe4:      /* IN */
6430                 case 0xe5:
6431                 case 0xec:
6432                 case 0xed:
6433                 case 0xe6:      /* OUT */
6434                 case 0xe7:
6435                 case 0xee:
6436                 case 0xef:
6437                 case 0x6c:      /* INS */
6438                 case 0x6d:
6439                 case 0x6e:      /* OUTS */
6440                 case 0x6f:
6441                         return true;
6442                 }
6443                 break;
6444         case 2:
6445                 switch (ctxt->b) {
6446                 case 0x33:      /* RDPMC */
6447                         return true;
6448                 }
6449                 break;
6450         }
6451
6452         return false;
6453 }
6454
6455 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6456                             unsigned long cr2,
6457                             int emulation_type,
6458                             void *insn,
6459                             int insn_len)
6460 {
6461         int r;
6462         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6463         bool writeback = true;
6464         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6465
6466         vcpu->arch.l1tf_flush_l1d = true;
6467
6468         /*
6469          * Clear write_fault_to_shadow_pgtable here to ensure it is
6470          * never reused.
6471          */
6472         vcpu->arch.write_fault_to_shadow_pgtable = false;
6473         kvm_clear_exception_queue(vcpu);
6474
6475         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6476                 init_emulate_ctxt(vcpu);
6477
6478                 /*
6479                  * We will reenter on the same instruction since
6480                  * we do not set complete_userspace_io.  This does not
6481                  * handle watchpoints yet, those would be handled in
6482                  * the emulate_ops.
6483                  */
6484                 if (!(emulation_type & EMULTYPE_SKIP) &&
6485                     kvm_vcpu_check_breakpoint(vcpu, &r))
6486                         return r;
6487
6488                 ctxt->interruptibility = 0;
6489                 ctxt->have_exception = false;
6490                 ctxt->exception.vector = -1;
6491                 ctxt->perm_ok = false;
6492
6493                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6494
6495                 r = x86_decode_insn(ctxt, insn, insn_len);
6496
6497                 trace_kvm_emulate_insn_start(vcpu);
6498                 ++vcpu->stat.insn_emulation;
6499                 if (r != EMULATION_OK)  {
6500                         if (emulation_type & EMULTYPE_TRAP_UD)
6501                                 return EMULATE_FAIL;
6502                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6503                                                 emulation_type))
6504                                 return EMULATE_DONE;
6505                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6506                                 return EMULATE_DONE;
6507                         if (emulation_type & EMULTYPE_SKIP)
6508                                 return EMULATE_FAIL;
6509                         return handle_emulation_failure(vcpu, emulation_type);
6510                 }
6511         }
6512
6513         if ((emulation_type & EMULTYPE_VMWARE) &&
6514             !is_vmware_backdoor_opcode(ctxt))
6515                 return EMULATE_FAIL;
6516
6517         if (emulation_type & EMULTYPE_SKIP) {
6518                 kvm_rip_write(vcpu, ctxt->_eip);
6519                 if (ctxt->eflags & X86_EFLAGS_RF)
6520                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6521                 return EMULATE_DONE;
6522         }
6523
6524         if (retry_instruction(ctxt, cr2, emulation_type))
6525                 return EMULATE_DONE;
6526
6527         /* this is needed for vmware backdoor interface to work since it
6528            changes registers values  during IO operation */
6529         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6530                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6531                 emulator_invalidate_register_cache(ctxt);
6532         }
6533
6534 restart:
6535         /* Save the faulting GPA (cr2) in the address field */
6536         ctxt->exception.address = cr2;
6537
6538         r = x86_emulate_insn(ctxt);
6539
6540         if (r == EMULATION_INTERCEPTED)
6541                 return EMULATE_DONE;
6542
6543         if (r == EMULATION_FAILED) {
6544                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6545                                         emulation_type))
6546                         return EMULATE_DONE;
6547
6548                 return handle_emulation_failure(vcpu, emulation_type);
6549         }
6550
6551         if (ctxt->have_exception) {
6552                 r = EMULATE_DONE;
6553                 if (inject_emulated_exception(vcpu))
6554                         return r;
6555         } else if (vcpu->arch.pio.count) {
6556                 if (!vcpu->arch.pio.in) {
6557                         /* FIXME: return into emulator if single-stepping.  */
6558                         vcpu->arch.pio.count = 0;
6559                 } else {
6560                         writeback = false;
6561                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6562                 }
6563                 r = EMULATE_USER_EXIT;
6564         } else if (vcpu->mmio_needed) {
6565                 if (!vcpu->mmio_is_write)
6566                         writeback = false;
6567                 r = EMULATE_USER_EXIT;
6568                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6569         } else if (r == EMULATION_RESTART)
6570                 goto restart;
6571         else
6572                 r = EMULATE_DONE;
6573
6574         if (writeback) {
6575                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6576                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6577                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6578                 kvm_rip_write(vcpu, ctxt->eip);
6579                 if (r == EMULATE_DONE && ctxt->tf)
6580                         kvm_vcpu_do_singlestep(vcpu, &r);
6581                 if (!ctxt->have_exception ||
6582                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6583                         __kvm_set_rflags(vcpu, ctxt->eflags);
6584
6585                 /*
6586                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6587                  * do nothing, and it will be requested again as soon as
6588                  * the shadow expires.  But we still need to check here,
6589                  * because POPF has no interrupt shadow.
6590                  */
6591                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6592                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6593         } else
6594                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6595
6596         return r;
6597 }
6598
6599 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6600 {
6601         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6602 }
6603 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6604
6605 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6606                                         void *insn, int insn_len)
6607 {
6608         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6609 }
6610 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6611
6612 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6613 {
6614         vcpu->arch.pio.count = 0;
6615         return 1;
6616 }
6617
6618 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6619 {
6620         vcpu->arch.pio.count = 0;
6621
6622         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6623                 return 1;
6624
6625         return kvm_skip_emulated_instruction(vcpu);
6626 }
6627
6628 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6629                             unsigned short port)
6630 {
6631         unsigned long val = kvm_rax_read(vcpu);
6632         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6633                                             size, port, &val, 1);
6634         if (ret)
6635                 return ret;
6636
6637         /*
6638          * Workaround userspace that relies on old KVM behavior of %rip being
6639          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6640          */
6641         if (port == 0x7e &&
6642             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6643                 vcpu->arch.complete_userspace_io =
6644                         complete_fast_pio_out_port_0x7e;
6645                 kvm_skip_emulated_instruction(vcpu);
6646         } else {
6647                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6648                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6649         }
6650         return 0;
6651 }
6652
6653 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6654 {
6655         unsigned long val;
6656
6657         /* We should only ever be called with arch.pio.count equal to 1 */
6658         BUG_ON(vcpu->arch.pio.count != 1);
6659
6660         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6661                 vcpu->arch.pio.count = 0;
6662                 return 1;
6663         }
6664
6665         /* For size less than 4 we merge, else we zero extend */
6666         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6667
6668         /*
6669          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6670          * the copy and tracing
6671          */
6672         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6673                                  vcpu->arch.pio.port, &val, 1);
6674         kvm_rax_write(vcpu, val);
6675
6676         return kvm_skip_emulated_instruction(vcpu);
6677 }
6678
6679 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6680                            unsigned short port)
6681 {
6682         unsigned long val;
6683         int ret;
6684
6685         /* For size less than 4 we merge, else we zero extend */
6686         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6687
6688         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6689                                        &val, 1);
6690         if (ret) {
6691                 kvm_rax_write(vcpu, val);
6692                 return ret;
6693         }
6694
6695         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6696         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6697
6698         return 0;
6699 }
6700
6701 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6702 {
6703         int ret;
6704
6705         if (in)
6706                 ret = kvm_fast_pio_in(vcpu, size, port);
6707         else
6708                 ret = kvm_fast_pio_out(vcpu, size, port);
6709         return ret && kvm_skip_emulated_instruction(vcpu);
6710 }
6711 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6712
6713 static int kvmclock_cpu_down_prep(unsigned int cpu)
6714 {
6715         __this_cpu_write(cpu_tsc_khz, 0);
6716         return 0;
6717 }
6718
6719 static void tsc_khz_changed(void *data)
6720 {
6721         struct cpufreq_freqs *freq = data;
6722         unsigned long khz = 0;
6723
6724         if (data)
6725                 khz = freq->new;
6726         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6727                 khz = cpufreq_quick_get(raw_smp_processor_id());
6728         if (!khz)
6729                 khz = tsc_khz;
6730         __this_cpu_write(cpu_tsc_khz, khz);
6731 }
6732
6733 #ifdef CONFIG_X86_64
6734 static void kvm_hyperv_tsc_notifier(void)
6735 {
6736         struct kvm *kvm;
6737         struct kvm_vcpu *vcpu;
6738         int cpu;
6739
6740         mutex_lock(&kvm_lock);
6741         list_for_each_entry(kvm, &vm_list, vm_list)
6742                 kvm_make_mclock_inprogress_request(kvm);
6743
6744         hyperv_stop_tsc_emulation();
6745
6746         /* TSC frequency always matches when on Hyper-V */
6747         for_each_present_cpu(cpu)
6748                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6749         kvm_max_guest_tsc_khz = tsc_khz;
6750
6751         list_for_each_entry(kvm, &vm_list, vm_list) {
6752                 struct kvm_arch *ka = &kvm->arch;
6753
6754                 spin_lock(&ka->pvclock_gtod_sync_lock);
6755
6756                 pvclock_update_vm_gtod_copy(kvm);
6757
6758                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6759                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6760
6761                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6762                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6763
6764                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6765         }
6766         mutex_unlock(&kvm_lock);
6767 }
6768 #endif
6769
6770 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6771 {
6772         struct kvm *kvm;
6773         struct kvm_vcpu *vcpu;
6774         int i, send_ipi = 0;
6775
6776         /*
6777          * We allow guests to temporarily run on slowing clocks,
6778          * provided we notify them after, or to run on accelerating
6779          * clocks, provided we notify them before.  Thus time never
6780          * goes backwards.
6781          *
6782          * However, we have a problem.  We can't atomically update
6783          * the frequency of a given CPU from this function; it is
6784          * merely a notifier, which can be called from any CPU.
6785          * Changing the TSC frequency at arbitrary points in time
6786          * requires a recomputation of local variables related to
6787          * the TSC for each VCPU.  We must flag these local variables
6788          * to be updated and be sure the update takes place with the
6789          * new frequency before any guests proceed.
6790          *
6791          * Unfortunately, the combination of hotplug CPU and frequency
6792          * change creates an intractable locking scenario; the order
6793          * of when these callouts happen is undefined with respect to
6794          * CPU hotplug, and they can race with each other.  As such,
6795          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6796          * undefined; you can actually have a CPU frequency change take
6797          * place in between the computation of X and the setting of the
6798          * variable.  To protect against this problem, all updates of
6799          * the per_cpu tsc_khz variable are done in an interrupt
6800          * protected IPI, and all callers wishing to update the value
6801          * must wait for a synchronous IPI to complete (which is trivial
6802          * if the caller is on the CPU already).  This establishes the
6803          * necessary total order on variable updates.
6804          *
6805          * Note that because a guest time update may take place
6806          * anytime after the setting of the VCPU's request bit, the
6807          * correct TSC value must be set before the request.  However,
6808          * to ensure the update actually makes it to any guest which
6809          * starts running in hardware virtualization between the set
6810          * and the acquisition of the spinlock, we must also ping the
6811          * CPU after setting the request bit.
6812          *
6813          */
6814
6815         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6816
6817         mutex_lock(&kvm_lock);
6818         list_for_each_entry(kvm, &vm_list, vm_list) {
6819                 kvm_for_each_vcpu(i, vcpu, kvm) {
6820                         if (vcpu->cpu != cpu)
6821                                 continue;
6822                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6823                         if (vcpu->cpu != raw_smp_processor_id())
6824                                 send_ipi = 1;
6825                 }
6826         }
6827         mutex_unlock(&kvm_lock);
6828
6829         if (freq->old < freq->new && send_ipi) {
6830                 /*
6831                  * We upscale the frequency.  Must make the guest
6832                  * doesn't see old kvmclock values while running with
6833                  * the new frequency, otherwise we risk the guest sees
6834                  * time go backwards.
6835                  *
6836                  * In case we update the frequency for another cpu
6837                  * (which might be in guest context) send an interrupt
6838                  * to kick the cpu out of guest context.  Next time
6839                  * guest context is entered kvmclock will be updated,
6840                  * so the guest will not see stale values.
6841                  */
6842                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6843         }
6844 }
6845
6846 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6847                                      void *data)
6848 {
6849         struct cpufreq_freqs *freq = data;
6850         int cpu;
6851
6852         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6853                 return 0;
6854         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6855                 return 0;
6856
6857         for_each_cpu(cpu, freq->policy->cpus)
6858                 __kvmclock_cpufreq_notifier(freq, cpu);
6859
6860         return 0;
6861 }
6862
6863 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6864         .notifier_call  = kvmclock_cpufreq_notifier
6865 };
6866
6867 static int kvmclock_cpu_online(unsigned int cpu)
6868 {
6869         tsc_khz_changed(NULL);
6870         return 0;
6871 }
6872
6873 static void kvm_timer_init(void)
6874 {
6875         max_tsc_khz = tsc_khz;
6876
6877         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6878 #ifdef CONFIG_CPU_FREQ
6879                 struct cpufreq_policy policy;
6880                 int cpu;
6881
6882                 memset(&policy, 0, sizeof(policy));
6883                 cpu = get_cpu();
6884                 cpufreq_get_policy(&policy, cpu);
6885                 if (policy.cpuinfo.max_freq)
6886                         max_tsc_khz = policy.cpuinfo.max_freq;
6887                 put_cpu();
6888 #endif
6889                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6890                                           CPUFREQ_TRANSITION_NOTIFIER);
6891         }
6892         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6893
6894         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6895                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6896 }
6897
6898 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6899 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6900
6901 int kvm_is_in_guest(void)
6902 {
6903         return __this_cpu_read(current_vcpu) != NULL;
6904 }
6905
6906 static int kvm_is_user_mode(void)
6907 {
6908         int user_mode = 3;
6909
6910         if (__this_cpu_read(current_vcpu))
6911                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6912
6913         return user_mode != 0;
6914 }
6915
6916 static unsigned long kvm_get_guest_ip(void)
6917 {
6918         unsigned long ip = 0;
6919
6920         if (__this_cpu_read(current_vcpu))
6921                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6922
6923         return ip;
6924 }
6925
6926 static void kvm_handle_intel_pt_intr(void)
6927 {
6928         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
6929
6930         kvm_make_request(KVM_REQ_PMI, vcpu);
6931         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
6932                         (unsigned long *)&vcpu->arch.pmu.global_status);
6933 }
6934
6935 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6936         .is_in_guest            = kvm_is_in_guest,
6937         .is_user_mode           = kvm_is_user_mode,
6938         .get_guest_ip           = kvm_get_guest_ip,
6939         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
6940 };
6941
6942 #ifdef CONFIG_X86_64
6943 static void pvclock_gtod_update_fn(struct work_struct *work)
6944 {
6945         struct kvm *kvm;
6946
6947         struct kvm_vcpu *vcpu;
6948         int i;
6949
6950         mutex_lock(&kvm_lock);
6951         list_for_each_entry(kvm, &vm_list, vm_list)
6952                 kvm_for_each_vcpu(i, vcpu, kvm)
6953                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6954         atomic_set(&kvm_guest_has_master_clock, 0);
6955         mutex_unlock(&kvm_lock);
6956 }
6957
6958 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6959
6960 /*
6961  * Notification about pvclock gtod data update.
6962  */
6963 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6964                                void *priv)
6965 {
6966         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6967         struct timekeeper *tk = priv;
6968
6969         update_pvclock_gtod(tk);
6970
6971         /* disable master clock if host does not trust, or does not
6972          * use, TSC based clocksource.
6973          */
6974         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6975             atomic_read(&kvm_guest_has_master_clock) != 0)
6976                 queue_work(system_long_wq, &pvclock_gtod_work);
6977
6978         return 0;
6979 }
6980
6981 static struct notifier_block pvclock_gtod_notifier = {
6982         .notifier_call = pvclock_gtod_notify,
6983 };
6984 #endif
6985
6986 int kvm_arch_init(void *opaque)
6987 {
6988         int r;
6989         struct kvm_x86_ops *ops = opaque;
6990
6991         if (kvm_x86_ops) {
6992                 printk(KERN_ERR "kvm: already loaded the other module\n");
6993                 r = -EEXIST;
6994                 goto out;
6995         }
6996
6997         if (!ops->cpu_has_kvm_support()) {
6998                 printk(KERN_ERR "kvm: no hardware support\n");
6999                 r = -EOPNOTSUPP;
7000                 goto out;
7001         }
7002         if (ops->disabled_by_bios()) {
7003                 printk(KERN_ERR "kvm: disabled by bios\n");
7004                 r = -EOPNOTSUPP;
7005                 goto out;
7006         }
7007
7008         /*
7009          * KVM explicitly assumes that the guest has an FPU and
7010          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7011          * vCPU's FPU state as a fxregs_state struct.
7012          */
7013         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7014                 printk(KERN_ERR "kvm: inadequate fpu\n");
7015                 r = -EOPNOTSUPP;
7016                 goto out;
7017         }
7018
7019         r = -ENOMEM;
7020         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7021                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7022                                           NULL);
7023         if (!x86_fpu_cache) {
7024                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7025                 goto out;
7026         }
7027
7028         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7029         if (!shared_msrs) {
7030                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7031                 goto out_free_x86_fpu_cache;
7032         }
7033
7034         r = kvm_mmu_module_init();
7035         if (r)
7036                 goto out_free_percpu;
7037
7038         kvm_x86_ops = ops;
7039
7040         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7041                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7042                         PT_PRESENT_MASK, 0, sme_me_mask);
7043         kvm_timer_init();
7044
7045         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7046
7047         if (boot_cpu_has(X86_FEATURE_XSAVE))
7048                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7049
7050         kvm_lapic_init();
7051 #ifdef CONFIG_X86_64
7052         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7053
7054         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7055                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7056 #endif
7057
7058         return 0;
7059
7060 out_free_percpu:
7061         free_percpu(shared_msrs);
7062 out_free_x86_fpu_cache:
7063         kmem_cache_destroy(x86_fpu_cache);
7064 out:
7065         return r;
7066 }
7067
7068 void kvm_arch_exit(void)
7069 {
7070 #ifdef CONFIG_X86_64
7071         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7072                 clear_hv_tscchange_cb();
7073 #endif
7074         kvm_lapic_exit();
7075         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7076
7077         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7078                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7079                                             CPUFREQ_TRANSITION_NOTIFIER);
7080         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7081 #ifdef CONFIG_X86_64
7082         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7083 #endif
7084         kvm_x86_ops = NULL;
7085         kvm_mmu_module_exit();
7086         free_percpu(shared_msrs);
7087         kmem_cache_destroy(x86_fpu_cache);
7088 }
7089
7090 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7091 {
7092         ++vcpu->stat.halt_exits;
7093         if (lapic_in_kernel(vcpu)) {
7094                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7095                 return 1;
7096         } else {
7097                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7098                 return 0;
7099         }
7100 }
7101 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7102
7103 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7104 {
7105         int ret = kvm_skip_emulated_instruction(vcpu);
7106         /*
7107          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7108          * KVM_EXIT_DEBUG here.
7109          */
7110         return kvm_vcpu_halt(vcpu) && ret;
7111 }
7112 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7113
7114 #ifdef CONFIG_X86_64
7115 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7116                                 unsigned long clock_type)
7117 {
7118         struct kvm_clock_pairing clock_pairing;
7119         struct timespec64 ts;
7120         u64 cycle;
7121         int ret;
7122
7123         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7124                 return -KVM_EOPNOTSUPP;
7125
7126         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7127                 return -KVM_EOPNOTSUPP;
7128
7129         clock_pairing.sec = ts.tv_sec;
7130         clock_pairing.nsec = ts.tv_nsec;
7131         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7132         clock_pairing.flags = 0;
7133         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7134
7135         ret = 0;
7136         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7137                             sizeof(struct kvm_clock_pairing)))
7138                 ret = -KVM_EFAULT;
7139
7140         return ret;
7141 }
7142 #endif
7143
7144 /*
7145  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7146  *
7147  * @apicid - apicid of vcpu to be kicked.
7148  */
7149 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7150 {
7151         struct kvm_lapic_irq lapic_irq;
7152
7153         lapic_irq.shorthand = 0;
7154         lapic_irq.dest_mode = 0;
7155         lapic_irq.level = 0;
7156         lapic_irq.dest_id = apicid;
7157         lapic_irq.msi_redir_hint = false;
7158
7159         lapic_irq.delivery_mode = APIC_DM_REMRD;
7160         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7161 }
7162
7163 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7164 {
7165         if (!lapic_in_kernel(vcpu)) {
7166                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7167                 return;
7168         }
7169         if (!vcpu->arch.apicv_active)
7170                 return;
7171
7172         vcpu->arch.apicv_active = false;
7173         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7174 }
7175
7176 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7177 {
7178         unsigned long nr, a0, a1, a2, a3, ret;
7179         int op_64_bit;
7180
7181         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7182                 return kvm_hv_hypercall(vcpu);
7183
7184         nr = kvm_rax_read(vcpu);
7185         a0 = kvm_rbx_read(vcpu);
7186         a1 = kvm_rcx_read(vcpu);
7187         a2 = kvm_rdx_read(vcpu);
7188         a3 = kvm_rsi_read(vcpu);
7189
7190         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7191
7192         op_64_bit = is_64_bit_mode(vcpu);
7193         if (!op_64_bit) {
7194                 nr &= 0xFFFFFFFF;
7195                 a0 &= 0xFFFFFFFF;
7196                 a1 &= 0xFFFFFFFF;
7197                 a2 &= 0xFFFFFFFF;
7198                 a3 &= 0xFFFFFFFF;
7199         }
7200
7201         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7202                 ret = -KVM_EPERM;
7203                 goto out;
7204         }
7205
7206         switch (nr) {
7207         case KVM_HC_VAPIC_POLL_IRQ:
7208                 ret = 0;
7209                 break;
7210         case KVM_HC_KICK_CPU:
7211                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7212                 ret = 0;
7213                 break;
7214 #ifdef CONFIG_X86_64
7215         case KVM_HC_CLOCK_PAIRING:
7216                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7217                 break;
7218 #endif
7219         case KVM_HC_SEND_IPI:
7220                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7221                 break;
7222         default:
7223                 ret = -KVM_ENOSYS;
7224                 break;
7225         }
7226 out:
7227         if (!op_64_bit)
7228                 ret = (u32)ret;
7229         kvm_rax_write(vcpu, ret);
7230
7231         ++vcpu->stat.hypercalls;
7232         return kvm_skip_emulated_instruction(vcpu);
7233 }
7234 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7235
7236 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7237 {
7238         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7239         char instruction[3];
7240         unsigned long rip = kvm_rip_read(vcpu);
7241
7242         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7243
7244         return emulator_write_emulated(ctxt, rip, instruction, 3,
7245                 &ctxt->exception);
7246 }
7247
7248 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7249 {
7250         return vcpu->run->request_interrupt_window &&
7251                 likely(!pic_in_kernel(vcpu->kvm));
7252 }
7253
7254 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7255 {
7256         struct kvm_run *kvm_run = vcpu->run;
7257
7258         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7259         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7260         kvm_run->cr8 = kvm_get_cr8(vcpu);
7261         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7262         kvm_run->ready_for_interrupt_injection =
7263                 pic_in_kernel(vcpu->kvm) ||
7264                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7265 }
7266
7267 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7268 {
7269         int max_irr, tpr;
7270
7271         if (!kvm_x86_ops->update_cr8_intercept)
7272                 return;
7273
7274         if (!lapic_in_kernel(vcpu))
7275                 return;
7276
7277         if (vcpu->arch.apicv_active)
7278                 return;
7279
7280         if (!vcpu->arch.apic->vapic_addr)
7281                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7282         else
7283                 max_irr = -1;
7284
7285         if (max_irr != -1)
7286                 max_irr >>= 4;
7287
7288         tpr = kvm_lapic_get_cr8(vcpu);
7289
7290         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7291 }
7292
7293 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7294 {
7295         int r;
7296
7297         /* try to reinject previous events if any */
7298
7299         if (vcpu->arch.exception.injected)
7300                 kvm_x86_ops->queue_exception(vcpu);
7301         /*
7302          * Do not inject an NMI or interrupt if there is a pending
7303          * exception.  Exceptions and interrupts are recognized at
7304          * instruction boundaries, i.e. the start of an instruction.
7305          * Trap-like exceptions, e.g. #DB, have higher priority than
7306          * NMIs and interrupts, i.e. traps are recognized before an
7307          * NMI/interrupt that's pending on the same instruction.
7308          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7309          * priority, but are only generated (pended) during instruction
7310          * execution, i.e. a pending fault-like exception means the
7311          * fault occurred on the *previous* instruction and must be
7312          * serviced prior to recognizing any new events in order to
7313          * fully complete the previous instruction.
7314          */
7315         else if (!vcpu->arch.exception.pending) {
7316                 if (vcpu->arch.nmi_injected)
7317                         kvm_x86_ops->set_nmi(vcpu);
7318                 else if (vcpu->arch.interrupt.injected)
7319                         kvm_x86_ops->set_irq(vcpu);
7320         }
7321
7322         /*
7323          * Call check_nested_events() even if we reinjected a previous event
7324          * in order for caller to determine if it should require immediate-exit
7325          * from L2 to L1 due to pending L1 events which require exit
7326          * from L2 to L1.
7327          */
7328         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7329                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7330                 if (r != 0)
7331                         return r;
7332         }
7333
7334         /* try to inject new event if pending */
7335         if (vcpu->arch.exception.pending) {
7336                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7337                                         vcpu->arch.exception.has_error_code,
7338                                         vcpu->arch.exception.error_code);
7339
7340                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7341                 vcpu->arch.exception.pending = false;
7342                 vcpu->arch.exception.injected = true;
7343
7344                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7345                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7346                                              X86_EFLAGS_RF);
7347
7348                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7349                         /*
7350                          * This code assumes that nSVM doesn't use
7351                          * check_nested_events(). If it does, the
7352                          * DR6/DR7 changes should happen before L1
7353                          * gets a #VMEXIT for an intercepted #DB in
7354                          * L2.  (Under VMX, on the other hand, the
7355                          * DR6/DR7 changes should not happen in the
7356                          * event of a VM-exit to L1 for an intercepted
7357                          * #DB in L2.)
7358                          */
7359                         kvm_deliver_exception_payload(vcpu);
7360                         if (vcpu->arch.dr7 & DR7_GD) {
7361                                 vcpu->arch.dr7 &= ~DR7_GD;
7362                                 kvm_update_dr7(vcpu);
7363                         }
7364                 }
7365
7366                 kvm_x86_ops->queue_exception(vcpu);
7367         }
7368
7369         /* Don't consider new event if we re-injected an event */
7370         if (kvm_event_needs_reinjection(vcpu))
7371                 return 0;
7372
7373         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7374             kvm_x86_ops->smi_allowed(vcpu)) {
7375                 vcpu->arch.smi_pending = false;
7376                 ++vcpu->arch.smi_count;
7377                 enter_smm(vcpu);
7378         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7379                 --vcpu->arch.nmi_pending;
7380                 vcpu->arch.nmi_injected = true;
7381                 kvm_x86_ops->set_nmi(vcpu);
7382         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7383                 /*
7384                  * Because interrupts can be injected asynchronously, we are
7385                  * calling check_nested_events again here to avoid a race condition.
7386                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7387                  * proposal and current concerns.  Perhaps we should be setting
7388                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7389                  */
7390                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7391                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7392                         if (r != 0)
7393                                 return r;
7394                 }
7395                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7396                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7397                                             false);
7398                         kvm_x86_ops->set_irq(vcpu);
7399                 }
7400         }
7401
7402         return 0;
7403 }
7404
7405 static void process_nmi(struct kvm_vcpu *vcpu)
7406 {
7407         unsigned limit = 2;
7408
7409         /*
7410          * x86 is limited to one NMI running, and one NMI pending after it.
7411          * If an NMI is already in progress, limit further NMIs to just one.
7412          * Otherwise, allow two (and we'll inject the first one immediately).
7413          */
7414         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7415                 limit = 1;
7416
7417         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7418         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7419         kvm_make_request(KVM_REQ_EVENT, vcpu);
7420 }
7421
7422 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7423 {
7424         u32 flags = 0;
7425         flags |= seg->g       << 23;
7426         flags |= seg->db      << 22;
7427         flags |= seg->l       << 21;
7428         flags |= seg->avl     << 20;
7429         flags |= seg->present << 15;
7430         flags |= seg->dpl     << 13;
7431         flags |= seg->s       << 12;
7432         flags |= seg->type    << 8;
7433         return flags;
7434 }
7435
7436 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7437 {
7438         struct kvm_segment seg;
7439         int offset;
7440
7441         kvm_get_segment(vcpu, &seg, n);
7442         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7443
7444         if (n < 3)
7445                 offset = 0x7f84 + n * 12;
7446         else
7447                 offset = 0x7f2c + (n - 3) * 12;
7448
7449         put_smstate(u32, buf, offset + 8, seg.base);
7450         put_smstate(u32, buf, offset + 4, seg.limit);
7451         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7452 }
7453
7454 #ifdef CONFIG_X86_64
7455 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7456 {
7457         struct kvm_segment seg;
7458         int offset;
7459         u16 flags;
7460
7461         kvm_get_segment(vcpu, &seg, n);
7462         offset = 0x7e00 + n * 16;
7463
7464         flags = enter_smm_get_segment_flags(&seg) >> 8;
7465         put_smstate(u16, buf, offset, seg.selector);
7466         put_smstate(u16, buf, offset + 2, flags);
7467         put_smstate(u32, buf, offset + 4, seg.limit);
7468         put_smstate(u64, buf, offset + 8, seg.base);
7469 }
7470 #endif
7471
7472 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7473 {
7474         struct desc_ptr dt;
7475         struct kvm_segment seg;
7476         unsigned long val;
7477         int i;
7478
7479         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7480         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7481         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7482         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7483
7484         for (i = 0; i < 8; i++)
7485                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7486
7487         kvm_get_dr(vcpu, 6, &val);
7488         put_smstate(u32, buf, 0x7fcc, (u32)val);
7489         kvm_get_dr(vcpu, 7, &val);
7490         put_smstate(u32, buf, 0x7fc8, (u32)val);
7491
7492         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7493         put_smstate(u32, buf, 0x7fc4, seg.selector);
7494         put_smstate(u32, buf, 0x7f64, seg.base);
7495         put_smstate(u32, buf, 0x7f60, seg.limit);
7496         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7497
7498         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7499         put_smstate(u32, buf, 0x7fc0, seg.selector);
7500         put_smstate(u32, buf, 0x7f80, seg.base);
7501         put_smstate(u32, buf, 0x7f7c, seg.limit);
7502         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7503
7504         kvm_x86_ops->get_gdt(vcpu, &dt);
7505         put_smstate(u32, buf, 0x7f74, dt.address);
7506         put_smstate(u32, buf, 0x7f70, dt.size);
7507
7508         kvm_x86_ops->get_idt(vcpu, &dt);
7509         put_smstate(u32, buf, 0x7f58, dt.address);
7510         put_smstate(u32, buf, 0x7f54, dt.size);
7511
7512         for (i = 0; i < 6; i++)
7513                 enter_smm_save_seg_32(vcpu, buf, i);
7514
7515         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7516
7517         /* revision id */
7518         put_smstate(u32, buf, 0x7efc, 0x00020000);
7519         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7520 }
7521
7522 #ifdef CONFIG_X86_64
7523 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7524 {
7525         struct desc_ptr dt;
7526         struct kvm_segment seg;
7527         unsigned long val;
7528         int i;
7529
7530         for (i = 0; i < 16; i++)
7531                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7532
7533         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7534         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7535
7536         kvm_get_dr(vcpu, 6, &val);
7537         put_smstate(u64, buf, 0x7f68, val);
7538         kvm_get_dr(vcpu, 7, &val);
7539         put_smstate(u64, buf, 0x7f60, val);
7540
7541         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7542         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7543         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7544
7545         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7546
7547         /* revision id */
7548         put_smstate(u32, buf, 0x7efc, 0x00020064);
7549
7550         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7551
7552         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7553         put_smstate(u16, buf, 0x7e90, seg.selector);
7554         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7555         put_smstate(u32, buf, 0x7e94, seg.limit);
7556         put_smstate(u64, buf, 0x7e98, seg.base);
7557
7558         kvm_x86_ops->get_idt(vcpu, &dt);
7559         put_smstate(u32, buf, 0x7e84, dt.size);
7560         put_smstate(u64, buf, 0x7e88, dt.address);
7561
7562         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7563         put_smstate(u16, buf, 0x7e70, seg.selector);
7564         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7565         put_smstate(u32, buf, 0x7e74, seg.limit);
7566         put_smstate(u64, buf, 0x7e78, seg.base);
7567
7568         kvm_x86_ops->get_gdt(vcpu, &dt);
7569         put_smstate(u32, buf, 0x7e64, dt.size);
7570         put_smstate(u64, buf, 0x7e68, dt.address);
7571
7572         for (i = 0; i < 6; i++)
7573                 enter_smm_save_seg_64(vcpu, buf, i);
7574 }
7575 #endif
7576
7577 static void enter_smm(struct kvm_vcpu *vcpu)
7578 {
7579         struct kvm_segment cs, ds;
7580         struct desc_ptr dt;
7581         char buf[512];
7582         u32 cr0;
7583
7584         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7585         memset(buf, 0, 512);
7586 #ifdef CONFIG_X86_64
7587         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7588                 enter_smm_save_state_64(vcpu, buf);
7589         else
7590 #endif
7591                 enter_smm_save_state_32(vcpu, buf);
7592
7593         /*
7594          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7595          * vCPU state (e.g. leave guest mode) after we've saved the state into
7596          * the SMM state-save area.
7597          */
7598         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7599
7600         vcpu->arch.hflags |= HF_SMM_MASK;
7601         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7602
7603         if (kvm_x86_ops->get_nmi_mask(vcpu))
7604                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7605         else
7606                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7607
7608         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7609         kvm_rip_write(vcpu, 0x8000);
7610
7611         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7612         kvm_x86_ops->set_cr0(vcpu, cr0);
7613         vcpu->arch.cr0 = cr0;
7614
7615         kvm_x86_ops->set_cr4(vcpu, 0);
7616
7617         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7618         dt.address = dt.size = 0;
7619         kvm_x86_ops->set_idt(vcpu, &dt);
7620
7621         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7622
7623         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7624         cs.base = vcpu->arch.smbase;
7625
7626         ds.selector = 0;
7627         ds.base = 0;
7628
7629         cs.limit    = ds.limit = 0xffffffff;
7630         cs.type     = ds.type = 0x3;
7631         cs.dpl      = ds.dpl = 0;
7632         cs.db       = ds.db = 0;
7633         cs.s        = ds.s = 1;
7634         cs.l        = ds.l = 0;
7635         cs.g        = ds.g = 1;
7636         cs.avl      = ds.avl = 0;
7637         cs.present  = ds.present = 1;
7638         cs.unusable = ds.unusable = 0;
7639         cs.padding  = ds.padding = 0;
7640
7641         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7642         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7643         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7644         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7645         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7646         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7647
7648 #ifdef CONFIG_X86_64
7649         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7650                 kvm_x86_ops->set_efer(vcpu, 0);
7651 #endif
7652
7653         kvm_update_cpuid(vcpu);
7654         kvm_mmu_reset_context(vcpu);
7655 }
7656
7657 static void process_smi(struct kvm_vcpu *vcpu)
7658 {
7659         vcpu->arch.smi_pending = true;
7660         kvm_make_request(KVM_REQ_EVENT, vcpu);
7661 }
7662
7663 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7664 {
7665         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7666 }
7667
7668 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7669 {
7670         if (!kvm_apic_present(vcpu))
7671                 return;
7672
7673         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7674
7675         if (irqchip_split(vcpu->kvm))
7676                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7677         else {
7678                 if (vcpu->arch.apicv_active)
7679                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7680                 if (ioapic_in_kernel(vcpu->kvm))
7681                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7682         }
7683
7684         if (is_guest_mode(vcpu))
7685                 vcpu->arch.load_eoi_exitmap_pending = true;
7686         else
7687                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7688 }
7689
7690 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7691 {
7692         u64 eoi_exit_bitmap[4];
7693
7694         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7695                 return;
7696
7697         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7698                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7699         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7700 }
7701
7702 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7703                 unsigned long start, unsigned long end,
7704                 bool blockable)
7705 {
7706         unsigned long apic_address;
7707
7708         /*
7709          * The physical address of apic access page is stored in the VMCS.
7710          * Update it when it becomes invalid.
7711          */
7712         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7713         if (start <= apic_address && apic_address < end)
7714                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7715
7716         return 0;
7717 }
7718
7719 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7720 {
7721         struct page *page = NULL;
7722
7723         if (!lapic_in_kernel(vcpu))
7724                 return;
7725
7726         if (!kvm_x86_ops->set_apic_access_page_addr)
7727                 return;
7728
7729         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7730         if (is_error_page(page))
7731                 return;
7732         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7733
7734         /*
7735          * Do not pin apic access page in memory, the MMU notifier
7736          * will call us again if it is migrated or swapped out.
7737          */
7738         put_page(page);
7739 }
7740 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7741
7742 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7743 {
7744         smp_send_reschedule(vcpu->cpu);
7745 }
7746 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7747
7748 /*
7749  * Returns 1 to let vcpu_run() continue the guest execution loop without
7750  * exiting to the userspace.  Otherwise, the value will be returned to the
7751  * userspace.
7752  */
7753 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7754 {
7755         int r;
7756         bool req_int_win =
7757                 dm_request_for_irq_injection(vcpu) &&
7758                 kvm_cpu_accept_dm_intr(vcpu);
7759
7760         bool req_immediate_exit = false;
7761
7762         if (kvm_request_pending(vcpu)) {
7763                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7764                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7765                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7766                         kvm_mmu_unload(vcpu);
7767                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7768                         __kvm_migrate_timers(vcpu);
7769                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7770                         kvm_gen_update_masterclock(vcpu->kvm);
7771                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7772                         kvm_gen_kvmclock_update(vcpu);
7773                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7774                         r = kvm_guest_time_update(vcpu);
7775                         if (unlikely(r))
7776                                 goto out;
7777                 }
7778                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7779                         kvm_mmu_sync_roots(vcpu);
7780                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7781                         kvm_mmu_load_cr3(vcpu);
7782                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7783                         kvm_vcpu_flush_tlb(vcpu, true);
7784                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7785                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7786                         r = 0;
7787                         goto out;
7788                 }
7789                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7790                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7791                         vcpu->mmio_needed = 0;
7792                         r = 0;
7793                         goto out;
7794                 }
7795                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7796                         /* Page is swapped out. Do synthetic halt */
7797                         vcpu->arch.apf.halted = true;
7798                         r = 1;
7799                         goto out;
7800                 }
7801                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7802                         record_steal_time(vcpu);
7803                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7804                         process_smi(vcpu);
7805                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7806                         process_nmi(vcpu);
7807                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7808                         kvm_pmu_handle_event(vcpu);
7809                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7810                         kvm_pmu_deliver_pmi(vcpu);
7811                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7812                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7813                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7814                                      vcpu->arch.ioapic_handled_vectors)) {
7815                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7816                                 vcpu->run->eoi.vector =
7817                                                 vcpu->arch.pending_ioapic_eoi;
7818                                 r = 0;
7819                                 goto out;
7820                         }
7821                 }
7822                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7823                         vcpu_scan_ioapic(vcpu);
7824                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7825                         vcpu_load_eoi_exitmap(vcpu);
7826                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7827                         kvm_vcpu_reload_apic_access_page(vcpu);
7828                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7829                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7830                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7831                         r = 0;
7832                         goto out;
7833                 }
7834                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7835                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7836                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7837                         r = 0;
7838                         goto out;
7839                 }
7840                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7841                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7842                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7843                         r = 0;
7844                         goto out;
7845                 }
7846
7847                 /*
7848                  * KVM_REQ_HV_STIMER has to be processed after
7849                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7850                  * depend on the guest clock being up-to-date
7851                  */
7852                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7853                         kvm_hv_process_stimers(vcpu);
7854         }
7855
7856         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7857                 ++vcpu->stat.req_event;
7858                 kvm_apic_accept_events(vcpu);
7859                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7860                         r = 1;
7861                         goto out;
7862                 }
7863
7864                 if (inject_pending_event(vcpu, req_int_win) != 0)
7865                         req_immediate_exit = true;
7866                 else {
7867                         /* Enable SMI/NMI/IRQ window open exits if needed.
7868                          *
7869                          * SMIs have three cases:
7870                          * 1) They can be nested, and then there is nothing to
7871                          *    do here because RSM will cause a vmexit anyway.
7872                          * 2) There is an ISA-specific reason why SMI cannot be
7873                          *    injected, and the moment when this changes can be
7874                          *    intercepted.
7875                          * 3) Or the SMI can be pending because
7876                          *    inject_pending_event has completed the injection
7877                          *    of an IRQ or NMI from the previous vmexit, and
7878                          *    then we request an immediate exit to inject the
7879                          *    SMI.
7880                          */
7881                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7882                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7883                                         req_immediate_exit = true;
7884                         if (vcpu->arch.nmi_pending)
7885                                 kvm_x86_ops->enable_nmi_window(vcpu);
7886                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7887                                 kvm_x86_ops->enable_irq_window(vcpu);
7888                         WARN_ON(vcpu->arch.exception.pending);
7889                 }
7890
7891                 if (kvm_lapic_enabled(vcpu)) {
7892                         update_cr8_intercept(vcpu);
7893                         kvm_lapic_sync_to_vapic(vcpu);
7894                 }
7895         }
7896
7897         r = kvm_mmu_reload(vcpu);
7898         if (unlikely(r)) {
7899                 goto cancel_injection;
7900         }
7901
7902         preempt_disable();
7903
7904         kvm_x86_ops->prepare_guest_switch(vcpu);
7905
7906         /*
7907          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7908          * IPI are then delayed after guest entry, which ensures that they
7909          * result in virtual interrupt delivery.
7910          */
7911         local_irq_disable();
7912         vcpu->mode = IN_GUEST_MODE;
7913
7914         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7915
7916         /*
7917          * 1) We should set ->mode before checking ->requests.  Please see
7918          * the comment in kvm_vcpu_exiting_guest_mode().
7919          *
7920          * 2) For APICv, we should set ->mode before checking PID.ON. This
7921          * pairs with the memory barrier implicit in pi_test_and_set_on
7922          * (see vmx_deliver_posted_interrupt).
7923          *
7924          * 3) This also orders the write to mode from any reads to the page
7925          * tables done while the VCPU is running.  Please see the comment
7926          * in kvm_flush_remote_tlbs.
7927          */
7928         smp_mb__after_srcu_read_unlock();
7929
7930         /*
7931          * This handles the case where a posted interrupt was
7932          * notified with kvm_vcpu_kick.
7933          */
7934         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7935                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7936
7937         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7938             || need_resched() || signal_pending(current)) {
7939                 vcpu->mode = OUTSIDE_GUEST_MODE;
7940                 smp_wmb();
7941                 local_irq_enable();
7942                 preempt_enable();
7943                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7944                 r = 1;
7945                 goto cancel_injection;
7946         }
7947
7948         if (req_immediate_exit) {
7949                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7950                 kvm_x86_ops->request_immediate_exit(vcpu);
7951         }
7952
7953         trace_kvm_entry(vcpu->vcpu_id);
7954         guest_enter_irqoff();
7955
7956         fpregs_assert_state_consistent();
7957         if (test_thread_flag(TIF_NEED_FPU_LOAD))
7958                 switch_fpu_return();
7959
7960         if (unlikely(vcpu->arch.switch_db_regs)) {
7961                 set_debugreg(0, 7);
7962                 set_debugreg(vcpu->arch.eff_db[0], 0);
7963                 set_debugreg(vcpu->arch.eff_db[1], 1);
7964                 set_debugreg(vcpu->arch.eff_db[2], 2);
7965                 set_debugreg(vcpu->arch.eff_db[3], 3);
7966                 set_debugreg(vcpu->arch.dr6, 6);
7967                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7968         }
7969
7970         kvm_x86_ops->run(vcpu);
7971
7972         /*
7973          * Do this here before restoring debug registers on the host.  And
7974          * since we do this before handling the vmexit, a DR access vmexit
7975          * can (a) read the correct value of the debug registers, (b) set
7976          * KVM_DEBUGREG_WONT_EXIT again.
7977          */
7978         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7979                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7980                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7981                 kvm_update_dr0123(vcpu);
7982                 kvm_update_dr6(vcpu);
7983                 kvm_update_dr7(vcpu);
7984                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7985         }
7986
7987         /*
7988          * If the guest has used debug registers, at least dr7
7989          * will be disabled while returning to the host.
7990          * If we don't have active breakpoints in the host, we don't
7991          * care about the messed up debug address registers. But if
7992          * we have some of them active, restore the old state.
7993          */
7994         if (hw_breakpoint_active())
7995                 hw_breakpoint_restore();
7996
7997         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7998
7999         vcpu->mode = OUTSIDE_GUEST_MODE;
8000         smp_wmb();
8001
8002         kvm_x86_ops->handle_external_intr(vcpu);
8003
8004         ++vcpu->stat.exits;
8005
8006         guest_exit_irqoff();
8007         if (lapic_in_kernel(vcpu)) {
8008                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8009                 if (delta != S64_MIN) {
8010                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8011                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8012                 }
8013         }
8014
8015         local_irq_enable();
8016         preempt_enable();
8017
8018         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8019
8020         /*
8021          * Profile KVM exit RIPs:
8022          */
8023         if (unlikely(prof_on == KVM_PROFILING)) {
8024                 unsigned long rip = kvm_rip_read(vcpu);
8025                 profile_hit(KVM_PROFILING, (void *)rip);
8026         }
8027
8028         if (unlikely(vcpu->arch.tsc_always_catchup))
8029                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8030
8031         if (vcpu->arch.apic_attention)
8032                 kvm_lapic_sync_from_vapic(vcpu);
8033
8034         vcpu->arch.gpa_available = false;
8035         r = kvm_x86_ops->handle_exit(vcpu);
8036         return r;
8037
8038 cancel_injection:
8039         kvm_x86_ops->cancel_injection(vcpu);
8040         if (unlikely(vcpu->arch.apic_attention))
8041                 kvm_lapic_sync_from_vapic(vcpu);
8042 out:
8043         return r;
8044 }
8045
8046 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8047 {
8048         if (!kvm_arch_vcpu_runnable(vcpu) &&
8049             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8050                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8051                 kvm_vcpu_block(vcpu);
8052                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8053
8054                 if (kvm_x86_ops->post_block)
8055                         kvm_x86_ops->post_block(vcpu);
8056
8057                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8058                         return 1;
8059         }
8060
8061         kvm_apic_accept_events(vcpu);
8062         switch(vcpu->arch.mp_state) {
8063         case KVM_MP_STATE_HALTED:
8064                 vcpu->arch.pv.pv_unhalted = false;
8065                 vcpu->arch.mp_state =
8066                         KVM_MP_STATE_RUNNABLE;
8067                 /* fall through */
8068         case KVM_MP_STATE_RUNNABLE:
8069                 vcpu->arch.apf.halted = false;
8070                 break;
8071         case KVM_MP_STATE_INIT_RECEIVED:
8072                 break;
8073         default:
8074                 return -EINTR;
8075                 break;
8076         }
8077         return 1;
8078 }
8079
8080 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8081 {
8082         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8083                 kvm_x86_ops->check_nested_events(vcpu, false);
8084
8085         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8086                 !vcpu->arch.apf.halted);
8087 }
8088
8089 static int vcpu_run(struct kvm_vcpu *vcpu)
8090 {
8091         int r;
8092         struct kvm *kvm = vcpu->kvm;
8093
8094         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8095         vcpu->arch.l1tf_flush_l1d = true;
8096
8097         for (;;) {
8098                 if (kvm_vcpu_running(vcpu)) {
8099                         r = vcpu_enter_guest(vcpu);
8100                 } else {
8101                         r = vcpu_block(kvm, vcpu);
8102                 }
8103
8104                 if (r <= 0)
8105                         break;
8106
8107                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8108                 if (kvm_cpu_has_pending_timer(vcpu))
8109                         kvm_inject_pending_timer_irqs(vcpu);
8110
8111                 if (dm_request_for_irq_injection(vcpu) &&
8112                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8113                         r = 0;
8114                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8115                         ++vcpu->stat.request_irq_exits;
8116                         break;
8117                 }
8118
8119                 kvm_check_async_pf_completion(vcpu);
8120
8121                 if (signal_pending(current)) {
8122                         r = -EINTR;
8123                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8124                         ++vcpu->stat.signal_exits;
8125                         break;
8126                 }
8127                 if (need_resched()) {
8128                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8129                         cond_resched();
8130                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8131                 }
8132         }
8133
8134         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8135
8136         return r;
8137 }
8138
8139 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8140 {
8141         int r;
8142         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8143         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8144         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8145         if (r != EMULATE_DONE)
8146                 return 0;
8147         return 1;
8148 }
8149
8150 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8151 {
8152         BUG_ON(!vcpu->arch.pio.count);
8153
8154         return complete_emulated_io(vcpu);
8155 }
8156
8157 /*
8158  * Implements the following, as a state machine:
8159  *
8160  * read:
8161  *   for each fragment
8162  *     for each mmio piece in the fragment
8163  *       write gpa, len
8164  *       exit
8165  *       copy data
8166  *   execute insn
8167  *
8168  * write:
8169  *   for each fragment
8170  *     for each mmio piece in the fragment
8171  *       write gpa, len
8172  *       copy data
8173  *       exit
8174  */
8175 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8176 {
8177         struct kvm_run *run = vcpu->run;
8178         struct kvm_mmio_fragment *frag;
8179         unsigned len;
8180
8181         BUG_ON(!vcpu->mmio_needed);
8182
8183         /* Complete previous fragment */
8184         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8185         len = min(8u, frag->len);
8186         if (!vcpu->mmio_is_write)
8187                 memcpy(frag->data, run->mmio.data, len);
8188
8189         if (frag->len <= 8) {
8190                 /* Switch to the next fragment. */
8191                 frag++;
8192                 vcpu->mmio_cur_fragment++;
8193         } else {
8194                 /* Go forward to the next mmio piece. */
8195                 frag->data += len;
8196                 frag->gpa += len;
8197                 frag->len -= len;
8198         }
8199
8200         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8201                 vcpu->mmio_needed = 0;
8202
8203                 /* FIXME: return into emulator if single-stepping.  */
8204                 if (vcpu->mmio_is_write)
8205                         return 1;
8206                 vcpu->mmio_read_completed = 1;
8207                 return complete_emulated_io(vcpu);
8208         }
8209
8210         run->exit_reason = KVM_EXIT_MMIO;
8211         run->mmio.phys_addr = frag->gpa;
8212         if (vcpu->mmio_is_write)
8213                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8214         run->mmio.len = min(8u, frag->len);
8215         run->mmio.is_write = vcpu->mmio_is_write;
8216         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8217         return 0;
8218 }
8219
8220 /* Swap (qemu) user FPU context for the guest FPU context. */
8221 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8222 {
8223         fpregs_lock();
8224
8225         copy_fpregs_to_fpstate(&current->thread.fpu);
8226         /* PKRU is separately restored in kvm_x86_ops->run.  */
8227         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8228                                 ~XFEATURE_MASK_PKRU);
8229
8230         fpregs_mark_activate();
8231         fpregs_unlock();
8232
8233         trace_kvm_fpu(1);
8234 }
8235
8236 /* When vcpu_run ends, restore user space FPU context. */
8237 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8238 {
8239         fpregs_lock();
8240
8241         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8242         copy_kernel_to_fpregs(&current->thread.fpu.state);
8243
8244         fpregs_mark_activate();
8245         fpregs_unlock();
8246
8247         ++vcpu->stat.fpu_reload;
8248         trace_kvm_fpu(0);
8249 }
8250
8251 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8252 {
8253         int r;
8254
8255         vcpu_load(vcpu);
8256         kvm_sigset_activate(vcpu);
8257         kvm_load_guest_fpu(vcpu);
8258
8259         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8260                 if (kvm_run->immediate_exit) {
8261                         r = -EINTR;
8262                         goto out;
8263                 }
8264                 kvm_vcpu_block(vcpu);
8265                 kvm_apic_accept_events(vcpu);
8266                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8267                 r = -EAGAIN;
8268                 if (signal_pending(current)) {
8269                         r = -EINTR;
8270                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8271                         ++vcpu->stat.signal_exits;
8272                 }
8273                 goto out;
8274         }
8275
8276         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8277                 r = -EINVAL;
8278                 goto out;
8279         }
8280
8281         if (vcpu->run->kvm_dirty_regs) {
8282                 r = sync_regs(vcpu);
8283                 if (r != 0)
8284                         goto out;
8285         }
8286
8287         /* re-sync apic's tpr */
8288         if (!lapic_in_kernel(vcpu)) {
8289                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8290                         r = -EINVAL;
8291                         goto out;
8292                 }
8293         }
8294
8295         if (unlikely(vcpu->arch.complete_userspace_io)) {
8296                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8297                 vcpu->arch.complete_userspace_io = NULL;
8298                 r = cui(vcpu);
8299                 if (r <= 0)
8300                         goto out;
8301         } else
8302                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8303
8304         if (kvm_run->immediate_exit)
8305                 r = -EINTR;
8306         else
8307                 r = vcpu_run(vcpu);
8308
8309 out:
8310         kvm_put_guest_fpu(vcpu);
8311         if (vcpu->run->kvm_valid_regs)
8312                 store_regs(vcpu);
8313         post_kvm_run_save(vcpu);
8314         kvm_sigset_deactivate(vcpu);
8315
8316         vcpu_put(vcpu);
8317         return r;
8318 }
8319
8320 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8321 {
8322         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8323                 /*
8324                  * We are here if userspace calls get_regs() in the middle of
8325                  * instruction emulation. Registers state needs to be copied
8326                  * back from emulation context to vcpu. Userspace shouldn't do
8327                  * that usually, but some bad designed PV devices (vmware
8328                  * backdoor interface) need this to work
8329                  */
8330                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8331                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8332         }
8333         regs->rax = kvm_rax_read(vcpu);
8334         regs->rbx = kvm_rbx_read(vcpu);
8335         regs->rcx = kvm_rcx_read(vcpu);
8336         regs->rdx = kvm_rdx_read(vcpu);
8337         regs->rsi = kvm_rsi_read(vcpu);
8338         regs->rdi = kvm_rdi_read(vcpu);
8339         regs->rsp = kvm_rsp_read(vcpu);
8340         regs->rbp = kvm_rbp_read(vcpu);
8341 #ifdef CONFIG_X86_64
8342         regs->r8 = kvm_r8_read(vcpu);
8343         regs->r9 = kvm_r9_read(vcpu);
8344         regs->r10 = kvm_r10_read(vcpu);
8345         regs->r11 = kvm_r11_read(vcpu);
8346         regs->r12 = kvm_r12_read(vcpu);
8347         regs->r13 = kvm_r13_read(vcpu);
8348         regs->r14 = kvm_r14_read(vcpu);
8349         regs->r15 = kvm_r15_read(vcpu);
8350 #endif
8351
8352         regs->rip = kvm_rip_read(vcpu);
8353         regs->rflags = kvm_get_rflags(vcpu);
8354 }
8355
8356 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8357 {
8358         vcpu_load(vcpu);
8359         __get_regs(vcpu, regs);
8360         vcpu_put(vcpu);
8361         return 0;
8362 }
8363
8364 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8365 {
8366         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8367         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8368
8369         kvm_rax_write(vcpu, regs->rax);
8370         kvm_rbx_write(vcpu, regs->rbx);
8371         kvm_rcx_write(vcpu, regs->rcx);
8372         kvm_rdx_write(vcpu, regs->rdx);
8373         kvm_rsi_write(vcpu, regs->rsi);
8374         kvm_rdi_write(vcpu, regs->rdi);
8375         kvm_rsp_write(vcpu, regs->rsp);
8376         kvm_rbp_write(vcpu, regs->rbp);
8377 #ifdef CONFIG_X86_64
8378         kvm_r8_write(vcpu, regs->r8);
8379         kvm_r9_write(vcpu, regs->r9);
8380         kvm_r10_write(vcpu, regs->r10);
8381         kvm_r11_write(vcpu, regs->r11);
8382         kvm_r12_write(vcpu, regs->r12);
8383         kvm_r13_write(vcpu, regs->r13);
8384         kvm_r14_write(vcpu, regs->r14);
8385         kvm_r15_write(vcpu, regs->r15);
8386 #endif
8387
8388         kvm_rip_write(vcpu, regs->rip);
8389         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8390
8391         vcpu->arch.exception.pending = false;
8392
8393         kvm_make_request(KVM_REQ_EVENT, vcpu);
8394 }
8395
8396 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8397 {
8398         vcpu_load(vcpu);
8399         __set_regs(vcpu, regs);
8400         vcpu_put(vcpu);
8401         return 0;
8402 }
8403
8404 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8405 {
8406         struct kvm_segment cs;
8407
8408         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8409         *db = cs.db;
8410         *l = cs.l;
8411 }
8412 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8413
8414 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8415 {
8416         struct desc_ptr dt;
8417
8418         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8419         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8420         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8421         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8422         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8423         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8424
8425         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8426         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8427
8428         kvm_x86_ops->get_idt(vcpu, &dt);
8429         sregs->idt.limit = dt.size;
8430         sregs->idt.base = dt.address;
8431         kvm_x86_ops->get_gdt(vcpu, &dt);
8432         sregs->gdt.limit = dt.size;
8433         sregs->gdt.base = dt.address;
8434
8435         sregs->cr0 = kvm_read_cr0(vcpu);
8436         sregs->cr2 = vcpu->arch.cr2;
8437         sregs->cr3 = kvm_read_cr3(vcpu);
8438         sregs->cr4 = kvm_read_cr4(vcpu);
8439         sregs->cr8 = kvm_get_cr8(vcpu);
8440         sregs->efer = vcpu->arch.efer;
8441         sregs->apic_base = kvm_get_apic_base(vcpu);
8442
8443         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8444
8445         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8446                 set_bit(vcpu->arch.interrupt.nr,
8447                         (unsigned long *)sregs->interrupt_bitmap);
8448 }
8449
8450 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8451                                   struct kvm_sregs *sregs)
8452 {
8453         vcpu_load(vcpu);
8454         __get_sregs(vcpu, sregs);
8455         vcpu_put(vcpu);
8456         return 0;
8457 }
8458
8459 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8460                                     struct kvm_mp_state *mp_state)
8461 {
8462         vcpu_load(vcpu);
8463
8464         kvm_apic_accept_events(vcpu);
8465         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8466                                         vcpu->arch.pv.pv_unhalted)
8467                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8468         else
8469                 mp_state->mp_state = vcpu->arch.mp_state;
8470
8471         vcpu_put(vcpu);
8472         return 0;
8473 }
8474
8475 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8476                                     struct kvm_mp_state *mp_state)
8477 {
8478         int ret = -EINVAL;
8479
8480         vcpu_load(vcpu);
8481
8482         if (!lapic_in_kernel(vcpu) &&
8483             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8484                 goto out;
8485
8486         /* INITs are latched while in SMM */
8487         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8488             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8489              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8490                 goto out;
8491
8492         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8493                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8494                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8495         } else
8496                 vcpu->arch.mp_state = mp_state->mp_state;
8497         kvm_make_request(KVM_REQ_EVENT, vcpu);
8498
8499         ret = 0;
8500 out:
8501         vcpu_put(vcpu);
8502         return ret;
8503 }
8504
8505 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8506                     int reason, bool has_error_code, u32 error_code)
8507 {
8508         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8509         int ret;
8510
8511         init_emulate_ctxt(vcpu);
8512
8513         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8514                                    has_error_code, error_code);
8515
8516         if (ret)
8517                 return EMULATE_FAIL;
8518
8519         kvm_rip_write(vcpu, ctxt->eip);
8520         kvm_set_rflags(vcpu, ctxt->eflags);
8521         kvm_make_request(KVM_REQ_EVENT, vcpu);
8522         return EMULATE_DONE;
8523 }
8524 EXPORT_SYMBOL_GPL(kvm_task_switch);
8525
8526 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8527 {
8528         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8529                         (sregs->cr4 & X86_CR4_OSXSAVE))
8530                 return  -EINVAL;
8531
8532         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8533                 /*
8534                  * When EFER.LME and CR0.PG are set, the processor is in
8535                  * 64-bit mode (though maybe in a 32-bit code segment).
8536                  * CR4.PAE and EFER.LMA must be set.
8537                  */
8538                 if (!(sregs->cr4 & X86_CR4_PAE)
8539                     || !(sregs->efer & EFER_LMA))
8540                         return -EINVAL;
8541         } else {
8542                 /*
8543                  * Not in 64-bit mode: EFER.LMA is clear and the code
8544                  * segment cannot be 64-bit.
8545                  */
8546                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8547                         return -EINVAL;
8548         }
8549
8550         return 0;
8551 }
8552
8553 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8554 {
8555         struct msr_data apic_base_msr;
8556         int mmu_reset_needed = 0;
8557         int cpuid_update_needed = 0;
8558         int pending_vec, max_bits, idx;
8559         struct desc_ptr dt;
8560         int ret = -EINVAL;
8561
8562         if (kvm_valid_sregs(vcpu, sregs))
8563                 goto out;
8564
8565         apic_base_msr.data = sregs->apic_base;
8566         apic_base_msr.host_initiated = true;
8567         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8568                 goto out;
8569
8570         dt.size = sregs->idt.limit;
8571         dt.address = sregs->idt.base;
8572         kvm_x86_ops->set_idt(vcpu, &dt);
8573         dt.size = sregs->gdt.limit;
8574         dt.address = sregs->gdt.base;
8575         kvm_x86_ops->set_gdt(vcpu, &dt);
8576
8577         vcpu->arch.cr2 = sregs->cr2;
8578         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8579         vcpu->arch.cr3 = sregs->cr3;
8580         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8581
8582         kvm_set_cr8(vcpu, sregs->cr8);
8583
8584         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8585         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8586
8587         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8588         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8589         vcpu->arch.cr0 = sregs->cr0;
8590
8591         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8592         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8593                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8594         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8595         if (cpuid_update_needed)
8596                 kvm_update_cpuid(vcpu);
8597
8598         idx = srcu_read_lock(&vcpu->kvm->srcu);
8599         if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu)) {
8600                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8601                 mmu_reset_needed = 1;
8602         }
8603         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8604
8605         if (mmu_reset_needed)
8606                 kvm_mmu_reset_context(vcpu);
8607
8608         max_bits = KVM_NR_INTERRUPTS;
8609         pending_vec = find_first_bit(
8610                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8611         if (pending_vec < max_bits) {
8612                 kvm_queue_interrupt(vcpu, pending_vec, false);
8613                 pr_debug("Set back pending irq %d\n", pending_vec);
8614         }
8615
8616         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8617         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8618         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8619         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8620         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8621         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8622
8623         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8624         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8625
8626         update_cr8_intercept(vcpu);
8627
8628         /* Older userspace won't unhalt the vcpu on reset. */
8629         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8630             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8631             !is_protmode(vcpu))
8632                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8633
8634         kvm_make_request(KVM_REQ_EVENT, vcpu);
8635
8636         ret = 0;
8637 out:
8638         return ret;
8639 }
8640
8641 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8642                                   struct kvm_sregs *sregs)
8643 {
8644         int ret;
8645
8646         vcpu_load(vcpu);
8647         ret = __set_sregs(vcpu, sregs);
8648         vcpu_put(vcpu);
8649         return ret;
8650 }
8651
8652 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8653                                         struct kvm_guest_debug *dbg)
8654 {
8655         unsigned long rflags;
8656         int i, r;
8657
8658         vcpu_load(vcpu);
8659
8660         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8661                 r = -EBUSY;
8662                 if (vcpu->arch.exception.pending)
8663                         goto out;
8664                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8665                         kvm_queue_exception(vcpu, DB_VECTOR);
8666                 else
8667                         kvm_queue_exception(vcpu, BP_VECTOR);
8668         }
8669
8670         /*
8671          * Read rflags as long as potentially injected trace flags are still
8672          * filtered out.
8673          */
8674         rflags = kvm_get_rflags(vcpu);
8675
8676         vcpu->guest_debug = dbg->control;
8677         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8678                 vcpu->guest_debug = 0;
8679
8680         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8681                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8682                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8683                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8684         } else {
8685                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8686                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8687         }
8688         kvm_update_dr7(vcpu);
8689
8690         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8691                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8692                         get_segment_base(vcpu, VCPU_SREG_CS);
8693
8694         /*
8695          * Trigger an rflags update that will inject or remove the trace
8696          * flags.
8697          */
8698         kvm_set_rflags(vcpu, rflags);
8699
8700         kvm_x86_ops->update_bp_intercept(vcpu);
8701
8702         r = 0;
8703
8704 out:
8705         vcpu_put(vcpu);
8706         return r;
8707 }
8708
8709 /*
8710  * Translate a guest virtual address to a guest physical address.
8711  */
8712 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8713                                     struct kvm_translation *tr)
8714 {
8715         unsigned long vaddr = tr->linear_address;
8716         gpa_t gpa;
8717         int idx;
8718
8719         vcpu_load(vcpu);
8720
8721         idx = srcu_read_lock(&vcpu->kvm->srcu);
8722         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8723         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8724         tr->physical_address = gpa;
8725         tr->valid = gpa != UNMAPPED_GVA;
8726         tr->writeable = 1;
8727         tr->usermode = 0;
8728
8729         vcpu_put(vcpu);
8730         return 0;
8731 }
8732
8733 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8734 {
8735         struct fxregs_state *fxsave;
8736
8737         vcpu_load(vcpu);
8738
8739         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8740         memcpy(fpu->fpr, fxsave->st_space, 128);
8741         fpu->fcw = fxsave->cwd;
8742         fpu->fsw = fxsave->swd;
8743         fpu->ftwx = fxsave->twd;
8744         fpu->last_opcode = fxsave->fop;
8745         fpu->last_ip = fxsave->rip;
8746         fpu->last_dp = fxsave->rdp;
8747         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8748
8749         vcpu_put(vcpu);
8750         return 0;
8751 }
8752
8753 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8754 {
8755         struct fxregs_state *fxsave;
8756
8757         vcpu_load(vcpu);
8758
8759         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8760
8761         memcpy(fxsave->st_space, fpu->fpr, 128);
8762         fxsave->cwd = fpu->fcw;
8763         fxsave->swd = fpu->fsw;
8764         fxsave->twd = fpu->ftwx;
8765         fxsave->fop = fpu->last_opcode;
8766         fxsave->rip = fpu->last_ip;
8767         fxsave->rdp = fpu->last_dp;
8768         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8769
8770         vcpu_put(vcpu);
8771         return 0;
8772 }
8773
8774 static void store_regs(struct kvm_vcpu *vcpu)
8775 {
8776         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8777
8778         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8779                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8780
8781         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8782                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8783
8784         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8785                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8786                                 vcpu, &vcpu->run->s.regs.events);
8787 }
8788
8789 static int sync_regs(struct kvm_vcpu *vcpu)
8790 {
8791         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8792                 return -EINVAL;
8793
8794         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8795                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8796                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8797         }
8798         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8799                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8800                         return -EINVAL;
8801                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8802         }
8803         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8804                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8805                                 vcpu, &vcpu->run->s.regs.events))
8806                         return -EINVAL;
8807                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8808         }
8809
8810         return 0;
8811 }
8812
8813 static void fx_init(struct kvm_vcpu *vcpu)
8814 {
8815         fpstate_init(&vcpu->arch.guest_fpu->state);
8816         if (boot_cpu_has(X86_FEATURE_XSAVES))
8817                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
8818                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8819
8820         /*
8821          * Ensure guest xcr0 is valid for loading
8822          */
8823         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8824
8825         vcpu->arch.cr0 |= X86_CR0_ET;
8826 }
8827
8828 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8829 {
8830         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8831
8832         kvmclock_reset(vcpu);
8833
8834         kvm_x86_ops->vcpu_free(vcpu);
8835         free_cpumask_var(wbinvd_dirty_mask);
8836 }
8837
8838 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8839                                                 unsigned int id)
8840 {
8841         struct kvm_vcpu *vcpu;
8842
8843         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8844                 printk_once(KERN_WARNING
8845                 "kvm: SMP vm created on host with unstable TSC; "
8846                 "guest TSC will not be reliable\n");
8847
8848         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8849
8850         return vcpu;
8851 }
8852
8853 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8854 {
8855         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
8856         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8857         kvm_vcpu_mtrr_init(vcpu);
8858         vcpu_load(vcpu);
8859         kvm_vcpu_reset(vcpu, false);
8860         kvm_init_mmu(vcpu, false);
8861         vcpu_put(vcpu);
8862         return 0;
8863 }
8864
8865 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8866 {
8867         struct msr_data msr;
8868         struct kvm *kvm = vcpu->kvm;
8869
8870         kvm_hv_vcpu_postcreate(vcpu);
8871
8872         if (mutex_lock_killable(&vcpu->mutex))
8873                 return;
8874         vcpu_load(vcpu);
8875         msr.data = 0x0;
8876         msr.index = MSR_IA32_TSC;
8877         msr.host_initiated = true;
8878         kvm_write_tsc(vcpu, &msr);
8879         vcpu_put(vcpu);
8880
8881         /* poll control enabled by default */
8882         vcpu->arch.msr_kvm_poll_control = 1;
8883
8884         mutex_unlock(&vcpu->mutex);
8885
8886         if (!kvmclock_periodic_sync)
8887                 return;
8888
8889         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8890                                         KVMCLOCK_SYNC_PERIOD);
8891 }
8892
8893 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8894 {
8895         vcpu->arch.apf.msr_val = 0;
8896
8897         vcpu_load(vcpu);
8898         kvm_mmu_unload(vcpu);
8899         vcpu_put(vcpu);
8900
8901         kvm_x86_ops->vcpu_free(vcpu);
8902 }
8903
8904 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8905 {
8906         kvm_lapic_reset(vcpu, init_event);
8907
8908         vcpu->arch.hflags = 0;
8909
8910         vcpu->arch.smi_pending = 0;
8911         vcpu->arch.smi_count = 0;
8912         atomic_set(&vcpu->arch.nmi_queued, 0);
8913         vcpu->arch.nmi_pending = 0;
8914         vcpu->arch.nmi_injected = false;
8915         kvm_clear_interrupt_queue(vcpu);
8916         kvm_clear_exception_queue(vcpu);
8917         vcpu->arch.exception.pending = false;
8918
8919         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8920         kvm_update_dr0123(vcpu);
8921         vcpu->arch.dr6 = DR6_INIT;
8922         kvm_update_dr6(vcpu);
8923         vcpu->arch.dr7 = DR7_FIXED_1;
8924         kvm_update_dr7(vcpu);
8925
8926         vcpu->arch.cr2 = 0;
8927
8928         kvm_make_request(KVM_REQ_EVENT, vcpu);
8929         vcpu->arch.apf.msr_val = 0;
8930         vcpu->arch.st.msr_val = 0;
8931
8932         kvmclock_reset(vcpu);
8933
8934         kvm_clear_async_pf_completion_queue(vcpu);
8935         kvm_async_pf_hash_reset(vcpu);
8936         vcpu->arch.apf.halted = false;
8937
8938         if (kvm_mpx_supported()) {
8939                 void *mpx_state_buffer;
8940
8941                 /*
8942                  * To avoid have the INIT path from kvm_apic_has_events() that be
8943                  * called with loaded FPU and does not let userspace fix the state.
8944                  */
8945                 if (init_event)
8946                         kvm_put_guest_fpu(vcpu);
8947                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
8948                                         XFEATURE_BNDREGS);
8949                 if (mpx_state_buffer)
8950                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8951                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
8952                                         XFEATURE_BNDCSR);
8953                 if (mpx_state_buffer)
8954                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8955                 if (init_event)
8956                         kvm_load_guest_fpu(vcpu);
8957         }
8958
8959         if (!init_event) {
8960                 kvm_pmu_reset(vcpu);
8961                 vcpu->arch.smbase = 0x30000;
8962
8963                 vcpu->arch.msr_misc_features_enables = 0;
8964
8965                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8966         }
8967
8968         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8969         vcpu->arch.regs_avail = ~0;
8970         vcpu->arch.regs_dirty = ~0;
8971
8972         vcpu->arch.ia32_xss = 0;
8973
8974         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8975 }
8976
8977 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8978 {
8979         struct kvm_segment cs;
8980
8981         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8982         cs.selector = vector << 8;
8983         cs.base = vector << 12;
8984         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8985         kvm_rip_write(vcpu, 0);
8986 }
8987
8988 int kvm_arch_hardware_enable(void)
8989 {
8990         struct kvm *kvm;
8991         struct kvm_vcpu *vcpu;
8992         int i;
8993         int ret;
8994         u64 local_tsc;
8995         u64 max_tsc = 0;
8996         bool stable, backwards_tsc = false;
8997
8998         kvm_shared_msr_cpu_online();
8999         ret = kvm_x86_ops->hardware_enable();
9000         if (ret != 0)
9001                 return ret;
9002
9003         local_tsc = rdtsc();
9004         stable = !kvm_check_tsc_unstable();
9005         list_for_each_entry(kvm, &vm_list, vm_list) {
9006                 kvm_for_each_vcpu(i, vcpu, kvm) {
9007                         if (!stable && vcpu->cpu == smp_processor_id())
9008                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9009                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9010                                 backwards_tsc = true;
9011                                 if (vcpu->arch.last_host_tsc > max_tsc)
9012                                         max_tsc = vcpu->arch.last_host_tsc;
9013                         }
9014                 }
9015         }
9016
9017         /*
9018          * Sometimes, even reliable TSCs go backwards.  This happens on
9019          * platforms that reset TSC during suspend or hibernate actions, but
9020          * maintain synchronization.  We must compensate.  Fortunately, we can
9021          * detect that condition here, which happens early in CPU bringup,
9022          * before any KVM threads can be running.  Unfortunately, we can't
9023          * bring the TSCs fully up to date with real time, as we aren't yet far
9024          * enough into CPU bringup that we know how much real time has actually
9025          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
9026          * variables that haven't been updated yet.
9027          *
9028          * So we simply find the maximum observed TSC above, then record the
9029          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9030          * the adjustment will be applied.  Note that we accumulate
9031          * adjustments, in case multiple suspend cycles happen before some VCPU
9032          * gets a chance to run again.  In the event that no KVM threads get a
9033          * chance to run, we will miss the entire elapsed period, as we'll have
9034          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9035          * loose cycle time.  This isn't too big a deal, since the loss will be
9036          * uniform across all VCPUs (not to mention the scenario is extremely
9037          * unlikely). It is possible that a second hibernate recovery happens
9038          * much faster than a first, causing the observed TSC here to be
9039          * smaller; this would require additional padding adjustment, which is
9040          * why we set last_host_tsc to the local tsc observed here.
9041          *
9042          * N.B. - this code below runs only on platforms with reliable TSC,
9043          * as that is the only way backwards_tsc is set above.  Also note
9044          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9045          * have the same delta_cyc adjustment applied if backwards_tsc
9046          * is detected.  Note further, this adjustment is only done once,
9047          * as we reset last_host_tsc on all VCPUs to stop this from being
9048          * called multiple times (one for each physical CPU bringup).
9049          *
9050          * Platforms with unreliable TSCs don't have to deal with this, they
9051          * will be compensated by the logic in vcpu_load, which sets the TSC to
9052          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9053          * guarantee that they stay in perfect synchronization.
9054          */
9055         if (backwards_tsc) {
9056                 u64 delta_cyc = max_tsc - local_tsc;
9057                 list_for_each_entry(kvm, &vm_list, vm_list) {
9058                         kvm->arch.backwards_tsc_observed = true;
9059                         kvm_for_each_vcpu(i, vcpu, kvm) {
9060                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9061                                 vcpu->arch.last_host_tsc = local_tsc;
9062                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9063                         }
9064
9065                         /*
9066                          * We have to disable TSC offset matching.. if you were
9067                          * booting a VM while issuing an S4 host suspend....
9068                          * you may have some problem.  Solving this issue is
9069                          * left as an exercise to the reader.
9070                          */
9071                         kvm->arch.last_tsc_nsec = 0;
9072                         kvm->arch.last_tsc_write = 0;
9073                 }
9074
9075         }
9076         return 0;
9077 }
9078
9079 void kvm_arch_hardware_disable(void)
9080 {
9081         kvm_x86_ops->hardware_disable();
9082         drop_user_return_notifiers();
9083 }
9084
9085 int kvm_arch_hardware_setup(void)
9086 {
9087         int r;
9088
9089         r = kvm_x86_ops->hardware_setup();
9090         if (r != 0)
9091                 return r;
9092
9093         if (kvm_has_tsc_control) {
9094                 /*
9095                  * Make sure the user can only configure tsc_khz values that
9096                  * fit into a signed integer.
9097                  * A min value is not calculated because it will always
9098                  * be 1 on all machines.
9099                  */
9100                 u64 max = min(0x7fffffffULL,
9101                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9102                 kvm_max_guest_tsc_khz = max;
9103
9104                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9105         }
9106
9107         kvm_init_msr_list();
9108         return 0;
9109 }
9110
9111 void kvm_arch_hardware_unsetup(void)
9112 {
9113         kvm_x86_ops->hardware_unsetup();
9114 }
9115
9116 int kvm_arch_check_processor_compat(void)
9117 {
9118         return kvm_x86_ops->check_processor_compatibility();
9119 }
9120
9121 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9122 {
9123         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9124 }
9125 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9126
9127 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9128 {
9129         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9130 }
9131
9132 struct static_key kvm_no_apic_vcpu __read_mostly;
9133 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9134
9135 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9136 {
9137         struct page *page;
9138         int r;
9139
9140         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9141         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9142                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9143         else
9144                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9145
9146         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9147         if (!page) {
9148                 r = -ENOMEM;
9149                 goto fail;
9150         }
9151         vcpu->arch.pio_data = page_address(page);
9152
9153         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9154
9155         r = kvm_mmu_create(vcpu);
9156         if (r < 0)
9157                 goto fail_free_pio_data;
9158
9159         if (irqchip_in_kernel(vcpu->kvm)) {
9160                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9161                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9162                 if (r < 0)
9163                         goto fail_mmu_destroy;
9164         } else
9165                 static_key_slow_inc(&kvm_no_apic_vcpu);
9166
9167         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9168                                        GFP_KERNEL_ACCOUNT);
9169         if (!vcpu->arch.mce_banks) {
9170                 r = -ENOMEM;
9171                 goto fail_free_lapic;
9172         }
9173         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9174
9175         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9176                                 GFP_KERNEL_ACCOUNT)) {
9177                 r = -ENOMEM;
9178                 goto fail_free_mce_banks;
9179         }
9180
9181         fx_init(vcpu);
9182
9183         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9184
9185         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9186
9187         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9188
9189         kvm_async_pf_hash_reset(vcpu);
9190         kvm_pmu_init(vcpu);
9191
9192         vcpu->arch.pending_external_vector = -1;
9193         vcpu->arch.preempted_in_kernel = false;
9194
9195         kvm_hv_vcpu_init(vcpu);
9196
9197         return 0;
9198
9199 fail_free_mce_banks:
9200         kfree(vcpu->arch.mce_banks);
9201 fail_free_lapic:
9202         kvm_free_lapic(vcpu);
9203 fail_mmu_destroy:
9204         kvm_mmu_destroy(vcpu);
9205 fail_free_pio_data:
9206         free_page((unsigned long)vcpu->arch.pio_data);
9207 fail:
9208         return r;
9209 }
9210
9211 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9212 {
9213         int idx;
9214
9215         kvm_hv_vcpu_uninit(vcpu);
9216         kvm_pmu_destroy(vcpu);
9217         kfree(vcpu->arch.mce_banks);
9218         kvm_free_lapic(vcpu);
9219         idx = srcu_read_lock(&vcpu->kvm->srcu);
9220         kvm_mmu_destroy(vcpu);
9221         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9222         free_page((unsigned long)vcpu->arch.pio_data);
9223         if (!lapic_in_kernel(vcpu))
9224                 static_key_slow_dec(&kvm_no_apic_vcpu);
9225 }
9226
9227 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9228 {
9229         vcpu->arch.l1tf_flush_l1d = true;
9230         kvm_x86_ops->sched_in(vcpu, cpu);
9231 }
9232
9233 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9234 {
9235         if (type)
9236                 return -EINVAL;
9237
9238         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9239         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9240         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9241         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9242
9243         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9244         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9245         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9246         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9247                 &kvm->arch.irq_sources_bitmap);
9248
9249         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9250         mutex_init(&kvm->arch.apic_map_lock);
9251         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9252
9253         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
9254         pvclock_update_vm_gtod_copy(kvm);
9255
9256         kvm->arch.guest_can_read_msr_platform_info = true;
9257
9258         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9259         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9260
9261         kvm_hv_init_vm(kvm);
9262         kvm_page_track_init(kvm);
9263         kvm_mmu_init_vm(kvm);
9264
9265         if (kvm_x86_ops->vm_init)
9266                 return kvm_x86_ops->vm_init(kvm);
9267
9268         return 0;
9269 }
9270
9271 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9272 {
9273         vcpu_load(vcpu);
9274         kvm_mmu_unload(vcpu);
9275         vcpu_put(vcpu);
9276 }
9277
9278 static void kvm_free_vcpus(struct kvm *kvm)
9279 {
9280         unsigned int i;
9281         struct kvm_vcpu *vcpu;
9282
9283         /*
9284          * Unpin any mmu pages first.
9285          */
9286         kvm_for_each_vcpu(i, vcpu, kvm) {
9287                 kvm_clear_async_pf_completion_queue(vcpu);
9288                 kvm_unload_vcpu_mmu(vcpu);
9289         }
9290         kvm_for_each_vcpu(i, vcpu, kvm)
9291                 kvm_arch_vcpu_free(vcpu);
9292
9293         mutex_lock(&kvm->lock);
9294         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9295                 kvm->vcpus[i] = NULL;
9296
9297         atomic_set(&kvm->online_vcpus, 0);
9298         mutex_unlock(&kvm->lock);
9299 }
9300
9301 void kvm_arch_sync_events(struct kvm *kvm)
9302 {
9303         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9304         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9305         kvm_free_pit(kvm);
9306 }
9307
9308 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9309 {
9310         int i, r;
9311         unsigned long hva;
9312         struct kvm_memslots *slots = kvm_memslots(kvm);
9313         struct kvm_memory_slot *slot, old;
9314
9315         /* Called with kvm->slots_lock held.  */
9316         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9317                 return -EINVAL;
9318
9319         slot = id_to_memslot(slots, id);
9320         if (size) {
9321                 if (slot->npages)
9322                         return -EEXIST;
9323
9324                 /*
9325                  * MAP_SHARED to prevent internal slot pages from being moved
9326                  * by fork()/COW.
9327                  */
9328                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9329                               MAP_SHARED | MAP_ANONYMOUS, 0);
9330                 if (IS_ERR((void *)hva))
9331                         return PTR_ERR((void *)hva);
9332         } else {
9333                 if (!slot->npages)
9334                         return 0;
9335
9336                 hva = 0;
9337         }
9338
9339         old = *slot;
9340         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9341                 struct kvm_userspace_memory_region m;
9342
9343                 m.slot = id | (i << 16);
9344                 m.flags = 0;
9345                 m.guest_phys_addr = gpa;
9346                 m.userspace_addr = hva;
9347                 m.memory_size = size;
9348                 r = __kvm_set_memory_region(kvm, &m);
9349                 if (r < 0)
9350                         return r;
9351         }
9352
9353         if (!size)
9354                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9355
9356         return 0;
9357 }
9358 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9359
9360 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9361 {
9362         int r;
9363
9364         mutex_lock(&kvm->slots_lock);
9365         r = __x86_set_memory_region(kvm, id, gpa, size);
9366         mutex_unlock(&kvm->slots_lock);
9367
9368         return r;
9369 }
9370 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9371
9372 void kvm_arch_destroy_vm(struct kvm *kvm)
9373 {
9374         if (current->mm == kvm->mm) {
9375                 /*
9376                  * Free memory regions allocated on behalf of userspace,
9377                  * unless the the memory map has changed due to process exit
9378                  * or fd copying.
9379                  */
9380                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9381                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9382                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9383         }
9384         if (kvm_x86_ops->vm_destroy)
9385                 kvm_x86_ops->vm_destroy(kvm);
9386         kvm_pic_destroy(kvm);
9387         kvm_ioapic_destroy(kvm);
9388         kvm_free_vcpus(kvm);
9389         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9390         kvm_mmu_uninit_vm(kvm);
9391         kvm_page_track_cleanup(kvm);
9392         kvm_hv_destroy_vm(kvm);
9393 }
9394
9395 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9396                            struct kvm_memory_slot *dont)
9397 {
9398         int i;
9399
9400         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9401                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9402                         kvfree(free->arch.rmap[i]);
9403                         free->arch.rmap[i] = NULL;
9404                 }
9405                 if (i == 0)
9406                         continue;
9407
9408                 if (!dont || free->arch.lpage_info[i - 1] !=
9409                              dont->arch.lpage_info[i - 1]) {
9410                         kvfree(free->arch.lpage_info[i - 1]);
9411                         free->arch.lpage_info[i - 1] = NULL;
9412                 }
9413         }
9414
9415         kvm_page_track_free_memslot(free, dont);
9416 }
9417
9418 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9419                             unsigned long npages)
9420 {
9421         int i;
9422
9423         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9424                 struct kvm_lpage_info *linfo;
9425                 unsigned long ugfn;
9426                 int lpages;
9427                 int level = i + 1;
9428
9429                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9430                                       slot->base_gfn, level) + 1;
9431
9432                 slot->arch.rmap[i] =
9433                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9434                                  GFP_KERNEL_ACCOUNT);
9435                 if (!slot->arch.rmap[i])
9436                         goto out_free;
9437                 if (i == 0)
9438                         continue;
9439
9440                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9441                 if (!linfo)
9442                         goto out_free;
9443
9444                 slot->arch.lpage_info[i - 1] = linfo;
9445
9446                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9447                         linfo[0].disallow_lpage = 1;
9448                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9449                         linfo[lpages - 1].disallow_lpage = 1;
9450                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9451                 /*
9452                  * If the gfn and userspace address are not aligned wrt each
9453                  * other, or if explicitly asked to, disable large page
9454                  * support for this slot
9455                  */
9456                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9457                     !kvm_largepages_enabled()) {
9458                         unsigned long j;
9459
9460                         for (j = 0; j < lpages; ++j)
9461                                 linfo[j].disallow_lpage = 1;
9462                 }
9463         }
9464
9465         if (kvm_page_track_create_memslot(slot, npages))
9466                 goto out_free;
9467
9468         return 0;
9469
9470 out_free:
9471         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9472                 kvfree(slot->arch.rmap[i]);
9473                 slot->arch.rmap[i] = NULL;
9474                 if (i == 0)
9475                         continue;
9476
9477                 kvfree(slot->arch.lpage_info[i - 1]);
9478                 slot->arch.lpage_info[i - 1] = NULL;
9479         }
9480         return -ENOMEM;
9481 }
9482
9483 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9484 {
9485         /*
9486          * memslots->generation has been incremented.
9487          * mmio generation may have reached its maximum value.
9488          */
9489         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9490 }
9491
9492 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9493                                 struct kvm_memory_slot *memslot,
9494                                 const struct kvm_userspace_memory_region *mem,
9495                                 enum kvm_mr_change change)
9496 {
9497         return 0;
9498 }
9499
9500 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9501                                      struct kvm_memory_slot *new)
9502 {
9503         /* Still write protect RO slot */
9504         if (new->flags & KVM_MEM_READONLY) {
9505                 kvm_mmu_slot_remove_write_access(kvm, new);
9506                 return;
9507         }
9508
9509         /*
9510          * Call kvm_x86_ops dirty logging hooks when they are valid.
9511          *
9512          * kvm_x86_ops->slot_disable_log_dirty is called when:
9513          *
9514          *  - KVM_MR_CREATE with dirty logging is disabled
9515          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9516          *
9517          * The reason is, in case of PML, we need to set D-bit for any slots
9518          * with dirty logging disabled in order to eliminate unnecessary GPA
9519          * logging in PML buffer (and potential PML buffer full VMEXT). This
9520          * guarantees leaving PML enabled during guest's lifetime won't have
9521          * any additional overhead from PML when guest is running with dirty
9522          * logging disabled for memory slots.
9523          *
9524          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9525          * to dirty logging mode.
9526          *
9527          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9528          *
9529          * In case of write protect:
9530          *
9531          * Write protect all pages for dirty logging.
9532          *
9533          * All the sptes including the large sptes which point to this
9534          * slot are set to readonly. We can not create any new large
9535          * spte on this slot until the end of the logging.
9536          *
9537          * See the comments in fast_page_fault().
9538          */
9539         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9540                 if (kvm_x86_ops->slot_enable_log_dirty)
9541                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9542                 else
9543                         kvm_mmu_slot_remove_write_access(kvm, new);
9544         } else {
9545                 if (kvm_x86_ops->slot_disable_log_dirty)
9546                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9547         }
9548 }
9549
9550 void kvm_arch_commit_memory_region(struct kvm *kvm,
9551                                 const struct kvm_userspace_memory_region *mem,
9552                                 const struct kvm_memory_slot *old,
9553                                 const struct kvm_memory_slot *new,
9554                                 enum kvm_mr_change change)
9555 {
9556         if (!kvm->arch.n_requested_mmu_pages)
9557                 kvm_mmu_change_mmu_pages(kvm,
9558                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9559
9560         /*
9561          * Dirty logging tracks sptes in 4k granularity, meaning that large
9562          * sptes have to be split.  If live migration is successful, the guest
9563          * in the source machine will be destroyed and large sptes will be
9564          * created in the destination. However, if the guest continues to run
9565          * in the source machine (for example if live migration fails), small
9566          * sptes will remain around and cause bad performance.
9567          *
9568          * Scan sptes if dirty logging has been stopped, dropping those
9569          * which can be collapsed into a single large-page spte.  Later
9570          * page faults will create the large-page sptes.
9571          */
9572         if ((change != KVM_MR_DELETE) &&
9573                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9574                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9575                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9576
9577         /*
9578          * Set up write protection and/or dirty logging for the new slot.
9579          *
9580          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9581          * been zapped so no dirty logging staff is needed for old slot. For
9582          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9583          * new and it's also covered when dealing with the new slot.
9584          *
9585          * FIXME: const-ify all uses of struct kvm_memory_slot.
9586          */
9587         if (change != KVM_MR_DELETE)
9588                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9589 }
9590
9591 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9592 {
9593         kvm_mmu_zap_all(kvm);
9594 }
9595
9596 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9597                                    struct kvm_memory_slot *slot)
9598 {
9599         kvm_page_track_flush_slot(kvm, slot);
9600 }
9601
9602 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9603 {
9604         return (is_guest_mode(vcpu) &&
9605                         kvm_x86_ops->guest_apic_has_interrupt &&
9606                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9607 }
9608
9609 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9610 {
9611         if (!list_empty_careful(&vcpu->async_pf.done))
9612                 return true;
9613
9614         if (kvm_apic_has_events(vcpu))
9615                 return true;
9616
9617         if (vcpu->arch.pv.pv_unhalted)
9618                 return true;
9619
9620         if (vcpu->arch.exception.pending)
9621                 return true;
9622
9623         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9624             (vcpu->arch.nmi_pending &&
9625              kvm_x86_ops->nmi_allowed(vcpu)))
9626                 return true;
9627
9628         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9629             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9630                 return true;
9631
9632         if (kvm_arch_interrupt_allowed(vcpu) &&
9633             (kvm_cpu_has_interrupt(vcpu) ||
9634             kvm_guest_apic_has_interrupt(vcpu)))
9635                 return true;
9636
9637         if (kvm_hv_has_stimer_pending(vcpu))
9638                 return true;
9639
9640         return false;
9641 }
9642
9643 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9644 {
9645         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9646 }
9647
9648 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9649 {
9650         return vcpu->arch.preempted_in_kernel;
9651 }
9652
9653 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9654 {
9655         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9656 }
9657
9658 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9659 {
9660         return kvm_x86_ops->interrupt_allowed(vcpu);
9661 }
9662
9663 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9664 {
9665         if (is_64_bit_mode(vcpu))
9666                 return kvm_rip_read(vcpu);
9667         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9668                      kvm_rip_read(vcpu));
9669 }
9670 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9671
9672 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9673 {
9674         return kvm_get_linear_rip(vcpu) == linear_rip;
9675 }
9676 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9677
9678 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9679 {
9680         unsigned long rflags;
9681
9682         rflags = kvm_x86_ops->get_rflags(vcpu);
9683         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9684                 rflags &= ~X86_EFLAGS_TF;
9685         return rflags;
9686 }
9687 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9688
9689 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9690 {
9691         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9692             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9693                 rflags |= X86_EFLAGS_TF;
9694         kvm_x86_ops->set_rflags(vcpu, rflags);
9695 }
9696
9697 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9698 {
9699         __kvm_set_rflags(vcpu, rflags);
9700         kvm_make_request(KVM_REQ_EVENT, vcpu);
9701 }
9702 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9703
9704 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9705 {
9706         int r;
9707
9708         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9709               work->wakeup_all)
9710                 return;
9711
9712         r = kvm_mmu_reload(vcpu);
9713         if (unlikely(r))
9714                 return;
9715
9716         if (!vcpu->arch.mmu->direct_map &&
9717               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9718                 return;
9719
9720         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9721 }
9722
9723 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9724 {
9725         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9726 }
9727
9728 static inline u32 kvm_async_pf_next_probe(u32 key)
9729 {
9730         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9731 }
9732
9733 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9734 {
9735         u32 key = kvm_async_pf_hash_fn(gfn);
9736
9737         while (vcpu->arch.apf.gfns[key] != ~0)
9738                 key = kvm_async_pf_next_probe(key);
9739
9740         vcpu->arch.apf.gfns[key] = gfn;
9741 }
9742
9743 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9744 {
9745         int i;
9746         u32 key = kvm_async_pf_hash_fn(gfn);
9747
9748         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9749                      (vcpu->arch.apf.gfns[key] != gfn &&
9750                       vcpu->arch.apf.gfns[key] != ~0); i++)
9751                 key = kvm_async_pf_next_probe(key);
9752
9753         return key;
9754 }
9755
9756 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9757 {
9758         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9759 }
9760
9761 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9762 {
9763         u32 i, j, k;
9764
9765         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9766         while (true) {
9767                 vcpu->arch.apf.gfns[i] = ~0;
9768                 do {
9769                         j = kvm_async_pf_next_probe(j);
9770                         if (vcpu->arch.apf.gfns[j] == ~0)
9771                                 return;
9772                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9773                         /*
9774                          * k lies cyclically in ]i,j]
9775                          * |    i.k.j |
9776                          * |....j i.k.| or  |.k..j i...|
9777                          */
9778                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9779                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9780                 i = j;
9781         }
9782 }
9783
9784 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9785 {
9786
9787         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9788                                       sizeof(val));
9789 }
9790
9791 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9792 {
9793
9794         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9795                                       sizeof(u32));
9796 }
9797
9798 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
9799 {
9800         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
9801                 return false;
9802
9803         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9804             (vcpu->arch.apf.send_user_only &&
9805              kvm_x86_ops->get_cpl(vcpu) == 0))
9806                 return false;
9807
9808         return true;
9809 }
9810
9811 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
9812 {
9813         if (unlikely(!lapic_in_kernel(vcpu) ||
9814                      kvm_event_needs_reinjection(vcpu) ||
9815                      vcpu->arch.exception.pending))
9816                 return false;
9817
9818         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
9819                 return false;
9820
9821         /*
9822          * If interrupts are off we cannot even use an artificial
9823          * halt state.
9824          */
9825         return kvm_x86_ops->interrupt_allowed(vcpu);
9826 }
9827
9828 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9829                                      struct kvm_async_pf *work)
9830 {
9831         struct x86_exception fault;
9832
9833         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9834         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9835
9836         if (kvm_can_deliver_async_pf(vcpu) &&
9837             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9838                 fault.vector = PF_VECTOR;
9839                 fault.error_code_valid = true;
9840                 fault.error_code = 0;
9841                 fault.nested_page_fault = false;
9842                 fault.address = work->arch.token;
9843                 fault.async_page_fault = true;
9844                 kvm_inject_page_fault(vcpu, &fault);
9845         } else {
9846                 /*
9847                  * It is not possible to deliver a paravirtualized asynchronous
9848                  * page fault, but putting the guest in an artificial halt state
9849                  * can be beneficial nevertheless: if an interrupt arrives, we
9850                  * can deliver it timely and perhaps the guest will schedule
9851                  * another process.  When the instruction that triggered a page
9852                  * fault is retried, hopefully the page will be ready in the host.
9853                  */
9854                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9855         }
9856 }
9857
9858 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9859                                  struct kvm_async_pf *work)
9860 {
9861         struct x86_exception fault;
9862         u32 val;
9863
9864         if (work->wakeup_all)
9865                 work->arch.token = ~0; /* broadcast wakeup */
9866         else
9867                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9868         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9869
9870         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9871             !apf_get_user(vcpu, &val)) {
9872                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9873                     vcpu->arch.exception.pending &&
9874                     vcpu->arch.exception.nr == PF_VECTOR &&
9875                     !apf_put_user(vcpu, 0)) {
9876                         vcpu->arch.exception.injected = false;
9877                         vcpu->arch.exception.pending = false;
9878                         vcpu->arch.exception.nr = 0;
9879                         vcpu->arch.exception.has_error_code = false;
9880                         vcpu->arch.exception.error_code = 0;
9881                         vcpu->arch.exception.has_payload = false;
9882                         vcpu->arch.exception.payload = 0;
9883                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9884                         fault.vector = PF_VECTOR;
9885                         fault.error_code_valid = true;
9886                         fault.error_code = 0;
9887                         fault.nested_page_fault = false;
9888                         fault.address = work->arch.token;
9889                         fault.async_page_fault = true;
9890                         kvm_inject_page_fault(vcpu, &fault);
9891                 }
9892         }
9893         vcpu->arch.apf.halted = false;
9894         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9895 }
9896
9897 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9898 {
9899         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9900                 return true;
9901         else
9902                 return kvm_can_do_async_pf(vcpu);
9903 }
9904
9905 void kvm_arch_start_assignment(struct kvm *kvm)
9906 {
9907         atomic_inc(&kvm->arch.assigned_device_count);
9908 }
9909 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9910
9911 void kvm_arch_end_assignment(struct kvm *kvm)
9912 {
9913         atomic_dec(&kvm->arch.assigned_device_count);
9914 }
9915 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9916
9917 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9918 {
9919         return atomic_read(&kvm->arch.assigned_device_count);
9920 }
9921 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9922
9923 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9924 {
9925         atomic_inc(&kvm->arch.noncoherent_dma_count);
9926 }
9927 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9928
9929 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9930 {
9931         atomic_dec(&kvm->arch.noncoherent_dma_count);
9932 }
9933 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9934
9935 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9936 {
9937         return atomic_read(&kvm->arch.noncoherent_dma_count);
9938 }
9939 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9940
9941 bool kvm_arch_has_irq_bypass(void)
9942 {
9943         return kvm_x86_ops->update_pi_irte != NULL;
9944 }
9945
9946 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9947                                       struct irq_bypass_producer *prod)
9948 {
9949         struct kvm_kernel_irqfd *irqfd =
9950                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9951
9952         irqfd->producer = prod;
9953
9954         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9955                                            prod->irq, irqfd->gsi, 1);
9956 }
9957
9958 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9959                                       struct irq_bypass_producer *prod)
9960 {
9961         int ret;
9962         struct kvm_kernel_irqfd *irqfd =
9963                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9964
9965         WARN_ON(irqfd->producer != prod);
9966         irqfd->producer = NULL;
9967
9968         /*
9969          * When producer of consumer is unregistered, we change back to
9970          * remapped mode, so we can re-use the current implementation
9971          * when the irq is masked/disabled or the consumer side (KVM
9972          * int this case doesn't want to receive the interrupts.
9973         */
9974         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9975         if (ret)
9976                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9977                        " fails: %d\n", irqfd->consumer.token, ret);
9978 }
9979
9980 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9981                                    uint32_t guest_irq, bool set)
9982 {
9983         if (!kvm_x86_ops->update_pi_irte)
9984                 return -EINVAL;
9985
9986         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9987 }
9988
9989 bool kvm_vector_hashing_enabled(void)
9990 {
9991         return vector_hashing;
9992 }
9993 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9994
9995 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
9996 {
9997         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
9998 }
9999 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10000
10001
10002 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10003 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10004 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10005 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10006 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10007 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10008 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10009 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10010 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10011 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10012 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10013 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10014 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10015 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10016 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
10017 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10018 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10019 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10020 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);