arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31
  32 #include <linux/clocksource.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/kvm.h>
  35 #include <linux/fs.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/module.h>
  38 #include <linux/mman.h>
  39 #include <linux/highmem.h>
  40 #include <linux/iommu.h>
  41 #include <linux/intel-iommu.h>
  42 #include <linux/cpufreq.h>
  43 #include <linux/user-return-notifier.h>
  44 #include <linux/srcu.h>
  45 #include <linux/slab.h>
  46 #include <linux/perf_event.h>
  47 #include <linux/uaccess.h>
  48 #include <linux/hash.h>
  49 #include <linux/pci.h>
  50 #include <linux/timekeeper_internal.h>
  51 #include <linux/pvclock_gtod.h>
  52 #include <trace/events/kvm.h>
  53
  54 #define CREATE_TRACE_POINTS
  55 #include "trace.h"
  56
  57 #include <asm/debugreg.h>
  58 #include <asm/msr.h>
  59 #include <asm/desc.h>
  60 #include <asm/mtrr.h>
  61 #include <asm/mce.h>
  62 #include <asm/i387.h>
  63 #include <asm/fpu-internal.h> /* Ugh! */
  64 #include <asm/xcr.h>
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67
  68 #define MAX_IO_MSRS 256
  69 #define KVM_MAX_MCE_BANKS 32
  70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  71
  72 #define emul_to_vcpu(ctxt) \
  73         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  74
  75 /* EFER defaults:
  76  * - enable syscall per default because its emulated by KVM
  77  * - enable LME and LMA per default on 64 bit KVM
  78  */
  79 #ifdef CONFIG_X86_64
  80 static
  81 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  82 #else
  83 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  84 #endif
  85
  86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  88
  89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  90 static void process_nmi(struct kvm_vcpu *vcpu);
  91 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  92
  93 struct kvm_x86_ops *kvm_x86_ops;
  94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  95
  96 static bool ignore_msrs = 0;
  97 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  98
  99 unsigned int min_timer_period_us = 500;
 100 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 101
 102 bool kvm_has_tsc_control;
 103 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 104 u32  kvm_max_guest_tsc_khz;
 105 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 106
 107 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 108 static u32 tsc_tolerance_ppm = 250;
 109 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 110
 111 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 112 unsigned int lapic_timer_advance_ns = 0;
 113 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 114
 115 static bool backwards_tsc_observed = false;
 116
 117 #define KVM_NR_SHARED_MSRS 16
 118
 119 struct kvm_shared_msrs_global {
 120         int nr;
 121         u32 msrs[KVM_NR_SHARED_MSRS];
 122 };
 123
 124 struct kvm_shared_msrs {
 125         struct user_return_notifier urn;
 126         bool registered;
 127         struct kvm_shared_msr_values {
 128                 u64 host;
 129                 u64 curr;
 130         } values[KVM_NR_SHARED_MSRS];
 131 };
 132
 133 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 134 static struct kvm_shared_msrs __percpu *shared_msrs;
 135
 136 struct kvm_stats_debugfs_item debugfs_entries[] = {
 137         { "pf_fixed", VCPU_STAT(pf_fixed) },
 138         { "pf_guest", VCPU_STAT(pf_guest) },
 139         { "tlb_flush", VCPU_STAT(tlb_flush) },
 140         { "invlpg", VCPU_STAT(invlpg) },
 141         { "exits", VCPU_STAT(exits) },
 142         { "io_exits", VCPU_STAT(io_exits) },
 143         { "mmio_exits", VCPU_STAT(mmio_exits) },
 144         { "signal_exits", VCPU_STAT(signal_exits) },
 145         { "irq_window", VCPU_STAT(irq_window_exits) },
 146         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 147         { "halt_exits", VCPU_STAT(halt_exits) },
 148         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 149         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 150         { "hypercalls", VCPU_STAT(hypercalls) },
 151         { "request_irq", VCPU_STAT(request_irq_exits) },
 152         { "irq_exits", VCPU_STAT(irq_exits) },
 153         { "host_state_reload", VCPU_STAT(host_state_reload) },
 154         { "efer_reload", VCPU_STAT(efer_reload) },
 155         { "fpu_reload", VCPU_STAT(fpu_reload) },
 156         { "insn_emulation", VCPU_STAT(insn_emulation) },
 157         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 158         { "irq_injections", VCPU_STAT(irq_injections) },
 159         { "nmi_injections", VCPU_STAT(nmi_injections) },
 160         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 161         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 162         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 163         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 164         { "mmu_flooded", VM_STAT(mmu_flooded) },
 165         { "mmu_recycled", VM_STAT(mmu_recycled) },
 166         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 167         { "mmu_unsync", VM_STAT(mmu_unsync) },
 168         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 169         { "largepages", VM_STAT(lpages) },
 170         { NULL }
 171 };
 172
 173 u64 __read_mostly host_xcr0;
 174
 175 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 176
 177 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 178 {
 179         int i;
 180         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 181                 vcpu->arch.apf.gfns[i] = ~0;
 182 }
 183
 184 static void kvm_on_user_return(struct user_return_notifier *urn)
 185 {
 186         unsigned slot;
 187         struct kvm_shared_msrs *locals
 188                 = container_of(urn, struct kvm_shared_msrs, urn);
 189         struct kvm_shared_msr_values *values;
 190
 191         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 192                 values = &locals->values[slot];
 193                 if (values->host != values->curr) {
 194                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 195                         values->curr = values->host;
 196                 }
 197         }
 198         locals->registered = false;
 199         user_return_notifier_unregister(urn);
 200 }
 201
 202 static void shared_msr_update(unsigned slot, u32 msr)
 203 {
 204         u64 value;
 205         unsigned int cpu = smp_processor_id();
 206         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 207
 208         /* only read, and nobody should modify it at this time,
 209          * so don't need lock */
 210         if (slot >= shared_msrs_global.nr) {
 211                 printk(KERN_ERR "kvm: invalid MSR slot!");
 212                 return;
 213         }
 214         rdmsrl_safe(msr, &value);
 215         smsr->values[slot].host = value;
 216         smsr->values[slot].curr = value;
 217 }
 218
 219 void kvm_define_shared_msr(unsigned slot, u32 msr)
 220 {
 221         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 222         if (slot >= shared_msrs_global.nr)
 223                 shared_msrs_global.nr = slot + 1;
 224         shared_msrs_global.msrs[slot] = msr;
 225         /* we need ensured the shared_msr_global have been updated */
 226         smp_wmb();
 227 }
 228 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 229
 230 static void kvm_shared_msr_cpu_online(void)
 231 {
 232         unsigned i;
 233
 234         for (i = 0; i < shared_msrs_global.nr; ++i)
 235                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 236 }
 237
 238 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 239 {
 240         unsigned int cpu = smp_processor_id();
 241         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 242         int err;
 243
 244         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 245                 return 0;
 246         smsr->values[slot].curr = value;
 247         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 248         if (err)
 249                 return 1;
 250
 251         if (!smsr->registered) {
 252                 smsr->urn.on_user_return = kvm_on_user_return;
 253                 user_return_notifier_register(&smsr->urn);
 254                 smsr->registered = true;
 255         }
 256         return 0;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 259
 260 static void drop_user_return_notifiers(void)
 261 {
 262         unsigned int cpu = smp_processor_id();
 263         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 264
 265         if (smsr->registered)
 266                 kvm_on_user_return(&smsr->urn);
 267 }
 268
 269 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 270 {
 271         return vcpu->arch.apic_base;
 272 }
 273 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 274
 275 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 276 {
 277         u64 old_state = vcpu->arch.apic_base &
 278                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 279         u64 new_state = msr_info->data &
 280                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 281         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 282                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 283
 284         if (!msr_info->host_initiated &&
 285             ((msr_info->data & reserved_bits) != 0 ||
 286              new_state == X2APIC_ENABLE ||
 287              (new_state == MSR_IA32_APICBASE_ENABLE &&
 288               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 289              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 290               old_state == 0)))
 291                 return 1;
 292
 293         kvm_lapic_set_base(vcpu, msr_info->data);
 294         return 0;
 295 }
 296 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 297
 298 asmlinkage __visible void kvm_spurious_fault(void)
 299 {
 300         /* Fault while not rebooting.  We want the trace. */
 301         BUG();
 302 }
 303 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 304
 305 #define EXCPT_BENIGN            0
 306 #define EXCPT_CONTRIBUTORY      1
 307 #define EXCPT_PF                2
 308
 309 static int exception_class(int vector)
 310 {
 311         switch (vector) {
 312         case PF_VECTOR:
 313                 return EXCPT_PF;
 314         case DE_VECTOR:
 315         case TS_VECTOR:
 316         case NP_VECTOR:
 317         case SS_VECTOR:
 318         case GP_VECTOR:
 319                 return EXCPT_CONTRIBUTORY;
 320         default:
 321                 break;
 322         }
 323         return EXCPT_BENIGN;
 324 }
 325
 326 #define EXCPT_FAULT             0
 327 #define EXCPT_TRAP              1
 328 #define EXCPT_ABORT             2
 329 #define EXCPT_INTERRUPT         3
 330
 331 static int exception_type(int vector)
 332 {
 333         unsigned int mask;
 334
 335         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 336                 return EXCPT_INTERRUPT;
 337
 338         mask = 1 << vector;
 339
 340         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 341         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 342                 return EXCPT_TRAP;
 343
 344         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 345                 return EXCPT_ABORT;
 346
 347         /* Reserved exceptions will result in fault */
 348         return EXCPT_FAULT;
 349 }
 350
 351 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 352                 unsigned nr, bool has_error, u32 error_code,
 353                 bool reinject)
 354 {
 355         u32 prev_nr;
 356         int class1, class2;
 357
 358         kvm_make_request(KVM_REQ_EVENT, vcpu);
 359
 360         if (!vcpu->arch.exception.pending) {
 361         queue:
 362                 if (has_error && !is_protmode(vcpu))
 363                         has_error = false;
 364                 vcpu->arch.exception.pending = true;
 365                 vcpu->arch.exception.has_error_code = has_error;
 366                 vcpu->arch.exception.nr = nr;
 367                 vcpu->arch.exception.error_code = error_code;
 368                 vcpu->arch.exception.reinject = reinject;
 369                 return;
 370         }
 371
 372         /* to check exception */
 373         prev_nr = vcpu->arch.exception.nr;
 374         if (prev_nr == DF_VECTOR) {
 375                 /* triple fault -> shutdown */
 376                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 377                 return;
 378         }
 379         class1 = exception_class(prev_nr);
 380         class2 = exception_class(nr);
 381         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 382                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 383                 /* generate double fault per SDM Table 5-5 */
 384                 vcpu->arch.exception.pending = true;
 385                 vcpu->arch.exception.has_error_code = true;
 386                 vcpu->arch.exception.nr = DF_VECTOR;
 387                 vcpu->arch.exception.error_code = 0;
 388         } else
 389                 /* replace previous exception with a new one in a hope
 390                    that instruction re-execution will regenerate lost
 391                    exception */
 392                 goto queue;
 393 }
 394
 395 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 396 {
 397         kvm_multiple_exception(vcpu, nr, false, 0, false);
 398 }
 399 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 400
 401 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 402 {
 403         kvm_multiple_exception(vcpu, nr, false, 0, true);
 404 }
 405 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 406
 407 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 408 {
 409         if (err)
 410                 kvm_inject_gp(vcpu, 0);
 411         else
 412                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 413 }
 414 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 415
 416 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 417 {
 418         ++vcpu->stat.pf_guest;
 419         vcpu->arch.cr2 = fault->address;
 420         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 421 }
 422 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 423
 424 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 425 {
 426         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 427                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 428         else
 429                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 430
 431         return fault->nested_page_fault;
 432 }
 433
 434 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 435 {
 436         atomic_inc(&vcpu->arch.nmi_queued);
 437         kvm_make_request(KVM_REQ_NMI, vcpu);
 438 }
 439 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 440
 441 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 442 {
 443         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 444 }
 445 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 446
 447 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 448 {
 449         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 450 }
 451 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 452
 453 /*
 454  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 455  * a #GP and return false.
 456  */
 457 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 458 {
 459         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 460                 return true;
 461         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 462         return false;
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 465
 466 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 467 {
 468         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 469                 return true;
 470
 471         kvm_queue_exception(vcpu, UD_VECTOR);
 472         return false;
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_require_dr);
 475
 476 /*
 477  * This function will be used to read from the physical memory of the currently
 478  * running guest. The difference to kvm_read_guest_page is that this function
 479  * can read from guest physical or from the guest's guest physical memory.
 480  */
 481 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 482                             gfn_t ngfn, void *data, int offset, int len,
 483                             u32 access)
 484 {
 485         struct x86_exception exception;
 486         gfn_t real_gfn;
 487         gpa_t ngpa;
 488
 489         ngpa     = gfn_to_gpa(ngfn);
 490         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 491         if (real_gfn == UNMAPPED_GVA)
 492                 return -EFAULT;
 493
 494         real_gfn = gpa_to_gfn(real_gfn);
 495
 496         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 497 }
 498 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 499
 500 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 501                                void *data, int offset, int len, u32 access)
 502 {
 503         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 504                                        data, offset, len, access);
 505 }
 506
 507 /*
 508  * Load the pae pdptrs.  Return true is they are all valid.
 509  */
 510 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 511 {
 512         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 513         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 514         int i;
 515         int ret;
 516         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 517
 518         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 519                                       offset * sizeof(u64), sizeof(pdpte),
 520                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 521         if (ret < 0) {
 522                 ret = 0;
 523                 goto out;
 524         }
 525         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 526                 if (is_present_gpte(pdpte[i]) &&
 527                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 528                         ret = 0;
 529                         goto out;
 530                 }
 531         }
 532         ret = 1;
 533
 534         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 535         __set_bit(VCPU_EXREG_PDPTR,
 536                   (unsigned long *)&vcpu->arch.regs_avail);
 537         __set_bit(VCPU_EXREG_PDPTR,
 538                   (unsigned long *)&vcpu->arch.regs_dirty);
 539 out:
 540
 541         return ret;
 542 }
 543 EXPORT_SYMBOL_GPL(load_pdptrs);
 544
 545 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 546 {
 547         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 548         bool changed = true;
 549         int offset;
 550         gfn_t gfn;
 551         int r;
 552
 553         if (is_long_mode(vcpu) || !is_pae(vcpu))
 554                 return false;
 555
 556         if (!test_bit(VCPU_EXREG_PDPTR,
 557                       (unsigned long *)&vcpu->arch.regs_avail))
 558                 return true;
 559
 560         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 561         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 562         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 563                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 564         if (r < 0)
 565                 goto out;
 566         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 567 out:
 568
 569         return changed;
 570 }
 571
 572 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 573 {
 574         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 575         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 576                                     X86_CR0_CD | X86_CR0_NW;
 577
 578         cr0 |= X86_CR0_ET;
 579
 580 #ifdef CONFIG_X86_64
 581         if (cr0 & 0xffffffff00000000UL)
 582                 return 1;
 583 #endif
 584
 585         cr0 &= ~CR0_RESERVED_BITS;
 586
 587         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 588                 return 1;
 589
 590         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 591                 return 1;
 592
 593         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 594 #ifdef CONFIG_X86_64
 595                 if ((vcpu->arch.efer & EFER_LME)) {
 596                         int cs_db, cs_l;
 597
 598                         if (!is_pae(vcpu))
 599                                 return 1;
 600                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 601                         if (cs_l)
 602                                 return 1;
 603                 } else
 604 #endif
 605                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 606                                                  kvm_read_cr3(vcpu)))
 607                         return 1;
 608         }
 609
 610         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 611                 return 1;
 612
 613         kvm_x86_ops->set_cr0(vcpu, cr0);
 614
 615         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 616                 kvm_clear_async_pf_completion_queue(vcpu);
 617                 kvm_async_pf_hash_reset(vcpu);
 618         }
 619
 620         if ((cr0 ^ old_cr0) & update_bits)
 621                 kvm_mmu_reset_context(vcpu);
 622         return 0;
 623 }
 624 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 625
 626 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 627 {
 628         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 629 }
 630 EXPORT_SYMBOL_GPL(kvm_lmsw);
 631
 632 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 633 {
 634         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 635                         !vcpu->guest_xcr0_loaded) {
 636                 /* kvm_set_xcr() also depends on this */
 637                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 638                 vcpu->guest_xcr0_loaded = 1;
 639         }
 640 }
 641
 642 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 643 {
 644         if (vcpu->guest_xcr0_loaded) {
 645                 if (vcpu->arch.xcr0 != host_xcr0)
 646                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 647                 vcpu->guest_xcr0_loaded = 0;
 648         }
 649 }
 650
 651 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 652 {
 653         u64 xcr0 = xcr;
 654         u64 old_xcr0 = vcpu->arch.xcr0;
 655         u64 valid_bits;
 656
 657         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 658         if (index != XCR_XFEATURE_ENABLED_MASK)
 659                 return 1;
 660         if (!(xcr0 & XSTATE_FP))
 661                 return 1;
 662         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 663                 return 1;
 664
 665         /*
 666          * Do not allow the guest to set bits that we do not support
 667          * saving.  However, xcr0 bit 0 is always set, even if the
 668          * emulated CPU does not support XSAVE (see fx_init).
 669          */
 670         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 671         if (xcr0 & ~valid_bits)
 672                 return 1;
 673
 674         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 675                 return 1;
 676
 677         if (xcr0 & XSTATE_AVX512) {
 678                 if (!(xcr0 & XSTATE_YMM))
 679                         return 1;
 680                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 681                         return 1;
 682         }
 683         kvm_put_guest_xcr0(vcpu);
 684         vcpu->arch.xcr0 = xcr0;
 685
 686         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 687                 kvm_update_cpuid(vcpu);
 688         return 0;
 689 }
 690
 691 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 692 {
 693         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 694             __kvm_set_xcr(vcpu, index, xcr)) {
 695                 kvm_inject_gp(vcpu, 0);
 696                 return 1;
 697         }
 698         return 0;
 699 }
 700 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 701
 702 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 703 {
 704         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 705         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 706                                    X86_CR4_PAE | X86_CR4_SMEP;
 707         if (cr4 & CR4_RESERVED_BITS)
 708                 return 1;
 709
 710         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 711                 return 1;
 712
 713         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 714                 return 1;
 715
 716         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 717                 return 1;
 718
 719         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 720                 return 1;
 721
 722         if (is_long_mode(vcpu)) {
 723                 if (!(cr4 & X86_CR4_PAE))
 724                         return 1;
 725         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 726                    && ((cr4 ^ old_cr4) & pdptr_bits)
 727                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 728                                    kvm_read_cr3(vcpu)))
 729                 return 1;
 730
 731         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 732                 if (!guest_cpuid_has_pcid(vcpu))
 733                         return 1;
 734
 735                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 736                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 737                         return 1;
 738         }
 739
 740         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 741                 return 1;
 742
 743         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 744             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 745                 kvm_mmu_reset_context(vcpu);
 746
 747         if ((cr4 ^ old_cr4) & X86_CR4_SMAP)
 748                 update_permission_bitmask(vcpu, vcpu->arch.walk_mmu, false);
 749
 750         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 751                 kvm_update_cpuid(vcpu);
 752
 753         return 0;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 756
 757 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 758 {
 759 #ifdef CONFIG_X86_64
 760         cr3 &= ~CR3_PCID_INVD;
 761 #endif
 762
 763         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 764                 kvm_mmu_sync_roots(vcpu);
 765                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 766                 return 0;
 767         }
 768
 769         if (is_long_mode(vcpu)) {
 770                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 771                         return 1;
 772         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 773                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 774                 return 1;
 775
 776         vcpu->arch.cr3 = cr3;
 777         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 778         kvm_mmu_new_cr3(vcpu);
 779         return 0;
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 782
 783 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 784 {
 785         if (cr8 & CR8_RESERVED_BITS)
 786                 return 1;
 787         if (irqchip_in_kernel(vcpu->kvm))
 788                 kvm_lapic_set_tpr(vcpu, cr8);
 789         else
 790                 vcpu->arch.cr8 = cr8;
 791         return 0;
 792 }
 793 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 794
 795 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 796 {
 797         if (irqchip_in_kernel(vcpu->kvm))
 798                 return kvm_lapic_get_cr8(vcpu);
 799         else
 800                 return vcpu->arch.cr8;
 801 }
 802 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 803
 804 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 805 {
 806         int i;
 807
 808         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 809                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 810                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 811                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 812         }
 813 }
 814
 815 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 816 {
 817         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 818                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 819 }
 820
 821 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 822 {
 823         unsigned long dr7;
 824
 825         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 826                 dr7 = vcpu->arch.guest_debug_dr7;
 827         else
 828                 dr7 = vcpu->arch.dr7;
 829         kvm_x86_ops->set_dr7(vcpu, dr7);
 830         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 831         if (dr7 & DR7_BP_EN_MASK)
 832                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 833 }
 834
 835 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 836 {
 837         u64 fixed = DR6_FIXED_1;
 838
 839         if (!guest_cpuid_has_rtm(vcpu))
 840                 fixed |= DR6_RTM;
 841         return fixed;
 842 }
 843
 844 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 845 {
 846         switch (dr) {
 847         case 0 ... 3:
 848                 vcpu->arch.db[dr] = val;
 849                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 850                         vcpu->arch.eff_db[dr] = val;
 851                 break;
 852         case 4:
 853                 /* fall through */
 854         case 6:
 855                 if (val & 0xffffffff00000000ULL)
 856                         return -1; /* #GP */
 857                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 858                 kvm_update_dr6(vcpu);
 859                 break;
 860         case 5:
 861                 /* fall through */
 862         default: /* 7 */
 863                 if (val & 0xffffffff00000000ULL)
 864                         return -1; /* #GP */
 865                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 866                 kvm_update_dr7(vcpu);
 867                 break;
 868         }
 869
 870         return 0;
 871 }
 872
 873 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 874 {
 875         if (__kvm_set_dr(vcpu, dr, val)) {
 876                 kvm_inject_gp(vcpu, 0);
 877                 return 1;
 878         }
 879         return 0;
 880 }
 881 EXPORT_SYMBOL_GPL(kvm_set_dr);
 882
 883 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 884 {
 885         switch (dr) {
 886         case 0 ... 3:
 887                 *val = vcpu->arch.db[dr];
 888                 break;
 889         case 4:
 890                 /* fall through */
 891         case 6:
 892                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 893                         *val = vcpu->arch.dr6;
 894                 else
 895                         *val = kvm_x86_ops->get_dr6(vcpu);
 896                 break;
 897         case 5:
 898                 /* fall through */
 899         default: /* 7 */
 900                 *val = vcpu->arch.dr7;
 901                 break;
 902         }
 903         return 0;
 904 }
 905 EXPORT_SYMBOL_GPL(kvm_get_dr);
 906
 907 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 908 {
 909         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 910         u64 data;
 911         int err;
 912
 913         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 914         if (err)
 915                 return err;
 916         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 917         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 918         return err;
 919 }
 920 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 921
 922 /*
 923  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 924  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 925  *
 926  * This list is modified at module load time to reflect the
 927  * capabilities of the host cpu. This capabilities test skips MSRs that are
 928  * kvm-specific. Those are put in the beginning of the list.
 929  */
 930
 931 #define KVM_SAVE_MSRS_BEGIN     12
 932 static u32 msrs_to_save[] = {
 933         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 934         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 935         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 936         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 937         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 938         MSR_KVM_PV_EOI_EN,
 939         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 940         MSR_STAR,
 941 #ifdef CONFIG_X86_64
 942         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 943 #endif
 944         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 945         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 946 };
 947
 948 static unsigned num_msrs_to_save;
 949
 950 static const u32 emulated_msrs[] = {
 951         MSR_IA32_TSC_ADJUST,
 952         MSR_IA32_TSCDEADLINE,
 953         MSR_IA32_MISC_ENABLE,
 954         MSR_IA32_MCG_STATUS,
 955         MSR_IA32_MCG_CTL,
 956 };
 957
 958 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 959 {
 960         if (efer & efer_reserved_bits)
 961                 return false;
 962
 963         if (efer & EFER_FFXSR) {
 964                 struct kvm_cpuid_entry2 *feat;
 965
 966                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 967                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 968                         return false;
 969         }
 970
 971         if (efer & EFER_SVME) {
 972                 struct kvm_cpuid_entry2 *feat;
 973
 974                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 975                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 976                         return false;
 977         }
 978
 979         return true;
 980 }
 981 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 982
 983 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 984 {
 985         u64 old_efer = vcpu->arch.efer;
 986
 987         if (!kvm_valid_efer(vcpu, efer))
 988                 return 1;
 989
 990         if (is_paging(vcpu)
 991             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 992                 return 1;
 993
 994         efer &= ~EFER_LMA;
 995         efer |= vcpu->arch.efer & EFER_LMA;
 996
 997         kvm_x86_ops->set_efer(vcpu, efer);
 998
 999         /* Update reserved bits */
1000         if ((efer ^ old_efer) & EFER_NX)
1001                 kvm_mmu_reset_context(vcpu);
1002
1003         return 0;
1004 }
1005
1006 void kvm_enable_efer_bits(u64 mask)
1007 {
1008        efer_reserved_bits &= ~mask;
1009 }
1010 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1011
1012 /*
1013  * Writes msr value into into the appropriate "register".
1014  * Returns 0 on success, non-0 otherwise.
1015  * Assumes vcpu_load() was already called.
1016  */
1017 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1018 {
1019         switch (msr->index) {
1020         case MSR_FS_BASE:
1021         case MSR_GS_BASE:
1022         case MSR_KERNEL_GS_BASE:
1023         case MSR_CSTAR:
1024         case MSR_LSTAR:
1025                 if (is_noncanonical_address(msr->data))
1026                         return 1;
1027                 break;
1028         case MSR_IA32_SYSENTER_EIP:
1029         case MSR_IA32_SYSENTER_ESP:
1030                 /*
1031                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1032                  * non-canonical address is written on Intel but not on
1033                  * AMD (which ignores the top 32-bits, because it does
1034                  * not implement 64-bit SYSENTER).
1035                  *
1036                  * 64-bit code should hence be able to write a non-canonical
1037                  * value on AMD.  Making the address canonical ensures that
1038                  * vmentry does not fail on Intel after writing a non-canonical
1039                  * value, and that something deterministic happens if the guest
1040                  * invokes 64-bit SYSENTER.
1041                  */
1042                 msr->data = get_canonical(msr->data);
1043         }
1044         return kvm_x86_ops->set_msr(vcpu, msr);
1045 }
1046 EXPORT_SYMBOL_GPL(kvm_set_msr);
1047
1048 /*
1049  * Adapt set_msr() to msr_io()'s calling convention
1050  */
1051 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1052 {
1053         struct msr_data msr;
1054
1055         msr.data = *data;
1056         msr.index = index;
1057         msr.host_initiated = true;
1058         return kvm_set_msr(vcpu, &msr);
1059 }
1060
1061 #ifdef CONFIG_X86_64
1062 struct pvclock_gtod_data {
1063         seqcount_t      seq;
1064
1065         struct { /* extract of a clocksource struct */
1066                 int vclock_mode;
1067                 cycle_t cycle_last;
1068                 cycle_t mask;
1069                 u32     mult;
1070                 u32     shift;
1071         } clock;
1072
1073         u64             boot_ns;
1074         u64             nsec_base;
1075 };
1076
1077 static struct pvclock_gtod_data pvclock_gtod_data;
1078
1079 static void update_pvclock_gtod(struct timekeeper *tk)
1080 {
1081         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1082         u64 boot_ns;
1083
1084         boot_ns = ktime_to_ns(ktime_add(tk->tkr.base_mono, tk->offs_boot));
1085
1086         write_seqcount_begin(&vdata->seq);
1087
1088         /* copy pvclock gtod data */
1089         vdata->clock.vclock_mode        = tk->tkr.clock->archdata.vclock_mode;
1090         vdata->clock.cycle_last         = tk->tkr.cycle_last;
1091         vdata->clock.mask               = tk->tkr.mask;
1092         vdata->clock.mult               = tk->tkr.mult;
1093         vdata->clock.shift              = tk->tkr.shift;
1094
1095         vdata->boot_ns                  = boot_ns;
1096         vdata->nsec_base                = tk->tkr.xtime_nsec;
1097
1098         write_seqcount_end(&vdata->seq);
1099 }
1100 #endif
1101
1102 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1103 {
1104         /*
1105          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1106          * vcpu_enter_guest.  This function is only called from
1107          * the physical CPU that is running vcpu.
1108          */
1109         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1110 }
1111
1112 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1113 {
1114         int version;
1115         int r;
1116         struct pvclock_wall_clock wc;
1117         struct timespec boot;
1118
1119         if (!wall_clock)
1120                 return;
1121
1122         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1123         if (r)
1124                 return;
1125
1126         if (version & 1)
1127                 ++version;  /* first time write, random junk */
1128
1129         ++version;
1130
1131         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1132
1133         /*
1134          * The guest calculates current wall clock time by adding
1135          * system time (updated by kvm_guest_time_update below) to the
1136          * wall clock specified here.  guest system time equals host
1137          * system time for us, thus we must fill in host boot time here.
1138          */
1139         getboottime(&boot);
1140
1141         if (kvm->arch.kvmclock_offset) {
1142                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1143                 boot = timespec_sub(boot, ts);
1144         }
1145         wc.sec = boot.tv_sec;
1146         wc.nsec = boot.tv_nsec;
1147         wc.version = version;
1148
1149         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1150
1151         version++;
1152         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1153 }
1154
1155 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1156 {
1157         uint32_t quotient, remainder;
1158
1159         /* Don't try to replace with do_div(), this one calculates
1160          * "(dividend << 32) / divisor" */
1161         __asm__ ( "divl %4"
1162                   : "=a" (quotient), "=d" (remainder)
1163                   : "0" (0), "1" (dividend), "r" (divisor) );
1164         return quotient;
1165 }
1166
1167 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1168                                s8 *pshift, u32 *pmultiplier)
1169 {
1170         uint64_t scaled64;
1171         int32_t  shift = 0;
1172         uint64_t tps64;
1173         uint32_t tps32;
1174
1175         tps64 = base_khz * 1000LL;
1176         scaled64 = scaled_khz * 1000LL;
1177         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1178                 tps64 >>= 1;
1179                 shift--;
1180         }
1181
1182         tps32 = (uint32_t)tps64;
1183         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1184                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1185                         scaled64 >>= 1;
1186                 else
1187                         tps32 <<= 1;
1188                 shift++;
1189         }
1190
1191         *pshift = shift;
1192         *pmultiplier = div_frac(scaled64, tps32);
1193
1194         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1195                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1196 }
1197
1198 static inline u64 get_kernel_ns(void)
1199 {
1200         return ktime_get_boot_ns();
1201 }
1202
1203 #ifdef CONFIG_X86_64
1204 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1205 #endif
1206
1207 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1208 static unsigned long max_tsc_khz;
1209
1210 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1211 {
1212         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1213                                    vcpu->arch.virtual_tsc_shift);
1214 }
1215
1216 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1217 {
1218         u64 v = (u64)khz * (1000000 + ppm);
1219         do_div(v, 1000000);
1220         return v;
1221 }
1222
1223 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1224 {
1225         u32 thresh_lo, thresh_hi;
1226         int use_scaling = 0;
1227
1228         /* tsc_khz can be zero if TSC calibration fails */
1229         if (this_tsc_khz == 0)
1230                 return;
1231
1232         /* Compute a scale to convert nanoseconds in TSC cycles */
1233         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1234                            &vcpu->arch.virtual_tsc_shift,
1235                            &vcpu->arch.virtual_tsc_mult);
1236         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1237
1238         /*
1239          * Compute the variation in TSC rate which is acceptable
1240          * within the range of tolerance and decide if the
1241          * rate being applied is within that bounds of the hardware
1242          * rate.  If so, no scaling or compensation need be done.
1243          */
1244         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1245         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1246         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1247                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1248                 use_scaling = 1;
1249         }
1250         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1251 }
1252
1253 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1254 {
1255         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1256                                       vcpu->arch.virtual_tsc_mult,
1257                                       vcpu->arch.virtual_tsc_shift);
1258         tsc += vcpu->arch.this_tsc_write;
1259         return tsc;
1260 }
1261
1262 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1263 {
1264 #ifdef CONFIG_X86_64
1265         bool vcpus_matched;
1266         struct kvm_arch *ka = &vcpu->kvm->arch;
1267         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1268
1269         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1270                          atomic_read(&vcpu->kvm->online_vcpus));
1271
1272         /*
1273          * Once the masterclock is enabled, always perform request in
1274          * order to update it.
1275          *
1276          * In order to enable masterclock, the host clocksource must be TSC
1277          * and the vcpus need to have matched TSCs.  When that happens,
1278          * perform request to enable masterclock.
1279          */
1280         if (ka->use_master_clock ||
1281             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1282                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1283
1284         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1285                             atomic_read(&vcpu->kvm->online_vcpus),
1286                             ka->use_master_clock, gtod->clock.vclock_mode);
1287 #endif
1288 }
1289
1290 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1291 {
1292         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1293         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1294 }
1295
1296 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1297 {
1298         struct kvm *kvm = vcpu->kvm;
1299         u64 offset, ns, elapsed;
1300         unsigned long flags;
1301         s64 usdiff;
1302         bool matched;
1303         bool already_matched;
1304         u64 data = msr->data;
1305
1306         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1307         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1308         ns = get_kernel_ns();
1309         elapsed = ns - kvm->arch.last_tsc_nsec;
1310
1311         if (vcpu->arch.virtual_tsc_khz) {
1312                 int faulted = 0;
1313
1314                 /* n.b - signed multiplication and division required */
1315                 usdiff = data - kvm->arch.last_tsc_write;
1316 #ifdef CONFIG_X86_64
1317                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1318 #else
1319                 /* do_div() only does unsigned */
1320                 asm("1: idivl %[divisor]\n"
1321                     "2: xor %%edx, %%edx\n"
1322                     "   movl $0, %[faulted]\n"
1323                     "3:\n"
1324                     ".section .fixup,\"ax\"\n"
1325                     "4: movl $1, %[faulted]\n"
1326                     "   jmp  3b\n"
1327                     ".previous\n"
1328
1329                 _ASM_EXTABLE(1b, 4b)
1330
1331                 : "=A"(usdiff), [faulted] "=r" (faulted)
1332                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1333
1334 #endif
1335                 do_div(elapsed, 1000);
1336                 usdiff -= elapsed;
1337                 if (usdiff < 0)
1338                         usdiff = -usdiff;
1339
1340                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1341                 if (faulted)
1342                         usdiff = USEC_PER_SEC;
1343         } else
1344                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1345
1346         /*
1347          * Special case: TSC write with a small delta (1 second) of virtual
1348          * cycle time against real time is interpreted as an attempt to
1349          * synchronize the CPU.
1350          *
1351          * For a reliable TSC, we can match TSC offsets, and for an unstable
1352          * TSC, we add elapsed time in this computation.  We could let the
1353          * compensation code attempt to catch up if we fall behind, but
1354          * it's better to try to match offsets from the beginning.
1355          */
1356         if (usdiff < USEC_PER_SEC &&
1357             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1358                 if (!check_tsc_unstable()) {
1359                         offset = kvm->arch.cur_tsc_offset;
1360                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1361                 } else {
1362                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1363                         data += delta;
1364                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1365                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1366                 }
1367                 matched = true;
1368                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1369         } else {
1370                 /*
1371                  * We split periods of matched TSC writes into generations.
1372                  * For each generation, we track the original measured
1373                  * nanosecond time, offset, and write, so if TSCs are in
1374                  * sync, we can match exact offset, and if not, we can match
1375                  * exact software computation in compute_guest_tsc()
1376                  *
1377                  * These values are tracked in kvm->arch.cur_xxx variables.
1378                  */
1379                 kvm->arch.cur_tsc_generation++;
1380                 kvm->arch.cur_tsc_nsec = ns;
1381                 kvm->arch.cur_tsc_write = data;
1382                 kvm->arch.cur_tsc_offset = offset;
1383                 matched = false;
1384                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1385                          kvm->arch.cur_tsc_generation, data);
1386         }
1387
1388         /*
1389          * We also track th most recent recorded KHZ, write and time to
1390          * allow the matching interval to be extended at each write.
1391          */
1392         kvm->arch.last_tsc_nsec = ns;
1393         kvm->arch.last_tsc_write = data;
1394         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1395
1396         vcpu->arch.last_guest_tsc = data;
1397
1398         /* Keep track of which generation this VCPU has synchronized to */
1399         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1400         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1401         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1402
1403         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1404                 update_ia32_tsc_adjust_msr(vcpu, offset);
1405         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1406         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1407
1408         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1409         if (!matched) {
1410                 kvm->arch.nr_vcpus_matched_tsc = 0;
1411         } else if (!already_matched) {
1412                 kvm->arch.nr_vcpus_matched_tsc++;
1413         }
1414
1415         kvm_track_tsc_matching(vcpu);
1416         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1417 }
1418
1419 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1420
1421 #ifdef CONFIG_X86_64
1422
1423 static cycle_t read_tsc(void)
1424 {
1425         cycle_t ret;
1426         u64 last;
1427
1428         /*
1429          * Empirically, a fence (of type that depends on the CPU)
1430          * before rdtsc is enough to ensure that rdtsc is ordered
1431          * with respect to loads.  The various CPU manuals are unclear
1432          * as to whether rdtsc can be reordered with later loads,
1433          * but no one has ever seen it happen.
1434          */
1435         rdtsc_barrier();
1436         ret = (cycle_t)vget_cycles();
1437
1438         last = pvclock_gtod_data.clock.cycle_last;
1439
1440         if (likely(ret >= last))
1441                 return ret;
1442
1443         /*
1444          * GCC likes to generate cmov here, but this branch is extremely
1445          * predictable (it's just a funciton of time and the likely is
1446          * very likely) and there's a data dependence, so force GCC
1447          * to generate a branch instead.  I don't barrier() because
1448          * we don't actually need a barrier, and if this function
1449          * ever gets inlined it will generate worse code.
1450          */
1451         asm volatile ("");
1452         return last;
1453 }
1454
1455 static inline u64 vgettsc(cycle_t *cycle_now)
1456 {
1457         long v;
1458         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1459
1460         *cycle_now = read_tsc();
1461
1462         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1463         return v * gtod->clock.mult;
1464 }
1465
1466 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1467 {
1468         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1469         unsigned long seq;
1470         int mode;
1471         u64 ns;
1472
1473         do {
1474                 seq = read_seqcount_begin(&gtod->seq);
1475                 mode = gtod->clock.vclock_mode;
1476                 ns = gtod->nsec_base;
1477                 ns += vgettsc(cycle_now);
1478                 ns >>= gtod->clock.shift;
1479                 ns += gtod->boot_ns;
1480         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1481         *t = ns;
1482
1483         return mode;
1484 }
1485
1486 /* returns true if host is using tsc clocksource */
1487 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1488 {
1489         /* checked again under seqlock below */
1490         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1491                 return false;
1492
1493         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1494 }
1495 #endif
1496
1497 /*
1498  *
1499  * Assuming a stable TSC across physical CPUS, and a stable TSC
1500  * across virtual CPUs, the following condition is possible.
1501  * Each numbered line represents an event visible to both
1502  * CPUs at the next numbered event.
1503  *
1504  * "timespecX" represents host monotonic time. "tscX" represents
1505  * RDTSC value.
1506  *
1507  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1508  *
1509  * 1.  read timespec0,tsc0
1510  * 2.                                   | timespec1 = timespec0 + N
1511  *                                      | tsc1 = tsc0 + M
1512  * 3. transition to guest               | transition to guest
1513  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1514  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1515  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1516  *
1517  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1518  *
1519  *      - ret0 < ret1
1520  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1521  *              ...
1522  *      - 0 < N - M => M < N
1523  *
1524  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1525  * always the case (the difference between two distinct xtime instances
1526  * might be smaller then the difference between corresponding TSC reads,
1527  * when updating guest vcpus pvclock areas).
1528  *
1529  * To avoid that problem, do not allow visibility of distinct
1530  * system_timestamp/tsc_timestamp values simultaneously: use a master
1531  * copy of host monotonic time values. Update that master copy
1532  * in lockstep.
1533  *
1534  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1535  *
1536  */
1537
1538 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1539 {
1540 #ifdef CONFIG_X86_64
1541         struct kvm_arch *ka = &kvm->arch;
1542         int vclock_mode;
1543         bool host_tsc_clocksource, vcpus_matched;
1544
1545         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1546                         atomic_read(&kvm->online_vcpus));
1547
1548         /*
1549          * If the host uses TSC clock, then passthrough TSC as stable
1550          * to the guest.
1551          */
1552         host_tsc_clocksource = kvm_get_time_and_clockread(
1553                                         &ka->master_kernel_ns,
1554                                         &ka->master_cycle_now);
1555
1556         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1557                                 && !backwards_tsc_observed
1558                                 && !ka->boot_vcpu_runs_old_kvmclock;
1559
1560         if (ka->use_master_clock)
1561                 atomic_set(&kvm_guest_has_master_clock, 1);
1562
1563         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1564         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1565                                         vcpus_matched);
1566 #endif
1567 }
1568
1569 static void kvm_gen_update_masterclock(struct kvm *kvm)
1570 {
1571 #ifdef CONFIG_X86_64
1572         int i;
1573         struct kvm_vcpu *vcpu;
1574         struct kvm_arch *ka = &kvm->arch;
1575
1576         spin_lock(&ka->pvclock_gtod_sync_lock);
1577         kvm_make_mclock_inprogress_request(kvm);
1578         /* no guest entries from this point */
1579         pvclock_update_vm_gtod_copy(kvm);
1580
1581         kvm_for_each_vcpu(i, vcpu, kvm)
1582                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1583
1584         /* guest entries allowed */
1585         kvm_for_each_vcpu(i, vcpu, kvm)
1586                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1587
1588         spin_unlock(&ka->pvclock_gtod_sync_lock);
1589 #endif
1590 }
1591
1592 static int kvm_guest_time_update(struct kvm_vcpu *v)
1593 {
1594         unsigned long flags, this_tsc_khz;
1595         struct kvm_vcpu_arch *vcpu = &v->arch;
1596         struct kvm_arch *ka = &v->kvm->arch;
1597         s64 kernel_ns;
1598         u64 tsc_timestamp, host_tsc;
1599         struct pvclock_vcpu_time_info guest_hv_clock;
1600         u8 pvclock_flags;
1601         bool use_master_clock;
1602
1603         kernel_ns = 0;
1604         host_tsc = 0;
1605
1606         /*
1607          * If the host uses TSC clock, then passthrough TSC as stable
1608          * to the guest.
1609          */
1610         spin_lock(&ka->pvclock_gtod_sync_lock);
1611         use_master_clock = ka->use_master_clock;
1612         if (use_master_clock) {
1613                 host_tsc = ka->master_cycle_now;
1614                 kernel_ns = ka->master_kernel_ns;
1615         }
1616         spin_unlock(&ka->pvclock_gtod_sync_lock);
1617
1618         /* Keep irq disabled to prevent changes to the clock */
1619         local_irq_save(flags);
1620         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1621         if (unlikely(this_tsc_khz == 0)) {
1622                 local_irq_restore(flags);
1623                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1624                 return 1;
1625         }
1626         if (!use_master_clock) {
1627                 host_tsc = native_read_tsc();
1628                 kernel_ns = get_kernel_ns();
1629         }
1630
1631         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1632
1633         /*
1634          * We may have to catch up the TSC to match elapsed wall clock
1635          * time for two reasons, even if kvmclock is used.
1636          *   1) CPU could have been running below the maximum TSC rate
1637          *   2) Broken TSC compensation resets the base at each VCPU
1638          *      entry to avoid unknown leaps of TSC even when running
1639          *      again on the same CPU.  This may cause apparent elapsed
1640          *      time to disappear, and the guest to stand still or run
1641          *      very slowly.
1642          */
1643         if (vcpu->tsc_catchup) {
1644                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1645                 if (tsc > tsc_timestamp) {
1646                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1647                         tsc_timestamp = tsc;
1648                 }
1649         }
1650
1651         local_irq_restore(flags);
1652
1653         if (!vcpu->pv_time_enabled)
1654                 return 0;
1655
1656         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1657                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1658                                    &vcpu->hv_clock.tsc_shift,
1659                                    &vcpu->hv_clock.tsc_to_system_mul);
1660                 vcpu->hw_tsc_khz = this_tsc_khz;
1661         }
1662
1663         /* With all the info we got, fill in the values */
1664         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1665         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1666         vcpu->last_guest_tsc = tsc_timestamp;
1667
1668         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1669                 &guest_hv_clock, sizeof(guest_hv_clock))))
1670                 return 0;
1671
1672         /*
1673          * The interface expects us to write an even number signaling that the
1674          * update is finished. Since the guest won't see the intermediate
1675          * state, we just increase by 2 at the end.
1676          */
1677         vcpu->hv_clock.version = guest_hv_clock.version + 2;
1678
1679         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1680         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1681
1682         if (vcpu->pvclock_set_guest_stopped_request) {
1683                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1684                 vcpu->pvclock_set_guest_stopped_request = false;
1685         }
1686
1687         /* If the host uses TSC clocksource, then it is stable */
1688         if (use_master_clock)
1689                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1690
1691         vcpu->hv_clock.flags = pvclock_flags;
1692
1693         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1694
1695         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1696                                 &vcpu->hv_clock,
1697                                 sizeof(vcpu->hv_clock));
1698         return 0;
1699 }
1700
1701 /*
1702  * kvmclock updates which are isolated to a given vcpu, such as
1703  * vcpu->cpu migration, should not allow system_timestamp from
1704  * the rest of the vcpus to remain static. Otherwise ntp frequency
1705  * correction applies to one vcpu's system_timestamp but not
1706  * the others.
1707  *
1708  * So in those cases, request a kvmclock update for all vcpus.
1709  * We need to rate-limit these requests though, as they can
1710  * considerably slow guests that have a large number of vcpus.
1711  * The time for a remote vcpu to update its kvmclock is bound
1712  * by the delay we use to rate-limit the updates.
1713  */
1714
1715 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1716
1717 static void kvmclock_update_fn(struct work_struct *work)
1718 {
1719         int i;
1720         struct delayed_work *dwork = to_delayed_work(work);
1721         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1722                                            kvmclock_update_work);
1723         struct kvm *kvm = container_of(ka, struct kvm, arch);
1724         struct kvm_vcpu *vcpu;
1725
1726         kvm_for_each_vcpu(i, vcpu, kvm) {
1727                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1728                 kvm_vcpu_kick(vcpu);
1729         }
1730 }
1731
1732 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1733 {
1734         struct kvm *kvm = v->kvm;
1735
1736         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1737         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1738                                         KVMCLOCK_UPDATE_DELAY);
1739 }
1740
1741 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1742
1743 static void kvmclock_sync_fn(struct work_struct *work)
1744 {
1745         struct delayed_work *dwork = to_delayed_work(work);
1746         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1747                                            kvmclock_sync_work);
1748         struct kvm *kvm = container_of(ka, struct kvm, arch);
1749
1750         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1751         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1752                                         KVMCLOCK_SYNC_PERIOD);
1753 }
1754
1755 static bool msr_mtrr_valid(unsigned msr)
1756 {
1757         switch (msr) {
1758         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1759         case MSR_MTRRfix64K_00000:
1760         case MSR_MTRRfix16K_80000:
1761         case MSR_MTRRfix16K_A0000:
1762         case MSR_MTRRfix4K_C0000:
1763         case MSR_MTRRfix4K_C8000:
1764         case MSR_MTRRfix4K_D0000:
1765         case MSR_MTRRfix4K_D8000:
1766         case MSR_MTRRfix4K_E0000:
1767         case MSR_MTRRfix4K_E8000:
1768         case MSR_MTRRfix4K_F0000:
1769         case MSR_MTRRfix4K_F8000:
1770         case MSR_MTRRdefType:
1771         case MSR_IA32_CR_PAT:
1772                 return true;
1773         case 0x2f8:
1774                 return true;
1775         }
1776         return false;
1777 }
1778
1779 static bool valid_pat_type(unsigned t)
1780 {
1781         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1782 }
1783
1784 static bool valid_mtrr_type(unsigned t)
1785 {
1786         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1787 }
1788
1789 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1790 {
1791         int i;
1792         u64 mask;
1793
1794         if (!msr_mtrr_valid(msr))
1795                 return false;
1796
1797         if (msr == MSR_IA32_CR_PAT) {
1798                 for (i = 0; i < 8; i++)
1799                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1800                                 return false;
1801                 return true;
1802         } else if (msr == MSR_MTRRdefType) {
1803                 if (data & ~0xcff)
1804                         return false;
1805                 return valid_mtrr_type(data & 0xff);
1806         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1807                 for (i = 0; i < 8 ; i++)
1808                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1809                                 return false;
1810                 return true;
1811         }
1812
1813         /* variable MTRRs */
1814         WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
1815
1816         mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
1817         if ((msr & 1) == 0) {
1818                 /* MTRR base */
1819                 if (!valid_mtrr_type(data & 0xff))
1820                         return false;
1821                 mask |= 0xf00;
1822         } else
1823                 /* MTRR mask */
1824                 mask |= 0x7ff;
1825         if (data & mask) {
1826                 kvm_inject_gp(vcpu, 0);
1827                 return false;
1828         }
1829
1830         return true;
1831 }
1832 EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
1833
1834 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1835 {
1836         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1837
1838         if (!kvm_mtrr_valid(vcpu, msr, data))
1839                 return 1;
1840
1841         if (msr == MSR_MTRRdefType) {
1842                 vcpu->arch.mtrr_state.def_type = data;
1843                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1844         } else if (msr == MSR_MTRRfix64K_00000)
1845                 p[0] = data;
1846         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1847                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1848         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1849                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1850         else if (msr == MSR_IA32_CR_PAT)
1851                 vcpu->arch.pat = data;
1852         else {  /* Variable MTRRs */
1853                 int idx, is_mtrr_mask;
1854                 u64 *pt;
1855
1856                 idx = (msr - 0x200) / 2;
1857                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1858                 if (!is_mtrr_mask)
1859                         pt =
1860                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1861                 else
1862                         pt =
1863                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1864                 *pt = data;
1865         }
1866
1867         kvm_mmu_reset_context(vcpu);
1868         return 0;
1869 }
1870
1871 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1872 {
1873         u64 mcg_cap = vcpu->arch.mcg_cap;
1874         unsigned bank_num = mcg_cap & 0xff;
1875
1876         switch (msr) {
1877         case MSR_IA32_MCG_STATUS:
1878                 vcpu->arch.mcg_status = data;
1879                 break;
1880         case MSR_IA32_MCG_CTL:
1881                 if (!(mcg_cap & MCG_CTL_P))
1882                         return 1;
1883                 if (data != 0 && data != ~(u64)0)
1884                         return -1;
1885                 vcpu->arch.mcg_ctl = data;
1886                 break;
1887         default:
1888                 if (msr >= MSR_IA32_MC0_CTL &&
1889                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1890                         u32 offset = msr - MSR_IA32_MC0_CTL;
1891                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1892                          * some Linux kernels though clear bit 10 in bank 4 to
1893                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1894                          * this to avoid an uncatched #GP in the guest
1895                          */
1896                         if ((offset & 0x3) == 0 &&
1897                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1898                                 return -1;
1899                         vcpu->arch.mce_banks[offset] = data;
1900                         break;
1901                 }
1902                 return 1;
1903         }
1904         return 0;
1905 }
1906
1907 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1908 {
1909         struct kvm *kvm = vcpu->kvm;
1910         int lm = is_long_mode(vcpu);
1911         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1912                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1913         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1914                 : kvm->arch.xen_hvm_config.blob_size_32;
1915         u32 page_num = data & ~PAGE_MASK;
1916         u64 page_addr = data & PAGE_MASK;
1917         u8 *page;
1918         int r;
1919
1920         r = -E2BIG;
1921         if (page_num >= blob_size)
1922                 goto out;
1923         r = -ENOMEM;
1924         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1925         if (IS_ERR(page)) {
1926                 r = PTR_ERR(page);
1927                 goto out;
1928         }
1929         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1930                 goto out_free;
1931         r = 0;
1932 out_free:
1933         kfree(page);
1934 out:
1935         return r;
1936 }
1937
1938 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1939 {
1940         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1941 }
1942
1943 static bool kvm_hv_msr_partition_wide(u32 msr)
1944 {
1945         bool r = false;
1946         switch (msr) {
1947         case HV_X64_MSR_GUEST_OS_ID:
1948         case HV_X64_MSR_HYPERCALL:
1949         case HV_X64_MSR_REFERENCE_TSC:
1950         case HV_X64_MSR_TIME_REF_COUNT:
1951                 r = true;
1952                 break;
1953         }
1954
1955         return r;
1956 }
1957
1958 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1959 {
1960         struct kvm *kvm = vcpu->kvm;
1961
1962         switch (msr) {
1963         case HV_X64_MSR_GUEST_OS_ID:
1964                 kvm->arch.hv_guest_os_id = data;
1965                 /* setting guest os id to zero disables hypercall page */
1966                 if (!kvm->arch.hv_guest_os_id)
1967                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1968                 break;
1969         case HV_X64_MSR_HYPERCALL: {
1970                 u64 gfn;
1971                 unsigned long addr;
1972                 u8 instructions[4];
1973
1974                 /* if guest os id is not set hypercall should remain disabled */
1975                 if (!kvm->arch.hv_guest_os_id)
1976                         break;
1977                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1978                         kvm->arch.hv_hypercall = data;
1979                         break;
1980                 }
1981                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1982                 addr = gfn_to_hva(kvm, gfn);
1983                 if (kvm_is_error_hva(addr))
1984                         return 1;
1985                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1986                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1987                 if (__copy_to_user((void __user *)addr, instructions, 4))
1988                         return 1;
1989                 kvm->arch.hv_hypercall = data;
1990                 mark_page_dirty(kvm, gfn);
1991                 break;
1992         }
1993         case HV_X64_MSR_REFERENCE_TSC: {
1994                 u64 gfn;
1995                 HV_REFERENCE_TSC_PAGE tsc_ref;
1996                 memset(&tsc_ref, 0, sizeof(tsc_ref));
1997                 kvm->arch.hv_tsc_page = data;
1998                 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1999                         break;
2000                 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
2001                 if (kvm_write_guest(kvm, gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
2002                         &tsc_ref, sizeof(tsc_ref)))
2003                         return 1;
2004                 mark_page_dirty(kvm, gfn);
2005                 break;
2006         }
2007         default:
2008                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
2009                             "data 0x%llx\n", msr, data);
2010                 return 1;
2011         }
2012         return 0;
2013 }
2014
2015 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2016 {
2017         switch (msr) {
2018         case HV_X64_MSR_APIC_ASSIST_PAGE: {
2019                 u64 gfn;
2020                 unsigned long addr;
2021
2022                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
2023                         vcpu->arch.hv_vapic = data;
2024                         if (kvm_lapic_enable_pv_eoi(vcpu, 0))
2025                                 return 1;
2026                         break;
2027                 }
2028                 gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
2029                 addr = gfn_to_hva(vcpu->kvm, gfn);
2030                 if (kvm_is_error_hva(addr))
2031                         return 1;
2032                 if (__clear_user((void __user *)addr, PAGE_SIZE))
2033                         return 1;
2034                 vcpu->arch.hv_vapic = data;
2035                 mark_page_dirty(vcpu->kvm, gfn);
2036                 if (kvm_lapic_enable_pv_eoi(vcpu, gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
2037                         return 1;
2038                 break;
2039         }
2040         case HV_X64_MSR_EOI:
2041                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
2042         case HV_X64_MSR_ICR:
2043                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
2044         case HV_X64_MSR_TPR:
2045                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
2046         default:
2047                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
2048                             "data 0x%llx\n", msr, data);
2049                 return 1;
2050         }
2051
2052         return 0;
2053 }
2054
2055 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2056 {
2057         gpa_t gpa = data & ~0x3f;
2058
2059         /* Bits 2:5 are reserved, Should be zero */
2060         if (data & 0x3c)
2061                 return 1;
2062
2063         vcpu->arch.apf.msr_val = data;
2064
2065         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2066                 kvm_clear_async_pf_completion_queue(vcpu);
2067                 kvm_async_pf_hash_reset(vcpu);
2068                 return 0;
2069         }
2070
2071         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2072                                         sizeof(u32)))
2073                 return 1;
2074
2075         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2076         kvm_async_pf_wakeup_all(vcpu);
2077         return 0;
2078 }
2079
2080 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2081 {
2082         vcpu->arch.pv_time_enabled = false;
2083 }
2084
2085 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2086 {
2087         u64 delta;
2088
2089         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2090                 return;
2091
2092         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2093         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2094         vcpu->arch.st.accum_steal = delta;
2095 }
2096
2097 static void record_steal_time(struct kvm_vcpu *vcpu)
2098 {
2099         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2100                 return;
2101
2102         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2103                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2104                 return;
2105
2106         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2107         vcpu->arch.st.steal.version += 2;
2108         vcpu->arch.st.accum_steal = 0;
2109
2110         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2111                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2112 }
2113
2114 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2115 {
2116         bool pr = false;
2117         u32 msr = msr_info->index;
2118         u64 data = msr_info->data;
2119
2120         switch (msr) {
2121         case MSR_AMD64_NB_CFG:
2122         case MSR_IA32_UCODE_REV:
2123         case MSR_IA32_UCODE_WRITE:
2124         case MSR_VM_HSAVE_PA:
2125         case MSR_AMD64_PATCH_LOADER:
2126         case MSR_AMD64_BU_CFG2:
2127                 break;
2128
2129         case MSR_EFER:
2130                 return set_efer(vcpu, data);
2131         case MSR_K7_HWCR:
2132                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2133                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2134                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2135                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2136                 if (data != 0) {
2137                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2138                                     data);
2139                         return 1;
2140                 }
2141                 break;
2142         case MSR_FAM10H_MMIO_CONF_BASE:
2143                 if (data != 0) {
2144                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2145                                     "0x%llx\n", data);
2146                         return 1;
2147                 }
2148                 break;
2149         case MSR_IA32_DEBUGCTLMSR:
2150                 if (!data) {
2151                         /* We support the non-activated case already */
2152                         break;
2153                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2154                         /* Values other than LBR and BTF are vendor-specific,
2155                            thus reserved and should throw a #GP */
2156                         return 1;
2157                 }
2158                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2159                             __func__, data);
2160                 break;
2161         case 0x200 ... 0x2ff:
2162                 return set_msr_mtrr(vcpu, msr, data);
2163         case MSR_IA32_APICBASE:
2164                 return kvm_set_apic_base(vcpu, msr_info);
2165         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2166                 return kvm_x2apic_msr_write(vcpu, msr, data);
2167         case MSR_IA32_TSCDEADLINE:
2168                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2169                 break;
2170         case MSR_IA32_TSC_ADJUST:
2171                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2172                         if (!msr_info->host_initiated) {
2173                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2174                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2175                         }
2176                         vcpu->arch.ia32_tsc_adjust_msr = data;
2177                 }
2178                 break;
2179         case MSR_IA32_MISC_ENABLE:
2180                 vcpu->arch.ia32_misc_enable_msr = data;
2181                 break;
2182         case MSR_KVM_WALL_CLOCK_NEW:
2183         case MSR_KVM_WALL_CLOCK:
2184                 vcpu->kvm->arch.wall_clock = data;
2185                 kvm_write_wall_clock(vcpu->kvm, data);
2186                 break;
2187         case MSR_KVM_SYSTEM_TIME_NEW:
2188         case MSR_KVM_SYSTEM_TIME: {
2189                 u64 gpa_offset;
2190                 struct kvm_arch *ka = &vcpu->kvm->arch;
2191
2192                 kvmclock_reset(vcpu);
2193
2194                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2195                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2196
2197                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2198                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2199                                         &vcpu->requests);
2200
2201                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2202                 }
2203
2204                 vcpu->arch.time = data;
2205                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2206
2207                 /* we verify if the enable bit is set... */
2208                 if (!(data & 1))
2209                         break;
2210
2211                 gpa_offset = data & ~(PAGE_MASK | 1);
2212
2213                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2214                      &vcpu->arch.pv_time, data & ~1ULL,
2215                      sizeof(struct pvclock_vcpu_time_info)))
2216                         vcpu->arch.pv_time_enabled = false;
2217                 else
2218                         vcpu->arch.pv_time_enabled = true;
2219
2220                 break;
2221         }
2222         case MSR_KVM_ASYNC_PF_EN:
2223                 if (kvm_pv_enable_async_pf(vcpu, data))
2224                         return 1;
2225                 break;
2226         case MSR_KVM_STEAL_TIME:
2227
2228                 if (unlikely(!sched_info_on()))
2229                         return 1;
2230
2231                 if (data & KVM_STEAL_RESERVED_MASK)
2232                         return 1;
2233
2234                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2235                                                 data & KVM_STEAL_VALID_BITS,
2236                                                 sizeof(struct kvm_steal_time)))
2237                         return 1;
2238
2239                 vcpu->arch.st.msr_val = data;
2240
2241                 if (!(data & KVM_MSR_ENABLED))
2242                         break;
2243
2244                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2245
2246                 preempt_disable();
2247                 accumulate_steal_time(vcpu);
2248                 preempt_enable();
2249
2250                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2251
2252                 break;
2253         case MSR_KVM_PV_EOI_EN:
2254                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2255                         return 1;
2256                 break;
2257
2258         case MSR_IA32_MCG_CTL:
2259         case MSR_IA32_MCG_STATUS:
2260         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2261                 return set_msr_mce(vcpu, msr, data);
2262
2263         /* Performance counters are not protected by a CPUID bit,
2264          * so we should check all of them in the generic path for the sake of
2265          * cross vendor migration.
2266          * Writing a zero into the event select MSRs disables them,
2267          * which we perfectly emulate ;-). Any other value should be at least
2268          * reported, some guests depend on them.
2269          */
2270         case MSR_K7_EVNTSEL0:
2271         case MSR_K7_EVNTSEL1:
2272         case MSR_K7_EVNTSEL2:
2273         case MSR_K7_EVNTSEL3:
2274                 if (data != 0)
2275                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2276                                     "0x%x data 0x%llx\n", msr, data);
2277                 break;
2278         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2279          * so we ignore writes to make it happy.
2280          */
2281         case MSR_K7_PERFCTR0:
2282         case MSR_K7_PERFCTR1:
2283         case MSR_K7_PERFCTR2:
2284         case MSR_K7_PERFCTR3:
2285                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2286                             "0x%x data 0x%llx\n", msr, data);
2287                 break;
2288         case MSR_P6_PERFCTR0:
2289         case MSR_P6_PERFCTR1:
2290                 pr = true;
2291         case MSR_P6_EVNTSEL0:
2292         case MSR_P6_EVNTSEL1:
2293                 if (kvm_pmu_msr(vcpu, msr))
2294                         return kvm_pmu_set_msr(vcpu, msr_info);
2295
2296                 if (pr || data != 0)
2297                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2298                                     "0x%x data 0x%llx\n", msr, data);
2299                 break;
2300         case MSR_K7_CLK_CTL:
2301                 /*
2302                  * Ignore all writes to this no longer documented MSR.
2303                  * Writes are only relevant for old K7 processors,
2304                  * all pre-dating SVM, but a recommended workaround from
2305                  * AMD for these chips. It is possible to specify the
2306                  * affected processor models on the command line, hence
2307                  * the need to ignore the workaround.
2308                  */
2309                 break;
2310         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2311                 if (kvm_hv_msr_partition_wide(msr)) {
2312                         int r;
2313                         mutex_lock(&vcpu->kvm->lock);
2314                         r = set_msr_hyperv_pw(vcpu, msr, data);
2315                         mutex_unlock(&vcpu->kvm->lock);
2316                         return r;
2317                 } else
2318                         return set_msr_hyperv(vcpu, msr, data);
2319                 break;
2320         case MSR_IA32_BBL_CR_CTL3:
2321                 /* Drop writes to this legacy MSR -- see rdmsr
2322                  * counterpart for further detail.
2323                  */
2324                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2325                 break;
2326         case MSR_AMD64_OSVW_ID_LENGTH:
2327                 if (!guest_cpuid_has_osvw(vcpu))
2328                         return 1;
2329                 vcpu->arch.osvw.length = data;
2330                 break;
2331         case MSR_AMD64_OSVW_STATUS:
2332                 if (!guest_cpuid_has_osvw(vcpu))
2333                         return 1;
2334                 vcpu->arch.osvw.status = data;
2335                 break;
2336         default:
2337                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2338                         return xen_hvm_config(vcpu, data);
2339                 if (kvm_pmu_msr(vcpu, msr))
2340                         return kvm_pmu_set_msr(vcpu, msr_info);
2341                 if (!ignore_msrs) {
2342                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2343                                     msr, data);
2344                         return 1;
2345                 } else {
2346                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2347                                     msr, data);
2348                         break;
2349                 }
2350         }
2351         return 0;
2352 }
2353 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2354
2355
2356 /*
2357  * Reads an msr value (of 'msr_index') into 'pdata'.
2358  * Returns 0 on success, non-0 otherwise.
2359  * Assumes vcpu_load() was already called.
2360  */
2361 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2362 {
2363         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2364 }
2365 EXPORT_SYMBOL_GPL(kvm_get_msr);
2366
2367 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2368 {
2369         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2370
2371         if (!msr_mtrr_valid(msr))
2372                 return 1;
2373
2374         if (msr == MSR_MTRRdefType)
2375                 *pdata = vcpu->arch.mtrr_state.def_type +
2376                          (vcpu->arch.mtrr_state.enabled << 10);
2377         else if (msr == MSR_MTRRfix64K_00000)
2378                 *pdata = p[0];
2379         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2380                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2381         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2382                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2383         else if (msr == MSR_IA32_CR_PAT)
2384                 *pdata = vcpu->arch.pat;
2385         else {  /* Variable MTRRs */
2386                 int idx, is_mtrr_mask;
2387                 u64 *pt;
2388
2389                 idx = (msr - 0x200) / 2;
2390                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2391                 if (!is_mtrr_mask)
2392                         pt =
2393                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2394                 else
2395                         pt =
2396                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2397                 *pdata = *pt;
2398         }
2399
2400         return 0;
2401 }
2402
2403 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2404 {
2405         u64 data;
2406         u64 mcg_cap = vcpu->arch.mcg_cap;
2407         unsigned bank_num = mcg_cap & 0xff;
2408
2409         switch (msr) {
2410         case MSR_IA32_P5_MC_ADDR:
2411         case MSR_IA32_P5_MC_TYPE:
2412                 data = 0;
2413                 break;
2414         case MSR_IA32_MCG_CAP:
2415                 data = vcpu->arch.mcg_cap;
2416                 break;
2417         case MSR_IA32_MCG_CTL:
2418                 if (!(mcg_cap & MCG_CTL_P))
2419                         return 1;
2420                 data = vcpu->arch.mcg_ctl;
2421                 break;
2422         case MSR_IA32_MCG_STATUS:
2423                 data = vcpu->arch.mcg_status;
2424                 break;
2425         default:
2426                 if (msr >= MSR_IA32_MC0_CTL &&
2427                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2428                         u32 offset = msr - MSR_IA32_MC0_CTL;
2429                         data = vcpu->arch.mce_banks[offset];
2430                         break;
2431                 }
2432                 return 1;
2433         }
2434         *pdata = data;
2435         return 0;
2436 }
2437
2438 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2439 {
2440         u64 data = 0;
2441         struct kvm *kvm = vcpu->kvm;
2442
2443         switch (msr) {
2444         case HV_X64_MSR_GUEST_OS_ID:
2445                 data = kvm->arch.hv_guest_os_id;
2446                 break;
2447         case HV_X64_MSR_HYPERCALL:
2448                 data = kvm->arch.hv_hypercall;
2449                 break;
2450         case HV_X64_MSR_TIME_REF_COUNT: {
2451                 data =
2452                      div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2453                 break;
2454         }
2455         case HV_X64_MSR_REFERENCE_TSC:
2456                 data = kvm->arch.hv_tsc_page;
2457                 break;
2458         default:
2459                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2460                 return 1;
2461         }
2462
2463         *pdata = data;
2464         return 0;
2465 }
2466
2467 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2468 {
2469         u64 data = 0;
2470
2471         switch (msr) {
2472         case HV_X64_MSR_VP_INDEX: {
2473                 int r;
2474                 struct kvm_vcpu *v;
2475                 kvm_for_each_vcpu(r, v, vcpu->kvm) {
2476                         if (v == vcpu) {
2477                                 data = r;
2478                                 break;
2479                         }
2480                 }
2481                 break;
2482         }
2483         case HV_X64_MSR_EOI:
2484                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2485         case HV_X64_MSR_ICR:
2486                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2487         case HV_X64_MSR_TPR:
2488                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2489         case HV_X64_MSR_APIC_ASSIST_PAGE:
2490                 data = vcpu->arch.hv_vapic;
2491                 break;
2492         default:
2493                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2494                 return 1;
2495         }
2496         *pdata = data;
2497         return 0;
2498 }
2499
2500 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2501 {
2502         u64 data;
2503
2504         switch (msr) {
2505         case MSR_IA32_PLATFORM_ID:
2506         case MSR_IA32_EBL_CR_POWERON:
2507         case MSR_IA32_DEBUGCTLMSR:
2508         case MSR_IA32_LASTBRANCHFROMIP:
2509         case MSR_IA32_LASTBRANCHTOIP:
2510         case MSR_IA32_LASTINTFROMIP:
2511         case MSR_IA32_LASTINTTOIP:
2512         case MSR_K8_SYSCFG:
2513         case MSR_K7_HWCR:
2514         case MSR_VM_HSAVE_PA:
2515         case MSR_K7_EVNTSEL0:
2516         case MSR_K7_EVNTSEL1:
2517         case MSR_K7_EVNTSEL2:
2518         case MSR_K7_EVNTSEL3:
2519         case MSR_K7_PERFCTR0:
2520         case MSR_K7_PERFCTR1:
2521         case MSR_K7_PERFCTR2:
2522         case MSR_K7_PERFCTR3:
2523         case MSR_K8_INT_PENDING_MSG:
2524         case MSR_AMD64_NB_CFG:
2525         case MSR_FAM10H_MMIO_CONF_BASE:
2526         case MSR_AMD64_BU_CFG2:
2527                 data = 0;
2528                 break;
2529         case MSR_P6_PERFCTR0:
2530         case MSR_P6_PERFCTR1:
2531         case MSR_P6_EVNTSEL0:
2532         case MSR_P6_EVNTSEL1:
2533                 if (kvm_pmu_msr(vcpu, msr))
2534                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2535                 data = 0;
2536                 break;
2537         case MSR_IA32_UCODE_REV:
2538                 data = 0x100000000ULL;
2539                 break;
2540         case MSR_MTRRcap:
2541                 data = 0x500 | KVM_NR_VAR_MTRR;
2542                 break;
2543         case 0x200 ... 0x2ff:
2544                 return get_msr_mtrr(vcpu, msr, pdata);
2545         case 0xcd: /* fsb frequency */
2546                 data = 3;
2547                 break;
2548                 /*
2549                  * MSR_EBC_FREQUENCY_ID
2550                  * Conservative value valid for even the basic CPU models.
2551                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2552                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2553                  * and 266MHz for model 3, or 4. Set Core Clock
2554                  * Frequency to System Bus Frequency Ratio to 1 (bits
2555                  * 31:24) even though these are only valid for CPU
2556                  * models > 2, however guests may end up dividing or
2557                  * multiplying by zero otherwise.
2558                  */
2559         case MSR_EBC_FREQUENCY_ID:
2560                 data = 1 << 24;
2561                 break;
2562         case MSR_IA32_APICBASE:
2563                 data = kvm_get_apic_base(vcpu);
2564                 break;
2565         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2566                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2567                 break;
2568         case MSR_IA32_TSCDEADLINE:
2569                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2570                 break;
2571         case MSR_IA32_TSC_ADJUST:
2572                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2573                 break;
2574         case MSR_IA32_MISC_ENABLE:
2575                 data = vcpu->arch.ia32_misc_enable_msr;
2576                 break;
2577         case MSR_IA32_PERF_STATUS:
2578                 /* TSC increment by tick */
2579                 data = 1000ULL;
2580                 /* CPU multiplier */
2581                 data |= (((uint64_t)4ULL) << 40);
2582                 break;
2583         case MSR_EFER:
2584                 data = vcpu->arch.efer;
2585                 break;
2586         case MSR_KVM_WALL_CLOCK:
2587         case MSR_KVM_WALL_CLOCK_NEW:
2588                 data = vcpu->kvm->arch.wall_clock;
2589                 break;
2590         case MSR_KVM_SYSTEM_TIME:
2591         case MSR_KVM_SYSTEM_TIME_NEW:
2592                 data = vcpu->arch.time;
2593                 break;
2594         case MSR_KVM_ASYNC_PF_EN:
2595                 data = vcpu->arch.apf.msr_val;
2596                 break;
2597         case MSR_KVM_STEAL_TIME:
2598                 data = vcpu->arch.st.msr_val;
2599                 break;
2600         case MSR_KVM_PV_EOI_EN:
2601                 data = vcpu->arch.pv_eoi.msr_val;
2602                 break;
2603         case MSR_IA32_P5_MC_ADDR:
2604         case MSR_IA32_P5_MC_TYPE:
2605         case MSR_IA32_MCG_CAP:
2606         case MSR_IA32_MCG_CTL:
2607         case MSR_IA32_MCG_STATUS:
2608         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2609                 return get_msr_mce(vcpu, msr, pdata);
2610         case MSR_K7_CLK_CTL:
2611                 /*
2612                  * Provide expected ramp-up count for K7. All other
2613                  * are set to zero, indicating minimum divisors for
2614                  * every field.
2615                  *
2616                  * This prevents guest kernels on AMD host with CPU
2617                  * type 6, model 8 and higher from exploding due to
2618                  * the rdmsr failing.
2619                  */
2620                 data = 0x20000000;
2621                 break;
2622         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2623                 if (kvm_hv_msr_partition_wide(msr)) {
2624                         int r;
2625                         mutex_lock(&vcpu->kvm->lock);
2626                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2627                         mutex_unlock(&vcpu->kvm->lock);
2628                         return r;
2629                 } else
2630                         return get_msr_hyperv(vcpu, msr, pdata);
2631                 break;
2632         case MSR_IA32_BBL_CR_CTL3:
2633                 /* This legacy MSR exists but isn't fully documented in current
2634                  * silicon.  It is however accessed by winxp in very narrow
2635                  * scenarios where it sets bit #19, itself documented as
2636                  * a "reserved" bit.  Best effort attempt to source coherent
2637                  * read data here should the balance of the register be
2638                  * interpreted by the guest:
2639                  *
2640                  * L2 cache control register 3: 64GB range, 256KB size,
2641                  * enabled, latency 0x1, configured
2642                  */
2643                 data = 0xbe702111;
2644                 break;
2645         case MSR_AMD64_OSVW_ID_LENGTH:
2646                 if (!guest_cpuid_has_osvw(vcpu))
2647                         return 1;
2648                 data = vcpu->arch.osvw.length;
2649                 break;
2650         case MSR_AMD64_OSVW_STATUS:
2651                 if (!guest_cpuid_has_osvw(vcpu))
2652                         return 1;
2653                 data = vcpu->arch.osvw.status;
2654                 break;
2655         default:
2656                 if (kvm_pmu_msr(vcpu, msr))
2657                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2658                 if (!ignore_msrs) {
2659                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2660                         return 1;
2661                 } else {
2662                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2663                         data = 0;
2664                 }
2665                 break;
2666         }
2667         *pdata = data;
2668         return 0;
2669 }
2670 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2671
2672 /*
2673  * Read or write a bunch of msrs. All parameters are kernel addresses.
2674  *
2675  * @return number of msrs set successfully.
2676  */
2677 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2678                     struct kvm_msr_entry *entries,
2679                     int (*do_msr)(struct kvm_vcpu *vcpu,
2680                                   unsigned index, u64 *data))
2681 {
2682         int i, idx;
2683
2684         idx = srcu_read_lock(&vcpu->kvm->srcu);
2685         for (i = 0; i < msrs->nmsrs; ++i)
2686                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2687                         break;
2688         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2689
2690         return i;
2691 }
2692
2693 /*
2694  * Read or write a bunch of msrs. Parameters are user addresses.
2695  *
2696  * @return number of msrs set successfully.
2697  */
2698 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2699                   int (*do_msr)(struct kvm_vcpu *vcpu,
2700                                 unsigned index, u64 *data),
2701                   int writeback)
2702 {
2703         struct kvm_msrs msrs;
2704         struct kvm_msr_entry *entries;
2705         int r, n;
2706         unsigned size;
2707
2708         r = -EFAULT;
2709         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2710                 goto out;
2711
2712         r = -E2BIG;
2713         if (msrs.nmsrs >= MAX_IO_MSRS)
2714                 goto out;
2715
2716         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2717         entries = memdup_user(user_msrs->entries, size);
2718         if (IS_ERR(entries)) {
2719                 r = PTR_ERR(entries);
2720                 goto out;
2721         }
2722
2723         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2724         if (r < 0)
2725                 goto out_free;
2726
2727         r = -EFAULT;
2728         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2729                 goto out_free;
2730
2731         r = n;
2732
2733 out_free:
2734         kfree(entries);
2735 out:
2736         return r;
2737 }
2738
2739 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2740 {
2741         int r;
2742
2743         switch (ext) {
2744         case KVM_CAP_IRQCHIP:
2745         case KVM_CAP_HLT:
2746         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2747         case KVM_CAP_SET_TSS_ADDR:
2748         case KVM_CAP_EXT_CPUID:
2749         case KVM_CAP_EXT_EMUL_CPUID:
2750         case KVM_CAP_CLOCKSOURCE:
2751         case KVM_CAP_PIT:
2752         case KVM_CAP_NOP_IO_DELAY:
2753         case KVM_CAP_MP_STATE:
2754         case KVM_CAP_SYNC_MMU:
2755         case KVM_CAP_USER_NMI:
2756         case KVM_CAP_REINJECT_CONTROL:
2757         case KVM_CAP_IRQ_INJECT_STATUS:
2758         case KVM_CAP_IRQFD:
2759         case KVM_CAP_IOEVENTFD:
2760         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2761         case KVM_CAP_PIT2:
2762         case KVM_CAP_PIT_STATE2:
2763         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2764         case KVM_CAP_XEN_HVM:
2765         case KVM_CAP_ADJUST_CLOCK:
2766         case KVM_CAP_VCPU_EVENTS:
2767         case KVM_CAP_HYPERV:
2768         case KVM_CAP_HYPERV_VAPIC:
2769         case KVM_CAP_HYPERV_SPIN:
2770         case KVM_CAP_PCI_SEGMENT:
2771         case KVM_CAP_DEBUGREGS:
2772         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2773         case KVM_CAP_XSAVE:
2774         case KVM_CAP_ASYNC_PF:
2775         case KVM_CAP_GET_TSC_KHZ:
2776         case KVM_CAP_KVMCLOCK_CTRL:
2777         case KVM_CAP_READONLY_MEM:
2778         case KVM_CAP_HYPERV_TIME:
2779         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2780         case KVM_CAP_TSC_DEADLINE_TIMER:
2781 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2782         case KVM_CAP_ASSIGN_DEV_IRQ:
2783         case KVM_CAP_PCI_2_3:
2784 #endif
2785                 r = 1;
2786                 break;
2787         case KVM_CAP_COALESCED_MMIO:
2788                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2789                 break;
2790         case KVM_CAP_VAPIC:
2791                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2792                 break;
2793         case KVM_CAP_NR_VCPUS:
2794                 r = KVM_SOFT_MAX_VCPUS;
2795                 break;
2796         case KVM_CAP_MAX_VCPUS:
2797                 r = KVM_MAX_VCPUS;
2798                 break;
2799         case KVM_CAP_NR_MEMSLOTS:
2800                 r = KVM_USER_MEM_SLOTS;
2801                 break;
2802         case KVM_CAP_PV_MMU:    /* obsolete */
2803                 r = 0;
2804                 break;
2805 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2806         case KVM_CAP_IOMMU:
2807                 r = iommu_present(&pci_bus_type);
2808                 break;
2809 #endif
2810         case KVM_CAP_MCE:
2811                 r = KVM_MAX_MCE_BANKS;
2812                 break;
2813         case KVM_CAP_XCRS:
2814                 r = cpu_has_xsave;
2815                 break;
2816         case KVM_CAP_TSC_CONTROL:
2817                 r = kvm_has_tsc_control;
2818                 break;
2819         default:
2820                 r = 0;
2821                 break;
2822         }
2823         return r;
2824
2825 }
2826
2827 long kvm_arch_dev_ioctl(struct file *filp,
2828                         unsigned int ioctl, unsigned long arg)
2829 {
2830         void __user *argp = (void __user *)arg;
2831         long r;
2832
2833         switch (ioctl) {
2834         case KVM_GET_MSR_INDEX_LIST: {
2835                 struct kvm_msr_list __user *user_msr_list = argp;
2836                 struct kvm_msr_list msr_list;
2837                 unsigned n;
2838
2839                 r = -EFAULT;
2840                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2841                         goto out;
2842                 n = msr_list.nmsrs;
2843                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2844                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2845                         goto out;
2846                 r = -E2BIG;
2847                 if (n < msr_list.nmsrs)
2848                         goto out;
2849                 r = -EFAULT;
2850                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2851                                  num_msrs_to_save * sizeof(u32)))
2852                         goto out;
2853                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2854                                  &emulated_msrs,
2855                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2856                         goto out;
2857                 r = 0;
2858                 break;
2859         }
2860         case KVM_GET_SUPPORTED_CPUID:
2861         case KVM_GET_EMULATED_CPUID: {
2862                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2863                 struct kvm_cpuid2 cpuid;
2864
2865                 r = -EFAULT;
2866                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2867                         goto out;
2868
2869                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2870                                             ioctl);
2871                 if (r)
2872                         goto out;
2873
2874                 r = -EFAULT;
2875                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2876                         goto out;
2877                 r = 0;
2878                 break;
2879         }
2880         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2881                 u64 mce_cap;
2882
2883                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2884                 r = -EFAULT;
2885                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2886                         goto out;
2887                 r = 0;
2888                 break;
2889         }
2890         default:
2891                 r = -EINVAL;
2892         }
2893 out:
2894         return r;
2895 }
2896
2897 static void wbinvd_ipi(void *garbage)
2898 {
2899         wbinvd();
2900 }
2901
2902 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2903 {
2904         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2905 }
2906
2907 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2908 {
2909         /* Address WBINVD may be executed by guest */
2910         if (need_emulate_wbinvd(vcpu)) {
2911                 if (kvm_x86_ops->has_wbinvd_exit())
2912                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2913                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2914                         smp_call_function_single(vcpu->cpu,
2915                                         wbinvd_ipi, NULL, 1);
2916         }
2917
2918         kvm_x86_ops->vcpu_load(vcpu, cpu);
2919
2920         /* Apply any externally detected TSC adjustments (due to suspend) */
2921         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2922                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2923                 vcpu->arch.tsc_offset_adjustment = 0;
2924                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2925         }
2926
2927         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2928                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2929                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2930                 if (tsc_delta < 0)
2931                         mark_tsc_unstable("KVM discovered backwards TSC");
2932                 if (check_tsc_unstable()) {
2933                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2934                                                 vcpu->arch.last_guest_tsc);
2935                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2936                         vcpu->arch.tsc_catchup = 1;
2937                 }
2938                 /*
2939                  * On a host with synchronized TSC, there is no need to update
2940                  * kvmclock on vcpu->cpu migration
2941                  */
2942                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2943                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2944                 if (vcpu->cpu != cpu)
2945                         kvm_migrate_timers(vcpu);
2946                 vcpu->cpu = cpu;
2947         }
2948
2949         accumulate_steal_time(vcpu);
2950         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2951 }
2952
2953 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2954 {
2955         kvm_x86_ops->vcpu_put(vcpu);
2956         kvm_put_guest_fpu(vcpu);
2957         vcpu->arch.last_host_tsc = native_read_tsc();
2958 }
2959
2960 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2961                                     struct kvm_lapic_state *s)
2962 {
2963         kvm_x86_ops->sync_pir_to_irr(vcpu);
2964         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2965
2966         return 0;
2967 }
2968
2969 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2970                                     struct kvm_lapic_state *s)
2971 {
2972         kvm_apic_post_state_restore(vcpu, s);
2973         update_cr8_intercept(vcpu);
2974
2975         return 0;
2976 }
2977
2978 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2979                                     struct kvm_interrupt *irq)
2980 {
2981         if (irq->irq >= KVM_NR_INTERRUPTS)
2982                 return -EINVAL;
2983         if (irqchip_in_kernel(vcpu->kvm))
2984                 return -ENXIO;
2985
2986         kvm_queue_interrupt(vcpu, irq->irq, false);
2987         kvm_make_request(KVM_REQ_EVENT, vcpu);
2988
2989         return 0;
2990 }
2991
2992 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2993 {
2994         kvm_inject_nmi(vcpu);
2995
2996         return 0;
2997 }
2998
2999 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3000                                            struct kvm_tpr_access_ctl *tac)
3001 {
3002         if (tac->flags)
3003                 return -EINVAL;
3004         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3005         return 0;
3006 }
3007
3008 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3009                                         u64 mcg_cap)
3010 {
3011         int r;
3012         unsigned bank_num = mcg_cap & 0xff, bank;
3013
3014         r = -EINVAL;
3015         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3016                 goto out;
3017         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
3018                 goto out;
3019         r = 0;
3020         vcpu->arch.mcg_cap = mcg_cap;
3021         /* Init IA32_MCG_CTL to all 1s */
3022         if (mcg_cap & MCG_CTL_P)
3023                 vcpu->arch.mcg_ctl = ~(u64)0;
3024         /* Init IA32_MCi_CTL to all 1s */
3025         for (bank = 0; bank < bank_num; bank++)
3026                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3027 out:
3028         return r;
3029 }
3030
3031 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3032                                       struct kvm_x86_mce *mce)
3033 {
3034         u64 mcg_cap = vcpu->arch.mcg_cap;
3035         unsigned bank_num = mcg_cap & 0xff;
3036         u64 *banks = vcpu->arch.mce_banks;
3037
3038         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3039                 return -EINVAL;
3040         /*
3041          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3042          * reporting is disabled
3043          */
3044         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3045             vcpu->arch.mcg_ctl != ~(u64)0)
3046                 return 0;
3047         banks += 4 * mce->bank;
3048         /*
3049          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3050          * reporting is disabled for the bank
3051          */
3052         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3053                 return 0;
3054         if (mce->status & MCI_STATUS_UC) {
3055                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3056                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3057                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3058                         return 0;
3059                 }
3060                 if (banks[1] & MCI_STATUS_VAL)
3061                         mce->status |= MCI_STATUS_OVER;
3062                 banks[2] = mce->addr;
3063                 banks[3] = mce->misc;
3064                 vcpu->arch.mcg_status = mce->mcg_status;
3065                 banks[1] = mce->status;
3066                 kvm_queue_exception(vcpu, MC_VECTOR);
3067         } else if (!(banks[1] & MCI_STATUS_VAL)
3068                    || !(banks[1] & MCI_STATUS_UC)) {
3069                 if (banks[1] & MCI_STATUS_VAL)
3070                         mce->status |= MCI_STATUS_OVER;
3071                 banks[2] = mce->addr;
3072                 banks[3] = mce->misc;
3073                 banks[1] = mce->status;
3074         } else
3075                 banks[1] |= MCI_STATUS_OVER;
3076         return 0;
3077 }
3078
3079 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3080                                                struct kvm_vcpu_events *events)
3081 {
3082         process_nmi(vcpu);
3083         events->exception.injected =
3084                 vcpu->arch.exception.pending &&
3085                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3086         events->exception.nr = vcpu->arch.exception.nr;
3087         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3088         events->exception.pad = 0;
3089         events->exception.error_code = vcpu->arch.exception.error_code;
3090
3091         events->interrupt.injected =
3092                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3093         events->interrupt.nr = vcpu->arch.interrupt.nr;
3094         events->interrupt.soft = 0;
3095         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3096
3097         events->nmi.injected = vcpu->arch.nmi_injected;
3098         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3099         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3100         events->nmi.pad = 0;
3101
3102         events->sipi_vector = 0; /* never valid when reporting to user space */
3103
3104         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3105                          | KVM_VCPUEVENT_VALID_SHADOW);
3106         memset(&events->reserved, 0, sizeof(events->reserved));
3107 }
3108
3109 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3110                                               struct kvm_vcpu_events *events)
3111 {
3112         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3113                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3114                               | KVM_VCPUEVENT_VALID_SHADOW))
3115                 return -EINVAL;
3116
3117         process_nmi(vcpu);
3118         vcpu->arch.exception.pending = events->exception.injected;
3119         vcpu->arch.exception.nr = events->exception.nr;
3120         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3121         vcpu->arch.exception.error_code = events->exception.error_code;
3122
3123         vcpu->arch.interrupt.pending = events->interrupt.injected;
3124         vcpu->arch.interrupt.nr = events->interrupt.nr;
3125         vcpu->arch.interrupt.soft = events->interrupt.soft;
3126         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3127                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3128                                                   events->interrupt.shadow);
3129
3130         vcpu->arch.nmi_injected = events->nmi.injected;
3131         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3132                 vcpu->arch.nmi_pending = events->nmi.pending;
3133         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3134
3135         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3136             kvm_vcpu_has_lapic(vcpu))
3137                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3138
3139         kvm_make_request(KVM_REQ_EVENT, vcpu);
3140
3141         return 0;
3142 }
3143
3144 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3145                                              struct kvm_debugregs *dbgregs)
3146 {
3147         unsigned long val;
3148
3149         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3150         kvm_get_dr(vcpu, 6, &val);
3151         dbgregs->dr6 = val;
3152         dbgregs->dr7 = vcpu->arch.dr7;
3153         dbgregs->flags = 0;
3154         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3155 }
3156
3157 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3158                                             struct kvm_debugregs *dbgregs)
3159 {
3160         if (dbgregs->flags)
3161                 return -EINVAL;
3162
3163         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3164         kvm_update_dr0123(vcpu);
3165         vcpu->arch.dr6 = dbgregs->dr6;
3166         kvm_update_dr6(vcpu);
3167         vcpu->arch.dr7 = dbgregs->dr7;
3168         kvm_update_dr7(vcpu);
3169
3170         return 0;
3171 }
3172
3173 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3174
3175 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3176 {
3177         struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
3178         u64 xstate_bv = xsave->xsave_hdr.xstate_bv;
3179         u64 valid;
3180
3181         /*
3182          * Copy legacy XSAVE area, to avoid complications with CPUID
3183          * leaves 0 and 1 in the loop below.
3184          */
3185         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3186
3187         /* Set XSTATE_BV */
3188         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3189
3190         /*
3191          * Copy each region from the possibly compacted offset to the
3192          * non-compacted offset.
3193          */
3194         valid = xstate_bv & ~XSTATE_FPSSE;
3195         while (valid) {
3196                 u64 feature = valid & -valid;
3197                 int index = fls64(feature) - 1;
3198                 void *src = get_xsave_addr(xsave, feature);
3199
3200                 if (src) {
3201                         u32 size, offset, ecx, edx;
3202                         cpuid_count(XSTATE_CPUID, index,
3203                                     &size, &offset, &ecx, &edx);
3204                         memcpy(dest + offset, src, size);
3205                 }
3206
3207                 valid -= feature;
3208         }
3209 }
3210
3211 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3212 {
3213         struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
3214         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3215         u64 valid;
3216
3217         /*
3218          * Copy legacy XSAVE area, to avoid complications with CPUID
3219          * leaves 0 and 1 in the loop below.
3220          */
3221         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3222
3223         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3224         xsave->xsave_hdr.xstate_bv = xstate_bv;
3225         if (cpu_has_xsaves)
3226                 xsave->xsave_hdr.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3227
3228         /*
3229          * Copy each region from the non-compacted offset to the
3230          * possibly compacted offset.
3231          */
3232         valid = xstate_bv & ~XSTATE_FPSSE;
3233         while (valid) {
3234                 u64 feature = valid & -valid;
3235                 int index = fls64(feature) - 1;
3236                 void *dest = get_xsave_addr(xsave, feature);
3237
3238                 if (dest) {
3239                         u32 size, offset, ecx, edx;
3240                         cpuid_count(XSTATE_CPUID, index,
3241                                     &size, &offset, &ecx, &edx);
3242                         memcpy(dest, src + offset, size);
3243                 } else
3244                         WARN_ON_ONCE(1);
3245
3246                 valid -= feature;
3247         }
3248 }
3249
3250 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3251                                          struct kvm_xsave *guest_xsave)
3252 {
3253         if (cpu_has_xsave) {
3254                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3255                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3256         } else {
3257                 memcpy(guest_xsave->region,
3258                         &vcpu->arch.guest_fpu.state->fxsave,
3259                         sizeof(struct i387_fxsave_struct));
3260                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3261                         XSTATE_FPSSE;
3262         }
3263 }
3264
3265 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3266                                         struct kvm_xsave *guest_xsave)
3267 {
3268         u64 xstate_bv =
3269                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3270
3271         if (cpu_has_xsave) {
3272                 /*
3273                  * Here we allow setting states that are not present in
3274                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3275                  * with old userspace.
3276                  */
3277                 if (xstate_bv & ~kvm_supported_xcr0())
3278                         return -EINVAL;
3279                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3280         } else {
3281                 if (xstate_bv & ~XSTATE_FPSSE)
3282                         return -EINVAL;
3283                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3284                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3285         }
3286         return 0;
3287 }
3288
3289 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3290                                         struct kvm_xcrs *guest_xcrs)
3291 {
3292         if (!cpu_has_xsave) {
3293                 guest_xcrs->nr_xcrs = 0;
3294                 return;
3295         }
3296
3297         guest_xcrs->nr_xcrs = 1;
3298         guest_xcrs->flags = 0;
3299         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3300         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3301 }
3302
3303 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3304                                        struct kvm_xcrs *guest_xcrs)
3305 {
3306         int i, r = 0;
3307
3308         if (!cpu_has_xsave)
3309                 return -EINVAL;
3310
3311         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3312                 return -EINVAL;
3313
3314         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3315                 /* Only support XCR0 currently */
3316                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3317                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3318                                 guest_xcrs->xcrs[i].value);
3319                         break;
3320                 }
3321         if (r)
3322                 r = -EINVAL;
3323         return r;
3324 }
3325
3326 /*
3327  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3328  * stopped by the hypervisor.  This function will be called from the host only.
3329  * EINVAL is returned when the host attempts to set the flag for a guest that
3330  * does not support pv clocks.
3331  */
3332 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3333 {
3334         if (!vcpu->arch.pv_time_enabled)
3335                 return -EINVAL;
3336         vcpu->arch.pvclock_set_guest_stopped_request = true;
3337         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3338         return 0;
3339 }
3340
3341 long kvm_arch_vcpu_ioctl(struct file *filp,
3342                          unsigned int ioctl, unsigned long arg)
3343 {
3344         struct kvm_vcpu *vcpu = filp->private_data;
3345         void __user *argp = (void __user *)arg;
3346         int r;
3347         union {
3348                 struct kvm_lapic_state *lapic;
3349                 struct kvm_xsave *xsave;
3350                 struct kvm_xcrs *xcrs;
3351                 void *buffer;
3352         } u;
3353
3354         u.buffer = NULL;
3355         switch (ioctl) {
3356         case KVM_GET_LAPIC: {
3357                 r = -EINVAL;
3358                 if (!vcpu->arch.apic)
3359                         goto out;
3360                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3361
3362                 r = -ENOMEM;
3363                 if (!u.lapic)
3364                         goto out;
3365                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3366                 if (r)
3367                         goto out;
3368                 r = -EFAULT;
3369                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3370                         goto out;
3371                 r = 0;
3372                 break;
3373         }
3374         case KVM_SET_LAPIC: {
3375                 r = -EINVAL;
3376                 if (!vcpu->arch.apic)
3377                         goto out;
3378                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3379                 if (IS_ERR(u.lapic))
3380                         return PTR_ERR(u.lapic);
3381
3382                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3383                 break;
3384         }
3385         case KVM_INTERRUPT: {
3386                 struct kvm_interrupt irq;
3387
3388                 r = -EFAULT;
3389                 if (copy_from_user(&irq, argp, sizeof irq))
3390                         goto out;
3391                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3392                 break;
3393         }
3394         case KVM_NMI: {
3395                 r = kvm_vcpu_ioctl_nmi(vcpu);
3396                 break;
3397         }
3398         case KVM_SET_CPUID: {
3399                 struct kvm_cpuid __user *cpuid_arg = argp;
3400                 struct kvm_cpuid cpuid;
3401
3402                 r = -EFAULT;
3403                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3404                         goto out;
3405                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3406                 break;
3407         }
3408         case KVM_SET_CPUID2: {
3409                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3410                 struct kvm_cpuid2 cpuid;
3411
3412                 r = -EFAULT;
3413                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3414                         goto out;
3415                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3416                                               cpuid_arg->entries);
3417                 break;
3418         }
3419         case KVM_GET_CPUID2: {
3420                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3421                 struct kvm_cpuid2 cpuid;
3422
3423                 r = -EFAULT;
3424                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3425                         goto out;
3426                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3427                                               cpuid_arg->entries);
3428                 if (r)
3429                         goto out;
3430                 r = -EFAULT;
3431                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3432                         goto out;
3433                 r = 0;
3434                 break;
3435         }
3436         case KVM_GET_MSRS:
3437                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3438                 break;
3439         case KVM_SET_MSRS:
3440                 r = msr_io(vcpu, argp, do_set_msr, 0);
3441                 break;
3442         case KVM_TPR_ACCESS_REPORTING: {
3443                 struct kvm_tpr_access_ctl tac;
3444
3445                 r = -EFAULT;
3446                 if (copy_from_user(&tac, argp, sizeof tac))
3447                         goto out;
3448                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3449                 if (r)
3450                         goto out;
3451                 r = -EFAULT;
3452                 if (copy_to_user(argp, &tac, sizeof tac))
3453                         goto out;
3454                 r = 0;
3455                 break;
3456         };
3457         case KVM_SET_VAPIC_ADDR: {
3458                 struct kvm_vapic_addr va;
3459
3460                 r = -EINVAL;
3461                 if (!irqchip_in_kernel(vcpu->kvm))
3462                         goto out;
3463                 r = -EFAULT;
3464                 if (copy_from_user(&va, argp, sizeof va))
3465                         goto out;
3466                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3467                 break;
3468         }
3469         case KVM_X86_SETUP_MCE: {
3470                 u64 mcg_cap;
3471
3472                 r = -EFAULT;
3473                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3474                         goto out;
3475                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3476                 break;
3477         }
3478         case KVM_X86_SET_MCE: {
3479                 struct kvm_x86_mce mce;
3480
3481                 r = -EFAULT;
3482                 if (copy_from_user(&mce, argp, sizeof mce))
3483                         goto out;
3484                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3485                 break;
3486         }
3487         case KVM_GET_VCPU_EVENTS: {
3488                 struct kvm_vcpu_events events;
3489
3490                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3491
3492                 r = -EFAULT;
3493                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3494                         break;
3495                 r = 0;
3496                 break;
3497         }
3498         case KVM_SET_VCPU_EVENTS: {
3499                 struct kvm_vcpu_events events;
3500
3501                 r = -EFAULT;
3502                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3503                         break;
3504
3505                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3506                 break;
3507         }
3508         case KVM_GET_DEBUGREGS: {
3509                 struct kvm_debugregs dbgregs;
3510
3511                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3512
3513                 r = -EFAULT;
3514                 if (copy_to_user(argp, &dbgregs,
3515                                  sizeof(struct kvm_debugregs)))
3516                         break;
3517                 r = 0;
3518                 break;
3519         }
3520         case KVM_SET_DEBUGREGS: {
3521                 struct kvm_debugregs dbgregs;
3522
3523                 r = -EFAULT;
3524                 if (copy_from_user(&dbgregs, argp,
3525                                    sizeof(struct kvm_debugregs)))
3526                         break;
3527
3528                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3529                 break;
3530         }
3531         case KVM_GET_XSAVE: {
3532                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3533                 r = -ENOMEM;
3534                 if (!u.xsave)
3535                         break;
3536
3537                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3538
3539                 r = -EFAULT;
3540                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3541                         break;
3542                 r = 0;
3543                 break;
3544         }
3545         case KVM_SET_XSAVE: {
3546                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3547                 if (IS_ERR(u.xsave))
3548                         return PTR_ERR(u.xsave);
3549
3550                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3551                 break;
3552         }
3553         case KVM_GET_XCRS: {
3554                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3555                 r = -ENOMEM;
3556                 if (!u.xcrs)
3557                         break;
3558
3559                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3560
3561                 r = -EFAULT;
3562                 if (copy_to_user(argp, u.xcrs,
3563                                  sizeof(struct kvm_xcrs)))
3564                         break;
3565                 r = 0;
3566                 break;
3567         }
3568         case KVM_SET_XCRS: {
3569                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3570                 if (IS_ERR(u.xcrs))
3571                         return PTR_ERR(u.xcrs);
3572
3573                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3574                 break;
3575         }
3576         case KVM_SET_TSC_KHZ: {
3577                 u32 user_tsc_khz;
3578
3579                 r = -EINVAL;
3580                 user_tsc_khz = (u32)arg;
3581
3582                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3583                         goto out;
3584
3585                 if (user_tsc_khz == 0)
3586                         user_tsc_khz = tsc_khz;
3587
3588                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3589
3590                 r = 0;
3591                 goto out;
3592         }
3593         case KVM_GET_TSC_KHZ: {
3594                 r = vcpu->arch.virtual_tsc_khz;
3595                 goto out;
3596         }
3597         case KVM_KVMCLOCK_CTRL: {
3598                 r = kvm_set_guest_paused(vcpu);
3599                 goto out;
3600         }
3601         default:
3602                 r = -EINVAL;
3603         }
3604 out:
3605         kfree(u.buffer);
3606         return r;
3607 }
3608
3609 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3610 {
3611         return VM_FAULT_SIGBUS;
3612 }
3613
3614 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3615 {
3616         int ret;
3617
3618         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3619                 return -EINVAL;
3620         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3621         return ret;
3622 }
3623
3624 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3625                                               u64 ident_addr)
3626 {
3627         kvm->arch.ept_identity_map_addr = ident_addr;
3628         return 0;
3629 }
3630
3631 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3632                                           u32 kvm_nr_mmu_pages)
3633 {
3634         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3635                 return -EINVAL;
3636
3637         mutex_lock(&kvm->slots_lock);
3638
3639         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3640         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3641
3642         mutex_unlock(&kvm->slots_lock);
3643         return 0;
3644 }
3645
3646 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3647 {
3648         return kvm->arch.n_max_mmu_pages;
3649 }
3650
3651 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3652 {
3653         int r;
3654
3655         r = 0;
3656         switch (chip->chip_id) {
3657         case KVM_IRQCHIP_PIC_MASTER:
3658                 memcpy(&chip->chip.pic,
3659                         &pic_irqchip(kvm)->pics[0],
3660                         sizeof(struct kvm_pic_state));
3661                 break;
3662         case KVM_IRQCHIP_PIC_SLAVE:
3663                 memcpy(&chip->chip.pic,
3664                         &pic_irqchip(kvm)->pics[1],
3665                         sizeof(struct kvm_pic_state));
3666                 break;
3667         case KVM_IRQCHIP_IOAPIC:
3668                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3669                 break;
3670         default:
3671                 r = -EINVAL;
3672                 break;
3673         }
3674         return r;
3675 }
3676
3677 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3678 {
3679         int r;
3680
3681         r = 0;
3682         switch (chip->chip_id) {
3683         case KVM_IRQCHIP_PIC_MASTER:
3684                 spin_lock(&pic_irqchip(kvm)->lock);
3685                 memcpy(&pic_irqchip(kvm)->pics[0],
3686                         &chip->chip.pic,
3687                         sizeof(struct kvm_pic_state));
3688                 spin_unlock(&pic_irqchip(kvm)->lock);
3689                 break;
3690         case KVM_IRQCHIP_PIC_SLAVE:
3691                 spin_lock(&pic_irqchip(kvm)->lock);
3692                 memcpy(&pic_irqchip(kvm)->pics[1],
3693                         &chip->chip.pic,
3694                         sizeof(struct kvm_pic_state));
3695                 spin_unlock(&pic_irqchip(kvm)->lock);
3696                 break;
3697         case KVM_IRQCHIP_IOAPIC:
3698                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3699                 break;
3700         default:
3701                 r = -EINVAL;
3702                 break;
3703         }
3704         kvm_pic_update_irq(pic_irqchip(kvm));
3705         return r;
3706 }
3707
3708 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3709 {
3710         int r = 0;
3711
3712         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3713         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3714         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3715         return r;
3716 }
3717
3718 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3719 {
3720         int r = 0;
3721
3722         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3723         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3724         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3725         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3726         return r;
3727 }
3728
3729 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3730 {
3731         int r = 0;
3732
3733         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3734         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3735                 sizeof(ps->channels));
3736         ps->flags = kvm->arch.vpit->pit_state.flags;
3737         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3738         memset(&ps->reserved, 0, sizeof(ps->reserved));
3739         return r;
3740 }
3741
3742 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3743 {
3744         int r = 0, start = 0;
3745         u32 prev_legacy, cur_legacy;
3746         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3747         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3748         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3749         if (!prev_legacy && cur_legacy)
3750                 start = 1;
3751         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3752                sizeof(kvm->arch.vpit->pit_state.channels));
3753         kvm->arch.vpit->pit_state.flags = ps->flags;
3754         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3755         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3756         return r;
3757 }
3758
3759 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3760                                  struct kvm_reinject_control *control)
3761 {
3762         if (!kvm->arch.vpit)
3763                 return -ENXIO;
3764         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3765         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3766         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3767         return 0;
3768 }
3769
3770 /**
3771  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3772  * @kvm: kvm instance
3773  * @log: slot id and address to which we copy the log
3774  *
3775  * Steps 1-4 below provide general overview of dirty page logging. See
3776  * kvm_get_dirty_log_protect() function description for additional details.
3777  *
3778  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3779  * always flush the TLB (step 4) even if previous step failed  and the dirty
3780  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3781  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3782  * writes will be marked dirty for next log read.
3783  *
3784  *   1. Take a snapshot of the bit and clear it if needed.
3785  *   2. Write protect the corresponding page.
3786  *   3. Copy the snapshot to the userspace.
3787  *   4. Flush TLB's if needed.
3788  */
3789 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3790 {
3791         bool is_dirty = false;
3792         int r;
3793
3794         mutex_lock(&kvm->slots_lock);
3795
3796         /*
3797          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3798          */
3799         if (kvm_x86_ops->flush_log_dirty)
3800                 kvm_x86_ops->flush_log_dirty(kvm);
3801
3802         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3803
3804         /*
3805          * All the TLBs can be flushed out of mmu lock, see the comments in
3806          * kvm_mmu_slot_remove_write_access().
3807          */
3808         lockdep_assert_held(&kvm->slots_lock);
3809         if (is_dirty)
3810                 kvm_flush_remote_tlbs(kvm);
3811
3812         mutex_unlock(&kvm->slots_lock);
3813         return r;
3814 }
3815
3816 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3817                         bool line_status)
3818 {
3819         if (!irqchip_in_kernel(kvm))
3820                 return -ENXIO;
3821
3822         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3823                                         irq_event->irq, irq_event->level,
3824                                         line_status);
3825         return 0;
3826 }
3827
3828 long kvm_arch_vm_ioctl(struct file *filp,
3829                        unsigned int ioctl, unsigned long arg)
3830 {
3831         struct kvm *kvm = filp->private_data;
3832         void __user *argp = (void __user *)arg;
3833         int r = -ENOTTY;
3834         /*
3835          * This union makes it completely explicit to gcc-3.x
3836          * that these two variables' stack usage should be
3837          * combined, not added together.
3838          */
3839         union {
3840                 struct kvm_pit_state ps;
3841                 struct kvm_pit_state2 ps2;
3842                 struct kvm_pit_config pit_config;
3843         } u;
3844
3845         switch (ioctl) {
3846         case KVM_SET_TSS_ADDR:
3847                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3848                 break;
3849         case KVM_SET_IDENTITY_MAP_ADDR: {
3850                 u64 ident_addr;
3851
3852                 r = -EFAULT;
3853                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3854                         goto out;
3855                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3856                 break;
3857         }
3858         case KVM_SET_NR_MMU_PAGES:
3859                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3860                 break;
3861         case KVM_GET_NR_MMU_PAGES:
3862                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3863                 break;
3864         case KVM_CREATE_IRQCHIP: {
3865                 struct kvm_pic *vpic;
3866
3867                 mutex_lock(&kvm->lock);
3868                 r = -EEXIST;
3869                 if (kvm->arch.vpic)
3870                         goto create_irqchip_unlock;
3871                 r = -EINVAL;
3872                 if (atomic_read(&kvm->online_vcpus))
3873                         goto create_irqchip_unlock;
3874                 r = -ENOMEM;
3875                 vpic = kvm_create_pic(kvm);
3876                 if (vpic) {
3877                         r = kvm_ioapic_init(kvm);
3878                         if (r) {
3879                                 mutex_lock(&kvm->slots_lock);
3880                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3881                                                           &vpic->dev_master);
3882                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3883                                                           &vpic->dev_slave);
3884                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3885                                                           &vpic->dev_eclr);
3886                                 mutex_unlock(&kvm->slots_lock);
3887                                 kfree(vpic);
3888                                 goto create_irqchip_unlock;
3889                         }
3890                 } else
3891                         goto create_irqchip_unlock;
3892                 smp_wmb();
3893                 kvm->arch.vpic = vpic;
3894                 smp_wmb();
3895                 r = kvm_setup_default_irq_routing(kvm);
3896                 if (r) {
3897                         mutex_lock(&kvm->slots_lock);
3898                         mutex_lock(&kvm->irq_lock);
3899                         kvm_ioapic_destroy(kvm);
3900                         kvm_destroy_pic(kvm);
3901                         mutex_unlock(&kvm->irq_lock);
3902                         mutex_unlock(&kvm->slots_lock);
3903                 }
3904         create_irqchip_unlock:
3905                 mutex_unlock(&kvm->lock);
3906                 break;
3907         }
3908         case KVM_CREATE_PIT:
3909                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3910                 goto create_pit;
3911         case KVM_CREATE_PIT2:
3912                 r = -EFAULT;
3913                 if (copy_from_user(&u.pit_config, argp,
3914                                    sizeof(struct kvm_pit_config)))
3915                         goto out;
3916         create_pit:
3917                 mutex_lock(&kvm->slots_lock);
3918                 r = -EEXIST;
3919                 if (kvm->arch.vpit)
3920                         goto create_pit_unlock;
3921                 r = -ENOMEM;
3922                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3923                 if (kvm->arch.vpit)
3924                         r = 0;
3925         create_pit_unlock:
3926                 mutex_unlock(&kvm->slots_lock);
3927                 break;
3928         case KVM_GET_IRQCHIP: {
3929                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3930                 struct kvm_irqchip *chip;
3931
3932                 chip = memdup_user(argp, sizeof(*chip));
3933                 if (IS_ERR(chip)) {
3934                         r = PTR_ERR(chip);
3935                         goto out;
3936                 }
3937
3938                 r = -ENXIO;
3939                 if (!irqchip_in_kernel(kvm))
3940                         goto get_irqchip_out;
3941                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3942                 if (r)
3943                         goto get_irqchip_out;
3944                 r = -EFAULT;
3945                 if (copy_to_user(argp, chip, sizeof *chip))
3946                         goto get_irqchip_out;
3947                 r = 0;
3948         get_irqchip_out:
3949                 kfree(chip);
3950                 break;
3951         }
3952         case KVM_SET_IRQCHIP: {
3953                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3954                 struct kvm_irqchip *chip;
3955
3956                 chip = memdup_user(argp, sizeof(*chip));
3957                 if (IS_ERR(chip)) {
3958                         r = PTR_ERR(chip);
3959                         goto out;
3960                 }
3961
3962                 r = -ENXIO;
3963                 if (!irqchip_in_kernel(kvm))
3964                         goto set_irqchip_out;
3965                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3966                 if (r)
3967                         goto set_irqchip_out;
3968                 r = 0;
3969         set_irqchip_out:
3970                 kfree(chip);
3971                 break;
3972         }
3973         case KVM_GET_PIT: {
3974                 r = -EFAULT;
3975                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3976                         goto out;
3977                 r = -ENXIO;
3978                 if (!kvm->arch.vpit)
3979                         goto out;
3980                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3981                 if (r)
3982                         goto out;
3983                 r = -EFAULT;
3984                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3985                         goto out;
3986                 r = 0;
3987                 break;
3988         }
3989         case KVM_SET_PIT: {
3990                 r = -EFAULT;
3991                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3992                         goto out;
3993                 r = -ENXIO;
3994                 if (!kvm->arch.vpit)
3995                         goto out;
3996                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3997                 break;
3998         }
3999         case KVM_GET_PIT2: {
4000                 r = -ENXIO;
4001                 if (!kvm->arch.vpit)
4002                         goto out;
4003                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4004                 if (r)
4005                         goto out;
4006                 r = -EFAULT;
4007                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4008                         goto out;
4009                 r = 0;
4010                 break;
4011         }
4012         case KVM_SET_PIT2: {
4013                 r = -EFAULT;
4014                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4015                         goto out;
4016                 r = -ENXIO;
4017                 if (!kvm->arch.vpit)
4018                         goto out;
4019                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4020                 break;
4021         }
4022         case KVM_REINJECT_CONTROL: {
4023                 struct kvm_reinject_control control;
4024                 r =  -EFAULT;
4025                 if (copy_from_user(&control, argp, sizeof(control)))
4026                         goto out;
4027                 r = kvm_vm_ioctl_reinject(kvm, &control);
4028                 break;
4029         }
4030         case KVM_XEN_HVM_CONFIG: {
4031                 r = -EFAULT;
4032                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4033                                    sizeof(struct kvm_xen_hvm_config)))
4034                         goto out;
4035                 r = -EINVAL;
4036                 if (kvm->arch.xen_hvm_config.flags)
4037                         goto out;
4038                 r = 0;
4039                 break;
4040         }
4041         case KVM_SET_CLOCK: {
4042                 struct kvm_clock_data user_ns;
4043                 u64 now_ns;
4044                 s64 delta;
4045
4046                 r = -EFAULT;
4047                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4048                         goto out;
4049
4050                 r = -EINVAL;
4051                 if (user_ns.flags)
4052                         goto out;
4053
4054                 r = 0;
4055                 local_irq_disable();
4056                 now_ns = get_kernel_ns();
4057                 delta = user_ns.clock - now_ns;
4058                 local_irq_enable();
4059                 kvm->arch.kvmclock_offset = delta;
4060                 kvm_gen_update_masterclock(kvm);
4061                 break;
4062         }
4063         case KVM_GET_CLOCK: {
4064                 struct kvm_clock_data user_ns;
4065                 u64 now_ns;
4066
4067                 local_irq_disable();
4068                 now_ns = get_kernel_ns();
4069                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4070                 local_irq_enable();
4071                 user_ns.flags = 0;
4072                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4073
4074                 r = -EFAULT;
4075                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4076                         goto out;
4077                 r = 0;
4078                 break;
4079         }
4080
4081         default:
4082                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4083         }
4084 out:
4085         return r;
4086 }
4087
4088 static void kvm_init_msr_list(void)
4089 {
4090         u32 dummy[2];
4091         unsigned i, j;
4092
4093         /* skip the first msrs in the list. KVM-specific */
4094         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
4095                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4096                         continue;
4097
4098                 /*
4099                  * Even MSRs that are valid in the host may not be exposed
4100                  * to the guests in some cases.  We could work around this
4101                  * in VMX with the generic MSR save/load machinery, but it
4102                  * is not really worthwhile since it will really only
4103                  * happen with nested virtualization.
4104                  */
4105                 switch (msrs_to_save[i]) {
4106                 case MSR_IA32_BNDCFGS:
4107                         if (!kvm_x86_ops->mpx_supported())
4108                                 continue;
4109                         break;
4110                 default:
4111                         break;
4112                 }
4113
4114                 if (j < i)
4115                         msrs_to_save[j] = msrs_to_save[i];
4116                 j++;
4117         }
4118         num_msrs_to_save = j;
4119 }
4120
4121 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4122                            const void *v)
4123 {
4124         int handled = 0;
4125         int n;
4126
4127         do {
4128                 n = min(len, 8);
4129                 if (!(vcpu->arch.apic &&
4130                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4131                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4132                         break;
4133                 handled += n;
4134                 addr += n;
4135                 len -= n;
4136                 v += n;
4137         } while (len);
4138
4139         return handled;
4140 }
4141
4142 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4143 {
4144         int handled = 0;
4145         int n;
4146
4147         do {
4148                 n = min(len, 8);
4149                 if (!(vcpu->arch.apic &&
4150                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4151                                          addr, n, v))
4152                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4153                         break;
4154                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4155                 handled += n;
4156                 addr += n;
4157                 len -= n;
4158                 v += n;
4159         } while (len);
4160
4161         return handled;
4162 }
4163
4164 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4165                         struct kvm_segment *var, int seg)
4166 {
4167         kvm_x86_ops->set_segment(vcpu, var, seg);
4168 }
4169
4170 void kvm_get_segment(struct kvm_vcpu *vcpu,
4171                      struct kvm_segment *var, int seg)
4172 {
4173         kvm_x86_ops->get_segment(vcpu, var, seg);
4174 }
4175
4176 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4177                            struct x86_exception *exception)
4178 {
4179         gpa_t t_gpa;
4180
4181         BUG_ON(!mmu_is_nested(vcpu));
4182
4183         /* NPT walks are always user-walks */
4184         access |= PFERR_USER_MASK;
4185         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4186
4187         return t_gpa;
4188 }
4189
4190 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4191                               struct x86_exception *exception)
4192 {
4193         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4194         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4195 }
4196
4197  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4198                                 struct x86_exception *exception)
4199 {
4200         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4201         access |= PFERR_FETCH_MASK;
4202         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4203 }
4204
4205 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4206                                struct x86_exception *exception)
4207 {
4208         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4209         access |= PFERR_WRITE_MASK;
4210         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4211 }
4212
4213 /* uses this to access any guest's mapped memory without checking CPL */
4214 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4215                                 struct x86_exception *exception)
4216 {
4217         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4218 }
4219
4220 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4221                                       struct kvm_vcpu *vcpu, u32 access,
4222                                       struct x86_exception *exception)
4223 {
4224         void *data = val;
4225         int r = X86EMUL_CONTINUE;
4226
4227         while (bytes) {
4228                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4229                                                             exception);
4230                 unsigned offset = addr & (PAGE_SIZE-1);
4231                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4232                 int ret;
4233
4234                 if (gpa == UNMAPPED_GVA)
4235                         return X86EMUL_PROPAGATE_FAULT;
4236                 ret = kvm_read_guest_page(vcpu->kvm, gpa >> PAGE_SHIFT, data,
4237                                           offset, toread);
4238                 if (ret < 0) {
4239                         r = X86EMUL_IO_NEEDED;
4240                         goto out;
4241                 }
4242
4243                 bytes -= toread;
4244                 data += toread;
4245                 addr += toread;
4246         }
4247 out:
4248         return r;
4249 }
4250
4251 /* used for instruction fetching */
4252 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4253                                 gva_t addr, void *val, unsigned int bytes,
4254                                 struct x86_exception *exception)
4255 {
4256         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4257         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4258         unsigned offset;
4259         int ret;
4260
4261         /* Inline kvm_read_guest_virt_helper for speed.  */
4262         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4263                                                     exception);
4264         if (unlikely(gpa == UNMAPPED_GVA))
4265                 return X86EMUL_PROPAGATE_FAULT;
4266
4267         offset = addr & (PAGE_SIZE-1);
4268         if (WARN_ON(offset + bytes > PAGE_SIZE))
4269                 bytes = (unsigned)PAGE_SIZE - offset;
4270         ret = kvm_read_guest_page(vcpu->kvm, gpa >> PAGE_SHIFT, val,
4271                                   offset, bytes);
4272         if (unlikely(ret < 0))
4273                 return X86EMUL_IO_NEEDED;
4274
4275         return X86EMUL_CONTINUE;
4276 }
4277
4278 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4279                                gva_t addr, void *val, unsigned int bytes,
4280                                struct x86_exception *exception)
4281 {
4282         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4283         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4284
4285         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4286                                           exception);
4287 }
4288 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4289
4290 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4291                                       gva_t addr, void *val, unsigned int bytes,
4292                                       struct x86_exception *exception)
4293 {
4294         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4295         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4296 }
4297
4298 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4299                                        gva_t addr, void *val,
4300                                        unsigned int bytes,
4301                                        struct x86_exception *exception)
4302 {
4303         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4304         void *data = val;
4305         int r = X86EMUL_CONTINUE;
4306
4307         while (bytes) {
4308                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4309                                                              PFERR_WRITE_MASK,
4310                                                              exception);
4311                 unsigned offset = addr & (PAGE_SIZE-1);
4312                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4313                 int ret;
4314
4315                 if (gpa == UNMAPPED_GVA)
4316                         return X86EMUL_PROPAGATE_FAULT;
4317                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4318                 if (ret < 0) {
4319                         r = X86EMUL_IO_NEEDED;
4320                         goto out;
4321                 }
4322
4323                 bytes -= towrite;
4324                 data += towrite;
4325                 addr += towrite;
4326         }
4327 out:
4328         return r;
4329 }
4330 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4331
4332 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4333                                 gpa_t *gpa, struct x86_exception *exception,
4334                                 bool write)
4335 {
4336         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4337                 | (write ? PFERR_WRITE_MASK : 0);
4338
4339         if (vcpu_match_mmio_gva(vcpu, gva)
4340             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4341                                  vcpu->arch.access, access)) {
4342                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4343                                         (gva & (PAGE_SIZE - 1));
4344                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4345                 return 1;
4346         }
4347
4348         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4349
4350         if (*gpa == UNMAPPED_GVA)
4351                 return -1;
4352
4353         /* For APIC access vmexit */
4354         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4355                 return 1;
4356
4357         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4358                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4359                 return 1;
4360         }
4361
4362         return 0;
4363 }
4364
4365 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4366                         const void *val, int bytes)
4367 {
4368         int ret;
4369
4370         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4371         if (ret < 0)
4372                 return 0;
4373         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4374         return 1;
4375 }
4376
4377 struct read_write_emulator_ops {
4378         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4379                                   int bytes);
4380         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4381                                   void *val, int bytes);
4382         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4383                                int bytes, void *val);
4384         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4385                                     void *val, int bytes);
4386         bool write;
4387 };
4388
4389 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4390 {
4391         if (vcpu->mmio_read_completed) {
4392                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4393                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4394                 vcpu->mmio_read_completed = 0;
4395                 return 1;
4396         }
4397
4398         return 0;
4399 }
4400
4401 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4402                         void *val, int bytes)
4403 {
4404         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4405 }
4406
4407 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4408                          void *val, int bytes)
4409 {
4410         return emulator_write_phys(vcpu, gpa, val, bytes);
4411 }
4412
4413 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4414 {
4415         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4416         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4417 }
4418
4419 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4420                           void *val, int bytes)
4421 {
4422         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4423         return X86EMUL_IO_NEEDED;
4424 }
4425
4426 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4427                            void *val, int bytes)
4428 {
4429         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4430
4431         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4432         return X86EMUL_CONTINUE;
4433 }
4434
4435 static const struct read_write_emulator_ops read_emultor = {
4436         .read_write_prepare = read_prepare,
4437         .read_write_emulate = read_emulate,
4438         .read_write_mmio = vcpu_mmio_read,
4439         .read_write_exit_mmio = read_exit_mmio,
4440 };
4441
4442 static const struct read_write_emulator_ops write_emultor = {
4443         .read_write_emulate = write_emulate,
4444         .read_write_mmio = write_mmio,
4445         .read_write_exit_mmio = write_exit_mmio,
4446         .write = true,
4447 };
4448
4449 static int emulator_read_write_onepage(unsigned long addr, void *val,
4450                                        unsigned int bytes,
4451                                        struct x86_exception *exception,
4452                                        struct kvm_vcpu *vcpu,
4453                                        const struct read_write_emulator_ops *ops)
4454 {
4455         gpa_t gpa;
4456         int handled, ret;
4457         bool write = ops->write;
4458         struct kvm_mmio_fragment *frag;
4459
4460         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4461
4462         if (ret < 0)
4463                 return X86EMUL_PROPAGATE_FAULT;
4464
4465         /* For APIC access vmexit */
4466         if (ret)
4467                 goto mmio;
4468
4469         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4470                 return X86EMUL_CONTINUE;
4471
4472 mmio:
4473         /*
4474          * Is this MMIO handled locally?
4475          */
4476         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4477         if (handled == bytes)
4478                 return X86EMUL_CONTINUE;
4479
4480         gpa += handled;
4481         bytes -= handled;
4482         val += handled;
4483
4484         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4485         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4486         frag->gpa = gpa;
4487         frag->data = val;
4488         frag->len = bytes;
4489         return X86EMUL_CONTINUE;
4490 }
4491
4492 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4493                         unsigned long addr,
4494                         void *val, unsigned int bytes,
4495                         struct x86_exception *exception,
4496                         const struct read_write_emulator_ops *ops)
4497 {
4498         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4499         gpa_t gpa;
4500         int rc;
4501
4502         if (ops->read_write_prepare &&
4503                   ops->read_write_prepare(vcpu, val, bytes))
4504                 return X86EMUL_CONTINUE;
4505
4506         vcpu->mmio_nr_fragments = 0;
4507
4508         /* Crossing a page boundary? */
4509         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4510                 int now;
4511
4512                 now = -addr & ~PAGE_MASK;
4513                 rc = emulator_read_write_onepage(addr, val, now, exception,
4514                                                  vcpu, ops);
4515
4516                 if (rc != X86EMUL_CONTINUE)
4517                         return rc;
4518                 addr += now;
4519                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4520                         addr = (u32)addr;
4521                 val += now;
4522                 bytes -= now;
4523         }
4524
4525         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4526                                          vcpu, ops);
4527         if (rc != X86EMUL_CONTINUE)
4528                 return rc;
4529
4530         if (!vcpu->mmio_nr_fragments)
4531                 return rc;
4532
4533         gpa = vcpu->mmio_fragments[0].gpa;
4534
4535         vcpu->mmio_needed = 1;
4536         vcpu->mmio_cur_fragment = 0;
4537
4538         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4539         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4540         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4541         vcpu->run->mmio.phys_addr = gpa;
4542
4543         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4544 }
4545
4546 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4547                                   unsigned long addr,
4548                                   void *val,
4549                                   unsigned int bytes,
4550                                   struct x86_exception *exception)
4551 {
4552         return emulator_read_write(ctxt, addr, val, bytes,
4553                                    exception, &read_emultor);
4554 }
4555
4556 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4557                             unsigned long addr,
4558                             const void *val,
4559                             unsigned int bytes,
4560                             struct x86_exception *exception)
4561 {
4562         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4563                                    exception, &write_emultor);
4564 }
4565
4566 #define CMPXCHG_TYPE(t, ptr, old, new) \
4567         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4568
4569 #ifdef CONFIG_X86_64
4570 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4571 #else
4572 #  define CMPXCHG64(ptr, old, new) \
4573         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4574 #endif
4575
4576 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4577                                      unsigned long addr,
4578                                      const void *old,
4579                                      const void *new,
4580                                      unsigned int bytes,
4581                                      struct x86_exception *exception)
4582 {
4583         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4584         gpa_t gpa;
4585         struct page *page;
4586         char *kaddr;
4587         bool exchanged;
4588
4589         /* guests cmpxchg8b have to be emulated atomically */
4590         if (bytes > 8 || (bytes & (bytes - 1)))
4591                 goto emul_write;
4592
4593         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4594
4595         if (gpa == UNMAPPED_GVA ||
4596             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4597                 goto emul_write;
4598
4599         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4600                 goto emul_write;
4601
4602         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4603         if (is_error_page(page))
4604                 goto emul_write;
4605
4606         kaddr = kmap_atomic(page);
4607         kaddr += offset_in_page(gpa);
4608         switch (bytes) {
4609         case 1:
4610                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4611                 break;
4612         case 2:
4613                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4614                 break;
4615         case 4:
4616                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4617                 break;
4618         case 8:
4619                 exchanged = CMPXCHG64(kaddr, old, new);
4620                 break;
4621         default:
4622                 BUG();
4623         }
4624         kunmap_atomic(kaddr);
4625         kvm_release_page_dirty(page);
4626
4627         if (!exchanged)
4628                 return X86EMUL_CMPXCHG_FAILED;
4629
4630         mark_page_dirty(vcpu->kvm, gpa >> PAGE_SHIFT);
4631         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4632
4633         return X86EMUL_CONTINUE;
4634
4635 emul_write:
4636         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4637
4638         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4639 }
4640
4641 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4642 {
4643         /* TODO: String I/O for in kernel device */
4644         int r;
4645
4646         if (vcpu->arch.pio.in)
4647                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4648                                     vcpu->arch.pio.size, pd);
4649         else
4650                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4651                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4652                                      pd);
4653         return r;
4654 }
4655
4656 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4657                                unsigned short port, void *val,
4658                                unsigned int count, bool in)
4659 {
4660         vcpu->arch.pio.port = port;
4661         vcpu->arch.pio.in = in;
4662         vcpu->arch.pio.count  = count;
4663         vcpu->arch.pio.size = size;
4664
4665         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4666                 vcpu->arch.pio.count = 0;
4667                 return 1;
4668         }
4669
4670         vcpu->run->exit_reason = KVM_EXIT_IO;
4671         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4672         vcpu->run->io.size = size;
4673         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4674         vcpu->run->io.count = count;
4675         vcpu->run->io.port = port;
4676
4677         return 0;
4678 }
4679
4680 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4681                                     int size, unsigned short port, void *val,
4682                                     unsigned int count)
4683 {
4684         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4685         int ret;
4686
4687         if (vcpu->arch.pio.count)
4688                 goto data_avail;
4689
4690         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4691         if (ret) {
4692 data_avail:
4693                 memcpy(val, vcpu->arch.pio_data, size * count);
4694                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4695                 vcpu->arch.pio.count = 0;
4696                 return 1;
4697         }
4698
4699         return 0;
4700 }
4701
4702 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4703                                      int size, unsigned short port,
4704                                      const void *val, unsigned int count)
4705 {
4706         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4707
4708         memcpy(vcpu->arch.pio_data, val, size * count);
4709         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4710         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4711 }
4712
4713 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4714 {
4715         return kvm_x86_ops->get_segment_base(vcpu, seg);
4716 }
4717
4718 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4719 {
4720         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4721 }
4722
4723 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4724 {
4725         if (!need_emulate_wbinvd(vcpu))
4726                 return X86EMUL_CONTINUE;
4727
4728         if (kvm_x86_ops->has_wbinvd_exit()) {
4729                 int cpu = get_cpu();
4730
4731                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4732                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4733                                 wbinvd_ipi, NULL, 1);
4734                 put_cpu();
4735                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4736         } else
4737                 wbinvd();
4738         return X86EMUL_CONTINUE;
4739 }
4740
4741 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4742 {
4743         kvm_x86_ops->skip_emulated_instruction(vcpu);
4744         return kvm_emulate_wbinvd_noskip(vcpu);
4745 }
4746 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4747
4748
4749
4750 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4751 {
4752         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4753 }
4754
4755 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4756                            unsigned long *dest)
4757 {
4758         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4759 }
4760
4761 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4762                            unsigned long value)
4763 {
4764
4765         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4766 }
4767
4768 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4769 {
4770         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4771 }
4772
4773 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4774 {
4775         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4776         unsigned long value;
4777
4778         switch (cr) {
4779         case 0:
4780                 value = kvm_read_cr0(vcpu);
4781                 break;
4782         case 2:
4783                 value = vcpu->arch.cr2;
4784                 break;
4785         case 3:
4786                 value = kvm_read_cr3(vcpu);
4787                 break;
4788         case 4:
4789                 value = kvm_read_cr4(vcpu);
4790                 break;
4791         case 8:
4792                 value = kvm_get_cr8(vcpu);
4793                 break;
4794         default:
4795                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4796                 return 0;
4797         }
4798
4799         return value;
4800 }
4801
4802 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4803 {
4804         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4805         int res = 0;
4806
4807         switch (cr) {
4808         case 0:
4809                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4810                 break;
4811         case 2:
4812                 vcpu->arch.cr2 = val;
4813                 break;
4814         case 3:
4815                 res = kvm_set_cr3(vcpu, val);
4816                 break;
4817         case 4:
4818                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4819                 break;
4820         case 8:
4821                 res = kvm_set_cr8(vcpu, val);
4822                 break;
4823         default:
4824                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4825                 res = -1;
4826         }
4827
4828         return res;
4829 }
4830
4831 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4832 {
4833         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4834 }
4835
4836 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4837 {
4838         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4839 }
4840
4841 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4842 {
4843         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4844 }
4845
4846 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4847 {
4848         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4849 }
4850
4851 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4852 {
4853         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4854 }
4855
4856 static unsigned long emulator_get_cached_segment_base(
4857         struct x86_emulate_ctxt *ctxt, int seg)
4858 {
4859         return get_segment_base(emul_to_vcpu(ctxt), seg);
4860 }
4861
4862 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4863                                  struct desc_struct *desc, u32 *base3,
4864                                  int seg)
4865 {
4866         struct kvm_segment var;
4867
4868         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4869         *selector = var.selector;
4870
4871         if (var.unusable) {
4872                 memset(desc, 0, sizeof(*desc));
4873                 return false;
4874         }
4875
4876         if (var.g)
4877                 var.limit >>= 12;
4878         set_desc_limit(desc, var.limit);
4879         set_desc_base(desc, (unsigned long)var.base);
4880 #ifdef CONFIG_X86_64
4881         if (base3)
4882                 *base3 = var.base >> 32;
4883 #endif
4884         desc->type = var.type;
4885         desc->s = var.s;
4886         desc->dpl = var.dpl;
4887         desc->p = var.present;
4888         desc->avl = var.avl;
4889         desc->l = var.l;
4890         desc->d = var.db;
4891         desc->g = var.g;
4892
4893         return true;
4894 }
4895
4896 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4897                                  struct desc_struct *desc, u32 base3,
4898                                  int seg)
4899 {
4900         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4901         struct kvm_segment var;
4902
4903         var.selector = selector;
4904         var.base = get_desc_base(desc);
4905 #ifdef CONFIG_X86_64
4906         var.base |= ((u64)base3) << 32;
4907 #endif
4908         var.limit = get_desc_limit(desc);
4909         if (desc->g)
4910                 var.limit = (var.limit << 12) | 0xfff;
4911         var.type = desc->type;
4912         var.dpl = desc->dpl;
4913         var.db = desc->d;
4914         var.s = desc->s;
4915         var.l = desc->l;
4916         var.g = desc->g;
4917         var.avl = desc->avl;
4918         var.present = desc->p;
4919         var.unusable = !var.present;
4920         var.padding = 0;
4921
4922         kvm_set_segment(vcpu, &var, seg);
4923         return;
4924 }
4925
4926 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4927                             u32 msr_index, u64 *pdata)
4928 {
4929         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4930 }
4931
4932 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4933                             u32 msr_index, u64 data)
4934 {
4935         struct msr_data msr;
4936
4937         msr.data = data;
4938         msr.index = msr_index;
4939         msr.host_initiated = false;
4940         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4941 }
4942
4943 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4944                               u32 pmc)
4945 {
4946         return kvm_pmu_check_pmc(emul_to_vcpu(ctxt), pmc);
4947 }
4948
4949 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4950                              u32 pmc, u64 *pdata)
4951 {
4952         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4953 }
4954
4955 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4956 {
4957         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4958 }
4959
4960 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4961 {
4962         preempt_disable();
4963         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4964         /*
4965          * CR0.TS may reference the host fpu state, not the guest fpu state,
4966          * so it may be clear at this point.
4967          */
4968         clts();
4969 }
4970
4971 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4972 {
4973         preempt_enable();
4974 }
4975
4976 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4977                               struct x86_instruction_info *info,
4978                               enum x86_intercept_stage stage)
4979 {
4980         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4981 }
4982
4983 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4984                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4985 {
4986         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4987 }
4988
4989 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4990 {
4991         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4992 }
4993
4994 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4995 {
4996         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4997 }
4998
4999 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5000 {
5001         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5002 }
5003
5004 static const struct x86_emulate_ops emulate_ops = {
5005         .read_gpr            = emulator_read_gpr,
5006         .write_gpr           = emulator_write_gpr,
5007         .read_std            = kvm_read_guest_virt_system,
5008         .write_std           = kvm_write_guest_virt_system,
5009         .fetch               = kvm_fetch_guest_virt,
5010         .read_emulated       = emulator_read_emulated,
5011         .write_emulated      = emulator_write_emulated,
5012         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5013         .invlpg              = emulator_invlpg,
5014         .pio_in_emulated     = emulator_pio_in_emulated,
5015         .pio_out_emulated    = emulator_pio_out_emulated,
5016         .get_segment         = emulator_get_segment,
5017         .set_segment         = emulator_set_segment,
5018         .get_cached_segment_base = emulator_get_cached_segment_base,
5019         .get_gdt             = emulator_get_gdt,
5020         .get_idt             = emulator_get_idt,
5021         .set_gdt             = emulator_set_gdt,
5022         .set_idt             = emulator_set_idt,
5023         .get_cr              = emulator_get_cr,
5024         .set_cr              = emulator_set_cr,
5025         .cpl                 = emulator_get_cpl,
5026         .get_dr              = emulator_get_dr,
5027         .set_dr              = emulator_set_dr,
5028         .set_msr             = emulator_set_msr,
5029         .get_msr             = emulator_get_msr,
5030         .check_pmc           = emulator_check_pmc,
5031         .read_pmc            = emulator_read_pmc,
5032         .halt                = emulator_halt,
5033         .wbinvd              = emulator_wbinvd,
5034         .fix_hypercall       = emulator_fix_hypercall,
5035         .get_fpu             = emulator_get_fpu,
5036         .put_fpu             = emulator_put_fpu,
5037         .intercept           = emulator_intercept,
5038         .get_cpuid           = emulator_get_cpuid,
5039         .set_nmi_mask        = emulator_set_nmi_mask,
5040 };
5041
5042 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5043 {
5044         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5045         /*
5046          * an sti; sti; sequence only disable interrupts for the first
5047          * instruction. So, if the last instruction, be it emulated or
5048          * not, left the system with the INT_STI flag enabled, it
5049          * means that the last instruction is an sti. We should not
5050          * leave the flag on in this case. The same goes for mov ss
5051          */
5052         if (int_shadow & mask)
5053                 mask = 0;
5054         if (unlikely(int_shadow || mask)) {
5055                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5056                 if (!mask)
5057                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5058         }
5059 }
5060
5061 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5062 {
5063         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5064         if (ctxt->exception.vector == PF_VECTOR)
5065                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5066
5067         if (ctxt->exception.error_code_valid)
5068                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5069                                       ctxt->exception.error_code);
5070         else
5071                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5072         return false;
5073 }
5074
5075 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5076 {
5077         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5078         int cs_db, cs_l;
5079
5080         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5081
5082         ctxt->eflags = kvm_get_rflags(vcpu);
5083         ctxt->eip = kvm_rip_read(vcpu);
5084         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5085                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5086                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5087                      cs_db                              ? X86EMUL_MODE_PROT32 :
5088                                                           X86EMUL_MODE_PROT16;
5089         ctxt->guest_mode = is_guest_mode(vcpu);
5090
5091         init_decode_cache(ctxt);
5092         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5093 }
5094
5095 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5096 {
5097         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5098         int ret;
5099
5100         init_emulate_ctxt(vcpu);
5101
5102         ctxt->op_bytes = 2;
5103         ctxt->ad_bytes = 2;
5104         ctxt->_eip = ctxt->eip + inc_eip;
5105         ret = emulate_int_real(ctxt, irq);
5106
5107         if (ret != X86EMUL_CONTINUE)
5108                 return EMULATE_FAIL;
5109
5110         ctxt->eip = ctxt->_eip;
5111         kvm_rip_write(vcpu, ctxt->eip);
5112         kvm_set_rflags(vcpu, ctxt->eflags);
5113
5114         if (irq == NMI_VECTOR)
5115                 vcpu->arch.nmi_pending = 0;
5116         else
5117                 vcpu->arch.interrupt.pending = false;
5118
5119         return EMULATE_DONE;
5120 }
5121 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5122
5123 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5124 {
5125         int r = EMULATE_DONE;
5126
5127         ++vcpu->stat.insn_emulation_fail;
5128         trace_kvm_emulate_insn_failed(vcpu);
5129         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5130                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5131                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5132                 vcpu->run->internal.ndata = 0;
5133                 r = EMULATE_FAIL;
5134         }
5135         kvm_queue_exception(vcpu, UD_VECTOR);
5136
5137         return r;
5138 }
5139
5140 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5141                                   bool write_fault_to_shadow_pgtable,
5142                                   int emulation_type)
5143 {
5144         gpa_t gpa = cr2;
5145         pfn_t pfn;
5146
5147         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5148                 return false;
5149
5150         if (!vcpu->arch.mmu.direct_map) {
5151                 /*
5152                  * Write permission should be allowed since only
5153                  * write access need to be emulated.
5154                  */
5155                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5156
5157                 /*
5158                  * If the mapping is invalid in guest, let cpu retry
5159                  * it to generate fault.
5160                  */
5161                 if (gpa == UNMAPPED_GVA)
5162                         return true;
5163         }
5164
5165         /*
5166          * Do not retry the unhandleable instruction if it faults on the
5167          * readonly host memory, otherwise it will goto a infinite loop:
5168          * retry instruction -> write #PF -> emulation fail -> retry
5169          * instruction -> ...
5170          */
5171         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5172
5173         /*
5174          * If the instruction failed on the error pfn, it can not be fixed,
5175          * report the error to userspace.
5176          */
5177         if (is_error_noslot_pfn(pfn))
5178                 return false;
5179
5180         kvm_release_pfn_clean(pfn);
5181
5182         /* The instructions are well-emulated on direct mmu. */
5183         if (vcpu->arch.mmu.direct_map) {
5184                 unsigned int indirect_shadow_pages;
5185
5186                 spin_lock(&vcpu->kvm->mmu_lock);
5187                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5188                 spin_unlock(&vcpu->kvm->mmu_lock);
5189
5190                 if (indirect_shadow_pages)
5191                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5192
5193                 return true;
5194         }
5195
5196         /*
5197          * if emulation was due to access to shadowed page table
5198          * and it failed try to unshadow page and re-enter the
5199          * guest to let CPU execute the instruction.
5200          */
5201         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5202
5203         /*
5204          * If the access faults on its page table, it can not
5205          * be fixed by unprotecting shadow page and it should
5206          * be reported to userspace.
5207          */
5208         return !write_fault_to_shadow_pgtable;
5209 }
5210
5211 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5212                               unsigned long cr2,  int emulation_type)
5213 {
5214         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5215         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5216
5217         last_retry_eip = vcpu->arch.last_retry_eip;
5218         last_retry_addr = vcpu->arch.last_retry_addr;
5219
5220         /*
5221          * If the emulation is caused by #PF and it is non-page_table
5222          * writing instruction, it means the VM-EXIT is caused by shadow
5223          * page protected, we can zap the shadow page and retry this
5224          * instruction directly.
5225          *
5226          * Note: if the guest uses a non-page-table modifying instruction
5227          * on the PDE that points to the instruction, then we will unmap
5228          * the instruction and go to an infinite loop. So, we cache the
5229          * last retried eip and the last fault address, if we meet the eip
5230          * and the address again, we can break out of the potential infinite
5231          * loop.
5232          */
5233         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5234
5235         if (!(emulation_type & EMULTYPE_RETRY))
5236                 return false;
5237
5238         if (x86_page_table_writing_insn(ctxt))
5239                 return false;
5240
5241         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5242                 return false;
5243
5244         vcpu->arch.last_retry_eip = ctxt->eip;
5245         vcpu->arch.last_retry_addr = cr2;
5246
5247         if (!vcpu->arch.mmu.direct_map)
5248                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5249
5250         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5251
5252         return true;
5253 }
5254
5255 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5256 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5257
5258 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5259                                 unsigned long *db)
5260 {
5261         u32 dr6 = 0;
5262         int i;
5263         u32 enable, rwlen;
5264
5265         enable = dr7;
5266         rwlen = dr7 >> 16;
5267         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5268                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5269                         dr6 |= (1 << i);
5270         return dr6;
5271 }
5272
5273 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5274 {
5275         struct kvm_run *kvm_run = vcpu->run;
5276
5277         /*
5278          * rflags is the old, "raw" value of the flags.  The new value has
5279          * not been saved yet.
5280          *
5281          * This is correct even for TF set by the guest, because "the
5282          * processor will not generate this exception after the instruction
5283          * that sets the TF flag".
5284          */
5285         if (unlikely(rflags & X86_EFLAGS_TF)) {
5286                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5287                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5288                                                   DR6_RTM;
5289                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5290                         kvm_run->debug.arch.exception = DB_VECTOR;
5291                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5292                         *r = EMULATE_USER_EXIT;
5293                 } else {
5294                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5295                         /*
5296                          * "Certain debug exceptions may clear bit 0-3.  The
5297                          * remaining contents of the DR6 register are never
5298                          * cleared by the processor".
5299                          */
5300                         vcpu->arch.dr6 &= ~15;
5301                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5302                         kvm_queue_exception(vcpu, DB_VECTOR);
5303                 }
5304         }
5305 }
5306
5307 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5308 {
5309         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5310             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5311                 struct kvm_run *kvm_run = vcpu->run;
5312                 unsigned long eip = kvm_get_linear_rip(vcpu);
5313                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5314                                            vcpu->arch.guest_debug_dr7,
5315                                            vcpu->arch.eff_db);
5316
5317                 if (dr6 != 0) {
5318                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5319                         kvm_run->debug.arch.pc = eip;
5320                         kvm_run->debug.arch.exception = DB_VECTOR;
5321                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5322                         *r = EMULATE_USER_EXIT;
5323                         return true;
5324                 }
5325         }
5326
5327         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5328             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5329                 unsigned long eip = kvm_get_linear_rip(vcpu);
5330                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5331                                            vcpu->arch.dr7,
5332                                            vcpu->arch.db);
5333
5334                 if (dr6 != 0) {
5335                         vcpu->arch.dr6 &= ~15;
5336                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5337                         kvm_queue_exception(vcpu, DB_VECTOR);
5338                         *r = EMULATE_DONE;
5339                         return true;
5340                 }
5341         }
5342
5343         return false;
5344 }
5345
5346 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5347                             unsigned long cr2,
5348                             int emulation_type,
5349                             void *insn,
5350                             int insn_len)
5351 {
5352         int r;
5353         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5354         bool writeback = true;
5355         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5356
5357         /*
5358          * Clear write_fault_to_shadow_pgtable here to ensure it is
5359          * never reused.
5360          */
5361         vcpu->arch.write_fault_to_shadow_pgtable = false;
5362         kvm_clear_exception_queue(vcpu);
5363
5364         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5365                 init_emulate_ctxt(vcpu);
5366
5367                 /*
5368                  * We will reenter on the same instruction since
5369                  * we do not set complete_userspace_io.  This does not
5370                  * handle watchpoints yet, those would be handled in
5371                  * the emulate_ops.
5372                  */
5373                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5374                         return r;
5375
5376                 ctxt->interruptibility = 0;
5377                 ctxt->have_exception = false;
5378                 ctxt->exception.vector = -1;
5379                 ctxt->perm_ok = false;
5380
5381                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5382
5383                 r = x86_decode_insn(ctxt, insn, insn_len);
5384
5385                 trace_kvm_emulate_insn_start(vcpu);
5386                 ++vcpu->stat.insn_emulation;
5387                 if (r != EMULATION_OK)  {
5388                         if (emulation_type & EMULTYPE_TRAP_UD)
5389                                 return EMULATE_FAIL;
5390                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5391                                                 emulation_type))
5392                                 return EMULATE_DONE;
5393                         if (emulation_type & EMULTYPE_SKIP)
5394                                 return EMULATE_FAIL;
5395                         return handle_emulation_failure(vcpu);
5396                 }
5397         }
5398
5399         if (emulation_type & EMULTYPE_SKIP) {
5400                 kvm_rip_write(vcpu, ctxt->_eip);
5401                 if (ctxt->eflags & X86_EFLAGS_RF)
5402                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5403                 return EMULATE_DONE;
5404         }
5405
5406         if (retry_instruction(ctxt, cr2, emulation_type))
5407                 return EMULATE_DONE;
5408
5409         /* this is needed for vmware backdoor interface to work since it
5410            changes registers values  during IO operation */
5411         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5412                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5413                 emulator_invalidate_register_cache(ctxt);
5414         }
5415
5416 restart:
5417         r = x86_emulate_insn(ctxt);
5418
5419         if (r == EMULATION_INTERCEPTED)
5420                 return EMULATE_DONE;
5421
5422         if (r == EMULATION_FAILED) {
5423                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5424                                         emulation_type))
5425                         return EMULATE_DONE;
5426
5427                 return handle_emulation_failure(vcpu);
5428         }
5429
5430         if (ctxt->have_exception) {
5431                 r = EMULATE_DONE;
5432                 if (inject_emulated_exception(vcpu))
5433                         return r;
5434         } else if (vcpu->arch.pio.count) {
5435                 if (!vcpu->arch.pio.in) {
5436                         /* FIXME: return into emulator if single-stepping.  */
5437                         vcpu->arch.pio.count = 0;
5438                 } else {
5439                         writeback = false;
5440                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5441                 }
5442                 r = EMULATE_USER_EXIT;
5443         } else if (vcpu->mmio_needed) {
5444                 if (!vcpu->mmio_is_write)
5445                         writeback = false;
5446                 r = EMULATE_USER_EXIT;
5447                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5448         } else if (r == EMULATION_RESTART)
5449                 goto restart;
5450         else
5451                 r = EMULATE_DONE;
5452
5453         if (writeback) {
5454                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5455                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5456                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5457                 kvm_rip_write(vcpu, ctxt->eip);
5458                 if (r == EMULATE_DONE)
5459                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5460                 if (!ctxt->have_exception ||
5461                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5462                         __kvm_set_rflags(vcpu, ctxt->eflags);
5463
5464                 /*
5465                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5466                  * do nothing, and it will be requested again as soon as
5467                  * the shadow expires.  But we still need to check here,
5468                  * because POPF has no interrupt shadow.
5469                  */
5470                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5471                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5472         } else
5473                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5474
5475         return r;
5476 }
5477 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5478
5479 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5480 {
5481         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5482         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5483                                             size, port, &val, 1);
5484         /* do not return to emulator after return from userspace */
5485         vcpu->arch.pio.count = 0;
5486         return ret;
5487 }
5488 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5489
5490 static void tsc_bad(void *info)
5491 {
5492         __this_cpu_write(cpu_tsc_khz, 0);
5493 }
5494
5495 static void tsc_khz_changed(void *data)
5496 {
5497         struct cpufreq_freqs *freq = data;
5498         unsigned long khz = 0;
5499
5500         if (data)
5501                 khz = freq->new;
5502         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5503                 khz = cpufreq_quick_get(raw_smp_processor_id());
5504         if (!khz)
5505                 khz = tsc_khz;
5506         __this_cpu_write(cpu_tsc_khz, khz);
5507 }
5508
5509 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5510                                      void *data)
5511 {
5512         struct cpufreq_freqs *freq = data;
5513         struct kvm *kvm;
5514         struct kvm_vcpu *vcpu;
5515         int i, send_ipi = 0;
5516
5517         /*
5518          * We allow guests to temporarily run on slowing clocks,
5519          * provided we notify them after, or to run on accelerating
5520          * clocks, provided we notify them before.  Thus time never
5521          * goes backwards.
5522          *
5523          * However, we have a problem.  We can't atomically update
5524          * the frequency of a given CPU from this function; it is
5525          * merely a notifier, which can be called from any CPU.
5526          * Changing the TSC frequency at arbitrary points in time
5527          * requires a recomputation of local variables related to
5528          * the TSC for each VCPU.  We must flag these local variables
5529          * to be updated and be sure the update takes place with the
5530          * new frequency before any guests proceed.
5531          *
5532          * Unfortunately, the combination of hotplug CPU and frequency
5533          * change creates an intractable locking scenario; the order
5534          * of when these callouts happen is undefined with respect to
5535          * CPU hotplug, and they can race with each other.  As such,
5536          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5537          * undefined; you can actually have a CPU frequency change take
5538          * place in between the computation of X and the setting of the
5539          * variable.  To protect against this problem, all updates of
5540          * the per_cpu tsc_khz variable are done in an interrupt
5541          * protected IPI, and all callers wishing to update the value
5542          * must wait for a synchronous IPI to complete (which is trivial
5543          * if the caller is on the CPU already).  This establishes the
5544          * necessary total order on variable updates.
5545          *
5546          * Note that because a guest time update may take place
5547          * anytime after the setting of the VCPU's request bit, the
5548          * correct TSC value must be set before the request.  However,
5549          * to ensure the update actually makes it to any guest which
5550          * starts running in hardware virtualization between the set
5551          * and the acquisition of the spinlock, we must also ping the
5552          * CPU after setting the request bit.
5553          *
5554          */
5555
5556         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5557                 return 0;
5558         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5559                 return 0;
5560
5561         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5562
5563         spin_lock(&kvm_lock);
5564         list_for_each_entry(kvm, &vm_list, vm_list) {
5565                 kvm_for_each_vcpu(i, vcpu, kvm) {
5566                         if (vcpu->cpu != freq->cpu)
5567                                 continue;
5568                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5569                         if (vcpu->cpu != smp_processor_id())
5570                                 send_ipi = 1;
5571                 }
5572         }
5573         spin_unlock(&kvm_lock);
5574
5575         if (freq->old < freq->new && send_ipi) {
5576                 /*
5577                  * We upscale the frequency.  Must make the guest
5578                  * doesn't see old kvmclock values while running with
5579                  * the new frequency, otherwise we risk the guest sees
5580                  * time go backwards.
5581                  *
5582                  * In case we update the frequency for another cpu
5583                  * (which might be in guest context) send an interrupt
5584                  * to kick the cpu out of guest context.  Next time
5585                  * guest context is entered kvmclock will be updated,
5586                  * so the guest will not see stale values.
5587                  */
5588                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5589         }
5590         return 0;
5591 }
5592
5593 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5594         .notifier_call  = kvmclock_cpufreq_notifier
5595 };
5596
5597 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5598                                         unsigned long action, void *hcpu)
5599 {
5600         unsigned int cpu = (unsigned long)hcpu;
5601
5602         switch (action) {
5603                 case CPU_ONLINE:
5604                 case CPU_DOWN_FAILED:
5605                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5606                         break;
5607                 case CPU_DOWN_PREPARE:
5608                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5609                         break;
5610         }
5611         return NOTIFY_OK;
5612 }
5613
5614 static struct notifier_block kvmclock_cpu_notifier_block = {
5615         .notifier_call  = kvmclock_cpu_notifier,
5616         .priority = -INT_MAX
5617 };
5618
5619 static void kvm_timer_init(void)
5620 {
5621         int cpu;
5622
5623         max_tsc_khz = tsc_khz;
5624
5625         cpu_notifier_register_begin();
5626         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5627 #ifdef CONFIG_CPU_FREQ
5628                 struct cpufreq_policy policy;
5629                 memset(&policy, 0, sizeof(policy));
5630                 cpu = get_cpu();
5631                 cpufreq_get_policy(&policy, cpu);
5632                 if (policy.cpuinfo.max_freq)
5633                         max_tsc_khz = policy.cpuinfo.max_freq;
5634                 put_cpu();
5635 #endif
5636                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5637                                           CPUFREQ_TRANSITION_NOTIFIER);
5638         }
5639         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5640         for_each_online_cpu(cpu)
5641                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5642
5643         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5644         cpu_notifier_register_done();
5645
5646 }
5647
5648 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5649
5650 int kvm_is_in_guest(void)
5651 {
5652         return __this_cpu_read(current_vcpu) != NULL;
5653 }
5654
5655 static int kvm_is_user_mode(void)
5656 {
5657         int user_mode = 3;
5658
5659         if (__this_cpu_read(current_vcpu))
5660                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5661
5662         return user_mode != 0;
5663 }
5664
5665 static unsigned long kvm_get_guest_ip(void)
5666 {
5667         unsigned long ip = 0;
5668
5669         if (__this_cpu_read(current_vcpu))
5670                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5671
5672         return ip;
5673 }
5674
5675 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5676         .is_in_guest            = kvm_is_in_guest,
5677         .is_user_mode           = kvm_is_user_mode,
5678         .get_guest_ip           = kvm_get_guest_ip,
5679 };
5680
5681 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5682 {
5683         __this_cpu_write(current_vcpu, vcpu);
5684 }
5685 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5686
5687 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5688 {
5689         __this_cpu_write(current_vcpu, NULL);
5690 }
5691 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5692
5693 static void kvm_set_mmio_spte_mask(void)
5694 {
5695         u64 mask;
5696         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5697
5698         /*
5699          * Set the reserved bits and the present bit of an paging-structure
5700          * entry to generate page fault with PFER.RSV = 1.
5701          */
5702          /* Mask the reserved physical address bits. */
5703         mask = rsvd_bits(maxphyaddr, 51);
5704
5705         /* Bit 62 is always reserved for 32bit host. */
5706         mask |= 0x3ull << 62;
5707
5708         /* Set the present bit. */
5709         mask |= 1ull;
5710
5711 #ifdef CONFIG_X86_64
5712         /*
5713          * If reserved bit is not supported, clear the present bit to disable
5714          * mmio page fault.
5715          */
5716         if (maxphyaddr == 52)
5717                 mask &= ~1ull;
5718 #endif
5719
5720         kvm_mmu_set_mmio_spte_mask(mask);
5721 }
5722
5723 #ifdef CONFIG_X86_64
5724 static void pvclock_gtod_update_fn(struct work_struct *work)
5725 {
5726         struct kvm *kvm;
5727
5728         struct kvm_vcpu *vcpu;
5729         int i;
5730
5731         spin_lock(&kvm_lock);
5732         list_for_each_entry(kvm, &vm_list, vm_list)
5733                 kvm_for_each_vcpu(i, vcpu, kvm)
5734                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5735         atomic_set(&kvm_guest_has_master_clock, 0);
5736         spin_unlock(&kvm_lock);
5737 }
5738
5739 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5740
5741 /*
5742  * Notification about pvclock gtod data update.
5743  */
5744 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5745                                void *priv)
5746 {
5747         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5748         struct timekeeper *tk = priv;
5749
5750         update_pvclock_gtod(tk);
5751
5752         /* disable master clock if host does not trust, or does not
5753          * use, TSC clocksource
5754          */
5755         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5756             atomic_read(&kvm_guest_has_master_clock) != 0)
5757                 queue_work(system_long_wq, &pvclock_gtod_work);
5758
5759         return 0;
5760 }
5761
5762 static struct notifier_block pvclock_gtod_notifier = {
5763         .notifier_call = pvclock_gtod_notify,
5764 };
5765 #endif
5766
5767 int kvm_arch_init(void *opaque)
5768 {
5769         int r;
5770         struct kvm_x86_ops *ops = opaque;
5771
5772         if (kvm_x86_ops) {
5773                 printk(KERN_ERR "kvm: already loaded the other module\n");
5774                 r = -EEXIST;
5775                 goto out;
5776         }
5777
5778         if (!ops->cpu_has_kvm_support()) {
5779                 printk(KERN_ERR "kvm: no hardware support\n");
5780                 r = -EOPNOTSUPP;
5781                 goto out;
5782         }
5783         if (ops->disabled_by_bios()) {
5784                 printk(KERN_ERR "kvm: disabled by bios\n");
5785                 r = -EOPNOTSUPP;
5786                 goto out;
5787         }
5788
5789         r = -ENOMEM;
5790         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5791         if (!shared_msrs) {
5792                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5793                 goto out;
5794         }
5795
5796         r = kvm_mmu_module_init();
5797         if (r)
5798                 goto out_free_percpu;
5799
5800         kvm_set_mmio_spte_mask();
5801
5802         kvm_x86_ops = ops;
5803         kvm_init_msr_list();
5804
5805         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5806                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5807
5808         kvm_timer_init();
5809
5810         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5811
5812         if (cpu_has_xsave)
5813                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5814
5815         kvm_lapic_init();
5816 #ifdef CONFIG_X86_64
5817         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5818 #endif
5819
5820         return 0;
5821
5822 out_free_percpu:
5823         free_percpu(shared_msrs);
5824 out:
5825         return r;
5826 }
5827
5828 void kvm_arch_exit(void)
5829 {
5830         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5831
5832         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5833                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5834                                             CPUFREQ_TRANSITION_NOTIFIER);
5835         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5836 #ifdef CONFIG_X86_64
5837         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5838 #endif
5839         kvm_x86_ops = NULL;
5840         kvm_mmu_module_exit();
5841         free_percpu(shared_msrs);
5842 }
5843
5844 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5845 {
5846         ++vcpu->stat.halt_exits;
5847         if (irqchip_in_kernel(vcpu->kvm)) {
5848                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5849                 return 1;
5850         } else {
5851                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5852                 return 0;
5853         }
5854 }
5855 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5856
5857 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5858 {
5859         kvm_x86_ops->skip_emulated_instruction(vcpu);
5860         return kvm_vcpu_halt(vcpu);
5861 }
5862 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5863
5864 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5865 {
5866         u64 param, ingpa, outgpa, ret;
5867         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5868         bool fast, longmode;
5869
5870         /*
5871          * hypercall generates UD from non zero cpl and real mode
5872          * per HYPER-V spec
5873          */
5874         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5875                 kvm_queue_exception(vcpu, UD_VECTOR);
5876                 return 0;
5877         }
5878
5879         longmode = is_64_bit_mode(vcpu);
5880
5881         if (!longmode) {
5882                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5883                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5884                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5885                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5886                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5887                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5888         }
5889 #ifdef CONFIG_X86_64
5890         else {
5891                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5892                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5893                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5894         }
5895 #endif
5896
5897         code = param & 0xffff;
5898         fast = (param >> 16) & 0x1;
5899         rep_cnt = (param >> 32) & 0xfff;
5900         rep_idx = (param >> 48) & 0xfff;
5901
5902         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5903
5904         switch (code) {
5905         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5906                 kvm_vcpu_on_spin(vcpu);
5907                 break;
5908         default:
5909                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5910                 break;
5911         }
5912
5913         ret = res | (((u64)rep_done & 0xfff) << 32);
5914         if (longmode) {
5915                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5916         } else {
5917                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5918                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5919         }
5920
5921         return 1;
5922 }
5923
5924 /*
5925  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5926  *
5927  * @apicid - apicid of vcpu to be kicked.
5928  */
5929 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5930 {
5931         struct kvm_lapic_irq lapic_irq;
5932
5933         lapic_irq.shorthand = 0;
5934         lapic_irq.dest_mode = 0;
5935         lapic_irq.dest_id = apicid;
5936
5937         lapic_irq.delivery_mode = APIC_DM_REMRD;
5938         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5939 }
5940
5941 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5942 {
5943         unsigned long nr, a0, a1, a2, a3, ret;
5944         int op_64_bit, r = 1;
5945
5946         kvm_x86_ops->skip_emulated_instruction(vcpu);
5947
5948         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5949                 return kvm_hv_hypercall(vcpu);
5950
5951         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5952         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5953         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5954         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5955         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5956
5957         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5958
5959         op_64_bit = is_64_bit_mode(vcpu);
5960         if (!op_64_bit) {
5961                 nr &= 0xFFFFFFFF;
5962                 a0 &= 0xFFFFFFFF;
5963                 a1 &= 0xFFFFFFFF;
5964                 a2 &= 0xFFFFFFFF;
5965                 a3 &= 0xFFFFFFFF;
5966         }
5967
5968         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5969                 ret = -KVM_EPERM;
5970                 goto out;
5971         }
5972
5973         switch (nr) {
5974         case KVM_HC_VAPIC_POLL_IRQ:
5975                 ret = 0;
5976                 break;
5977         case KVM_HC_KICK_CPU:
5978                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5979                 ret = 0;
5980                 break;
5981         default:
5982                 ret = -KVM_ENOSYS;
5983                 break;
5984         }
5985 out:
5986         if (!op_64_bit)
5987                 ret = (u32)ret;
5988         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5989         ++vcpu->stat.hypercalls;
5990         return r;
5991 }
5992 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5993
5994 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5995 {
5996         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5997         char instruction[3];
5998         unsigned long rip = kvm_rip_read(vcpu);
5999
6000         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6001
6002         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6003 }
6004
6005 /*
6006  * Check if userspace requested an interrupt window, and that the
6007  * interrupt window is open.
6008  *
6009  * No need to exit to userspace if we already have an interrupt queued.
6010  */
6011 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6012 {
6013         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
6014                 vcpu->run->request_interrupt_window &&
6015                 kvm_arch_interrupt_allowed(vcpu));
6016 }
6017
6018 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6019 {
6020         struct kvm_run *kvm_run = vcpu->run;
6021
6022         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6023         kvm_run->cr8 = kvm_get_cr8(vcpu);
6024         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6025         if (irqchip_in_kernel(vcpu->kvm))
6026                 kvm_run->ready_for_interrupt_injection = 1;
6027         else
6028                 kvm_run->ready_for_interrupt_injection =
6029                         kvm_arch_interrupt_allowed(vcpu) &&
6030                         !kvm_cpu_has_interrupt(vcpu) &&
6031                         !kvm_event_needs_reinjection(vcpu);
6032 }
6033
6034 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6035 {
6036         int max_irr, tpr;
6037
6038         if (!kvm_x86_ops->update_cr8_intercept)
6039                 return;
6040
6041         if (!vcpu->arch.apic)
6042                 return;
6043
6044         if (!vcpu->arch.apic->vapic_addr)
6045                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6046         else
6047                 max_irr = -1;
6048
6049         if (max_irr != -1)
6050                 max_irr >>= 4;
6051
6052         tpr = kvm_lapic_get_cr8(vcpu);
6053
6054         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6055 }
6056
6057 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6058 {
6059         int r;
6060
6061         /* try to reinject previous events if any */
6062         if (vcpu->arch.exception.pending) {
6063                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6064                                         vcpu->arch.exception.has_error_code,
6065                                         vcpu->arch.exception.error_code);
6066
6067                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6068                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6069                                              X86_EFLAGS_RF);
6070
6071                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6072                     (vcpu->arch.dr7 & DR7_GD)) {
6073                         vcpu->arch.dr7 &= ~DR7_GD;
6074                         kvm_update_dr7(vcpu);
6075                 }
6076
6077                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6078                                           vcpu->arch.exception.has_error_code,
6079                                           vcpu->arch.exception.error_code,
6080                                           vcpu->arch.exception.reinject);
6081                 return 0;
6082         }
6083
6084         if (vcpu->arch.nmi_injected) {
6085                 kvm_x86_ops->set_nmi(vcpu);
6086                 return 0;
6087         }
6088
6089         if (vcpu->arch.interrupt.pending) {
6090                 kvm_x86_ops->set_irq(vcpu);
6091                 return 0;
6092         }
6093
6094         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6095                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6096                 if (r != 0)
6097                         return r;
6098         }
6099
6100         /* try to inject new event if pending */
6101         if (vcpu->arch.nmi_pending) {
6102                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6103                         --vcpu->arch.nmi_pending;
6104                         vcpu->arch.nmi_injected = true;
6105                         kvm_x86_ops->set_nmi(vcpu);
6106                 }
6107         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6108                 /*
6109                  * Because interrupts can be injected asynchronously, we are
6110                  * calling check_nested_events again here to avoid a race condition.
6111                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6112                  * proposal and current concerns.  Perhaps we should be setting
6113                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6114                  */
6115                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6116                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6117                         if (r != 0)
6118                                 return r;
6119                 }
6120                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6121                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6122                                             false);
6123                         kvm_x86_ops->set_irq(vcpu);
6124                 }
6125         }
6126         return 0;
6127 }
6128
6129 static void process_nmi(struct kvm_vcpu *vcpu)
6130 {
6131         unsigned limit = 2;
6132
6133         /*
6134          * x86 is limited to one NMI running, and one NMI pending after it.
6135          * If an NMI is already in progress, limit further NMIs to just one.
6136          * Otherwise, allow two (and we'll inject the first one immediately).
6137          */
6138         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6139                 limit = 1;
6140
6141         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6142         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6143         kvm_make_request(KVM_REQ_EVENT, vcpu);
6144 }
6145
6146 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6147 {
6148         u64 eoi_exit_bitmap[4];
6149         u32 tmr[8];
6150
6151         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6152                 return;
6153
6154         memset(eoi_exit_bitmap, 0, 32);
6155         memset(tmr, 0, 32);
6156
6157         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
6158         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6159         kvm_apic_update_tmr(vcpu, tmr);
6160 }
6161
6162 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6163 {
6164         ++vcpu->stat.tlb_flush;
6165         kvm_x86_ops->tlb_flush(vcpu);
6166 }
6167
6168 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6169 {
6170         struct page *page = NULL;
6171
6172         if (!irqchip_in_kernel(vcpu->kvm))
6173                 return;
6174
6175         if (!kvm_x86_ops->set_apic_access_page_addr)
6176                 return;
6177
6178         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6179         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6180
6181         /*
6182          * Do not pin apic access page in memory, the MMU notifier
6183          * will call us again if it is migrated or swapped out.
6184          */
6185         put_page(page);
6186 }
6187 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6188
6189 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6190                                            unsigned long address)
6191 {
6192         /*
6193          * The physical address of apic access page is stored in the VMCS.
6194          * Update it when it becomes invalid.
6195          */
6196         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6197                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6198 }
6199
6200 /*
6201  * Returns 1 to let vcpu_run() continue the guest execution loop without
6202  * exiting to the userspace.  Otherwise, the value will be returned to the
6203  * userspace.
6204  */
6205 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6206 {
6207         int r;
6208         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
6209                 vcpu->run->request_interrupt_window;
6210         bool req_immediate_exit = false;
6211
6212         if (vcpu->requests) {
6213                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6214                         kvm_mmu_unload(vcpu);
6215                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6216                         __kvm_migrate_timers(vcpu);
6217                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6218                         kvm_gen_update_masterclock(vcpu->kvm);
6219                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6220                         kvm_gen_kvmclock_update(vcpu);
6221                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6222                         r = kvm_guest_time_update(vcpu);
6223                         if (unlikely(r))
6224                                 goto out;
6225                 }
6226                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6227                         kvm_mmu_sync_roots(vcpu);
6228                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6229                         kvm_vcpu_flush_tlb(vcpu);
6230                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6231                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6232                         r = 0;
6233                         goto out;
6234                 }
6235                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6236                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6237                         r = 0;
6238                         goto out;
6239                 }
6240                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6241                         vcpu->fpu_active = 0;
6242                         kvm_x86_ops->fpu_deactivate(vcpu);
6243                 }
6244                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6245                         /* Page is swapped out. Do synthetic halt */
6246                         vcpu->arch.apf.halted = true;
6247                         r = 1;
6248                         goto out;
6249                 }
6250                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6251                         record_steal_time(vcpu);
6252                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6253                         process_nmi(vcpu);
6254                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6255                         kvm_handle_pmu_event(vcpu);
6256                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6257                         kvm_deliver_pmi(vcpu);
6258                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6259                         vcpu_scan_ioapic(vcpu);
6260                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6261                         kvm_vcpu_reload_apic_access_page(vcpu);
6262         }
6263
6264         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6265                 kvm_apic_accept_events(vcpu);
6266                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6267                         r = 1;
6268                         goto out;
6269                 }
6270
6271                 if (inject_pending_event(vcpu, req_int_win) != 0)
6272                         req_immediate_exit = true;
6273                 /* enable NMI/IRQ window open exits if needed */
6274                 else if (vcpu->arch.nmi_pending)
6275                         kvm_x86_ops->enable_nmi_window(vcpu);
6276                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6277                         kvm_x86_ops->enable_irq_window(vcpu);
6278
6279                 if (kvm_lapic_enabled(vcpu)) {
6280                         /*
6281                          * Update architecture specific hints for APIC
6282                          * virtual interrupt delivery.
6283                          */
6284                         if (kvm_x86_ops->hwapic_irr_update)
6285                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6286                                         kvm_lapic_find_highest_irr(vcpu));
6287                         update_cr8_intercept(vcpu);
6288                         kvm_lapic_sync_to_vapic(vcpu);
6289                 }
6290         }
6291
6292         r = kvm_mmu_reload(vcpu);
6293         if (unlikely(r)) {
6294                 goto cancel_injection;
6295         }
6296
6297         preempt_disable();
6298
6299         kvm_x86_ops->prepare_guest_switch(vcpu);
6300         if (vcpu->fpu_active)
6301                 kvm_load_guest_fpu(vcpu);
6302         kvm_load_guest_xcr0(vcpu);
6303
6304         vcpu->mode = IN_GUEST_MODE;
6305
6306         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6307
6308         /* We should set ->mode before check ->requests,
6309          * see the comment in make_all_cpus_request.
6310          */
6311         smp_mb__after_srcu_read_unlock();
6312
6313         local_irq_disable();
6314
6315         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6316             || need_resched() || signal_pending(current)) {
6317                 vcpu->mode = OUTSIDE_GUEST_MODE;
6318                 smp_wmb();
6319                 local_irq_enable();
6320                 preempt_enable();
6321                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6322                 r = 1;
6323                 goto cancel_injection;
6324         }
6325
6326         if (req_immediate_exit)
6327                 smp_send_reschedule(vcpu->cpu);
6328
6329         kvm_guest_enter();
6330
6331         if (unlikely(vcpu->arch.switch_db_regs)) {
6332                 set_debugreg(0, 7);
6333                 set_debugreg(vcpu->arch.eff_db[0], 0);
6334                 set_debugreg(vcpu->arch.eff_db[1], 1);
6335                 set_debugreg(vcpu->arch.eff_db[2], 2);
6336                 set_debugreg(vcpu->arch.eff_db[3], 3);
6337                 set_debugreg(vcpu->arch.dr6, 6);
6338                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6339         }
6340
6341         trace_kvm_entry(vcpu->vcpu_id);
6342         wait_lapic_expire(vcpu);
6343         kvm_x86_ops->run(vcpu);
6344
6345         /*
6346          * Do this here before restoring debug registers on the host.  And
6347          * since we do this before handling the vmexit, a DR access vmexit
6348          * can (a) read the correct value of the debug registers, (b) set
6349          * KVM_DEBUGREG_WONT_EXIT again.
6350          */
6351         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6352                 int i;
6353
6354                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6355                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6356                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6357                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6358         }
6359
6360         /*
6361          * If the guest has used debug registers, at least dr7
6362          * will be disabled while returning to the host.
6363          * If we don't have active breakpoints in the host, we don't
6364          * care about the messed up debug address registers. But if
6365          * we have some of them active, restore the old state.
6366          */
6367         if (hw_breakpoint_active())
6368                 hw_breakpoint_restore();
6369
6370         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6371                                                            native_read_tsc());
6372
6373         vcpu->mode = OUTSIDE_GUEST_MODE;
6374         smp_wmb();
6375
6376         /* Interrupt is enabled by handle_external_intr() */
6377         kvm_x86_ops->handle_external_intr(vcpu);
6378
6379         ++vcpu->stat.exits;
6380
6381         /*
6382          * We must have an instruction between local_irq_enable() and
6383          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6384          * the interrupt shadow.  The stat.exits increment will do nicely.
6385          * But we need to prevent reordering, hence this barrier():
6386          */
6387         barrier();
6388
6389         kvm_guest_exit();
6390
6391         preempt_enable();
6392
6393         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6394
6395         /*
6396          * Profile KVM exit RIPs:
6397          */
6398         if (unlikely(prof_on == KVM_PROFILING)) {
6399                 unsigned long rip = kvm_rip_read(vcpu);
6400                 profile_hit(KVM_PROFILING, (void *)rip);
6401         }
6402
6403         if (unlikely(vcpu->arch.tsc_always_catchup))
6404                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6405
6406         if (vcpu->arch.apic_attention)
6407                 kvm_lapic_sync_from_vapic(vcpu);
6408
6409         r = kvm_x86_ops->handle_exit(vcpu);
6410         return r;
6411
6412 cancel_injection:
6413         kvm_x86_ops->cancel_injection(vcpu);
6414         if (unlikely(vcpu->arch.apic_attention))
6415                 kvm_lapic_sync_from_vapic(vcpu);
6416 out:
6417         return r;
6418 }
6419
6420 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6421 {
6422         if (!kvm_arch_vcpu_runnable(vcpu)) {
6423                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6424                 kvm_vcpu_block(vcpu);
6425                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6426                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6427                         return 1;
6428         }
6429
6430         kvm_apic_accept_events(vcpu);
6431         switch(vcpu->arch.mp_state) {
6432         case KVM_MP_STATE_HALTED:
6433                 vcpu->arch.pv.pv_unhalted = false;
6434                 vcpu->arch.mp_state =
6435                         KVM_MP_STATE_RUNNABLE;
6436         case KVM_MP_STATE_RUNNABLE:
6437                 vcpu->arch.apf.halted = false;
6438                 break;
6439         case KVM_MP_STATE_INIT_RECEIVED:
6440                 break;
6441         default:
6442                 return -EINTR;
6443                 break;
6444         }
6445         return 1;
6446 }
6447
6448 static int vcpu_run(struct kvm_vcpu *vcpu)
6449 {
6450         int r;
6451         struct kvm *kvm = vcpu->kvm;
6452
6453         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6454
6455         for (;;) {
6456                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6457                     !vcpu->arch.apf.halted)
6458                         r = vcpu_enter_guest(vcpu);
6459                 else
6460                         r = vcpu_block(kvm, vcpu);
6461                 if (r <= 0)
6462                         break;
6463
6464                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6465                 if (kvm_cpu_has_pending_timer(vcpu))
6466                         kvm_inject_pending_timer_irqs(vcpu);
6467
6468                 if (dm_request_for_irq_injection(vcpu)) {
6469                         r = -EINTR;
6470                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6471                         ++vcpu->stat.request_irq_exits;
6472                         break;
6473                 }
6474
6475                 kvm_check_async_pf_completion(vcpu);
6476
6477                 if (signal_pending(current)) {
6478                         r = -EINTR;
6479                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6480                         ++vcpu->stat.signal_exits;
6481                         break;
6482                 }
6483                 if (need_resched()) {
6484                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6485                         cond_resched();
6486                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6487                 }
6488         }
6489
6490         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6491
6492         return r;
6493 }
6494
6495 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6496 {
6497         int r;
6498         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6499         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6500         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6501         if (r != EMULATE_DONE)
6502                 return 0;
6503         return 1;
6504 }
6505
6506 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6507 {
6508         BUG_ON(!vcpu->arch.pio.count);
6509
6510         return complete_emulated_io(vcpu);
6511 }
6512
6513 /*
6514  * Implements the following, as a state machine:
6515  *
6516  * read:
6517  *   for each fragment
6518  *     for each mmio piece in the fragment
6519  *       write gpa, len
6520  *       exit
6521  *       copy data
6522  *   execute insn
6523  *
6524  * write:
6525  *   for each fragment
6526  *     for each mmio piece in the fragment
6527  *       write gpa, len
6528  *       copy data
6529  *       exit
6530  */
6531 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6532 {
6533         struct kvm_run *run = vcpu->run;
6534         struct kvm_mmio_fragment *frag;
6535         unsigned len;
6536
6537         BUG_ON(!vcpu->mmio_needed);
6538
6539         /* Complete previous fragment */
6540         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6541         len = min(8u, frag->len);
6542         if (!vcpu->mmio_is_write)
6543                 memcpy(frag->data, run->mmio.data, len);
6544
6545         if (frag->len <= 8) {
6546                 /* Switch to the next fragment. */
6547                 frag++;
6548                 vcpu->mmio_cur_fragment++;
6549         } else {
6550                 /* Go forward to the next mmio piece. */
6551                 frag->data += len;
6552                 frag->gpa += len;
6553                 frag->len -= len;
6554         }
6555
6556         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6557                 vcpu->mmio_needed = 0;
6558
6559                 /* FIXME: return into emulator if single-stepping.  */
6560                 if (vcpu->mmio_is_write)
6561                         return 1;
6562                 vcpu->mmio_read_completed = 1;
6563                 return complete_emulated_io(vcpu);
6564         }
6565
6566         run->exit_reason = KVM_EXIT_MMIO;
6567         run->mmio.phys_addr = frag->gpa;
6568         if (vcpu->mmio_is_write)
6569                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6570         run->mmio.len = min(8u, frag->len);
6571         run->mmio.is_write = vcpu->mmio_is_write;
6572         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6573         return 0;
6574 }
6575
6576
6577 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6578 {
6579         int r;
6580         sigset_t sigsaved;
6581
6582         if (!tsk_used_math(current) && init_fpu(current))
6583                 return -ENOMEM;
6584
6585         if (vcpu->sigset_active)
6586                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6587
6588         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6589                 kvm_vcpu_block(vcpu);
6590                 kvm_apic_accept_events(vcpu);
6591                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6592                 r = -EAGAIN;
6593                 goto out;
6594         }
6595
6596         /* re-sync apic's tpr */
6597         if (!irqchip_in_kernel(vcpu->kvm)) {
6598                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6599                         r = -EINVAL;
6600                         goto out;
6601                 }
6602         }
6603
6604         if (unlikely(vcpu->arch.complete_userspace_io)) {
6605                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6606                 vcpu->arch.complete_userspace_io = NULL;
6607                 r = cui(vcpu);
6608                 if (r <= 0)
6609                         goto out;
6610         } else
6611                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6612
6613         r = vcpu_run(vcpu);
6614
6615 out:
6616         post_kvm_run_save(vcpu);
6617         if (vcpu->sigset_active)
6618                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6619
6620         return r;
6621 }
6622
6623 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6624 {
6625         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6626                 /*
6627                  * We are here if userspace calls get_regs() in the middle of
6628                  * instruction emulation. Registers state needs to be copied
6629                  * back from emulation context to vcpu. Userspace shouldn't do
6630                  * that usually, but some bad designed PV devices (vmware
6631                  * backdoor interface) need this to work
6632                  */
6633                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6634                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6635         }
6636         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6637         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6638         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6639         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6640         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6641         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6642         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6643         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6644 #ifdef CONFIG_X86_64
6645         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6646         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6647         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6648         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6649         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6650         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6651         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6652         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6653 #endif
6654
6655         regs->rip = kvm_rip_read(vcpu);
6656         regs->rflags = kvm_get_rflags(vcpu);
6657
6658         return 0;
6659 }
6660
6661 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6662 {
6663         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6664         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6665
6666         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6667         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6668         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6669         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6670         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6671         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6672         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6673         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6674 #ifdef CONFIG_X86_64
6675         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6676         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6677         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6678         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6679         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6680         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6681         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6682         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6683 #endif
6684
6685         kvm_rip_write(vcpu, regs->rip);
6686         kvm_set_rflags(vcpu, regs->rflags);
6687
6688         vcpu->arch.exception.pending = false;
6689
6690         kvm_make_request(KVM_REQ_EVENT, vcpu);
6691
6692         return 0;
6693 }
6694
6695 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6696 {
6697         struct kvm_segment cs;
6698
6699         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6700         *db = cs.db;
6701         *l = cs.l;
6702 }
6703 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6704
6705 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6706                                   struct kvm_sregs *sregs)
6707 {
6708         struct desc_ptr dt;
6709
6710         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6711         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6712         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6713         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6714         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6715         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6716
6717         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6718         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6719
6720         kvm_x86_ops->get_idt(vcpu, &dt);
6721         sregs->idt.limit = dt.size;
6722         sregs->idt.base = dt.address;
6723         kvm_x86_ops->get_gdt(vcpu, &dt);
6724         sregs->gdt.limit = dt.size;
6725         sregs->gdt.base = dt.address;
6726
6727         sregs->cr0 = kvm_read_cr0(vcpu);
6728         sregs->cr2 = vcpu->arch.cr2;
6729         sregs->cr3 = kvm_read_cr3(vcpu);
6730         sregs->cr4 = kvm_read_cr4(vcpu);
6731         sregs->cr8 = kvm_get_cr8(vcpu);
6732         sregs->efer = vcpu->arch.efer;
6733         sregs->apic_base = kvm_get_apic_base(vcpu);
6734
6735         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6736
6737         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6738                 set_bit(vcpu->arch.interrupt.nr,
6739                         (unsigned long *)sregs->interrupt_bitmap);
6740
6741         return 0;
6742 }
6743
6744 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6745                                     struct kvm_mp_state *mp_state)
6746 {
6747         kvm_apic_accept_events(vcpu);
6748         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6749                                         vcpu->arch.pv.pv_unhalted)
6750                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6751         else
6752                 mp_state->mp_state = vcpu->arch.mp_state;
6753
6754         return 0;
6755 }
6756
6757 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6758                                     struct kvm_mp_state *mp_state)
6759 {
6760         if (!kvm_vcpu_has_lapic(vcpu) &&
6761             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6762                 return -EINVAL;
6763
6764         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6765                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6766                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6767         } else
6768                 vcpu->arch.mp_state = mp_state->mp_state;
6769         kvm_make_request(KVM_REQ_EVENT, vcpu);
6770         return 0;
6771 }
6772
6773 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6774                     int reason, bool has_error_code, u32 error_code)
6775 {
6776         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6777         int ret;
6778
6779         init_emulate_ctxt(vcpu);
6780
6781         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6782                                    has_error_code, error_code);
6783
6784         if (ret)
6785                 return EMULATE_FAIL;
6786
6787         kvm_rip_write(vcpu, ctxt->eip);
6788         kvm_set_rflags(vcpu, ctxt->eflags);
6789         kvm_make_request(KVM_REQ_EVENT, vcpu);
6790         return EMULATE_DONE;
6791 }
6792 EXPORT_SYMBOL_GPL(kvm_task_switch);
6793
6794 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6795                                   struct kvm_sregs *sregs)
6796 {
6797         struct msr_data apic_base_msr;
6798         int mmu_reset_needed = 0;
6799         int pending_vec, max_bits, idx;
6800         struct desc_ptr dt;
6801
6802         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6803                 return -EINVAL;
6804
6805         dt.size = sregs->idt.limit;
6806         dt.address = sregs->idt.base;
6807         kvm_x86_ops->set_idt(vcpu, &dt);
6808         dt.size = sregs->gdt.limit;
6809         dt.address = sregs->gdt.base;
6810         kvm_x86_ops->set_gdt(vcpu, &dt);
6811
6812         vcpu->arch.cr2 = sregs->cr2;
6813         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6814         vcpu->arch.cr3 = sregs->cr3;
6815         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6816
6817         kvm_set_cr8(vcpu, sregs->cr8);
6818
6819         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6820         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6821         apic_base_msr.data = sregs->apic_base;
6822         apic_base_msr.host_initiated = true;
6823         kvm_set_apic_base(vcpu, &apic_base_msr);
6824
6825         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6826         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6827         vcpu->arch.cr0 = sregs->cr0;
6828
6829         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6830         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6831         if (sregs->cr4 & X86_CR4_OSXSAVE)
6832                 kvm_update_cpuid(vcpu);
6833
6834         idx = srcu_read_lock(&vcpu->kvm->srcu);
6835         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6836                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6837                 mmu_reset_needed = 1;
6838         }
6839         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6840
6841         if (mmu_reset_needed)
6842                 kvm_mmu_reset_context(vcpu);
6843
6844         max_bits = KVM_NR_INTERRUPTS;
6845         pending_vec = find_first_bit(
6846                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6847         if (pending_vec < max_bits) {
6848                 kvm_queue_interrupt(vcpu, pending_vec, false);
6849                 pr_debug("Set back pending irq %d\n", pending_vec);
6850         }
6851
6852         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6853         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6854         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6855         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6856         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6857         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6858
6859         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6860         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6861
6862         update_cr8_intercept(vcpu);
6863
6864         /* Older userspace won't unhalt the vcpu on reset. */
6865         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6866             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6867             !is_protmode(vcpu))
6868                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6869
6870         kvm_make_request(KVM_REQ_EVENT, vcpu);
6871
6872         return 0;
6873 }
6874
6875 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6876                                         struct kvm_guest_debug *dbg)
6877 {
6878         unsigned long rflags;
6879         int i, r;
6880
6881         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6882                 r = -EBUSY;
6883                 if (vcpu->arch.exception.pending)
6884                         goto out;
6885                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6886                         kvm_queue_exception(vcpu, DB_VECTOR);
6887                 else
6888                         kvm_queue_exception(vcpu, BP_VECTOR);
6889         }
6890
6891         /*
6892          * Read rflags as long as potentially injected trace flags are still
6893          * filtered out.
6894          */
6895         rflags = kvm_get_rflags(vcpu);
6896
6897         vcpu->guest_debug = dbg->control;
6898         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6899                 vcpu->guest_debug = 0;
6900
6901         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6902                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6903                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6904                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6905         } else {
6906                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6907                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6908         }
6909         kvm_update_dr7(vcpu);
6910
6911         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6912                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6913                         get_segment_base(vcpu, VCPU_SREG_CS);
6914
6915         /*
6916          * Trigger an rflags update that will inject or remove the trace
6917          * flags.
6918          */
6919         kvm_set_rflags(vcpu, rflags);
6920
6921         kvm_x86_ops->update_db_bp_intercept(vcpu);
6922
6923         r = 0;
6924
6925 out:
6926
6927         return r;
6928 }
6929
6930 /*
6931  * Translate a guest virtual address to a guest physical address.
6932  */
6933 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6934                                     struct kvm_translation *tr)
6935 {
6936         unsigned long vaddr = tr->linear_address;
6937         gpa_t gpa;
6938         int idx;
6939
6940         idx = srcu_read_lock(&vcpu->kvm->srcu);
6941         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6942         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6943         tr->physical_address = gpa;
6944         tr->valid = gpa != UNMAPPED_GVA;
6945         tr->writeable = 1;
6946         tr->usermode = 0;
6947
6948         return 0;
6949 }
6950
6951 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6952 {
6953         struct i387_fxsave_struct *fxsave =
6954                         &vcpu->arch.guest_fpu.state->fxsave;
6955
6956         memcpy(fpu->fpr, fxsave->st_space, 128);
6957         fpu->fcw = fxsave->cwd;
6958         fpu->fsw = fxsave->swd;
6959         fpu->ftwx = fxsave->twd;
6960         fpu->last_opcode = fxsave->fop;
6961         fpu->last_ip = fxsave->rip;
6962         fpu->last_dp = fxsave->rdp;
6963         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6964
6965         return 0;
6966 }
6967
6968 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6969 {
6970         struct i387_fxsave_struct *fxsave =
6971                         &vcpu->arch.guest_fpu.state->fxsave;
6972
6973         memcpy(fxsave->st_space, fpu->fpr, 128);
6974         fxsave->cwd = fpu->fcw;
6975         fxsave->swd = fpu->fsw;
6976         fxsave->twd = fpu->ftwx;
6977         fxsave->fop = fpu->last_opcode;
6978         fxsave->rip = fpu->last_ip;
6979         fxsave->rdp = fpu->last_dp;
6980         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6981
6982         return 0;
6983 }
6984
6985 int fx_init(struct kvm_vcpu *vcpu)
6986 {
6987         int err;
6988
6989         err = fpu_alloc(&vcpu->arch.guest_fpu);
6990         if (err)
6991                 return err;
6992
6993         fpu_finit(&vcpu->arch.guest_fpu);
6994         if (cpu_has_xsaves)
6995                 vcpu->arch.guest_fpu.state->xsave.xsave_hdr.xcomp_bv =
6996                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
6997
6998         /*
6999          * Ensure guest xcr0 is valid for loading
7000          */
7001         vcpu->arch.xcr0 = XSTATE_FP;
7002
7003         vcpu->arch.cr0 |= X86_CR0_ET;
7004
7005         return 0;
7006 }
7007 EXPORT_SYMBOL_GPL(fx_init);
7008
7009 static void fx_free(struct kvm_vcpu *vcpu)
7010 {
7011         fpu_free(&vcpu->arch.guest_fpu);
7012 }
7013
7014 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7015 {
7016         if (vcpu->guest_fpu_loaded)
7017                 return;
7018
7019         /*
7020          * Restore all possible states in the guest,
7021          * and assume host would use all available bits.
7022          * Guest xcr0 would be loaded later.
7023          */
7024         kvm_put_guest_xcr0(vcpu);
7025         vcpu->guest_fpu_loaded = 1;
7026         __kernel_fpu_begin();
7027         fpu_restore_checking(&vcpu->arch.guest_fpu);
7028         trace_kvm_fpu(1);
7029 }
7030
7031 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7032 {
7033         kvm_put_guest_xcr0(vcpu);
7034
7035         if (!vcpu->guest_fpu_loaded)
7036                 return;
7037
7038         vcpu->guest_fpu_loaded = 0;
7039         fpu_save_init(&vcpu->arch.guest_fpu);
7040         __kernel_fpu_end();
7041         ++vcpu->stat.fpu_reload;
7042         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7043         trace_kvm_fpu(0);
7044 }
7045
7046 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7047 {
7048         kvmclock_reset(vcpu);
7049
7050         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7051         fx_free(vcpu);
7052         kvm_x86_ops->vcpu_free(vcpu);
7053 }
7054
7055 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7056                                                 unsigned int id)
7057 {
7058         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7059                 printk_once(KERN_WARNING
7060                 "kvm: SMP vm created on host with unstable TSC; "
7061                 "guest TSC will not be reliable\n");
7062         return kvm_x86_ops->vcpu_create(kvm, id);
7063 }
7064
7065 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7066 {
7067         int r;
7068
7069         vcpu->arch.mtrr_state.have_fixed = 1;
7070         r = vcpu_load(vcpu);
7071         if (r)
7072                 return r;
7073         kvm_vcpu_reset(vcpu);
7074         kvm_mmu_setup(vcpu);
7075         vcpu_put(vcpu);
7076
7077         return r;
7078 }
7079
7080 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7081 {
7082         struct msr_data msr;
7083         struct kvm *kvm = vcpu->kvm;
7084
7085         if (vcpu_load(vcpu))
7086                 return;
7087         msr.data = 0x0;
7088         msr.index = MSR_IA32_TSC;
7089         msr.host_initiated = true;
7090         kvm_write_tsc(vcpu, &msr);
7091         vcpu_put(vcpu);
7092
7093         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7094                                         KVMCLOCK_SYNC_PERIOD);
7095 }
7096
7097 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7098 {
7099         int r;
7100         vcpu->arch.apf.msr_val = 0;
7101
7102         r = vcpu_load(vcpu);
7103         BUG_ON(r);
7104         kvm_mmu_unload(vcpu);
7105         vcpu_put(vcpu);
7106
7107         fx_free(vcpu);
7108         kvm_x86_ops->vcpu_free(vcpu);
7109 }
7110
7111 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
7112 {
7113         atomic_set(&vcpu->arch.nmi_queued, 0);
7114         vcpu->arch.nmi_pending = 0;
7115         vcpu->arch.nmi_injected = false;
7116         kvm_clear_interrupt_queue(vcpu);
7117         kvm_clear_exception_queue(vcpu);
7118
7119         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7120         kvm_update_dr0123(vcpu);
7121         vcpu->arch.dr6 = DR6_INIT;
7122         kvm_update_dr6(vcpu);
7123         vcpu->arch.dr7 = DR7_FIXED_1;
7124         kvm_update_dr7(vcpu);
7125
7126         kvm_make_request(KVM_REQ_EVENT, vcpu);
7127         vcpu->arch.apf.msr_val = 0;
7128         vcpu->arch.st.msr_val = 0;
7129
7130         kvmclock_reset(vcpu);
7131
7132         kvm_clear_async_pf_completion_queue(vcpu);
7133         kvm_async_pf_hash_reset(vcpu);
7134         vcpu->arch.apf.halted = false;
7135
7136         kvm_pmu_reset(vcpu);
7137
7138         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7139         vcpu->arch.regs_avail = ~0;
7140         vcpu->arch.regs_dirty = ~0;
7141
7142         kvm_x86_ops->vcpu_reset(vcpu);
7143 }
7144
7145 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7146 {
7147         struct kvm_segment cs;
7148
7149         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7150         cs.selector = vector << 8;
7151         cs.base = vector << 12;
7152         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7153         kvm_rip_write(vcpu, 0);
7154 }
7155
7156 int kvm_arch_hardware_enable(void)
7157 {
7158         struct kvm *kvm;
7159         struct kvm_vcpu *vcpu;
7160         int i;
7161         int ret;
7162         u64 local_tsc;
7163         u64 max_tsc = 0;
7164         bool stable, backwards_tsc = false;
7165
7166         kvm_shared_msr_cpu_online();
7167         ret = kvm_x86_ops->hardware_enable();
7168         if (ret != 0)
7169                 return ret;
7170
7171         local_tsc = native_read_tsc();
7172         stable = !check_tsc_unstable();
7173         list_for_each_entry(kvm, &vm_list, vm_list) {
7174                 kvm_for_each_vcpu(i, vcpu, kvm) {
7175                         if (!stable && vcpu->cpu == smp_processor_id())
7176                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7177                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7178                                 backwards_tsc = true;
7179                                 if (vcpu->arch.last_host_tsc > max_tsc)
7180                                         max_tsc = vcpu->arch.last_host_tsc;
7181                         }
7182                 }
7183         }
7184
7185         /*
7186          * Sometimes, even reliable TSCs go backwards.  This happens on
7187          * platforms that reset TSC during suspend or hibernate actions, but
7188          * maintain synchronization.  We must compensate.  Fortunately, we can
7189          * detect that condition here, which happens early in CPU bringup,
7190          * before any KVM threads can be running.  Unfortunately, we can't
7191          * bring the TSCs fully up to date with real time, as we aren't yet far
7192          * enough into CPU bringup that we know how much real time has actually
7193          * elapsed; our helper function, get_kernel_ns() will be using boot
7194          * variables that haven't been updated yet.
7195          *
7196          * So we simply find the maximum observed TSC above, then record the
7197          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7198          * the adjustment will be applied.  Note that we accumulate
7199          * adjustments, in case multiple suspend cycles happen before some VCPU
7200          * gets a chance to run again.  In the event that no KVM threads get a
7201          * chance to run, we will miss the entire elapsed period, as we'll have
7202          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7203          * loose cycle time.  This isn't too big a deal, since the loss will be
7204          * uniform across all VCPUs (not to mention the scenario is extremely
7205          * unlikely). It is possible that a second hibernate recovery happens
7206          * much faster than a first, causing the observed TSC here to be
7207          * smaller; this would require additional padding adjustment, which is
7208          * why we set last_host_tsc to the local tsc observed here.
7209          *
7210          * N.B. - this code below runs only on platforms with reliable TSC,
7211          * as that is the only way backwards_tsc is set above.  Also note
7212          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7213          * have the same delta_cyc adjustment applied if backwards_tsc
7214          * is detected.  Note further, this adjustment is only done once,
7215          * as we reset last_host_tsc on all VCPUs to stop this from being
7216          * called multiple times (one for each physical CPU bringup).
7217          *
7218          * Platforms with unreliable TSCs don't have to deal with this, they
7219          * will be compensated by the logic in vcpu_load, which sets the TSC to
7220          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7221          * guarantee that they stay in perfect synchronization.
7222          */
7223         if (backwards_tsc) {
7224                 u64 delta_cyc = max_tsc - local_tsc;
7225                 backwards_tsc_observed = true;
7226                 list_for_each_entry(kvm, &vm_list, vm_list) {
7227                         kvm_for_each_vcpu(i, vcpu, kvm) {
7228                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7229                                 vcpu->arch.last_host_tsc = local_tsc;
7230                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7231                         }
7232
7233                         /*
7234                          * We have to disable TSC offset matching.. if you were
7235                          * booting a VM while issuing an S4 host suspend....
7236                          * you may have some problem.  Solving this issue is
7237                          * left as an exercise to the reader.
7238                          */
7239                         kvm->arch.last_tsc_nsec = 0;
7240                         kvm->arch.last_tsc_write = 0;
7241                 }
7242
7243         }
7244         return 0;
7245 }
7246
7247 void kvm_arch_hardware_disable(void)
7248 {
7249         kvm_x86_ops->hardware_disable();
7250         drop_user_return_notifiers();
7251 }
7252
7253 int kvm_arch_hardware_setup(void)
7254 {
7255         return kvm_x86_ops->hardware_setup();
7256 }
7257
7258 void kvm_arch_hardware_unsetup(void)
7259 {
7260         kvm_x86_ops->hardware_unsetup();
7261 }
7262
7263 void kvm_arch_check_processor_compat(void *rtn)
7264 {
7265         kvm_x86_ops->check_processor_compatibility(rtn);
7266 }
7267
7268 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7269 {
7270         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
7271 }
7272
7273 struct static_key kvm_no_apic_vcpu __read_mostly;
7274
7275 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7276 {
7277         struct page *page;
7278         struct kvm *kvm;
7279         int r;
7280
7281         BUG_ON(vcpu->kvm == NULL);
7282         kvm = vcpu->kvm;
7283
7284         vcpu->arch.pv.pv_unhalted = false;
7285         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7286         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7287                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7288         else
7289                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7290
7291         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7292         if (!page) {
7293                 r = -ENOMEM;
7294                 goto fail;
7295         }
7296         vcpu->arch.pio_data = page_address(page);
7297
7298         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7299
7300         r = kvm_mmu_create(vcpu);
7301         if (r < 0)
7302                 goto fail_free_pio_data;
7303
7304         if (irqchip_in_kernel(kvm)) {
7305                 r = kvm_create_lapic(vcpu);
7306                 if (r < 0)
7307                         goto fail_mmu_destroy;
7308         } else
7309                 static_key_slow_inc(&kvm_no_apic_vcpu);
7310
7311         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7312                                        GFP_KERNEL);
7313         if (!vcpu->arch.mce_banks) {
7314                 r = -ENOMEM;
7315                 goto fail_free_lapic;
7316         }
7317         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7318
7319         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7320                 r = -ENOMEM;
7321                 goto fail_free_mce_banks;
7322         }
7323
7324         r = fx_init(vcpu);
7325         if (r)
7326                 goto fail_free_wbinvd_dirty_mask;
7327
7328         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7329         vcpu->arch.pv_time_enabled = false;
7330
7331         vcpu->arch.guest_supported_xcr0 = 0;
7332         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7333
7334         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7335
7336         kvm_async_pf_hash_reset(vcpu);
7337         kvm_pmu_init(vcpu);
7338
7339         return 0;
7340 fail_free_wbinvd_dirty_mask:
7341         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7342 fail_free_mce_banks:
7343         kfree(vcpu->arch.mce_banks);
7344 fail_free_lapic:
7345         kvm_free_lapic(vcpu);
7346 fail_mmu_destroy:
7347         kvm_mmu_destroy(vcpu);
7348 fail_free_pio_data:
7349         free_page((unsigned long)vcpu->arch.pio_data);
7350 fail:
7351         return r;
7352 }
7353
7354 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7355 {
7356         int idx;
7357
7358         kvm_pmu_destroy(vcpu);
7359         kfree(vcpu->arch.mce_banks);
7360         kvm_free_lapic(vcpu);
7361         idx = srcu_read_lock(&vcpu->kvm->srcu);
7362         kvm_mmu_destroy(vcpu);
7363         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7364         free_page((unsigned long)vcpu->arch.pio_data);
7365         if (!irqchip_in_kernel(vcpu->kvm))
7366                 static_key_slow_dec(&kvm_no_apic_vcpu);
7367 }
7368
7369 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7370 {
7371         kvm_x86_ops->sched_in(vcpu, cpu);
7372 }
7373
7374 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7375 {
7376         if (type)
7377                 return -EINVAL;
7378
7379         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7380         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7381         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7382         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7383         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7384
7385         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7386         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7387         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7388         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7389                 &kvm->arch.irq_sources_bitmap);
7390
7391         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7392         mutex_init(&kvm->arch.apic_map_lock);
7393         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7394
7395         pvclock_update_vm_gtod_copy(kvm);
7396
7397         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7398         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7399
7400         return 0;
7401 }
7402
7403 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7404 {
7405         int r;
7406         r = vcpu_load(vcpu);
7407         BUG_ON(r);
7408         kvm_mmu_unload(vcpu);
7409         vcpu_put(vcpu);
7410 }
7411
7412 static void kvm_free_vcpus(struct kvm *kvm)
7413 {
7414         unsigned int i;
7415         struct kvm_vcpu *vcpu;
7416
7417         /*
7418          * Unpin any mmu pages first.
7419          */
7420         kvm_for_each_vcpu(i, vcpu, kvm) {
7421                 kvm_clear_async_pf_completion_queue(vcpu);
7422                 kvm_unload_vcpu_mmu(vcpu);
7423         }
7424         kvm_for_each_vcpu(i, vcpu, kvm)
7425                 kvm_arch_vcpu_free(vcpu);
7426
7427         mutex_lock(&kvm->lock);
7428         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7429                 kvm->vcpus[i] = NULL;
7430
7431         atomic_set(&kvm->online_vcpus, 0);
7432         mutex_unlock(&kvm->lock);
7433 }
7434
7435 void kvm_arch_sync_events(struct kvm *kvm)
7436 {
7437         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7438         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7439         kvm_free_all_assigned_devices(kvm);
7440         kvm_free_pit(kvm);
7441 }
7442
7443 void kvm_arch_destroy_vm(struct kvm *kvm)
7444 {
7445         if (current->mm == kvm->mm) {
7446                 /*
7447                  * Free memory regions allocated on behalf of userspace,
7448                  * unless the the memory map has changed due to process exit
7449                  * or fd copying.
7450                  */
7451                 struct kvm_userspace_memory_region mem;
7452                 memset(&mem, 0, sizeof(mem));
7453                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7454                 kvm_set_memory_region(kvm, &mem);
7455
7456                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7457                 kvm_set_memory_region(kvm, &mem);
7458
7459                 mem.slot = TSS_PRIVATE_MEMSLOT;
7460                 kvm_set_memory_region(kvm, &mem);
7461         }
7462         kvm_iommu_unmap_guest(kvm);
7463         kfree(kvm->arch.vpic);
7464         kfree(kvm->arch.vioapic);
7465         kvm_free_vcpus(kvm);
7466         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7467 }
7468
7469 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7470                            struct kvm_memory_slot *dont)
7471 {
7472         int i;
7473
7474         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7475                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7476                         kvfree(free->arch.rmap[i]);
7477                         free->arch.rmap[i] = NULL;
7478                 }
7479                 if (i == 0)
7480                         continue;
7481
7482                 if (!dont || free->arch.lpage_info[i - 1] !=
7483                              dont->arch.lpage_info[i - 1]) {
7484                         kvfree(free->arch.lpage_info[i - 1]);
7485                         free->arch.lpage_info[i - 1] = NULL;
7486                 }
7487         }
7488 }
7489
7490 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7491                             unsigned long npages)
7492 {
7493         int i;
7494
7495         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7496                 unsigned long ugfn;
7497                 int lpages;
7498                 int level = i + 1;
7499
7500                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7501                                       slot->base_gfn, level) + 1;
7502
7503                 slot->arch.rmap[i] =
7504                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7505                 if (!slot->arch.rmap[i])
7506                         goto out_free;
7507                 if (i == 0)
7508                         continue;
7509
7510                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7511                                         sizeof(*slot->arch.lpage_info[i - 1]));
7512                 if (!slot->arch.lpage_info[i - 1])
7513                         goto out_free;
7514
7515                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7516                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7517                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7518                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7519                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7520                 /*
7521                  * If the gfn and userspace address are not aligned wrt each
7522                  * other, or if explicitly asked to, disable large page
7523                  * support for this slot
7524                  */
7525                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7526                     !kvm_largepages_enabled()) {
7527                         unsigned long j;
7528
7529                         for (j = 0; j < lpages; ++j)
7530                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7531                 }
7532         }
7533
7534         return 0;
7535
7536 out_free:
7537         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7538                 kvfree(slot->arch.rmap[i]);
7539                 slot->arch.rmap[i] = NULL;
7540                 if (i == 0)
7541                         continue;
7542
7543                 kvfree(slot->arch.lpage_info[i - 1]);
7544                 slot->arch.lpage_info[i - 1] = NULL;
7545         }
7546         return -ENOMEM;
7547 }
7548
7549 void kvm_arch_memslots_updated(struct kvm *kvm)
7550 {
7551         /*
7552          * memslots->generation has been incremented.
7553          * mmio generation may have reached its maximum value.
7554          */
7555         kvm_mmu_invalidate_mmio_sptes(kvm);
7556 }
7557
7558 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7559                                 struct kvm_memory_slot *memslot,
7560                                 struct kvm_userspace_memory_region *mem,
7561                                 enum kvm_mr_change change)
7562 {
7563         /*
7564          * Only private memory slots need to be mapped here since
7565          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7566          */
7567         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7568                 unsigned long userspace_addr;
7569
7570                 /*
7571                  * MAP_SHARED to prevent internal slot pages from being moved
7572                  * by fork()/COW.
7573                  */
7574                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7575                                          PROT_READ | PROT_WRITE,
7576                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7577
7578                 if (IS_ERR((void *)userspace_addr))
7579                         return PTR_ERR((void *)userspace_addr);
7580
7581                 memslot->userspace_addr = userspace_addr;
7582         }
7583
7584         return 0;
7585 }
7586
7587 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7588                                      struct kvm_memory_slot *new)
7589 {
7590         /* Still write protect RO slot */
7591         if (new->flags & KVM_MEM_READONLY) {
7592                 kvm_mmu_slot_remove_write_access(kvm, new);
7593                 return;
7594         }
7595
7596         /*
7597          * Call kvm_x86_ops dirty logging hooks when they are valid.
7598          *
7599          * kvm_x86_ops->slot_disable_log_dirty is called when:
7600          *
7601          *  - KVM_MR_CREATE with dirty logging is disabled
7602          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7603          *
7604          * The reason is, in case of PML, we need to set D-bit for any slots
7605          * with dirty logging disabled in order to eliminate unnecessary GPA
7606          * logging in PML buffer (and potential PML buffer full VMEXT). This
7607          * guarantees leaving PML enabled during guest's lifetime won't have
7608          * any additonal overhead from PML when guest is running with dirty
7609          * logging disabled for memory slots.
7610          *
7611          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7612          * to dirty logging mode.
7613          *
7614          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7615          *
7616          * In case of write protect:
7617          *
7618          * Write protect all pages for dirty logging.
7619          *
7620          * All the sptes including the large sptes which point to this
7621          * slot are set to readonly. We can not create any new large
7622          * spte on this slot until the end of the logging.
7623          *
7624          * See the comments in fast_page_fault().
7625          */
7626         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7627                 if (kvm_x86_ops->slot_enable_log_dirty)
7628                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7629                 else
7630                         kvm_mmu_slot_remove_write_access(kvm, new);
7631         } else {
7632                 if (kvm_x86_ops->slot_disable_log_dirty)
7633                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7634         }
7635 }
7636
7637 void kvm_arch_commit_memory_region(struct kvm *kvm,
7638                                 struct kvm_userspace_memory_region *mem,
7639                                 const struct kvm_memory_slot *old,
7640                                 enum kvm_mr_change change)
7641 {
7642         struct kvm_memory_slot *new;
7643         int nr_mmu_pages = 0;
7644
7645         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7646                 int ret;
7647
7648                 ret = vm_munmap(old->userspace_addr,
7649                                 old->npages * PAGE_SIZE);
7650                 if (ret < 0)
7651                         printk(KERN_WARNING
7652                                "kvm_vm_ioctl_set_memory_region: "
7653                                "failed to munmap memory\n");
7654         }
7655
7656         if (!kvm->arch.n_requested_mmu_pages)
7657                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7658
7659         if (nr_mmu_pages)
7660                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7661
7662         /* It's OK to get 'new' slot here as it has already been installed */
7663         new = id_to_memslot(kvm->memslots, mem->slot);
7664
7665         /*
7666          * Set up write protection and/or dirty logging for the new slot.
7667          *
7668          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7669          * been zapped so no dirty logging staff is needed for old slot. For
7670          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7671          * new and it's also covered when dealing with the new slot.
7672          */
7673         if (change != KVM_MR_DELETE)
7674                 kvm_mmu_slot_apply_flags(kvm, new);
7675 }
7676
7677 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7678 {
7679         kvm_mmu_invalidate_zap_all_pages(kvm);
7680 }
7681
7682 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7683                                    struct kvm_memory_slot *slot)
7684 {
7685         kvm_mmu_invalidate_zap_all_pages(kvm);
7686 }
7687
7688 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7689 {
7690         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7691                 kvm_x86_ops->check_nested_events(vcpu, false);
7692
7693         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7694                 !vcpu->arch.apf.halted)
7695                 || !list_empty_careful(&vcpu->async_pf.done)
7696                 || kvm_apic_has_events(vcpu)
7697                 || vcpu->arch.pv.pv_unhalted
7698                 || atomic_read(&vcpu->arch.nmi_queued) ||
7699                 (kvm_arch_interrupt_allowed(vcpu) &&
7700                  kvm_cpu_has_interrupt(vcpu));
7701 }
7702
7703 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7704 {
7705         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7706 }
7707
7708 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7709 {
7710         return kvm_x86_ops->interrupt_allowed(vcpu);
7711 }
7712
7713 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
7714 {
7715         if (is_64_bit_mode(vcpu))
7716                 return kvm_rip_read(vcpu);
7717         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
7718                      kvm_rip_read(vcpu));
7719 }
7720 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
7721
7722 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7723 {
7724         return kvm_get_linear_rip(vcpu) == linear_rip;
7725 }
7726 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7727
7728 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7729 {
7730         unsigned long rflags;
7731
7732         rflags = kvm_x86_ops->get_rflags(vcpu);
7733         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7734                 rflags &= ~X86_EFLAGS_TF;
7735         return rflags;
7736 }
7737 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7738
7739 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7740 {
7741         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7742             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7743                 rflags |= X86_EFLAGS_TF;
7744         kvm_x86_ops->set_rflags(vcpu, rflags);
7745 }
7746
7747 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7748 {
7749         __kvm_set_rflags(vcpu, rflags);
7750         kvm_make_request(KVM_REQ_EVENT, vcpu);
7751 }
7752 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7753
7754 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7755 {
7756         int r;
7757
7758         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7759               work->wakeup_all)
7760                 return;
7761
7762         r = kvm_mmu_reload(vcpu);
7763         if (unlikely(r))
7764                 return;
7765
7766         if (!vcpu->arch.mmu.direct_map &&
7767               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7768                 return;
7769
7770         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7771 }
7772
7773 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7774 {
7775         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7776 }
7777
7778 static inline u32 kvm_async_pf_next_probe(u32 key)
7779 {
7780         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7781 }
7782
7783 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7784 {
7785         u32 key = kvm_async_pf_hash_fn(gfn);
7786
7787         while (vcpu->arch.apf.gfns[key] != ~0)
7788                 key = kvm_async_pf_next_probe(key);
7789
7790         vcpu->arch.apf.gfns[key] = gfn;
7791 }
7792
7793 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7794 {
7795         int i;
7796         u32 key = kvm_async_pf_hash_fn(gfn);
7797
7798         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7799                      (vcpu->arch.apf.gfns[key] != gfn &&
7800                       vcpu->arch.apf.gfns[key] != ~0); i++)
7801                 key = kvm_async_pf_next_probe(key);
7802
7803         return key;
7804 }
7805
7806 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7807 {
7808         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7809 }
7810
7811 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7812 {
7813         u32 i, j, k;
7814
7815         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7816         while (true) {
7817                 vcpu->arch.apf.gfns[i] = ~0;
7818                 do {
7819                         j = kvm_async_pf_next_probe(j);
7820                         if (vcpu->arch.apf.gfns[j] == ~0)
7821                                 return;
7822                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7823                         /*
7824                          * k lies cyclically in ]i,j]
7825                          * |    i.k.j |
7826                          * |....j i.k.| or  |.k..j i...|
7827                          */
7828                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7829                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7830                 i = j;
7831         }
7832 }
7833
7834 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7835 {
7836
7837         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7838                                       sizeof(val));
7839 }
7840
7841 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7842                                      struct kvm_async_pf *work)
7843 {
7844         struct x86_exception fault;
7845
7846         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7847         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7848
7849         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7850             (vcpu->arch.apf.send_user_only &&
7851              kvm_x86_ops->get_cpl(vcpu) == 0))
7852                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7853         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7854                 fault.vector = PF_VECTOR;
7855                 fault.error_code_valid = true;
7856                 fault.error_code = 0;
7857                 fault.nested_page_fault = false;
7858                 fault.address = work->arch.token;
7859                 kvm_inject_page_fault(vcpu, &fault);
7860         }
7861 }
7862
7863 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7864                                  struct kvm_async_pf *work)
7865 {
7866         struct x86_exception fault;
7867
7868         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7869         if (work->wakeup_all)
7870                 work->arch.token = ~0; /* broadcast wakeup */
7871         else
7872                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7873
7874         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7875             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7876                 fault.vector = PF_VECTOR;
7877                 fault.error_code_valid = true;
7878                 fault.error_code = 0;
7879                 fault.nested_page_fault = false;
7880                 fault.address = work->arch.token;
7881                 kvm_inject_page_fault(vcpu, &fault);
7882         }
7883         vcpu->arch.apf.halted = false;
7884         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7885 }
7886
7887 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7888 {
7889         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7890                 return true;
7891         else
7892                 return !kvm_event_needs_reinjection(vcpu) &&
7893                         kvm_x86_ops->interrupt_allowed(vcpu);
7894 }
7895
7896 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7897 {
7898         atomic_inc(&kvm->arch.noncoherent_dma_count);
7899 }
7900 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7901
7902 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7903 {
7904         atomic_dec(&kvm->arch.noncoherent_dma_count);
7905 }
7906 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7907
7908 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7909 {
7910         return atomic_read(&kvm->arch.noncoherent_dma_count);
7911 }
7912 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7913
7914 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7915 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7916 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7917 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7918 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7919 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7920 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7921 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7922 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7923 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7924 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7925 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7926 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
7927 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
7928 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);