arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/sched/isolation.h>
  55 #include <linux/mem_encrypt.h>
  56
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68 #include <asm/mshyperv.h>
  69 #include <asm/hypervisor.h>
  70 #include <asm/intel_pt.h>
  71 #include <clocksource/hyperv_timer.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /*
 139  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 140  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 141  * advancement entirely.  Any other value is used as-is and disables adaptive
 142  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 143  */
 144 static int __read_mostly lapic_timer_advance_ns = -1;
 145 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 146
 147 static bool __read_mostly vector_hashing = true;
 148 module_param(vector_hashing, bool, S_IRUGO);
 149
 150 bool __read_mostly enable_vmware_backdoor = false;
 151 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 152 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 153
 154 static bool __read_mostly force_emulation_prefix = false;
 155 module_param(force_emulation_prefix, bool, S_IRUGO);
 156
 157 int __read_mostly pi_inject_timer = -1;
 158 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 159
 160 #define KVM_NR_SHARED_MSRS 16
 161
 162 struct kvm_shared_msrs_global {
 163         int nr;
 164         u32 msrs[KVM_NR_SHARED_MSRS];
 165 };
 166
 167 struct kvm_shared_msrs {
 168         struct user_return_notifier urn;
 169         bool registered;
 170         struct kvm_shared_msr_values {
 171                 u64 host;
 172                 u64 curr;
 173         } values[KVM_NR_SHARED_MSRS];
 174 };
 175
 176 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 177 static struct kvm_shared_msrs __percpu *shared_msrs;
 178
 179 struct kvm_stats_debugfs_item debugfs_entries[] = {
 180         { "pf_fixed", VCPU_STAT(pf_fixed) },
 181         { "pf_guest", VCPU_STAT(pf_guest) },
 182         { "tlb_flush", VCPU_STAT(tlb_flush) },
 183         { "invlpg", VCPU_STAT(invlpg) },
 184         { "exits", VCPU_STAT(exits) },
 185         { "io_exits", VCPU_STAT(io_exits) },
 186         { "mmio_exits", VCPU_STAT(mmio_exits) },
 187         { "signal_exits", VCPU_STAT(signal_exits) },
 188         { "irq_window", VCPU_STAT(irq_window_exits) },
 189         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 190         { "halt_exits", VCPU_STAT(halt_exits) },
 191         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 192         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 193         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 194         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 195         { "hypercalls", VCPU_STAT(hypercalls) },
 196         { "request_irq", VCPU_STAT(request_irq_exits) },
 197         { "irq_exits", VCPU_STAT(irq_exits) },
 198         { "host_state_reload", VCPU_STAT(host_state_reload) },
 199         { "fpu_reload", VCPU_STAT(fpu_reload) },
 200         { "insn_emulation", VCPU_STAT(insn_emulation) },
 201         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 202         { "irq_injections", VCPU_STAT(irq_injections) },
 203         { "nmi_injections", VCPU_STAT(nmi_injections) },
 204         { "req_event", VCPU_STAT(req_event) },
 205         { "l1d_flush", VCPU_STAT(l1d_flush) },
 206         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 207         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 208         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 209         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 210         { "mmu_flooded", VM_STAT(mmu_flooded) },
 211         { "mmu_recycled", VM_STAT(mmu_recycled) },
 212         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 213         { "mmu_unsync", VM_STAT(mmu_unsync) },
 214         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 215         { "largepages", VM_STAT(lpages) },
 216         { "max_mmu_page_hash_collisions",
 217                 VM_STAT(max_mmu_page_hash_collisions) },
 218         { NULL }
 219 };
 220
 221 u64 __read_mostly host_xcr0;
 222
 223 struct kmem_cache *x86_fpu_cache;
 224 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 225
 226 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 227
 228 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 229 {
 230         int i;
 231         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 232                 vcpu->arch.apf.gfns[i] = ~0;
 233 }
 234
 235 static void kvm_on_user_return(struct user_return_notifier *urn)
 236 {
 237         unsigned slot;
 238         struct kvm_shared_msrs *locals
 239                 = container_of(urn, struct kvm_shared_msrs, urn);
 240         struct kvm_shared_msr_values *values;
 241         unsigned long flags;
 242
 243         /*
 244          * Disabling irqs at this point since the following code could be
 245          * interrupted and executed through kvm_arch_hardware_disable()
 246          */
 247         local_irq_save(flags);
 248         if (locals->registered) {
 249                 locals->registered = false;
 250                 user_return_notifier_unregister(urn);
 251         }
 252         local_irq_restore(flags);
 253         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 254                 values = &locals->values[slot];
 255                 if (values->host != values->curr) {
 256                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 257                         values->curr = values->host;
 258                 }
 259         }
 260 }
 261
 262 static void shared_msr_update(unsigned slot, u32 msr)
 263 {
 264         u64 value;
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         /* only read, and nobody should modify it at this time,
 269          * so don't need lock */
 270         if (slot >= shared_msrs_global.nr) {
 271                 printk(KERN_ERR "kvm: invalid MSR slot!");
 272                 return;
 273         }
 274         rdmsrl_safe(msr, &value);
 275         smsr->values[slot].host = value;
 276         smsr->values[slot].curr = value;
 277 }
 278
 279 void kvm_define_shared_msr(unsigned slot, u32 msr)
 280 {
 281         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 282         shared_msrs_global.msrs[slot] = msr;
 283         if (slot >= shared_msrs_global.nr)
 284                 shared_msrs_global.nr = slot + 1;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 287
 288 static void kvm_shared_msr_cpu_online(void)
 289 {
 290         unsigned i;
 291
 292         for (i = 0; i < shared_msrs_global.nr; ++i)
 293                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 294 }
 295
 296 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 297 {
 298         unsigned int cpu = smp_processor_id();
 299         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 300         int err;
 301
 302         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 303                 return 0;
 304         smsr->values[slot].curr = value;
 305         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 306         if (err)
 307                 return 1;
 308
 309         if (!smsr->registered) {
 310                 smsr->urn.on_user_return = kvm_on_user_return;
 311                 user_return_notifier_register(&smsr->urn);
 312                 smsr->registered = true;
 313         }
 314         return 0;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 317
 318 static void drop_user_return_notifiers(void)
 319 {
 320         unsigned int cpu = smp_processor_id();
 321         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 322
 323         if (smsr->registered)
 324                 kvm_on_user_return(&smsr->urn);
 325 }
 326
 327 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 328 {
 329         return vcpu->arch.apic_base;
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 332
 333 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 334 {
 335         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 338
 339 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 340 {
 341         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 342         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 343         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 344                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 345
 346         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 347                 return 1;
 348         if (!msr_info->host_initiated) {
 349                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 350                         return 1;
 351                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 352                         return 1;
 353         }
 354
 355         kvm_lapic_set_base(vcpu, msr_info->data);
 356         return 0;
 357 }
 358 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 359
 360 asmlinkage __visible void kvm_spurious_fault(void)
 361 {
 362         /* Fault while not rebooting.  We want the trace. */
 363         BUG();
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 366
 367 #define EXCPT_BENIGN            0
 368 #define EXCPT_CONTRIBUTORY      1
 369 #define EXCPT_PF                2
 370
 371 static int exception_class(int vector)
 372 {
 373         switch (vector) {
 374         case PF_VECTOR:
 375                 return EXCPT_PF;
 376         case DE_VECTOR:
 377         case TS_VECTOR:
 378         case NP_VECTOR:
 379         case SS_VECTOR:
 380         case GP_VECTOR:
 381                 return EXCPT_CONTRIBUTORY;
 382         default:
 383                 break;
 384         }
 385         return EXCPT_BENIGN;
 386 }
 387
 388 #define EXCPT_FAULT             0
 389 #define EXCPT_TRAP              1
 390 #define EXCPT_ABORT             2
 391 #define EXCPT_INTERRUPT         3
 392
 393 static int exception_type(int vector)
 394 {
 395         unsigned int mask;
 396
 397         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 398                 return EXCPT_INTERRUPT;
 399
 400         mask = 1 << vector;
 401
 402         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 403         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 404                 return EXCPT_TRAP;
 405
 406         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 407                 return EXCPT_ABORT;
 408
 409         /* Reserved exceptions will result in fault */
 410         return EXCPT_FAULT;
 411 }
 412
 413 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 414 {
 415         unsigned nr = vcpu->arch.exception.nr;
 416         bool has_payload = vcpu->arch.exception.has_payload;
 417         unsigned long payload = vcpu->arch.exception.payload;
 418
 419         if (!has_payload)
 420                 return;
 421
 422         switch (nr) {
 423         case DB_VECTOR:
 424                 /*
 425                  * "Certain debug exceptions may clear bit 0-3.  The
 426                  * remaining contents of the DR6 register are never
 427                  * cleared by the processor".
 428                  */
 429                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 430                 /*
 431                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 432                  */
 433                 vcpu->arch.dr6 |= DR6_RTM;
 434                 vcpu->arch.dr6 |= payload;
 435                 /*
 436                  * Bit 16 should be set in the payload whenever the #DB
 437                  * exception should clear DR6.RTM. This makes the payload
 438                  * compatible with the pending debug exceptions under VMX.
 439                  * Though not currently documented in the SDM, this also
 440                  * makes the payload compatible with the exit qualification
 441                  * for #DB exceptions under VMX.
 442                  */
 443                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 444                 break;
 445         case PF_VECTOR:
 446                 vcpu->arch.cr2 = payload;
 447                 break;
 448         }
 449
 450         vcpu->arch.exception.has_payload = false;
 451         vcpu->arch.exception.payload = 0;
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 454
 455 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 456                 unsigned nr, bool has_error, u32 error_code,
 457                 bool has_payload, unsigned long payload, bool reinject)
 458 {
 459         u32 prev_nr;
 460         int class1, class2;
 461
 462         kvm_make_request(KVM_REQ_EVENT, vcpu);
 463
 464         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 465         queue:
 466                 if (has_error && !is_protmode(vcpu))
 467                         has_error = false;
 468                 if (reinject) {
 469                         /*
 470                          * On vmentry, vcpu->arch.exception.pending is only
 471                          * true if an event injection was blocked by
 472                          * nested_run_pending.  In that case, however,
 473                          * vcpu_enter_guest requests an immediate exit,
 474                          * and the guest shouldn't proceed far enough to
 475                          * need reinjection.
 476                          */
 477                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 478                         vcpu->arch.exception.injected = true;
 479                         if (WARN_ON_ONCE(has_payload)) {
 480                                 /*
 481                                  * A reinjected event has already
 482                                  * delivered its payload.
 483                                  */
 484                                 has_payload = false;
 485                                 payload = 0;
 486                         }
 487                 } else {
 488                         vcpu->arch.exception.pending = true;
 489                         vcpu->arch.exception.injected = false;
 490                 }
 491                 vcpu->arch.exception.has_error_code = has_error;
 492                 vcpu->arch.exception.nr = nr;
 493                 vcpu->arch.exception.error_code = error_code;
 494                 vcpu->arch.exception.has_payload = has_payload;
 495                 vcpu->arch.exception.payload = payload;
 496                 /*
 497                  * In guest mode, payload delivery should be deferred,
 498                  * so that the L1 hypervisor can intercept #PF before
 499                  * CR2 is modified (or intercept #DB before DR6 is
 500                  * modified under nVMX).  However, for ABI
 501                  * compatibility with KVM_GET_VCPU_EVENTS and
 502                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 503                  * delivery unless userspace has enabled this
 504                  * functionality via the per-VM capability,
 505                  * KVM_CAP_EXCEPTION_PAYLOAD.
 506                  */
 507                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 508                     !is_guest_mode(vcpu))
 509                         kvm_deliver_exception_payload(vcpu);
 510                 return;
 511         }
 512
 513         /* to check exception */
 514         prev_nr = vcpu->arch.exception.nr;
 515         if (prev_nr == DF_VECTOR) {
 516                 /* triple fault -> shutdown */
 517                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 518                 return;
 519         }
 520         class1 = exception_class(prev_nr);
 521         class2 = exception_class(nr);
 522         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 523                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 524                 /*
 525                  * Generate double fault per SDM Table 5-5.  Set
 526                  * exception.pending = true so that the double fault
 527                  * can trigger a nested vmexit.
 528                  */
 529                 vcpu->arch.exception.pending = true;
 530                 vcpu->arch.exception.injected = false;
 531                 vcpu->arch.exception.has_error_code = true;
 532                 vcpu->arch.exception.nr = DF_VECTOR;
 533                 vcpu->arch.exception.error_code = 0;
 534                 vcpu->arch.exception.has_payload = false;
 535                 vcpu->arch.exception.payload = 0;
 536         } else
 537                 /* replace previous exception with a new one in a hope
 538                    that instruction re-execution will regenerate lost
 539                    exception */
 540                 goto queue;
 541 }
 542
 543 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 544 {
 545         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 548
 549 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 550 {
 551         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 554
 555 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 556                                   unsigned long payload)
 557 {
 558         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 559 }
 560
 561 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 562                                     u32 error_code, unsigned long payload)
 563 {
 564         kvm_multiple_exception(vcpu, nr, true, error_code,
 565                                true, payload, false);
 566 }
 567
 568 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 569 {
 570         if (err)
 571                 kvm_inject_gp(vcpu, 0);
 572         else
 573                 return kvm_skip_emulated_instruction(vcpu);
 574
 575         return 1;
 576 }
 577 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 578
 579 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 580 {
 581         ++vcpu->stat.pf_guest;
 582         vcpu->arch.exception.nested_apf =
 583                 is_guest_mode(vcpu) && fault->async_page_fault;
 584         if (vcpu->arch.exception.nested_apf) {
 585                 vcpu->arch.apf.nested_apf_token = fault->address;
 586                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 587         } else {
 588                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 589                                         fault->address);
 590         }
 591 }
 592 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 593
 594 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 595 {
 596         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 597                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 598         else
 599                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 600
 601         return fault->nested_page_fault;
 602 }
 603
 604 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 605 {
 606         atomic_inc(&vcpu->arch.nmi_queued);
 607         kvm_make_request(KVM_REQ_NMI, vcpu);
 608 }
 609 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 610
 611 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 612 {
 613         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 614 }
 615 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 616
 617 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 618 {
 619         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 622
 623 /*
 624  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 625  * a #GP and return false.
 626  */
 627 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 628 {
 629         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 630                 return true;
 631         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 632         return false;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 635
 636 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 637 {
 638         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 639                 return true;
 640
 641         kvm_queue_exception(vcpu, UD_VECTOR);
 642         return false;
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_require_dr);
 645
 646 /*
 647  * This function will be used to read from the physical memory of the currently
 648  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 649  * can read from guest physical or from the guest's guest physical memory.
 650  */
 651 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 652                             gfn_t ngfn, void *data, int offset, int len,
 653                             u32 access)
 654 {
 655         struct x86_exception exception;
 656         gfn_t real_gfn;
 657         gpa_t ngpa;
 658
 659         ngpa     = gfn_to_gpa(ngfn);
 660         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 661         if (real_gfn == UNMAPPED_GVA)
 662                 return -EFAULT;
 663
 664         real_gfn = gpa_to_gfn(real_gfn);
 665
 666         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 669
 670 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 671                                void *data, int offset, int len, u32 access)
 672 {
 673         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 674                                        data, offset, len, access);
 675 }
 676
 677 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 678 {
 679         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 680                rsvd_bits(1, 2);
 681 }
 682
 683 /*
 684  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 685  */
 686 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 687 {
 688         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 689         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 690         int i;
 691         int ret;
 692         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 693
 694         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 695                                       offset * sizeof(u64), sizeof(pdpte),
 696                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 697         if (ret < 0) {
 698                 ret = 0;
 699                 goto out;
 700         }
 701         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 702                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 703                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 704                         ret = 0;
 705                         goto out;
 706                 }
 707         }
 708         ret = 1;
 709
 710         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 711         __set_bit(VCPU_EXREG_PDPTR,
 712                   (unsigned long *)&vcpu->arch.regs_avail);
 713         __set_bit(VCPU_EXREG_PDPTR,
 714                   (unsigned long *)&vcpu->arch.regs_dirty);
 715 out:
 716
 717         return ret;
 718 }
 719 EXPORT_SYMBOL_GPL(load_pdptrs);
 720
 721 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 722 {
 723         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 724         bool changed = true;
 725         int offset;
 726         gfn_t gfn;
 727         int r;
 728
 729         if (!is_pae_paging(vcpu))
 730                 return false;
 731
 732         if (!test_bit(VCPU_EXREG_PDPTR,
 733                       (unsigned long *)&vcpu->arch.regs_avail))
 734                 return true;
 735
 736         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 737         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 738         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 739                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 740         if (r < 0)
 741                 goto out;
 742         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 743 out:
 744
 745         return changed;
 746 }
 747 EXPORT_SYMBOL_GPL(pdptrs_changed);
 748
 749 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 750 {
 751         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 752         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 753
 754         cr0 |= X86_CR0_ET;
 755
 756 #ifdef CONFIG_X86_64
 757         if (cr0 & 0xffffffff00000000UL)
 758                 return 1;
 759 #endif
 760
 761         cr0 &= ~CR0_RESERVED_BITS;
 762
 763         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 764                 return 1;
 765
 766         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 767                 return 1;
 768
 769         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 770 #ifdef CONFIG_X86_64
 771                 if ((vcpu->arch.efer & EFER_LME)) {
 772                         int cs_db, cs_l;
 773
 774                         if (!is_pae(vcpu))
 775                                 return 1;
 776                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 777                         if (cs_l)
 778                                 return 1;
 779                 } else
 780 #endif
 781                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 782                                                  kvm_read_cr3(vcpu)))
 783                         return 1;
 784         }
 785
 786         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 787                 return 1;
 788
 789         kvm_x86_ops->set_cr0(vcpu, cr0);
 790
 791         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 792                 kvm_clear_async_pf_completion_queue(vcpu);
 793                 kvm_async_pf_hash_reset(vcpu);
 794         }
 795
 796         if ((cr0 ^ old_cr0) & update_bits)
 797                 kvm_mmu_reset_context(vcpu);
 798
 799         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 800             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 801             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 802                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 803
 804         return 0;
 805 }
 806 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 807
 808 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 809 {
 810         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 811 }
 812 EXPORT_SYMBOL_GPL(kvm_lmsw);
 813
 814 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 815 {
 816         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 817                         !vcpu->guest_xcr0_loaded) {
 818                 /* kvm_set_xcr() also depends on this */
 819                 if (vcpu->arch.xcr0 != host_xcr0)
 820                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 821                 vcpu->guest_xcr0_loaded = 1;
 822         }
 823 }
 824 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 825
 826 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 827 {
 828         if (vcpu->guest_xcr0_loaded) {
 829                 if (vcpu->arch.xcr0 != host_xcr0)
 830                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 831                 vcpu->guest_xcr0_loaded = 0;
 832         }
 833 }
 834 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 835
 836 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 837 {
 838         u64 xcr0 = xcr;
 839         u64 old_xcr0 = vcpu->arch.xcr0;
 840         u64 valid_bits;
 841
 842         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 843         if (index != XCR_XFEATURE_ENABLED_MASK)
 844                 return 1;
 845         if (!(xcr0 & XFEATURE_MASK_FP))
 846                 return 1;
 847         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 848                 return 1;
 849
 850         /*
 851          * Do not allow the guest to set bits that we do not support
 852          * saving.  However, xcr0 bit 0 is always set, even if the
 853          * emulated CPU does not support XSAVE (see fx_init).
 854          */
 855         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 856         if (xcr0 & ~valid_bits)
 857                 return 1;
 858
 859         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 860             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 861                 return 1;
 862
 863         if (xcr0 & XFEATURE_MASK_AVX512) {
 864                 if (!(xcr0 & XFEATURE_MASK_YMM))
 865                         return 1;
 866                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 867                         return 1;
 868         }
 869         vcpu->arch.xcr0 = xcr0;
 870
 871         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 872                 kvm_update_cpuid(vcpu);
 873         return 0;
 874 }
 875
 876 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 877 {
 878         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 879             __kvm_set_xcr(vcpu, index, xcr)) {
 880                 kvm_inject_gp(vcpu, 0);
 881                 return 1;
 882         }
 883         return 0;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 886
 887 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 888 {
 889         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 890         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 891                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 892
 893         if (cr4 & CR4_RESERVED_BITS)
 894                 return 1;
 895
 896         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 897                 return 1;
 898
 899         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 900                 return 1;
 901
 902         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 903                 return 1;
 904
 905         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 906                 return 1;
 907
 908         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 909                 return 1;
 910
 911         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 912                 return 1;
 913
 914         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 915                 return 1;
 916
 917         if (is_long_mode(vcpu)) {
 918                 if (!(cr4 & X86_CR4_PAE))
 919                         return 1;
 920         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 921                    && ((cr4 ^ old_cr4) & pdptr_bits)
 922                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 923                                    kvm_read_cr3(vcpu)))
 924                 return 1;
 925
 926         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 927                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 928                         return 1;
 929
 930                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 931                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 932                         return 1;
 933         }
 934
 935         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 936                 return 1;
 937
 938         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 939             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 940                 kvm_mmu_reset_context(vcpu);
 941
 942         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 943                 kvm_update_cpuid(vcpu);
 944
 945         return 0;
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 948
 949 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 950 {
 951         bool skip_tlb_flush = false;
 952 #ifdef CONFIG_X86_64
 953         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 954
 955         if (pcid_enabled) {
 956                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 957                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 958         }
 959 #endif
 960
 961         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 962                 if (!skip_tlb_flush) {
 963                         kvm_mmu_sync_roots(vcpu);
 964                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 965                 }
 966                 return 0;
 967         }
 968
 969         if (is_long_mode(vcpu) &&
 970             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 971                 return 1;
 972         else if (is_pae_paging(vcpu) &&
 973                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 974                 return 1;
 975
 976         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 977         vcpu->arch.cr3 = cr3;
 978         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 979
 980         return 0;
 981 }
 982 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 983
 984 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 985 {
 986         if (cr8 & CR8_RESERVED_BITS)
 987                 return 1;
 988         if (lapic_in_kernel(vcpu))
 989                 kvm_lapic_set_tpr(vcpu, cr8);
 990         else
 991                 vcpu->arch.cr8 = cr8;
 992         return 0;
 993 }
 994 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 995
 996 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 997 {
 998         if (lapic_in_kernel(vcpu))
 999                 return kvm_lapic_get_cr8(vcpu);
1000         else
1001                 return vcpu->arch.cr8;
1002 }
1003 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1004
1005 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1006 {
1007         int i;
1008
1009         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1010                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1011                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1012                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1013         }
1014 }
1015
1016 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1017 {
1018         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1019                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1020 }
1021
1022 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1023 {
1024         unsigned long dr7;
1025
1026         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1027                 dr7 = vcpu->arch.guest_debug_dr7;
1028         else
1029                 dr7 = vcpu->arch.dr7;
1030         kvm_x86_ops->set_dr7(vcpu, dr7);
1031         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1032         if (dr7 & DR7_BP_EN_MASK)
1033                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1034 }
1035
1036 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1037 {
1038         u64 fixed = DR6_FIXED_1;
1039
1040         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1041                 fixed |= DR6_RTM;
1042         return fixed;
1043 }
1044
1045 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1046 {
1047         switch (dr) {
1048         case 0 ... 3:
1049                 vcpu->arch.db[dr] = val;
1050                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1051                         vcpu->arch.eff_db[dr] = val;
1052                 break;
1053         case 4:
1054                 /* fall through */
1055         case 6:
1056                 if (val & 0xffffffff00000000ULL)
1057                         return -1; /* #GP */
1058                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1059                 kvm_update_dr6(vcpu);
1060                 break;
1061         case 5:
1062                 /* fall through */
1063         default: /* 7 */
1064                 if (val & 0xffffffff00000000ULL)
1065                         return -1; /* #GP */
1066                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1067                 kvm_update_dr7(vcpu);
1068                 break;
1069         }
1070
1071         return 0;
1072 }
1073
1074 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1075 {
1076         if (__kvm_set_dr(vcpu, dr, val)) {
1077                 kvm_inject_gp(vcpu, 0);
1078                 return 1;
1079         }
1080         return 0;
1081 }
1082 EXPORT_SYMBOL_GPL(kvm_set_dr);
1083
1084 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1085 {
1086         switch (dr) {
1087         case 0 ... 3:
1088                 *val = vcpu->arch.db[dr];
1089                 break;
1090         case 4:
1091                 /* fall through */
1092         case 6:
1093                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1094                         *val = vcpu->arch.dr6;
1095                 else
1096                         *val = kvm_x86_ops->get_dr6(vcpu);
1097                 break;
1098         case 5:
1099                 /* fall through */
1100         default: /* 7 */
1101                 *val = vcpu->arch.dr7;
1102                 break;
1103         }
1104         return 0;
1105 }
1106 EXPORT_SYMBOL_GPL(kvm_get_dr);
1107
1108 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1109 {
1110         u32 ecx = kvm_rcx_read(vcpu);
1111         u64 data;
1112         int err;
1113
1114         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1115         if (err)
1116                 return err;
1117         kvm_rax_write(vcpu, (u32)data);
1118         kvm_rdx_write(vcpu, data >> 32);
1119         return err;
1120 }
1121 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1122
1123 /*
1124  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1125  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1126  *
1127  * This list is modified at module load time to reflect the
1128  * capabilities of the host cpu. This capabilities test skips MSRs that are
1129  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1130  * may depend on host virtualization features rather than host cpu features.
1131  */
1132
1133 static u32 msrs_to_save[] = {
1134         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1135         MSR_STAR,
1136 #ifdef CONFIG_X86_64
1137         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1138 #endif
1139         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1140         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1141         MSR_IA32_SPEC_CTRL,
1142         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1143         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1144         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1145         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1146         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1147         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1148         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1149         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1150         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1151         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1152         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1153         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1154         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1155         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1156         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1157         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1158         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1159         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1160         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1161         MSR_ARCH_PERFMON_PERFCTR0 + 18, MSR_ARCH_PERFMON_PERFCTR0 + 19,
1162         MSR_ARCH_PERFMON_PERFCTR0 + 20, MSR_ARCH_PERFMON_PERFCTR0 + 21,
1163         MSR_ARCH_PERFMON_PERFCTR0 + 22, MSR_ARCH_PERFMON_PERFCTR0 + 23,
1164         MSR_ARCH_PERFMON_PERFCTR0 + 24, MSR_ARCH_PERFMON_PERFCTR0 + 25,
1165         MSR_ARCH_PERFMON_PERFCTR0 + 26, MSR_ARCH_PERFMON_PERFCTR0 + 27,
1166         MSR_ARCH_PERFMON_PERFCTR0 + 28, MSR_ARCH_PERFMON_PERFCTR0 + 29,
1167         MSR_ARCH_PERFMON_PERFCTR0 + 30, MSR_ARCH_PERFMON_PERFCTR0 + 31,
1168         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1169         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1170         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1171         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1172         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1173         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1174         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1175         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1176         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1177         MSR_ARCH_PERFMON_EVENTSEL0 + 18, MSR_ARCH_PERFMON_EVENTSEL0 + 19,
1178         MSR_ARCH_PERFMON_EVENTSEL0 + 20, MSR_ARCH_PERFMON_EVENTSEL0 + 21,
1179         MSR_ARCH_PERFMON_EVENTSEL0 + 22, MSR_ARCH_PERFMON_EVENTSEL0 + 23,
1180         MSR_ARCH_PERFMON_EVENTSEL0 + 24, MSR_ARCH_PERFMON_EVENTSEL0 + 25,
1181         MSR_ARCH_PERFMON_EVENTSEL0 + 26, MSR_ARCH_PERFMON_EVENTSEL0 + 27,
1182         MSR_ARCH_PERFMON_EVENTSEL0 + 28, MSR_ARCH_PERFMON_EVENTSEL0 + 29,
1183         MSR_ARCH_PERFMON_EVENTSEL0 + 30, MSR_ARCH_PERFMON_EVENTSEL0 + 31,
1184 };
1185
1186 static unsigned num_msrs_to_save;
1187
1188 static u32 emulated_msrs[] = {
1189         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1190         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1191         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1192         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1193         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1194         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1195         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1196         HV_X64_MSR_RESET,
1197         HV_X64_MSR_VP_INDEX,
1198         HV_X64_MSR_VP_RUNTIME,
1199         HV_X64_MSR_SCONTROL,
1200         HV_X64_MSR_STIMER0_CONFIG,
1201         HV_X64_MSR_VP_ASSIST_PAGE,
1202         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1203         HV_X64_MSR_TSC_EMULATION_STATUS,
1204
1205         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1206         MSR_KVM_PV_EOI_EN,
1207
1208         MSR_IA32_TSC_ADJUST,
1209         MSR_IA32_TSCDEADLINE,
1210         MSR_IA32_ARCH_CAPABILITIES,
1211         MSR_IA32_MISC_ENABLE,
1212         MSR_IA32_MCG_STATUS,
1213         MSR_IA32_MCG_CTL,
1214         MSR_IA32_MCG_EXT_CTL,
1215         MSR_IA32_SMBASE,
1216         MSR_SMI_COUNT,
1217         MSR_PLATFORM_INFO,
1218         MSR_MISC_FEATURES_ENABLES,
1219         MSR_AMD64_VIRT_SPEC_CTRL,
1220         MSR_IA32_POWER_CTL,
1221
1222         /*
1223          * The following list leaves out MSRs whose values are determined
1224          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1225          * We always support the "true" VMX control MSRs, even if the host
1226          * processor does not, so I am putting these registers here rather
1227          * than in msrs_to_save.
1228          */
1229         MSR_IA32_VMX_BASIC,
1230         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1231         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1232         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1233         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1234         MSR_IA32_VMX_MISC,
1235         MSR_IA32_VMX_CR0_FIXED0,
1236         MSR_IA32_VMX_CR4_FIXED0,
1237         MSR_IA32_VMX_VMCS_ENUM,
1238         MSR_IA32_VMX_PROCBASED_CTLS2,
1239         MSR_IA32_VMX_EPT_VPID_CAP,
1240         MSR_IA32_VMX_VMFUNC,
1241
1242         MSR_K7_HWCR,
1243         MSR_KVM_POLL_CONTROL,
1244 };
1245
1246 static unsigned num_emulated_msrs;
1247
1248 /*
1249  * List of msr numbers which are used to expose MSR-based features that
1250  * can be used by a hypervisor to validate requested CPU features.
1251  */
1252 static u32 msr_based_features[] = {
1253         MSR_IA32_VMX_BASIC,
1254         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1255         MSR_IA32_VMX_PINBASED_CTLS,
1256         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1257         MSR_IA32_VMX_PROCBASED_CTLS,
1258         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1259         MSR_IA32_VMX_EXIT_CTLS,
1260         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1261         MSR_IA32_VMX_ENTRY_CTLS,
1262         MSR_IA32_VMX_MISC,
1263         MSR_IA32_VMX_CR0_FIXED0,
1264         MSR_IA32_VMX_CR0_FIXED1,
1265         MSR_IA32_VMX_CR4_FIXED0,
1266         MSR_IA32_VMX_CR4_FIXED1,
1267         MSR_IA32_VMX_VMCS_ENUM,
1268         MSR_IA32_VMX_PROCBASED_CTLS2,
1269         MSR_IA32_VMX_EPT_VPID_CAP,
1270         MSR_IA32_VMX_VMFUNC,
1271
1272         MSR_F10H_DECFG,
1273         MSR_IA32_UCODE_REV,
1274         MSR_IA32_ARCH_CAPABILITIES,
1275 };
1276
1277 static unsigned int num_msr_based_features;
1278
1279 static u64 kvm_get_arch_capabilities(void)
1280 {
1281         u64 data = 0;
1282
1283         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1284                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1285
1286         /*
1287          * If we're doing cache flushes (either "always" or "cond")
1288          * we will do one whenever the guest does a vmlaunch/vmresume.
1289          * If an outer hypervisor is doing the cache flush for us
1290          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1291          * capability to the guest too, and if EPT is disabled we're not
1292          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1293          * require a nested hypervisor to do a flush of its own.
1294          */
1295         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1296                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1297
1298         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1299                 data |= ARCH_CAP_RDCL_NO;
1300         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1301                 data |= ARCH_CAP_SSB_NO;
1302         if (!boot_cpu_has_bug(X86_BUG_MDS))
1303                 data |= ARCH_CAP_MDS_NO;
1304
1305         return data;
1306 }
1307
1308 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1309 {
1310         switch (msr->index) {
1311         case MSR_IA32_ARCH_CAPABILITIES:
1312                 msr->data = kvm_get_arch_capabilities();
1313                 break;
1314         case MSR_IA32_UCODE_REV:
1315                 rdmsrl_safe(msr->index, &msr->data);
1316                 break;
1317         default:
1318                 if (kvm_x86_ops->get_msr_feature(msr))
1319                         return 1;
1320         }
1321         return 0;
1322 }
1323
1324 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1325 {
1326         struct kvm_msr_entry msr;
1327         int r;
1328
1329         msr.index = index;
1330         r = kvm_get_msr_feature(&msr);
1331         if (r)
1332                 return r;
1333
1334         *data = msr.data;
1335
1336         return 0;
1337 }
1338
1339 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1340 {
1341         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1342                 return false;
1343
1344         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1345                 return false;
1346
1347         if (efer & (EFER_LME | EFER_LMA) &&
1348             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1349                 return false;
1350
1351         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1352                 return false;
1353
1354         return true;
1355
1356 }
1357 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1358 {
1359         if (efer & efer_reserved_bits)
1360                 return false;
1361
1362         return __kvm_valid_efer(vcpu, efer);
1363 }
1364 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1365
1366 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1367 {
1368         u64 old_efer = vcpu->arch.efer;
1369         u64 efer = msr_info->data;
1370
1371         if (efer & efer_reserved_bits)
1372                 return 1;
1373
1374         if (!msr_info->host_initiated) {
1375                 if (!__kvm_valid_efer(vcpu, efer))
1376                         return 1;
1377
1378                 if (is_paging(vcpu) &&
1379                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1380                         return 1;
1381         }
1382
1383         efer &= ~EFER_LMA;
1384         efer |= vcpu->arch.efer & EFER_LMA;
1385
1386         kvm_x86_ops->set_efer(vcpu, efer);
1387
1388         /* Update reserved bits */
1389         if ((efer ^ old_efer) & EFER_NX)
1390                 kvm_mmu_reset_context(vcpu);
1391
1392         return 0;
1393 }
1394
1395 void kvm_enable_efer_bits(u64 mask)
1396 {
1397        efer_reserved_bits &= ~mask;
1398 }
1399 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1400
1401 /*
1402  * Write @data into the MSR specified by @index.  Select MSR specific fault
1403  * checks are bypassed if @host_initiated is %true.
1404  * Returns 0 on success, non-0 otherwise.
1405  * Assumes vcpu_load() was already called.
1406  */
1407 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1408                          bool host_initiated)
1409 {
1410         struct msr_data msr;
1411
1412         switch (index) {
1413         case MSR_FS_BASE:
1414         case MSR_GS_BASE:
1415         case MSR_KERNEL_GS_BASE:
1416         case MSR_CSTAR:
1417         case MSR_LSTAR:
1418                 if (is_noncanonical_address(data, vcpu))
1419                         return 1;
1420                 break;
1421         case MSR_IA32_SYSENTER_EIP:
1422         case MSR_IA32_SYSENTER_ESP:
1423                 /*
1424                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1425                  * non-canonical address is written on Intel but not on
1426                  * AMD (which ignores the top 32-bits, because it does
1427                  * not implement 64-bit SYSENTER).
1428                  *
1429                  * 64-bit code should hence be able to write a non-canonical
1430                  * value on AMD.  Making the address canonical ensures that
1431                  * vmentry does not fail on Intel after writing a non-canonical
1432                  * value, and that something deterministic happens if the guest
1433                  * invokes 64-bit SYSENTER.
1434                  */
1435                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1436         }
1437
1438         msr.data = data;
1439         msr.index = index;
1440         msr.host_initiated = host_initiated;
1441
1442         return kvm_x86_ops->set_msr(vcpu, &msr);
1443 }
1444
1445 /*
1446  * Read the MSR specified by @index into @data.  Select MSR specific fault
1447  * checks are bypassed if @host_initiated is %true.
1448  * Returns 0 on success, non-0 otherwise.
1449  * Assumes vcpu_load() was already called.
1450  */
1451 static int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1452                          bool host_initiated)
1453 {
1454         struct msr_data msr;
1455         int ret;
1456
1457         msr.index = index;
1458         msr.host_initiated = host_initiated;
1459
1460         ret = kvm_x86_ops->get_msr(vcpu, &msr);
1461         if (!ret)
1462                 *data = msr.data;
1463         return ret;
1464 }
1465
1466 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1467 {
1468         return __kvm_get_msr(vcpu, index, data, false);
1469 }
1470 EXPORT_SYMBOL_GPL(kvm_get_msr);
1471
1472 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1473 {
1474         return __kvm_set_msr(vcpu, index, data, false);
1475 }
1476 EXPORT_SYMBOL_GPL(kvm_set_msr);
1477
1478 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1479 {
1480         u32 ecx = kvm_rcx_read(vcpu);
1481         u64 data;
1482
1483         if (kvm_get_msr(vcpu, ecx, &data)) {
1484                 trace_kvm_msr_read_ex(ecx);
1485                 kvm_inject_gp(vcpu, 0);
1486                 return 1;
1487         }
1488
1489         trace_kvm_msr_read(ecx, data);
1490
1491         kvm_rax_write(vcpu, data & -1u);
1492         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1493         return kvm_skip_emulated_instruction(vcpu);
1494 }
1495 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1496
1497 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1498 {
1499         u32 ecx = kvm_rcx_read(vcpu);
1500         u64 data = kvm_read_edx_eax(vcpu);
1501
1502         if (kvm_set_msr(vcpu, ecx, data)) {
1503                 trace_kvm_msr_write_ex(ecx, data);
1504                 kvm_inject_gp(vcpu, 0);
1505                 return 1;
1506         }
1507
1508         trace_kvm_msr_write(ecx, data);
1509         return kvm_skip_emulated_instruction(vcpu);
1510 }
1511 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1512
1513 /*
1514  * Adapt set_msr() to msr_io()'s calling convention
1515  */
1516 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1517 {
1518         return __kvm_get_msr(vcpu, index, data, true);
1519 }
1520
1521 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1522 {
1523         return __kvm_set_msr(vcpu, index, *data, true);
1524 }
1525
1526 #ifdef CONFIG_X86_64
1527 struct pvclock_gtod_data {
1528         seqcount_t      seq;
1529
1530         struct { /* extract of a clocksource struct */
1531                 int vclock_mode;
1532                 u64     cycle_last;
1533                 u64     mask;
1534                 u32     mult;
1535                 u32     shift;
1536         } clock;
1537
1538         u64             boot_ns;
1539         u64             nsec_base;
1540         u64             wall_time_sec;
1541 };
1542
1543 static struct pvclock_gtod_data pvclock_gtod_data;
1544
1545 static void update_pvclock_gtod(struct timekeeper *tk)
1546 {
1547         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1548         u64 boot_ns;
1549
1550         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1551
1552         write_seqcount_begin(&vdata->seq);
1553
1554         /* copy pvclock gtod data */
1555         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1556         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1557         vdata->clock.mask               = tk->tkr_mono.mask;
1558         vdata->clock.mult               = tk->tkr_mono.mult;
1559         vdata->clock.shift              = tk->tkr_mono.shift;
1560
1561         vdata->boot_ns                  = boot_ns;
1562         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1563
1564         vdata->wall_time_sec            = tk->xtime_sec;
1565
1566         write_seqcount_end(&vdata->seq);
1567 }
1568 #endif
1569
1570 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1571 {
1572         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1573         kvm_vcpu_kick(vcpu);
1574 }
1575
1576 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1577 {
1578         int version;
1579         int r;
1580         struct pvclock_wall_clock wc;
1581         struct timespec64 boot;
1582
1583         if (!wall_clock)
1584                 return;
1585
1586         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1587         if (r)
1588                 return;
1589
1590         if (version & 1)
1591                 ++version;  /* first time write, random junk */
1592
1593         ++version;
1594
1595         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1596                 return;
1597
1598         /*
1599          * The guest calculates current wall clock time by adding
1600          * system time (updated by kvm_guest_time_update below) to the
1601          * wall clock specified here.  guest system time equals host
1602          * system time for us, thus we must fill in host boot time here.
1603          */
1604         getboottime64(&boot);
1605
1606         if (kvm->arch.kvmclock_offset) {
1607                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1608                 boot = timespec64_sub(boot, ts);
1609         }
1610         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1611         wc.nsec = boot.tv_nsec;
1612         wc.version = version;
1613
1614         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1615
1616         version++;
1617         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1618 }
1619
1620 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1621 {
1622         do_shl32_div32(dividend, divisor);
1623         return dividend;
1624 }
1625
1626 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1627                                s8 *pshift, u32 *pmultiplier)
1628 {
1629         uint64_t scaled64;
1630         int32_t  shift = 0;
1631         uint64_t tps64;
1632         uint32_t tps32;
1633
1634         tps64 = base_hz;
1635         scaled64 = scaled_hz;
1636         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1637                 tps64 >>= 1;
1638                 shift--;
1639         }
1640
1641         tps32 = (uint32_t)tps64;
1642         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1643                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1644                         scaled64 >>= 1;
1645                 else
1646                         tps32 <<= 1;
1647                 shift++;
1648         }
1649
1650         *pshift = shift;
1651         *pmultiplier = div_frac(scaled64, tps32);
1652 }
1653
1654 #ifdef CONFIG_X86_64
1655 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1656 #endif
1657
1658 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1659 static unsigned long max_tsc_khz;
1660
1661 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1662 {
1663         u64 v = (u64)khz * (1000000 + ppm);
1664         do_div(v, 1000000);
1665         return v;
1666 }
1667
1668 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1669 {
1670         u64 ratio;
1671
1672         /* Guest TSC same frequency as host TSC? */
1673         if (!scale) {
1674                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1675                 return 0;
1676         }
1677
1678         /* TSC scaling supported? */
1679         if (!kvm_has_tsc_control) {
1680                 if (user_tsc_khz > tsc_khz) {
1681                         vcpu->arch.tsc_catchup = 1;
1682                         vcpu->arch.tsc_always_catchup = 1;
1683                         return 0;
1684                 } else {
1685                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1686                         return -1;
1687                 }
1688         }
1689
1690         /* TSC scaling required  - calculate ratio */
1691         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1692                                 user_tsc_khz, tsc_khz);
1693
1694         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1695                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1696                                     user_tsc_khz);
1697                 return -1;
1698         }
1699
1700         vcpu->arch.tsc_scaling_ratio = ratio;
1701         return 0;
1702 }
1703
1704 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1705 {
1706         u32 thresh_lo, thresh_hi;
1707         int use_scaling = 0;
1708
1709         /* tsc_khz can be zero if TSC calibration fails */
1710         if (user_tsc_khz == 0) {
1711                 /* set tsc_scaling_ratio to a safe value */
1712                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1713                 return -1;
1714         }
1715
1716         /* Compute a scale to convert nanoseconds in TSC cycles */
1717         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1718                            &vcpu->arch.virtual_tsc_shift,
1719                            &vcpu->arch.virtual_tsc_mult);
1720         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1721
1722         /*
1723          * Compute the variation in TSC rate which is acceptable
1724          * within the range of tolerance and decide if the
1725          * rate being applied is within that bounds of the hardware
1726          * rate.  If so, no scaling or compensation need be done.
1727          */
1728         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1729         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1730         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1731                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1732                 use_scaling = 1;
1733         }
1734         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1735 }
1736
1737 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1738 {
1739         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1740                                       vcpu->arch.virtual_tsc_mult,
1741                                       vcpu->arch.virtual_tsc_shift);
1742         tsc += vcpu->arch.this_tsc_write;
1743         return tsc;
1744 }
1745
1746 static inline int gtod_is_based_on_tsc(int mode)
1747 {
1748         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1749 }
1750
1751 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1752 {
1753 #ifdef CONFIG_X86_64
1754         bool vcpus_matched;
1755         struct kvm_arch *ka = &vcpu->kvm->arch;
1756         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1757
1758         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1759                          atomic_read(&vcpu->kvm->online_vcpus));
1760
1761         /*
1762          * Once the masterclock is enabled, always perform request in
1763          * order to update it.
1764          *
1765          * In order to enable masterclock, the host clocksource must be TSC
1766          * and the vcpus need to have matched TSCs.  When that happens,
1767          * perform request to enable masterclock.
1768          */
1769         if (ka->use_master_clock ||
1770             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1771                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1772
1773         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1774                             atomic_read(&vcpu->kvm->online_vcpus),
1775                             ka->use_master_clock, gtod->clock.vclock_mode);
1776 #endif
1777 }
1778
1779 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1780 {
1781         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1782         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1783 }
1784
1785 /*
1786  * Multiply tsc by a fixed point number represented by ratio.
1787  *
1788  * The most significant 64-N bits (mult) of ratio represent the
1789  * integral part of the fixed point number; the remaining N bits
1790  * (frac) represent the fractional part, ie. ratio represents a fixed
1791  * point number (mult + frac * 2^(-N)).
1792  *
1793  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1794  */
1795 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1796 {
1797         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1798 }
1799
1800 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1801 {
1802         u64 _tsc = tsc;
1803         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1804
1805         if (ratio != kvm_default_tsc_scaling_ratio)
1806                 _tsc = __scale_tsc(ratio, tsc);
1807
1808         return _tsc;
1809 }
1810 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1811
1812 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1813 {
1814         u64 tsc;
1815
1816         tsc = kvm_scale_tsc(vcpu, rdtsc());
1817
1818         return target_tsc - tsc;
1819 }
1820
1821 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1822 {
1823         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1824
1825         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1826 }
1827 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1828
1829 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1830 {
1831         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1832 }
1833
1834 static inline bool kvm_check_tsc_unstable(void)
1835 {
1836 #ifdef CONFIG_X86_64
1837         /*
1838          * TSC is marked unstable when we're running on Hyper-V,
1839          * 'TSC page' clocksource is good.
1840          */
1841         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1842                 return false;
1843 #endif
1844         return check_tsc_unstable();
1845 }
1846
1847 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1848 {
1849         struct kvm *kvm = vcpu->kvm;
1850         u64 offset, ns, elapsed;
1851         unsigned long flags;
1852         bool matched;
1853         bool already_matched;
1854         u64 data = msr->data;
1855         bool synchronizing = false;
1856
1857         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1858         offset = kvm_compute_tsc_offset(vcpu, data);
1859         ns = ktime_get_boottime_ns();
1860         elapsed = ns - kvm->arch.last_tsc_nsec;
1861
1862         if (vcpu->arch.virtual_tsc_khz) {
1863                 if (data == 0 && msr->host_initiated) {
1864                         /*
1865                          * detection of vcpu initialization -- need to sync
1866                          * with other vCPUs. This particularly helps to keep
1867                          * kvm_clock stable after CPU hotplug
1868                          */
1869                         synchronizing = true;
1870                 } else {
1871                         u64 tsc_exp = kvm->arch.last_tsc_write +
1872                                                 nsec_to_cycles(vcpu, elapsed);
1873                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1874                         /*
1875                          * Special case: TSC write with a small delta (1 second)
1876                          * of virtual cycle time against real time is
1877                          * interpreted as an attempt to synchronize the CPU.
1878                          */
1879                         synchronizing = data < tsc_exp + tsc_hz &&
1880                                         data + tsc_hz > tsc_exp;
1881                 }
1882         }
1883
1884         /*
1885          * For a reliable TSC, we can match TSC offsets, and for an unstable
1886          * TSC, we add elapsed time in this computation.  We could let the
1887          * compensation code attempt to catch up if we fall behind, but
1888          * it's better to try to match offsets from the beginning.
1889          */
1890         if (synchronizing &&
1891             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1892                 if (!kvm_check_tsc_unstable()) {
1893                         offset = kvm->arch.cur_tsc_offset;
1894                 } else {
1895                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1896                         data += delta;
1897                         offset = kvm_compute_tsc_offset(vcpu, data);
1898                 }
1899                 matched = true;
1900                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1901         } else {
1902                 /*
1903                  * We split periods of matched TSC writes into generations.
1904                  * For each generation, we track the original measured
1905                  * nanosecond time, offset, and write, so if TSCs are in
1906                  * sync, we can match exact offset, and if not, we can match
1907                  * exact software computation in compute_guest_tsc()
1908                  *
1909                  * These values are tracked in kvm->arch.cur_xxx variables.
1910                  */
1911                 kvm->arch.cur_tsc_generation++;
1912                 kvm->arch.cur_tsc_nsec = ns;
1913                 kvm->arch.cur_tsc_write = data;
1914                 kvm->arch.cur_tsc_offset = offset;
1915                 matched = false;
1916         }
1917
1918         /*
1919          * We also track th most recent recorded KHZ, write and time to
1920          * allow the matching interval to be extended at each write.
1921          */
1922         kvm->arch.last_tsc_nsec = ns;
1923         kvm->arch.last_tsc_write = data;
1924         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1925
1926         vcpu->arch.last_guest_tsc = data;
1927
1928         /* Keep track of which generation this VCPU has synchronized to */
1929         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1930         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1931         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1932
1933         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1934                 update_ia32_tsc_adjust_msr(vcpu, offset);
1935
1936         kvm_vcpu_write_tsc_offset(vcpu, offset);
1937         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1938
1939         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1940         if (!matched) {
1941                 kvm->arch.nr_vcpus_matched_tsc = 0;
1942         } else if (!already_matched) {
1943                 kvm->arch.nr_vcpus_matched_tsc++;
1944         }
1945
1946         kvm_track_tsc_matching(vcpu);
1947         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1948 }
1949
1950 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1951
1952 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1953                                            s64 adjustment)
1954 {
1955         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1956         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1957 }
1958
1959 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1960 {
1961         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1962                 WARN_ON(adjustment < 0);
1963         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1964         adjust_tsc_offset_guest(vcpu, adjustment);
1965 }
1966
1967 #ifdef CONFIG_X86_64
1968
1969 static u64 read_tsc(void)
1970 {
1971         u64 ret = (u64)rdtsc_ordered();
1972         u64 last = pvclock_gtod_data.clock.cycle_last;
1973
1974         if (likely(ret >= last))
1975                 return ret;
1976
1977         /*
1978          * GCC likes to generate cmov here, but this branch is extremely
1979          * predictable (it's just a function of time and the likely is
1980          * very likely) and there's a data dependence, so force GCC
1981          * to generate a branch instead.  I don't barrier() because
1982          * we don't actually need a barrier, and if this function
1983          * ever gets inlined it will generate worse code.
1984          */
1985         asm volatile ("");
1986         return last;
1987 }
1988
1989 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1990 {
1991         long v;
1992         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1993         u64 tsc_pg_val;
1994
1995         switch (gtod->clock.vclock_mode) {
1996         case VCLOCK_HVCLOCK:
1997                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1998                                                   tsc_timestamp);
1999                 if (tsc_pg_val != U64_MAX) {
2000                         /* TSC page valid */
2001                         *mode = VCLOCK_HVCLOCK;
2002                         v = (tsc_pg_val - gtod->clock.cycle_last) &
2003                                 gtod->clock.mask;
2004                 } else {
2005                         /* TSC page invalid */
2006                         *mode = VCLOCK_NONE;
2007                 }
2008                 break;
2009         case VCLOCK_TSC:
2010                 *mode = VCLOCK_TSC;
2011                 *tsc_timestamp = read_tsc();
2012                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
2013                         gtod->clock.mask;
2014                 break;
2015         default:
2016                 *mode = VCLOCK_NONE;
2017         }
2018
2019         if (*mode == VCLOCK_NONE)
2020                 *tsc_timestamp = v = 0;
2021
2022         return v * gtod->clock.mult;
2023 }
2024
2025 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
2026 {
2027         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2028         unsigned long seq;
2029         int mode;
2030         u64 ns;
2031
2032         do {
2033                 seq = read_seqcount_begin(&gtod->seq);
2034                 ns = gtod->nsec_base;
2035                 ns += vgettsc(tsc_timestamp, &mode);
2036                 ns >>= gtod->clock.shift;
2037                 ns += gtod->boot_ns;
2038         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2039         *t = ns;
2040
2041         return mode;
2042 }
2043
2044 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2045 {
2046         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2047         unsigned long seq;
2048         int mode;
2049         u64 ns;
2050
2051         do {
2052                 seq = read_seqcount_begin(&gtod->seq);
2053                 ts->tv_sec = gtod->wall_time_sec;
2054                 ns = gtod->nsec_base;
2055                 ns += vgettsc(tsc_timestamp, &mode);
2056                 ns >>= gtod->clock.shift;
2057         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2058
2059         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2060         ts->tv_nsec = ns;
2061
2062         return mode;
2063 }
2064
2065 /* returns true if host is using TSC based clocksource */
2066 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2067 {
2068         /* checked again under seqlock below */
2069         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2070                 return false;
2071
2072         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
2073                                                       tsc_timestamp));
2074 }
2075
2076 /* returns true if host is using TSC based clocksource */
2077 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2078                                            u64 *tsc_timestamp)
2079 {
2080         /* checked again under seqlock below */
2081         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2082                 return false;
2083
2084         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2085 }
2086 #endif
2087
2088 /*
2089  *
2090  * Assuming a stable TSC across physical CPUS, and a stable TSC
2091  * across virtual CPUs, the following condition is possible.
2092  * Each numbered line represents an event visible to both
2093  * CPUs at the next numbered event.
2094  *
2095  * "timespecX" represents host monotonic time. "tscX" represents
2096  * RDTSC value.
2097  *
2098  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2099  *
2100  * 1.  read timespec0,tsc0
2101  * 2.                                   | timespec1 = timespec0 + N
2102  *                                      | tsc1 = tsc0 + M
2103  * 3. transition to guest               | transition to guest
2104  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2105  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2106  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2107  *
2108  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2109  *
2110  *      - ret0 < ret1
2111  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2112  *              ...
2113  *      - 0 < N - M => M < N
2114  *
2115  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2116  * always the case (the difference between two distinct xtime instances
2117  * might be smaller then the difference between corresponding TSC reads,
2118  * when updating guest vcpus pvclock areas).
2119  *
2120  * To avoid that problem, do not allow visibility of distinct
2121  * system_timestamp/tsc_timestamp values simultaneously: use a master
2122  * copy of host monotonic time values. Update that master copy
2123  * in lockstep.
2124  *
2125  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2126  *
2127  */
2128
2129 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2130 {
2131 #ifdef CONFIG_X86_64
2132         struct kvm_arch *ka = &kvm->arch;
2133         int vclock_mode;
2134         bool host_tsc_clocksource, vcpus_matched;
2135
2136         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2137                         atomic_read(&kvm->online_vcpus));
2138
2139         /*
2140          * If the host uses TSC clock, then passthrough TSC as stable
2141          * to the guest.
2142          */
2143         host_tsc_clocksource = kvm_get_time_and_clockread(
2144                                         &ka->master_kernel_ns,
2145                                         &ka->master_cycle_now);
2146
2147         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2148                                 && !ka->backwards_tsc_observed
2149                                 && !ka->boot_vcpu_runs_old_kvmclock;
2150
2151         if (ka->use_master_clock)
2152                 atomic_set(&kvm_guest_has_master_clock, 1);
2153
2154         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2155         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2156                                         vcpus_matched);
2157 #endif
2158 }
2159
2160 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2161 {
2162         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2163 }
2164
2165 static void kvm_gen_update_masterclock(struct kvm *kvm)
2166 {
2167 #ifdef CONFIG_X86_64
2168         int i;
2169         struct kvm_vcpu *vcpu;
2170         struct kvm_arch *ka = &kvm->arch;
2171
2172         spin_lock(&ka->pvclock_gtod_sync_lock);
2173         kvm_make_mclock_inprogress_request(kvm);
2174         /* no guest entries from this point */
2175         pvclock_update_vm_gtod_copy(kvm);
2176
2177         kvm_for_each_vcpu(i, vcpu, kvm)
2178                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2179
2180         /* guest entries allowed */
2181         kvm_for_each_vcpu(i, vcpu, kvm)
2182                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2183
2184         spin_unlock(&ka->pvclock_gtod_sync_lock);
2185 #endif
2186 }
2187
2188 u64 get_kvmclock_ns(struct kvm *kvm)
2189 {
2190         struct kvm_arch *ka = &kvm->arch;
2191         struct pvclock_vcpu_time_info hv_clock;
2192         u64 ret;
2193
2194         spin_lock(&ka->pvclock_gtod_sync_lock);
2195         if (!ka->use_master_clock) {
2196                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2197                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2198         }
2199
2200         hv_clock.tsc_timestamp = ka->master_cycle_now;
2201         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2202         spin_unlock(&ka->pvclock_gtod_sync_lock);
2203
2204         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2205         get_cpu();
2206
2207         if (__this_cpu_read(cpu_tsc_khz)) {
2208                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2209                                    &hv_clock.tsc_shift,
2210                                    &hv_clock.tsc_to_system_mul);
2211                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2212         } else
2213                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2214
2215         put_cpu();
2216
2217         return ret;
2218 }
2219
2220 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2221 {
2222         struct kvm_vcpu_arch *vcpu = &v->arch;
2223         struct pvclock_vcpu_time_info guest_hv_clock;
2224
2225         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2226                 &guest_hv_clock, sizeof(guest_hv_clock))))
2227                 return;
2228
2229         /* This VCPU is paused, but it's legal for a guest to read another
2230          * VCPU's kvmclock, so we really have to follow the specification where
2231          * it says that version is odd if data is being modified, and even after
2232          * it is consistent.
2233          *
2234          * Version field updates must be kept separate.  This is because
2235          * kvm_write_guest_cached might use a "rep movs" instruction, and
2236          * writes within a string instruction are weakly ordered.  So there
2237          * are three writes overall.
2238          *
2239          * As a small optimization, only write the version field in the first
2240          * and third write.  The vcpu->pv_time cache is still valid, because the
2241          * version field is the first in the struct.
2242          */
2243         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2244
2245         if (guest_hv_clock.version & 1)
2246                 ++guest_hv_clock.version;  /* first time write, random junk */
2247
2248         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2249         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2250                                 &vcpu->hv_clock,
2251                                 sizeof(vcpu->hv_clock.version));
2252
2253         smp_wmb();
2254
2255         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2256         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2257
2258         if (vcpu->pvclock_set_guest_stopped_request) {
2259                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2260                 vcpu->pvclock_set_guest_stopped_request = false;
2261         }
2262
2263         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2264
2265         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2266                                 &vcpu->hv_clock,
2267                                 sizeof(vcpu->hv_clock));
2268
2269         smp_wmb();
2270
2271         vcpu->hv_clock.version++;
2272         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2273                                 &vcpu->hv_clock,
2274                                 sizeof(vcpu->hv_clock.version));
2275 }
2276
2277 static int kvm_guest_time_update(struct kvm_vcpu *v)
2278 {
2279         unsigned long flags, tgt_tsc_khz;
2280         struct kvm_vcpu_arch *vcpu = &v->arch;
2281         struct kvm_arch *ka = &v->kvm->arch;
2282         s64 kernel_ns;
2283         u64 tsc_timestamp, host_tsc;
2284         u8 pvclock_flags;
2285         bool use_master_clock;
2286
2287         kernel_ns = 0;
2288         host_tsc = 0;
2289
2290         /*
2291          * If the host uses TSC clock, then passthrough TSC as stable
2292          * to the guest.
2293          */
2294         spin_lock(&ka->pvclock_gtod_sync_lock);
2295         use_master_clock = ka->use_master_clock;
2296         if (use_master_clock) {
2297                 host_tsc = ka->master_cycle_now;
2298                 kernel_ns = ka->master_kernel_ns;
2299         }
2300         spin_unlock(&ka->pvclock_gtod_sync_lock);
2301
2302         /* Keep irq disabled to prevent changes to the clock */
2303         local_irq_save(flags);
2304         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2305         if (unlikely(tgt_tsc_khz == 0)) {
2306                 local_irq_restore(flags);
2307                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2308                 return 1;
2309         }
2310         if (!use_master_clock) {
2311                 host_tsc = rdtsc();
2312                 kernel_ns = ktime_get_boottime_ns();
2313         }
2314
2315         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2316
2317         /*
2318          * We may have to catch up the TSC to match elapsed wall clock
2319          * time for two reasons, even if kvmclock is used.
2320          *   1) CPU could have been running below the maximum TSC rate
2321          *   2) Broken TSC compensation resets the base at each VCPU
2322          *      entry to avoid unknown leaps of TSC even when running
2323          *      again on the same CPU.  This may cause apparent elapsed
2324          *      time to disappear, and the guest to stand still or run
2325          *      very slowly.
2326          */
2327         if (vcpu->tsc_catchup) {
2328                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2329                 if (tsc > tsc_timestamp) {
2330                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2331                         tsc_timestamp = tsc;
2332                 }
2333         }
2334
2335         local_irq_restore(flags);
2336
2337         /* With all the info we got, fill in the values */
2338
2339         if (kvm_has_tsc_control)
2340                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2341
2342         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2343                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2344                                    &vcpu->hv_clock.tsc_shift,
2345                                    &vcpu->hv_clock.tsc_to_system_mul);
2346                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2347         }
2348
2349         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2350         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2351         vcpu->last_guest_tsc = tsc_timestamp;
2352
2353         /* If the host uses TSC clocksource, then it is stable */
2354         pvclock_flags = 0;
2355         if (use_master_clock)
2356                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2357
2358         vcpu->hv_clock.flags = pvclock_flags;
2359
2360         if (vcpu->pv_time_enabled)
2361                 kvm_setup_pvclock_page(v);
2362         if (v == kvm_get_vcpu(v->kvm, 0))
2363                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2364         return 0;
2365 }
2366
2367 /*
2368  * kvmclock updates which are isolated to a given vcpu, such as
2369  * vcpu->cpu migration, should not allow system_timestamp from
2370  * the rest of the vcpus to remain static. Otherwise ntp frequency
2371  * correction applies to one vcpu's system_timestamp but not
2372  * the others.
2373  *
2374  * So in those cases, request a kvmclock update for all vcpus.
2375  * We need to rate-limit these requests though, as they can
2376  * considerably slow guests that have a large number of vcpus.
2377  * The time for a remote vcpu to update its kvmclock is bound
2378  * by the delay we use to rate-limit the updates.
2379  */
2380
2381 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2382
2383 static void kvmclock_update_fn(struct work_struct *work)
2384 {
2385         int i;
2386         struct delayed_work *dwork = to_delayed_work(work);
2387         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2388                                            kvmclock_update_work);
2389         struct kvm *kvm = container_of(ka, struct kvm, arch);
2390         struct kvm_vcpu *vcpu;
2391
2392         kvm_for_each_vcpu(i, vcpu, kvm) {
2393                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2394                 kvm_vcpu_kick(vcpu);
2395         }
2396 }
2397
2398 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2399 {
2400         struct kvm *kvm = v->kvm;
2401
2402         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2403         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2404                                         KVMCLOCK_UPDATE_DELAY);
2405 }
2406
2407 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2408
2409 static void kvmclock_sync_fn(struct work_struct *work)
2410 {
2411         struct delayed_work *dwork = to_delayed_work(work);
2412         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2413                                            kvmclock_sync_work);
2414         struct kvm *kvm = container_of(ka, struct kvm, arch);
2415
2416         if (!kvmclock_periodic_sync)
2417                 return;
2418
2419         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2420         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2421                                         KVMCLOCK_SYNC_PERIOD);
2422 }
2423
2424 /*
2425  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2426  */
2427 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2428 {
2429         /* McStatusWrEn enabled? */
2430         if (guest_cpuid_is_amd(vcpu))
2431                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2432
2433         return false;
2434 }
2435
2436 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2437 {
2438         u64 mcg_cap = vcpu->arch.mcg_cap;
2439         unsigned bank_num = mcg_cap & 0xff;
2440         u32 msr = msr_info->index;
2441         u64 data = msr_info->data;
2442
2443         switch (msr) {
2444         case MSR_IA32_MCG_STATUS:
2445                 vcpu->arch.mcg_status = data;
2446                 break;
2447         case MSR_IA32_MCG_CTL:
2448                 if (!(mcg_cap & MCG_CTL_P) &&
2449                     (data || !msr_info->host_initiated))
2450                         return 1;
2451                 if (data != 0 && data != ~(u64)0)
2452                         return 1;
2453                 vcpu->arch.mcg_ctl = data;
2454                 break;
2455         default:
2456                 if (msr >= MSR_IA32_MC0_CTL &&
2457                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2458                         u32 offset = msr - MSR_IA32_MC0_CTL;
2459                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2460                          * some Linux kernels though clear bit 10 in bank 4 to
2461                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2462                          * this to avoid an uncatched #GP in the guest
2463                          */
2464                         if ((offset & 0x3) == 0 &&
2465                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2466                                 return -1;
2467
2468                         /* MCi_STATUS */
2469                         if (!msr_info->host_initiated &&
2470                             (offset & 0x3) == 1 && data != 0) {
2471                                 if (!can_set_mci_status(vcpu))
2472                                         return -1;
2473                         }
2474
2475                         vcpu->arch.mce_banks[offset] = data;
2476                         break;
2477                 }
2478                 return 1;
2479         }
2480         return 0;
2481 }
2482
2483 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2484 {
2485         struct kvm *kvm = vcpu->kvm;
2486         int lm = is_long_mode(vcpu);
2487         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2488                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2489         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2490                 : kvm->arch.xen_hvm_config.blob_size_32;
2491         u32 page_num = data & ~PAGE_MASK;
2492         u64 page_addr = data & PAGE_MASK;
2493         u8 *page;
2494         int r;
2495
2496         r = -E2BIG;
2497         if (page_num >= blob_size)
2498                 goto out;
2499         r = -ENOMEM;
2500         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2501         if (IS_ERR(page)) {
2502                 r = PTR_ERR(page);
2503                 goto out;
2504         }
2505         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2506                 goto out_free;
2507         r = 0;
2508 out_free:
2509         kfree(page);
2510 out:
2511         return r;
2512 }
2513
2514 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2515 {
2516         gpa_t gpa = data & ~0x3f;
2517
2518         /* Bits 3:5 are reserved, Should be zero */
2519         if (data & 0x38)
2520                 return 1;
2521
2522         vcpu->arch.apf.msr_val = data;
2523
2524         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2525                 kvm_clear_async_pf_completion_queue(vcpu);
2526                 kvm_async_pf_hash_reset(vcpu);
2527                 return 0;
2528         }
2529
2530         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2531                                         sizeof(u32)))
2532                 return 1;
2533
2534         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2535         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2536         kvm_async_pf_wakeup_all(vcpu);
2537         return 0;
2538 }
2539
2540 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2541 {
2542         vcpu->arch.pv_time_enabled = false;
2543 }
2544
2545 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2546 {
2547         ++vcpu->stat.tlb_flush;
2548         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2549 }
2550
2551 static void record_steal_time(struct kvm_vcpu *vcpu)
2552 {
2553         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2554                 return;
2555
2556         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2557                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2558                 return;
2559
2560         /*
2561          * Doing a TLB flush here, on the guest's behalf, can avoid
2562          * expensive IPIs.
2563          */
2564         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2565                 vcpu->arch.st.steal.preempted & KVM_VCPU_FLUSH_TLB);
2566         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2567                 kvm_vcpu_flush_tlb(vcpu, false);
2568
2569         if (vcpu->arch.st.steal.version & 1)
2570                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2571
2572         vcpu->arch.st.steal.version += 1;
2573
2574         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2575                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2576
2577         smp_wmb();
2578
2579         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2580                 vcpu->arch.st.last_steal;
2581         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2582
2583         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2584                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2585
2586         smp_wmb();
2587
2588         vcpu->arch.st.steal.version += 1;
2589
2590         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2591                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2592 }
2593
2594 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2595 {
2596         bool pr = false;
2597         u32 msr = msr_info->index;
2598         u64 data = msr_info->data;
2599
2600         switch (msr) {
2601         case MSR_AMD64_NB_CFG:
2602         case MSR_IA32_UCODE_WRITE:
2603         case MSR_VM_HSAVE_PA:
2604         case MSR_AMD64_PATCH_LOADER:
2605         case MSR_AMD64_BU_CFG2:
2606         case MSR_AMD64_DC_CFG:
2607         case MSR_F15H_EX_CFG:
2608                 break;
2609
2610         case MSR_IA32_UCODE_REV:
2611                 if (msr_info->host_initiated)
2612                         vcpu->arch.microcode_version = data;
2613                 break;
2614         case MSR_IA32_ARCH_CAPABILITIES:
2615                 if (!msr_info->host_initiated)
2616                         return 1;
2617                 vcpu->arch.arch_capabilities = data;
2618                 break;
2619         case MSR_EFER:
2620                 return set_efer(vcpu, msr_info);
2621         case MSR_K7_HWCR:
2622                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2623                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2624                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2625
2626                 /* Handle McStatusWrEn */
2627                 if (data == BIT_ULL(18)) {
2628                         vcpu->arch.msr_hwcr = data;
2629                 } else if (data != 0) {
2630                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2631                                     data);
2632                         return 1;
2633                 }
2634                 break;
2635         case MSR_FAM10H_MMIO_CONF_BASE:
2636                 if (data != 0) {
2637                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2638                                     "0x%llx\n", data);
2639                         return 1;
2640                 }
2641                 break;
2642         case MSR_IA32_DEBUGCTLMSR:
2643                 if (!data) {
2644                         /* We support the non-activated case already */
2645                         break;
2646                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2647                         /* Values other than LBR and BTF are vendor-specific,
2648                            thus reserved and should throw a #GP */
2649                         return 1;
2650                 }
2651                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2652                             __func__, data);
2653                 break;
2654         case 0x200 ... 0x2ff:
2655                 return kvm_mtrr_set_msr(vcpu, msr, data);
2656         case MSR_IA32_APICBASE:
2657                 return kvm_set_apic_base(vcpu, msr_info);
2658         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2659                 return kvm_x2apic_msr_write(vcpu, msr, data);
2660         case MSR_IA32_TSCDEADLINE:
2661                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2662                 break;
2663         case MSR_IA32_TSC_ADJUST:
2664                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2665                         if (!msr_info->host_initiated) {
2666                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2667                                 adjust_tsc_offset_guest(vcpu, adj);
2668                         }
2669                         vcpu->arch.ia32_tsc_adjust_msr = data;
2670                 }
2671                 break;
2672         case MSR_IA32_MISC_ENABLE:
2673                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2674                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2675                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2676                                 return 1;
2677                         vcpu->arch.ia32_misc_enable_msr = data;
2678                         kvm_update_cpuid(vcpu);
2679                 } else {
2680                         vcpu->arch.ia32_misc_enable_msr = data;
2681                 }
2682                 break;
2683         case MSR_IA32_SMBASE:
2684                 if (!msr_info->host_initiated)
2685                         return 1;
2686                 vcpu->arch.smbase = data;
2687                 break;
2688         case MSR_IA32_POWER_CTL:
2689                 vcpu->arch.msr_ia32_power_ctl = data;
2690                 break;
2691         case MSR_IA32_TSC:
2692                 kvm_write_tsc(vcpu, msr_info);
2693                 break;
2694         case MSR_SMI_COUNT:
2695                 if (!msr_info->host_initiated)
2696                         return 1;
2697                 vcpu->arch.smi_count = data;
2698                 break;
2699         case MSR_KVM_WALL_CLOCK_NEW:
2700         case MSR_KVM_WALL_CLOCK:
2701                 vcpu->kvm->arch.wall_clock = data;
2702                 kvm_write_wall_clock(vcpu->kvm, data);
2703                 break;
2704         case MSR_KVM_SYSTEM_TIME_NEW:
2705         case MSR_KVM_SYSTEM_TIME: {
2706                 struct kvm_arch *ka = &vcpu->kvm->arch;
2707
2708                 kvmclock_reset(vcpu);
2709
2710                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2711                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2712
2713                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2714                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2715
2716                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2717                 }
2718
2719                 vcpu->arch.time = data;
2720                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2721
2722                 /* we verify if the enable bit is set... */
2723                 if (!(data & 1))
2724                         break;
2725
2726                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2727                      &vcpu->arch.pv_time, data & ~1ULL,
2728                      sizeof(struct pvclock_vcpu_time_info)))
2729                         vcpu->arch.pv_time_enabled = false;
2730                 else
2731                         vcpu->arch.pv_time_enabled = true;
2732
2733                 break;
2734         }
2735         case MSR_KVM_ASYNC_PF_EN:
2736                 if (kvm_pv_enable_async_pf(vcpu, data))
2737                         return 1;
2738                 break;
2739         case MSR_KVM_STEAL_TIME:
2740
2741                 if (unlikely(!sched_info_on()))
2742                         return 1;
2743
2744                 if (data & KVM_STEAL_RESERVED_MASK)
2745                         return 1;
2746
2747                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2748                                                 data & KVM_STEAL_VALID_BITS,
2749                                                 sizeof(struct kvm_steal_time)))
2750                         return 1;
2751
2752                 vcpu->arch.st.msr_val = data;
2753
2754                 if (!(data & KVM_MSR_ENABLED))
2755                         break;
2756
2757                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2758
2759                 break;
2760         case MSR_KVM_PV_EOI_EN:
2761                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2762                         return 1;
2763                 break;
2764
2765         case MSR_KVM_POLL_CONTROL:
2766                 /* only enable bit supported */
2767                 if (data & (-1ULL << 1))
2768                         return 1;
2769
2770                 vcpu->arch.msr_kvm_poll_control = data;
2771                 break;
2772
2773         case MSR_IA32_MCG_CTL:
2774         case MSR_IA32_MCG_STATUS:
2775         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2776                 return set_msr_mce(vcpu, msr_info);
2777
2778         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2779         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2780                 pr = true; /* fall through */
2781         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2782         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2783                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2784                         return kvm_pmu_set_msr(vcpu, msr_info);
2785
2786                 if (pr || data != 0)
2787                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2788                                     "0x%x data 0x%llx\n", msr, data);
2789                 break;
2790         case MSR_K7_CLK_CTL:
2791                 /*
2792                  * Ignore all writes to this no longer documented MSR.
2793                  * Writes are only relevant for old K7 processors,
2794                  * all pre-dating SVM, but a recommended workaround from
2795                  * AMD for these chips. It is possible to specify the
2796                  * affected processor models on the command line, hence
2797                  * the need to ignore the workaround.
2798                  */
2799                 break;
2800         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2801         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2802         case HV_X64_MSR_CRASH_CTL:
2803         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2804         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2805         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2806         case HV_X64_MSR_TSC_EMULATION_STATUS:
2807                 return kvm_hv_set_msr_common(vcpu, msr, data,
2808                                              msr_info->host_initiated);
2809         case MSR_IA32_BBL_CR_CTL3:
2810                 /* Drop writes to this legacy MSR -- see rdmsr
2811                  * counterpart for further detail.
2812                  */
2813                 if (report_ignored_msrs)
2814                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2815                                 msr, data);
2816                 break;
2817         case MSR_AMD64_OSVW_ID_LENGTH:
2818                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2819                         return 1;
2820                 vcpu->arch.osvw.length = data;
2821                 break;
2822         case MSR_AMD64_OSVW_STATUS:
2823                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2824                         return 1;
2825                 vcpu->arch.osvw.status = data;
2826                 break;
2827         case MSR_PLATFORM_INFO:
2828                 if (!msr_info->host_initiated ||
2829                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2830                      cpuid_fault_enabled(vcpu)))
2831                         return 1;
2832                 vcpu->arch.msr_platform_info = data;
2833                 break;
2834         case MSR_MISC_FEATURES_ENABLES:
2835                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2836                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2837                      !supports_cpuid_fault(vcpu)))
2838                         return 1;
2839                 vcpu->arch.msr_misc_features_enables = data;
2840                 break;
2841         default:
2842                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2843                         return xen_hvm_config(vcpu, data);
2844                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2845                         return kvm_pmu_set_msr(vcpu, msr_info);
2846                 if (!ignore_msrs) {
2847                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2848                                     msr, data);
2849                         return 1;
2850                 } else {
2851                         if (report_ignored_msrs)
2852                                 vcpu_unimpl(vcpu,
2853                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2854                                         msr, data);
2855                         break;
2856                 }
2857         }
2858         return 0;
2859 }
2860 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2861
2862 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2863 {
2864         u64 data;
2865         u64 mcg_cap = vcpu->arch.mcg_cap;
2866         unsigned bank_num = mcg_cap & 0xff;
2867
2868         switch (msr) {
2869         case MSR_IA32_P5_MC_ADDR:
2870         case MSR_IA32_P5_MC_TYPE:
2871                 data = 0;
2872                 break;
2873         case MSR_IA32_MCG_CAP:
2874                 data = vcpu->arch.mcg_cap;
2875                 break;
2876         case MSR_IA32_MCG_CTL:
2877                 if (!(mcg_cap & MCG_CTL_P) && !host)
2878                         return 1;
2879                 data = vcpu->arch.mcg_ctl;
2880                 break;
2881         case MSR_IA32_MCG_STATUS:
2882                 data = vcpu->arch.mcg_status;
2883                 break;
2884         default:
2885                 if (msr >= MSR_IA32_MC0_CTL &&
2886                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2887                         u32 offset = msr - MSR_IA32_MC0_CTL;
2888                         data = vcpu->arch.mce_banks[offset];
2889                         break;
2890                 }
2891                 return 1;
2892         }
2893         *pdata = data;
2894         return 0;
2895 }
2896
2897 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2898 {
2899         switch (msr_info->index) {
2900         case MSR_IA32_PLATFORM_ID:
2901         case MSR_IA32_EBL_CR_POWERON:
2902         case MSR_IA32_DEBUGCTLMSR:
2903         case MSR_IA32_LASTBRANCHFROMIP:
2904         case MSR_IA32_LASTBRANCHTOIP:
2905         case MSR_IA32_LASTINTFROMIP:
2906         case MSR_IA32_LASTINTTOIP:
2907         case MSR_K8_SYSCFG:
2908         case MSR_K8_TSEG_ADDR:
2909         case MSR_K8_TSEG_MASK:
2910         case MSR_VM_HSAVE_PA:
2911         case MSR_K8_INT_PENDING_MSG:
2912         case MSR_AMD64_NB_CFG:
2913         case MSR_FAM10H_MMIO_CONF_BASE:
2914         case MSR_AMD64_BU_CFG2:
2915         case MSR_IA32_PERF_CTL:
2916         case MSR_AMD64_DC_CFG:
2917         case MSR_F15H_EX_CFG:
2918                 msr_info->data = 0;
2919                 break;
2920         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2921         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2922         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2923         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2924         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2925                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2926                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2927                 msr_info->data = 0;
2928                 break;
2929         case MSR_IA32_UCODE_REV:
2930                 msr_info->data = vcpu->arch.microcode_version;
2931                 break;
2932         case MSR_IA32_ARCH_CAPABILITIES:
2933                 if (!msr_info->host_initiated &&
2934                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2935                         return 1;
2936                 msr_info->data = vcpu->arch.arch_capabilities;
2937                 break;
2938         case MSR_IA32_POWER_CTL:
2939                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2940                 break;
2941         case MSR_IA32_TSC:
2942                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2943                 break;
2944         case MSR_MTRRcap:
2945         case 0x200 ... 0x2ff:
2946                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2947         case 0xcd: /* fsb frequency */
2948                 msr_info->data = 3;
2949                 break;
2950                 /*
2951                  * MSR_EBC_FREQUENCY_ID
2952                  * Conservative value valid for even the basic CPU models.
2953                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2954                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2955                  * and 266MHz for model 3, or 4. Set Core Clock
2956                  * Frequency to System Bus Frequency Ratio to 1 (bits
2957                  * 31:24) even though these are only valid for CPU
2958                  * models > 2, however guests may end up dividing or
2959                  * multiplying by zero otherwise.
2960                  */
2961         case MSR_EBC_FREQUENCY_ID:
2962                 msr_info->data = 1 << 24;
2963                 break;
2964         case MSR_IA32_APICBASE:
2965                 msr_info->data = kvm_get_apic_base(vcpu);
2966                 break;
2967         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2968                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2969                 break;
2970         case MSR_IA32_TSCDEADLINE:
2971                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2972                 break;
2973         case MSR_IA32_TSC_ADJUST:
2974                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2975                 break;
2976         case MSR_IA32_MISC_ENABLE:
2977                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2978                 break;
2979         case MSR_IA32_SMBASE:
2980                 if (!msr_info->host_initiated)
2981                         return 1;
2982                 msr_info->data = vcpu->arch.smbase;
2983                 break;
2984         case MSR_SMI_COUNT:
2985                 msr_info->data = vcpu->arch.smi_count;
2986                 break;
2987         case MSR_IA32_PERF_STATUS:
2988                 /* TSC increment by tick */
2989                 msr_info->data = 1000ULL;
2990                 /* CPU multiplier */
2991                 msr_info->data |= (((uint64_t)4ULL) << 40);
2992                 break;
2993         case MSR_EFER:
2994                 msr_info->data = vcpu->arch.efer;
2995                 break;
2996         case MSR_KVM_WALL_CLOCK:
2997         case MSR_KVM_WALL_CLOCK_NEW:
2998                 msr_info->data = vcpu->kvm->arch.wall_clock;
2999                 break;
3000         case MSR_KVM_SYSTEM_TIME:
3001         case MSR_KVM_SYSTEM_TIME_NEW:
3002                 msr_info->data = vcpu->arch.time;
3003                 break;
3004         case MSR_KVM_ASYNC_PF_EN:
3005                 msr_info->data = vcpu->arch.apf.msr_val;
3006                 break;
3007         case MSR_KVM_STEAL_TIME:
3008                 msr_info->data = vcpu->arch.st.msr_val;
3009                 break;
3010         case MSR_KVM_PV_EOI_EN:
3011                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3012                 break;
3013         case MSR_KVM_POLL_CONTROL:
3014                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3015                 break;
3016         case MSR_IA32_P5_MC_ADDR:
3017         case MSR_IA32_P5_MC_TYPE:
3018         case MSR_IA32_MCG_CAP:
3019         case MSR_IA32_MCG_CTL:
3020         case MSR_IA32_MCG_STATUS:
3021         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3022                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3023                                    msr_info->host_initiated);
3024         case MSR_K7_CLK_CTL:
3025                 /*
3026                  * Provide expected ramp-up count for K7. All other
3027                  * are set to zero, indicating minimum divisors for
3028                  * every field.
3029                  *
3030                  * This prevents guest kernels on AMD host with CPU
3031                  * type 6, model 8 and higher from exploding due to
3032                  * the rdmsr failing.
3033                  */
3034                 msr_info->data = 0x20000000;
3035                 break;
3036         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3037         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3038         case HV_X64_MSR_CRASH_CTL:
3039         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3040         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3041         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3042         case HV_X64_MSR_TSC_EMULATION_STATUS:
3043                 return kvm_hv_get_msr_common(vcpu,
3044                                              msr_info->index, &msr_info->data,
3045                                              msr_info->host_initiated);
3046                 break;
3047         case MSR_IA32_BBL_CR_CTL3:
3048                 /* This legacy MSR exists but isn't fully documented in current
3049                  * silicon.  It is however accessed by winxp in very narrow
3050                  * scenarios where it sets bit #19, itself documented as
3051                  * a "reserved" bit.  Best effort attempt to source coherent
3052                  * read data here should the balance of the register be
3053                  * interpreted by the guest:
3054                  *
3055                  * L2 cache control register 3: 64GB range, 256KB size,
3056                  * enabled, latency 0x1, configured
3057                  */
3058                 msr_info->data = 0xbe702111;
3059                 break;
3060         case MSR_AMD64_OSVW_ID_LENGTH:
3061                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3062                         return 1;
3063                 msr_info->data = vcpu->arch.osvw.length;
3064                 break;
3065         case MSR_AMD64_OSVW_STATUS:
3066                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3067                         return 1;
3068                 msr_info->data = vcpu->arch.osvw.status;
3069                 break;
3070         case MSR_PLATFORM_INFO:
3071                 if (!msr_info->host_initiated &&
3072                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3073                         return 1;
3074                 msr_info->data = vcpu->arch.msr_platform_info;
3075                 break;
3076         case MSR_MISC_FEATURES_ENABLES:
3077                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3078                 break;
3079         case MSR_K7_HWCR:
3080                 msr_info->data = vcpu->arch.msr_hwcr;
3081                 break;
3082         default:
3083                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3084                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3085                 if (!ignore_msrs) {
3086                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
3087                                                msr_info->index);
3088                         return 1;
3089                 } else {
3090                         if (report_ignored_msrs)
3091                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3092                                         msr_info->index);
3093                         msr_info->data = 0;
3094                 }
3095                 break;
3096         }
3097         return 0;
3098 }
3099 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3100
3101 /*
3102  * Read or write a bunch of msrs. All parameters are kernel addresses.
3103  *
3104  * @return number of msrs set successfully.
3105  */
3106 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3107                     struct kvm_msr_entry *entries,
3108                     int (*do_msr)(struct kvm_vcpu *vcpu,
3109                                   unsigned index, u64 *data))
3110 {
3111         int i;
3112
3113         for (i = 0; i < msrs->nmsrs; ++i)
3114                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3115                         break;
3116
3117         return i;
3118 }
3119
3120 /*
3121  * Read or write a bunch of msrs. Parameters are user addresses.
3122  *
3123  * @return number of msrs set successfully.
3124  */
3125 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3126                   int (*do_msr)(struct kvm_vcpu *vcpu,
3127                                 unsigned index, u64 *data),
3128                   int writeback)
3129 {
3130         struct kvm_msrs msrs;
3131         struct kvm_msr_entry *entries;
3132         int r, n;
3133         unsigned size;
3134
3135         r = -EFAULT;
3136         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3137                 goto out;
3138
3139         r = -E2BIG;
3140         if (msrs.nmsrs >= MAX_IO_MSRS)
3141                 goto out;
3142
3143         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3144         entries = memdup_user(user_msrs->entries, size);
3145         if (IS_ERR(entries)) {
3146                 r = PTR_ERR(entries);
3147                 goto out;
3148         }
3149
3150         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3151         if (r < 0)
3152                 goto out_free;
3153
3154         r = -EFAULT;
3155         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3156                 goto out_free;
3157
3158         r = n;
3159
3160 out_free:
3161         kfree(entries);
3162 out:
3163         return r;
3164 }
3165
3166 static inline bool kvm_can_mwait_in_guest(void)
3167 {
3168         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3169                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3170                 boot_cpu_has(X86_FEATURE_ARAT);
3171 }
3172
3173 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3174 {
3175         int r = 0;
3176
3177         switch (ext) {
3178         case KVM_CAP_IRQCHIP:
3179         case KVM_CAP_HLT:
3180         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3181         case KVM_CAP_SET_TSS_ADDR:
3182         case KVM_CAP_EXT_CPUID:
3183         case KVM_CAP_EXT_EMUL_CPUID:
3184         case KVM_CAP_CLOCKSOURCE:
3185         case KVM_CAP_PIT:
3186         case KVM_CAP_NOP_IO_DELAY:
3187         case KVM_CAP_MP_STATE:
3188         case KVM_CAP_SYNC_MMU:
3189         case KVM_CAP_USER_NMI:
3190         case KVM_CAP_REINJECT_CONTROL:
3191         case KVM_CAP_IRQ_INJECT_STATUS:
3192         case KVM_CAP_IOEVENTFD:
3193         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3194         case KVM_CAP_PIT2:
3195         case KVM_CAP_PIT_STATE2:
3196         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3197         case KVM_CAP_XEN_HVM:
3198         case KVM_CAP_VCPU_EVENTS:
3199         case KVM_CAP_HYPERV:
3200         case KVM_CAP_HYPERV_VAPIC:
3201         case KVM_CAP_HYPERV_SPIN:
3202         case KVM_CAP_HYPERV_SYNIC:
3203         case KVM_CAP_HYPERV_SYNIC2:
3204         case KVM_CAP_HYPERV_VP_INDEX:
3205         case KVM_CAP_HYPERV_EVENTFD:
3206         case KVM_CAP_HYPERV_TLBFLUSH:
3207         case KVM_CAP_HYPERV_SEND_IPI:
3208         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3209         case KVM_CAP_HYPERV_CPUID:
3210         case KVM_CAP_PCI_SEGMENT:
3211         case KVM_CAP_DEBUGREGS:
3212         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3213         case KVM_CAP_XSAVE:
3214         case KVM_CAP_ASYNC_PF:
3215         case KVM_CAP_GET_TSC_KHZ:
3216         case KVM_CAP_KVMCLOCK_CTRL:
3217         case KVM_CAP_READONLY_MEM:
3218         case KVM_CAP_HYPERV_TIME:
3219         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3220         case KVM_CAP_TSC_DEADLINE_TIMER:
3221         case KVM_CAP_DISABLE_QUIRKS:
3222         case KVM_CAP_SET_BOOT_CPU_ID:
3223         case KVM_CAP_SPLIT_IRQCHIP:
3224         case KVM_CAP_IMMEDIATE_EXIT:
3225         case KVM_CAP_PMU_EVENT_FILTER:
3226         case KVM_CAP_GET_MSR_FEATURES:
3227         case KVM_CAP_MSR_PLATFORM_INFO:
3228         case KVM_CAP_EXCEPTION_PAYLOAD:
3229                 r = 1;
3230                 break;
3231         case KVM_CAP_SYNC_REGS:
3232                 r = KVM_SYNC_X86_VALID_FIELDS;
3233                 break;
3234         case KVM_CAP_ADJUST_CLOCK:
3235                 r = KVM_CLOCK_TSC_STABLE;
3236                 break;
3237         case KVM_CAP_X86_DISABLE_EXITS:
3238                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3239                       KVM_X86_DISABLE_EXITS_CSTATE;
3240                 if(kvm_can_mwait_in_guest())
3241                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3242                 break;
3243         case KVM_CAP_X86_SMM:
3244                 /* SMBASE is usually relocated above 1M on modern chipsets,
3245                  * and SMM handlers might indeed rely on 4G segment limits,
3246                  * so do not report SMM to be available if real mode is
3247                  * emulated via vm86 mode.  Still, do not go to great lengths
3248                  * to avoid userspace's usage of the feature, because it is a
3249                  * fringe case that is not enabled except via specific settings
3250                  * of the module parameters.
3251                  */
3252                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3253                 break;
3254         case KVM_CAP_VAPIC:
3255                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3256                 break;
3257         case KVM_CAP_NR_VCPUS:
3258                 r = KVM_SOFT_MAX_VCPUS;
3259                 break;
3260         case KVM_CAP_MAX_VCPUS:
3261                 r = KVM_MAX_VCPUS;
3262                 break;
3263         case KVM_CAP_MAX_VCPU_ID:
3264                 r = KVM_MAX_VCPU_ID;
3265                 break;
3266         case KVM_CAP_PV_MMU:    /* obsolete */
3267                 r = 0;
3268                 break;
3269         case KVM_CAP_MCE:
3270                 r = KVM_MAX_MCE_BANKS;
3271                 break;
3272         case KVM_CAP_XCRS:
3273                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3274                 break;
3275         case KVM_CAP_TSC_CONTROL:
3276                 r = kvm_has_tsc_control;
3277                 break;
3278         case KVM_CAP_X2APIC_API:
3279                 r = KVM_X2APIC_API_VALID_FLAGS;
3280                 break;
3281         case KVM_CAP_NESTED_STATE:
3282                 r = kvm_x86_ops->get_nested_state ?
3283                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3284                 break;
3285         default:
3286                 break;
3287         }
3288         return r;
3289
3290 }
3291
3292 long kvm_arch_dev_ioctl(struct file *filp,
3293                         unsigned int ioctl, unsigned long arg)
3294 {
3295         void __user *argp = (void __user *)arg;
3296         long r;
3297
3298         switch (ioctl) {
3299         case KVM_GET_MSR_INDEX_LIST: {
3300                 struct kvm_msr_list __user *user_msr_list = argp;
3301                 struct kvm_msr_list msr_list;
3302                 unsigned n;
3303
3304                 r = -EFAULT;
3305                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3306                         goto out;
3307                 n = msr_list.nmsrs;
3308                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3309                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3310                         goto out;
3311                 r = -E2BIG;
3312                 if (n < msr_list.nmsrs)
3313                         goto out;
3314                 r = -EFAULT;
3315                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3316                                  num_msrs_to_save * sizeof(u32)))
3317                         goto out;
3318                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3319                                  &emulated_msrs,
3320                                  num_emulated_msrs * sizeof(u32)))
3321                         goto out;
3322                 r = 0;
3323                 break;
3324         }
3325         case KVM_GET_SUPPORTED_CPUID:
3326         case KVM_GET_EMULATED_CPUID: {
3327                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3328                 struct kvm_cpuid2 cpuid;
3329
3330                 r = -EFAULT;
3331                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3332                         goto out;
3333
3334                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3335                                             ioctl);
3336                 if (r)
3337                         goto out;
3338
3339                 r = -EFAULT;
3340                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3341                         goto out;
3342                 r = 0;
3343                 break;
3344         }
3345         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3346                 r = -EFAULT;
3347                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3348                                  sizeof(kvm_mce_cap_supported)))
3349                         goto out;
3350                 r = 0;
3351                 break;
3352         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3353                 struct kvm_msr_list __user *user_msr_list = argp;
3354                 struct kvm_msr_list msr_list;
3355                 unsigned int n;
3356
3357                 r = -EFAULT;
3358                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3359                         goto out;
3360                 n = msr_list.nmsrs;
3361                 msr_list.nmsrs = num_msr_based_features;
3362                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3363                         goto out;
3364                 r = -E2BIG;
3365                 if (n < msr_list.nmsrs)
3366                         goto out;
3367                 r = -EFAULT;
3368                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3369                                  num_msr_based_features * sizeof(u32)))
3370                         goto out;
3371                 r = 0;
3372                 break;
3373         }
3374         case KVM_GET_MSRS:
3375                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3376                 break;
3377         }
3378         default:
3379                 r = -EINVAL;
3380         }
3381 out:
3382         return r;
3383 }
3384
3385 static void wbinvd_ipi(void *garbage)
3386 {
3387         wbinvd();
3388 }
3389
3390 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3391 {
3392         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3393 }
3394
3395 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3396 {
3397         /* Address WBINVD may be executed by guest */
3398         if (need_emulate_wbinvd(vcpu)) {
3399                 if (kvm_x86_ops->has_wbinvd_exit())
3400                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3401                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3402                         smp_call_function_single(vcpu->cpu,
3403                                         wbinvd_ipi, NULL, 1);
3404         }
3405
3406         kvm_x86_ops->vcpu_load(vcpu, cpu);
3407
3408         fpregs_assert_state_consistent();
3409         if (test_thread_flag(TIF_NEED_FPU_LOAD))
3410                 switch_fpu_return();
3411
3412         /* Apply any externally detected TSC adjustments (due to suspend) */
3413         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3414                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3415                 vcpu->arch.tsc_offset_adjustment = 0;
3416                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3417         }
3418
3419         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3420                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3421                                 rdtsc() - vcpu->arch.last_host_tsc;
3422                 if (tsc_delta < 0)
3423                         mark_tsc_unstable("KVM discovered backwards TSC");
3424
3425                 if (kvm_check_tsc_unstable()) {
3426                         u64 offset = kvm_compute_tsc_offset(vcpu,
3427                                                 vcpu->arch.last_guest_tsc);
3428                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3429                         vcpu->arch.tsc_catchup = 1;
3430                 }
3431
3432                 if (kvm_lapic_hv_timer_in_use(vcpu))
3433                         kvm_lapic_restart_hv_timer(vcpu);
3434
3435                 /*
3436                  * On a host with synchronized TSC, there is no need to update
3437                  * kvmclock on vcpu->cpu migration
3438                  */
3439                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3440                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3441                 if (vcpu->cpu != cpu)
3442                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3443                 vcpu->cpu = cpu;
3444         }
3445
3446         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3447 }
3448
3449 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3450 {
3451         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3452                 return;
3453
3454         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3455
3456         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3457                         &vcpu->arch.st.steal.preempted,
3458                         offsetof(struct kvm_steal_time, preempted),
3459                         sizeof(vcpu->arch.st.steal.preempted));
3460 }
3461
3462 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3463 {
3464         int idx;
3465
3466         if (vcpu->preempted)
3467                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3468
3469         /*
3470          * Disable page faults because we're in atomic context here.
3471          * kvm_write_guest_offset_cached() would call might_fault()
3472          * that relies on pagefault_disable() to tell if there's a
3473          * bug. NOTE: the write to guest memory may not go through if
3474          * during postcopy live migration or if there's heavy guest
3475          * paging.
3476          */
3477         pagefault_disable();
3478         /*
3479          * kvm_memslots() will be called by
3480          * kvm_write_guest_offset_cached() so take the srcu lock.
3481          */
3482         idx = srcu_read_lock(&vcpu->kvm->srcu);
3483         kvm_steal_time_set_preempted(vcpu);
3484         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3485         pagefault_enable();
3486         kvm_x86_ops->vcpu_put(vcpu);
3487         vcpu->arch.last_host_tsc = rdtsc();
3488         /*
3489          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3490          * on every vmexit, but if not, we might have a stale dr6 from the
3491          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3492          */
3493         set_debugreg(0, 6);
3494 }
3495
3496 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3497                                     struct kvm_lapic_state *s)
3498 {
3499         if (vcpu->arch.apicv_active)
3500                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3501
3502         return kvm_apic_get_state(vcpu, s);
3503 }
3504
3505 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3506                                     struct kvm_lapic_state *s)
3507 {
3508         int r;
3509
3510         r = kvm_apic_set_state(vcpu, s);
3511         if (r)
3512                 return r;
3513         update_cr8_intercept(vcpu);
3514
3515         return 0;
3516 }
3517
3518 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3519 {
3520         return (!lapic_in_kernel(vcpu) ||
3521                 kvm_apic_accept_pic_intr(vcpu));
3522 }
3523
3524 /*
3525  * if userspace requested an interrupt window, check that the
3526  * interrupt window is open.
3527  *
3528  * No need to exit to userspace if we already have an interrupt queued.
3529  */
3530 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3531 {
3532         return kvm_arch_interrupt_allowed(vcpu) &&
3533                 !kvm_cpu_has_interrupt(vcpu) &&
3534                 !kvm_event_needs_reinjection(vcpu) &&
3535                 kvm_cpu_accept_dm_intr(vcpu);
3536 }
3537
3538 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3539                                     struct kvm_interrupt *irq)
3540 {
3541         if (irq->irq >= KVM_NR_INTERRUPTS)
3542                 return -EINVAL;
3543
3544         if (!irqchip_in_kernel(vcpu->kvm)) {
3545                 kvm_queue_interrupt(vcpu, irq->irq, false);
3546                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3547                 return 0;
3548         }
3549
3550         /*
3551          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3552          * fail for in-kernel 8259.
3553          */
3554         if (pic_in_kernel(vcpu->kvm))
3555                 return -ENXIO;
3556
3557         if (vcpu->arch.pending_external_vector != -1)
3558                 return -EEXIST;
3559
3560         vcpu->arch.pending_external_vector = irq->irq;
3561         kvm_make_request(KVM_REQ_EVENT, vcpu);
3562         return 0;
3563 }
3564
3565 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3566 {
3567         kvm_inject_nmi(vcpu);
3568
3569         return 0;
3570 }
3571
3572 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3573 {
3574         kvm_make_request(KVM_REQ_SMI, vcpu);
3575
3576         return 0;
3577 }
3578
3579 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3580                                            struct kvm_tpr_access_ctl *tac)
3581 {
3582         if (tac->flags)
3583                 return -EINVAL;
3584         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3585         return 0;
3586 }
3587
3588 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3589                                         u64 mcg_cap)
3590 {
3591         int r;
3592         unsigned bank_num = mcg_cap & 0xff, bank;
3593
3594         r = -EINVAL;
3595         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3596                 goto out;
3597         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3598                 goto out;
3599         r = 0;
3600         vcpu->arch.mcg_cap = mcg_cap;
3601         /* Init IA32_MCG_CTL to all 1s */
3602         if (mcg_cap & MCG_CTL_P)
3603                 vcpu->arch.mcg_ctl = ~(u64)0;
3604         /* Init IA32_MCi_CTL to all 1s */
3605         for (bank = 0; bank < bank_num; bank++)
3606                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3607
3608         kvm_x86_ops->setup_mce(vcpu);
3609 out:
3610         return r;
3611 }
3612
3613 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3614                                       struct kvm_x86_mce *mce)
3615 {
3616         u64 mcg_cap = vcpu->arch.mcg_cap;
3617         unsigned bank_num = mcg_cap & 0xff;
3618         u64 *banks = vcpu->arch.mce_banks;
3619
3620         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3621                 return -EINVAL;
3622         /*
3623          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3624          * reporting is disabled
3625          */
3626         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3627             vcpu->arch.mcg_ctl != ~(u64)0)
3628                 return 0;
3629         banks += 4 * mce->bank;
3630         /*
3631          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3632          * reporting is disabled for the bank
3633          */
3634         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3635                 return 0;
3636         if (mce->status & MCI_STATUS_UC) {
3637                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3638                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3639                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3640                         return 0;
3641                 }
3642                 if (banks[1] & MCI_STATUS_VAL)
3643                         mce->status |= MCI_STATUS_OVER;
3644                 banks[2] = mce->addr;
3645                 banks[3] = mce->misc;
3646                 vcpu->arch.mcg_status = mce->mcg_status;
3647                 banks[1] = mce->status;
3648                 kvm_queue_exception(vcpu, MC_VECTOR);
3649         } else if (!(banks[1] & MCI_STATUS_VAL)
3650                    || !(banks[1] & MCI_STATUS_UC)) {
3651                 if (banks[1] & MCI_STATUS_VAL)
3652                         mce->status |= MCI_STATUS_OVER;
3653                 banks[2] = mce->addr;
3654                 banks[3] = mce->misc;
3655                 banks[1] = mce->status;
3656         } else
3657                 banks[1] |= MCI_STATUS_OVER;
3658         return 0;
3659 }
3660
3661 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3662                                                struct kvm_vcpu_events *events)
3663 {
3664         process_nmi(vcpu);
3665
3666         /*
3667          * The API doesn't provide the instruction length for software
3668          * exceptions, so don't report them. As long as the guest RIP
3669          * isn't advanced, we should expect to encounter the exception
3670          * again.
3671          */
3672         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3673                 events->exception.injected = 0;
3674                 events->exception.pending = 0;
3675         } else {
3676                 events->exception.injected = vcpu->arch.exception.injected;
3677                 events->exception.pending = vcpu->arch.exception.pending;
3678                 /*
3679                  * For ABI compatibility, deliberately conflate
3680                  * pending and injected exceptions when
3681                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3682                  */
3683                 if (!vcpu->kvm->arch.exception_payload_enabled)
3684                         events->exception.injected |=
3685                                 vcpu->arch.exception.pending;
3686         }
3687         events->exception.nr = vcpu->arch.exception.nr;
3688         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3689         events->exception.error_code = vcpu->arch.exception.error_code;
3690         events->exception_has_payload = vcpu->arch.exception.has_payload;
3691         events->exception_payload = vcpu->arch.exception.payload;
3692
3693         events->interrupt.injected =
3694                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3695         events->interrupt.nr = vcpu->arch.interrupt.nr;
3696         events->interrupt.soft = 0;
3697         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3698
3699         events->nmi.injected = vcpu->arch.nmi_injected;
3700         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3701         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3702         events->nmi.pad = 0;
3703
3704         events->sipi_vector = 0; /* never valid when reporting to user space */
3705
3706         events->smi.smm = is_smm(vcpu);
3707         events->smi.pending = vcpu->arch.smi_pending;
3708         events->smi.smm_inside_nmi =
3709                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3710         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3711
3712         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3713                          | KVM_VCPUEVENT_VALID_SHADOW
3714                          | KVM_VCPUEVENT_VALID_SMM);
3715         if (vcpu->kvm->arch.exception_payload_enabled)
3716                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3717
3718         memset(&events->reserved, 0, sizeof(events->reserved));
3719 }
3720
3721 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3722
3723 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3724                                               struct kvm_vcpu_events *events)
3725 {
3726         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3727                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3728                               | KVM_VCPUEVENT_VALID_SHADOW
3729                               | KVM_VCPUEVENT_VALID_SMM
3730                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3731                 return -EINVAL;
3732
3733         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3734                 if (!vcpu->kvm->arch.exception_payload_enabled)
3735                         return -EINVAL;
3736                 if (events->exception.pending)
3737                         events->exception.injected = 0;
3738                 else
3739                         events->exception_has_payload = 0;
3740         } else {
3741                 events->exception.pending = 0;
3742                 events->exception_has_payload = 0;
3743         }
3744
3745         if ((events->exception.injected || events->exception.pending) &&
3746             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3747                 return -EINVAL;
3748
3749         /* INITs are latched while in SMM */
3750         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3751             (events->smi.smm || events->smi.pending) &&
3752             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3753                 return -EINVAL;
3754
3755         process_nmi(vcpu);
3756         vcpu->arch.exception.injected = events->exception.injected;
3757         vcpu->arch.exception.pending = events->exception.pending;
3758         vcpu->arch.exception.nr = events->exception.nr;
3759         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3760         vcpu->arch.exception.error_code = events->exception.error_code;
3761         vcpu->arch.exception.has_payload = events->exception_has_payload;
3762         vcpu->arch.exception.payload = events->exception_payload;
3763
3764         vcpu->arch.interrupt.injected = events->interrupt.injected;
3765         vcpu->arch.interrupt.nr = events->interrupt.nr;
3766         vcpu->arch.interrupt.soft = events->interrupt.soft;
3767         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3768                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3769                                                   events->interrupt.shadow);
3770
3771         vcpu->arch.nmi_injected = events->nmi.injected;
3772         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3773                 vcpu->arch.nmi_pending = events->nmi.pending;
3774         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3775
3776         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3777             lapic_in_kernel(vcpu))
3778                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3779
3780         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3781                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3782                         if (events->smi.smm)
3783                                 vcpu->arch.hflags |= HF_SMM_MASK;
3784                         else
3785                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3786                         kvm_smm_changed(vcpu);
3787                 }
3788
3789                 vcpu->arch.smi_pending = events->smi.pending;
3790
3791                 if (events->smi.smm) {
3792                         if (events->smi.smm_inside_nmi)
3793                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3794                         else
3795                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3796                         if (lapic_in_kernel(vcpu)) {
3797                                 if (events->smi.latched_init)
3798                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3799                                 else
3800                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3801                         }
3802                 }
3803         }
3804
3805         kvm_make_request(KVM_REQ_EVENT, vcpu);
3806
3807         return 0;
3808 }
3809
3810 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3811                                              struct kvm_debugregs *dbgregs)
3812 {
3813         unsigned long val;
3814
3815         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3816         kvm_get_dr(vcpu, 6, &val);
3817         dbgregs->dr6 = val;
3818         dbgregs->dr7 = vcpu->arch.dr7;
3819         dbgregs->flags = 0;
3820         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3821 }
3822
3823 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3824                                             struct kvm_debugregs *dbgregs)
3825 {
3826         if (dbgregs->flags)
3827                 return -EINVAL;
3828
3829         if (dbgregs->dr6 & ~0xffffffffull)
3830                 return -EINVAL;
3831         if (dbgregs->dr7 & ~0xffffffffull)
3832                 return -EINVAL;
3833
3834         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3835         kvm_update_dr0123(vcpu);
3836         vcpu->arch.dr6 = dbgregs->dr6;
3837         kvm_update_dr6(vcpu);
3838         vcpu->arch.dr7 = dbgregs->dr7;
3839         kvm_update_dr7(vcpu);
3840
3841         return 0;
3842 }
3843
3844 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3845
3846 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3847 {
3848         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3849         u64 xstate_bv = xsave->header.xfeatures;
3850         u64 valid;
3851
3852         /*
3853          * Copy legacy XSAVE area, to avoid complications with CPUID
3854          * leaves 0 and 1 in the loop below.
3855          */
3856         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3857
3858         /* Set XSTATE_BV */
3859         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3860         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3861
3862         /*
3863          * Copy each region from the possibly compacted offset to the
3864          * non-compacted offset.
3865          */
3866         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3867         while (valid) {
3868                 u64 xfeature_mask = valid & -valid;
3869                 int xfeature_nr = fls64(xfeature_mask) - 1;
3870                 void *src = get_xsave_addr(xsave, xfeature_nr);
3871
3872                 if (src) {
3873                         u32 size, offset, ecx, edx;
3874                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3875                                     &size, &offset, &ecx, &edx);
3876                         if (xfeature_nr == XFEATURE_PKRU)
3877                                 memcpy(dest + offset, &vcpu->arch.pkru,
3878                                        sizeof(vcpu->arch.pkru));
3879                         else
3880                                 memcpy(dest + offset, src, size);
3881
3882                 }
3883
3884                 valid -= xfeature_mask;
3885         }
3886 }
3887
3888 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3889 {
3890         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3891         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3892         u64 valid;
3893
3894         /*
3895          * Copy legacy XSAVE area, to avoid complications with CPUID
3896          * leaves 0 and 1 in the loop below.
3897          */
3898         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3899
3900         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3901         xsave->header.xfeatures = xstate_bv;
3902         if (boot_cpu_has(X86_FEATURE_XSAVES))
3903                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3904
3905         /*
3906          * Copy each region from the non-compacted offset to the
3907          * possibly compacted offset.
3908          */
3909         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3910         while (valid) {
3911                 u64 xfeature_mask = valid & -valid;
3912                 int xfeature_nr = fls64(xfeature_mask) - 1;
3913                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3914
3915                 if (dest) {
3916                         u32 size, offset, ecx, edx;
3917                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3918                                     &size, &offset, &ecx, &edx);
3919                         if (xfeature_nr == XFEATURE_PKRU)
3920                                 memcpy(&vcpu->arch.pkru, src + offset,
3921                                        sizeof(vcpu->arch.pkru));
3922                         else
3923                                 memcpy(dest, src + offset, size);
3924                 }
3925
3926                 valid -= xfeature_mask;
3927         }
3928 }
3929
3930 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3931                                          struct kvm_xsave *guest_xsave)
3932 {
3933         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3934                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3935                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3936         } else {
3937                 memcpy(guest_xsave->region,
3938                         &vcpu->arch.guest_fpu->state.fxsave,
3939                         sizeof(struct fxregs_state));
3940                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3941                         XFEATURE_MASK_FPSSE;
3942         }
3943 }
3944
3945 #define XSAVE_MXCSR_OFFSET 24
3946
3947 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3948                                         struct kvm_xsave *guest_xsave)
3949 {
3950         u64 xstate_bv =
3951                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3952         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3953
3954         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3955                 /*
3956                  * Here we allow setting states that are not present in
3957                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3958                  * with old userspace.
3959                  */
3960                 if (xstate_bv & ~kvm_supported_xcr0() ||
3961                         mxcsr & ~mxcsr_feature_mask)
3962                         return -EINVAL;
3963                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3964         } else {
3965                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3966                         mxcsr & ~mxcsr_feature_mask)
3967                         return -EINVAL;
3968                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3969                         guest_xsave->region, sizeof(struct fxregs_state));
3970         }
3971         return 0;
3972 }
3973
3974 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3975                                         struct kvm_xcrs *guest_xcrs)
3976 {
3977         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3978                 guest_xcrs->nr_xcrs = 0;
3979                 return;
3980         }
3981
3982         guest_xcrs->nr_xcrs = 1;
3983         guest_xcrs->flags = 0;
3984         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3985         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3986 }
3987
3988 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3989                                        struct kvm_xcrs *guest_xcrs)
3990 {
3991         int i, r = 0;
3992
3993         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3994                 return -EINVAL;
3995
3996         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3997                 return -EINVAL;
3998
3999         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4000                 /* Only support XCR0 currently */
4001                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4002                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4003                                 guest_xcrs->xcrs[i].value);
4004                         break;
4005                 }
4006         if (r)
4007                 r = -EINVAL;
4008         return r;
4009 }
4010
4011 /*
4012  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4013  * stopped by the hypervisor.  This function will be called from the host only.
4014  * EINVAL is returned when the host attempts to set the flag for a guest that
4015  * does not support pv clocks.
4016  */
4017 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4018 {
4019         if (!vcpu->arch.pv_time_enabled)
4020                 return -EINVAL;
4021         vcpu->arch.pvclock_set_guest_stopped_request = true;
4022         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4023         return 0;
4024 }
4025
4026 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4027                                      struct kvm_enable_cap *cap)
4028 {
4029         int r;
4030         uint16_t vmcs_version;
4031         void __user *user_ptr;
4032
4033         if (cap->flags)
4034                 return -EINVAL;
4035
4036         switch (cap->cap) {
4037         case KVM_CAP_HYPERV_SYNIC2:
4038                 if (cap->args[0])
4039                         return -EINVAL;
4040                 /* fall through */
4041
4042         case KVM_CAP_HYPERV_SYNIC:
4043                 if (!irqchip_in_kernel(vcpu->kvm))
4044                         return -EINVAL;
4045                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4046                                              KVM_CAP_HYPERV_SYNIC2);
4047         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4048                 if (!kvm_x86_ops->nested_enable_evmcs)
4049                         return -ENOTTY;
4050                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
4051                 if (!r) {
4052                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4053                         if (copy_to_user(user_ptr, &vmcs_version,
4054                                          sizeof(vmcs_version)))
4055                                 r = -EFAULT;
4056                 }
4057                 return r;
4058
4059         default:
4060                 return -EINVAL;
4061         }
4062 }
4063
4064 long kvm_arch_vcpu_ioctl(struct file *filp,
4065                          unsigned int ioctl, unsigned long arg)
4066 {
4067         struct kvm_vcpu *vcpu = filp->private_data;
4068         void __user *argp = (void __user *)arg;
4069         int r;
4070         union {
4071                 struct kvm_lapic_state *lapic;
4072                 struct kvm_xsave *xsave;
4073                 struct kvm_xcrs *xcrs;
4074                 void *buffer;
4075         } u;
4076
4077         vcpu_load(vcpu);
4078
4079         u.buffer = NULL;
4080         switch (ioctl) {
4081         case KVM_GET_LAPIC: {
4082                 r = -EINVAL;
4083                 if (!lapic_in_kernel(vcpu))
4084                         goto out;
4085                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4086                                 GFP_KERNEL_ACCOUNT);
4087
4088                 r = -ENOMEM;
4089                 if (!u.lapic)
4090                         goto out;
4091                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4092                 if (r)
4093                         goto out;
4094                 r = -EFAULT;
4095                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4096                         goto out;
4097                 r = 0;
4098                 break;
4099         }
4100         case KVM_SET_LAPIC: {
4101                 r = -EINVAL;
4102                 if (!lapic_in_kernel(vcpu))
4103                         goto out;
4104                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4105                 if (IS_ERR(u.lapic)) {
4106                         r = PTR_ERR(u.lapic);
4107                         goto out_nofree;
4108                 }
4109
4110                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4111                 break;
4112         }
4113         case KVM_INTERRUPT: {
4114                 struct kvm_interrupt irq;
4115
4116                 r = -EFAULT;
4117                 if (copy_from_user(&irq, argp, sizeof(irq)))
4118                         goto out;
4119                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4120                 break;
4121         }
4122         case KVM_NMI: {
4123                 r = kvm_vcpu_ioctl_nmi(vcpu);
4124                 break;
4125         }
4126         case KVM_SMI: {
4127                 r = kvm_vcpu_ioctl_smi(vcpu);
4128                 break;
4129         }
4130         case KVM_SET_CPUID: {
4131                 struct kvm_cpuid __user *cpuid_arg = argp;
4132                 struct kvm_cpuid cpuid;
4133
4134                 r = -EFAULT;
4135                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4136                         goto out;
4137                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4138                 break;
4139         }
4140         case KVM_SET_CPUID2: {
4141                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4142                 struct kvm_cpuid2 cpuid;
4143
4144                 r = -EFAULT;
4145                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4146                         goto out;
4147                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4148                                               cpuid_arg->entries);
4149                 break;
4150         }
4151         case KVM_GET_CPUID2: {
4152                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4153                 struct kvm_cpuid2 cpuid;
4154
4155                 r = -EFAULT;
4156                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4157                         goto out;
4158                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4159                                               cpuid_arg->entries);
4160                 if (r)
4161                         goto out;
4162                 r = -EFAULT;
4163                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4164                         goto out;
4165                 r = 0;
4166                 break;
4167         }
4168         case KVM_GET_MSRS: {
4169                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4170                 r = msr_io(vcpu, argp, do_get_msr, 1);
4171                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4172                 break;
4173         }
4174         case KVM_SET_MSRS: {
4175                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4176                 r = msr_io(vcpu, argp, do_set_msr, 0);
4177                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4178                 break;
4179         }
4180         case KVM_TPR_ACCESS_REPORTING: {
4181                 struct kvm_tpr_access_ctl tac;
4182
4183                 r = -EFAULT;
4184                 if (copy_from_user(&tac, argp, sizeof(tac)))
4185                         goto out;
4186                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4187                 if (r)
4188                         goto out;
4189                 r = -EFAULT;
4190                 if (copy_to_user(argp, &tac, sizeof(tac)))
4191                         goto out;
4192                 r = 0;
4193                 break;
4194         };
4195         case KVM_SET_VAPIC_ADDR: {
4196                 struct kvm_vapic_addr va;
4197                 int idx;
4198
4199                 r = -EINVAL;
4200                 if (!lapic_in_kernel(vcpu))
4201                         goto out;
4202                 r = -EFAULT;
4203                 if (copy_from_user(&va, argp, sizeof(va)))
4204                         goto out;
4205                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4206                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4207                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4208                 break;
4209         }
4210         case KVM_X86_SETUP_MCE: {
4211                 u64 mcg_cap;
4212
4213                 r = -EFAULT;
4214                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4215                         goto out;
4216                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4217                 break;
4218         }
4219         case KVM_X86_SET_MCE: {
4220                 struct kvm_x86_mce mce;
4221
4222                 r = -EFAULT;
4223                 if (copy_from_user(&mce, argp, sizeof(mce)))
4224                         goto out;
4225                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4226                 break;
4227         }
4228         case KVM_GET_VCPU_EVENTS: {
4229                 struct kvm_vcpu_events events;
4230
4231                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4232
4233                 r = -EFAULT;
4234                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4235                         break;
4236                 r = 0;
4237                 break;
4238         }
4239         case KVM_SET_VCPU_EVENTS: {
4240                 struct kvm_vcpu_events events;
4241
4242                 r = -EFAULT;
4243                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4244                         break;
4245
4246                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4247                 break;
4248         }
4249         case KVM_GET_DEBUGREGS: {
4250                 struct kvm_debugregs dbgregs;
4251
4252                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4253
4254                 r = -EFAULT;
4255                 if (copy_to_user(argp, &dbgregs,
4256                                  sizeof(struct kvm_debugregs)))
4257                         break;
4258                 r = 0;
4259                 break;
4260         }
4261         case KVM_SET_DEBUGREGS: {
4262                 struct kvm_debugregs dbgregs;
4263
4264                 r = -EFAULT;
4265                 if (copy_from_user(&dbgregs, argp,
4266                                    sizeof(struct kvm_debugregs)))
4267                         break;
4268
4269                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4270                 break;
4271         }
4272         case KVM_GET_XSAVE: {
4273                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4274                 r = -ENOMEM;
4275                 if (!u.xsave)
4276                         break;
4277
4278                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4279
4280                 r = -EFAULT;
4281                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4282                         break;
4283                 r = 0;
4284                 break;
4285         }
4286         case KVM_SET_XSAVE: {
4287                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4288                 if (IS_ERR(u.xsave)) {
4289                         r = PTR_ERR(u.xsave);
4290                         goto out_nofree;
4291                 }
4292
4293                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4294                 break;
4295         }
4296         case KVM_GET_XCRS: {
4297                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4298                 r = -ENOMEM;
4299                 if (!u.xcrs)
4300                         break;
4301
4302                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4303
4304                 r = -EFAULT;
4305                 if (copy_to_user(argp, u.xcrs,
4306                                  sizeof(struct kvm_xcrs)))
4307                         break;
4308                 r = 0;
4309                 break;
4310         }
4311         case KVM_SET_XCRS: {
4312                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4313                 if (IS_ERR(u.xcrs)) {
4314                         r = PTR_ERR(u.xcrs);
4315                         goto out_nofree;
4316                 }
4317
4318                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4319                 break;
4320         }
4321         case KVM_SET_TSC_KHZ: {
4322                 u32 user_tsc_khz;
4323
4324                 r = -EINVAL;
4325                 user_tsc_khz = (u32)arg;
4326
4327                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4328                         goto out;
4329
4330                 if (user_tsc_khz == 0)
4331                         user_tsc_khz = tsc_khz;
4332
4333                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4334                         r = 0;
4335
4336                 goto out;
4337         }
4338         case KVM_GET_TSC_KHZ: {
4339                 r = vcpu->arch.virtual_tsc_khz;
4340                 goto out;
4341         }
4342         case KVM_KVMCLOCK_CTRL: {
4343                 r = kvm_set_guest_paused(vcpu);
4344                 goto out;
4345         }
4346         case KVM_ENABLE_CAP: {
4347                 struct kvm_enable_cap cap;
4348
4349                 r = -EFAULT;
4350                 if (copy_from_user(&cap, argp, sizeof(cap)))
4351                         goto out;
4352                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4353                 break;
4354         }
4355         case KVM_GET_NESTED_STATE: {
4356                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4357                 u32 user_data_size;
4358
4359                 r = -EINVAL;
4360                 if (!kvm_x86_ops->get_nested_state)
4361                         break;
4362
4363                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4364                 r = -EFAULT;
4365                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4366                         break;
4367
4368                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4369                                                   user_data_size);
4370                 if (r < 0)
4371                         break;
4372
4373                 if (r > user_data_size) {
4374                         if (put_user(r, &user_kvm_nested_state->size))
4375                                 r = -EFAULT;
4376                         else
4377                                 r = -E2BIG;
4378                         break;
4379                 }
4380
4381                 r = 0;
4382                 break;
4383         }
4384         case KVM_SET_NESTED_STATE: {
4385                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4386                 struct kvm_nested_state kvm_state;
4387
4388                 r = -EINVAL;
4389                 if (!kvm_x86_ops->set_nested_state)
4390                         break;
4391
4392                 r = -EFAULT;
4393                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4394                         break;
4395
4396                 r = -EINVAL;
4397                 if (kvm_state.size < sizeof(kvm_state))
4398                         break;
4399
4400                 if (kvm_state.flags &
4401                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4402                       | KVM_STATE_NESTED_EVMCS))
4403                         break;
4404
4405                 /* nested_run_pending implies guest_mode.  */
4406                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4407                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4408                         break;
4409
4410                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4411                 break;
4412         }
4413         case KVM_GET_SUPPORTED_HV_CPUID: {
4414                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4415                 struct kvm_cpuid2 cpuid;
4416
4417                 r = -EFAULT;
4418                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4419                         goto out;
4420
4421                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4422                                                 cpuid_arg->entries);
4423                 if (r)
4424                         goto out;
4425
4426                 r = -EFAULT;
4427                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4428                         goto out;
4429                 r = 0;
4430                 break;
4431         }
4432         default:
4433                 r = -EINVAL;
4434         }
4435 out:
4436         kfree(u.buffer);
4437 out_nofree:
4438         vcpu_put(vcpu);
4439         return r;
4440 }
4441
4442 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4443 {
4444         return VM_FAULT_SIGBUS;
4445 }
4446
4447 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4448 {
4449         int ret;
4450
4451         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4452                 return -EINVAL;
4453         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4454         return ret;
4455 }
4456
4457 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4458                                               u64 ident_addr)
4459 {
4460         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4461 }
4462
4463 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4464                                          unsigned long kvm_nr_mmu_pages)
4465 {
4466         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4467                 return -EINVAL;
4468
4469         mutex_lock(&kvm->slots_lock);
4470
4471         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4472         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4473
4474         mutex_unlock(&kvm->slots_lock);
4475         return 0;
4476 }
4477
4478 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4479 {
4480         return kvm->arch.n_max_mmu_pages;
4481 }
4482
4483 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4484 {
4485         struct kvm_pic *pic = kvm->arch.vpic;
4486         int r;
4487
4488         r = 0;
4489         switch (chip->chip_id) {
4490         case KVM_IRQCHIP_PIC_MASTER:
4491                 memcpy(&chip->chip.pic, &pic->pics[0],
4492                         sizeof(struct kvm_pic_state));
4493                 break;
4494         case KVM_IRQCHIP_PIC_SLAVE:
4495                 memcpy(&chip->chip.pic, &pic->pics[1],
4496                         sizeof(struct kvm_pic_state));
4497                 break;
4498         case KVM_IRQCHIP_IOAPIC:
4499                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4500                 break;
4501         default:
4502                 r = -EINVAL;
4503                 break;
4504         }
4505         return r;
4506 }
4507
4508 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4509 {
4510         struct kvm_pic *pic = kvm->arch.vpic;
4511         int r;
4512
4513         r = 0;
4514         switch (chip->chip_id) {
4515         case KVM_IRQCHIP_PIC_MASTER:
4516                 spin_lock(&pic->lock);
4517                 memcpy(&pic->pics[0], &chip->chip.pic,
4518                         sizeof(struct kvm_pic_state));
4519                 spin_unlock(&pic->lock);
4520                 break;
4521         case KVM_IRQCHIP_PIC_SLAVE:
4522                 spin_lock(&pic->lock);
4523                 memcpy(&pic->pics[1], &chip->chip.pic,
4524                         sizeof(struct kvm_pic_state));
4525                 spin_unlock(&pic->lock);
4526                 break;
4527         case KVM_IRQCHIP_IOAPIC:
4528                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4529                 break;
4530         default:
4531                 r = -EINVAL;
4532                 break;
4533         }
4534         kvm_pic_update_irq(pic);
4535         return r;
4536 }
4537
4538 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4539 {
4540         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4541
4542         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4543
4544         mutex_lock(&kps->lock);
4545         memcpy(ps, &kps->channels, sizeof(*ps));
4546         mutex_unlock(&kps->lock);
4547         return 0;
4548 }
4549
4550 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4551 {
4552         int i;
4553         struct kvm_pit *pit = kvm->arch.vpit;
4554
4555         mutex_lock(&pit->pit_state.lock);
4556         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4557         for (i = 0; i < 3; i++)
4558                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4559         mutex_unlock(&pit->pit_state.lock);
4560         return 0;
4561 }
4562
4563 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4564 {
4565         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4566         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4567                 sizeof(ps->channels));
4568         ps->flags = kvm->arch.vpit->pit_state.flags;
4569         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4570         memset(&ps->reserved, 0, sizeof(ps->reserved));
4571         return 0;
4572 }
4573
4574 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4575 {
4576         int start = 0;
4577         int i;
4578         u32 prev_legacy, cur_legacy;
4579         struct kvm_pit *pit = kvm->arch.vpit;
4580
4581         mutex_lock(&pit->pit_state.lock);
4582         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4583         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4584         if (!prev_legacy && cur_legacy)
4585                 start = 1;
4586         memcpy(&pit->pit_state.channels, &ps->channels,
4587                sizeof(pit->pit_state.channels));
4588         pit->pit_state.flags = ps->flags;
4589         for (i = 0; i < 3; i++)
4590                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4591                                    start && i == 0);
4592         mutex_unlock(&pit->pit_state.lock);
4593         return 0;
4594 }
4595
4596 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4597                                  struct kvm_reinject_control *control)
4598 {
4599         struct kvm_pit *pit = kvm->arch.vpit;
4600
4601         if (!pit)
4602                 return -ENXIO;
4603
4604         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4605          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4606          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4607          */
4608         mutex_lock(&pit->pit_state.lock);
4609         kvm_pit_set_reinject(pit, control->pit_reinject);
4610         mutex_unlock(&pit->pit_state.lock);
4611
4612         return 0;
4613 }
4614
4615 /**
4616  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4617  * @kvm: kvm instance
4618  * @log: slot id and address to which we copy the log
4619  *
4620  * Steps 1-4 below provide general overview of dirty page logging. See
4621  * kvm_get_dirty_log_protect() function description for additional details.
4622  *
4623  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4624  * always flush the TLB (step 4) even if previous step failed  and the dirty
4625  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4626  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4627  * writes will be marked dirty for next log read.
4628  *
4629  *   1. Take a snapshot of the bit and clear it if needed.
4630  *   2. Write protect the corresponding page.
4631  *   3. Copy the snapshot to the userspace.
4632  *   4. Flush TLB's if needed.
4633  */
4634 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4635 {
4636         bool flush = false;
4637         int r;
4638
4639         mutex_lock(&kvm->slots_lock);
4640
4641         /*
4642          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4643          */
4644         if (kvm_x86_ops->flush_log_dirty)
4645                 kvm_x86_ops->flush_log_dirty(kvm);
4646
4647         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4648
4649         /*
4650          * All the TLBs can be flushed out of mmu lock, see the comments in
4651          * kvm_mmu_slot_remove_write_access().
4652          */
4653         lockdep_assert_held(&kvm->slots_lock);
4654         if (flush)
4655                 kvm_flush_remote_tlbs(kvm);
4656
4657         mutex_unlock(&kvm->slots_lock);
4658         return r;
4659 }
4660
4661 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4662 {
4663         bool flush = false;
4664         int r;
4665
4666         mutex_lock(&kvm->slots_lock);
4667
4668         /*
4669          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4670          */
4671         if (kvm_x86_ops->flush_log_dirty)
4672                 kvm_x86_ops->flush_log_dirty(kvm);
4673
4674         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4675
4676         /*
4677          * All the TLBs can be flushed out of mmu lock, see the comments in
4678          * kvm_mmu_slot_remove_write_access().
4679          */
4680         lockdep_assert_held(&kvm->slots_lock);
4681         if (flush)
4682                 kvm_flush_remote_tlbs(kvm);
4683
4684         mutex_unlock(&kvm->slots_lock);
4685         return r;
4686 }
4687
4688 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4689                         bool line_status)
4690 {
4691         if (!irqchip_in_kernel(kvm))
4692                 return -ENXIO;
4693
4694         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4695                                         irq_event->irq, irq_event->level,
4696                                         line_status);
4697         return 0;
4698 }
4699
4700 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4701                             struct kvm_enable_cap *cap)
4702 {
4703         int r;
4704
4705         if (cap->flags)
4706                 return -EINVAL;
4707
4708         switch (cap->cap) {
4709         case KVM_CAP_DISABLE_QUIRKS:
4710                 kvm->arch.disabled_quirks = cap->args[0];
4711                 r = 0;
4712                 break;
4713         case KVM_CAP_SPLIT_IRQCHIP: {
4714                 mutex_lock(&kvm->lock);
4715                 r = -EINVAL;
4716                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4717                         goto split_irqchip_unlock;
4718                 r = -EEXIST;
4719                 if (irqchip_in_kernel(kvm))
4720                         goto split_irqchip_unlock;
4721                 if (kvm->created_vcpus)
4722                         goto split_irqchip_unlock;
4723                 r = kvm_setup_empty_irq_routing(kvm);
4724                 if (r)
4725                         goto split_irqchip_unlock;
4726                 /* Pairs with irqchip_in_kernel. */
4727                 smp_wmb();
4728                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4729                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4730                 r = 0;
4731 split_irqchip_unlock:
4732                 mutex_unlock(&kvm->lock);
4733                 break;
4734         }
4735         case KVM_CAP_X2APIC_API:
4736                 r = -EINVAL;
4737                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4738                         break;
4739
4740                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4741                         kvm->arch.x2apic_format = true;
4742                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4743                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4744
4745                 r = 0;
4746                 break;
4747         case KVM_CAP_X86_DISABLE_EXITS:
4748                 r = -EINVAL;
4749                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4750                         break;
4751
4752                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4753                         kvm_can_mwait_in_guest())
4754                         kvm->arch.mwait_in_guest = true;
4755                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4756                         kvm->arch.hlt_in_guest = true;
4757                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4758                         kvm->arch.pause_in_guest = true;
4759                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4760                         kvm->arch.cstate_in_guest = true;
4761                 r = 0;
4762                 break;
4763         case KVM_CAP_MSR_PLATFORM_INFO:
4764                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4765                 r = 0;
4766                 break;
4767         case KVM_CAP_EXCEPTION_PAYLOAD:
4768                 kvm->arch.exception_payload_enabled = cap->args[0];
4769                 r = 0;
4770                 break;
4771         default:
4772                 r = -EINVAL;
4773                 break;
4774         }
4775         return r;
4776 }
4777
4778 long kvm_arch_vm_ioctl(struct file *filp,
4779                        unsigned int ioctl, unsigned long arg)
4780 {
4781         struct kvm *kvm = filp->private_data;
4782         void __user *argp = (void __user *)arg;
4783         int r = -ENOTTY;
4784         /*
4785          * This union makes it completely explicit to gcc-3.x
4786          * that these two variables' stack usage should be
4787          * combined, not added together.
4788          */
4789         union {
4790                 struct kvm_pit_state ps;
4791                 struct kvm_pit_state2 ps2;
4792                 struct kvm_pit_config pit_config;
4793         } u;
4794
4795         switch (ioctl) {
4796         case KVM_SET_TSS_ADDR:
4797                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4798                 break;
4799         case KVM_SET_IDENTITY_MAP_ADDR: {
4800                 u64 ident_addr;
4801
4802                 mutex_lock(&kvm->lock);
4803                 r = -EINVAL;
4804                 if (kvm->created_vcpus)
4805                         goto set_identity_unlock;
4806                 r = -EFAULT;
4807                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4808                         goto set_identity_unlock;
4809                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4810 set_identity_unlock:
4811                 mutex_unlock(&kvm->lock);
4812                 break;
4813         }
4814         case KVM_SET_NR_MMU_PAGES:
4815                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4816                 break;
4817         case KVM_GET_NR_MMU_PAGES:
4818                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4819                 break;
4820         case KVM_CREATE_IRQCHIP: {
4821                 mutex_lock(&kvm->lock);
4822
4823                 r = -EEXIST;
4824                 if (irqchip_in_kernel(kvm))
4825                         goto create_irqchip_unlock;
4826
4827                 r = -EINVAL;
4828                 if (kvm->created_vcpus)
4829                         goto create_irqchip_unlock;
4830
4831                 r = kvm_pic_init(kvm);
4832                 if (r)
4833                         goto create_irqchip_unlock;
4834
4835                 r = kvm_ioapic_init(kvm);
4836                 if (r) {
4837                         kvm_pic_destroy(kvm);
4838                         goto create_irqchip_unlock;
4839                 }
4840
4841                 r = kvm_setup_default_irq_routing(kvm);
4842                 if (r) {
4843                         kvm_ioapic_destroy(kvm);
4844                         kvm_pic_destroy(kvm);
4845                         goto create_irqchip_unlock;
4846                 }
4847                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4848                 smp_wmb();
4849                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4850         create_irqchip_unlock:
4851                 mutex_unlock(&kvm->lock);
4852                 break;
4853         }
4854         case KVM_CREATE_PIT:
4855                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4856                 goto create_pit;
4857         case KVM_CREATE_PIT2:
4858                 r = -EFAULT;
4859                 if (copy_from_user(&u.pit_config, argp,
4860                                    sizeof(struct kvm_pit_config)))
4861                         goto out;
4862         create_pit:
4863                 mutex_lock(&kvm->lock);
4864                 r = -EEXIST;
4865                 if (kvm->arch.vpit)
4866                         goto create_pit_unlock;
4867                 r = -ENOMEM;
4868                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4869                 if (kvm->arch.vpit)
4870                         r = 0;
4871         create_pit_unlock:
4872                 mutex_unlock(&kvm->lock);
4873                 break;
4874         case KVM_GET_IRQCHIP: {
4875                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4876                 struct kvm_irqchip *chip;
4877
4878                 chip = memdup_user(argp, sizeof(*chip));
4879                 if (IS_ERR(chip)) {
4880                         r = PTR_ERR(chip);
4881                         goto out;
4882                 }
4883
4884                 r = -ENXIO;
4885                 if (!irqchip_kernel(kvm))
4886                         goto get_irqchip_out;
4887                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4888                 if (r)
4889                         goto get_irqchip_out;
4890                 r = -EFAULT;
4891                 if (copy_to_user(argp, chip, sizeof(*chip)))
4892                         goto get_irqchip_out;
4893                 r = 0;
4894         get_irqchip_out:
4895                 kfree(chip);
4896                 break;
4897         }
4898         case KVM_SET_IRQCHIP: {
4899                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4900                 struct kvm_irqchip *chip;
4901
4902                 chip = memdup_user(argp, sizeof(*chip));
4903                 if (IS_ERR(chip)) {
4904                         r = PTR_ERR(chip);
4905                         goto out;
4906                 }
4907
4908                 r = -ENXIO;
4909                 if (!irqchip_kernel(kvm))
4910                         goto set_irqchip_out;
4911                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4912                 if (r)
4913                         goto set_irqchip_out;
4914                 r = 0;
4915         set_irqchip_out:
4916                 kfree(chip);
4917                 break;
4918         }
4919         case KVM_GET_PIT: {
4920                 r = -EFAULT;
4921                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4922                         goto out;
4923                 r = -ENXIO;
4924                 if (!kvm->arch.vpit)
4925                         goto out;
4926                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4927                 if (r)
4928                         goto out;
4929                 r = -EFAULT;
4930                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4931                         goto out;
4932                 r = 0;
4933                 break;
4934         }
4935         case KVM_SET_PIT: {
4936                 r = -EFAULT;
4937                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4938                         goto out;
4939                 r = -ENXIO;
4940                 if (!kvm->arch.vpit)
4941                         goto out;
4942                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4943                 break;
4944         }
4945         case KVM_GET_PIT2: {
4946                 r = -ENXIO;
4947                 if (!kvm->arch.vpit)
4948                         goto out;
4949                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4950                 if (r)
4951                         goto out;
4952                 r = -EFAULT;
4953                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4954                         goto out;
4955                 r = 0;
4956                 break;
4957         }
4958         case KVM_SET_PIT2: {
4959                 r = -EFAULT;
4960                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4961                         goto out;
4962                 r = -ENXIO;
4963                 if (!kvm->arch.vpit)
4964                         goto out;
4965                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4966                 break;
4967         }
4968         case KVM_REINJECT_CONTROL: {
4969                 struct kvm_reinject_control control;
4970                 r =  -EFAULT;
4971                 if (copy_from_user(&control, argp, sizeof(control)))
4972                         goto out;
4973                 r = kvm_vm_ioctl_reinject(kvm, &control);
4974                 break;
4975         }
4976         case KVM_SET_BOOT_CPU_ID:
4977                 r = 0;
4978                 mutex_lock(&kvm->lock);
4979                 if (kvm->created_vcpus)
4980                         r = -EBUSY;
4981                 else
4982                         kvm->arch.bsp_vcpu_id = arg;
4983                 mutex_unlock(&kvm->lock);
4984                 break;
4985         case KVM_XEN_HVM_CONFIG: {
4986                 struct kvm_xen_hvm_config xhc;
4987                 r = -EFAULT;
4988                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4989                         goto out;
4990                 r = -EINVAL;
4991                 if (xhc.flags)
4992                         goto out;
4993                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4994                 r = 0;
4995                 break;
4996         }
4997         case KVM_SET_CLOCK: {
4998                 struct kvm_clock_data user_ns;
4999                 u64 now_ns;
5000
5001                 r = -EFAULT;
5002                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5003                         goto out;
5004
5005                 r = -EINVAL;
5006                 if (user_ns.flags)
5007                         goto out;
5008
5009                 r = 0;
5010                 /*
5011                  * TODO: userspace has to take care of races with VCPU_RUN, so
5012                  * kvm_gen_update_masterclock() can be cut down to locked
5013                  * pvclock_update_vm_gtod_copy().
5014                  */
5015                 kvm_gen_update_masterclock(kvm);
5016                 now_ns = get_kvmclock_ns(kvm);
5017                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5018                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5019                 break;
5020         }
5021         case KVM_GET_CLOCK: {
5022                 struct kvm_clock_data user_ns;
5023                 u64 now_ns;
5024
5025                 now_ns = get_kvmclock_ns(kvm);
5026                 user_ns.clock = now_ns;
5027                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5028                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5029
5030                 r = -EFAULT;
5031                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5032                         goto out;
5033                 r = 0;
5034                 break;
5035         }
5036         case KVM_MEMORY_ENCRYPT_OP: {
5037                 r = -ENOTTY;
5038                 if (kvm_x86_ops->mem_enc_op)
5039                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
5040                 break;
5041         }
5042         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5043                 struct kvm_enc_region region;
5044
5045                 r = -EFAULT;
5046                 if (copy_from_user(&region, argp, sizeof(region)))
5047                         goto out;
5048
5049                 r = -ENOTTY;
5050                 if (kvm_x86_ops->mem_enc_reg_region)
5051                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
5052                 break;
5053         }
5054         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5055                 struct kvm_enc_region region;
5056
5057                 r = -EFAULT;
5058                 if (copy_from_user(&region, argp, sizeof(region)))
5059                         goto out;
5060
5061                 r = -ENOTTY;
5062                 if (kvm_x86_ops->mem_enc_unreg_region)
5063                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
5064                 break;
5065         }
5066         case KVM_HYPERV_EVENTFD: {
5067                 struct kvm_hyperv_eventfd hvevfd;
5068
5069                 r = -EFAULT;
5070                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5071                         goto out;
5072                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5073                 break;
5074         }
5075         case KVM_SET_PMU_EVENT_FILTER:
5076                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5077                 break;
5078         default:
5079                 r = -ENOTTY;
5080         }
5081 out:
5082         return r;
5083 }
5084
5085 static void kvm_init_msr_list(void)
5086 {
5087         u32 dummy[2];
5088         unsigned i, j;
5089
5090         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5091                          "Please update the fixed PMCs in msrs_to_save[]");
5092         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_GENERIC != 32,
5093                          "Please update the generic perfctr/eventsel MSRs in msrs_to_save[]");
5094
5095         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
5096                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
5097                         continue;
5098
5099                 /*
5100                  * Even MSRs that are valid in the host may not be exposed
5101                  * to the guests in some cases.
5102                  */
5103                 switch (msrs_to_save[i]) {
5104                 case MSR_IA32_BNDCFGS:
5105                         if (!kvm_mpx_supported())
5106                                 continue;
5107                         break;
5108                 case MSR_TSC_AUX:
5109                         if (!kvm_x86_ops->rdtscp_supported())
5110                                 continue;
5111                         break;
5112                 case MSR_IA32_RTIT_CTL:
5113                 case MSR_IA32_RTIT_STATUS:
5114                         if (!kvm_x86_ops->pt_supported())
5115                                 continue;
5116                         break;
5117                 case MSR_IA32_RTIT_CR3_MATCH:
5118                         if (!kvm_x86_ops->pt_supported() ||
5119                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5120                                 continue;
5121                         break;
5122                 case MSR_IA32_RTIT_OUTPUT_BASE:
5123                 case MSR_IA32_RTIT_OUTPUT_MASK:
5124                         if (!kvm_x86_ops->pt_supported() ||
5125                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5126                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5127                                 continue;
5128                         break;
5129                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5130                         if (!kvm_x86_ops->pt_supported() ||
5131                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5132                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5133                                 continue;
5134                         break;
5135                 }
5136                 default:
5137                         break;
5138                 }
5139
5140                 if (j < i)
5141                         msrs_to_save[j] = msrs_to_save[i];
5142                 j++;
5143         }
5144         num_msrs_to_save = j;
5145
5146         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5147                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5148                         continue;
5149
5150                 if (j < i)
5151                         emulated_msrs[j] = emulated_msrs[i];
5152                 j++;
5153         }
5154         num_emulated_msrs = j;
5155
5156         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5157                 struct kvm_msr_entry msr;
5158
5159                 msr.index = msr_based_features[i];
5160                 if (kvm_get_msr_feature(&msr))
5161                         continue;
5162
5163                 if (j < i)
5164                         msr_based_features[j] = msr_based_features[i];
5165                 j++;
5166         }
5167         num_msr_based_features = j;
5168 }
5169
5170 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5171                            const void *v)
5172 {
5173         int handled = 0;
5174         int n;
5175
5176         do {
5177                 n = min(len, 8);
5178                 if (!(lapic_in_kernel(vcpu) &&
5179                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5180                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5181                         break;
5182                 handled += n;
5183                 addr += n;
5184                 len -= n;
5185                 v += n;
5186         } while (len);
5187
5188         return handled;
5189 }
5190
5191 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5192 {
5193         int handled = 0;
5194         int n;
5195
5196         do {
5197                 n = min(len, 8);
5198                 if (!(lapic_in_kernel(vcpu) &&
5199                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5200                                          addr, n, v))
5201                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5202                         break;
5203                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5204                 handled += n;
5205                 addr += n;
5206                 len -= n;
5207                 v += n;
5208         } while (len);
5209
5210         return handled;
5211 }
5212
5213 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5214                         struct kvm_segment *var, int seg)
5215 {
5216         kvm_x86_ops->set_segment(vcpu, var, seg);
5217 }
5218
5219 void kvm_get_segment(struct kvm_vcpu *vcpu,
5220                      struct kvm_segment *var, int seg)
5221 {
5222         kvm_x86_ops->get_segment(vcpu, var, seg);
5223 }
5224
5225 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5226                            struct x86_exception *exception)
5227 {
5228         gpa_t t_gpa;
5229
5230         BUG_ON(!mmu_is_nested(vcpu));
5231
5232         /* NPT walks are always user-walks */
5233         access |= PFERR_USER_MASK;
5234         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5235
5236         return t_gpa;
5237 }
5238
5239 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5240                               struct x86_exception *exception)
5241 {
5242         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5243         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5244 }
5245
5246  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5247                                 struct x86_exception *exception)
5248 {
5249         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5250         access |= PFERR_FETCH_MASK;
5251         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5252 }
5253
5254 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5255                                struct x86_exception *exception)
5256 {
5257         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5258         access |= PFERR_WRITE_MASK;
5259         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5260 }
5261
5262 /* uses this to access any guest's mapped memory without checking CPL */
5263 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5264                                 struct x86_exception *exception)
5265 {
5266         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5267 }
5268
5269 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5270                                       struct kvm_vcpu *vcpu, u32 access,
5271                                       struct x86_exception *exception)
5272 {
5273         void *data = val;
5274         int r = X86EMUL_CONTINUE;
5275
5276         while (bytes) {
5277                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5278                                                             exception);
5279                 unsigned offset = addr & (PAGE_SIZE-1);
5280                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5281                 int ret;
5282
5283                 if (gpa == UNMAPPED_GVA)
5284                         return X86EMUL_PROPAGATE_FAULT;
5285                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5286                                                offset, toread);
5287                 if (ret < 0) {
5288                         r = X86EMUL_IO_NEEDED;
5289                         goto out;
5290                 }
5291
5292                 bytes -= toread;
5293                 data += toread;
5294                 addr += toread;
5295         }
5296 out:
5297         return r;
5298 }
5299
5300 /* used for instruction fetching */
5301 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5302                                 gva_t addr, void *val, unsigned int bytes,
5303                                 struct x86_exception *exception)
5304 {
5305         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5306         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5307         unsigned offset;
5308         int ret;
5309
5310         /* Inline kvm_read_guest_virt_helper for speed.  */
5311         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5312                                                     exception);
5313         if (unlikely(gpa == UNMAPPED_GVA))
5314                 return X86EMUL_PROPAGATE_FAULT;
5315
5316         offset = addr & (PAGE_SIZE-1);
5317         if (WARN_ON(offset + bytes > PAGE_SIZE))
5318                 bytes = (unsigned)PAGE_SIZE - offset;
5319         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5320                                        offset, bytes);
5321         if (unlikely(ret < 0))
5322                 return X86EMUL_IO_NEEDED;
5323
5324         return X86EMUL_CONTINUE;
5325 }
5326
5327 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5328                                gva_t addr, void *val, unsigned int bytes,
5329                                struct x86_exception *exception)
5330 {
5331         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5332
5333         /*
5334          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5335          * is returned, but our callers are not ready for that and they blindly
5336          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5337          * uninitialized kernel stack memory into cr2 and error code.
5338          */
5339         memset(exception, 0, sizeof(*exception));
5340         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5341                                           exception);
5342 }
5343 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5344
5345 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5346                              gva_t addr, void *val, unsigned int bytes,
5347                              struct x86_exception *exception, bool system)
5348 {
5349         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5350         u32 access = 0;
5351
5352         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5353                 access |= PFERR_USER_MASK;
5354
5355         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5356 }
5357
5358 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5359                 unsigned long addr, void *val, unsigned int bytes)
5360 {
5361         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5362         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5363
5364         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5365 }
5366
5367 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5368                                       struct kvm_vcpu *vcpu, u32 access,
5369                                       struct x86_exception *exception)
5370 {
5371         void *data = val;
5372         int r = X86EMUL_CONTINUE;
5373
5374         while (bytes) {
5375                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5376                                                              access,
5377                                                              exception);
5378                 unsigned offset = addr & (PAGE_SIZE-1);
5379                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5380                 int ret;
5381
5382                 if (gpa == UNMAPPED_GVA)
5383                         return X86EMUL_PROPAGATE_FAULT;
5384                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5385                 if (ret < 0) {
5386                         r = X86EMUL_IO_NEEDED;
5387                         goto out;
5388                 }
5389
5390                 bytes -= towrite;
5391                 data += towrite;
5392                 addr += towrite;
5393         }
5394 out:
5395         return r;
5396 }
5397
5398 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5399                               unsigned int bytes, struct x86_exception *exception,
5400                               bool system)
5401 {
5402         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5403         u32 access = PFERR_WRITE_MASK;
5404
5405         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5406                 access |= PFERR_USER_MASK;
5407
5408         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5409                                            access, exception);
5410 }
5411
5412 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5413                                 unsigned int bytes, struct x86_exception *exception)
5414 {
5415         /* kvm_write_guest_virt_system can pull in tons of pages. */
5416         vcpu->arch.l1tf_flush_l1d = true;
5417
5418         /*
5419          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5420          * is returned, but our callers are not ready for that and they blindly
5421          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5422          * uninitialized kernel stack memory into cr2 and error code.
5423          */
5424         memset(exception, 0, sizeof(*exception));
5425         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5426                                            PFERR_WRITE_MASK, exception);
5427 }
5428 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5429
5430 int handle_ud(struct kvm_vcpu *vcpu)
5431 {
5432         int emul_type = EMULTYPE_TRAP_UD;
5433         enum emulation_result er;
5434         char sig[5]; /* ud2; .ascii "kvm" */
5435         struct x86_exception e;
5436
5437         if (force_emulation_prefix &&
5438             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5439                                 sig, sizeof(sig), &e) == 0 &&
5440             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5441                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5442                 emul_type = 0;
5443         }
5444
5445         er = kvm_emulate_instruction(vcpu, emul_type);
5446         if (er == EMULATE_USER_EXIT)
5447                 return 0;
5448         if (er != EMULATE_DONE)
5449                 kvm_queue_exception(vcpu, UD_VECTOR);
5450         return 1;
5451 }
5452 EXPORT_SYMBOL_GPL(handle_ud);
5453
5454 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5455                             gpa_t gpa, bool write)
5456 {
5457         /* For APIC access vmexit */
5458         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5459                 return 1;
5460
5461         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5462                 trace_vcpu_match_mmio(gva, gpa, write, true);
5463                 return 1;
5464         }
5465
5466         return 0;
5467 }
5468
5469 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5470                                 gpa_t *gpa, struct x86_exception *exception,
5471                                 bool write)
5472 {
5473         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5474                 | (write ? PFERR_WRITE_MASK : 0);
5475
5476         /*
5477          * currently PKRU is only applied to ept enabled guest so
5478          * there is no pkey in EPT page table for L1 guest or EPT
5479          * shadow page table for L2 guest.
5480          */
5481         if (vcpu_match_mmio_gva(vcpu, gva)
5482             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5483                                  vcpu->arch.mmio_access, 0, access)) {
5484                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5485                                         (gva & (PAGE_SIZE - 1));
5486                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5487                 return 1;
5488         }
5489
5490         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5491
5492         if (*gpa == UNMAPPED_GVA)
5493                 return -1;
5494
5495         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5496 }
5497
5498 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5499                         const void *val, int bytes)
5500 {
5501         int ret;
5502
5503         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5504         if (ret < 0)
5505                 return 0;
5506         kvm_page_track_write(vcpu, gpa, val, bytes);
5507         return 1;
5508 }
5509
5510 struct read_write_emulator_ops {
5511         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5512                                   int bytes);
5513         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5514                                   void *val, int bytes);
5515         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5516                                int bytes, void *val);
5517         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5518                                     void *val, int bytes);
5519         bool write;
5520 };
5521
5522 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5523 {
5524         if (vcpu->mmio_read_completed) {
5525                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5526                                vcpu->mmio_fragments[0].gpa, val);
5527                 vcpu->mmio_read_completed = 0;
5528                 return 1;
5529         }
5530
5531         return 0;
5532 }
5533
5534 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5535                         void *val, int bytes)
5536 {
5537         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5538 }
5539
5540 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5541                          void *val, int bytes)
5542 {
5543         return emulator_write_phys(vcpu, gpa, val, bytes);
5544 }
5545
5546 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5547 {
5548         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5549         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5550 }
5551
5552 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5553                           void *val, int bytes)
5554 {
5555         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5556         return X86EMUL_IO_NEEDED;
5557 }
5558
5559 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5560                            void *val, int bytes)
5561 {
5562         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5563
5564         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5565         return X86EMUL_CONTINUE;
5566 }
5567
5568 static const struct read_write_emulator_ops read_emultor = {
5569         .read_write_prepare = read_prepare,
5570         .read_write_emulate = read_emulate,
5571         .read_write_mmio = vcpu_mmio_read,
5572         .read_write_exit_mmio = read_exit_mmio,
5573 };
5574
5575 static const struct read_write_emulator_ops write_emultor = {
5576         .read_write_emulate = write_emulate,
5577         .read_write_mmio = write_mmio,
5578         .read_write_exit_mmio = write_exit_mmio,
5579         .write = true,
5580 };
5581
5582 static int emulator_read_write_onepage(unsigned long addr, void *val,
5583                                        unsigned int bytes,
5584                                        struct x86_exception *exception,
5585                                        struct kvm_vcpu *vcpu,
5586                                        const struct read_write_emulator_ops *ops)
5587 {
5588         gpa_t gpa;
5589         int handled, ret;
5590         bool write = ops->write;
5591         struct kvm_mmio_fragment *frag;
5592         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5593
5594         /*
5595          * If the exit was due to a NPF we may already have a GPA.
5596          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5597          * Note, this cannot be used on string operations since string
5598          * operation using rep will only have the initial GPA from the NPF
5599          * occurred.
5600          */
5601         if (vcpu->arch.gpa_available &&
5602             emulator_can_use_gpa(ctxt) &&
5603             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5604                 gpa = vcpu->arch.gpa_val;
5605                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5606         } else {
5607                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5608                 if (ret < 0)
5609                         return X86EMUL_PROPAGATE_FAULT;
5610         }
5611
5612         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5613                 return X86EMUL_CONTINUE;
5614
5615         /*
5616          * Is this MMIO handled locally?
5617          */
5618         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5619         if (handled == bytes)
5620                 return X86EMUL_CONTINUE;
5621
5622         gpa += handled;
5623         bytes -= handled;
5624         val += handled;
5625
5626         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5627         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5628         frag->gpa = gpa;
5629         frag->data = val;
5630         frag->len = bytes;
5631         return X86EMUL_CONTINUE;
5632 }
5633
5634 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5635                         unsigned long addr,
5636                         void *val, unsigned int bytes,
5637                         struct x86_exception *exception,
5638                         const struct read_write_emulator_ops *ops)
5639 {
5640         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5641         gpa_t gpa;
5642         int rc;
5643
5644         if (ops->read_write_prepare &&
5645                   ops->read_write_prepare(vcpu, val, bytes))
5646                 return X86EMUL_CONTINUE;
5647
5648         vcpu->mmio_nr_fragments = 0;
5649
5650         /* Crossing a page boundary? */
5651         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5652                 int now;
5653
5654                 now = -addr & ~PAGE_MASK;
5655                 rc = emulator_read_write_onepage(addr, val, now, exception,
5656                                                  vcpu, ops);
5657
5658                 if (rc != X86EMUL_CONTINUE)
5659                         return rc;
5660                 addr += now;
5661                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5662                         addr = (u32)addr;
5663                 val += now;
5664                 bytes -= now;
5665         }
5666
5667         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5668                                          vcpu, ops);
5669         if (rc != X86EMUL_CONTINUE)
5670                 return rc;
5671
5672         if (!vcpu->mmio_nr_fragments)
5673                 return rc;
5674
5675         gpa = vcpu->mmio_fragments[0].gpa;
5676
5677         vcpu->mmio_needed = 1;
5678         vcpu->mmio_cur_fragment = 0;
5679
5680         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5681         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5682         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5683         vcpu->run->mmio.phys_addr = gpa;
5684
5685         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5686 }
5687
5688 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5689                                   unsigned long addr,
5690                                   void *val,
5691                                   unsigned int bytes,
5692                                   struct x86_exception *exception)
5693 {
5694         return emulator_read_write(ctxt, addr, val, bytes,
5695                                    exception, &read_emultor);
5696 }
5697
5698 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5699                             unsigned long addr,
5700                             const void *val,
5701                             unsigned int bytes,
5702                             struct x86_exception *exception)
5703 {
5704         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5705                                    exception, &write_emultor);
5706 }
5707
5708 #define CMPXCHG_TYPE(t, ptr, old, new) \
5709         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5710
5711 #ifdef CONFIG_X86_64
5712 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5713 #else
5714 #  define CMPXCHG64(ptr, old, new) \
5715         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5716 #endif
5717
5718 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5719                                      unsigned long addr,
5720                                      const void *old,
5721                                      const void *new,
5722                                      unsigned int bytes,
5723                                      struct x86_exception *exception)
5724 {
5725         struct kvm_host_map map;
5726         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5727         gpa_t gpa;
5728         char *kaddr;
5729         bool exchanged;
5730
5731         /* guests cmpxchg8b have to be emulated atomically */
5732         if (bytes > 8 || (bytes & (bytes - 1)))
5733                 goto emul_write;
5734
5735         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5736
5737         if (gpa == UNMAPPED_GVA ||
5738             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5739                 goto emul_write;
5740
5741         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5742                 goto emul_write;
5743
5744         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5745                 goto emul_write;
5746
5747         kaddr = map.hva + offset_in_page(gpa);
5748
5749         switch (bytes) {
5750         case 1:
5751                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5752                 break;
5753         case 2:
5754                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5755                 break;
5756         case 4:
5757                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5758                 break;
5759         case 8:
5760                 exchanged = CMPXCHG64(kaddr, old, new);
5761                 break;
5762         default:
5763                 BUG();
5764         }
5765
5766         kvm_vcpu_unmap(vcpu, &map, true);
5767
5768         if (!exchanged)
5769                 return X86EMUL_CMPXCHG_FAILED;
5770
5771         kvm_page_track_write(vcpu, gpa, new, bytes);
5772
5773         return X86EMUL_CONTINUE;
5774
5775 emul_write:
5776         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5777
5778         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5779 }
5780
5781 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5782 {
5783         int r = 0, i;
5784
5785         for (i = 0; i < vcpu->arch.pio.count; i++) {
5786                 if (vcpu->arch.pio.in)
5787                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5788                                             vcpu->arch.pio.size, pd);
5789                 else
5790                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5791                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5792                                              pd);
5793                 if (r)
5794                         break;
5795                 pd += vcpu->arch.pio.size;
5796         }
5797         return r;
5798 }
5799
5800 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5801                                unsigned short port, void *val,
5802                                unsigned int count, bool in)
5803 {
5804         vcpu->arch.pio.port = port;
5805         vcpu->arch.pio.in = in;
5806         vcpu->arch.pio.count  = count;
5807         vcpu->arch.pio.size = size;
5808
5809         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5810                 vcpu->arch.pio.count = 0;
5811                 return 1;
5812         }
5813
5814         vcpu->run->exit_reason = KVM_EXIT_IO;
5815         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5816         vcpu->run->io.size = size;
5817         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5818         vcpu->run->io.count = count;
5819         vcpu->run->io.port = port;
5820
5821         return 0;
5822 }
5823
5824 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5825                                     int size, unsigned short port, void *val,
5826                                     unsigned int count)
5827 {
5828         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5829         int ret;
5830
5831         if (vcpu->arch.pio.count)
5832                 goto data_avail;
5833
5834         memset(vcpu->arch.pio_data, 0, size * count);
5835
5836         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5837         if (ret) {
5838 data_avail:
5839                 memcpy(val, vcpu->arch.pio_data, size * count);
5840                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5841                 vcpu->arch.pio.count = 0;
5842                 return 1;
5843         }
5844
5845         return 0;
5846 }
5847
5848 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5849                                      int size, unsigned short port,
5850                                      const void *val, unsigned int count)
5851 {
5852         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5853
5854         memcpy(vcpu->arch.pio_data, val, size * count);
5855         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5856         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5857 }
5858
5859 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5860 {
5861         return kvm_x86_ops->get_segment_base(vcpu, seg);
5862 }
5863
5864 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5865 {
5866         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5867 }
5868
5869 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5870 {
5871         if (!need_emulate_wbinvd(vcpu))
5872                 return X86EMUL_CONTINUE;
5873
5874         if (kvm_x86_ops->has_wbinvd_exit()) {
5875                 int cpu = get_cpu();
5876
5877                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5878                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5879                                 wbinvd_ipi, NULL, 1);
5880                 put_cpu();
5881                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5882         } else
5883                 wbinvd();
5884         return X86EMUL_CONTINUE;
5885 }
5886
5887 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5888 {
5889         kvm_emulate_wbinvd_noskip(vcpu);
5890         return kvm_skip_emulated_instruction(vcpu);
5891 }
5892 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5893
5894
5895
5896 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5897 {
5898         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5899 }
5900
5901 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5902                            unsigned long *dest)
5903 {
5904         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5905 }
5906
5907 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5908                            unsigned long value)
5909 {
5910
5911         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5912 }
5913
5914 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5915 {
5916         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5917 }
5918
5919 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5920 {
5921         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5922         unsigned long value;
5923
5924         switch (cr) {
5925         case 0:
5926                 value = kvm_read_cr0(vcpu);
5927                 break;
5928         case 2:
5929                 value = vcpu->arch.cr2;
5930                 break;
5931         case 3:
5932                 value = kvm_read_cr3(vcpu);
5933                 break;
5934         case 4:
5935                 value = kvm_read_cr4(vcpu);
5936                 break;
5937         case 8:
5938                 value = kvm_get_cr8(vcpu);
5939                 break;
5940         default:
5941                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5942                 return 0;
5943         }
5944
5945         return value;
5946 }
5947
5948 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5949 {
5950         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5951         int res = 0;
5952
5953         switch (cr) {
5954         case 0:
5955                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5956                 break;
5957         case 2:
5958                 vcpu->arch.cr2 = val;
5959                 break;
5960         case 3:
5961                 res = kvm_set_cr3(vcpu, val);
5962                 break;
5963         case 4:
5964                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5965                 break;
5966         case 8:
5967                 res = kvm_set_cr8(vcpu, val);
5968                 break;
5969         default:
5970                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5971                 res = -1;
5972         }
5973
5974         return res;
5975 }
5976
5977 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5978 {
5979         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5980 }
5981
5982 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5983 {
5984         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5985 }
5986
5987 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5988 {
5989         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5990 }
5991
5992 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5993 {
5994         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5995 }
5996
5997 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5998 {
5999         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
6000 }
6001
6002 static unsigned long emulator_get_cached_segment_base(
6003         struct x86_emulate_ctxt *ctxt, int seg)
6004 {
6005         return get_segment_base(emul_to_vcpu(ctxt), seg);
6006 }
6007
6008 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6009                                  struct desc_struct *desc, u32 *base3,
6010                                  int seg)
6011 {
6012         struct kvm_segment var;
6013
6014         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6015         *selector = var.selector;
6016
6017         if (var.unusable) {
6018                 memset(desc, 0, sizeof(*desc));
6019                 if (base3)
6020                         *base3 = 0;
6021                 return false;
6022         }
6023
6024         if (var.g)
6025                 var.limit >>= 12;
6026         set_desc_limit(desc, var.limit);
6027         set_desc_base(desc, (unsigned long)var.base);
6028 #ifdef CONFIG_X86_64
6029         if (base3)
6030                 *base3 = var.base >> 32;
6031 #endif
6032         desc->type = var.type;
6033         desc->s = var.s;
6034         desc->dpl = var.dpl;
6035         desc->p = var.present;
6036         desc->avl = var.avl;
6037         desc->l = var.l;
6038         desc->d = var.db;
6039         desc->g = var.g;
6040
6041         return true;
6042 }
6043
6044 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6045                                  struct desc_struct *desc, u32 base3,
6046                                  int seg)
6047 {
6048         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6049         struct kvm_segment var;
6050
6051         var.selector = selector;
6052         var.base = get_desc_base(desc);
6053 #ifdef CONFIG_X86_64
6054         var.base |= ((u64)base3) << 32;
6055 #endif
6056         var.limit = get_desc_limit(desc);
6057         if (desc->g)
6058                 var.limit = (var.limit << 12) | 0xfff;
6059         var.type = desc->type;
6060         var.dpl = desc->dpl;
6061         var.db = desc->d;
6062         var.s = desc->s;
6063         var.l = desc->l;
6064         var.g = desc->g;
6065         var.avl = desc->avl;
6066         var.present = desc->p;
6067         var.unusable = !var.present;
6068         var.padding = 0;
6069
6070         kvm_set_segment(vcpu, &var, seg);
6071         return;
6072 }
6073
6074 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6075                             u32 msr_index, u64 *pdata)
6076 {
6077         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
6078 }
6079
6080 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6081                             u32 msr_index, u64 data)
6082 {
6083         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
6084 }
6085
6086 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6087 {
6088         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6089
6090         return vcpu->arch.smbase;
6091 }
6092
6093 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6094 {
6095         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6096
6097         vcpu->arch.smbase = smbase;
6098 }
6099
6100 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6101                               u32 pmc)
6102 {
6103         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6104 }
6105
6106 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6107                              u32 pmc, u64 *pdata)
6108 {
6109         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6110 }
6111
6112 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6113 {
6114         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6115 }
6116
6117 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6118                               struct x86_instruction_info *info,
6119                               enum x86_intercept_stage stage)
6120 {
6121         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6122 }
6123
6124 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6125                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6126 {
6127         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6128 }
6129
6130 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6131 {
6132         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6133 }
6134
6135 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6136 {
6137         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6138 }
6139
6140 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6141 {
6142         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6143 }
6144
6145 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6146 {
6147         return emul_to_vcpu(ctxt)->arch.hflags;
6148 }
6149
6150 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6151 {
6152         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6153 }
6154
6155 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6156                                   const char *smstate)
6157 {
6158         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6159 }
6160
6161 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6162 {
6163         kvm_smm_changed(emul_to_vcpu(ctxt));
6164 }
6165
6166 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6167 {
6168         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6169 }
6170
6171 static const struct x86_emulate_ops emulate_ops = {
6172         .read_gpr            = emulator_read_gpr,
6173         .write_gpr           = emulator_write_gpr,
6174         .read_std            = emulator_read_std,
6175         .write_std           = emulator_write_std,
6176         .read_phys           = kvm_read_guest_phys_system,
6177         .fetch               = kvm_fetch_guest_virt,
6178         .read_emulated       = emulator_read_emulated,
6179         .write_emulated      = emulator_write_emulated,
6180         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6181         .invlpg              = emulator_invlpg,
6182         .pio_in_emulated     = emulator_pio_in_emulated,
6183         .pio_out_emulated    = emulator_pio_out_emulated,
6184         .get_segment         = emulator_get_segment,
6185         .set_segment         = emulator_set_segment,
6186         .get_cached_segment_base = emulator_get_cached_segment_base,
6187         .get_gdt             = emulator_get_gdt,
6188         .get_idt             = emulator_get_idt,
6189         .set_gdt             = emulator_set_gdt,
6190         .set_idt             = emulator_set_idt,
6191         .get_cr              = emulator_get_cr,
6192         .set_cr              = emulator_set_cr,
6193         .cpl                 = emulator_get_cpl,
6194         .get_dr              = emulator_get_dr,
6195         .set_dr              = emulator_set_dr,
6196         .get_smbase          = emulator_get_smbase,
6197         .set_smbase          = emulator_set_smbase,
6198         .set_msr             = emulator_set_msr,
6199         .get_msr             = emulator_get_msr,
6200         .check_pmc           = emulator_check_pmc,
6201         .read_pmc            = emulator_read_pmc,
6202         .halt                = emulator_halt,
6203         .wbinvd              = emulator_wbinvd,
6204         .fix_hypercall       = emulator_fix_hypercall,
6205         .intercept           = emulator_intercept,
6206         .get_cpuid           = emulator_get_cpuid,
6207         .set_nmi_mask        = emulator_set_nmi_mask,
6208         .get_hflags          = emulator_get_hflags,
6209         .set_hflags          = emulator_set_hflags,
6210         .pre_leave_smm       = emulator_pre_leave_smm,
6211         .post_leave_smm      = emulator_post_leave_smm,
6212         .set_xcr             = emulator_set_xcr,
6213 };
6214
6215 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6216 {
6217         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6218         /*
6219          * an sti; sti; sequence only disable interrupts for the first
6220          * instruction. So, if the last instruction, be it emulated or
6221          * not, left the system with the INT_STI flag enabled, it
6222          * means that the last instruction is an sti. We should not
6223          * leave the flag on in this case. The same goes for mov ss
6224          */
6225         if (int_shadow & mask)
6226                 mask = 0;
6227         if (unlikely(int_shadow || mask)) {
6228                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6229                 if (!mask)
6230                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6231         }
6232 }
6233
6234 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6235 {
6236         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6237         if (ctxt->exception.vector == PF_VECTOR)
6238                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6239
6240         if (ctxt->exception.error_code_valid)
6241                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6242                                       ctxt->exception.error_code);
6243         else
6244                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6245         return false;
6246 }
6247
6248 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6249 {
6250         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6251         int cs_db, cs_l;
6252
6253         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6254
6255         ctxt->eflags = kvm_get_rflags(vcpu);
6256         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6257
6258         ctxt->eip = kvm_rip_read(vcpu);
6259         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6260                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6261                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6262                      cs_db                              ? X86EMUL_MODE_PROT32 :
6263                                                           X86EMUL_MODE_PROT16;
6264         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6265         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6266         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6267
6268         init_decode_cache(ctxt);
6269         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6270 }
6271
6272 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6273 {
6274         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6275         int ret;
6276
6277         init_emulate_ctxt(vcpu);
6278
6279         ctxt->op_bytes = 2;
6280         ctxt->ad_bytes = 2;
6281         ctxt->_eip = ctxt->eip + inc_eip;
6282         ret = emulate_int_real(ctxt, irq);
6283
6284         if (ret != X86EMUL_CONTINUE)
6285                 return EMULATE_FAIL;
6286
6287         ctxt->eip = ctxt->_eip;
6288         kvm_rip_write(vcpu, ctxt->eip);
6289         kvm_set_rflags(vcpu, ctxt->eflags);
6290
6291         return EMULATE_DONE;
6292 }
6293 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6294
6295 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6296 {
6297         int r = EMULATE_DONE;
6298
6299         ++vcpu->stat.insn_emulation_fail;
6300         trace_kvm_emulate_insn_failed(vcpu);
6301
6302         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6303                 return EMULATE_FAIL;
6304
6305         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6306                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6307                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6308                 vcpu->run->internal.ndata = 0;
6309                 r = EMULATE_USER_EXIT;
6310         }
6311
6312         kvm_queue_exception(vcpu, UD_VECTOR);
6313
6314         return r;
6315 }
6316
6317 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6318                                   bool write_fault_to_shadow_pgtable,
6319                                   int emulation_type)
6320 {
6321         gpa_t gpa = cr2;
6322         kvm_pfn_t pfn;
6323
6324         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6325                 return false;
6326
6327         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6328                 return false;
6329
6330         if (!vcpu->arch.mmu->direct_map) {
6331                 /*
6332                  * Write permission should be allowed since only
6333                  * write access need to be emulated.
6334                  */
6335                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6336
6337                 /*
6338                  * If the mapping is invalid in guest, let cpu retry
6339                  * it to generate fault.
6340                  */
6341                 if (gpa == UNMAPPED_GVA)
6342                         return true;
6343         }
6344
6345         /*
6346          * Do not retry the unhandleable instruction if it faults on the
6347          * readonly host memory, otherwise it will goto a infinite loop:
6348          * retry instruction -> write #PF -> emulation fail -> retry
6349          * instruction -> ...
6350          */
6351         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6352
6353         /*
6354          * If the instruction failed on the error pfn, it can not be fixed,
6355          * report the error to userspace.
6356          */
6357         if (is_error_noslot_pfn(pfn))
6358                 return false;
6359
6360         kvm_release_pfn_clean(pfn);
6361
6362         /* The instructions are well-emulated on direct mmu. */
6363         if (vcpu->arch.mmu->direct_map) {
6364                 unsigned int indirect_shadow_pages;
6365
6366                 spin_lock(&vcpu->kvm->mmu_lock);
6367                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6368                 spin_unlock(&vcpu->kvm->mmu_lock);
6369
6370                 if (indirect_shadow_pages)
6371                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6372
6373                 return true;
6374         }
6375
6376         /*
6377          * if emulation was due to access to shadowed page table
6378          * and it failed try to unshadow page and re-enter the
6379          * guest to let CPU execute the instruction.
6380          */
6381         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6382
6383         /*
6384          * If the access faults on its page table, it can not
6385          * be fixed by unprotecting shadow page and it should
6386          * be reported to userspace.
6387          */
6388         return !write_fault_to_shadow_pgtable;
6389 }
6390
6391 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6392                               unsigned long cr2,  int emulation_type)
6393 {
6394         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6395         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6396
6397         last_retry_eip = vcpu->arch.last_retry_eip;
6398         last_retry_addr = vcpu->arch.last_retry_addr;
6399
6400         /*
6401          * If the emulation is caused by #PF and it is non-page_table
6402          * writing instruction, it means the VM-EXIT is caused by shadow
6403          * page protected, we can zap the shadow page and retry this
6404          * instruction directly.
6405          *
6406          * Note: if the guest uses a non-page-table modifying instruction
6407          * on the PDE that points to the instruction, then we will unmap
6408          * the instruction and go to an infinite loop. So, we cache the
6409          * last retried eip and the last fault address, if we meet the eip
6410          * and the address again, we can break out of the potential infinite
6411          * loop.
6412          */
6413         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6414
6415         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6416                 return false;
6417
6418         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6419                 return false;
6420
6421         if (x86_page_table_writing_insn(ctxt))
6422                 return false;
6423
6424         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6425                 return false;
6426
6427         vcpu->arch.last_retry_eip = ctxt->eip;
6428         vcpu->arch.last_retry_addr = cr2;
6429
6430         if (!vcpu->arch.mmu->direct_map)
6431                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6432
6433         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6434
6435         return true;
6436 }
6437
6438 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6439 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6440
6441 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6442 {
6443         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6444                 /* This is a good place to trace that we are exiting SMM.  */
6445                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6446
6447                 /* Process a latched INIT or SMI, if any.  */
6448                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6449         }
6450
6451         kvm_mmu_reset_context(vcpu);
6452 }
6453
6454 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6455                                 unsigned long *db)
6456 {
6457         u32 dr6 = 0;
6458         int i;
6459         u32 enable, rwlen;
6460
6461         enable = dr7;
6462         rwlen = dr7 >> 16;
6463         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6464                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6465                         dr6 |= (1 << i);
6466         return dr6;
6467 }
6468
6469 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6470 {
6471         struct kvm_run *kvm_run = vcpu->run;
6472
6473         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6474                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6475                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6476                 kvm_run->debug.arch.exception = DB_VECTOR;
6477                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6478                 *r = EMULATE_USER_EXIT;
6479         } else {
6480                 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6481         }
6482 }
6483
6484 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6485 {
6486         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6487         int r;
6488
6489         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6490         if (unlikely(r != EMULATE_DONE))
6491                 return 0;
6492
6493         /*
6494          * rflags is the old, "raw" value of the flags.  The new value has
6495          * not been saved yet.
6496          *
6497          * This is correct even for TF set by the guest, because "the
6498          * processor will not generate this exception after the instruction
6499          * that sets the TF flag".
6500          */
6501         if (unlikely(rflags & X86_EFLAGS_TF))
6502                 kvm_vcpu_do_singlestep(vcpu, &r);
6503         return r == EMULATE_DONE;
6504 }
6505 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6506
6507 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6508 {
6509         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6510             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6511                 struct kvm_run *kvm_run = vcpu->run;
6512                 unsigned long eip = kvm_get_linear_rip(vcpu);
6513                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6514                                            vcpu->arch.guest_debug_dr7,
6515                                            vcpu->arch.eff_db);
6516
6517                 if (dr6 != 0) {
6518                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6519                         kvm_run->debug.arch.pc = eip;
6520                         kvm_run->debug.arch.exception = DB_VECTOR;
6521                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6522                         *r = EMULATE_USER_EXIT;
6523                         return true;
6524                 }
6525         }
6526
6527         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6528             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6529                 unsigned long eip = kvm_get_linear_rip(vcpu);
6530                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6531                                            vcpu->arch.dr7,
6532                                            vcpu->arch.db);
6533
6534                 if (dr6 != 0) {
6535                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6536                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6537                         kvm_queue_exception(vcpu, DB_VECTOR);
6538                         *r = EMULATE_DONE;
6539                         return true;
6540                 }
6541         }
6542
6543         return false;
6544 }
6545
6546 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6547 {
6548         switch (ctxt->opcode_len) {
6549         case 1:
6550                 switch (ctxt->b) {
6551                 case 0xe4:      /* IN */
6552                 case 0xe5:
6553                 case 0xec:
6554                 case 0xed:
6555                 case 0xe6:      /* OUT */
6556                 case 0xe7:
6557                 case 0xee:
6558                 case 0xef:
6559                 case 0x6c:      /* INS */
6560                 case 0x6d:
6561                 case 0x6e:      /* OUTS */
6562                 case 0x6f:
6563                         return true;
6564                 }
6565                 break;
6566         case 2:
6567                 switch (ctxt->b) {
6568                 case 0x33:      /* RDPMC */
6569                         return true;
6570                 }
6571                 break;
6572         }
6573
6574         return false;
6575 }
6576
6577 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6578                             unsigned long cr2,
6579                             int emulation_type,
6580                             void *insn,
6581                             int insn_len)
6582 {
6583         int r;
6584         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6585         bool writeback = true;
6586         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6587
6588         vcpu->arch.l1tf_flush_l1d = true;
6589
6590         /*
6591          * Clear write_fault_to_shadow_pgtable here to ensure it is
6592          * never reused.
6593          */
6594         vcpu->arch.write_fault_to_shadow_pgtable = false;
6595         kvm_clear_exception_queue(vcpu);
6596
6597         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6598                 init_emulate_ctxt(vcpu);
6599
6600                 /*
6601                  * We will reenter on the same instruction since
6602                  * we do not set complete_userspace_io.  This does not
6603                  * handle watchpoints yet, those would be handled in
6604                  * the emulate_ops.
6605                  */
6606                 if (!(emulation_type & EMULTYPE_SKIP) &&
6607                     kvm_vcpu_check_breakpoint(vcpu, &r))
6608                         return r;
6609
6610                 ctxt->interruptibility = 0;
6611                 ctxt->have_exception = false;
6612                 ctxt->exception.vector = -1;
6613                 ctxt->perm_ok = false;
6614
6615                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6616
6617                 r = x86_decode_insn(ctxt, insn, insn_len);
6618
6619                 trace_kvm_emulate_insn_start(vcpu);
6620                 ++vcpu->stat.insn_emulation;
6621                 if (r != EMULATION_OK)  {
6622                         if (emulation_type & EMULTYPE_TRAP_UD)
6623                                 return EMULATE_FAIL;
6624                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6625                                                 emulation_type))
6626                                 return EMULATE_DONE;
6627                         if (ctxt->have_exception) {
6628                                 /*
6629                                  * #UD should result in just EMULATION_FAILED, and trap-like
6630                                  * exception should not be encountered during decode.
6631                                  */
6632                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
6633                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
6634                                 inject_emulated_exception(vcpu);
6635                                 return EMULATE_DONE;
6636                         }
6637                         if (emulation_type & EMULTYPE_SKIP)
6638                                 return EMULATE_FAIL;
6639                         return handle_emulation_failure(vcpu, emulation_type);
6640                 }
6641         }
6642
6643         if ((emulation_type & EMULTYPE_VMWARE) &&
6644             !is_vmware_backdoor_opcode(ctxt))
6645                 return EMULATE_FAIL;
6646
6647         if (emulation_type & EMULTYPE_SKIP) {
6648                 kvm_rip_write(vcpu, ctxt->_eip);
6649                 if (ctxt->eflags & X86_EFLAGS_RF)
6650                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6651                 kvm_x86_ops->set_interrupt_shadow(vcpu, 0);
6652                 return EMULATE_DONE;
6653         }
6654
6655         if (retry_instruction(ctxt, cr2, emulation_type))
6656                 return EMULATE_DONE;
6657
6658         /* this is needed for vmware backdoor interface to work since it
6659            changes registers values  during IO operation */
6660         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6661                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6662                 emulator_invalidate_register_cache(ctxt);
6663         }
6664
6665 restart:
6666         /* Save the faulting GPA (cr2) in the address field */
6667         ctxt->exception.address = cr2;
6668
6669         r = x86_emulate_insn(ctxt);
6670
6671         if (r == EMULATION_INTERCEPTED)
6672                 return EMULATE_DONE;
6673
6674         if (r == EMULATION_FAILED) {
6675                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6676                                         emulation_type))
6677                         return EMULATE_DONE;
6678
6679                 return handle_emulation_failure(vcpu, emulation_type);
6680         }
6681
6682         if (ctxt->have_exception) {
6683                 r = EMULATE_DONE;
6684                 if (inject_emulated_exception(vcpu))
6685                         return r;
6686         } else if (vcpu->arch.pio.count) {
6687                 if (!vcpu->arch.pio.in) {
6688                         /* FIXME: return into emulator if single-stepping.  */
6689                         vcpu->arch.pio.count = 0;
6690                 } else {
6691                         writeback = false;
6692                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6693                 }
6694                 r = EMULATE_USER_EXIT;
6695         } else if (vcpu->mmio_needed) {
6696                 if (!vcpu->mmio_is_write)
6697                         writeback = false;
6698                 r = EMULATE_USER_EXIT;
6699                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6700         } else if (r == EMULATION_RESTART)
6701                 goto restart;
6702         else
6703                 r = EMULATE_DONE;
6704
6705         if (writeback) {
6706                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6707                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6708                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6709                 if (!ctxt->have_exception ||
6710                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
6711                         kvm_rip_write(vcpu, ctxt->eip);
6712                         if (r == EMULATE_DONE && ctxt->tf)
6713                                 kvm_vcpu_do_singlestep(vcpu, &r);
6714                         __kvm_set_rflags(vcpu, ctxt->eflags);
6715                 }
6716
6717                 /*
6718                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6719                  * do nothing, and it will be requested again as soon as
6720                  * the shadow expires.  But we still need to check here,
6721                  * because POPF has no interrupt shadow.
6722                  */
6723                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6724                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6725         } else
6726                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6727
6728         return r;
6729 }
6730
6731 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6732 {
6733         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6734 }
6735 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6736
6737 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6738                                         void *insn, int insn_len)
6739 {
6740         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6741 }
6742 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6743
6744 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6745 {
6746         vcpu->arch.pio.count = 0;
6747         return 1;
6748 }
6749
6750 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6751 {
6752         vcpu->arch.pio.count = 0;
6753
6754         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6755                 return 1;
6756
6757         return kvm_skip_emulated_instruction(vcpu);
6758 }
6759
6760 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6761                             unsigned short port)
6762 {
6763         unsigned long val = kvm_rax_read(vcpu);
6764         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6765                                             size, port, &val, 1);
6766         if (ret)
6767                 return ret;
6768
6769         /*
6770          * Workaround userspace that relies on old KVM behavior of %rip being
6771          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6772          */
6773         if (port == 0x7e &&
6774             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6775                 vcpu->arch.complete_userspace_io =
6776                         complete_fast_pio_out_port_0x7e;
6777                 kvm_skip_emulated_instruction(vcpu);
6778         } else {
6779                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6780                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6781         }
6782         return 0;
6783 }
6784
6785 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6786 {
6787         unsigned long val;
6788
6789         /* We should only ever be called with arch.pio.count equal to 1 */
6790         BUG_ON(vcpu->arch.pio.count != 1);
6791
6792         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6793                 vcpu->arch.pio.count = 0;
6794                 return 1;
6795         }
6796
6797         /* For size less than 4 we merge, else we zero extend */
6798         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6799
6800         /*
6801          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6802          * the copy and tracing
6803          */
6804         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6805                                  vcpu->arch.pio.port, &val, 1);
6806         kvm_rax_write(vcpu, val);
6807
6808         return kvm_skip_emulated_instruction(vcpu);
6809 }
6810
6811 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6812                            unsigned short port)
6813 {
6814         unsigned long val;
6815         int ret;
6816
6817         /* For size less than 4 we merge, else we zero extend */
6818         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6819
6820         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6821                                        &val, 1);
6822         if (ret) {
6823                 kvm_rax_write(vcpu, val);
6824                 return ret;
6825         }
6826
6827         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6828         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6829
6830         return 0;
6831 }
6832
6833 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6834 {
6835         int ret;
6836
6837         if (in)
6838                 ret = kvm_fast_pio_in(vcpu, size, port);
6839         else
6840                 ret = kvm_fast_pio_out(vcpu, size, port);
6841         return ret && kvm_skip_emulated_instruction(vcpu);
6842 }
6843 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6844
6845 static int kvmclock_cpu_down_prep(unsigned int cpu)
6846 {
6847         __this_cpu_write(cpu_tsc_khz, 0);
6848         return 0;
6849 }
6850
6851 static void tsc_khz_changed(void *data)
6852 {
6853         struct cpufreq_freqs *freq = data;
6854         unsigned long khz = 0;
6855
6856         if (data)
6857                 khz = freq->new;
6858         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6859                 khz = cpufreq_quick_get(raw_smp_processor_id());
6860         if (!khz)
6861                 khz = tsc_khz;
6862         __this_cpu_write(cpu_tsc_khz, khz);
6863 }
6864
6865 #ifdef CONFIG_X86_64
6866 static void kvm_hyperv_tsc_notifier(void)
6867 {
6868         struct kvm *kvm;
6869         struct kvm_vcpu *vcpu;
6870         int cpu;
6871
6872         mutex_lock(&kvm_lock);
6873         list_for_each_entry(kvm, &vm_list, vm_list)
6874                 kvm_make_mclock_inprogress_request(kvm);
6875
6876         hyperv_stop_tsc_emulation();
6877
6878         /* TSC frequency always matches when on Hyper-V */
6879         for_each_present_cpu(cpu)
6880                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6881         kvm_max_guest_tsc_khz = tsc_khz;
6882
6883         list_for_each_entry(kvm, &vm_list, vm_list) {
6884                 struct kvm_arch *ka = &kvm->arch;
6885
6886                 spin_lock(&ka->pvclock_gtod_sync_lock);
6887
6888                 pvclock_update_vm_gtod_copy(kvm);
6889
6890                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6891                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6892
6893                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6894                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6895
6896                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6897         }
6898         mutex_unlock(&kvm_lock);
6899 }
6900 #endif
6901
6902 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6903 {
6904         struct kvm *kvm;
6905         struct kvm_vcpu *vcpu;
6906         int i, send_ipi = 0;
6907
6908         /*
6909          * We allow guests to temporarily run on slowing clocks,
6910          * provided we notify them after, or to run on accelerating
6911          * clocks, provided we notify them before.  Thus time never
6912          * goes backwards.
6913          *
6914          * However, we have a problem.  We can't atomically update
6915          * the frequency of a given CPU from this function; it is
6916          * merely a notifier, which can be called from any CPU.
6917          * Changing the TSC frequency at arbitrary points in time
6918          * requires a recomputation of local variables related to
6919          * the TSC for each VCPU.  We must flag these local variables
6920          * to be updated and be sure the update takes place with the
6921          * new frequency before any guests proceed.
6922          *
6923          * Unfortunately, the combination of hotplug CPU and frequency
6924          * change creates an intractable locking scenario; the order
6925          * of when these callouts happen is undefined with respect to
6926          * CPU hotplug, and they can race with each other.  As such,
6927          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6928          * undefined; you can actually have a CPU frequency change take
6929          * place in between the computation of X and the setting of the
6930          * variable.  To protect against this problem, all updates of
6931          * the per_cpu tsc_khz variable are done in an interrupt
6932          * protected IPI, and all callers wishing to update the value
6933          * must wait for a synchronous IPI to complete (which is trivial
6934          * if the caller is on the CPU already).  This establishes the
6935          * necessary total order on variable updates.
6936          *
6937          * Note that because a guest time update may take place
6938          * anytime after the setting of the VCPU's request bit, the
6939          * correct TSC value must be set before the request.  However,
6940          * to ensure the update actually makes it to any guest which
6941          * starts running in hardware virtualization between the set
6942          * and the acquisition of the spinlock, we must also ping the
6943          * CPU after setting the request bit.
6944          *
6945          */
6946
6947         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6948
6949         mutex_lock(&kvm_lock);
6950         list_for_each_entry(kvm, &vm_list, vm_list) {
6951                 kvm_for_each_vcpu(i, vcpu, kvm) {
6952                         if (vcpu->cpu != cpu)
6953                                 continue;
6954                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6955                         if (vcpu->cpu != raw_smp_processor_id())
6956                                 send_ipi = 1;
6957                 }
6958         }
6959         mutex_unlock(&kvm_lock);
6960
6961         if (freq->old < freq->new && send_ipi) {
6962                 /*
6963                  * We upscale the frequency.  Must make the guest
6964                  * doesn't see old kvmclock values while running with
6965                  * the new frequency, otherwise we risk the guest sees
6966                  * time go backwards.
6967                  *
6968                  * In case we update the frequency for another cpu
6969                  * (which might be in guest context) send an interrupt
6970                  * to kick the cpu out of guest context.  Next time
6971                  * guest context is entered kvmclock will be updated,
6972                  * so the guest will not see stale values.
6973                  */
6974                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6975         }
6976 }
6977
6978 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6979                                      void *data)
6980 {
6981         struct cpufreq_freqs *freq = data;
6982         int cpu;
6983
6984         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6985                 return 0;
6986         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6987                 return 0;
6988
6989         for_each_cpu(cpu, freq->policy->cpus)
6990                 __kvmclock_cpufreq_notifier(freq, cpu);
6991
6992         return 0;
6993 }
6994
6995 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6996         .notifier_call  = kvmclock_cpufreq_notifier
6997 };
6998
6999 static int kvmclock_cpu_online(unsigned int cpu)
7000 {
7001         tsc_khz_changed(NULL);
7002         return 0;
7003 }
7004
7005 static void kvm_timer_init(void)
7006 {
7007         max_tsc_khz = tsc_khz;
7008
7009         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7010 #ifdef CONFIG_CPU_FREQ
7011                 struct cpufreq_policy policy;
7012                 int cpu;
7013
7014                 memset(&policy, 0, sizeof(policy));
7015                 cpu = get_cpu();
7016                 cpufreq_get_policy(&policy, cpu);
7017                 if (policy.cpuinfo.max_freq)
7018                         max_tsc_khz = policy.cpuinfo.max_freq;
7019                 put_cpu();
7020 #endif
7021                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7022                                           CPUFREQ_TRANSITION_NOTIFIER);
7023         }
7024
7025         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7026                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7027 }
7028
7029 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7030 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7031
7032 int kvm_is_in_guest(void)
7033 {
7034         return __this_cpu_read(current_vcpu) != NULL;
7035 }
7036
7037 static int kvm_is_user_mode(void)
7038 {
7039         int user_mode = 3;
7040
7041         if (__this_cpu_read(current_vcpu))
7042                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
7043
7044         return user_mode != 0;
7045 }
7046
7047 static unsigned long kvm_get_guest_ip(void)
7048 {
7049         unsigned long ip = 0;
7050
7051         if (__this_cpu_read(current_vcpu))
7052                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7053
7054         return ip;
7055 }
7056
7057 static void kvm_handle_intel_pt_intr(void)
7058 {
7059         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7060
7061         kvm_make_request(KVM_REQ_PMI, vcpu);
7062         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7063                         (unsigned long *)&vcpu->arch.pmu.global_status);
7064 }
7065
7066 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7067         .is_in_guest            = kvm_is_in_guest,
7068         .is_user_mode           = kvm_is_user_mode,
7069         .get_guest_ip           = kvm_get_guest_ip,
7070         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7071 };
7072
7073 #ifdef CONFIG_X86_64
7074 static void pvclock_gtod_update_fn(struct work_struct *work)
7075 {
7076         struct kvm *kvm;
7077
7078         struct kvm_vcpu *vcpu;
7079         int i;
7080
7081         mutex_lock(&kvm_lock);
7082         list_for_each_entry(kvm, &vm_list, vm_list)
7083                 kvm_for_each_vcpu(i, vcpu, kvm)
7084                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7085         atomic_set(&kvm_guest_has_master_clock, 0);
7086         mutex_unlock(&kvm_lock);
7087 }
7088
7089 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7090
7091 /*
7092  * Notification about pvclock gtod data update.
7093  */
7094 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7095                                void *priv)
7096 {
7097         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7098         struct timekeeper *tk = priv;
7099
7100         update_pvclock_gtod(tk);
7101
7102         /* disable master clock if host does not trust, or does not
7103          * use, TSC based clocksource.
7104          */
7105         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7106             atomic_read(&kvm_guest_has_master_clock) != 0)
7107                 queue_work(system_long_wq, &pvclock_gtod_work);
7108
7109         return 0;
7110 }
7111
7112 static struct notifier_block pvclock_gtod_notifier = {
7113         .notifier_call = pvclock_gtod_notify,
7114 };
7115 #endif
7116
7117 int kvm_arch_init(void *opaque)
7118 {
7119         int r;
7120         struct kvm_x86_ops *ops = opaque;
7121
7122         if (kvm_x86_ops) {
7123                 printk(KERN_ERR "kvm: already loaded the other module\n");
7124                 r = -EEXIST;
7125                 goto out;
7126         }
7127
7128         if (!ops->cpu_has_kvm_support()) {
7129                 printk(KERN_ERR "kvm: no hardware support\n");
7130                 r = -EOPNOTSUPP;
7131                 goto out;
7132         }
7133         if (ops->disabled_by_bios()) {
7134                 printk(KERN_ERR "kvm: disabled by bios\n");
7135                 r = -EOPNOTSUPP;
7136                 goto out;
7137         }
7138
7139         /*
7140          * KVM explicitly assumes that the guest has an FPU and
7141          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7142          * vCPU's FPU state as a fxregs_state struct.
7143          */
7144         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7145                 printk(KERN_ERR "kvm: inadequate fpu\n");
7146                 r = -EOPNOTSUPP;
7147                 goto out;
7148         }
7149
7150         r = -ENOMEM;
7151         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7152                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7153                                           NULL);
7154         if (!x86_fpu_cache) {
7155                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7156                 goto out;
7157         }
7158
7159         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7160         if (!shared_msrs) {
7161                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7162                 goto out_free_x86_fpu_cache;
7163         }
7164
7165         r = kvm_mmu_module_init();
7166         if (r)
7167                 goto out_free_percpu;
7168
7169         kvm_x86_ops = ops;
7170
7171         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7172                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7173                         PT_PRESENT_MASK, 0, sme_me_mask);
7174         kvm_timer_init();
7175
7176         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7177
7178         if (boot_cpu_has(X86_FEATURE_XSAVE))
7179                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7180
7181         kvm_lapic_init();
7182         if (pi_inject_timer == -1)
7183                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7184 #ifdef CONFIG_X86_64
7185         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7186
7187         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7188                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7189 #endif
7190
7191         return 0;
7192
7193 out_free_percpu:
7194         free_percpu(shared_msrs);
7195 out_free_x86_fpu_cache:
7196         kmem_cache_destroy(x86_fpu_cache);
7197 out:
7198         return r;
7199 }
7200
7201 void kvm_arch_exit(void)
7202 {
7203 #ifdef CONFIG_X86_64
7204         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7205                 clear_hv_tscchange_cb();
7206 #endif
7207         kvm_lapic_exit();
7208         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7209
7210         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7211                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7212                                             CPUFREQ_TRANSITION_NOTIFIER);
7213         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7214 #ifdef CONFIG_X86_64
7215         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7216 #endif
7217         kvm_x86_ops = NULL;
7218         kvm_mmu_module_exit();
7219         free_percpu(shared_msrs);
7220         kmem_cache_destroy(x86_fpu_cache);
7221 }
7222
7223 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7224 {
7225         ++vcpu->stat.halt_exits;
7226         if (lapic_in_kernel(vcpu)) {
7227                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7228                 return 1;
7229         } else {
7230                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7231                 return 0;
7232         }
7233 }
7234 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7235
7236 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7237 {
7238         int ret = kvm_skip_emulated_instruction(vcpu);
7239         /*
7240          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7241          * KVM_EXIT_DEBUG here.
7242          */
7243         return kvm_vcpu_halt(vcpu) && ret;
7244 }
7245 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7246
7247 #ifdef CONFIG_X86_64
7248 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7249                                 unsigned long clock_type)
7250 {
7251         struct kvm_clock_pairing clock_pairing;
7252         struct timespec64 ts;
7253         u64 cycle;
7254         int ret;
7255
7256         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7257                 return -KVM_EOPNOTSUPP;
7258
7259         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7260                 return -KVM_EOPNOTSUPP;
7261
7262         clock_pairing.sec = ts.tv_sec;
7263         clock_pairing.nsec = ts.tv_nsec;
7264         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7265         clock_pairing.flags = 0;
7266         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7267
7268         ret = 0;
7269         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7270                             sizeof(struct kvm_clock_pairing)))
7271                 ret = -KVM_EFAULT;
7272
7273         return ret;
7274 }
7275 #endif
7276
7277 /*
7278  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7279  *
7280  * @apicid - apicid of vcpu to be kicked.
7281  */
7282 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7283 {
7284         struct kvm_lapic_irq lapic_irq;
7285
7286         lapic_irq.shorthand = 0;
7287         lapic_irq.dest_mode = 0;
7288         lapic_irq.level = 0;
7289         lapic_irq.dest_id = apicid;
7290         lapic_irq.msi_redir_hint = false;
7291
7292         lapic_irq.delivery_mode = APIC_DM_REMRD;
7293         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7294 }
7295
7296 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7297 {
7298         if (!lapic_in_kernel(vcpu)) {
7299                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7300                 return;
7301         }
7302         if (!vcpu->arch.apicv_active)
7303                 return;
7304
7305         vcpu->arch.apicv_active = false;
7306         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7307 }
7308
7309 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7310 {
7311         struct kvm_vcpu *target = NULL;
7312         struct kvm_apic_map *map;
7313
7314         rcu_read_lock();
7315         map = rcu_dereference(kvm->arch.apic_map);
7316
7317         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7318                 target = map->phys_map[dest_id]->vcpu;
7319
7320         rcu_read_unlock();
7321
7322         if (target && READ_ONCE(target->ready))
7323                 kvm_vcpu_yield_to(target);
7324 }
7325
7326 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7327 {
7328         unsigned long nr, a0, a1, a2, a3, ret;
7329         int op_64_bit;
7330
7331         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7332                 return kvm_hv_hypercall(vcpu);
7333
7334         nr = kvm_rax_read(vcpu);
7335         a0 = kvm_rbx_read(vcpu);
7336         a1 = kvm_rcx_read(vcpu);
7337         a2 = kvm_rdx_read(vcpu);
7338         a3 = kvm_rsi_read(vcpu);
7339
7340         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7341
7342         op_64_bit = is_64_bit_mode(vcpu);
7343         if (!op_64_bit) {
7344                 nr &= 0xFFFFFFFF;
7345                 a0 &= 0xFFFFFFFF;
7346                 a1 &= 0xFFFFFFFF;
7347                 a2 &= 0xFFFFFFFF;
7348                 a3 &= 0xFFFFFFFF;
7349         }
7350
7351         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7352                 ret = -KVM_EPERM;
7353                 goto out;
7354         }
7355
7356         switch (nr) {
7357         case KVM_HC_VAPIC_POLL_IRQ:
7358                 ret = 0;
7359                 break;
7360         case KVM_HC_KICK_CPU:
7361                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7362                 kvm_sched_yield(vcpu->kvm, a1);
7363                 ret = 0;
7364                 break;
7365 #ifdef CONFIG_X86_64
7366         case KVM_HC_CLOCK_PAIRING:
7367                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7368                 break;
7369 #endif
7370         case KVM_HC_SEND_IPI:
7371                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7372                 break;
7373         case KVM_HC_SCHED_YIELD:
7374                 kvm_sched_yield(vcpu->kvm, a0);
7375                 ret = 0;
7376                 break;
7377         default:
7378                 ret = -KVM_ENOSYS;
7379                 break;
7380         }
7381 out:
7382         if (!op_64_bit)
7383                 ret = (u32)ret;
7384         kvm_rax_write(vcpu, ret);
7385
7386         ++vcpu->stat.hypercalls;
7387         return kvm_skip_emulated_instruction(vcpu);
7388 }
7389 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7390
7391 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7392 {
7393         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7394         char instruction[3];
7395         unsigned long rip = kvm_rip_read(vcpu);
7396
7397         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7398
7399         return emulator_write_emulated(ctxt, rip, instruction, 3,
7400                 &ctxt->exception);
7401 }
7402
7403 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7404 {
7405         return vcpu->run->request_interrupt_window &&
7406                 likely(!pic_in_kernel(vcpu->kvm));
7407 }
7408
7409 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7410 {
7411         struct kvm_run *kvm_run = vcpu->run;
7412
7413         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7414         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7415         kvm_run->cr8 = kvm_get_cr8(vcpu);
7416         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7417         kvm_run->ready_for_interrupt_injection =
7418                 pic_in_kernel(vcpu->kvm) ||
7419                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7420 }
7421
7422 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7423 {
7424         int max_irr, tpr;
7425
7426         if (!kvm_x86_ops->update_cr8_intercept)
7427                 return;
7428
7429         if (!lapic_in_kernel(vcpu))
7430                 return;
7431
7432         if (vcpu->arch.apicv_active)
7433                 return;
7434
7435         if (!vcpu->arch.apic->vapic_addr)
7436                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7437         else
7438                 max_irr = -1;
7439
7440         if (max_irr != -1)
7441                 max_irr >>= 4;
7442
7443         tpr = kvm_lapic_get_cr8(vcpu);
7444
7445         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7446 }
7447
7448 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7449 {
7450         int r;
7451
7452         /* try to reinject previous events if any */
7453
7454         if (vcpu->arch.exception.injected)
7455                 kvm_x86_ops->queue_exception(vcpu);
7456         /*
7457          * Do not inject an NMI or interrupt if there is a pending
7458          * exception.  Exceptions and interrupts are recognized at
7459          * instruction boundaries, i.e. the start of an instruction.
7460          * Trap-like exceptions, e.g. #DB, have higher priority than
7461          * NMIs and interrupts, i.e. traps are recognized before an
7462          * NMI/interrupt that's pending on the same instruction.
7463          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7464          * priority, but are only generated (pended) during instruction
7465          * execution, i.e. a pending fault-like exception means the
7466          * fault occurred on the *previous* instruction and must be
7467          * serviced prior to recognizing any new events in order to
7468          * fully complete the previous instruction.
7469          */
7470         else if (!vcpu->arch.exception.pending) {
7471                 if (vcpu->arch.nmi_injected)
7472                         kvm_x86_ops->set_nmi(vcpu);
7473                 else if (vcpu->arch.interrupt.injected)
7474                         kvm_x86_ops->set_irq(vcpu);
7475         }
7476
7477         /*
7478          * Call check_nested_events() even if we reinjected a previous event
7479          * in order for caller to determine if it should require immediate-exit
7480          * from L2 to L1 due to pending L1 events which require exit
7481          * from L2 to L1.
7482          */
7483         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7484                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7485                 if (r != 0)
7486                         return r;
7487         }
7488
7489         /* try to inject new event if pending */
7490         if (vcpu->arch.exception.pending) {
7491                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7492                                         vcpu->arch.exception.has_error_code,
7493                                         vcpu->arch.exception.error_code);
7494
7495                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7496                 vcpu->arch.exception.pending = false;
7497                 vcpu->arch.exception.injected = true;
7498
7499                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7500                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7501                                              X86_EFLAGS_RF);
7502
7503                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7504                         /*
7505                          * This code assumes that nSVM doesn't use
7506                          * check_nested_events(). If it does, the
7507                          * DR6/DR7 changes should happen before L1
7508                          * gets a #VMEXIT for an intercepted #DB in
7509                          * L2.  (Under VMX, on the other hand, the
7510                          * DR6/DR7 changes should not happen in the
7511                          * event of a VM-exit to L1 for an intercepted
7512                          * #DB in L2.)
7513                          */
7514                         kvm_deliver_exception_payload(vcpu);
7515                         if (vcpu->arch.dr7 & DR7_GD) {
7516                                 vcpu->arch.dr7 &= ~DR7_GD;
7517                                 kvm_update_dr7(vcpu);
7518                         }
7519                 }
7520
7521                 kvm_x86_ops->queue_exception(vcpu);
7522         }
7523
7524         /* Don't consider new event if we re-injected an event */
7525         if (kvm_event_needs_reinjection(vcpu))
7526                 return 0;
7527
7528         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7529             kvm_x86_ops->smi_allowed(vcpu)) {
7530                 vcpu->arch.smi_pending = false;
7531                 ++vcpu->arch.smi_count;
7532                 enter_smm(vcpu);
7533         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7534                 --vcpu->arch.nmi_pending;
7535                 vcpu->arch.nmi_injected = true;
7536                 kvm_x86_ops->set_nmi(vcpu);
7537         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7538                 /*
7539                  * Because interrupts can be injected asynchronously, we are
7540                  * calling check_nested_events again here to avoid a race condition.
7541                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7542                  * proposal and current concerns.  Perhaps we should be setting
7543                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7544                  */
7545                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7546                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7547                         if (r != 0)
7548                                 return r;
7549                 }
7550                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7551                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7552                                             false);
7553                         kvm_x86_ops->set_irq(vcpu);
7554                 }
7555         }
7556
7557         return 0;
7558 }
7559
7560 static void process_nmi(struct kvm_vcpu *vcpu)
7561 {
7562         unsigned limit = 2;
7563
7564         /*
7565          * x86 is limited to one NMI running, and one NMI pending after it.
7566          * If an NMI is already in progress, limit further NMIs to just one.
7567          * Otherwise, allow two (and we'll inject the first one immediately).
7568          */
7569         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7570                 limit = 1;
7571
7572         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7573         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7574         kvm_make_request(KVM_REQ_EVENT, vcpu);
7575 }
7576
7577 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7578 {
7579         u32 flags = 0;
7580         flags |= seg->g       << 23;
7581         flags |= seg->db      << 22;
7582         flags |= seg->l       << 21;
7583         flags |= seg->avl     << 20;
7584         flags |= seg->present << 15;
7585         flags |= seg->dpl     << 13;
7586         flags |= seg->s       << 12;
7587         flags |= seg->type    << 8;
7588         return flags;
7589 }
7590
7591 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7592 {
7593         struct kvm_segment seg;
7594         int offset;
7595
7596         kvm_get_segment(vcpu, &seg, n);
7597         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7598
7599         if (n < 3)
7600                 offset = 0x7f84 + n * 12;
7601         else
7602                 offset = 0x7f2c + (n - 3) * 12;
7603
7604         put_smstate(u32, buf, offset + 8, seg.base);
7605         put_smstate(u32, buf, offset + 4, seg.limit);
7606         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7607 }
7608
7609 #ifdef CONFIG_X86_64
7610 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7611 {
7612         struct kvm_segment seg;
7613         int offset;
7614         u16 flags;
7615
7616         kvm_get_segment(vcpu, &seg, n);
7617         offset = 0x7e00 + n * 16;
7618
7619         flags = enter_smm_get_segment_flags(&seg) >> 8;
7620         put_smstate(u16, buf, offset, seg.selector);
7621         put_smstate(u16, buf, offset + 2, flags);
7622         put_smstate(u32, buf, offset + 4, seg.limit);
7623         put_smstate(u64, buf, offset + 8, seg.base);
7624 }
7625 #endif
7626
7627 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7628 {
7629         struct desc_ptr dt;
7630         struct kvm_segment seg;
7631         unsigned long val;
7632         int i;
7633
7634         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7635         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7636         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7637         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7638
7639         for (i = 0; i < 8; i++)
7640                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7641
7642         kvm_get_dr(vcpu, 6, &val);
7643         put_smstate(u32, buf, 0x7fcc, (u32)val);
7644         kvm_get_dr(vcpu, 7, &val);
7645         put_smstate(u32, buf, 0x7fc8, (u32)val);
7646
7647         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7648         put_smstate(u32, buf, 0x7fc4, seg.selector);
7649         put_smstate(u32, buf, 0x7f64, seg.base);
7650         put_smstate(u32, buf, 0x7f60, seg.limit);
7651         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7652
7653         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7654         put_smstate(u32, buf, 0x7fc0, seg.selector);
7655         put_smstate(u32, buf, 0x7f80, seg.base);
7656         put_smstate(u32, buf, 0x7f7c, seg.limit);
7657         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7658
7659         kvm_x86_ops->get_gdt(vcpu, &dt);
7660         put_smstate(u32, buf, 0x7f74, dt.address);
7661         put_smstate(u32, buf, 0x7f70, dt.size);
7662
7663         kvm_x86_ops->get_idt(vcpu, &dt);
7664         put_smstate(u32, buf, 0x7f58, dt.address);
7665         put_smstate(u32, buf, 0x7f54, dt.size);
7666
7667         for (i = 0; i < 6; i++)
7668                 enter_smm_save_seg_32(vcpu, buf, i);
7669
7670         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7671
7672         /* revision id */
7673         put_smstate(u32, buf, 0x7efc, 0x00020000);
7674         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7675 }
7676
7677 #ifdef CONFIG_X86_64
7678 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7679 {
7680         struct desc_ptr dt;
7681         struct kvm_segment seg;
7682         unsigned long val;
7683         int i;
7684
7685         for (i = 0; i < 16; i++)
7686                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7687
7688         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7689         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7690
7691         kvm_get_dr(vcpu, 6, &val);
7692         put_smstate(u64, buf, 0x7f68, val);
7693         kvm_get_dr(vcpu, 7, &val);
7694         put_smstate(u64, buf, 0x7f60, val);
7695
7696         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7697         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7698         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7699
7700         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7701
7702         /* revision id */
7703         put_smstate(u32, buf, 0x7efc, 0x00020064);
7704
7705         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7706
7707         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7708         put_smstate(u16, buf, 0x7e90, seg.selector);
7709         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7710         put_smstate(u32, buf, 0x7e94, seg.limit);
7711         put_smstate(u64, buf, 0x7e98, seg.base);
7712
7713         kvm_x86_ops->get_idt(vcpu, &dt);
7714         put_smstate(u32, buf, 0x7e84, dt.size);
7715         put_smstate(u64, buf, 0x7e88, dt.address);
7716
7717         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7718         put_smstate(u16, buf, 0x7e70, seg.selector);
7719         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7720         put_smstate(u32, buf, 0x7e74, seg.limit);
7721         put_smstate(u64, buf, 0x7e78, seg.base);
7722
7723         kvm_x86_ops->get_gdt(vcpu, &dt);
7724         put_smstate(u32, buf, 0x7e64, dt.size);
7725         put_smstate(u64, buf, 0x7e68, dt.address);
7726
7727         for (i = 0; i < 6; i++)
7728                 enter_smm_save_seg_64(vcpu, buf, i);
7729 }
7730 #endif
7731
7732 static void enter_smm(struct kvm_vcpu *vcpu)
7733 {
7734         struct kvm_segment cs, ds;
7735         struct desc_ptr dt;
7736         char buf[512];
7737         u32 cr0;
7738
7739         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7740         memset(buf, 0, 512);
7741 #ifdef CONFIG_X86_64
7742         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7743                 enter_smm_save_state_64(vcpu, buf);
7744         else
7745 #endif
7746                 enter_smm_save_state_32(vcpu, buf);
7747
7748         /*
7749          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7750          * vCPU state (e.g. leave guest mode) after we've saved the state into
7751          * the SMM state-save area.
7752          */
7753         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7754
7755         vcpu->arch.hflags |= HF_SMM_MASK;
7756         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7757
7758         if (kvm_x86_ops->get_nmi_mask(vcpu))
7759                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7760         else
7761                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7762
7763         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7764         kvm_rip_write(vcpu, 0x8000);
7765
7766         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7767         kvm_x86_ops->set_cr0(vcpu, cr0);
7768         vcpu->arch.cr0 = cr0;
7769
7770         kvm_x86_ops->set_cr4(vcpu, 0);
7771
7772         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7773         dt.address = dt.size = 0;
7774         kvm_x86_ops->set_idt(vcpu, &dt);
7775
7776         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7777
7778         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7779         cs.base = vcpu->arch.smbase;
7780
7781         ds.selector = 0;
7782         ds.base = 0;
7783
7784         cs.limit    = ds.limit = 0xffffffff;
7785         cs.type     = ds.type = 0x3;
7786         cs.dpl      = ds.dpl = 0;
7787         cs.db       = ds.db = 0;
7788         cs.s        = ds.s = 1;
7789         cs.l        = ds.l = 0;
7790         cs.g        = ds.g = 1;
7791         cs.avl      = ds.avl = 0;
7792         cs.present  = ds.present = 1;
7793         cs.unusable = ds.unusable = 0;
7794         cs.padding  = ds.padding = 0;
7795
7796         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7797         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7798         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7799         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7800         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7801         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7802
7803 #ifdef CONFIG_X86_64
7804         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7805                 kvm_x86_ops->set_efer(vcpu, 0);
7806 #endif
7807
7808         kvm_update_cpuid(vcpu);
7809         kvm_mmu_reset_context(vcpu);
7810 }
7811
7812 static void process_smi(struct kvm_vcpu *vcpu)
7813 {
7814         vcpu->arch.smi_pending = true;
7815         kvm_make_request(KVM_REQ_EVENT, vcpu);
7816 }
7817
7818 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7819 {
7820         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7821 }
7822
7823 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7824 {
7825         if (!kvm_apic_present(vcpu))
7826                 return;
7827
7828         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7829
7830         if (irqchip_split(vcpu->kvm))
7831                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7832         else {
7833                 if (vcpu->arch.apicv_active)
7834                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7835                 if (ioapic_in_kernel(vcpu->kvm))
7836                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7837         }
7838
7839         if (is_guest_mode(vcpu))
7840                 vcpu->arch.load_eoi_exitmap_pending = true;
7841         else
7842                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7843 }
7844
7845 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7846 {
7847         u64 eoi_exit_bitmap[4];
7848
7849         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7850                 return;
7851
7852         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7853                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7854         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7855 }
7856
7857 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7858                 unsigned long start, unsigned long end,
7859                 bool blockable)
7860 {
7861         unsigned long apic_address;
7862
7863         /*
7864          * The physical address of apic access page is stored in the VMCS.
7865          * Update it when it becomes invalid.
7866          */
7867         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7868         if (start <= apic_address && apic_address < end)
7869                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7870
7871         return 0;
7872 }
7873
7874 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7875 {
7876         struct page *page = NULL;
7877
7878         if (!lapic_in_kernel(vcpu))
7879                 return;
7880
7881         if (!kvm_x86_ops->set_apic_access_page_addr)
7882                 return;
7883
7884         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7885         if (is_error_page(page))
7886                 return;
7887         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7888
7889         /*
7890          * Do not pin apic access page in memory, the MMU notifier
7891          * will call us again if it is migrated or swapped out.
7892          */
7893         put_page(page);
7894 }
7895 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7896
7897 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7898 {
7899         smp_send_reschedule(vcpu->cpu);
7900 }
7901 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7902
7903 /*
7904  * Returns 1 to let vcpu_run() continue the guest execution loop without
7905  * exiting to the userspace.  Otherwise, the value will be returned to the
7906  * userspace.
7907  */
7908 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7909 {
7910         int r;
7911         bool req_int_win =
7912                 dm_request_for_irq_injection(vcpu) &&
7913                 kvm_cpu_accept_dm_intr(vcpu);
7914
7915         bool req_immediate_exit = false;
7916
7917         if (kvm_request_pending(vcpu)) {
7918                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7919                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7920                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7921                         kvm_mmu_unload(vcpu);
7922                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7923                         __kvm_migrate_timers(vcpu);
7924                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7925                         kvm_gen_update_masterclock(vcpu->kvm);
7926                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7927                         kvm_gen_kvmclock_update(vcpu);
7928                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7929                         r = kvm_guest_time_update(vcpu);
7930                         if (unlikely(r))
7931                                 goto out;
7932                 }
7933                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7934                         kvm_mmu_sync_roots(vcpu);
7935                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7936                         kvm_mmu_load_cr3(vcpu);
7937                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7938                         kvm_vcpu_flush_tlb(vcpu, true);
7939                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7940                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7941                         r = 0;
7942                         goto out;
7943                 }
7944                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7945                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7946                         vcpu->mmio_needed = 0;
7947                         r = 0;
7948                         goto out;
7949                 }
7950                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7951                         /* Page is swapped out. Do synthetic halt */
7952                         vcpu->arch.apf.halted = true;
7953                         r = 1;
7954                         goto out;
7955                 }
7956                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7957                         record_steal_time(vcpu);
7958                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7959                         process_smi(vcpu);
7960                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7961                         process_nmi(vcpu);
7962                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7963                         kvm_pmu_handle_event(vcpu);
7964                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7965                         kvm_pmu_deliver_pmi(vcpu);
7966                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7967                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7968                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7969                                      vcpu->arch.ioapic_handled_vectors)) {
7970                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7971                                 vcpu->run->eoi.vector =
7972                                                 vcpu->arch.pending_ioapic_eoi;
7973                                 r = 0;
7974                                 goto out;
7975                         }
7976                 }
7977                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7978                         vcpu_scan_ioapic(vcpu);
7979                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7980                         vcpu_load_eoi_exitmap(vcpu);
7981                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7982                         kvm_vcpu_reload_apic_access_page(vcpu);
7983                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7984                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7985                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7986                         r = 0;
7987                         goto out;
7988                 }
7989                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7990                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7991                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7992                         r = 0;
7993                         goto out;
7994                 }
7995                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7996                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7997                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7998                         r = 0;
7999                         goto out;
8000                 }
8001
8002                 /*
8003                  * KVM_REQ_HV_STIMER has to be processed after
8004                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8005                  * depend on the guest clock being up-to-date
8006                  */
8007                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8008                         kvm_hv_process_stimers(vcpu);
8009         }
8010
8011         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8012                 ++vcpu->stat.req_event;
8013                 kvm_apic_accept_events(vcpu);
8014                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8015                         r = 1;
8016                         goto out;
8017                 }
8018
8019                 if (inject_pending_event(vcpu, req_int_win) != 0)
8020                         req_immediate_exit = true;
8021                 else {
8022                         /* Enable SMI/NMI/IRQ window open exits if needed.
8023                          *
8024                          * SMIs have three cases:
8025                          * 1) They can be nested, and then there is nothing to
8026                          *    do here because RSM will cause a vmexit anyway.
8027                          * 2) There is an ISA-specific reason why SMI cannot be
8028                          *    injected, and the moment when this changes can be
8029                          *    intercepted.
8030                          * 3) Or the SMI can be pending because
8031                          *    inject_pending_event has completed the injection
8032                          *    of an IRQ or NMI from the previous vmexit, and
8033                          *    then we request an immediate exit to inject the
8034                          *    SMI.
8035                          */
8036                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
8037                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
8038                                         req_immediate_exit = true;
8039                         if (vcpu->arch.nmi_pending)
8040                                 kvm_x86_ops->enable_nmi_window(vcpu);
8041                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
8042                                 kvm_x86_ops->enable_irq_window(vcpu);
8043                         WARN_ON(vcpu->arch.exception.pending);
8044                 }
8045
8046                 if (kvm_lapic_enabled(vcpu)) {
8047                         update_cr8_intercept(vcpu);
8048                         kvm_lapic_sync_to_vapic(vcpu);
8049                 }
8050         }
8051
8052         r = kvm_mmu_reload(vcpu);
8053         if (unlikely(r)) {
8054                 goto cancel_injection;
8055         }
8056
8057         preempt_disable();
8058
8059         kvm_x86_ops->prepare_guest_switch(vcpu);
8060
8061         /*
8062          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8063          * IPI are then delayed after guest entry, which ensures that they
8064          * result in virtual interrupt delivery.
8065          */
8066         local_irq_disable();
8067         vcpu->mode = IN_GUEST_MODE;
8068
8069         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8070
8071         /*
8072          * 1) We should set ->mode before checking ->requests.  Please see
8073          * the comment in kvm_vcpu_exiting_guest_mode().
8074          *
8075          * 2) For APICv, we should set ->mode before checking PID.ON. This
8076          * pairs with the memory barrier implicit in pi_test_and_set_on
8077          * (see vmx_deliver_posted_interrupt).
8078          *
8079          * 3) This also orders the write to mode from any reads to the page
8080          * tables done while the VCPU is running.  Please see the comment
8081          * in kvm_flush_remote_tlbs.
8082          */
8083         smp_mb__after_srcu_read_unlock();
8084
8085         /*
8086          * This handles the case where a posted interrupt was
8087          * notified with kvm_vcpu_kick.
8088          */
8089         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8090                 kvm_x86_ops->sync_pir_to_irr(vcpu);
8091
8092         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
8093             || need_resched() || signal_pending(current)) {
8094                 vcpu->mode = OUTSIDE_GUEST_MODE;
8095                 smp_wmb();
8096                 local_irq_enable();
8097                 preempt_enable();
8098                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8099                 r = 1;
8100                 goto cancel_injection;
8101         }
8102
8103         if (req_immediate_exit) {
8104                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8105                 kvm_x86_ops->request_immediate_exit(vcpu);
8106         }
8107
8108         trace_kvm_entry(vcpu->vcpu_id);
8109         guest_enter_irqoff();
8110
8111         /* The preempt notifier should have taken care of the FPU already.  */
8112         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8113
8114         if (unlikely(vcpu->arch.switch_db_regs)) {
8115                 set_debugreg(0, 7);
8116                 set_debugreg(vcpu->arch.eff_db[0], 0);
8117                 set_debugreg(vcpu->arch.eff_db[1], 1);
8118                 set_debugreg(vcpu->arch.eff_db[2], 2);
8119                 set_debugreg(vcpu->arch.eff_db[3], 3);
8120                 set_debugreg(vcpu->arch.dr6, 6);
8121                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8122         }
8123
8124         kvm_x86_ops->run(vcpu);
8125
8126         /*
8127          * Do this here before restoring debug registers on the host.  And
8128          * since we do this before handling the vmexit, a DR access vmexit
8129          * can (a) read the correct value of the debug registers, (b) set
8130          * KVM_DEBUGREG_WONT_EXIT again.
8131          */
8132         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8133                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8134                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8135                 kvm_update_dr0123(vcpu);
8136                 kvm_update_dr6(vcpu);
8137                 kvm_update_dr7(vcpu);
8138                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8139         }
8140
8141         /*
8142          * If the guest has used debug registers, at least dr7
8143          * will be disabled while returning to the host.
8144          * If we don't have active breakpoints in the host, we don't
8145          * care about the messed up debug address registers. But if
8146          * we have some of them active, restore the old state.
8147          */
8148         if (hw_breakpoint_active())
8149                 hw_breakpoint_restore();
8150
8151         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8152
8153         vcpu->mode = OUTSIDE_GUEST_MODE;
8154         smp_wmb();
8155
8156         kvm_x86_ops->handle_exit_irqoff(vcpu);
8157
8158         /*
8159          * Consume any pending interrupts, including the possible source of
8160          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8161          * An instruction is required after local_irq_enable() to fully unblock
8162          * interrupts on processors that implement an interrupt shadow, the
8163          * stat.exits increment will do nicely.
8164          */
8165         kvm_before_interrupt(vcpu);
8166         local_irq_enable();
8167         ++vcpu->stat.exits;
8168         local_irq_disable();
8169         kvm_after_interrupt(vcpu);
8170
8171         guest_exit_irqoff();
8172         if (lapic_in_kernel(vcpu)) {
8173                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8174                 if (delta != S64_MIN) {
8175                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8176                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8177                 }
8178         }
8179
8180         local_irq_enable();
8181         preempt_enable();
8182
8183         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8184
8185         /*
8186          * Profile KVM exit RIPs:
8187          */
8188         if (unlikely(prof_on == KVM_PROFILING)) {
8189                 unsigned long rip = kvm_rip_read(vcpu);
8190                 profile_hit(KVM_PROFILING, (void *)rip);
8191         }
8192
8193         if (unlikely(vcpu->arch.tsc_always_catchup))
8194                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8195
8196         if (vcpu->arch.apic_attention)
8197                 kvm_lapic_sync_from_vapic(vcpu);
8198
8199         vcpu->arch.gpa_available = false;
8200         r = kvm_x86_ops->handle_exit(vcpu);
8201         return r;
8202
8203 cancel_injection:
8204         kvm_x86_ops->cancel_injection(vcpu);
8205         if (unlikely(vcpu->arch.apic_attention))
8206                 kvm_lapic_sync_from_vapic(vcpu);
8207 out:
8208         return r;
8209 }
8210
8211 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8212 {
8213         if (!kvm_arch_vcpu_runnable(vcpu) &&
8214             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8215                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8216                 kvm_vcpu_block(vcpu);
8217                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8218
8219                 if (kvm_x86_ops->post_block)
8220                         kvm_x86_ops->post_block(vcpu);
8221
8222                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8223                         return 1;
8224         }
8225
8226         kvm_apic_accept_events(vcpu);
8227         switch(vcpu->arch.mp_state) {
8228         case KVM_MP_STATE_HALTED:
8229                 vcpu->arch.pv.pv_unhalted = false;
8230                 vcpu->arch.mp_state =
8231                         KVM_MP_STATE_RUNNABLE;
8232                 /* fall through */
8233         case KVM_MP_STATE_RUNNABLE:
8234                 vcpu->arch.apf.halted = false;
8235                 break;
8236         case KVM_MP_STATE_INIT_RECEIVED:
8237                 break;
8238         default:
8239                 return -EINTR;
8240                 break;
8241         }
8242         return 1;
8243 }
8244
8245 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8246 {
8247         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8248                 kvm_x86_ops->check_nested_events(vcpu, false);
8249
8250         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8251                 !vcpu->arch.apf.halted);
8252 }
8253
8254 static int vcpu_run(struct kvm_vcpu *vcpu)
8255 {
8256         int r;
8257         struct kvm *kvm = vcpu->kvm;
8258
8259         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8260         vcpu->arch.l1tf_flush_l1d = true;
8261
8262         for (;;) {
8263                 if (kvm_vcpu_running(vcpu)) {
8264                         r = vcpu_enter_guest(vcpu);
8265                 } else {
8266                         r = vcpu_block(kvm, vcpu);
8267                 }
8268
8269                 if (r <= 0)
8270                         break;
8271
8272                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8273                 if (kvm_cpu_has_pending_timer(vcpu))
8274                         kvm_inject_pending_timer_irqs(vcpu);
8275
8276                 if (dm_request_for_irq_injection(vcpu) &&
8277                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8278                         r = 0;
8279                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8280                         ++vcpu->stat.request_irq_exits;
8281                         break;
8282                 }
8283
8284                 kvm_check_async_pf_completion(vcpu);
8285
8286                 if (signal_pending(current)) {
8287                         r = -EINTR;
8288                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8289                         ++vcpu->stat.signal_exits;
8290                         break;
8291                 }
8292                 if (need_resched()) {
8293                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8294                         cond_resched();
8295                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8296                 }
8297         }
8298
8299         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8300
8301         return r;
8302 }
8303
8304 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8305 {
8306         int r;
8307         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8308         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8309         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8310         if (r != EMULATE_DONE)
8311                 return 0;
8312         return 1;
8313 }
8314
8315 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8316 {
8317         BUG_ON(!vcpu->arch.pio.count);
8318
8319         return complete_emulated_io(vcpu);
8320 }
8321
8322 /*
8323  * Implements the following, as a state machine:
8324  *
8325  * read:
8326  *   for each fragment
8327  *     for each mmio piece in the fragment
8328  *       write gpa, len
8329  *       exit
8330  *       copy data
8331  *   execute insn
8332  *
8333  * write:
8334  *   for each fragment
8335  *     for each mmio piece in the fragment
8336  *       write gpa, len
8337  *       copy data
8338  *       exit
8339  */
8340 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8341 {
8342         struct kvm_run *run = vcpu->run;
8343         struct kvm_mmio_fragment *frag;
8344         unsigned len;
8345
8346         BUG_ON(!vcpu->mmio_needed);
8347
8348         /* Complete previous fragment */
8349         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8350         len = min(8u, frag->len);
8351         if (!vcpu->mmio_is_write)
8352                 memcpy(frag->data, run->mmio.data, len);
8353
8354         if (frag->len <= 8) {
8355                 /* Switch to the next fragment. */
8356                 frag++;
8357                 vcpu->mmio_cur_fragment++;
8358         } else {
8359                 /* Go forward to the next mmio piece. */
8360                 frag->data += len;
8361                 frag->gpa += len;
8362                 frag->len -= len;
8363         }
8364
8365         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8366                 vcpu->mmio_needed = 0;
8367
8368                 /* FIXME: return into emulator if single-stepping.  */
8369                 if (vcpu->mmio_is_write)
8370                         return 1;
8371                 vcpu->mmio_read_completed = 1;
8372                 return complete_emulated_io(vcpu);
8373         }
8374
8375         run->exit_reason = KVM_EXIT_MMIO;
8376         run->mmio.phys_addr = frag->gpa;
8377         if (vcpu->mmio_is_write)
8378                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8379         run->mmio.len = min(8u, frag->len);
8380         run->mmio.is_write = vcpu->mmio_is_write;
8381         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8382         return 0;
8383 }
8384
8385 /* Swap (qemu) user FPU context for the guest FPU context. */
8386 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8387 {
8388         fpregs_lock();
8389
8390         copy_fpregs_to_fpstate(vcpu->arch.user_fpu);
8391         /* PKRU is separately restored in kvm_x86_ops->run.  */
8392         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8393                                 ~XFEATURE_MASK_PKRU);
8394
8395         fpregs_mark_activate();
8396         fpregs_unlock();
8397
8398         trace_kvm_fpu(1);
8399 }
8400
8401 /* When vcpu_run ends, restore user space FPU context. */
8402 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8403 {
8404         fpregs_lock();
8405
8406         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8407         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8408
8409         fpregs_mark_activate();
8410         fpregs_unlock();
8411
8412         ++vcpu->stat.fpu_reload;
8413         trace_kvm_fpu(0);
8414 }
8415
8416 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8417 {
8418         int r;
8419
8420         vcpu_load(vcpu);
8421         kvm_sigset_activate(vcpu);
8422         kvm_load_guest_fpu(vcpu);
8423
8424         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8425                 if (kvm_run->immediate_exit) {
8426                         r = -EINTR;
8427                         goto out;
8428                 }
8429                 kvm_vcpu_block(vcpu);
8430                 kvm_apic_accept_events(vcpu);
8431                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8432                 r = -EAGAIN;
8433                 if (signal_pending(current)) {
8434                         r = -EINTR;
8435                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8436                         ++vcpu->stat.signal_exits;
8437                 }
8438                 goto out;
8439         }
8440
8441         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8442                 r = -EINVAL;
8443                 goto out;
8444         }
8445
8446         if (vcpu->run->kvm_dirty_regs) {
8447                 r = sync_regs(vcpu);
8448                 if (r != 0)
8449                         goto out;
8450         }
8451
8452         /* re-sync apic's tpr */
8453         if (!lapic_in_kernel(vcpu)) {
8454                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8455                         r = -EINVAL;
8456                         goto out;
8457                 }
8458         }
8459
8460         if (unlikely(vcpu->arch.complete_userspace_io)) {
8461                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8462                 vcpu->arch.complete_userspace_io = NULL;
8463                 r = cui(vcpu);
8464                 if (r <= 0)
8465                         goto out;
8466         } else
8467                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8468
8469         if (kvm_run->immediate_exit)
8470                 r = -EINTR;
8471         else
8472                 r = vcpu_run(vcpu);
8473
8474 out:
8475         kvm_put_guest_fpu(vcpu);
8476         if (vcpu->run->kvm_valid_regs)
8477                 store_regs(vcpu);
8478         post_kvm_run_save(vcpu);
8479         kvm_sigset_deactivate(vcpu);
8480
8481         vcpu_put(vcpu);
8482         return r;
8483 }
8484
8485 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8486 {
8487         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8488                 /*
8489                  * We are here if userspace calls get_regs() in the middle of
8490                  * instruction emulation. Registers state needs to be copied
8491                  * back from emulation context to vcpu. Userspace shouldn't do
8492                  * that usually, but some bad designed PV devices (vmware
8493                  * backdoor interface) need this to work
8494                  */
8495                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8496                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8497         }
8498         regs->rax = kvm_rax_read(vcpu);
8499         regs->rbx = kvm_rbx_read(vcpu);
8500         regs->rcx = kvm_rcx_read(vcpu);
8501         regs->rdx = kvm_rdx_read(vcpu);
8502         regs->rsi = kvm_rsi_read(vcpu);
8503         regs->rdi = kvm_rdi_read(vcpu);
8504         regs->rsp = kvm_rsp_read(vcpu);
8505         regs->rbp = kvm_rbp_read(vcpu);
8506 #ifdef CONFIG_X86_64
8507         regs->r8 = kvm_r8_read(vcpu);
8508         regs->r9 = kvm_r9_read(vcpu);
8509         regs->r10 = kvm_r10_read(vcpu);
8510         regs->r11 = kvm_r11_read(vcpu);
8511         regs->r12 = kvm_r12_read(vcpu);
8512         regs->r13 = kvm_r13_read(vcpu);
8513         regs->r14 = kvm_r14_read(vcpu);
8514         regs->r15 = kvm_r15_read(vcpu);
8515 #endif
8516
8517         regs->rip = kvm_rip_read(vcpu);
8518         regs->rflags = kvm_get_rflags(vcpu);
8519 }
8520
8521 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8522 {
8523         vcpu_load(vcpu);
8524         __get_regs(vcpu, regs);
8525         vcpu_put(vcpu);
8526         return 0;
8527 }
8528
8529 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8530 {
8531         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8532         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8533
8534         kvm_rax_write(vcpu, regs->rax);
8535         kvm_rbx_write(vcpu, regs->rbx);
8536         kvm_rcx_write(vcpu, regs->rcx);
8537         kvm_rdx_write(vcpu, regs->rdx);
8538         kvm_rsi_write(vcpu, regs->rsi);
8539         kvm_rdi_write(vcpu, regs->rdi);
8540         kvm_rsp_write(vcpu, regs->rsp);
8541         kvm_rbp_write(vcpu, regs->rbp);
8542 #ifdef CONFIG_X86_64
8543         kvm_r8_write(vcpu, regs->r8);
8544         kvm_r9_write(vcpu, regs->r9);
8545         kvm_r10_write(vcpu, regs->r10);
8546         kvm_r11_write(vcpu, regs->r11);
8547         kvm_r12_write(vcpu, regs->r12);
8548         kvm_r13_write(vcpu, regs->r13);
8549         kvm_r14_write(vcpu, regs->r14);
8550         kvm_r15_write(vcpu, regs->r15);
8551 #endif
8552
8553         kvm_rip_write(vcpu, regs->rip);
8554         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8555
8556         vcpu->arch.exception.pending = false;
8557
8558         kvm_make_request(KVM_REQ_EVENT, vcpu);
8559 }
8560
8561 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8562 {
8563         vcpu_load(vcpu);
8564         __set_regs(vcpu, regs);
8565         vcpu_put(vcpu);
8566         return 0;
8567 }
8568
8569 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8570 {
8571         struct kvm_segment cs;
8572
8573         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8574         *db = cs.db;
8575         *l = cs.l;
8576 }
8577 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8578
8579 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8580 {
8581         struct desc_ptr dt;
8582
8583         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8584         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8585         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8586         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8587         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8588         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8589
8590         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8591         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8592
8593         kvm_x86_ops->get_idt(vcpu, &dt);
8594         sregs->idt.limit = dt.size;
8595         sregs->idt.base = dt.address;
8596         kvm_x86_ops->get_gdt(vcpu, &dt);
8597         sregs->gdt.limit = dt.size;
8598         sregs->gdt.base = dt.address;
8599
8600         sregs->cr0 = kvm_read_cr0(vcpu);
8601         sregs->cr2 = vcpu->arch.cr2;
8602         sregs->cr3 = kvm_read_cr3(vcpu);
8603         sregs->cr4 = kvm_read_cr4(vcpu);
8604         sregs->cr8 = kvm_get_cr8(vcpu);
8605         sregs->efer = vcpu->arch.efer;
8606         sregs->apic_base = kvm_get_apic_base(vcpu);
8607
8608         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8609
8610         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8611                 set_bit(vcpu->arch.interrupt.nr,
8612                         (unsigned long *)sregs->interrupt_bitmap);
8613 }
8614
8615 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8616                                   struct kvm_sregs *sregs)
8617 {
8618         vcpu_load(vcpu);
8619         __get_sregs(vcpu, sregs);
8620         vcpu_put(vcpu);
8621         return 0;
8622 }
8623
8624 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8625                                     struct kvm_mp_state *mp_state)
8626 {
8627         vcpu_load(vcpu);
8628
8629         kvm_apic_accept_events(vcpu);
8630         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8631                                         vcpu->arch.pv.pv_unhalted)
8632                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8633         else
8634                 mp_state->mp_state = vcpu->arch.mp_state;
8635
8636         vcpu_put(vcpu);
8637         return 0;
8638 }
8639
8640 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8641                                     struct kvm_mp_state *mp_state)
8642 {
8643         int ret = -EINVAL;
8644
8645         vcpu_load(vcpu);
8646
8647         if (!lapic_in_kernel(vcpu) &&
8648             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8649                 goto out;
8650
8651         /* INITs are latched while in SMM */
8652         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8653             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8654              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8655                 goto out;
8656
8657         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8658                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8659                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8660         } else
8661                 vcpu->arch.mp_state = mp_state->mp_state;
8662         kvm_make_request(KVM_REQ_EVENT, vcpu);
8663
8664         ret = 0;
8665 out:
8666         vcpu_put(vcpu);
8667         return ret;
8668 }
8669
8670 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8671                     int reason, bool has_error_code, u32 error_code)
8672 {
8673         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8674         int ret;
8675
8676         init_emulate_ctxt(vcpu);
8677
8678         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8679                                    has_error_code, error_code);
8680
8681         if (ret)
8682                 return EMULATE_FAIL;
8683
8684         kvm_rip_write(vcpu, ctxt->eip);
8685         kvm_set_rflags(vcpu, ctxt->eflags);
8686         kvm_make_request(KVM_REQ_EVENT, vcpu);
8687         return EMULATE_DONE;
8688 }
8689 EXPORT_SYMBOL_GPL(kvm_task_switch);
8690
8691 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8692 {
8693         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8694                         (sregs->cr4 & X86_CR4_OSXSAVE))
8695                 return  -EINVAL;
8696
8697         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8698                 /*
8699                  * When EFER.LME and CR0.PG are set, the processor is in
8700                  * 64-bit mode (though maybe in a 32-bit code segment).
8701                  * CR4.PAE and EFER.LMA must be set.
8702                  */
8703                 if (!(sregs->cr4 & X86_CR4_PAE)
8704                     || !(sregs->efer & EFER_LMA))
8705                         return -EINVAL;
8706         } else {
8707                 /*
8708                  * Not in 64-bit mode: EFER.LMA is clear and the code
8709                  * segment cannot be 64-bit.
8710                  */
8711                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8712                         return -EINVAL;
8713         }
8714
8715         return 0;
8716 }
8717
8718 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8719 {
8720         struct msr_data apic_base_msr;
8721         int mmu_reset_needed = 0;
8722         int cpuid_update_needed = 0;
8723         int pending_vec, max_bits, idx;
8724         struct desc_ptr dt;
8725         int ret = -EINVAL;
8726
8727         if (kvm_valid_sregs(vcpu, sregs))
8728                 goto out;
8729
8730         apic_base_msr.data = sregs->apic_base;
8731         apic_base_msr.host_initiated = true;
8732         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8733                 goto out;
8734
8735         dt.size = sregs->idt.limit;
8736         dt.address = sregs->idt.base;
8737         kvm_x86_ops->set_idt(vcpu, &dt);
8738         dt.size = sregs->gdt.limit;
8739         dt.address = sregs->gdt.base;
8740         kvm_x86_ops->set_gdt(vcpu, &dt);
8741
8742         vcpu->arch.cr2 = sregs->cr2;
8743         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8744         vcpu->arch.cr3 = sregs->cr3;
8745         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8746
8747         kvm_set_cr8(vcpu, sregs->cr8);
8748
8749         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8750         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8751
8752         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8753         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8754         vcpu->arch.cr0 = sregs->cr0;
8755
8756         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8757         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8758                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8759         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8760         if (cpuid_update_needed)
8761                 kvm_update_cpuid(vcpu);
8762
8763         idx = srcu_read_lock(&vcpu->kvm->srcu);
8764         if (is_pae_paging(vcpu)) {
8765                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8766                 mmu_reset_needed = 1;
8767         }
8768         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8769
8770         if (mmu_reset_needed)
8771                 kvm_mmu_reset_context(vcpu);
8772
8773         max_bits = KVM_NR_INTERRUPTS;
8774         pending_vec = find_first_bit(
8775                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8776         if (pending_vec < max_bits) {
8777                 kvm_queue_interrupt(vcpu, pending_vec, false);
8778                 pr_debug("Set back pending irq %d\n", pending_vec);
8779         }
8780
8781         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8782         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8783         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8784         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8785         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8786         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8787
8788         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8789         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8790
8791         update_cr8_intercept(vcpu);
8792
8793         /* Older userspace won't unhalt the vcpu on reset. */
8794         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8795             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8796             !is_protmode(vcpu))
8797                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8798
8799         kvm_make_request(KVM_REQ_EVENT, vcpu);
8800
8801         ret = 0;
8802 out:
8803         return ret;
8804 }
8805
8806 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8807                                   struct kvm_sregs *sregs)
8808 {
8809         int ret;
8810
8811         vcpu_load(vcpu);
8812         ret = __set_sregs(vcpu, sregs);
8813         vcpu_put(vcpu);
8814         return ret;
8815 }
8816
8817 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8818                                         struct kvm_guest_debug *dbg)
8819 {
8820         unsigned long rflags;
8821         int i, r;
8822
8823         vcpu_load(vcpu);
8824
8825         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8826                 r = -EBUSY;
8827                 if (vcpu->arch.exception.pending)
8828                         goto out;
8829                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8830                         kvm_queue_exception(vcpu, DB_VECTOR);
8831                 else
8832                         kvm_queue_exception(vcpu, BP_VECTOR);
8833         }
8834
8835         /*
8836          * Read rflags as long as potentially injected trace flags are still
8837          * filtered out.
8838          */
8839         rflags = kvm_get_rflags(vcpu);
8840
8841         vcpu->guest_debug = dbg->control;
8842         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8843                 vcpu->guest_debug = 0;
8844
8845         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8846                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8847                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8848                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8849         } else {
8850                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8851                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8852         }
8853         kvm_update_dr7(vcpu);
8854
8855         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8856                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8857                         get_segment_base(vcpu, VCPU_SREG_CS);
8858
8859         /*
8860          * Trigger an rflags update that will inject or remove the trace
8861          * flags.
8862          */
8863         kvm_set_rflags(vcpu, rflags);
8864
8865         kvm_x86_ops->update_bp_intercept(vcpu);
8866
8867         r = 0;
8868
8869 out:
8870         vcpu_put(vcpu);
8871         return r;
8872 }
8873
8874 /*
8875  * Translate a guest virtual address to a guest physical address.
8876  */
8877 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8878                                     struct kvm_translation *tr)
8879 {
8880         unsigned long vaddr = tr->linear_address;
8881         gpa_t gpa;
8882         int idx;
8883
8884         vcpu_load(vcpu);
8885
8886         idx = srcu_read_lock(&vcpu->kvm->srcu);
8887         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8888         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8889         tr->physical_address = gpa;
8890         tr->valid = gpa != UNMAPPED_GVA;
8891         tr->writeable = 1;
8892         tr->usermode = 0;
8893
8894         vcpu_put(vcpu);
8895         return 0;
8896 }
8897
8898 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8899 {
8900         struct fxregs_state *fxsave;
8901
8902         vcpu_load(vcpu);
8903
8904         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8905         memcpy(fpu->fpr, fxsave->st_space, 128);
8906         fpu->fcw = fxsave->cwd;
8907         fpu->fsw = fxsave->swd;
8908         fpu->ftwx = fxsave->twd;
8909         fpu->last_opcode = fxsave->fop;
8910         fpu->last_ip = fxsave->rip;
8911         fpu->last_dp = fxsave->rdp;
8912         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8913
8914         vcpu_put(vcpu);
8915         return 0;
8916 }
8917
8918 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8919 {
8920         struct fxregs_state *fxsave;
8921
8922         vcpu_load(vcpu);
8923
8924         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8925
8926         memcpy(fxsave->st_space, fpu->fpr, 128);
8927         fxsave->cwd = fpu->fcw;
8928         fxsave->swd = fpu->fsw;
8929         fxsave->twd = fpu->ftwx;
8930         fxsave->fop = fpu->last_opcode;
8931         fxsave->rip = fpu->last_ip;
8932         fxsave->rdp = fpu->last_dp;
8933         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8934
8935         vcpu_put(vcpu);
8936         return 0;
8937 }
8938
8939 static void store_regs(struct kvm_vcpu *vcpu)
8940 {
8941         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8942
8943         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8944                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8945
8946         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8947                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8948
8949         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8950                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8951                                 vcpu, &vcpu->run->s.regs.events);
8952 }
8953
8954 static int sync_regs(struct kvm_vcpu *vcpu)
8955 {
8956         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8957                 return -EINVAL;
8958
8959         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8960                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8961                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8962         }
8963         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8964                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8965                         return -EINVAL;
8966                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8967         }
8968         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8969                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8970                                 vcpu, &vcpu->run->s.regs.events))
8971                         return -EINVAL;
8972                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8973         }
8974
8975         return 0;
8976 }
8977
8978 static void fx_init(struct kvm_vcpu *vcpu)
8979 {
8980         fpstate_init(&vcpu->arch.guest_fpu->state);
8981         if (boot_cpu_has(X86_FEATURE_XSAVES))
8982                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
8983                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8984
8985         /*
8986          * Ensure guest xcr0 is valid for loading
8987          */
8988         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8989
8990         vcpu->arch.cr0 |= X86_CR0_ET;
8991 }
8992
8993 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8994 {
8995         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8996
8997         kvmclock_reset(vcpu);
8998
8999         kvm_x86_ops->vcpu_free(vcpu);
9000         free_cpumask_var(wbinvd_dirty_mask);
9001 }
9002
9003 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
9004                                                 unsigned int id)
9005 {
9006         struct kvm_vcpu *vcpu;
9007
9008         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9009                 printk_once(KERN_WARNING
9010                 "kvm: SMP vm created on host with unstable TSC; "
9011                 "guest TSC will not be reliable\n");
9012
9013         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
9014
9015         return vcpu;
9016 }
9017
9018 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
9019 {
9020         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9021         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9022         kvm_vcpu_mtrr_init(vcpu);
9023         vcpu_load(vcpu);
9024         kvm_vcpu_reset(vcpu, false);
9025         kvm_init_mmu(vcpu, false);
9026         vcpu_put(vcpu);
9027         return 0;
9028 }
9029
9030 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9031 {
9032         struct msr_data msr;
9033         struct kvm *kvm = vcpu->kvm;
9034
9035         kvm_hv_vcpu_postcreate(vcpu);
9036
9037         if (mutex_lock_killable(&vcpu->mutex))
9038                 return;
9039         vcpu_load(vcpu);
9040         msr.data = 0x0;
9041         msr.index = MSR_IA32_TSC;
9042         msr.host_initiated = true;
9043         kvm_write_tsc(vcpu, &msr);
9044         vcpu_put(vcpu);
9045
9046         /* poll control enabled by default */
9047         vcpu->arch.msr_kvm_poll_control = 1;
9048
9049         mutex_unlock(&vcpu->mutex);
9050
9051         if (!kvmclock_periodic_sync)
9052                 return;
9053
9054         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9055                                         KVMCLOCK_SYNC_PERIOD);
9056 }
9057
9058 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9059 {
9060         vcpu->arch.apf.msr_val = 0;
9061
9062         vcpu_load(vcpu);
9063         kvm_mmu_unload(vcpu);
9064         vcpu_put(vcpu);
9065
9066         kvm_x86_ops->vcpu_free(vcpu);
9067 }
9068
9069 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9070 {
9071         kvm_lapic_reset(vcpu, init_event);
9072
9073         vcpu->arch.hflags = 0;
9074
9075         vcpu->arch.smi_pending = 0;
9076         vcpu->arch.smi_count = 0;
9077         atomic_set(&vcpu->arch.nmi_queued, 0);
9078         vcpu->arch.nmi_pending = 0;
9079         vcpu->arch.nmi_injected = false;
9080         kvm_clear_interrupt_queue(vcpu);
9081         kvm_clear_exception_queue(vcpu);
9082         vcpu->arch.exception.pending = false;
9083
9084         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9085         kvm_update_dr0123(vcpu);
9086         vcpu->arch.dr6 = DR6_INIT;
9087         kvm_update_dr6(vcpu);
9088         vcpu->arch.dr7 = DR7_FIXED_1;
9089         kvm_update_dr7(vcpu);
9090
9091         vcpu->arch.cr2 = 0;
9092
9093         kvm_make_request(KVM_REQ_EVENT, vcpu);
9094         vcpu->arch.apf.msr_val = 0;
9095         vcpu->arch.st.msr_val = 0;
9096
9097         kvmclock_reset(vcpu);
9098
9099         kvm_clear_async_pf_completion_queue(vcpu);
9100         kvm_async_pf_hash_reset(vcpu);
9101         vcpu->arch.apf.halted = false;
9102
9103         if (kvm_mpx_supported()) {
9104                 void *mpx_state_buffer;
9105
9106                 /*
9107                  * To avoid have the INIT path from kvm_apic_has_events() that be
9108                  * called with loaded FPU and does not let userspace fix the state.
9109                  */
9110                 if (init_event)
9111                         kvm_put_guest_fpu(vcpu);
9112                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9113                                         XFEATURE_BNDREGS);
9114                 if (mpx_state_buffer)
9115                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9116                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9117                                         XFEATURE_BNDCSR);
9118                 if (mpx_state_buffer)
9119                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9120                 if (init_event)
9121                         kvm_load_guest_fpu(vcpu);
9122         }
9123
9124         if (!init_event) {
9125                 kvm_pmu_reset(vcpu);
9126                 vcpu->arch.smbase = 0x30000;
9127
9128                 vcpu->arch.msr_misc_features_enables = 0;
9129
9130                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9131         }
9132
9133         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9134         vcpu->arch.regs_avail = ~0;
9135         vcpu->arch.regs_dirty = ~0;
9136
9137         vcpu->arch.ia32_xss = 0;
9138
9139         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9140 }
9141
9142 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9143 {
9144         struct kvm_segment cs;
9145
9146         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9147         cs.selector = vector << 8;
9148         cs.base = vector << 12;
9149         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9150         kvm_rip_write(vcpu, 0);
9151 }
9152
9153 int kvm_arch_hardware_enable(void)
9154 {
9155         struct kvm *kvm;
9156         struct kvm_vcpu *vcpu;
9157         int i;
9158         int ret;
9159         u64 local_tsc;
9160         u64 max_tsc = 0;
9161         bool stable, backwards_tsc = false;
9162
9163         kvm_shared_msr_cpu_online();
9164         ret = kvm_x86_ops->hardware_enable();
9165         if (ret != 0)
9166                 return ret;
9167
9168         local_tsc = rdtsc();
9169         stable = !kvm_check_tsc_unstable();
9170         list_for_each_entry(kvm, &vm_list, vm_list) {
9171                 kvm_for_each_vcpu(i, vcpu, kvm) {
9172                         if (!stable && vcpu->cpu == smp_processor_id())
9173                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9174                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9175                                 backwards_tsc = true;
9176                                 if (vcpu->arch.last_host_tsc > max_tsc)
9177                                         max_tsc = vcpu->arch.last_host_tsc;
9178                         }
9179                 }
9180         }
9181
9182         /*
9183          * Sometimes, even reliable TSCs go backwards.  This happens on
9184          * platforms that reset TSC during suspend or hibernate actions, but
9185          * maintain synchronization.  We must compensate.  Fortunately, we can
9186          * detect that condition here, which happens early in CPU bringup,
9187          * before any KVM threads can be running.  Unfortunately, we can't
9188          * bring the TSCs fully up to date with real time, as we aren't yet far
9189          * enough into CPU bringup that we know how much real time has actually
9190          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9191          * variables that haven't been updated yet.
9192          *
9193          * So we simply find the maximum observed TSC above, then record the
9194          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9195          * the adjustment will be applied.  Note that we accumulate
9196          * adjustments, in case multiple suspend cycles happen before some VCPU
9197          * gets a chance to run again.  In the event that no KVM threads get a
9198          * chance to run, we will miss the entire elapsed period, as we'll have
9199          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9200          * loose cycle time.  This isn't too big a deal, since the loss will be
9201          * uniform across all VCPUs (not to mention the scenario is extremely
9202          * unlikely). It is possible that a second hibernate recovery happens
9203          * much faster than a first, causing the observed TSC here to be
9204          * smaller; this would require additional padding adjustment, which is
9205          * why we set last_host_tsc to the local tsc observed here.
9206          *
9207          * N.B. - this code below runs only on platforms with reliable TSC,
9208          * as that is the only way backwards_tsc is set above.  Also note
9209          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9210          * have the same delta_cyc adjustment applied if backwards_tsc
9211          * is detected.  Note further, this adjustment is only done once,
9212          * as we reset last_host_tsc on all VCPUs to stop this from being
9213          * called multiple times (one for each physical CPU bringup).
9214          *
9215          * Platforms with unreliable TSCs don't have to deal with this, they
9216          * will be compensated by the logic in vcpu_load, which sets the TSC to
9217          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9218          * guarantee that they stay in perfect synchronization.
9219          */
9220         if (backwards_tsc) {
9221                 u64 delta_cyc = max_tsc - local_tsc;
9222                 list_for_each_entry(kvm, &vm_list, vm_list) {
9223                         kvm->arch.backwards_tsc_observed = true;
9224                         kvm_for_each_vcpu(i, vcpu, kvm) {
9225                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9226                                 vcpu->arch.last_host_tsc = local_tsc;
9227                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9228                         }
9229
9230                         /*
9231                          * We have to disable TSC offset matching.. if you were
9232                          * booting a VM while issuing an S4 host suspend....
9233                          * you may have some problem.  Solving this issue is
9234                          * left as an exercise to the reader.
9235                          */
9236                         kvm->arch.last_tsc_nsec = 0;
9237                         kvm->arch.last_tsc_write = 0;
9238                 }
9239
9240         }
9241         return 0;
9242 }
9243
9244 void kvm_arch_hardware_disable(void)
9245 {
9246         kvm_x86_ops->hardware_disable();
9247         drop_user_return_notifiers();
9248 }
9249
9250 int kvm_arch_hardware_setup(void)
9251 {
9252         int r;
9253
9254         r = kvm_x86_ops->hardware_setup();
9255         if (r != 0)
9256                 return r;
9257
9258         if (kvm_has_tsc_control) {
9259                 /*
9260                  * Make sure the user can only configure tsc_khz values that
9261                  * fit into a signed integer.
9262                  * A min value is not calculated because it will always
9263                  * be 1 on all machines.
9264                  */
9265                 u64 max = min(0x7fffffffULL,
9266                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9267                 kvm_max_guest_tsc_khz = max;
9268
9269                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9270         }
9271
9272         kvm_init_msr_list();
9273         return 0;
9274 }
9275
9276 void kvm_arch_hardware_unsetup(void)
9277 {
9278         kvm_x86_ops->hardware_unsetup();
9279 }
9280
9281 int kvm_arch_check_processor_compat(void)
9282 {
9283         return kvm_x86_ops->check_processor_compatibility();
9284 }
9285
9286 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9287 {
9288         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9289 }
9290 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9291
9292 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9293 {
9294         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9295 }
9296
9297 struct static_key kvm_no_apic_vcpu __read_mostly;
9298 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9299
9300 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9301 {
9302         struct page *page;
9303         int r;
9304
9305         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9306         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9307                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9308         else
9309                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9310
9311         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9312         if (!page) {
9313                 r = -ENOMEM;
9314                 goto fail;
9315         }
9316         vcpu->arch.pio_data = page_address(page);
9317
9318         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9319
9320         r = kvm_mmu_create(vcpu);
9321         if (r < 0)
9322                 goto fail_free_pio_data;
9323
9324         if (irqchip_in_kernel(vcpu->kvm)) {
9325                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9326                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9327                 if (r < 0)
9328                         goto fail_mmu_destroy;
9329         } else
9330                 static_key_slow_inc(&kvm_no_apic_vcpu);
9331
9332         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9333                                        GFP_KERNEL_ACCOUNT);
9334         if (!vcpu->arch.mce_banks) {
9335                 r = -ENOMEM;
9336                 goto fail_free_lapic;
9337         }
9338         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9339
9340         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9341                                 GFP_KERNEL_ACCOUNT)) {
9342                 r = -ENOMEM;
9343                 goto fail_free_mce_banks;
9344         }
9345
9346         fx_init(vcpu);
9347
9348         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9349
9350         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9351
9352         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9353
9354         kvm_async_pf_hash_reset(vcpu);
9355         kvm_pmu_init(vcpu);
9356
9357         vcpu->arch.pending_external_vector = -1;
9358         vcpu->arch.preempted_in_kernel = false;
9359
9360         kvm_hv_vcpu_init(vcpu);
9361
9362         return 0;
9363
9364 fail_free_mce_banks:
9365         kfree(vcpu->arch.mce_banks);
9366 fail_free_lapic:
9367         kvm_free_lapic(vcpu);
9368 fail_mmu_destroy:
9369         kvm_mmu_destroy(vcpu);
9370 fail_free_pio_data:
9371         free_page((unsigned long)vcpu->arch.pio_data);
9372 fail:
9373         return r;
9374 }
9375
9376 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9377 {
9378         int idx;
9379
9380         kvm_hv_vcpu_uninit(vcpu);
9381         kvm_pmu_destroy(vcpu);
9382         kfree(vcpu->arch.mce_banks);
9383         kvm_free_lapic(vcpu);
9384         idx = srcu_read_lock(&vcpu->kvm->srcu);
9385         kvm_mmu_destroy(vcpu);
9386         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9387         free_page((unsigned long)vcpu->arch.pio_data);
9388         if (!lapic_in_kernel(vcpu))
9389                 static_key_slow_dec(&kvm_no_apic_vcpu);
9390 }
9391
9392 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9393 {
9394         vcpu->arch.l1tf_flush_l1d = true;
9395         kvm_x86_ops->sched_in(vcpu, cpu);
9396 }
9397
9398 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9399 {
9400         if (type)
9401                 return -EINVAL;
9402
9403         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9404         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9405         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9406         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9407
9408         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9409         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9410         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9411         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9412                 &kvm->arch.irq_sources_bitmap);
9413
9414         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9415         mutex_init(&kvm->arch.apic_map_lock);
9416         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9417
9418         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9419         pvclock_update_vm_gtod_copy(kvm);
9420
9421         kvm->arch.guest_can_read_msr_platform_info = true;
9422
9423         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9424         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9425
9426         kvm_hv_init_vm(kvm);
9427         kvm_page_track_init(kvm);
9428         kvm_mmu_init_vm(kvm);
9429
9430         return kvm_x86_ops->vm_init(kvm);
9431 }
9432
9433 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9434 {
9435         vcpu_load(vcpu);
9436         kvm_mmu_unload(vcpu);
9437         vcpu_put(vcpu);
9438 }
9439
9440 static void kvm_free_vcpus(struct kvm *kvm)
9441 {
9442         unsigned int i;
9443         struct kvm_vcpu *vcpu;
9444
9445         /*
9446          * Unpin any mmu pages first.
9447          */
9448         kvm_for_each_vcpu(i, vcpu, kvm) {
9449                 kvm_clear_async_pf_completion_queue(vcpu);
9450                 kvm_unload_vcpu_mmu(vcpu);
9451         }
9452         kvm_for_each_vcpu(i, vcpu, kvm)
9453                 kvm_arch_vcpu_free(vcpu);
9454
9455         mutex_lock(&kvm->lock);
9456         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9457                 kvm->vcpus[i] = NULL;
9458
9459         atomic_set(&kvm->online_vcpus, 0);
9460         mutex_unlock(&kvm->lock);
9461 }
9462
9463 void kvm_arch_sync_events(struct kvm *kvm)
9464 {
9465         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9466         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9467         kvm_free_pit(kvm);
9468 }
9469
9470 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9471 {
9472         int i, r;
9473         unsigned long hva;
9474         struct kvm_memslots *slots = kvm_memslots(kvm);
9475         struct kvm_memory_slot *slot, old;
9476
9477         /* Called with kvm->slots_lock held.  */
9478         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9479                 return -EINVAL;
9480
9481         slot = id_to_memslot(slots, id);
9482         if (size) {
9483                 if (slot->npages)
9484                         return -EEXIST;
9485
9486                 /*
9487                  * MAP_SHARED to prevent internal slot pages from being moved
9488                  * by fork()/COW.
9489                  */
9490                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9491                               MAP_SHARED | MAP_ANONYMOUS, 0);
9492                 if (IS_ERR((void *)hva))
9493                         return PTR_ERR((void *)hva);
9494         } else {
9495                 if (!slot->npages)
9496                         return 0;
9497
9498                 hva = 0;
9499         }
9500
9501         old = *slot;
9502         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9503                 struct kvm_userspace_memory_region m;
9504
9505                 m.slot = id | (i << 16);
9506                 m.flags = 0;
9507                 m.guest_phys_addr = gpa;
9508                 m.userspace_addr = hva;
9509                 m.memory_size = size;
9510                 r = __kvm_set_memory_region(kvm, &m);
9511                 if (r < 0)
9512                         return r;
9513         }
9514
9515         if (!size)
9516                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9517
9518         return 0;
9519 }
9520 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9521
9522 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9523 {
9524         int r;
9525
9526         mutex_lock(&kvm->slots_lock);
9527         r = __x86_set_memory_region(kvm, id, gpa, size);
9528         mutex_unlock(&kvm->slots_lock);
9529
9530         return r;
9531 }
9532 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9533
9534 void kvm_arch_destroy_vm(struct kvm *kvm)
9535 {
9536         if (current->mm == kvm->mm) {
9537                 /*
9538                  * Free memory regions allocated on behalf of userspace,
9539                  * unless the the memory map has changed due to process exit
9540                  * or fd copying.
9541                  */
9542                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9543                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9544                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9545         }
9546         if (kvm_x86_ops->vm_destroy)
9547                 kvm_x86_ops->vm_destroy(kvm);
9548         kvm_pic_destroy(kvm);
9549         kvm_ioapic_destroy(kvm);
9550         kvm_free_vcpus(kvm);
9551         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9552         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9553         kvm_mmu_uninit_vm(kvm);
9554         kvm_page_track_cleanup(kvm);
9555         kvm_hv_destroy_vm(kvm);
9556 }
9557
9558 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9559                            struct kvm_memory_slot *dont)
9560 {
9561         int i;
9562
9563         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9564                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9565                         kvfree(free->arch.rmap[i]);
9566                         free->arch.rmap[i] = NULL;
9567                 }
9568                 if (i == 0)
9569                         continue;
9570
9571                 if (!dont || free->arch.lpage_info[i - 1] !=
9572                              dont->arch.lpage_info[i - 1]) {
9573                         kvfree(free->arch.lpage_info[i - 1]);
9574                         free->arch.lpage_info[i - 1] = NULL;
9575                 }
9576         }
9577
9578         kvm_page_track_free_memslot(free, dont);
9579 }
9580
9581 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9582                             unsigned long npages)
9583 {
9584         int i;
9585
9586         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9587                 struct kvm_lpage_info *linfo;
9588                 unsigned long ugfn;
9589                 int lpages;
9590                 int level = i + 1;
9591
9592                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9593                                       slot->base_gfn, level) + 1;
9594
9595                 slot->arch.rmap[i] =
9596                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9597                                  GFP_KERNEL_ACCOUNT);
9598                 if (!slot->arch.rmap[i])
9599                         goto out_free;
9600                 if (i == 0)
9601                         continue;
9602
9603                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9604                 if (!linfo)
9605                         goto out_free;
9606
9607                 slot->arch.lpage_info[i - 1] = linfo;
9608
9609                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9610                         linfo[0].disallow_lpage = 1;
9611                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9612                         linfo[lpages - 1].disallow_lpage = 1;
9613                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9614                 /*
9615                  * If the gfn and userspace address are not aligned wrt each
9616                  * other, or if explicitly asked to, disable large page
9617                  * support for this slot
9618                  */
9619                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9620                     !kvm_largepages_enabled()) {
9621                         unsigned long j;
9622
9623                         for (j = 0; j < lpages; ++j)
9624                                 linfo[j].disallow_lpage = 1;
9625                 }
9626         }
9627
9628         if (kvm_page_track_create_memslot(slot, npages))
9629                 goto out_free;
9630
9631         return 0;
9632
9633 out_free:
9634         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9635                 kvfree(slot->arch.rmap[i]);
9636                 slot->arch.rmap[i] = NULL;
9637                 if (i == 0)
9638                         continue;
9639
9640                 kvfree(slot->arch.lpage_info[i - 1]);
9641                 slot->arch.lpage_info[i - 1] = NULL;
9642         }
9643         return -ENOMEM;
9644 }
9645
9646 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9647 {
9648         /*
9649          * memslots->generation has been incremented.
9650          * mmio generation may have reached its maximum value.
9651          */
9652         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9653 }
9654
9655 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9656                                 struct kvm_memory_slot *memslot,
9657                                 const struct kvm_userspace_memory_region *mem,
9658                                 enum kvm_mr_change change)
9659 {
9660         return 0;
9661 }
9662
9663 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9664                                      struct kvm_memory_slot *new)
9665 {
9666         /* Still write protect RO slot */
9667         if (new->flags & KVM_MEM_READONLY) {
9668                 kvm_mmu_slot_remove_write_access(kvm, new);
9669                 return;
9670         }
9671
9672         /*
9673          * Call kvm_x86_ops dirty logging hooks when they are valid.
9674          *
9675          * kvm_x86_ops->slot_disable_log_dirty is called when:
9676          *
9677          *  - KVM_MR_CREATE with dirty logging is disabled
9678          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9679          *
9680          * The reason is, in case of PML, we need to set D-bit for any slots
9681          * with dirty logging disabled in order to eliminate unnecessary GPA
9682          * logging in PML buffer (and potential PML buffer full VMEXT). This
9683          * guarantees leaving PML enabled during guest's lifetime won't have
9684          * any additional overhead from PML when guest is running with dirty
9685          * logging disabled for memory slots.
9686          *
9687          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9688          * to dirty logging mode.
9689          *
9690          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9691          *
9692          * In case of write protect:
9693          *
9694          * Write protect all pages for dirty logging.
9695          *
9696          * All the sptes including the large sptes which point to this
9697          * slot are set to readonly. We can not create any new large
9698          * spte on this slot until the end of the logging.
9699          *
9700          * See the comments in fast_page_fault().
9701          */
9702         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9703                 if (kvm_x86_ops->slot_enable_log_dirty)
9704                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9705                 else
9706                         kvm_mmu_slot_remove_write_access(kvm, new);
9707         } else {
9708                 if (kvm_x86_ops->slot_disable_log_dirty)
9709                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9710         }
9711 }
9712
9713 void kvm_arch_commit_memory_region(struct kvm *kvm,
9714                                 const struct kvm_userspace_memory_region *mem,
9715                                 const struct kvm_memory_slot *old,
9716                                 const struct kvm_memory_slot *new,
9717                                 enum kvm_mr_change change)
9718 {
9719         if (!kvm->arch.n_requested_mmu_pages)
9720                 kvm_mmu_change_mmu_pages(kvm,
9721                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9722
9723         /*
9724          * Dirty logging tracks sptes in 4k granularity, meaning that large
9725          * sptes have to be split.  If live migration is successful, the guest
9726          * in the source machine will be destroyed and large sptes will be
9727          * created in the destination. However, if the guest continues to run
9728          * in the source machine (for example if live migration fails), small
9729          * sptes will remain around and cause bad performance.
9730          *
9731          * Scan sptes if dirty logging has been stopped, dropping those
9732          * which can be collapsed into a single large-page spte.  Later
9733          * page faults will create the large-page sptes.
9734          */
9735         if ((change != KVM_MR_DELETE) &&
9736                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9737                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9738                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9739
9740         /*
9741          * Set up write protection and/or dirty logging for the new slot.
9742          *
9743          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9744          * been zapped so no dirty logging staff is needed for old slot. For
9745          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9746          * new and it's also covered when dealing with the new slot.
9747          *
9748          * FIXME: const-ify all uses of struct kvm_memory_slot.
9749          */
9750         if (change != KVM_MR_DELETE)
9751                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9752 }
9753
9754 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9755 {
9756         kvm_mmu_zap_all(kvm);
9757 }
9758
9759 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9760                                    struct kvm_memory_slot *slot)
9761 {
9762         kvm_page_track_flush_slot(kvm, slot);
9763 }
9764
9765 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9766 {
9767         return (is_guest_mode(vcpu) &&
9768                         kvm_x86_ops->guest_apic_has_interrupt &&
9769                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9770 }
9771
9772 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9773 {
9774         if (!list_empty_careful(&vcpu->async_pf.done))
9775                 return true;
9776
9777         if (kvm_apic_has_events(vcpu))
9778                 return true;
9779
9780         if (vcpu->arch.pv.pv_unhalted)
9781                 return true;
9782
9783         if (vcpu->arch.exception.pending)
9784                 return true;
9785
9786         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9787             (vcpu->arch.nmi_pending &&
9788              kvm_x86_ops->nmi_allowed(vcpu)))
9789                 return true;
9790
9791         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9792             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9793                 return true;
9794
9795         if (kvm_arch_interrupt_allowed(vcpu) &&
9796             (kvm_cpu_has_interrupt(vcpu) ||
9797             kvm_guest_apic_has_interrupt(vcpu)))
9798                 return true;
9799
9800         if (kvm_hv_has_stimer_pending(vcpu))
9801                 return true;
9802
9803         return false;
9804 }
9805
9806 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9807 {
9808         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9809 }
9810
9811 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
9812 {
9813         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
9814                 return true;
9815
9816         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9817                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
9818                  kvm_test_request(KVM_REQ_EVENT, vcpu))
9819                 return true;
9820
9821         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
9822                 return true;
9823
9824         return false;
9825 }
9826
9827 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9828 {
9829         return vcpu->arch.preempted_in_kernel;
9830 }
9831
9832 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9833 {
9834         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9835 }
9836
9837 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9838 {
9839         return kvm_x86_ops->interrupt_allowed(vcpu);
9840 }
9841
9842 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9843 {
9844         if (is_64_bit_mode(vcpu))
9845                 return kvm_rip_read(vcpu);
9846         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9847                      kvm_rip_read(vcpu));
9848 }
9849 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9850
9851 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9852 {
9853         return kvm_get_linear_rip(vcpu) == linear_rip;
9854 }
9855 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9856
9857 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9858 {
9859         unsigned long rflags;
9860
9861         rflags = kvm_x86_ops->get_rflags(vcpu);
9862         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9863                 rflags &= ~X86_EFLAGS_TF;
9864         return rflags;
9865 }
9866 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9867
9868 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9869 {
9870         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9871             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9872                 rflags |= X86_EFLAGS_TF;
9873         kvm_x86_ops->set_rflags(vcpu, rflags);
9874 }
9875
9876 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9877 {
9878         __kvm_set_rflags(vcpu, rflags);
9879         kvm_make_request(KVM_REQ_EVENT, vcpu);
9880 }
9881 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9882
9883 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9884 {
9885         int r;
9886
9887         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9888               work->wakeup_all)
9889                 return;
9890
9891         r = kvm_mmu_reload(vcpu);
9892         if (unlikely(r))
9893                 return;
9894
9895         if (!vcpu->arch.mmu->direct_map &&
9896               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9897                 return;
9898
9899         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9900 }
9901
9902 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9903 {
9904         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9905 }
9906
9907 static inline u32 kvm_async_pf_next_probe(u32 key)
9908 {
9909         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9910 }
9911
9912 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9913 {
9914         u32 key = kvm_async_pf_hash_fn(gfn);
9915
9916         while (vcpu->arch.apf.gfns[key] != ~0)
9917                 key = kvm_async_pf_next_probe(key);
9918
9919         vcpu->arch.apf.gfns[key] = gfn;
9920 }
9921
9922 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9923 {
9924         int i;
9925         u32 key = kvm_async_pf_hash_fn(gfn);
9926
9927         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9928                      (vcpu->arch.apf.gfns[key] != gfn &&
9929                       vcpu->arch.apf.gfns[key] != ~0); i++)
9930                 key = kvm_async_pf_next_probe(key);
9931
9932         return key;
9933 }
9934
9935 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9936 {
9937         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9938 }
9939
9940 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9941 {
9942         u32 i, j, k;
9943
9944         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9945         while (true) {
9946                 vcpu->arch.apf.gfns[i] = ~0;
9947                 do {
9948                         j = kvm_async_pf_next_probe(j);
9949                         if (vcpu->arch.apf.gfns[j] == ~0)
9950                                 return;
9951                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9952                         /*
9953                          * k lies cyclically in ]i,j]
9954                          * |    i.k.j |
9955                          * |....j i.k.| or  |.k..j i...|
9956                          */
9957                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9958                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9959                 i = j;
9960         }
9961 }
9962
9963 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9964 {
9965
9966         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9967                                       sizeof(val));
9968 }
9969
9970 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9971 {
9972
9973         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9974                                       sizeof(u32));
9975 }
9976
9977 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
9978 {
9979         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
9980                 return false;
9981
9982         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9983             (vcpu->arch.apf.send_user_only &&
9984              kvm_x86_ops->get_cpl(vcpu) == 0))
9985                 return false;
9986
9987         return true;
9988 }
9989
9990 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
9991 {
9992         if (unlikely(!lapic_in_kernel(vcpu) ||
9993                      kvm_event_needs_reinjection(vcpu) ||
9994                      vcpu->arch.exception.pending))
9995                 return false;
9996
9997         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
9998                 return false;
9999
10000         /*
10001          * If interrupts are off we cannot even use an artificial
10002          * halt state.
10003          */
10004         return kvm_x86_ops->interrupt_allowed(vcpu);
10005 }
10006
10007 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10008                                      struct kvm_async_pf *work)
10009 {
10010         struct x86_exception fault;
10011
10012         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
10013         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10014
10015         if (kvm_can_deliver_async_pf(vcpu) &&
10016             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
10017                 fault.vector = PF_VECTOR;
10018                 fault.error_code_valid = true;
10019                 fault.error_code = 0;
10020                 fault.nested_page_fault = false;
10021                 fault.address = work->arch.token;
10022                 fault.async_page_fault = true;
10023                 kvm_inject_page_fault(vcpu, &fault);
10024         } else {
10025                 /*
10026                  * It is not possible to deliver a paravirtualized asynchronous
10027                  * page fault, but putting the guest in an artificial halt state
10028                  * can be beneficial nevertheless: if an interrupt arrives, we
10029                  * can deliver it timely and perhaps the guest will schedule
10030                  * another process.  When the instruction that triggered a page
10031                  * fault is retried, hopefully the page will be ready in the host.
10032                  */
10033                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10034         }
10035 }
10036
10037 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10038                                  struct kvm_async_pf *work)
10039 {
10040         struct x86_exception fault;
10041         u32 val;
10042
10043         if (work->wakeup_all)
10044                 work->arch.token = ~0; /* broadcast wakeup */
10045         else
10046                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10047         trace_kvm_async_pf_ready(work->arch.token, work->gva);
10048
10049         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
10050             !apf_get_user(vcpu, &val)) {
10051                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
10052                     vcpu->arch.exception.pending &&
10053                     vcpu->arch.exception.nr == PF_VECTOR &&
10054                     !apf_put_user(vcpu, 0)) {
10055                         vcpu->arch.exception.injected = false;
10056                         vcpu->arch.exception.pending = false;
10057                         vcpu->arch.exception.nr = 0;
10058                         vcpu->arch.exception.has_error_code = false;
10059                         vcpu->arch.exception.error_code = 0;
10060                         vcpu->arch.exception.has_payload = false;
10061                         vcpu->arch.exception.payload = 0;
10062                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
10063                         fault.vector = PF_VECTOR;
10064                         fault.error_code_valid = true;
10065                         fault.error_code = 0;
10066                         fault.nested_page_fault = false;
10067                         fault.address = work->arch.token;
10068                         fault.async_page_fault = true;
10069                         kvm_inject_page_fault(vcpu, &fault);
10070                 }
10071         }
10072         vcpu->arch.apf.halted = false;
10073         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10074 }
10075
10076 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
10077 {
10078         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
10079                 return true;
10080         else
10081                 return kvm_can_do_async_pf(vcpu);
10082 }
10083
10084 void kvm_arch_start_assignment(struct kvm *kvm)
10085 {
10086         atomic_inc(&kvm->arch.assigned_device_count);
10087 }
10088 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10089
10090 void kvm_arch_end_assignment(struct kvm *kvm)
10091 {
10092         atomic_dec(&kvm->arch.assigned_device_count);
10093 }
10094 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10095
10096 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10097 {
10098         return atomic_read(&kvm->arch.assigned_device_count);
10099 }
10100 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10101
10102 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10103 {
10104         atomic_inc(&kvm->arch.noncoherent_dma_count);
10105 }
10106 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10107
10108 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10109 {
10110         atomic_dec(&kvm->arch.noncoherent_dma_count);
10111 }
10112 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10113
10114 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10115 {
10116         return atomic_read(&kvm->arch.noncoherent_dma_count);
10117 }
10118 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10119
10120 bool kvm_arch_has_irq_bypass(void)
10121 {
10122         return true;
10123 }
10124
10125 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10126                                       struct irq_bypass_producer *prod)
10127 {
10128         struct kvm_kernel_irqfd *irqfd =
10129                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10130
10131         irqfd->producer = prod;
10132
10133         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10134                                            prod->irq, irqfd->gsi, 1);
10135 }
10136
10137 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10138                                       struct irq_bypass_producer *prod)
10139 {
10140         int ret;
10141         struct kvm_kernel_irqfd *irqfd =
10142                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10143
10144         WARN_ON(irqfd->producer != prod);
10145         irqfd->producer = NULL;
10146
10147         /*
10148          * When producer of consumer is unregistered, we change back to
10149          * remapped mode, so we can re-use the current implementation
10150          * when the irq is masked/disabled or the consumer side (KVM
10151          * int this case doesn't want to receive the interrupts.
10152         */
10153         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10154         if (ret)
10155                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10156                        " fails: %d\n", irqfd->consumer.token, ret);
10157 }
10158
10159 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10160                                    uint32_t guest_irq, bool set)
10161 {
10162         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10163 }
10164
10165 bool kvm_vector_hashing_enabled(void)
10166 {
10167         return vector_hashing;
10168 }
10169 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10170
10171 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10172 {
10173         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10174 }
10175 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10176
10177
10178 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10179 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10180 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10181 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10182 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10183 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10184 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10185 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10186 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10187 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10188 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
10189 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10190 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10191 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10192 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10193 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
10194 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10195 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10196 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10197 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);