arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/sched/isolation.h>
  55 #include <linux/mem_encrypt.h>
  56
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68 #include <asm/mshyperv.h>
  69 #include <asm/hypervisor.h>
  70 #include <asm/intel_pt.h>
  71 #include <clocksource/hyperv_timer.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /*
 139  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 140  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 141  * advancement entirely.  Any other value is used as-is and disables adaptive
 142  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 143  */
 144 static int __read_mostly lapic_timer_advance_ns = -1;
 145 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 146
 147 static bool __read_mostly vector_hashing = true;
 148 module_param(vector_hashing, bool, S_IRUGO);
 149
 150 bool __read_mostly enable_vmware_backdoor = false;
 151 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 152 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 153
 154 static bool __read_mostly force_emulation_prefix = false;
 155 module_param(force_emulation_prefix, bool, S_IRUGO);
 156
 157 int __read_mostly pi_inject_timer = -1;
 158 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 159
 160 #define KVM_NR_SHARED_MSRS 16
 161
 162 struct kvm_shared_msrs_global {
 163         int nr;
 164         u32 msrs[KVM_NR_SHARED_MSRS];
 165 };
 166
 167 struct kvm_shared_msrs {
 168         struct user_return_notifier urn;
 169         bool registered;
 170         struct kvm_shared_msr_values {
 171                 u64 host;
 172                 u64 curr;
 173         } values[KVM_NR_SHARED_MSRS];
 174 };
 175
 176 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 177 static struct kvm_shared_msrs __percpu *shared_msrs;
 178
 179 struct kvm_stats_debugfs_item debugfs_entries[] = {
 180         { "pf_fixed", VCPU_STAT(pf_fixed) },
 181         { "pf_guest", VCPU_STAT(pf_guest) },
 182         { "tlb_flush", VCPU_STAT(tlb_flush) },
 183         { "invlpg", VCPU_STAT(invlpg) },
 184         { "exits", VCPU_STAT(exits) },
 185         { "io_exits", VCPU_STAT(io_exits) },
 186         { "mmio_exits", VCPU_STAT(mmio_exits) },
 187         { "signal_exits", VCPU_STAT(signal_exits) },
 188         { "irq_window", VCPU_STAT(irq_window_exits) },
 189         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 190         { "halt_exits", VCPU_STAT(halt_exits) },
 191         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 192         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 193         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 194         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 195         { "hypercalls", VCPU_STAT(hypercalls) },
 196         { "request_irq", VCPU_STAT(request_irq_exits) },
 197         { "irq_exits", VCPU_STAT(irq_exits) },
 198         { "host_state_reload", VCPU_STAT(host_state_reload) },
 199         { "fpu_reload", VCPU_STAT(fpu_reload) },
 200         { "insn_emulation", VCPU_STAT(insn_emulation) },
 201         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 202         { "irq_injections", VCPU_STAT(irq_injections) },
 203         { "nmi_injections", VCPU_STAT(nmi_injections) },
 204         { "req_event", VCPU_STAT(req_event) },
 205         { "l1d_flush", VCPU_STAT(l1d_flush) },
 206         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 207         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 208         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 209         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 210         { "mmu_flooded", VM_STAT(mmu_flooded) },
 211         { "mmu_recycled", VM_STAT(mmu_recycled) },
 212         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 213         { "mmu_unsync", VM_STAT(mmu_unsync) },
 214         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 215         { "largepages", VM_STAT(lpages) },
 216         { "max_mmu_page_hash_collisions",
 217                 VM_STAT(max_mmu_page_hash_collisions) },
 218         { NULL }
 219 };
 220
 221 u64 __read_mostly host_xcr0;
 222
 223 struct kmem_cache *x86_fpu_cache;
 224 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 225
 226 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 227
 228 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 229 {
 230         int i;
 231         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 232                 vcpu->arch.apf.gfns[i] = ~0;
 233 }
 234
 235 static void kvm_on_user_return(struct user_return_notifier *urn)
 236 {
 237         unsigned slot;
 238         struct kvm_shared_msrs *locals
 239                 = container_of(urn, struct kvm_shared_msrs, urn);
 240         struct kvm_shared_msr_values *values;
 241         unsigned long flags;
 242
 243         /*
 244          * Disabling irqs at this point since the following code could be
 245          * interrupted and executed through kvm_arch_hardware_disable()
 246          */
 247         local_irq_save(flags);
 248         if (locals->registered) {
 249                 locals->registered = false;
 250                 user_return_notifier_unregister(urn);
 251         }
 252         local_irq_restore(flags);
 253         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 254                 values = &locals->values[slot];
 255                 if (values->host != values->curr) {
 256                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 257                         values->curr = values->host;
 258                 }
 259         }
 260 }
 261
 262 static void shared_msr_update(unsigned slot, u32 msr)
 263 {
 264         u64 value;
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         /* only read, and nobody should modify it at this time,
 269          * so don't need lock */
 270         if (slot >= shared_msrs_global.nr) {
 271                 printk(KERN_ERR "kvm: invalid MSR slot!");
 272                 return;
 273         }
 274         rdmsrl_safe(msr, &value);
 275         smsr->values[slot].host = value;
 276         smsr->values[slot].curr = value;
 277 }
 278
 279 void kvm_define_shared_msr(unsigned slot, u32 msr)
 280 {
 281         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 282         shared_msrs_global.msrs[slot] = msr;
 283         if (slot >= shared_msrs_global.nr)
 284                 shared_msrs_global.nr = slot + 1;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 287
 288 static void kvm_shared_msr_cpu_online(void)
 289 {
 290         unsigned i;
 291
 292         for (i = 0; i < shared_msrs_global.nr; ++i)
 293                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 294 }
 295
 296 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 297 {
 298         unsigned int cpu = smp_processor_id();
 299         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 300         int err;
 301
 302         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 303                 return 0;
 304         smsr->values[slot].curr = value;
 305         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 306         if (err)
 307                 return 1;
 308
 309         if (!smsr->registered) {
 310                 smsr->urn.on_user_return = kvm_on_user_return;
 311                 user_return_notifier_register(&smsr->urn);
 312                 smsr->registered = true;
 313         }
 314         return 0;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 317
 318 static void drop_user_return_notifiers(void)
 319 {
 320         unsigned int cpu = smp_processor_id();
 321         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 322
 323         if (smsr->registered)
 324                 kvm_on_user_return(&smsr->urn);
 325 }
 326
 327 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 328 {
 329         return vcpu->arch.apic_base;
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 332
 333 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 334 {
 335         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 338
 339 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 340 {
 341         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 342         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 343         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 344                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 345
 346         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 347                 return 1;
 348         if (!msr_info->host_initiated) {
 349                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 350                         return 1;
 351                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 352                         return 1;
 353         }
 354
 355         kvm_lapic_set_base(vcpu, msr_info->data);
 356         return 0;
 357 }
 358 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 359
 360 asmlinkage __visible void kvm_spurious_fault(void)
 361 {
 362         /* Fault while not rebooting.  We want the trace. */
 363         BUG();
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 366
 367 #define EXCPT_BENIGN            0
 368 #define EXCPT_CONTRIBUTORY      1
 369 #define EXCPT_PF                2
 370
 371 static int exception_class(int vector)
 372 {
 373         switch (vector) {
 374         case PF_VECTOR:
 375                 return EXCPT_PF;
 376         case DE_VECTOR:
 377         case TS_VECTOR:
 378         case NP_VECTOR:
 379         case SS_VECTOR:
 380         case GP_VECTOR:
 381                 return EXCPT_CONTRIBUTORY;
 382         default:
 383                 break;
 384         }
 385         return EXCPT_BENIGN;
 386 }
 387
 388 #define EXCPT_FAULT             0
 389 #define EXCPT_TRAP              1
 390 #define EXCPT_ABORT             2
 391 #define EXCPT_INTERRUPT         3
 392
 393 static int exception_type(int vector)
 394 {
 395         unsigned int mask;
 396
 397         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 398                 return EXCPT_INTERRUPT;
 399
 400         mask = 1 << vector;
 401
 402         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 403         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 404                 return EXCPT_TRAP;
 405
 406         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 407                 return EXCPT_ABORT;
 408
 409         /* Reserved exceptions will result in fault */
 410         return EXCPT_FAULT;
 411 }
 412
 413 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 414 {
 415         unsigned nr = vcpu->arch.exception.nr;
 416         bool has_payload = vcpu->arch.exception.has_payload;
 417         unsigned long payload = vcpu->arch.exception.payload;
 418
 419         if (!has_payload)
 420                 return;
 421
 422         switch (nr) {
 423         case DB_VECTOR:
 424                 /*
 425                  * "Certain debug exceptions may clear bit 0-3.  The
 426                  * remaining contents of the DR6 register are never
 427                  * cleared by the processor".
 428                  */
 429                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 430                 /*
 431                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 432                  */
 433                 vcpu->arch.dr6 |= DR6_RTM;
 434                 vcpu->arch.dr6 |= payload;
 435                 /*
 436                  * Bit 16 should be set in the payload whenever the #DB
 437                  * exception should clear DR6.RTM. This makes the payload
 438                  * compatible with the pending debug exceptions under VMX.
 439                  * Though not currently documented in the SDM, this also
 440                  * makes the payload compatible with the exit qualification
 441                  * for #DB exceptions under VMX.
 442                  */
 443                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 444                 break;
 445         case PF_VECTOR:
 446                 vcpu->arch.cr2 = payload;
 447                 break;
 448         }
 449
 450         vcpu->arch.exception.has_payload = false;
 451         vcpu->arch.exception.payload = 0;
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 454
 455 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 456                 unsigned nr, bool has_error, u32 error_code,
 457                 bool has_payload, unsigned long payload, bool reinject)
 458 {
 459         u32 prev_nr;
 460         int class1, class2;
 461
 462         kvm_make_request(KVM_REQ_EVENT, vcpu);
 463
 464         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 465         queue:
 466                 if (has_error && !is_protmode(vcpu))
 467                         has_error = false;
 468                 if (reinject) {
 469                         /*
 470                          * On vmentry, vcpu->arch.exception.pending is only
 471                          * true if an event injection was blocked by
 472                          * nested_run_pending.  In that case, however,
 473                          * vcpu_enter_guest requests an immediate exit,
 474                          * and the guest shouldn't proceed far enough to
 475                          * need reinjection.
 476                          */
 477                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 478                         vcpu->arch.exception.injected = true;
 479                         if (WARN_ON_ONCE(has_payload)) {
 480                                 /*
 481                                  * A reinjected event has already
 482                                  * delivered its payload.
 483                                  */
 484                                 has_payload = false;
 485                                 payload = 0;
 486                         }
 487                 } else {
 488                         vcpu->arch.exception.pending = true;
 489                         vcpu->arch.exception.injected = false;
 490                 }
 491                 vcpu->arch.exception.has_error_code = has_error;
 492                 vcpu->arch.exception.nr = nr;
 493                 vcpu->arch.exception.error_code = error_code;
 494                 vcpu->arch.exception.has_payload = has_payload;
 495                 vcpu->arch.exception.payload = payload;
 496                 /*
 497                  * In guest mode, payload delivery should be deferred,
 498                  * so that the L1 hypervisor can intercept #PF before
 499                  * CR2 is modified (or intercept #DB before DR6 is
 500                  * modified under nVMX).  However, for ABI
 501                  * compatibility with KVM_GET_VCPU_EVENTS and
 502                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 503                  * delivery unless userspace has enabled this
 504                  * functionality via the per-VM capability,
 505                  * KVM_CAP_EXCEPTION_PAYLOAD.
 506                  */
 507                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 508                     !is_guest_mode(vcpu))
 509                         kvm_deliver_exception_payload(vcpu);
 510                 return;
 511         }
 512
 513         /* to check exception */
 514         prev_nr = vcpu->arch.exception.nr;
 515         if (prev_nr == DF_VECTOR) {
 516                 /* triple fault -> shutdown */
 517                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 518                 return;
 519         }
 520         class1 = exception_class(prev_nr);
 521         class2 = exception_class(nr);
 522         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 523                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 524                 /*
 525                  * Generate double fault per SDM Table 5-5.  Set
 526                  * exception.pending = true so that the double fault
 527                  * can trigger a nested vmexit.
 528                  */
 529                 vcpu->arch.exception.pending = true;
 530                 vcpu->arch.exception.injected = false;
 531                 vcpu->arch.exception.has_error_code = true;
 532                 vcpu->arch.exception.nr = DF_VECTOR;
 533                 vcpu->arch.exception.error_code = 0;
 534                 vcpu->arch.exception.has_payload = false;
 535                 vcpu->arch.exception.payload = 0;
 536         } else
 537                 /* replace previous exception with a new one in a hope
 538                    that instruction re-execution will regenerate lost
 539                    exception */
 540                 goto queue;
 541 }
 542
 543 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 544 {
 545         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 548
 549 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 550 {
 551         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 554
 555 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 556                                   unsigned long payload)
 557 {
 558         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 559 }
 560
 561 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 562                                     u32 error_code, unsigned long payload)
 563 {
 564         kvm_multiple_exception(vcpu, nr, true, error_code,
 565                                true, payload, false);
 566 }
 567
 568 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 569 {
 570         if (err)
 571                 kvm_inject_gp(vcpu, 0);
 572         else
 573                 return kvm_skip_emulated_instruction(vcpu);
 574
 575         return 1;
 576 }
 577 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 578
 579 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 580 {
 581         ++vcpu->stat.pf_guest;
 582         vcpu->arch.exception.nested_apf =
 583                 is_guest_mode(vcpu) && fault->async_page_fault;
 584         if (vcpu->arch.exception.nested_apf) {
 585                 vcpu->arch.apf.nested_apf_token = fault->address;
 586                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 587         } else {
 588                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 589                                         fault->address);
 590         }
 591 }
 592 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 593
 594 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 595 {
 596         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 597                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 598         else
 599                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 600
 601         return fault->nested_page_fault;
 602 }
 603
 604 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 605 {
 606         atomic_inc(&vcpu->arch.nmi_queued);
 607         kvm_make_request(KVM_REQ_NMI, vcpu);
 608 }
 609 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 610
 611 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 612 {
 613         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 614 }
 615 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 616
 617 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 618 {
 619         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 622
 623 /*
 624  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 625  * a #GP and return false.
 626  */
 627 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 628 {
 629         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 630                 return true;
 631         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 632         return false;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 635
 636 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 637 {
 638         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 639                 return true;
 640
 641         kvm_queue_exception(vcpu, UD_VECTOR);
 642         return false;
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_require_dr);
 645
 646 /*
 647  * This function will be used to read from the physical memory of the currently
 648  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 649  * can read from guest physical or from the guest's guest physical memory.
 650  */
 651 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 652                             gfn_t ngfn, void *data, int offset, int len,
 653                             u32 access)
 654 {
 655         struct x86_exception exception;
 656         gfn_t real_gfn;
 657         gpa_t ngpa;
 658
 659         ngpa     = gfn_to_gpa(ngfn);
 660         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 661         if (real_gfn == UNMAPPED_GVA)
 662                 return -EFAULT;
 663
 664         real_gfn = gpa_to_gfn(real_gfn);
 665
 666         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 669
 670 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 671                                void *data, int offset, int len, u32 access)
 672 {
 673         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 674                                        data, offset, len, access);
 675 }
 676
 677 /*
 678  * Load the pae pdptrs.  Return true is they are all valid.
 679  */
 680 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 681 {
 682         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 683         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 684         int i;
 685         int ret;
 686         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 687
 688         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 689                                       offset * sizeof(u64), sizeof(pdpte),
 690                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 691         if (ret < 0) {
 692                 ret = 0;
 693                 goto out;
 694         }
 695         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 696                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 697                     (pdpte[i] &
 698                      vcpu->arch.mmu->guest_rsvd_check.rsvd_bits_mask[0][2])) {
 699                         ret = 0;
 700                         goto out;
 701                 }
 702         }
 703         ret = 1;
 704
 705         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 706         __set_bit(VCPU_EXREG_PDPTR,
 707                   (unsigned long *)&vcpu->arch.regs_avail);
 708         __set_bit(VCPU_EXREG_PDPTR,
 709                   (unsigned long *)&vcpu->arch.regs_dirty);
 710 out:
 711
 712         return ret;
 713 }
 714 EXPORT_SYMBOL_GPL(load_pdptrs);
 715
 716 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 717 {
 718         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 719         bool changed = true;
 720         int offset;
 721         gfn_t gfn;
 722         int r;
 723
 724         if (!is_pae_paging(vcpu))
 725                 return false;
 726
 727         if (!test_bit(VCPU_EXREG_PDPTR,
 728                       (unsigned long *)&vcpu->arch.regs_avail))
 729                 return true;
 730
 731         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 732         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 733         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 734                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 735         if (r < 0)
 736                 goto out;
 737         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 738 out:
 739
 740         return changed;
 741 }
 742 EXPORT_SYMBOL_GPL(pdptrs_changed);
 743
 744 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 745 {
 746         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 747         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 748
 749         cr0 |= X86_CR0_ET;
 750
 751 #ifdef CONFIG_X86_64
 752         if (cr0 & 0xffffffff00000000UL)
 753                 return 1;
 754 #endif
 755
 756         cr0 &= ~CR0_RESERVED_BITS;
 757
 758         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 759                 return 1;
 760
 761         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 762                 return 1;
 763
 764         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 765 #ifdef CONFIG_X86_64
 766                 if ((vcpu->arch.efer & EFER_LME)) {
 767                         int cs_db, cs_l;
 768
 769                         if (!is_pae(vcpu))
 770                                 return 1;
 771                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 772                         if (cs_l)
 773                                 return 1;
 774                 } else
 775 #endif
 776                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 777                                                  kvm_read_cr3(vcpu)))
 778                         return 1;
 779         }
 780
 781         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 782                 return 1;
 783
 784         kvm_x86_ops->set_cr0(vcpu, cr0);
 785
 786         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 787                 kvm_clear_async_pf_completion_queue(vcpu);
 788                 kvm_async_pf_hash_reset(vcpu);
 789         }
 790
 791         if ((cr0 ^ old_cr0) & update_bits)
 792                 kvm_mmu_reset_context(vcpu);
 793
 794         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 795             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 796             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 797                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 798
 799         return 0;
 800 }
 801 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 802
 803 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 804 {
 805         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 806 }
 807 EXPORT_SYMBOL_GPL(kvm_lmsw);
 808
 809 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 810 {
 811         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 812                         !vcpu->guest_xcr0_loaded) {
 813                 /* kvm_set_xcr() also depends on this */
 814                 if (vcpu->arch.xcr0 != host_xcr0)
 815                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 816                 vcpu->guest_xcr0_loaded = 1;
 817         }
 818 }
 819 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 820
 821 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 822 {
 823         if (vcpu->guest_xcr0_loaded) {
 824                 if (vcpu->arch.xcr0 != host_xcr0)
 825                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 826                 vcpu->guest_xcr0_loaded = 0;
 827         }
 828 }
 829 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 830
 831 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 832 {
 833         u64 xcr0 = xcr;
 834         u64 old_xcr0 = vcpu->arch.xcr0;
 835         u64 valid_bits;
 836
 837         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 838         if (index != XCR_XFEATURE_ENABLED_MASK)
 839                 return 1;
 840         if (!(xcr0 & XFEATURE_MASK_FP))
 841                 return 1;
 842         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 843                 return 1;
 844
 845         /*
 846          * Do not allow the guest to set bits that we do not support
 847          * saving.  However, xcr0 bit 0 is always set, even if the
 848          * emulated CPU does not support XSAVE (see fx_init).
 849          */
 850         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 851         if (xcr0 & ~valid_bits)
 852                 return 1;
 853
 854         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 855             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 856                 return 1;
 857
 858         if (xcr0 & XFEATURE_MASK_AVX512) {
 859                 if (!(xcr0 & XFEATURE_MASK_YMM))
 860                         return 1;
 861                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 862                         return 1;
 863         }
 864         vcpu->arch.xcr0 = xcr0;
 865
 866         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 867                 kvm_update_cpuid(vcpu);
 868         return 0;
 869 }
 870
 871 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 872 {
 873         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 874             __kvm_set_xcr(vcpu, index, xcr)) {
 875                 kvm_inject_gp(vcpu, 0);
 876                 return 1;
 877         }
 878         return 0;
 879 }
 880 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 881
 882 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 883 {
 884         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 885         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 886                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 887
 888         if (cr4 & CR4_RESERVED_BITS)
 889                 return 1;
 890
 891         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 892                 return 1;
 893
 894         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 895                 return 1;
 896
 897         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 898                 return 1;
 899
 900         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 901                 return 1;
 902
 903         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 904                 return 1;
 905
 906         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 907                 return 1;
 908
 909         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 910                 return 1;
 911
 912         if (is_long_mode(vcpu)) {
 913                 if (!(cr4 & X86_CR4_PAE))
 914                         return 1;
 915         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 916                    && ((cr4 ^ old_cr4) & pdptr_bits)
 917                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 918                                    kvm_read_cr3(vcpu)))
 919                 return 1;
 920
 921         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 922                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 923                         return 1;
 924
 925                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 926                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 927                         return 1;
 928         }
 929
 930         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 931                 return 1;
 932
 933         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 934             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 935                 kvm_mmu_reset_context(vcpu);
 936
 937         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 938                 kvm_update_cpuid(vcpu);
 939
 940         return 0;
 941 }
 942 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 943
 944 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 945 {
 946         bool skip_tlb_flush = false;
 947 #ifdef CONFIG_X86_64
 948         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 949
 950         if (pcid_enabled) {
 951                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 952                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 953         }
 954 #endif
 955
 956         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 957                 if (!skip_tlb_flush) {
 958                         kvm_mmu_sync_roots(vcpu);
 959                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 960                 }
 961                 return 0;
 962         }
 963
 964         if (is_long_mode(vcpu) &&
 965             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 966                 return 1;
 967         else if (is_pae_paging(vcpu) &&
 968                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 969                 return 1;
 970
 971         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 972         vcpu->arch.cr3 = cr3;
 973         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 974
 975         return 0;
 976 }
 977 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 978
 979 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 980 {
 981         if (cr8 & CR8_RESERVED_BITS)
 982                 return 1;
 983         if (lapic_in_kernel(vcpu))
 984                 kvm_lapic_set_tpr(vcpu, cr8);
 985         else
 986                 vcpu->arch.cr8 = cr8;
 987         return 0;
 988 }
 989 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 990
 991 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 992 {
 993         if (lapic_in_kernel(vcpu))
 994                 return kvm_lapic_get_cr8(vcpu);
 995         else
 996                 return vcpu->arch.cr8;
 997 }
 998 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 999
1000 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1001 {
1002         int i;
1003
1004         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1005                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1006                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1007                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1008         }
1009 }
1010
1011 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1012 {
1013         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1014                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1015 }
1016
1017 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1018 {
1019         unsigned long dr7;
1020
1021         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1022                 dr7 = vcpu->arch.guest_debug_dr7;
1023         else
1024                 dr7 = vcpu->arch.dr7;
1025         kvm_x86_ops->set_dr7(vcpu, dr7);
1026         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1027         if (dr7 & DR7_BP_EN_MASK)
1028                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1029 }
1030
1031 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1032 {
1033         u64 fixed = DR6_FIXED_1;
1034
1035         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1036                 fixed |= DR6_RTM;
1037         return fixed;
1038 }
1039
1040 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1041 {
1042         switch (dr) {
1043         case 0 ... 3:
1044                 vcpu->arch.db[dr] = val;
1045                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1046                         vcpu->arch.eff_db[dr] = val;
1047                 break;
1048         case 4:
1049                 /* fall through */
1050         case 6:
1051                 if (val & 0xffffffff00000000ULL)
1052                         return -1; /* #GP */
1053                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1054                 kvm_update_dr6(vcpu);
1055                 break;
1056         case 5:
1057                 /* fall through */
1058         default: /* 7 */
1059                 if (val & 0xffffffff00000000ULL)
1060                         return -1; /* #GP */
1061                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1062                 kvm_update_dr7(vcpu);
1063                 break;
1064         }
1065
1066         return 0;
1067 }
1068
1069 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1070 {
1071         if (__kvm_set_dr(vcpu, dr, val)) {
1072                 kvm_inject_gp(vcpu, 0);
1073                 return 1;
1074         }
1075         return 0;
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_set_dr);
1078
1079 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1080 {
1081         switch (dr) {
1082         case 0 ... 3:
1083                 *val = vcpu->arch.db[dr];
1084                 break;
1085         case 4:
1086                 /* fall through */
1087         case 6:
1088                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1089                         *val = vcpu->arch.dr6;
1090                 else
1091                         *val = kvm_x86_ops->get_dr6(vcpu);
1092                 break;
1093         case 5:
1094                 /* fall through */
1095         default: /* 7 */
1096                 *val = vcpu->arch.dr7;
1097                 break;
1098         }
1099         return 0;
1100 }
1101 EXPORT_SYMBOL_GPL(kvm_get_dr);
1102
1103 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1104 {
1105         u32 ecx = kvm_rcx_read(vcpu);
1106         u64 data;
1107         int err;
1108
1109         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1110         if (err)
1111                 return err;
1112         kvm_rax_write(vcpu, (u32)data);
1113         kvm_rdx_write(vcpu, data >> 32);
1114         return err;
1115 }
1116 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1117
1118 /*
1119  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1120  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1121  *
1122  * This list is modified at module load time to reflect the
1123  * capabilities of the host cpu. This capabilities test skips MSRs that are
1124  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1125  * may depend on host virtualization features rather than host cpu features.
1126  */
1127
1128 static u32 msrs_to_save[] = {
1129         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1130         MSR_STAR,
1131 #ifdef CONFIG_X86_64
1132         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1133 #endif
1134         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1135         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1136         MSR_IA32_SPEC_CTRL,
1137         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1138         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1139         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1140         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1141         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1142         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1143 };
1144
1145 static unsigned num_msrs_to_save;
1146
1147 static u32 emulated_msrs[] = {
1148         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1149         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1150         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1151         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1152         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1153         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1154         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1155         HV_X64_MSR_RESET,
1156         HV_X64_MSR_VP_INDEX,
1157         HV_X64_MSR_VP_RUNTIME,
1158         HV_X64_MSR_SCONTROL,
1159         HV_X64_MSR_STIMER0_CONFIG,
1160         HV_X64_MSR_VP_ASSIST_PAGE,
1161         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1162         HV_X64_MSR_TSC_EMULATION_STATUS,
1163
1164         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1165         MSR_KVM_PV_EOI_EN,
1166
1167         MSR_IA32_TSC_ADJUST,
1168         MSR_IA32_TSCDEADLINE,
1169         MSR_IA32_ARCH_CAPABILITIES,
1170         MSR_IA32_MISC_ENABLE,
1171         MSR_IA32_MCG_STATUS,
1172         MSR_IA32_MCG_CTL,
1173         MSR_IA32_MCG_EXT_CTL,
1174         MSR_IA32_SMBASE,
1175         MSR_SMI_COUNT,
1176         MSR_PLATFORM_INFO,
1177         MSR_MISC_FEATURES_ENABLES,
1178         MSR_AMD64_VIRT_SPEC_CTRL,
1179         MSR_IA32_POWER_CTL,
1180
1181         /*
1182          * The following list leaves out MSRs whose values are determined
1183          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1184          * We always support the "true" VMX control MSRs, even if the host
1185          * processor does not, so I am putting these registers here rather
1186          * than in msrs_to_save.
1187          */
1188         MSR_IA32_VMX_BASIC,
1189         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1190         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1191         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1192         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1193         MSR_IA32_VMX_MISC,
1194         MSR_IA32_VMX_CR0_FIXED0,
1195         MSR_IA32_VMX_CR4_FIXED0,
1196         MSR_IA32_VMX_VMCS_ENUM,
1197         MSR_IA32_VMX_PROCBASED_CTLS2,
1198         MSR_IA32_VMX_EPT_VPID_CAP,
1199         MSR_IA32_VMX_VMFUNC,
1200
1201         MSR_K7_HWCR,
1202         MSR_KVM_POLL_CONTROL,
1203 };
1204
1205 static unsigned num_emulated_msrs;
1206
1207 /*
1208  * List of msr numbers which are used to expose MSR-based features that
1209  * can be used by a hypervisor to validate requested CPU features.
1210  */
1211 static u32 msr_based_features[] = {
1212         MSR_IA32_VMX_BASIC,
1213         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1214         MSR_IA32_VMX_PINBASED_CTLS,
1215         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1216         MSR_IA32_VMX_PROCBASED_CTLS,
1217         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1218         MSR_IA32_VMX_EXIT_CTLS,
1219         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1220         MSR_IA32_VMX_ENTRY_CTLS,
1221         MSR_IA32_VMX_MISC,
1222         MSR_IA32_VMX_CR0_FIXED0,
1223         MSR_IA32_VMX_CR0_FIXED1,
1224         MSR_IA32_VMX_CR4_FIXED0,
1225         MSR_IA32_VMX_CR4_FIXED1,
1226         MSR_IA32_VMX_VMCS_ENUM,
1227         MSR_IA32_VMX_PROCBASED_CTLS2,
1228         MSR_IA32_VMX_EPT_VPID_CAP,
1229         MSR_IA32_VMX_VMFUNC,
1230
1231         MSR_F10H_DECFG,
1232         MSR_IA32_UCODE_REV,
1233         MSR_IA32_ARCH_CAPABILITIES,
1234 };
1235
1236 static unsigned int num_msr_based_features;
1237
1238 static u64 kvm_get_arch_capabilities(void)
1239 {
1240         u64 data = 0;
1241
1242         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1243                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1244
1245         /*
1246          * If we're doing cache flushes (either "always" or "cond")
1247          * we will do one whenever the guest does a vmlaunch/vmresume.
1248          * If an outer hypervisor is doing the cache flush for us
1249          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1250          * capability to the guest too, and if EPT is disabled we're not
1251          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1252          * require a nested hypervisor to do a flush of its own.
1253          */
1254         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1255                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1256
1257         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1258                 data |= ARCH_CAP_RDCL_NO;
1259         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1260                 data |= ARCH_CAP_SSB_NO;
1261         if (!boot_cpu_has_bug(X86_BUG_MDS))
1262                 data |= ARCH_CAP_MDS_NO;
1263
1264         return data;
1265 }
1266
1267 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1268 {
1269         switch (msr->index) {
1270         case MSR_IA32_ARCH_CAPABILITIES:
1271                 msr->data = kvm_get_arch_capabilities();
1272                 break;
1273         case MSR_IA32_UCODE_REV:
1274                 rdmsrl_safe(msr->index, &msr->data);
1275                 break;
1276         default:
1277                 if (kvm_x86_ops->get_msr_feature(msr))
1278                         return 1;
1279         }
1280         return 0;
1281 }
1282
1283 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1284 {
1285         struct kvm_msr_entry msr;
1286         int r;
1287
1288         msr.index = index;
1289         r = kvm_get_msr_feature(&msr);
1290         if (r)
1291                 return r;
1292
1293         *data = msr.data;
1294
1295         return 0;
1296 }
1297
1298 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1299 {
1300         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1301                 return false;
1302
1303         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1304                 return false;
1305
1306         if (efer & (EFER_LME | EFER_LMA) &&
1307             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1308                 return false;
1309
1310         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1311                 return false;
1312
1313         return true;
1314
1315 }
1316 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1317 {
1318         if (efer & efer_reserved_bits)
1319                 return false;
1320
1321         return __kvm_valid_efer(vcpu, efer);
1322 }
1323 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1324
1325 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1326 {
1327         u64 old_efer = vcpu->arch.efer;
1328         u64 efer = msr_info->data;
1329
1330         if (efer & efer_reserved_bits)
1331                 return 1;
1332
1333         if (!msr_info->host_initiated) {
1334                 if (!__kvm_valid_efer(vcpu, efer))
1335                         return 1;
1336
1337                 if (is_paging(vcpu) &&
1338                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1339                         return 1;
1340         }
1341
1342         efer &= ~EFER_LMA;
1343         efer |= vcpu->arch.efer & EFER_LMA;
1344
1345         kvm_x86_ops->set_efer(vcpu, efer);
1346
1347         /* Update reserved bits */
1348         if ((efer ^ old_efer) & EFER_NX)
1349                 kvm_mmu_reset_context(vcpu);
1350
1351         return 0;
1352 }
1353
1354 void kvm_enable_efer_bits(u64 mask)
1355 {
1356        efer_reserved_bits &= ~mask;
1357 }
1358 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1359
1360 /*
1361  * Writes msr value into into the appropriate "register".
1362  * Returns 0 on success, non-0 otherwise.
1363  * Assumes vcpu_load() was already called.
1364  */
1365 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1366 {
1367         switch (msr->index) {
1368         case MSR_FS_BASE:
1369         case MSR_GS_BASE:
1370         case MSR_KERNEL_GS_BASE:
1371         case MSR_CSTAR:
1372         case MSR_LSTAR:
1373                 if (is_noncanonical_address(msr->data, vcpu))
1374                         return 1;
1375                 break;
1376         case MSR_IA32_SYSENTER_EIP:
1377         case MSR_IA32_SYSENTER_ESP:
1378                 /*
1379                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1380                  * non-canonical address is written on Intel but not on
1381                  * AMD (which ignores the top 32-bits, because it does
1382                  * not implement 64-bit SYSENTER).
1383                  *
1384                  * 64-bit code should hence be able to write a non-canonical
1385                  * value on AMD.  Making the address canonical ensures that
1386                  * vmentry does not fail on Intel after writing a non-canonical
1387                  * value, and that something deterministic happens if the guest
1388                  * invokes 64-bit SYSENTER.
1389                  */
1390                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1391         }
1392         return kvm_x86_ops->set_msr(vcpu, msr);
1393 }
1394 EXPORT_SYMBOL_GPL(kvm_set_msr);
1395
1396 /*
1397  * Adapt set_msr() to msr_io()'s calling convention
1398  */
1399 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1400 {
1401         struct msr_data msr;
1402         int r;
1403
1404         msr.index = index;
1405         msr.host_initiated = true;
1406         r = kvm_get_msr(vcpu, &msr);
1407         if (r)
1408                 return r;
1409
1410         *data = msr.data;
1411         return 0;
1412 }
1413
1414 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1415 {
1416         struct msr_data msr;
1417
1418         msr.data = *data;
1419         msr.index = index;
1420         msr.host_initiated = true;
1421         return kvm_set_msr(vcpu, &msr);
1422 }
1423
1424 #ifdef CONFIG_X86_64
1425 struct pvclock_gtod_data {
1426         seqcount_t      seq;
1427
1428         struct { /* extract of a clocksource struct */
1429                 int vclock_mode;
1430                 u64     cycle_last;
1431                 u64     mask;
1432                 u32     mult;
1433                 u32     shift;
1434         } clock;
1435
1436         u64             boot_ns;
1437         u64             nsec_base;
1438         u64             wall_time_sec;
1439 };
1440
1441 static struct pvclock_gtod_data pvclock_gtod_data;
1442
1443 static void update_pvclock_gtod(struct timekeeper *tk)
1444 {
1445         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1446         u64 boot_ns;
1447
1448         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1449
1450         write_seqcount_begin(&vdata->seq);
1451
1452         /* copy pvclock gtod data */
1453         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1454         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1455         vdata->clock.mask               = tk->tkr_mono.mask;
1456         vdata->clock.mult               = tk->tkr_mono.mult;
1457         vdata->clock.shift              = tk->tkr_mono.shift;
1458
1459         vdata->boot_ns                  = boot_ns;
1460         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1461
1462         vdata->wall_time_sec            = tk->xtime_sec;
1463
1464         write_seqcount_end(&vdata->seq);
1465 }
1466 #endif
1467
1468 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1469 {
1470         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1471         kvm_vcpu_kick(vcpu);
1472 }
1473
1474 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1475 {
1476         int version;
1477         int r;
1478         struct pvclock_wall_clock wc;
1479         struct timespec64 boot;
1480
1481         if (!wall_clock)
1482                 return;
1483
1484         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1485         if (r)
1486                 return;
1487
1488         if (version & 1)
1489                 ++version;  /* first time write, random junk */
1490
1491         ++version;
1492
1493         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1494                 return;
1495
1496         /*
1497          * The guest calculates current wall clock time by adding
1498          * system time (updated by kvm_guest_time_update below) to the
1499          * wall clock specified here.  guest system time equals host
1500          * system time for us, thus we must fill in host boot time here.
1501          */
1502         getboottime64(&boot);
1503
1504         if (kvm->arch.kvmclock_offset) {
1505                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1506                 boot = timespec64_sub(boot, ts);
1507         }
1508         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1509         wc.nsec = boot.tv_nsec;
1510         wc.version = version;
1511
1512         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1513
1514         version++;
1515         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1516 }
1517
1518 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1519 {
1520         do_shl32_div32(dividend, divisor);
1521         return dividend;
1522 }
1523
1524 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1525                                s8 *pshift, u32 *pmultiplier)
1526 {
1527         uint64_t scaled64;
1528         int32_t  shift = 0;
1529         uint64_t tps64;
1530         uint32_t tps32;
1531
1532         tps64 = base_hz;
1533         scaled64 = scaled_hz;
1534         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1535                 tps64 >>= 1;
1536                 shift--;
1537         }
1538
1539         tps32 = (uint32_t)tps64;
1540         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1541                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1542                         scaled64 >>= 1;
1543                 else
1544                         tps32 <<= 1;
1545                 shift++;
1546         }
1547
1548         *pshift = shift;
1549         *pmultiplier = div_frac(scaled64, tps32);
1550 }
1551
1552 #ifdef CONFIG_X86_64
1553 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1554 #endif
1555
1556 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1557 static unsigned long max_tsc_khz;
1558
1559 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1560 {
1561         u64 v = (u64)khz * (1000000 + ppm);
1562         do_div(v, 1000000);
1563         return v;
1564 }
1565
1566 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1567 {
1568         u64 ratio;
1569
1570         /* Guest TSC same frequency as host TSC? */
1571         if (!scale) {
1572                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1573                 return 0;
1574         }
1575
1576         /* TSC scaling supported? */
1577         if (!kvm_has_tsc_control) {
1578                 if (user_tsc_khz > tsc_khz) {
1579                         vcpu->arch.tsc_catchup = 1;
1580                         vcpu->arch.tsc_always_catchup = 1;
1581                         return 0;
1582                 } else {
1583                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1584                         return -1;
1585                 }
1586         }
1587
1588         /* TSC scaling required  - calculate ratio */
1589         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1590                                 user_tsc_khz, tsc_khz);
1591
1592         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1593                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1594                                     user_tsc_khz);
1595                 return -1;
1596         }
1597
1598         vcpu->arch.tsc_scaling_ratio = ratio;
1599         return 0;
1600 }
1601
1602 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1603 {
1604         u32 thresh_lo, thresh_hi;
1605         int use_scaling = 0;
1606
1607         /* tsc_khz can be zero if TSC calibration fails */
1608         if (user_tsc_khz == 0) {
1609                 /* set tsc_scaling_ratio to a safe value */
1610                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1611                 return -1;
1612         }
1613
1614         /* Compute a scale to convert nanoseconds in TSC cycles */
1615         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1616                            &vcpu->arch.virtual_tsc_shift,
1617                            &vcpu->arch.virtual_tsc_mult);
1618         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1619
1620         /*
1621          * Compute the variation in TSC rate which is acceptable
1622          * within the range of tolerance and decide if the
1623          * rate being applied is within that bounds of the hardware
1624          * rate.  If so, no scaling or compensation need be done.
1625          */
1626         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1627         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1628         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1629                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1630                 use_scaling = 1;
1631         }
1632         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1633 }
1634
1635 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1636 {
1637         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1638                                       vcpu->arch.virtual_tsc_mult,
1639                                       vcpu->arch.virtual_tsc_shift);
1640         tsc += vcpu->arch.this_tsc_write;
1641         return tsc;
1642 }
1643
1644 static inline int gtod_is_based_on_tsc(int mode)
1645 {
1646         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1647 }
1648
1649 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1650 {
1651 #ifdef CONFIG_X86_64
1652         bool vcpus_matched;
1653         struct kvm_arch *ka = &vcpu->kvm->arch;
1654         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1655
1656         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1657                          atomic_read(&vcpu->kvm->online_vcpus));
1658
1659         /*
1660          * Once the masterclock is enabled, always perform request in
1661          * order to update it.
1662          *
1663          * In order to enable masterclock, the host clocksource must be TSC
1664          * and the vcpus need to have matched TSCs.  When that happens,
1665          * perform request to enable masterclock.
1666          */
1667         if (ka->use_master_clock ||
1668             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1669                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1670
1671         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1672                             atomic_read(&vcpu->kvm->online_vcpus),
1673                             ka->use_master_clock, gtod->clock.vclock_mode);
1674 #endif
1675 }
1676
1677 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1678 {
1679         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1680         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1681 }
1682
1683 /*
1684  * Multiply tsc by a fixed point number represented by ratio.
1685  *
1686  * The most significant 64-N bits (mult) of ratio represent the
1687  * integral part of the fixed point number; the remaining N bits
1688  * (frac) represent the fractional part, ie. ratio represents a fixed
1689  * point number (mult + frac * 2^(-N)).
1690  *
1691  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1692  */
1693 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1694 {
1695         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1696 }
1697
1698 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1699 {
1700         u64 _tsc = tsc;
1701         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1702
1703         if (ratio != kvm_default_tsc_scaling_ratio)
1704                 _tsc = __scale_tsc(ratio, tsc);
1705
1706         return _tsc;
1707 }
1708 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1709
1710 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1711 {
1712         u64 tsc;
1713
1714         tsc = kvm_scale_tsc(vcpu, rdtsc());
1715
1716         return target_tsc - tsc;
1717 }
1718
1719 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1720 {
1721         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1722
1723         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1724 }
1725 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1726
1727 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1728 {
1729         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1730 }
1731
1732 static inline bool kvm_check_tsc_unstable(void)
1733 {
1734 #ifdef CONFIG_X86_64
1735         /*
1736          * TSC is marked unstable when we're running on Hyper-V,
1737          * 'TSC page' clocksource is good.
1738          */
1739         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1740                 return false;
1741 #endif
1742         return check_tsc_unstable();
1743 }
1744
1745 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1746 {
1747         struct kvm *kvm = vcpu->kvm;
1748         u64 offset, ns, elapsed;
1749         unsigned long flags;
1750         bool matched;
1751         bool already_matched;
1752         u64 data = msr->data;
1753         bool synchronizing = false;
1754
1755         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1756         offset = kvm_compute_tsc_offset(vcpu, data);
1757         ns = ktime_get_boottime_ns();
1758         elapsed = ns - kvm->arch.last_tsc_nsec;
1759
1760         if (vcpu->arch.virtual_tsc_khz) {
1761                 if (data == 0 && msr->host_initiated) {
1762                         /*
1763                          * detection of vcpu initialization -- need to sync
1764                          * with other vCPUs. This particularly helps to keep
1765                          * kvm_clock stable after CPU hotplug
1766                          */
1767                         synchronizing = true;
1768                 } else {
1769                         u64 tsc_exp = kvm->arch.last_tsc_write +
1770                                                 nsec_to_cycles(vcpu, elapsed);
1771                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1772                         /*
1773                          * Special case: TSC write with a small delta (1 second)
1774                          * of virtual cycle time against real time is
1775                          * interpreted as an attempt to synchronize the CPU.
1776                          */
1777                         synchronizing = data < tsc_exp + tsc_hz &&
1778                                         data + tsc_hz > tsc_exp;
1779                 }
1780         }
1781
1782         /*
1783          * For a reliable TSC, we can match TSC offsets, and for an unstable
1784          * TSC, we add elapsed time in this computation.  We could let the
1785          * compensation code attempt to catch up if we fall behind, but
1786          * it's better to try to match offsets from the beginning.
1787          */
1788         if (synchronizing &&
1789             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1790                 if (!kvm_check_tsc_unstable()) {
1791                         offset = kvm->arch.cur_tsc_offset;
1792                 } else {
1793                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1794                         data += delta;
1795                         offset = kvm_compute_tsc_offset(vcpu, data);
1796                 }
1797                 matched = true;
1798                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1799         } else {
1800                 /*
1801                  * We split periods of matched TSC writes into generations.
1802                  * For each generation, we track the original measured
1803                  * nanosecond time, offset, and write, so if TSCs are in
1804                  * sync, we can match exact offset, and if not, we can match
1805                  * exact software computation in compute_guest_tsc()
1806                  *
1807                  * These values are tracked in kvm->arch.cur_xxx variables.
1808                  */
1809                 kvm->arch.cur_tsc_generation++;
1810                 kvm->arch.cur_tsc_nsec = ns;
1811                 kvm->arch.cur_tsc_write = data;
1812                 kvm->arch.cur_tsc_offset = offset;
1813                 matched = false;
1814         }
1815
1816         /*
1817          * We also track th most recent recorded KHZ, write and time to
1818          * allow the matching interval to be extended at each write.
1819          */
1820         kvm->arch.last_tsc_nsec = ns;
1821         kvm->arch.last_tsc_write = data;
1822         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1823
1824         vcpu->arch.last_guest_tsc = data;
1825
1826         /* Keep track of which generation this VCPU has synchronized to */
1827         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1828         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1829         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1830
1831         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1832                 update_ia32_tsc_adjust_msr(vcpu, offset);
1833
1834         kvm_vcpu_write_tsc_offset(vcpu, offset);
1835         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1836
1837         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1838         if (!matched) {
1839                 kvm->arch.nr_vcpus_matched_tsc = 0;
1840         } else if (!already_matched) {
1841                 kvm->arch.nr_vcpus_matched_tsc++;
1842         }
1843
1844         kvm_track_tsc_matching(vcpu);
1845         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1846 }
1847
1848 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1849
1850 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1851                                            s64 adjustment)
1852 {
1853         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1854         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1855 }
1856
1857 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1858 {
1859         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1860                 WARN_ON(adjustment < 0);
1861         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1862         adjust_tsc_offset_guest(vcpu, adjustment);
1863 }
1864
1865 #ifdef CONFIG_X86_64
1866
1867 static u64 read_tsc(void)
1868 {
1869         u64 ret = (u64)rdtsc_ordered();
1870         u64 last = pvclock_gtod_data.clock.cycle_last;
1871
1872         if (likely(ret >= last))
1873                 return ret;
1874
1875         /*
1876          * GCC likes to generate cmov here, but this branch is extremely
1877          * predictable (it's just a function of time and the likely is
1878          * very likely) and there's a data dependence, so force GCC
1879          * to generate a branch instead.  I don't barrier() because
1880          * we don't actually need a barrier, and if this function
1881          * ever gets inlined it will generate worse code.
1882          */
1883         asm volatile ("");
1884         return last;
1885 }
1886
1887 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1888 {
1889         long v;
1890         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1891         u64 tsc_pg_val;
1892
1893         switch (gtod->clock.vclock_mode) {
1894         case VCLOCK_HVCLOCK:
1895                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1896                                                   tsc_timestamp);
1897                 if (tsc_pg_val != U64_MAX) {
1898                         /* TSC page valid */
1899                         *mode = VCLOCK_HVCLOCK;
1900                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1901                                 gtod->clock.mask;
1902                 } else {
1903                         /* TSC page invalid */
1904                         *mode = VCLOCK_NONE;
1905                 }
1906                 break;
1907         case VCLOCK_TSC:
1908                 *mode = VCLOCK_TSC;
1909                 *tsc_timestamp = read_tsc();
1910                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1911                         gtod->clock.mask;
1912                 break;
1913         default:
1914                 *mode = VCLOCK_NONE;
1915         }
1916
1917         if (*mode == VCLOCK_NONE)
1918                 *tsc_timestamp = v = 0;
1919
1920         return v * gtod->clock.mult;
1921 }
1922
1923 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1924 {
1925         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1926         unsigned long seq;
1927         int mode;
1928         u64 ns;
1929
1930         do {
1931                 seq = read_seqcount_begin(&gtod->seq);
1932                 ns = gtod->nsec_base;
1933                 ns += vgettsc(tsc_timestamp, &mode);
1934                 ns >>= gtod->clock.shift;
1935                 ns += gtod->boot_ns;
1936         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1937         *t = ns;
1938
1939         return mode;
1940 }
1941
1942 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1943 {
1944         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1945         unsigned long seq;
1946         int mode;
1947         u64 ns;
1948
1949         do {
1950                 seq = read_seqcount_begin(&gtod->seq);
1951                 ts->tv_sec = gtod->wall_time_sec;
1952                 ns = gtod->nsec_base;
1953                 ns += vgettsc(tsc_timestamp, &mode);
1954                 ns >>= gtod->clock.shift;
1955         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1956
1957         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1958         ts->tv_nsec = ns;
1959
1960         return mode;
1961 }
1962
1963 /* returns true if host is using TSC based clocksource */
1964 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1965 {
1966         /* checked again under seqlock below */
1967         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1968                 return false;
1969
1970         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1971                                                       tsc_timestamp));
1972 }
1973
1974 /* returns true if host is using TSC based clocksource */
1975 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1976                                            u64 *tsc_timestamp)
1977 {
1978         /* checked again under seqlock below */
1979         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1980                 return false;
1981
1982         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1983 }
1984 #endif
1985
1986 /*
1987  *
1988  * Assuming a stable TSC across physical CPUS, and a stable TSC
1989  * across virtual CPUs, the following condition is possible.
1990  * Each numbered line represents an event visible to both
1991  * CPUs at the next numbered event.
1992  *
1993  * "timespecX" represents host monotonic time. "tscX" represents
1994  * RDTSC value.
1995  *
1996  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1997  *
1998  * 1.  read timespec0,tsc0
1999  * 2.                                   | timespec1 = timespec0 + N
2000  *                                      | tsc1 = tsc0 + M
2001  * 3. transition to guest               | transition to guest
2002  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2003  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2004  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2005  *
2006  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2007  *
2008  *      - ret0 < ret1
2009  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2010  *              ...
2011  *      - 0 < N - M => M < N
2012  *
2013  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2014  * always the case (the difference between two distinct xtime instances
2015  * might be smaller then the difference between corresponding TSC reads,
2016  * when updating guest vcpus pvclock areas).
2017  *
2018  * To avoid that problem, do not allow visibility of distinct
2019  * system_timestamp/tsc_timestamp values simultaneously: use a master
2020  * copy of host monotonic time values. Update that master copy
2021  * in lockstep.
2022  *
2023  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2024  *
2025  */
2026
2027 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2028 {
2029 #ifdef CONFIG_X86_64
2030         struct kvm_arch *ka = &kvm->arch;
2031         int vclock_mode;
2032         bool host_tsc_clocksource, vcpus_matched;
2033
2034         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2035                         atomic_read(&kvm->online_vcpus));
2036
2037         /*
2038          * If the host uses TSC clock, then passthrough TSC as stable
2039          * to the guest.
2040          */
2041         host_tsc_clocksource = kvm_get_time_and_clockread(
2042                                         &ka->master_kernel_ns,
2043                                         &ka->master_cycle_now);
2044
2045         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2046                                 && !ka->backwards_tsc_observed
2047                                 && !ka->boot_vcpu_runs_old_kvmclock;
2048
2049         if (ka->use_master_clock)
2050                 atomic_set(&kvm_guest_has_master_clock, 1);
2051
2052         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2053         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2054                                         vcpus_matched);
2055 #endif
2056 }
2057
2058 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2059 {
2060         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2061 }
2062
2063 static void kvm_gen_update_masterclock(struct kvm *kvm)
2064 {
2065 #ifdef CONFIG_X86_64
2066         int i;
2067         struct kvm_vcpu *vcpu;
2068         struct kvm_arch *ka = &kvm->arch;
2069
2070         spin_lock(&ka->pvclock_gtod_sync_lock);
2071         kvm_make_mclock_inprogress_request(kvm);
2072         /* no guest entries from this point */
2073         pvclock_update_vm_gtod_copy(kvm);
2074
2075         kvm_for_each_vcpu(i, vcpu, kvm)
2076                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2077
2078         /* guest entries allowed */
2079         kvm_for_each_vcpu(i, vcpu, kvm)
2080                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2081
2082         spin_unlock(&ka->pvclock_gtod_sync_lock);
2083 #endif
2084 }
2085
2086 u64 get_kvmclock_ns(struct kvm *kvm)
2087 {
2088         struct kvm_arch *ka = &kvm->arch;
2089         struct pvclock_vcpu_time_info hv_clock;
2090         u64 ret;
2091
2092         spin_lock(&ka->pvclock_gtod_sync_lock);
2093         if (!ka->use_master_clock) {
2094                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2095                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2096         }
2097
2098         hv_clock.tsc_timestamp = ka->master_cycle_now;
2099         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2100         spin_unlock(&ka->pvclock_gtod_sync_lock);
2101
2102         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2103         get_cpu();
2104
2105         if (__this_cpu_read(cpu_tsc_khz)) {
2106                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2107                                    &hv_clock.tsc_shift,
2108                                    &hv_clock.tsc_to_system_mul);
2109                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2110         } else
2111                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2112
2113         put_cpu();
2114
2115         return ret;
2116 }
2117
2118 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2119 {
2120         struct kvm_vcpu_arch *vcpu = &v->arch;
2121         struct pvclock_vcpu_time_info guest_hv_clock;
2122
2123         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2124                 &guest_hv_clock, sizeof(guest_hv_clock))))
2125                 return;
2126
2127         /* This VCPU is paused, but it's legal for a guest to read another
2128          * VCPU's kvmclock, so we really have to follow the specification where
2129          * it says that version is odd if data is being modified, and even after
2130          * it is consistent.
2131          *
2132          * Version field updates must be kept separate.  This is because
2133          * kvm_write_guest_cached might use a "rep movs" instruction, and
2134          * writes within a string instruction are weakly ordered.  So there
2135          * are three writes overall.
2136          *
2137          * As a small optimization, only write the version field in the first
2138          * and third write.  The vcpu->pv_time cache is still valid, because the
2139          * version field is the first in the struct.
2140          */
2141         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2142
2143         if (guest_hv_clock.version & 1)
2144                 ++guest_hv_clock.version;  /* first time write, random junk */
2145
2146         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2147         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2148                                 &vcpu->hv_clock,
2149                                 sizeof(vcpu->hv_clock.version));
2150
2151         smp_wmb();
2152
2153         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2154         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2155
2156         if (vcpu->pvclock_set_guest_stopped_request) {
2157                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2158                 vcpu->pvclock_set_guest_stopped_request = false;
2159         }
2160
2161         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2162
2163         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2164                                 &vcpu->hv_clock,
2165                                 sizeof(vcpu->hv_clock));
2166
2167         smp_wmb();
2168
2169         vcpu->hv_clock.version++;
2170         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2171                                 &vcpu->hv_clock,
2172                                 sizeof(vcpu->hv_clock.version));
2173 }
2174
2175 static int kvm_guest_time_update(struct kvm_vcpu *v)
2176 {
2177         unsigned long flags, tgt_tsc_khz;
2178         struct kvm_vcpu_arch *vcpu = &v->arch;
2179         struct kvm_arch *ka = &v->kvm->arch;
2180         s64 kernel_ns;
2181         u64 tsc_timestamp, host_tsc;
2182         u8 pvclock_flags;
2183         bool use_master_clock;
2184
2185         kernel_ns = 0;
2186         host_tsc = 0;
2187
2188         /*
2189          * If the host uses TSC clock, then passthrough TSC as stable
2190          * to the guest.
2191          */
2192         spin_lock(&ka->pvclock_gtod_sync_lock);
2193         use_master_clock = ka->use_master_clock;
2194         if (use_master_clock) {
2195                 host_tsc = ka->master_cycle_now;
2196                 kernel_ns = ka->master_kernel_ns;
2197         }
2198         spin_unlock(&ka->pvclock_gtod_sync_lock);
2199
2200         /* Keep irq disabled to prevent changes to the clock */
2201         local_irq_save(flags);
2202         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2203         if (unlikely(tgt_tsc_khz == 0)) {
2204                 local_irq_restore(flags);
2205                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2206                 return 1;
2207         }
2208         if (!use_master_clock) {
2209                 host_tsc = rdtsc();
2210                 kernel_ns = ktime_get_boottime_ns();
2211         }
2212
2213         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2214
2215         /*
2216          * We may have to catch up the TSC to match elapsed wall clock
2217          * time for two reasons, even if kvmclock is used.
2218          *   1) CPU could have been running below the maximum TSC rate
2219          *   2) Broken TSC compensation resets the base at each VCPU
2220          *      entry to avoid unknown leaps of TSC even when running
2221          *      again on the same CPU.  This may cause apparent elapsed
2222          *      time to disappear, and the guest to stand still or run
2223          *      very slowly.
2224          */
2225         if (vcpu->tsc_catchup) {
2226                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2227                 if (tsc > tsc_timestamp) {
2228                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2229                         tsc_timestamp = tsc;
2230                 }
2231         }
2232
2233         local_irq_restore(flags);
2234
2235         /* With all the info we got, fill in the values */
2236
2237         if (kvm_has_tsc_control)
2238                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2239
2240         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2241                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2242                                    &vcpu->hv_clock.tsc_shift,
2243                                    &vcpu->hv_clock.tsc_to_system_mul);
2244                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2245         }
2246
2247         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2248         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2249         vcpu->last_guest_tsc = tsc_timestamp;
2250
2251         /* If the host uses TSC clocksource, then it is stable */
2252         pvclock_flags = 0;
2253         if (use_master_clock)
2254                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2255
2256         vcpu->hv_clock.flags = pvclock_flags;
2257
2258         if (vcpu->pv_time_enabled)
2259                 kvm_setup_pvclock_page(v);
2260         if (v == kvm_get_vcpu(v->kvm, 0))
2261                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2262         return 0;
2263 }
2264
2265 /*
2266  * kvmclock updates which are isolated to a given vcpu, such as
2267  * vcpu->cpu migration, should not allow system_timestamp from
2268  * the rest of the vcpus to remain static. Otherwise ntp frequency
2269  * correction applies to one vcpu's system_timestamp but not
2270  * the others.
2271  *
2272  * So in those cases, request a kvmclock update for all vcpus.
2273  * We need to rate-limit these requests though, as they can
2274  * considerably slow guests that have a large number of vcpus.
2275  * The time for a remote vcpu to update its kvmclock is bound
2276  * by the delay we use to rate-limit the updates.
2277  */
2278
2279 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2280
2281 static void kvmclock_update_fn(struct work_struct *work)
2282 {
2283         int i;
2284         struct delayed_work *dwork = to_delayed_work(work);
2285         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2286                                            kvmclock_update_work);
2287         struct kvm *kvm = container_of(ka, struct kvm, arch);
2288         struct kvm_vcpu *vcpu;
2289
2290         kvm_for_each_vcpu(i, vcpu, kvm) {
2291                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2292                 kvm_vcpu_kick(vcpu);
2293         }
2294 }
2295
2296 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2297 {
2298         struct kvm *kvm = v->kvm;
2299
2300         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2301         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2302                                         KVMCLOCK_UPDATE_DELAY);
2303 }
2304
2305 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2306
2307 static void kvmclock_sync_fn(struct work_struct *work)
2308 {
2309         struct delayed_work *dwork = to_delayed_work(work);
2310         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2311                                            kvmclock_sync_work);
2312         struct kvm *kvm = container_of(ka, struct kvm, arch);
2313
2314         if (!kvmclock_periodic_sync)
2315                 return;
2316
2317         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2318         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2319                                         KVMCLOCK_SYNC_PERIOD);
2320 }
2321
2322 /*
2323  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2324  */
2325 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2326 {
2327         /* McStatusWrEn enabled? */
2328         if (guest_cpuid_is_amd(vcpu))
2329                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2330
2331         return false;
2332 }
2333
2334 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2335 {
2336         u64 mcg_cap = vcpu->arch.mcg_cap;
2337         unsigned bank_num = mcg_cap & 0xff;
2338         u32 msr = msr_info->index;
2339         u64 data = msr_info->data;
2340
2341         switch (msr) {
2342         case MSR_IA32_MCG_STATUS:
2343                 vcpu->arch.mcg_status = data;
2344                 break;
2345         case MSR_IA32_MCG_CTL:
2346                 if (!(mcg_cap & MCG_CTL_P) &&
2347                     (data || !msr_info->host_initiated))
2348                         return 1;
2349                 if (data != 0 && data != ~(u64)0)
2350                         return 1;
2351                 vcpu->arch.mcg_ctl = data;
2352                 break;
2353         default:
2354                 if (msr >= MSR_IA32_MC0_CTL &&
2355                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2356                         u32 offset = msr - MSR_IA32_MC0_CTL;
2357                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2358                          * some Linux kernels though clear bit 10 in bank 4 to
2359                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2360                          * this to avoid an uncatched #GP in the guest
2361                          */
2362                         if ((offset & 0x3) == 0 &&
2363                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2364                                 return -1;
2365
2366                         /* MCi_STATUS */
2367                         if (!msr_info->host_initiated &&
2368                             (offset & 0x3) == 1 && data != 0) {
2369                                 if (!can_set_mci_status(vcpu))
2370                                         return -1;
2371                         }
2372
2373                         vcpu->arch.mce_banks[offset] = data;
2374                         break;
2375                 }
2376                 return 1;
2377         }
2378         return 0;
2379 }
2380
2381 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2382 {
2383         struct kvm *kvm = vcpu->kvm;
2384         int lm = is_long_mode(vcpu);
2385         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2386                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2387         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2388                 : kvm->arch.xen_hvm_config.blob_size_32;
2389         u32 page_num = data & ~PAGE_MASK;
2390         u64 page_addr = data & PAGE_MASK;
2391         u8 *page;
2392         int r;
2393
2394         r = -E2BIG;
2395         if (page_num >= blob_size)
2396                 goto out;
2397         r = -ENOMEM;
2398         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2399         if (IS_ERR(page)) {
2400                 r = PTR_ERR(page);
2401                 goto out;
2402         }
2403         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2404                 goto out_free;
2405         r = 0;
2406 out_free:
2407         kfree(page);
2408 out:
2409         return r;
2410 }
2411
2412 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2413 {
2414         gpa_t gpa = data & ~0x3f;
2415
2416         /* Bits 3:5 are reserved, Should be zero */
2417         if (data & 0x38)
2418                 return 1;
2419
2420         vcpu->arch.apf.msr_val = data;
2421
2422         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2423                 kvm_clear_async_pf_completion_queue(vcpu);
2424                 kvm_async_pf_hash_reset(vcpu);
2425                 return 0;
2426         }
2427
2428         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2429                                         sizeof(u32)))
2430                 return 1;
2431
2432         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2433         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2434         kvm_async_pf_wakeup_all(vcpu);
2435         return 0;
2436 }
2437
2438 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2439 {
2440         vcpu->arch.pv_time_enabled = false;
2441 }
2442
2443 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2444 {
2445         ++vcpu->stat.tlb_flush;
2446         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2447 }
2448
2449 static void record_steal_time(struct kvm_vcpu *vcpu)
2450 {
2451         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2452                 return;
2453
2454         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2455                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2456                 return;
2457
2458         /*
2459          * Doing a TLB flush here, on the guest's behalf, can avoid
2460          * expensive IPIs.
2461          */
2462         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2463                 kvm_vcpu_flush_tlb(vcpu, false);
2464
2465         if (vcpu->arch.st.steal.version & 1)
2466                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2467
2468         vcpu->arch.st.steal.version += 1;
2469
2470         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2471                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2472
2473         smp_wmb();
2474
2475         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2476                 vcpu->arch.st.last_steal;
2477         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2478
2479         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2480                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2481
2482         smp_wmb();
2483
2484         vcpu->arch.st.steal.version += 1;
2485
2486         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2487                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2488 }
2489
2490 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2491 {
2492         bool pr = false;
2493         u32 msr = msr_info->index;
2494         u64 data = msr_info->data;
2495
2496         switch (msr) {
2497         case MSR_AMD64_NB_CFG:
2498         case MSR_IA32_UCODE_WRITE:
2499         case MSR_VM_HSAVE_PA:
2500         case MSR_AMD64_PATCH_LOADER:
2501         case MSR_AMD64_BU_CFG2:
2502         case MSR_AMD64_DC_CFG:
2503         case MSR_F15H_EX_CFG:
2504                 break;
2505
2506         case MSR_IA32_UCODE_REV:
2507                 if (msr_info->host_initiated)
2508                         vcpu->arch.microcode_version = data;
2509                 break;
2510         case MSR_IA32_ARCH_CAPABILITIES:
2511                 if (!msr_info->host_initiated)
2512                         return 1;
2513                 vcpu->arch.arch_capabilities = data;
2514                 break;
2515         case MSR_EFER:
2516                 return set_efer(vcpu, msr_info);
2517         case MSR_K7_HWCR:
2518                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2519                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2520                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2521
2522                 /* Handle McStatusWrEn */
2523                 if (data == BIT_ULL(18)) {
2524                         vcpu->arch.msr_hwcr = data;
2525                 } else if (data != 0) {
2526                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2527                                     data);
2528                         return 1;
2529                 }
2530                 break;
2531         case MSR_FAM10H_MMIO_CONF_BASE:
2532                 if (data != 0) {
2533                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2534                                     "0x%llx\n", data);
2535                         return 1;
2536                 }
2537                 break;
2538         case MSR_IA32_DEBUGCTLMSR:
2539                 if (!data) {
2540                         /* We support the non-activated case already */
2541                         break;
2542                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2543                         /* Values other than LBR and BTF are vendor-specific,
2544                            thus reserved and should throw a #GP */
2545                         return 1;
2546                 }
2547                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2548                             __func__, data);
2549                 break;
2550         case 0x200 ... 0x2ff:
2551                 return kvm_mtrr_set_msr(vcpu, msr, data);
2552         case MSR_IA32_APICBASE:
2553                 return kvm_set_apic_base(vcpu, msr_info);
2554         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2555                 return kvm_x2apic_msr_write(vcpu, msr, data);
2556         case MSR_IA32_TSCDEADLINE:
2557                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2558                 break;
2559         case MSR_IA32_TSC_ADJUST:
2560                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2561                         if (!msr_info->host_initiated) {
2562                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2563                                 adjust_tsc_offset_guest(vcpu, adj);
2564                         }
2565                         vcpu->arch.ia32_tsc_adjust_msr = data;
2566                 }
2567                 break;
2568         case MSR_IA32_MISC_ENABLE:
2569                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2570                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2571                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2572                                 return 1;
2573                         vcpu->arch.ia32_misc_enable_msr = data;
2574                         kvm_update_cpuid(vcpu);
2575                 } else {
2576                         vcpu->arch.ia32_misc_enable_msr = data;
2577                 }
2578                 break;
2579         case MSR_IA32_SMBASE:
2580                 if (!msr_info->host_initiated)
2581                         return 1;
2582                 vcpu->arch.smbase = data;
2583                 break;
2584         case MSR_IA32_POWER_CTL:
2585                 vcpu->arch.msr_ia32_power_ctl = data;
2586                 break;
2587         case MSR_IA32_TSC:
2588                 kvm_write_tsc(vcpu, msr_info);
2589                 break;
2590         case MSR_SMI_COUNT:
2591                 if (!msr_info->host_initiated)
2592                         return 1;
2593                 vcpu->arch.smi_count = data;
2594                 break;
2595         case MSR_KVM_WALL_CLOCK_NEW:
2596         case MSR_KVM_WALL_CLOCK:
2597                 vcpu->kvm->arch.wall_clock = data;
2598                 kvm_write_wall_clock(vcpu->kvm, data);
2599                 break;
2600         case MSR_KVM_SYSTEM_TIME_NEW:
2601         case MSR_KVM_SYSTEM_TIME: {
2602                 struct kvm_arch *ka = &vcpu->kvm->arch;
2603
2604                 kvmclock_reset(vcpu);
2605
2606                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2607                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2608
2609                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2610                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2611
2612                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2613                 }
2614
2615                 vcpu->arch.time = data;
2616                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2617
2618                 /* we verify if the enable bit is set... */
2619                 if (!(data & 1))
2620                         break;
2621
2622                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2623                      &vcpu->arch.pv_time, data & ~1ULL,
2624                      sizeof(struct pvclock_vcpu_time_info)))
2625                         vcpu->arch.pv_time_enabled = false;
2626                 else
2627                         vcpu->arch.pv_time_enabled = true;
2628
2629                 break;
2630         }
2631         case MSR_KVM_ASYNC_PF_EN:
2632                 if (kvm_pv_enable_async_pf(vcpu, data))
2633                         return 1;
2634                 break;
2635         case MSR_KVM_STEAL_TIME:
2636
2637                 if (unlikely(!sched_info_on()))
2638                         return 1;
2639
2640                 if (data & KVM_STEAL_RESERVED_MASK)
2641                         return 1;
2642
2643                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2644                                                 data & KVM_STEAL_VALID_BITS,
2645                                                 sizeof(struct kvm_steal_time)))
2646                         return 1;
2647
2648                 vcpu->arch.st.msr_val = data;
2649
2650                 if (!(data & KVM_MSR_ENABLED))
2651                         break;
2652
2653                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2654
2655                 break;
2656         case MSR_KVM_PV_EOI_EN:
2657                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2658                         return 1;
2659                 break;
2660
2661         case MSR_KVM_POLL_CONTROL:
2662                 /* only enable bit supported */
2663                 if (data & (-1ULL << 1))
2664                         return 1;
2665
2666                 vcpu->arch.msr_kvm_poll_control = data;
2667                 break;
2668
2669         case MSR_IA32_MCG_CTL:
2670         case MSR_IA32_MCG_STATUS:
2671         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2672                 return set_msr_mce(vcpu, msr_info);
2673
2674         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2675         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2676                 pr = true; /* fall through */
2677         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2678         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2679                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2680                         return kvm_pmu_set_msr(vcpu, msr_info);
2681
2682                 if (pr || data != 0)
2683                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2684                                     "0x%x data 0x%llx\n", msr, data);
2685                 break;
2686         case MSR_K7_CLK_CTL:
2687                 /*
2688                  * Ignore all writes to this no longer documented MSR.
2689                  * Writes are only relevant for old K7 processors,
2690                  * all pre-dating SVM, but a recommended workaround from
2691                  * AMD for these chips. It is possible to specify the
2692                  * affected processor models on the command line, hence
2693                  * the need to ignore the workaround.
2694                  */
2695                 break;
2696         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2697         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2698         case HV_X64_MSR_CRASH_CTL:
2699         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2700         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2701         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2702         case HV_X64_MSR_TSC_EMULATION_STATUS:
2703                 return kvm_hv_set_msr_common(vcpu, msr, data,
2704                                              msr_info->host_initiated);
2705         case MSR_IA32_BBL_CR_CTL3:
2706                 /* Drop writes to this legacy MSR -- see rdmsr
2707                  * counterpart for further detail.
2708                  */
2709                 if (report_ignored_msrs)
2710                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2711                                 msr, data);
2712                 break;
2713         case MSR_AMD64_OSVW_ID_LENGTH:
2714                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2715                         return 1;
2716                 vcpu->arch.osvw.length = data;
2717                 break;
2718         case MSR_AMD64_OSVW_STATUS:
2719                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2720                         return 1;
2721                 vcpu->arch.osvw.status = data;
2722                 break;
2723         case MSR_PLATFORM_INFO:
2724                 if (!msr_info->host_initiated ||
2725                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2726                      cpuid_fault_enabled(vcpu)))
2727                         return 1;
2728                 vcpu->arch.msr_platform_info = data;
2729                 break;
2730         case MSR_MISC_FEATURES_ENABLES:
2731                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2732                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2733                      !supports_cpuid_fault(vcpu)))
2734                         return 1;
2735                 vcpu->arch.msr_misc_features_enables = data;
2736                 break;
2737         default:
2738                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2739                         return xen_hvm_config(vcpu, data);
2740                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2741                         return kvm_pmu_set_msr(vcpu, msr_info);
2742                 if (!ignore_msrs) {
2743                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2744                                     msr, data);
2745                         return 1;
2746                 } else {
2747                         if (report_ignored_msrs)
2748                                 vcpu_unimpl(vcpu,
2749                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2750                                         msr, data);
2751                         break;
2752                 }
2753         }
2754         return 0;
2755 }
2756 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2757
2758
2759 /*
2760  * Reads an msr value (of 'msr_index') into 'pdata'.
2761  * Returns 0 on success, non-0 otherwise.
2762  * Assumes vcpu_load() was already called.
2763  */
2764 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2765 {
2766         return kvm_x86_ops->get_msr(vcpu, msr);
2767 }
2768 EXPORT_SYMBOL_GPL(kvm_get_msr);
2769
2770 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2771 {
2772         u64 data;
2773         u64 mcg_cap = vcpu->arch.mcg_cap;
2774         unsigned bank_num = mcg_cap & 0xff;
2775
2776         switch (msr) {
2777         case MSR_IA32_P5_MC_ADDR:
2778         case MSR_IA32_P5_MC_TYPE:
2779                 data = 0;
2780                 break;
2781         case MSR_IA32_MCG_CAP:
2782                 data = vcpu->arch.mcg_cap;
2783                 break;
2784         case MSR_IA32_MCG_CTL:
2785                 if (!(mcg_cap & MCG_CTL_P) && !host)
2786                         return 1;
2787                 data = vcpu->arch.mcg_ctl;
2788                 break;
2789         case MSR_IA32_MCG_STATUS:
2790                 data = vcpu->arch.mcg_status;
2791                 break;
2792         default:
2793                 if (msr >= MSR_IA32_MC0_CTL &&
2794                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2795                         u32 offset = msr - MSR_IA32_MC0_CTL;
2796                         data = vcpu->arch.mce_banks[offset];
2797                         break;
2798                 }
2799                 return 1;
2800         }
2801         *pdata = data;
2802         return 0;
2803 }
2804
2805 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2806 {
2807         switch (msr_info->index) {
2808         case MSR_IA32_PLATFORM_ID:
2809         case MSR_IA32_EBL_CR_POWERON:
2810         case MSR_IA32_DEBUGCTLMSR:
2811         case MSR_IA32_LASTBRANCHFROMIP:
2812         case MSR_IA32_LASTBRANCHTOIP:
2813         case MSR_IA32_LASTINTFROMIP:
2814         case MSR_IA32_LASTINTTOIP:
2815         case MSR_K8_SYSCFG:
2816         case MSR_K8_TSEG_ADDR:
2817         case MSR_K8_TSEG_MASK:
2818         case MSR_VM_HSAVE_PA:
2819         case MSR_K8_INT_PENDING_MSG:
2820         case MSR_AMD64_NB_CFG:
2821         case MSR_FAM10H_MMIO_CONF_BASE:
2822         case MSR_AMD64_BU_CFG2:
2823         case MSR_IA32_PERF_CTL:
2824         case MSR_AMD64_DC_CFG:
2825         case MSR_F15H_EX_CFG:
2826                 msr_info->data = 0;
2827                 break;
2828         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2829         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2830         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2831         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2832         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2833                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2834                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2835                 msr_info->data = 0;
2836                 break;
2837         case MSR_IA32_UCODE_REV:
2838                 msr_info->data = vcpu->arch.microcode_version;
2839                 break;
2840         case MSR_IA32_ARCH_CAPABILITIES:
2841                 if (!msr_info->host_initiated &&
2842                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2843                         return 1;
2844                 msr_info->data = vcpu->arch.arch_capabilities;
2845                 break;
2846         case MSR_IA32_POWER_CTL:
2847                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2848                 break;
2849         case MSR_IA32_TSC:
2850                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2851                 break;
2852         case MSR_MTRRcap:
2853         case 0x200 ... 0x2ff:
2854                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2855         case 0xcd: /* fsb frequency */
2856                 msr_info->data = 3;
2857                 break;
2858                 /*
2859                  * MSR_EBC_FREQUENCY_ID
2860                  * Conservative value valid for even the basic CPU models.
2861                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2862                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2863                  * and 266MHz for model 3, or 4. Set Core Clock
2864                  * Frequency to System Bus Frequency Ratio to 1 (bits
2865                  * 31:24) even though these are only valid for CPU
2866                  * models > 2, however guests may end up dividing or
2867                  * multiplying by zero otherwise.
2868                  */
2869         case MSR_EBC_FREQUENCY_ID:
2870                 msr_info->data = 1 << 24;
2871                 break;
2872         case MSR_IA32_APICBASE:
2873                 msr_info->data = kvm_get_apic_base(vcpu);
2874                 break;
2875         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2876                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2877                 break;
2878         case MSR_IA32_TSCDEADLINE:
2879                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2880                 break;
2881         case MSR_IA32_TSC_ADJUST:
2882                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2883                 break;
2884         case MSR_IA32_MISC_ENABLE:
2885                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2886                 break;
2887         case MSR_IA32_SMBASE:
2888                 if (!msr_info->host_initiated)
2889                         return 1;
2890                 msr_info->data = vcpu->arch.smbase;
2891                 break;
2892         case MSR_SMI_COUNT:
2893                 msr_info->data = vcpu->arch.smi_count;
2894                 break;
2895         case MSR_IA32_PERF_STATUS:
2896                 /* TSC increment by tick */
2897                 msr_info->data = 1000ULL;
2898                 /* CPU multiplier */
2899                 msr_info->data |= (((uint64_t)4ULL) << 40);
2900                 break;
2901         case MSR_EFER:
2902                 msr_info->data = vcpu->arch.efer;
2903                 break;
2904         case MSR_KVM_WALL_CLOCK:
2905         case MSR_KVM_WALL_CLOCK_NEW:
2906                 msr_info->data = vcpu->kvm->arch.wall_clock;
2907                 break;
2908         case MSR_KVM_SYSTEM_TIME:
2909         case MSR_KVM_SYSTEM_TIME_NEW:
2910                 msr_info->data = vcpu->arch.time;
2911                 break;
2912         case MSR_KVM_ASYNC_PF_EN:
2913                 msr_info->data = vcpu->arch.apf.msr_val;
2914                 break;
2915         case MSR_KVM_STEAL_TIME:
2916                 msr_info->data = vcpu->arch.st.msr_val;
2917                 break;
2918         case MSR_KVM_PV_EOI_EN:
2919                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2920                 break;
2921         case MSR_KVM_POLL_CONTROL:
2922                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
2923                 break;
2924         case MSR_IA32_P5_MC_ADDR:
2925         case MSR_IA32_P5_MC_TYPE:
2926         case MSR_IA32_MCG_CAP:
2927         case MSR_IA32_MCG_CTL:
2928         case MSR_IA32_MCG_STATUS:
2929         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2930                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2931                                    msr_info->host_initiated);
2932         case MSR_K7_CLK_CTL:
2933                 /*
2934                  * Provide expected ramp-up count for K7. All other
2935                  * are set to zero, indicating minimum divisors for
2936                  * every field.
2937                  *
2938                  * This prevents guest kernels on AMD host with CPU
2939                  * type 6, model 8 and higher from exploding due to
2940                  * the rdmsr failing.
2941                  */
2942                 msr_info->data = 0x20000000;
2943                 break;
2944         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2945         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2946         case HV_X64_MSR_CRASH_CTL:
2947         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2948         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2949         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2950         case HV_X64_MSR_TSC_EMULATION_STATUS:
2951                 return kvm_hv_get_msr_common(vcpu,
2952                                              msr_info->index, &msr_info->data,
2953                                              msr_info->host_initiated);
2954                 break;
2955         case MSR_IA32_BBL_CR_CTL3:
2956                 /* This legacy MSR exists but isn't fully documented in current
2957                  * silicon.  It is however accessed by winxp in very narrow
2958                  * scenarios where it sets bit #19, itself documented as
2959                  * a "reserved" bit.  Best effort attempt to source coherent
2960                  * read data here should the balance of the register be
2961                  * interpreted by the guest:
2962                  *
2963                  * L2 cache control register 3: 64GB range, 256KB size,
2964                  * enabled, latency 0x1, configured
2965                  */
2966                 msr_info->data = 0xbe702111;
2967                 break;
2968         case MSR_AMD64_OSVW_ID_LENGTH:
2969                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2970                         return 1;
2971                 msr_info->data = vcpu->arch.osvw.length;
2972                 break;
2973         case MSR_AMD64_OSVW_STATUS:
2974                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2975                         return 1;
2976                 msr_info->data = vcpu->arch.osvw.status;
2977                 break;
2978         case MSR_PLATFORM_INFO:
2979                 if (!msr_info->host_initiated &&
2980                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
2981                         return 1;
2982                 msr_info->data = vcpu->arch.msr_platform_info;
2983                 break;
2984         case MSR_MISC_FEATURES_ENABLES:
2985                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2986                 break;
2987         case MSR_K7_HWCR:
2988                 msr_info->data = vcpu->arch.msr_hwcr;
2989                 break;
2990         default:
2991                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2992                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2993                 if (!ignore_msrs) {
2994                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2995                                                msr_info->index);
2996                         return 1;
2997                 } else {
2998                         if (report_ignored_msrs)
2999                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3000                                         msr_info->index);
3001                         msr_info->data = 0;
3002                 }
3003                 break;
3004         }
3005         return 0;
3006 }
3007 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3008
3009 /*
3010  * Read or write a bunch of msrs. All parameters are kernel addresses.
3011  *
3012  * @return number of msrs set successfully.
3013  */
3014 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3015                     struct kvm_msr_entry *entries,
3016                     int (*do_msr)(struct kvm_vcpu *vcpu,
3017                                   unsigned index, u64 *data))
3018 {
3019         int i;
3020
3021         for (i = 0; i < msrs->nmsrs; ++i)
3022                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3023                         break;
3024
3025         return i;
3026 }
3027
3028 /*
3029  * Read or write a bunch of msrs. Parameters are user addresses.
3030  *
3031  * @return number of msrs set successfully.
3032  */
3033 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3034                   int (*do_msr)(struct kvm_vcpu *vcpu,
3035                                 unsigned index, u64 *data),
3036                   int writeback)
3037 {
3038         struct kvm_msrs msrs;
3039         struct kvm_msr_entry *entries;
3040         int r, n;
3041         unsigned size;
3042
3043         r = -EFAULT;
3044         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3045                 goto out;
3046
3047         r = -E2BIG;
3048         if (msrs.nmsrs >= MAX_IO_MSRS)
3049                 goto out;
3050
3051         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3052         entries = memdup_user(user_msrs->entries, size);
3053         if (IS_ERR(entries)) {
3054                 r = PTR_ERR(entries);
3055                 goto out;
3056         }
3057
3058         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3059         if (r < 0)
3060                 goto out_free;
3061
3062         r = -EFAULT;
3063         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3064                 goto out_free;
3065
3066         r = n;
3067
3068 out_free:
3069         kfree(entries);
3070 out:
3071         return r;
3072 }
3073
3074 static inline bool kvm_can_mwait_in_guest(void)
3075 {
3076         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3077                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3078                 boot_cpu_has(X86_FEATURE_ARAT);
3079 }
3080
3081 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3082 {
3083         int r = 0;
3084
3085         switch (ext) {
3086         case KVM_CAP_IRQCHIP:
3087         case KVM_CAP_HLT:
3088         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3089         case KVM_CAP_SET_TSS_ADDR:
3090         case KVM_CAP_EXT_CPUID:
3091         case KVM_CAP_EXT_EMUL_CPUID:
3092         case KVM_CAP_CLOCKSOURCE:
3093         case KVM_CAP_PIT:
3094         case KVM_CAP_NOP_IO_DELAY:
3095         case KVM_CAP_MP_STATE:
3096         case KVM_CAP_SYNC_MMU:
3097         case KVM_CAP_USER_NMI:
3098         case KVM_CAP_REINJECT_CONTROL:
3099         case KVM_CAP_IRQ_INJECT_STATUS:
3100         case KVM_CAP_IOEVENTFD:
3101         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3102         case KVM_CAP_PIT2:
3103         case KVM_CAP_PIT_STATE2:
3104         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3105         case KVM_CAP_XEN_HVM:
3106         case KVM_CAP_VCPU_EVENTS:
3107         case KVM_CAP_HYPERV:
3108         case KVM_CAP_HYPERV_VAPIC:
3109         case KVM_CAP_HYPERV_SPIN:
3110         case KVM_CAP_HYPERV_SYNIC:
3111         case KVM_CAP_HYPERV_SYNIC2:
3112         case KVM_CAP_HYPERV_VP_INDEX:
3113         case KVM_CAP_HYPERV_EVENTFD:
3114         case KVM_CAP_HYPERV_TLBFLUSH:
3115         case KVM_CAP_HYPERV_SEND_IPI:
3116         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3117         case KVM_CAP_HYPERV_CPUID:
3118         case KVM_CAP_PCI_SEGMENT:
3119         case KVM_CAP_DEBUGREGS:
3120         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3121         case KVM_CAP_XSAVE:
3122         case KVM_CAP_ASYNC_PF:
3123         case KVM_CAP_GET_TSC_KHZ:
3124         case KVM_CAP_KVMCLOCK_CTRL:
3125         case KVM_CAP_READONLY_MEM:
3126         case KVM_CAP_HYPERV_TIME:
3127         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3128         case KVM_CAP_TSC_DEADLINE_TIMER:
3129         case KVM_CAP_DISABLE_QUIRKS:
3130         case KVM_CAP_SET_BOOT_CPU_ID:
3131         case KVM_CAP_SPLIT_IRQCHIP:
3132         case KVM_CAP_IMMEDIATE_EXIT:
3133         case KVM_CAP_PMU_EVENT_FILTER:
3134         case KVM_CAP_GET_MSR_FEATURES:
3135         case KVM_CAP_MSR_PLATFORM_INFO:
3136         case KVM_CAP_EXCEPTION_PAYLOAD:
3137                 r = 1;
3138                 break;
3139         case KVM_CAP_SYNC_REGS:
3140                 r = KVM_SYNC_X86_VALID_FIELDS;
3141                 break;
3142         case KVM_CAP_ADJUST_CLOCK:
3143                 r = KVM_CLOCK_TSC_STABLE;
3144                 break;
3145         case KVM_CAP_X86_DISABLE_EXITS:
3146                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3147                       KVM_X86_DISABLE_EXITS_CSTATE;
3148                 if(kvm_can_mwait_in_guest())
3149                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3150                 break;
3151         case KVM_CAP_X86_SMM:
3152                 /* SMBASE is usually relocated above 1M on modern chipsets,
3153                  * and SMM handlers might indeed rely on 4G segment limits,
3154                  * so do not report SMM to be available if real mode is
3155                  * emulated via vm86 mode.  Still, do not go to great lengths
3156                  * to avoid userspace's usage of the feature, because it is a
3157                  * fringe case that is not enabled except via specific settings
3158                  * of the module parameters.
3159                  */
3160                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3161                 break;
3162         case KVM_CAP_VAPIC:
3163                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3164                 break;
3165         case KVM_CAP_NR_VCPUS:
3166                 r = KVM_SOFT_MAX_VCPUS;
3167                 break;
3168         case KVM_CAP_MAX_VCPUS:
3169                 r = KVM_MAX_VCPUS;
3170                 break;
3171         case KVM_CAP_MAX_VCPU_ID:
3172                 r = KVM_MAX_VCPU_ID;
3173                 break;
3174         case KVM_CAP_PV_MMU:    /* obsolete */
3175                 r = 0;
3176                 break;
3177         case KVM_CAP_MCE:
3178                 r = KVM_MAX_MCE_BANKS;
3179                 break;
3180         case KVM_CAP_XCRS:
3181                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3182                 break;
3183         case KVM_CAP_TSC_CONTROL:
3184                 r = kvm_has_tsc_control;
3185                 break;
3186         case KVM_CAP_X2APIC_API:
3187                 r = KVM_X2APIC_API_VALID_FLAGS;
3188                 break;
3189         case KVM_CAP_NESTED_STATE:
3190                 r = kvm_x86_ops->get_nested_state ?
3191                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3192                 break;
3193         default:
3194                 break;
3195         }
3196         return r;
3197
3198 }
3199
3200 long kvm_arch_dev_ioctl(struct file *filp,
3201                         unsigned int ioctl, unsigned long arg)
3202 {
3203         void __user *argp = (void __user *)arg;
3204         long r;
3205
3206         switch (ioctl) {
3207         case KVM_GET_MSR_INDEX_LIST: {
3208                 struct kvm_msr_list __user *user_msr_list = argp;
3209                 struct kvm_msr_list msr_list;
3210                 unsigned n;
3211
3212                 r = -EFAULT;
3213                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3214                         goto out;
3215                 n = msr_list.nmsrs;
3216                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3217                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3218                         goto out;
3219                 r = -E2BIG;
3220                 if (n < msr_list.nmsrs)
3221                         goto out;
3222                 r = -EFAULT;
3223                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3224                                  num_msrs_to_save * sizeof(u32)))
3225                         goto out;
3226                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3227                                  &emulated_msrs,
3228                                  num_emulated_msrs * sizeof(u32)))
3229                         goto out;
3230                 r = 0;
3231                 break;
3232         }
3233         case KVM_GET_SUPPORTED_CPUID:
3234         case KVM_GET_EMULATED_CPUID: {
3235                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3236                 struct kvm_cpuid2 cpuid;
3237
3238                 r = -EFAULT;
3239                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3240                         goto out;
3241
3242                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3243                                             ioctl);
3244                 if (r)
3245                         goto out;
3246
3247                 r = -EFAULT;
3248                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3249                         goto out;
3250                 r = 0;
3251                 break;
3252         }
3253         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3254                 r = -EFAULT;
3255                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3256                                  sizeof(kvm_mce_cap_supported)))
3257                         goto out;
3258                 r = 0;
3259                 break;
3260         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3261                 struct kvm_msr_list __user *user_msr_list = argp;
3262                 struct kvm_msr_list msr_list;
3263                 unsigned int n;
3264
3265                 r = -EFAULT;
3266                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3267                         goto out;
3268                 n = msr_list.nmsrs;
3269                 msr_list.nmsrs = num_msr_based_features;
3270                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3271                         goto out;
3272                 r = -E2BIG;
3273                 if (n < msr_list.nmsrs)
3274                         goto out;
3275                 r = -EFAULT;
3276                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3277                                  num_msr_based_features * sizeof(u32)))
3278                         goto out;
3279                 r = 0;
3280                 break;
3281         }
3282         case KVM_GET_MSRS:
3283                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3284                 break;
3285         }
3286         default:
3287                 r = -EINVAL;
3288         }
3289 out:
3290         return r;
3291 }
3292
3293 static void wbinvd_ipi(void *garbage)
3294 {
3295         wbinvd();
3296 }
3297
3298 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3299 {
3300         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3301 }
3302
3303 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3304 {
3305         /* Address WBINVD may be executed by guest */
3306         if (need_emulate_wbinvd(vcpu)) {
3307                 if (kvm_x86_ops->has_wbinvd_exit())
3308                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3309                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3310                         smp_call_function_single(vcpu->cpu,
3311                                         wbinvd_ipi, NULL, 1);
3312         }
3313
3314         kvm_x86_ops->vcpu_load(vcpu, cpu);
3315
3316         fpregs_assert_state_consistent();
3317         if (test_thread_flag(TIF_NEED_FPU_LOAD))
3318                 switch_fpu_return();
3319
3320         /* Apply any externally detected TSC adjustments (due to suspend) */
3321         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3322                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3323                 vcpu->arch.tsc_offset_adjustment = 0;
3324                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3325         }
3326
3327         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3328                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3329                                 rdtsc() - vcpu->arch.last_host_tsc;
3330                 if (tsc_delta < 0)
3331                         mark_tsc_unstable("KVM discovered backwards TSC");
3332
3333                 if (kvm_check_tsc_unstable()) {
3334                         u64 offset = kvm_compute_tsc_offset(vcpu,
3335                                                 vcpu->arch.last_guest_tsc);
3336                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3337                         vcpu->arch.tsc_catchup = 1;
3338                 }
3339
3340                 if (kvm_lapic_hv_timer_in_use(vcpu))
3341                         kvm_lapic_restart_hv_timer(vcpu);
3342
3343                 /*
3344                  * On a host with synchronized TSC, there is no need to update
3345                  * kvmclock on vcpu->cpu migration
3346                  */
3347                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3348                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3349                 if (vcpu->cpu != cpu)
3350                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3351                 vcpu->cpu = cpu;
3352         }
3353
3354         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3355 }
3356
3357 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3358 {
3359         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3360                 return;
3361
3362         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3363
3364         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3365                         &vcpu->arch.st.steal.preempted,
3366                         offsetof(struct kvm_steal_time, preempted),
3367                         sizeof(vcpu->arch.st.steal.preempted));
3368 }
3369
3370 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3371 {
3372         int idx;
3373
3374         if (vcpu->preempted)
3375                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3376
3377         /*
3378          * Disable page faults because we're in atomic context here.
3379          * kvm_write_guest_offset_cached() would call might_fault()
3380          * that relies on pagefault_disable() to tell if there's a
3381          * bug. NOTE: the write to guest memory may not go through if
3382          * during postcopy live migration or if there's heavy guest
3383          * paging.
3384          */
3385         pagefault_disable();
3386         /*
3387          * kvm_memslots() will be called by
3388          * kvm_write_guest_offset_cached() so take the srcu lock.
3389          */
3390         idx = srcu_read_lock(&vcpu->kvm->srcu);
3391         kvm_steal_time_set_preempted(vcpu);
3392         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3393         pagefault_enable();
3394         kvm_x86_ops->vcpu_put(vcpu);
3395         vcpu->arch.last_host_tsc = rdtsc();
3396         /*
3397          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3398          * on every vmexit, but if not, we might have a stale dr6 from the
3399          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3400          */
3401         set_debugreg(0, 6);
3402 }
3403
3404 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3405                                     struct kvm_lapic_state *s)
3406 {
3407         if (vcpu->arch.apicv_active)
3408                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3409
3410         return kvm_apic_get_state(vcpu, s);
3411 }
3412
3413 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3414                                     struct kvm_lapic_state *s)
3415 {
3416         int r;
3417
3418         r = kvm_apic_set_state(vcpu, s);
3419         if (r)
3420                 return r;
3421         update_cr8_intercept(vcpu);
3422
3423         return 0;
3424 }
3425
3426 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3427 {
3428         return (!lapic_in_kernel(vcpu) ||
3429                 kvm_apic_accept_pic_intr(vcpu));
3430 }
3431
3432 /*
3433  * if userspace requested an interrupt window, check that the
3434  * interrupt window is open.
3435  *
3436  * No need to exit to userspace if we already have an interrupt queued.
3437  */
3438 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3439 {
3440         return kvm_arch_interrupt_allowed(vcpu) &&
3441                 !kvm_cpu_has_interrupt(vcpu) &&
3442                 !kvm_event_needs_reinjection(vcpu) &&
3443                 kvm_cpu_accept_dm_intr(vcpu);
3444 }
3445
3446 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3447                                     struct kvm_interrupt *irq)
3448 {
3449         if (irq->irq >= KVM_NR_INTERRUPTS)
3450                 return -EINVAL;
3451
3452         if (!irqchip_in_kernel(vcpu->kvm)) {
3453                 kvm_queue_interrupt(vcpu, irq->irq, false);
3454                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3455                 return 0;
3456         }
3457
3458         /*
3459          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3460          * fail for in-kernel 8259.
3461          */
3462         if (pic_in_kernel(vcpu->kvm))
3463                 return -ENXIO;
3464
3465         if (vcpu->arch.pending_external_vector != -1)
3466                 return -EEXIST;
3467
3468         vcpu->arch.pending_external_vector = irq->irq;
3469         kvm_make_request(KVM_REQ_EVENT, vcpu);
3470         return 0;
3471 }
3472
3473 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3474 {
3475         kvm_inject_nmi(vcpu);
3476
3477         return 0;
3478 }
3479
3480 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3481 {
3482         kvm_make_request(KVM_REQ_SMI, vcpu);
3483
3484         return 0;
3485 }
3486
3487 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3488                                            struct kvm_tpr_access_ctl *tac)
3489 {
3490         if (tac->flags)
3491                 return -EINVAL;
3492         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3493         return 0;
3494 }
3495
3496 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3497                                         u64 mcg_cap)
3498 {
3499         int r;
3500         unsigned bank_num = mcg_cap & 0xff, bank;
3501
3502         r = -EINVAL;
3503         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3504                 goto out;
3505         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3506                 goto out;
3507         r = 0;
3508         vcpu->arch.mcg_cap = mcg_cap;
3509         /* Init IA32_MCG_CTL to all 1s */
3510         if (mcg_cap & MCG_CTL_P)
3511                 vcpu->arch.mcg_ctl = ~(u64)0;
3512         /* Init IA32_MCi_CTL to all 1s */
3513         for (bank = 0; bank < bank_num; bank++)
3514                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3515
3516         kvm_x86_ops->setup_mce(vcpu);
3517 out:
3518         return r;
3519 }
3520
3521 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3522                                       struct kvm_x86_mce *mce)
3523 {
3524         u64 mcg_cap = vcpu->arch.mcg_cap;
3525         unsigned bank_num = mcg_cap & 0xff;
3526         u64 *banks = vcpu->arch.mce_banks;
3527
3528         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3529                 return -EINVAL;
3530         /*
3531          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3532          * reporting is disabled
3533          */
3534         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3535             vcpu->arch.mcg_ctl != ~(u64)0)
3536                 return 0;
3537         banks += 4 * mce->bank;
3538         /*
3539          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3540          * reporting is disabled for the bank
3541          */
3542         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3543                 return 0;
3544         if (mce->status & MCI_STATUS_UC) {
3545                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3546                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3547                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3548                         return 0;
3549                 }
3550                 if (banks[1] & MCI_STATUS_VAL)
3551                         mce->status |= MCI_STATUS_OVER;
3552                 banks[2] = mce->addr;
3553                 banks[3] = mce->misc;
3554                 vcpu->arch.mcg_status = mce->mcg_status;
3555                 banks[1] = mce->status;
3556                 kvm_queue_exception(vcpu, MC_VECTOR);
3557         } else if (!(banks[1] & MCI_STATUS_VAL)
3558                    || !(banks[1] & MCI_STATUS_UC)) {
3559                 if (banks[1] & MCI_STATUS_VAL)
3560                         mce->status |= MCI_STATUS_OVER;
3561                 banks[2] = mce->addr;
3562                 banks[3] = mce->misc;
3563                 banks[1] = mce->status;
3564         } else
3565                 banks[1] |= MCI_STATUS_OVER;
3566         return 0;
3567 }
3568
3569 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3570                                                struct kvm_vcpu_events *events)
3571 {
3572         process_nmi(vcpu);
3573
3574         /*
3575          * The API doesn't provide the instruction length for software
3576          * exceptions, so don't report them. As long as the guest RIP
3577          * isn't advanced, we should expect to encounter the exception
3578          * again.
3579          */
3580         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3581                 events->exception.injected = 0;
3582                 events->exception.pending = 0;
3583         } else {
3584                 events->exception.injected = vcpu->arch.exception.injected;
3585                 events->exception.pending = vcpu->arch.exception.pending;
3586                 /*
3587                  * For ABI compatibility, deliberately conflate
3588                  * pending and injected exceptions when
3589                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3590                  */
3591                 if (!vcpu->kvm->arch.exception_payload_enabled)
3592                         events->exception.injected |=
3593                                 vcpu->arch.exception.pending;
3594         }
3595         events->exception.nr = vcpu->arch.exception.nr;
3596         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3597         events->exception.error_code = vcpu->arch.exception.error_code;
3598         events->exception_has_payload = vcpu->arch.exception.has_payload;
3599         events->exception_payload = vcpu->arch.exception.payload;
3600
3601         events->interrupt.injected =
3602                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3603         events->interrupt.nr = vcpu->arch.interrupt.nr;
3604         events->interrupt.soft = 0;
3605         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3606
3607         events->nmi.injected = vcpu->arch.nmi_injected;
3608         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3609         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3610         events->nmi.pad = 0;
3611
3612         events->sipi_vector = 0; /* never valid when reporting to user space */
3613
3614         events->smi.smm = is_smm(vcpu);
3615         events->smi.pending = vcpu->arch.smi_pending;
3616         events->smi.smm_inside_nmi =
3617                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3618         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3619
3620         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3621                          | KVM_VCPUEVENT_VALID_SHADOW
3622                          | KVM_VCPUEVENT_VALID_SMM);
3623         if (vcpu->kvm->arch.exception_payload_enabled)
3624                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3625
3626         memset(&events->reserved, 0, sizeof(events->reserved));
3627 }
3628
3629 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3630
3631 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3632                                               struct kvm_vcpu_events *events)
3633 {
3634         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3635                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3636                               | KVM_VCPUEVENT_VALID_SHADOW
3637                               | KVM_VCPUEVENT_VALID_SMM
3638                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3639                 return -EINVAL;
3640
3641         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3642                 if (!vcpu->kvm->arch.exception_payload_enabled)
3643                         return -EINVAL;
3644                 if (events->exception.pending)
3645                         events->exception.injected = 0;
3646                 else
3647                         events->exception_has_payload = 0;
3648         } else {
3649                 events->exception.pending = 0;
3650                 events->exception_has_payload = 0;
3651         }
3652
3653         if ((events->exception.injected || events->exception.pending) &&
3654             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3655                 return -EINVAL;
3656
3657         /* INITs are latched while in SMM */
3658         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3659             (events->smi.smm || events->smi.pending) &&
3660             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3661                 return -EINVAL;
3662
3663         process_nmi(vcpu);
3664         vcpu->arch.exception.injected = events->exception.injected;
3665         vcpu->arch.exception.pending = events->exception.pending;
3666         vcpu->arch.exception.nr = events->exception.nr;
3667         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3668         vcpu->arch.exception.error_code = events->exception.error_code;
3669         vcpu->arch.exception.has_payload = events->exception_has_payload;
3670         vcpu->arch.exception.payload = events->exception_payload;
3671
3672         vcpu->arch.interrupt.injected = events->interrupt.injected;
3673         vcpu->arch.interrupt.nr = events->interrupt.nr;
3674         vcpu->arch.interrupt.soft = events->interrupt.soft;
3675         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3676                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3677                                                   events->interrupt.shadow);
3678
3679         vcpu->arch.nmi_injected = events->nmi.injected;
3680         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3681                 vcpu->arch.nmi_pending = events->nmi.pending;
3682         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3683
3684         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3685             lapic_in_kernel(vcpu))
3686                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3687
3688         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3689                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3690                         if (events->smi.smm)
3691                                 vcpu->arch.hflags |= HF_SMM_MASK;
3692                         else
3693                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3694                         kvm_smm_changed(vcpu);
3695                 }
3696
3697                 vcpu->arch.smi_pending = events->smi.pending;
3698
3699                 if (events->smi.smm) {
3700                         if (events->smi.smm_inside_nmi)
3701                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3702                         else
3703                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3704                         if (lapic_in_kernel(vcpu)) {
3705                                 if (events->smi.latched_init)
3706                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3707                                 else
3708                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3709                         }
3710                 }
3711         }
3712
3713         kvm_make_request(KVM_REQ_EVENT, vcpu);
3714
3715         return 0;
3716 }
3717
3718 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3719                                              struct kvm_debugregs *dbgregs)
3720 {
3721         unsigned long val;
3722
3723         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3724         kvm_get_dr(vcpu, 6, &val);
3725         dbgregs->dr6 = val;
3726         dbgregs->dr7 = vcpu->arch.dr7;
3727         dbgregs->flags = 0;
3728         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3729 }
3730
3731 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3732                                             struct kvm_debugregs *dbgregs)
3733 {
3734         if (dbgregs->flags)
3735                 return -EINVAL;
3736
3737         if (dbgregs->dr6 & ~0xffffffffull)
3738                 return -EINVAL;
3739         if (dbgregs->dr7 & ~0xffffffffull)
3740                 return -EINVAL;
3741
3742         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3743         kvm_update_dr0123(vcpu);
3744         vcpu->arch.dr6 = dbgregs->dr6;
3745         kvm_update_dr6(vcpu);
3746         vcpu->arch.dr7 = dbgregs->dr7;
3747         kvm_update_dr7(vcpu);
3748
3749         return 0;
3750 }
3751
3752 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3753
3754 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3755 {
3756         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3757         u64 xstate_bv = xsave->header.xfeatures;
3758         u64 valid;
3759
3760         /*
3761          * Copy legacy XSAVE area, to avoid complications with CPUID
3762          * leaves 0 and 1 in the loop below.
3763          */
3764         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3765
3766         /* Set XSTATE_BV */
3767         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3768         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3769
3770         /*
3771          * Copy each region from the possibly compacted offset to the
3772          * non-compacted offset.
3773          */
3774         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3775         while (valid) {
3776                 u64 xfeature_mask = valid & -valid;
3777                 int xfeature_nr = fls64(xfeature_mask) - 1;
3778                 void *src = get_xsave_addr(xsave, xfeature_nr);
3779
3780                 if (src) {
3781                         u32 size, offset, ecx, edx;
3782                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3783                                     &size, &offset, &ecx, &edx);
3784                         if (xfeature_nr == XFEATURE_PKRU)
3785                                 memcpy(dest + offset, &vcpu->arch.pkru,
3786                                        sizeof(vcpu->arch.pkru));
3787                         else
3788                                 memcpy(dest + offset, src, size);
3789
3790                 }
3791
3792                 valid -= xfeature_mask;
3793         }
3794 }
3795
3796 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3797 {
3798         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3799         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3800         u64 valid;
3801
3802         /*
3803          * Copy legacy XSAVE area, to avoid complications with CPUID
3804          * leaves 0 and 1 in the loop below.
3805          */
3806         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3807
3808         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3809         xsave->header.xfeatures = xstate_bv;
3810         if (boot_cpu_has(X86_FEATURE_XSAVES))
3811                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3812
3813         /*
3814          * Copy each region from the non-compacted offset to the
3815          * possibly compacted offset.
3816          */
3817         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3818         while (valid) {
3819                 u64 xfeature_mask = valid & -valid;
3820                 int xfeature_nr = fls64(xfeature_mask) - 1;
3821                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3822
3823                 if (dest) {
3824                         u32 size, offset, ecx, edx;
3825                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3826                                     &size, &offset, &ecx, &edx);
3827                         if (xfeature_nr == XFEATURE_PKRU)
3828                                 memcpy(&vcpu->arch.pkru, src + offset,
3829                                        sizeof(vcpu->arch.pkru));
3830                         else
3831                                 memcpy(dest, src + offset, size);
3832                 }
3833
3834                 valid -= xfeature_mask;
3835         }
3836 }
3837
3838 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3839                                          struct kvm_xsave *guest_xsave)
3840 {
3841         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3842                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3843                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3844         } else {
3845                 memcpy(guest_xsave->region,
3846                         &vcpu->arch.guest_fpu->state.fxsave,
3847                         sizeof(struct fxregs_state));
3848                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3849                         XFEATURE_MASK_FPSSE;
3850         }
3851 }
3852
3853 #define XSAVE_MXCSR_OFFSET 24
3854
3855 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3856                                         struct kvm_xsave *guest_xsave)
3857 {
3858         u64 xstate_bv =
3859                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3860         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3861
3862         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3863                 /*
3864                  * Here we allow setting states that are not present in
3865                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3866                  * with old userspace.
3867                  */
3868                 if (xstate_bv & ~kvm_supported_xcr0() ||
3869                         mxcsr & ~mxcsr_feature_mask)
3870                         return -EINVAL;
3871                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3872         } else {
3873                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3874                         mxcsr & ~mxcsr_feature_mask)
3875                         return -EINVAL;
3876                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3877                         guest_xsave->region, sizeof(struct fxregs_state));
3878         }
3879         return 0;
3880 }
3881
3882 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3883                                         struct kvm_xcrs *guest_xcrs)
3884 {
3885         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3886                 guest_xcrs->nr_xcrs = 0;
3887                 return;
3888         }
3889
3890         guest_xcrs->nr_xcrs = 1;
3891         guest_xcrs->flags = 0;
3892         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3893         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3894 }
3895
3896 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3897                                        struct kvm_xcrs *guest_xcrs)
3898 {
3899         int i, r = 0;
3900
3901         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3902                 return -EINVAL;
3903
3904         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3905                 return -EINVAL;
3906
3907         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3908                 /* Only support XCR0 currently */
3909                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3910                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3911                                 guest_xcrs->xcrs[i].value);
3912                         break;
3913                 }
3914         if (r)
3915                 r = -EINVAL;
3916         return r;
3917 }
3918
3919 /*
3920  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3921  * stopped by the hypervisor.  This function will be called from the host only.
3922  * EINVAL is returned when the host attempts to set the flag for a guest that
3923  * does not support pv clocks.
3924  */
3925 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3926 {
3927         if (!vcpu->arch.pv_time_enabled)
3928                 return -EINVAL;
3929         vcpu->arch.pvclock_set_guest_stopped_request = true;
3930         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3931         return 0;
3932 }
3933
3934 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3935                                      struct kvm_enable_cap *cap)
3936 {
3937         int r;
3938         uint16_t vmcs_version;
3939         void __user *user_ptr;
3940
3941         if (cap->flags)
3942                 return -EINVAL;
3943
3944         switch (cap->cap) {
3945         case KVM_CAP_HYPERV_SYNIC2:
3946                 if (cap->args[0])
3947                         return -EINVAL;
3948                 /* fall through */
3949
3950         case KVM_CAP_HYPERV_SYNIC:
3951                 if (!irqchip_in_kernel(vcpu->kvm))
3952                         return -EINVAL;
3953                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3954                                              KVM_CAP_HYPERV_SYNIC2);
3955         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3956                 if (!kvm_x86_ops->nested_enable_evmcs)
3957                         return -ENOTTY;
3958                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
3959                 if (!r) {
3960                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
3961                         if (copy_to_user(user_ptr, &vmcs_version,
3962                                          sizeof(vmcs_version)))
3963                                 r = -EFAULT;
3964                 }
3965                 return r;
3966
3967         default:
3968                 return -EINVAL;
3969         }
3970 }
3971
3972 long kvm_arch_vcpu_ioctl(struct file *filp,
3973                          unsigned int ioctl, unsigned long arg)
3974 {
3975         struct kvm_vcpu *vcpu = filp->private_data;
3976         void __user *argp = (void __user *)arg;
3977         int r;
3978         union {
3979                 struct kvm_lapic_state *lapic;
3980                 struct kvm_xsave *xsave;
3981                 struct kvm_xcrs *xcrs;
3982                 void *buffer;
3983         } u;
3984
3985         vcpu_load(vcpu);
3986
3987         u.buffer = NULL;
3988         switch (ioctl) {
3989         case KVM_GET_LAPIC: {
3990                 r = -EINVAL;
3991                 if (!lapic_in_kernel(vcpu))
3992                         goto out;
3993                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
3994                                 GFP_KERNEL_ACCOUNT);
3995
3996                 r = -ENOMEM;
3997                 if (!u.lapic)
3998                         goto out;
3999                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4000                 if (r)
4001                         goto out;
4002                 r = -EFAULT;
4003                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4004                         goto out;
4005                 r = 0;
4006                 break;
4007         }
4008         case KVM_SET_LAPIC: {
4009                 r = -EINVAL;
4010                 if (!lapic_in_kernel(vcpu))
4011                         goto out;
4012                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4013                 if (IS_ERR(u.lapic)) {
4014                         r = PTR_ERR(u.lapic);
4015                         goto out_nofree;
4016                 }
4017
4018                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4019                 break;
4020         }
4021         case KVM_INTERRUPT: {
4022                 struct kvm_interrupt irq;
4023
4024                 r = -EFAULT;
4025                 if (copy_from_user(&irq, argp, sizeof(irq)))
4026                         goto out;
4027                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4028                 break;
4029         }
4030         case KVM_NMI: {
4031                 r = kvm_vcpu_ioctl_nmi(vcpu);
4032                 break;
4033         }
4034         case KVM_SMI: {
4035                 r = kvm_vcpu_ioctl_smi(vcpu);
4036                 break;
4037         }
4038         case KVM_SET_CPUID: {
4039                 struct kvm_cpuid __user *cpuid_arg = argp;
4040                 struct kvm_cpuid cpuid;
4041
4042                 r = -EFAULT;
4043                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4044                         goto out;
4045                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4046                 break;
4047         }
4048         case KVM_SET_CPUID2: {
4049                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4050                 struct kvm_cpuid2 cpuid;
4051
4052                 r = -EFAULT;
4053                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4054                         goto out;
4055                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4056                                               cpuid_arg->entries);
4057                 break;
4058         }
4059         case KVM_GET_CPUID2: {
4060                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4061                 struct kvm_cpuid2 cpuid;
4062
4063                 r = -EFAULT;
4064                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4065                         goto out;
4066                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4067                                               cpuid_arg->entries);
4068                 if (r)
4069                         goto out;
4070                 r = -EFAULT;
4071                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4072                         goto out;
4073                 r = 0;
4074                 break;
4075         }
4076         case KVM_GET_MSRS: {
4077                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4078                 r = msr_io(vcpu, argp, do_get_msr, 1);
4079                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4080                 break;
4081         }
4082         case KVM_SET_MSRS: {
4083                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4084                 r = msr_io(vcpu, argp, do_set_msr, 0);
4085                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4086                 break;
4087         }
4088         case KVM_TPR_ACCESS_REPORTING: {
4089                 struct kvm_tpr_access_ctl tac;
4090
4091                 r = -EFAULT;
4092                 if (copy_from_user(&tac, argp, sizeof(tac)))
4093                         goto out;
4094                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4095                 if (r)
4096                         goto out;
4097                 r = -EFAULT;
4098                 if (copy_to_user(argp, &tac, sizeof(tac)))
4099                         goto out;
4100                 r = 0;
4101                 break;
4102         };
4103         case KVM_SET_VAPIC_ADDR: {
4104                 struct kvm_vapic_addr va;
4105                 int idx;
4106
4107                 r = -EINVAL;
4108                 if (!lapic_in_kernel(vcpu))
4109                         goto out;
4110                 r = -EFAULT;
4111                 if (copy_from_user(&va, argp, sizeof(va)))
4112                         goto out;
4113                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4114                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4115                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4116                 break;
4117         }
4118         case KVM_X86_SETUP_MCE: {
4119                 u64 mcg_cap;
4120
4121                 r = -EFAULT;
4122                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4123                         goto out;
4124                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4125                 break;
4126         }
4127         case KVM_X86_SET_MCE: {
4128                 struct kvm_x86_mce mce;
4129
4130                 r = -EFAULT;
4131                 if (copy_from_user(&mce, argp, sizeof(mce)))
4132                         goto out;
4133                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4134                 break;
4135         }
4136         case KVM_GET_VCPU_EVENTS: {
4137                 struct kvm_vcpu_events events;
4138
4139                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4140
4141                 r = -EFAULT;
4142                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4143                         break;
4144                 r = 0;
4145                 break;
4146         }
4147         case KVM_SET_VCPU_EVENTS: {
4148                 struct kvm_vcpu_events events;
4149
4150                 r = -EFAULT;
4151                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4152                         break;
4153
4154                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4155                 break;
4156         }
4157         case KVM_GET_DEBUGREGS: {
4158                 struct kvm_debugregs dbgregs;
4159
4160                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4161
4162                 r = -EFAULT;
4163                 if (copy_to_user(argp, &dbgregs,
4164                                  sizeof(struct kvm_debugregs)))
4165                         break;
4166                 r = 0;
4167                 break;
4168         }
4169         case KVM_SET_DEBUGREGS: {
4170                 struct kvm_debugregs dbgregs;
4171
4172                 r = -EFAULT;
4173                 if (copy_from_user(&dbgregs, argp,
4174                                    sizeof(struct kvm_debugregs)))
4175                         break;
4176
4177                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4178                 break;
4179         }
4180         case KVM_GET_XSAVE: {
4181                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4182                 r = -ENOMEM;
4183                 if (!u.xsave)
4184                         break;
4185
4186                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4187
4188                 r = -EFAULT;
4189                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4190                         break;
4191                 r = 0;
4192                 break;
4193         }
4194         case KVM_SET_XSAVE: {
4195                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4196                 if (IS_ERR(u.xsave)) {
4197                         r = PTR_ERR(u.xsave);
4198                         goto out_nofree;
4199                 }
4200
4201                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4202                 break;
4203         }
4204         case KVM_GET_XCRS: {
4205                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4206                 r = -ENOMEM;
4207                 if (!u.xcrs)
4208                         break;
4209
4210                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4211
4212                 r = -EFAULT;
4213                 if (copy_to_user(argp, u.xcrs,
4214                                  sizeof(struct kvm_xcrs)))
4215                         break;
4216                 r = 0;
4217                 break;
4218         }
4219         case KVM_SET_XCRS: {
4220                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4221                 if (IS_ERR(u.xcrs)) {
4222                         r = PTR_ERR(u.xcrs);
4223                         goto out_nofree;
4224                 }
4225
4226                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4227                 break;
4228         }
4229         case KVM_SET_TSC_KHZ: {
4230                 u32 user_tsc_khz;
4231
4232                 r = -EINVAL;
4233                 user_tsc_khz = (u32)arg;
4234
4235                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4236                         goto out;
4237
4238                 if (user_tsc_khz == 0)
4239                         user_tsc_khz = tsc_khz;
4240
4241                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4242                         r = 0;
4243
4244                 goto out;
4245         }
4246         case KVM_GET_TSC_KHZ: {
4247                 r = vcpu->arch.virtual_tsc_khz;
4248                 goto out;
4249         }
4250         case KVM_KVMCLOCK_CTRL: {
4251                 r = kvm_set_guest_paused(vcpu);
4252                 goto out;
4253         }
4254         case KVM_ENABLE_CAP: {
4255                 struct kvm_enable_cap cap;
4256
4257                 r = -EFAULT;
4258                 if (copy_from_user(&cap, argp, sizeof(cap)))
4259                         goto out;
4260                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4261                 break;
4262         }
4263         case KVM_GET_NESTED_STATE: {
4264                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4265                 u32 user_data_size;
4266
4267                 r = -EINVAL;
4268                 if (!kvm_x86_ops->get_nested_state)
4269                         break;
4270
4271                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4272                 r = -EFAULT;
4273                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4274                         break;
4275
4276                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4277                                                   user_data_size);
4278                 if (r < 0)
4279                         break;
4280
4281                 if (r > user_data_size) {
4282                         if (put_user(r, &user_kvm_nested_state->size))
4283                                 r = -EFAULT;
4284                         else
4285                                 r = -E2BIG;
4286                         break;
4287                 }
4288
4289                 r = 0;
4290                 break;
4291         }
4292         case KVM_SET_NESTED_STATE: {
4293                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4294                 struct kvm_nested_state kvm_state;
4295
4296                 r = -EINVAL;
4297                 if (!kvm_x86_ops->set_nested_state)
4298                         break;
4299
4300                 r = -EFAULT;
4301                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4302                         break;
4303
4304                 r = -EINVAL;
4305                 if (kvm_state.size < sizeof(kvm_state))
4306                         break;
4307
4308                 if (kvm_state.flags &
4309                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4310                       | KVM_STATE_NESTED_EVMCS))
4311                         break;
4312
4313                 /* nested_run_pending implies guest_mode.  */
4314                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4315                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4316                         break;
4317
4318                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4319                 break;
4320         }
4321         case KVM_GET_SUPPORTED_HV_CPUID: {
4322                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4323                 struct kvm_cpuid2 cpuid;
4324
4325                 r = -EFAULT;
4326                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4327                         goto out;
4328
4329                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4330                                                 cpuid_arg->entries);
4331                 if (r)
4332                         goto out;
4333
4334                 r = -EFAULT;
4335                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4336                         goto out;
4337                 r = 0;
4338                 break;
4339         }
4340         default:
4341                 r = -EINVAL;
4342         }
4343 out:
4344         kfree(u.buffer);
4345 out_nofree:
4346         vcpu_put(vcpu);
4347         return r;
4348 }
4349
4350 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4351 {
4352         return VM_FAULT_SIGBUS;
4353 }
4354
4355 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4356 {
4357         int ret;
4358
4359         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4360                 return -EINVAL;
4361         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4362         return ret;
4363 }
4364
4365 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4366                                               u64 ident_addr)
4367 {
4368         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4369 }
4370
4371 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4372                                          unsigned long kvm_nr_mmu_pages)
4373 {
4374         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4375                 return -EINVAL;
4376
4377         mutex_lock(&kvm->slots_lock);
4378
4379         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4380         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4381
4382         mutex_unlock(&kvm->slots_lock);
4383         return 0;
4384 }
4385
4386 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4387 {
4388         return kvm->arch.n_max_mmu_pages;
4389 }
4390
4391 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4392 {
4393         struct kvm_pic *pic = kvm->arch.vpic;
4394         int r;
4395
4396         r = 0;
4397         switch (chip->chip_id) {
4398         case KVM_IRQCHIP_PIC_MASTER:
4399                 memcpy(&chip->chip.pic, &pic->pics[0],
4400                         sizeof(struct kvm_pic_state));
4401                 break;
4402         case KVM_IRQCHIP_PIC_SLAVE:
4403                 memcpy(&chip->chip.pic, &pic->pics[1],
4404                         sizeof(struct kvm_pic_state));
4405                 break;
4406         case KVM_IRQCHIP_IOAPIC:
4407                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4408                 break;
4409         default:
4410                 r = -EINVAL;
4411                 break;
4412         }
4413         return r;
4414 }
4415
4416 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4417 {
4418         struct kvm_pic *pic = kvm->arch.vpic;
4419         int r;
4420
4421         r = 0;
4422         switch (chip->chip_id) {
4423         case KVM_IRQCHIP_PIC_MASTER:
4424                 spin_lock(&pic->lock);
4425                 memcpy(&pic->pics[0], &chip->chip.pic,
4426                         sizeof(struct kvm_pic_state));
4427                 spin_unlock(&pic->lock);
4428                 break;
4429         case KVM_IRQCHIP_PIC_SLAVE:
4430                 spin_lock(&pic->lock);
4431                 memcpy(&pic->pics[1], &chip->chip.pic,
4432                         sizeof(struct kvm_pic_state));
4433                 spin_unlock(&pic->lock);
4434                 break;
4435         case KVM_IRQCHIP_IOAPIC:
4436                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4437                 break;
4438         default:
4439                 r = -EINVAL;
4440                 break;
4441         }
4442         kvm_pic_update_irq(pic);
4443         return r;
4444 }
4445
4446 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4447 {
4448         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4449
4450         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4451
4452         mutex_lock(&kps->lock);
4453         memcpy(ps, &kps->channels, sizeof(*ps));
4454         mutex_unlock(&kps->lock);
4455         return 0;
4456 }
4457
4458 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4459 {
4460         int i;
4461         struct kvm_pit *pit = kvm->arch.vpit;
4462
4463         mutex_lock(&pit->pit_state.lock);
4464         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4465         for (i = 0; i < 3; i++)
4466                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4467         mutex_unlock(&pit->pit_state.lock);
4468         return 0;
4469 }
4470
4471 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4472 {
4473         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4474         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4475                 sizeof(ps->channels));
4476         ps->flags = kvm->arch.vpit->pit_state.flags;
4477         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4478         memset(&ps->reserved, 0, sizeof(ps->reserved));
4479         return 0;
4480 }
4481
4482 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4483 {
4484         int start = 0;
4485         int i;
4486         u32 prev_legacy, cur_legacy;
4487         struct kvm_pit *pit = kvm->arch.vpit;
4488
4489         mutex_lock(&pit->pit_state.lock);
4490         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4491         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4492         if (!prev_legacy && cur_legacy)
4493                 start = 1;
4494         memcpy(&pit->pit_state.channels, &ps->channels,
4495                sizeof(pit->pit_state.channels));
4496         pit->pit_state.flags = ps->flags;
4497         for (i = 0; i < 3; i++)
4498                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4499                                    start && i == 0);
4500         mutex_unlock(&pit->pit_state.lock);
4501         return 0;
4502 }
4503
4504 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4505                                  struct kvm_reinject_control *control)
4506 {
4507         struct kvm_pit *pit = kvm->arch.vpit;
4508
4509         if (!pit)
4510                 return -ENXIO;
4511
4512         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4513          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4514          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4515          */
4516         mutex_lock(&pit->pit_state.lock);
4517         kvm_pit_set_reinject(pit, control->pit_reinject);
4518         mutex_unlock(&pit->pit_state.lock);
4519
4520         return 0;
4521 }
4522
4523 /**
4524  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4525  * @kvm: kvm instance
4526  * @log: slot id and address to which we copy the log
4527  *
4528  * Steps 1-4 below provide general overview of dirty page logging. See
4529  * kvm_get_dirty_log_protect() function description for additional details.
4530  *
4531  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4532  * always flush the TLB (step 4) even if previous step failed  and the dirty
4533  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4534  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4535  * writes will be marked dirty for next log read.
4536  *
4537  *   1. Take a snapshot of the bit and clear it if needed.
4538  *   2. Write protect the corresponding page.
4539  *   3. Copy the snapshot to the userspace.
4540  *   4. Flush TLB's if needed.
4541  */
4542 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4543 {
4544         bool flush = false;
4545         int r;
4546
4547         mutex_lock(&kvm->slots_lock);
4548
4549         /*
4550          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4551          */
4552         if (kvm_x86_ops->flush_log_dirty)
4553                 kvm_x86_ops->flush_log_dirty(kvm);
4554
4555         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4556
4557         /*
4558          * All the TLBs can be flushed out of mmu lock, see the comments in
4559          * kvm_mmu_slot_remove_write_access().
4560          */
4561         lockdep_assert_held(&kvm->slots_lock);
4562         if (flush)
4563                 kvm_flush_remote_tlbs(kvm);
4564
4565         mutex_unlock(&kvm->slots_lock);
4566         return r;
4567 }
4568
4569 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4570 {
4571         bool flush = false;
4572         int r;
4573
4574         mutex_lock(&kvm->slots_lock);
4575
4576         /*
4577          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4578          */
4579         if (kvm_x86_ops->flush_log_dirty)
4580                 kvm_x86_ops->flush_log_dirty(kvm);
4581
4582         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4583
4584         /*
4585          * All the TLBs can be flushed out of mmu lock, see the comments in
4586          * kvm_mmu_slot_remove_write_access().
4587          */
4588         lockdep_assert_held(&kvm->slots_lock);
4589         if (flush)
4590                 kvm_flush_remote_tlbs(kvm);
4591
4592         mutex_unlock(&kvm->slots_lock);
4593         return r;
4594 }
4595
4596 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4597                         bool line_status)
4598 {
4599         if (!irqchip_in_kernel(kvm))
4600                 return -ENXIO;
4601
4602         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4603                                         irq_event->irq, irq_event->level,
4604                                         line_status);
4605         return 0;
4606 }
4607
4608 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4609                             struct kvm_enable_cap *cap)
4610 {
4611         int r;
4612
4613         if (cap->flags)
4614                 return -EINVAL;
4615
4616         switch (cap->cap) {
4617         case KVM_CAP_DISABLE_QUIRKS:
4618                 kvm->arch.disabled_quirks = cap->args[0];
4619                 r = 0;
4620                 break;
4621         case KVM_CAP_SPLIT_IRQCHIP: {
4622                 mutex_lock(&kvm->lock);
4623                 r = -EINVAL;
4624                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4625                         goto split_irqchip_unlock;
4626                 r = -EEXIST;
4627                 if (irqchip_in_kernel(kvm))
4628                         goto split_irqchip_unlock;
4629                 if (kvm->created_vcpus)
4630                         goto split_irqchip_unlock;
4631                 r = kvm_setup_empty_irq_routing(kvm);
4632                 if (r)
4633                         goto split_irqchip_unlock;
4634                 /* Pairs with irqchip_in_kernel. */
4635                 smp_wmb();
4636                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4637                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4638                 r = 0;
4639 split_irqchip_unlock:
4640                 mutex_unlock(&kvm->lock);
4641                 break;
4642         }
4643         case KVM_CAP_X2APIC_API:
4644                 r = -EINVAL;
4645                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4646                         break;
4647
4648                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4649                         kvm->arch.x2apic_format = true;
4650                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4651                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4652
4653                 r = 0;
4654                 break;
4655         case KVM_CAP_X86_DISABLE_EXITS:
4656                 r = -EINVAL;
4657                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4658                         break;
4659
4660                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4661                         kvm_can_mwait_in_guest())
4662                         kvm->arch.mwait_in_guest = true;
4663                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4664                         kvm->arch.hlt_in_guest = true;
4665                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4666                         kvm->arch.pause_in_guest = true;
4667                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4668                         kvm->arch.cstate_in_guest = true;
4669                 r = 0;
4670                 break;
4671         case KVM_CAP_MSR_PLATFORM_INFO:
4672                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4673                 r = 0;
4674                 break;
4675         case KVM_CAP_EXCEPTION_PAYLOAD:
4676                 kvm->arch.exception_payload_enabled = cap->args[0];
4677                 r = 0;
4678                 break;
4679         default:
4680                 r = -EINVAL;
4681                 break;
4682         }
4683         return r;
4684 }
4685
4686 long kvm_arch_vm_ioctl(struct file *filp,
4687                        unsigned int ioctl, unsigned long arg)
4688 {
4689         struct kvm *kvm = filp->private_data;
4690         void __user *argp = (void __user *)arg;
4691         int r = -ENOTTY;
4692         /*
4693          * This union makes it completely explicit to gcc-3.x
4694          * that these two variables' stack usage should be
4695          * combined, not added together.
4696          */
4697         union {
4698                 struct kvm_pit_state ps;
4699                 struct kvm_pit_state2 ps2;
4700                 struct kvm_pit_config pit_config;
4701         } u;
4702
4703         switch (ioctl) {
4704         case KVM_SET_TSS_ADDR:
4705                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4706                 break;
4707         case KVM_SET_IDENTITY_MAP_ADDR: {
4708                 u64 ident_addr;
4709
4710                 mutex_lock(&kvm->lock);
4711                 r = -EINVAL;
4712                 if (kvm->created_vcpus)
4713                         goto set_identity_unlock;
4714                 r = -EFAULT;
4715                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4716                         goto set_identity_unlock;
4717                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4718 set_identity_unlock:
4719                 mutex_unlock(&kvm->lock);
4720                 break;
4721         }
4722         case KVM_SET_NR_MMU_PAGES:
4723                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4724                 break;
4725         case KVM_GET_NR_MMU_PAGES:
4726                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4727                 break;
4728         case KVM_CREATE_IRQCHIP: {
4729                 mutex_lock(&kvm->lock);
4730
4731                 r = -EEXIST;
4732                 if (irqchip_in_kernel(kvm))
4733                         goto create_irqchip_unlock;
4734
4735                 r = -EINVAL;
4736                 if (kvm->created_vcpus)
4737                         goto create_irqchip_unlock;
4738
4739                 r = kvm_pic_init(kvm);
4740                 if (r)
4741                         goto create_irqchip_unlock;
4742
4743                 r = kvm_ioapic_init(kvm);
4744                 if (r) {
4745                         kvm_pic_destroy(kvm);
4746                         goto create_irqchip_unlock;
4747                 }
4748
4749                 r = kvm_setup_default_irq_routing(kvm);
4750                 if (r) {
4751                         kvm_ioapic_destroy(kvm);
4752                         kvm_pic_destroy(kvm);
4753                         goto create_irqchip_unlock;
4754                 }
4755                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4756                 smp_wmb();
4757                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4758         create_irqchip_unlock:
4759                 mutex_unlock(&kvm->lock);
4760                 break;
4761         }
4762         case KVM_CREATE_PIT:
4763                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4764                 goto create_pit;
4765         case KVM_CREATE_PIT2:
4766                 r = -EFAULT;
4767                 if (copy_from_user(&u.pit_config, argp,
4768                                    sizeof(struct kvm_pit_config)))
4769                         goto out;
4770         create_pit:
4771                 mutex_lock(&kvm->lock);
4772                 r = -EEXIST;
4773                 if (kvm->arch.vpit)
4774                         goto create_pit_unlock;
4775                 r = -ENOMEM;
4776                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4777                 if (kvm->arch.vpit)
4778                         r = 0;
4779         create_pit_unlock:
4780                 mutex_unlock(&kvm->lock);
4781                 break;
4782         case KVM_GET_IRQCHIP: {
4783                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4784                 struct kvm_irqchip *chip;
4785
4786                 chip = memdup_user(argp, sizeof(*chip));
4787                 if (IS_ERR(chip)) {
4788                         r = PTR_ERR(chip);
4789                         goto out;
4790                 }
4791
4792                 r = -ENXIO;
4793                 if (!irqchip_kernel(kvm))
4794                         goto get_irqchip_out;
4795                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4796                 if (r)
4797                         goto get_irqchip_out;
4798                 r = -EFAULT;
4799                 if (copy_to_user(argp, chip, sizeof(*chip)))
4800                         goto get_irqchip_out;
4801                 r = 0;
4802         get_irqchip_out:
4803                 kfree(chip);
4804                 break;
4805         }
4806         case KVM_SET_IRQCHIP: {
4807                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4808                 struct kvm_irqchip *chip;
4809
4810                 chip = memdup_user(argp, sizeof(*chip));
4811                 if (IS_ERR(chip)) {
4812                         r = PTR_ERR(chip);
4813                         goto out;
4814                 }
4815
4816                 r = -ENXIO;
4817                 if (!irqchip_kernel(kvm))
4818                         goto set_irqchip_out;
4819                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4820                 if (r)
4821                         goto set_irqchip_out;
4822                 r = 0;
4823         set_irqchip_out:
4824                 kfree(chip);
4825                 break;
4826         }
4827         case KVM_GET_PIT: {
4828                 r = -EFAULT;
4829                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4830                         goto out;
4831                 r = -ENXIO;
4832                 if (!kvm->arch.vpit)
4833                         goto out;
4834                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4835                 if (r)
4836                         goto out;
4837                 r = -EFAULT;
4838                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4839                         goto out;
4840                 r = 0;
4841                 break;
4842         }
4843         case KVM_SET_PIT: {
4844                 r = -EFAULT;
4845                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4846                         goto out;
4847                 r = -ENXIO;
4848                 if (!kvm->arch.vpit)
4849                         goto out;
4850                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4851                 break;
4852         }
4853         case KVM_GET_PIT2: {
4854                 r = -ENXIO;
4855                 if (!kvm->arch.vpit)
4856                         goto out;
4857                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4858                 if (r)
4859                         goto out;
4860                 r = -EFAULT;
4861                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4862                         goto out;
4863                 r = 0;
4864                 break;
4865         }
4866         case KVM_SET_PIT2: {
4867                 r = -EFAULT;
4868                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4869                         goto out;
4870                 r = -ENXIO;
4871                 if (!kvm->arch.vpit)
4872                         goto out;
4873                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4874                 break;
4875         }
4876         case KVM_REINJECT_CONTROL: {
4877                 struct kvm_reinject_control control;
4878                 r =  -EFAULT;
4879                 if (copy_from_user(&control, argp, sizeof(control)))
4880                         goto out;
4881                 r = kvm_vm_ioctl_reinject(kvm, &control);
4882                 break;
4883         }
4884         case KVM_SET_BOOT_CPU_ID:
4885                 r = 0;
4886                 mutex_lock(&kvm->lock);
4887                 if (kvm->created_vcpus)
4888                         r = -EBUSY;
4889                 else
4890                         kvm->arch.bsp_vcpu_id = arg;
4891                 mutex_unlock(&kvm->lock);
4892                 break;
4893         case KVM_XEN_HVM_CONFIG: {
4894                 struct kvm_xen_hvm_config xhc;
4895                 r = -EFAULT;
4896                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4897                         goto out;
4898                 r = -EINVAL;
4899                 if (xhc.flags)
4900                         goto out;
4901                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4902                 r = 0;
4903                 break;
4904         }
4905         case KVM_SET_CLOCK: {
4906                 struct kvm_clock_data user_ns;
4907                 u64 now_ns;
4908
4909                 r = -EFAULT;
4910                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4911                         goto out;
4912
4913                 r = -EINVAL;
4914                 if (user_ns.flags)
4915                         goto out;
4916
4917                 r = 0;
4918                 /*
4919                  * TODO: userspace has to take care of races with VCPU_RUN, so
4920                  * kvm_gen_update_masterclock() can be cut down to locked
4921                  * pvclock_update_vm_gtod_copy().
4922                  */
4923                 kvm_gen_update_masterclock(kvm);
4924                 now_ns = get_kvmclock_ns(kvm);
4925                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4926                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4927                 break;
4928         }
4929         case KVM_GET_CLOCK: {
4930                 struct kvm_clock_data user_ns;
4931                 u64 now_ns;
4932
4933                 now_ns = get_kvmclock_ns(kvm);
4934                 user_ns.clock = now_ns;
4935                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4936                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4937
4938                 r = -EFAULT;
4939                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4940                         goto out;
4941                 r = 0;
4942                 break;
4943         }
4944         case KVM_MEMORY_ENCRYPT_OP: {
4945                 r = -ENOTTY;
4946                 if (kvm_x86_ops->mem_enc_op)
4947                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4948                 break;
4949         }
4950         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4951                 struct kvm_enc_region region;
4952
4953                 r = -EFAULT;
4954                 if (copy_from_user(&region, argp, sizeof(region)))
4955                         goto out;
4956
4957                 r = -ENOTTY;
4958                 if (kvm_x86_ops->mem_enc_reg_region)
4959                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4960                 break;
4961         }
4962         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4963                 struct kvm_enc_region region;
4964
4965                 r = -EFAULT;
4966                 if (copy_from_user(&region, argp, sizeof(region)))
4967                         goto out;
4968
4969                 r = -ENOTTY;
4970                 if (kvm_x86_ops->mem_enc_unreg_region)
4971                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4972                 break;
4973         }
4974         case KVM_HYPERV_EVENTFD: {
4975                 struct kvm_hyperv_eventfd hvevfd;
4976
4977                 r = -EFAULT;
4978                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4979                         goto out;
4980                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4981                 break;
4982         }
4983         case KVM_SET_PMU_EVENT_FILTER:
4984                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
4985                 break;
4986         default:
4987                 r = -ENOTTY;
4988         }
4989 out:
4990         return r;
4991 }
4992
4993 static void kvm_init_msr_list(void)
4994 {
4995         u32 dummy[2];
4996         unsigned i, j;
4997
4998         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4999                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
5000                         continue;
5001
5002                 /*
5003                  * Even MSRs that are valid in the host may not be exposed
5004                  * to the guests in some cases.
5005                  */
5006                 switch (msrs_to_save[i]) {
5007                 case MSR_IA32_BNDCFGS:
5008                         if (!kvm_mpx_supported())
5009                                 continue;
5010                         break;
5011                 case MSR_TSC_AUX:
5012                         if (!kvm_x86_ops->rdtscp_supported())
5013                                 continue;
5014                         break;
5015                 case MSR_IA32_RTIT_CTL:
5016                 case MSR_IA32_RTIT_STATUS:
5017                         if (!kvm_x86_ops->pt_supported())
5018                                 continue;
5019                         break;
5020                 case MSR_IA32_RTIT_CR3_MATCH:
5021                         if (!kvm_x86_ops->pt_supported() ||
5022                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5023                                 continue;
5024                         break;
5025                 case MSR_IA32_RTIT_OUTPUT_BASE:
5026                 case MSR_IA32_RTIT_OUTPUT_MASK:
5027                         if (!kvm_x86_ops->pt_supported() ||
5028                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5029                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5030                                 continue;
5031                         break;
5032                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5033                         if (!kvm_x86_ops->pt_supported() ||
5034                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5035                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5036                                 continue;
5037                         break;
5038                 }
5039                 default:
5040                         break;
5041                 }
5042
5043                 if (j < i)
5044                         msrs_to_save[j] = msrs_to_save[i];
5045                 j++;
5046         }
5047         num_msrs_to_save = j;
5048
5049         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5050                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5051                         continue;
5052
5053                 if (j < i)
5054                         emulated_msrs[j] = emulated_msrs[i];
5055                 j++;
5056         }
5057         num_emulated_msrs = j;
5058
5059         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5060                 struct kvm_msr_entry msr;
5061
5062                 msr.index = msr_based_features[i];
5063                 if (kvm_get_msr_feature(&msr))
5064                         continue;
5065
5066                 if (j < i)
5067                         msr_based_features[j] = msr_based_features[i];
5068                 j++;
5069         }
5070         num_msr_based_features = j;
5071 }
5072
5073 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5074                            const void *v)
5075 {
5076         int handled = 0;
5077         int n;
5078
5079         do {
5080                 n = min(len, 8);
5081                 if (!(lapic_in_kernel(vcpu) &&
5082                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5083                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5084                         break;
5085                 handled += n;
5086                 addr += n;
5087                 len -= n;
5088                 v += n;
5089         } while (len);
5090
5091         return handled;
5092 }
5093
5094 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5095 {
5096         int handled = 0;
5097         int n;
5098
5099         do {
5100                 n = min(len, 8);
5101                 if (!(lapic_in_kernel(vcpu) &&
5102                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5103                                          addr, n, v))
5104                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5105                         break;
5106                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5107                 handled += n;
5108                 addr += n;
5109                 len -= n;
5110                 v += n;
5111         } while (len);
5112
5113         return handled;
5114 }
5115
5116 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5117                         struct kvm_segment *var, int seg)
5118 {
5119         kvm_x86_ops->set_segment(vcpu, var, seg);
5120 }
5121
5122 void kvm_get_segment(struct kvm_vcpu *vcpu,
5123                      struct kvm_segment *var, int seg)
5124 {
5125         kvm_x86_ops->get_segment(vcpu, var, seg);
5126 }
5127
5128 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5129                            struct x86_exception *exception)
5130 {
5131         gpa_t t_gpa;
5132
5133         BUG_ON(!mmu_is_nested(vcpu));
5134
5135         /* NPT walks are always user-walks */
5136         access |= PFERR_USER_MASK;
5137         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5138
5139         return t_gpa;
5140 }
5141
5142 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5143                               struct x86_exception *exception)
5144 {
5145         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5146         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5147 }
5148
5149  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5150                                 struct x86_exception *exception)
5151 {
5152         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5153         access |= PFERR_FETCH_MASK;
5154         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5155 }
5156
5157 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5158                                struct x86_exception *exception)
5159 {
5160         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5161         access |= PFERR_WRITE_MASK;
5162         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5163 }
5164
5165 /* uses this to access any guest's mapped memory without checking CPL */
5166 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5167                                 struct x86_exception *exception)
5168 {
5169         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5170 }
5171
5172 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5173                                       struct kvm_vcpu *vcpu, u32 access,
5174                                       struct x86_exception *exception)
5175 {
5176         void *data = val;
5177         int r = X86EMUL_CONTINUE;
5178
5179         while (bytes) {
5180                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5181                                                             exception);
5182                 unsigned offset = addr & (PAGE_SIZE-1);
5183                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5184                 int ret;
5185
5186                 if (gpa == UNMAPPED_GVA)
5187                         return X86EMUL_PROPAGATE_FAULT;
5188                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5189                                                offset, toread);
5190                 if (ret < 0) {
5191                         r = X86EMUL_IO_NEEDED;
5192                         goto out;
5193                 }
5194
5195                 bytes -= toread;
5196                 data += toread;
5197                 addr += toread;
5198         }
5199 out:
5200         return r;
5201 }
5202
5203 /* used for instruction fetching */
5204 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5205                                 gva_t addr, void *val, unsigned int bytes,
5206                                 struct x86_exception *exception)
5207 {
5208         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5209         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5210         unsigned offset;
5211         int ret;
5212
5213         /* Inline kvm_read_guest_virt_helper for speed.  */
5214         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5215                                                     exception);
5216         if (unlikely(gpa == UNMAPPED_GVA))
5217                 return X86EMUL_PROPAGATE_FAULT;
5218
5219         offset = addr & (PAGE_SIZE-1);
5220         if (WARN_ON(offset + bytes > PAGE_SIZE))
5221                 bytes = (unsigned)PAGE_SIZE - offset;
5222         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5223                                        offset, bytes);
5224         if (unlikely(ret < 0))
5225                 return X86EMUL_IO_NEEDED;
5226
5227         return X86EMUL_CONTINUE;
5228 }
5229
5230 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5231                                gva_t addr, void *val, unsigned int bytes,
5232                                struct x86_exception *exception)
5233 {
5234         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5235
5236         /*
5237          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5238          * is returned, but our callers are not ready for that and they blindly
5239          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5240          * uninitialized kernel stack memory into cr2 and error code.
5241          */
5242         memset(exception, 0, sizeof(*exception));
5243         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5244                                           exception);
5245 }
5246 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5247
5248 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5249                              gva_t addr, void *val, unsigned int bytes,
5250                              struct x86_exception *exception, bool system)
5251 {
5252         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5253         u32 access = 0;
5254
5255         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5256                 access |= PFERR_USER_MASK;
5257
5258         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5259 }
5260
5261 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5262                 unsigned long addr, void *val, unsigned int bytes)
5263 {
5264         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5265         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5266
5267         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5268 }
5269
5270 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5271                                       struct kvm_vcpu *vcpu, u32 access,
5272                                       struct x86_exception *exception)
5273 {
5274         void *data = val;
5275         int r = X86EMUL_CONTINUE;
5276
5277         while (bytes) {
5278                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5279                                                              access,
5280                                                              exception);
5281                 unsigned offset = addr & (PAGE_SIZE-1);
5282                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5283                 int ret;
5284
5285                 if (gpa == UNMAPPED_GVA)
5286                         return X86EMUL_PROPAGATE_FAULT;
5287                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5288                 if (ret < 0) {
5289                         r = X86EMUL_IO_NEEDED;
5290                         goto out;
5291                 }
5292
5293                 bytes -= towrite;
5294                 data += towrite;
5295                 addr += towrite;
5296         }
5297 out:
5298         return r;
5299 }
5300
5301 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5302                               unsigned int bytes, struct x86_exception *exception,
5303                               bool system)
5304 {
5305         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5306         u32 access = PFERR_WRITE_MASK;
5307
5308         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5309                 access |= PFERR_USER_MASK;
5310
5311         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5312                                            access, exception);
5313 }
5314
5315 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5316                                 unsigned int bytes, struct x86_exception *exception)
5317 {
5318         /* kvm_write_guest_virt_system can pull in tons of pages. */
5319         vcpu->arch.l1tf_flush_l1d = true;
5320
5321         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5322                                            PFERR_WRITE_MASK, exception);
5323 }
5324 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5325
5326 int handle_ud(struct kvm_vcpu *vcpu)
5327 {
5328         int emul_type = EMULTYPE_TRAP_UD;
5329         enum emulation_result er;
5330         char sig[5]; /* ud2; .ascii "kvm" */
5331         struct x86_exception e;
5332
5333         if (force_emulation_prefix &&
5334             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5335                                 sig, sizeof(sig), &e) == 0 &&
5336             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5337                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5338                 emul_type = 0;
5339         }
5340
5341         er = kvm_emulate_instruction(vcpu, emul_type);
5342         if (er == EMULATE_USER_EXIT)
5343                 return 0;
5344         if (er != EMULATE_DONE)
5345                 kvm_queue_exception(vcpu, UD_VECTOR);
5346         return 1;
5347 }
5348 EXPORT_SYMBOL_GPL(handle_ud);
5349
5350 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5351                             gpa_t gpa, bool write)
5352 {
5353         /* For APIC access vmexit */
5354         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5355                 return 1;
5356
5357         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5358                 trace_vcpu_match_mmio(gva, gpa, write, true);
5359                 return 1;
5360         }
5361
5362         return 0;
5363 }
5364
5365 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5366                                 gpa_t *gpa, struct x86_exception *exception,
5367                                 bool write)
5368 {
5369         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5370                 | (write ? PFERR_WRITE_MASK : 0);
5371
5372         /*
5373          * currently PKRU is only applied to ept enabled guest so
5374          * there is no pkey in EPT page table for L1 guest or EPT
5375          * shadow page table for L2 guest.
5376          */
5377         if (vcpu_match_mmio_gva(vcpu, gva)
5378             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5379                                  vcpu->arch.mmio_access, 0, access)) {
5380                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5381                                         (gva & (PAGE_SIZE - 1));
5382                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5383                 return 1;
5384         }
5385
5386         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5387
5388         if (*gpa == UNMAPPED_GVA)
5389                 return -1;
5390
5391         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5392 }
5393
5394 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5395                         const void *val, int bytes)
5396 {
5397         int ret;
5398
5399         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5400         if (ret < 0)
5401                 return 0;
5402         kvm_page_track_write(vcpu, gpa, val, bytes);
5403         return 1;
5404 }
5405
5406 struct read_write_emulator_ops {
5407         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5408                                   int bytes);
5409         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5410                                   void *val, int bytes);
5411         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5412                                int bytes, void *val);
5413         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5414                                     void *val, int bytes);
5415         bool write;
5416 };
5417
5418 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5419 {
5420         if (vcpu->mmio_read_completed) {
5421                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5422                                vcpu->mmio_fragments[0].gpa, val);
5423                 vcpu->mmio_read_completed = 0;
5424                 return 1;
5425         }
5426
5427         return 0;
5428 }
5429
5430 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5431                         void *val, int bytes)
5432 {
5433         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5434 }
5435
5436 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5437                          void *val, int bytes)
5438 {
5439         return emulator_write_phys(vcpu, gpa, val, bytes);
5440 }
5441
5442 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5443 {
5444         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5445         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5446 }
5447
5448 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5449                           void *val, int bytes)
5450 {
5451         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5452         return X86EMUL_IO_NEEDED;
5453 }
5454
5455 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5456                            void *val, int bytes)
5457 {
5458         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5459
5460         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5461         return X86EMUL_CONTINUE;
5462 }
5463
5464 static const struct read_write_emulator_ops read_emultor = {
5465         .read_write_prepare = read_prepare,
5466         .read_write_emulate = read_emulate,
5467         .read_write_mmio = vcpu_mmio_read,
5468         .read_write_exit_mmio = read_exit_mmio,
5469 };
5470
5471 static const struct read_write_emulator_ops write_emultor = {
5472         .read_write_emulate = write_emulate,
5473         .read_write_mmio = write_mmio,
5474         .read_write_exit_mmio = write_exit_mmio,
5475         .write = true,
5476 };
5477
5478 static int emulator_read_write_onepage(unsigned long addr, void *val,
5479                                        unsigned int bytes,
5480                                        struct x86_exception *exception,
5481                                        struct kvm_vcpu *vcpu,
5482                                        const struct read_write_emulator_ops *ops)
5483 {
5484         gpa_t gpa;
5485         int handled, ret;
5486         bool write = ops->write;
5487         struct kvm_mmio_fragment *frag;
5488         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5489
5490         /*
5491          * If the exit was due to a NPF we may already have a GPA.
5492          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5493          * Note, this cannot be used on string operations since string
5494          * operation using rep will only have the initial GPA from the NPF
5495          * occurred.
5496          */
5497         if (vcpu->arch.gpa_available &&
5498             emulator_can_use_gpa(ctxt) &&
5499             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5500                 gpa = vcpu->arch.gpa_val;
5501                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5502         } else {
5503                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5504                 if (ret < 0)
5505                         return X86EMUL_PROPAGATE_FAULT;
5506         }
5507
5508         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5509                 return X86EMUL_CONTINUE;
5510
5511         /*
5512          * Is this MMIO handled locally?
5513          */
5514         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5515         if (handled == bytes)
5516                 return X86EMUL_CONTINUE;
5517
5518         gpa += handled;
5519         bytes -= handled;
5520         val += handled;
5521
5522         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5523         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5524         frag->gpa = gpa;
5525         frag->data = val;
5526         frag->len = bytes;
5527         return X86EMUL_CONTINUE;
5528 }
5529
5530 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5531                         unsigned long addr,
5532                         void *val, unsigned int bytes,
5533                         struct x86_exception *exception,
5534                         const struct read_write_emulator_ops *ops)
5535 {
5536         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5537         gpa_t gpa;
5538         int rc;
5539
5540         if (ops->read_write_prepare &&
5541                   ops->read_write_prepare(vcpu, val, bytes))
5542                 return X86EMUL_CONTINUE;
5543
5544         vcpu->mmio_nr_fragments = 0;
5545
5546         /* Crossing a page boundary? */
5547         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5548                 int now;
5549
5550                 now = -addr & ~PAGE_MASK;
5551                 rc = emulator_read_write_onepage(addr, val, now, exception,
5552                                                  vcpu, ops);
5553
5554                 if (rc != X86EMUL_CONTINUE)
5555                         return rc;
5556                 addr += now;
5557                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5558                         addr = (u32)addr;
5559                 val += now;
5560                 bytes -= now;
5561         }
5562
5563         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5564                                          vcpu, ops);
5565         if (rc != X86EMUL_CONTINUE)
5566                 return rc;
5567
5568         if (!vcpu->mmio_nr_fragments)
5569                 return rc;
5570
5571         gpa = vcpu->mmio_fragments[0].gpa;
5572
5573         vcpu->mmio_needed = 1;
5574         vcpu->mmio_cur_fragment = 0;
5575
5576         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5577         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5578         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5579         vcpu->run->mmio.phys_addr = gpa;
5580
5581         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5582 }
5583
5584 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5585                                   unsigned long addr,
5586                                   void *val,
5587                                   unsigned int bytes,
5588                                   struct x86_exception *exception)
5589 {
5590         return emulator_read_write(ctxt, addr, val, bytes,
5591                                    exception, &read_emultor);
5592 }
5593
5594 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5595                             unsigned long addr,
5596                             const void *val,
5597                             unsigned int bytes,
5598                             struct x86_exception *exception)
5599 {
5600         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5601                                    exception, &write_emultor);
5602 }
5603
5604 #define CMPXCHG_TYPE(t, ptr, old, new) \
5605         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5606
5607 #ifdef CONFIG_X86_64
5608 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5609 #else
5610 #  define CMPXCHG64(ptr, old, new) \
5611         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5612 #endif
5613
5614 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5615                                      unsigned long addr,
5616                                      const void *old,
5617                                      const void *new,
5618                                      unsigned int bytes,
5619                                      struct x86_exception *exception)
5620 {
5621         struct kvm_host_map map;
5622         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5623         gpa_t gpa;
5624         char *kaddr;
5625         bool exchanged;
5626
5627         /* guests cmpxchg8b have to be emulated atomically */
5628         if (bytes > 8 || (bytes & (bytes - 1)))
5629                 goto emul_write;
5630
5631         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5632
5633         if (gpa == UNMAPPED_GVA ||
5634             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5635                 goto emul_write;
5636
5637         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5638                 goto emul_write;
5639
5640         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5641                 goto emul_write;
5642
5643         kaddr = map.hva + offset_in_page(gpa);
5644
5645         switch (bytes) {
5646         case 1:
5647                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5648                 break;
5649         case 2:
5650                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5651                 break;
5652         case 4:
5653                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5654                 break;
5655         case 8:
5656                 exchanged = CMPXCHG64(kaddr, old, new);
5657                 break;
5658         default:
5659                 BUG();
5660         }
5661
5662         kvm_vcpu_unmap(vcpu, &map, true);
5663
5664         if (!exchanged)
5665                 return X86EMUL_CMPXCHG_FAILED;
5666
5667         kvm_page_track_write(vcpu, gpa, new, bytes);
5668
5669         return X86EMUL_CONTINUE;
5670
5671 emul_write:
5672         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5673
5674         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5675 }
5676
5677 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5678 {
5679         int r = 0, i;
5680
5681         for (i = 0; i < vcpu->arch.pio.count; i++) {
5682                 if (vcpu->arch.pio.in)
5683                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5684                                             vcpu->arch.pio.size, pd);
5685                 else
5686                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5687                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5688                                              pd);
5689                 if (r)
5690                         break;
5691                 pd += vcpu->arch.pio.size;
5692         }
5693         return r;
5694 }
5695
5696 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5697                                unsigned short port, void *val,
5698                                unsigned int count, bool in)
5699 {
5700         vcpu->arch.pio.port = port;
5701         vcpu->arch.pio.in = in;
5702         vcpu->arch.pio.count  = count;
5703         vcpu->arch.pio.size = size;
5704
5705         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5706                 vcpu->arch.pio.count = 0;
5707                 return 1;
5708         }
5709
5710         vcpu->run->exit_reason = KVM_EXIT_IO;
5711         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5712         vcpu->run->io.size = size;
5713         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5714         vcpu->run->io.count = count;
5715         vcpu->run->io.port = port;
5716
5717         return 0;
5718 }
5719
5720 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5721                                     int size, unsigned short port, void *val,
5722                                     unsigned int count)
5723 {
5724         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5725         int ret;
5726
5727         if (vcpu->arch.pio.count)
5728                 goto data_avail;
5729
5730         memset(vcpu->arch.pio_data, 0, size * count);
5731
5732         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5733         if (ret) {
5734 data_avail:
5735                 memcpy(val, vcpu->arch.pio_data, size * count);
5736                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5737                 vcpu->arch.pio.count = 0;
5738                 return 1;
5739         }
5740
5741         return 0;
5742 }
5743
5744 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5745                                      int size, unsigned short port,
5746                                      const void *val, unsigned int count)
5747 {
5748         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5749
5750         memcpy(vcpu->arch.pio_data, val, size * count);
5751         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5752         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5753 }
5754
5755 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5756 {
5757         return kvm_x86_ops->get_segment_base(vcpu, seg);
5758 }
5759
5760 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5761 {
5762         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5763 }
5764
5765 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5766 {
5767         if (!need_emulate_wbinvd(vcpu))
5768                 return X86EMUL_CONTINUE;
5769
5770         if (kvm_x86_ops->has_wbinvd_exit()) {
5771                 int cpu = get_cpu();
5772
5773                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5774                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5775                                 wbinvd_ipi, NULL, 1);
5776                 put_cpu();
5777                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5778         } else
5779                 wbinvd();
5780         return X86EMUL_CONTINUE;
5781 }
5782
5783 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5784 {
5785         kvm_emulate_wbinvd_noskip(vcpu);
5786         return kvm_skip_emulated_instruction(vcpu);
5787 }
5788 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5789
5790
5791
5792 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5793 {
5794         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5795 }
5796
5797 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5798                            unsigned long *dest)
5799 {
5800         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5801 }
5802
5803 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5804                            unsigned long value)
5805 {
5806
5807         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5808 }
5809
5810 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5811 {
5812         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5813 }
5814
5815 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5816 {
5817         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5818         unsigned long value;
5819
5820         switch (cr) {
5821         case 0:
5822                 value = kvm_read_cr0(vcpu);
5823                 break;
5824         case 2:
5825                 value = vcpu->arch.cr2;
5826                 break;
5827         case 3:
5828                 value = kvm_read_cr3(vcpu);
5829                 break;
5830         case 4:
5831                 value = kvm_read_cr4(vcpu);
5832                 break;
5833         case 8:
5834                 value = kvm_get_cr8(vcpu);
5835                 break;
5836         default:
5837                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5838                 return 0;
5839         }
5840
5841         return value;
5842 }
5843
5844 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5845 {
5846         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5847         int res = 0;
5848
5849         switch (cr) {
5850         case 0:
5851                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5852                 break;
5853         case 2:
5854                 vcpu->arch.cr2 = val;
5855                 break;
5856         case 3:
5857                 res = kvm_set_cr3(vcpu, val);
5858                 break;
5859         case 4:
5860                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5861                 break;
5862         case 8:
5863                 res = kvm_set_cr8(vcpu, val);
5864                 break;
5865         default:
5866                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5867                 res = -1;
5868         }
5869
5870         return res;
5871 }
5872
5873 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5874 {
5875         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5876 }
5877
5878 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5879 {
5880         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5881 }
5882
5883 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5884 {
5885         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5886 }
5887
5888 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5889 {
5890         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5891 }
5892
5893 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5894 {
5895         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5896 }
5897
5898 static unsigned long emulator_get_cached_segment_base(
5899         struct x86_emulate_ctxt *ctxt, int seg)
5900 {
5901         return get_segment_base(emul_to_vcpu(ctxt), seg);
5902 }
5903
5904 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5905                                  struct desc_struct *desc, u32 *base3,
5906                                  int seg)
5907 {
5908         struct kvm_segment var;
5909
5910         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5911         *selector = var.selector;
5912
5913         if (var.unusable) {
5914                 memset(desc, 0, sizeof(*desc));
5915                 if (base3)
5916                         *base3 = 0;
5917                 return false;
5918         }
5919
5920         if (var.g)
5921                 var.limit >>= 12;
5922         set_desc_limit(desc, var.limit);
5923         set_desc_base(desc, (unsigned long)var.base);
5924 #ifdef CONFIG_X86_64
5925         if (base3)
5926                 *base3 = var.base >> 32;
5927 #endif
5928         desc->type = var.type;
5929         desc->s = var.s;
5930         desc->dpl = var.dpl;
5931         desc->p = var.present;
5932         desc->avl = var.avl;
5933         desc->l = var.l;
5934         desc->d = var.db;
5935         desc->g = var.g;
5936
5937         return true;
5938 }
5939
5940 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5941                                  struct desc_struct *desc, u32 base3,
5942                                  int seg)
5943 {
5944         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5945         struct kvm_segment var;
5946
5947         var.selector = selector;
5948         var.base = get_desc_base(desc);
5949 #ifdef CONFIG_X86_64
5950         var.base |= ((u64)base3) << 32;
5951 #endif
5952         var.limit = get_desc_limit(desc);
5953         if (desc->g)
5954                 var.limit = (var.limit << 12) | 0xfff;
5955         var.type = desc->type;
5956         var.dpl = desc->dpl;
5957         var.db = desc->d;
5958         var.s = desc->s;
5959         var.l = desc->l;
5960         var.g = desc->g;
5961         var.avl = desc->avl;
5962         var.present = desc->p;
5963         var.unusable = !var.present;
5964         var.padding = 0;
5965
5966         kvm_set_segment(vcpu, &var, seg);
5967         return;
5968 }
5969
5970 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5971                             u32 msr_index, u64 *pdata)
5972 {
5973         struct msr_data msr;
5974         int r;
5975
5976         msr.index = msr_index;
5977         msr.host_initiated = false;
5978         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5979         if (r)
5980                 return r;
5981
5982         *pdata = msr.data;
5983         return 0;
5984 }
5985
5986 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5987                             u32 msr_index, u64 data)
5988 {
5989         struct msr_data msr;
5990
5991         msr.data = data;
5992         msr.index = msr_index;
5993         msr.host_initiated = false;
5994         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5995 }
5996
5997 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5998 {
5999         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6000
6001         return vcpu->arch.smbase;
6002 }
6003
6004 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6005 {
6006         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6007
6008         vcpu->arch.smbase = smbase;
6009 }
6010
6011 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6012                               u32 pmc)
6013 {
6014         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6015 }
6016
6017 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6018                              u32 pmc, u64 *pdata)
6019 {
6020         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6021 }
6022
6023 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6024 {
6025         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6026 }
6027
6028 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6029                               struct x86_instruction_info *info,
6030                               enum x86_intercept_stage stage)
6031 {
6032         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6033 }
6034
6035 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6036                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6037 {
6038         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6039 }
6040
6041 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6042 {
6043         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6044 }
6045
6046 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6047 {
6048         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6049 }
6050
6051 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6052 {
6053         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6054 }
6055
6056 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6057 {
6058         return emul_to_vcpu(ctxt)->arch.hflags;
6059 }
6060
6061 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6062 {
6063         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6064 }
6065
6066 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6067                                   const char *smstate)
6068 {
6069         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6070 }
6071
6072 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6073 {
6074         kvm_smm_changed(emul_to_vcpu(ctxt));
6075 }
6076
6077 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6078 {
6079         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6080 }
6081
6082 static const struct x86_emulate_ops emulate_ops = {
6083         .read_gpr            = emulator_read_gpr,
6084         .write_gpr           = emulator_write_gpr,
6085         .read_std            = emulator_read_std,
6086         .write_std           = emulator_write_std,
6087         .read_phys           = kvm_read_guest_phys_system,
6088         .fetch               = kvm_fetch_guest_virt,
6089         .read_emulated       = emulator_read_emulated,
6090         .write_emulated      = emulator_write_emulated,
6091         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6092         .invlpg              = emulator_invlpg,
6093         .pio_in_emulated     = emulator_pio_in_emulated,
6094         .pio_out_emulated    = emulator_pio_out_emulated,
6095         .get_segment         = emulator_get_segment,
6096         .set_segment         = emulator_set_segment,
6097         .get_cached_segment_base = emulator_get_cached_segment_base,
6098         .get_gdt             = emulator_get_gdt,
6099         .get_idt             = emulator_get_idt,
6100         .set_gdt             = emulator_set_gdt,
6101         .set_idt             = emulator_set_idt,
6102         .get_cr              = emulator_get_cr,
6103         .set_cr              = emulator_set_cr,
6104         .cpl                 = emulator_get_cpl,
6105         .get_dr              = emulator_get_dr,
6106         .set_dr              = emulator_set_dr,
6107         .get_smbase          = emulator_get_smbase,
6108         .set_smbase          = emulator_set_smbase,
6109         .set_msr             = emulator_set_msr,
6110         .get_msr             = emulator_get_msr,
6111         .check_pmc           = emulator_check_pmc,
6112         .read_pmc            = emulator_read_pmc,
6113         .halt                = emulator_halt,
6114         .wbinvd              = emulator_wbinvd,
6115         .fix_hypercall       = emulator_fix_hypercall,
6116         .intercept           = emulator_intercept,
6117         .get_cpuid           = emulator_get_cpuid,
6118         .set_nmi_mask        = emulator_set_nmi_mask,
6119         .get_hflags          = emulator_get_hflags,
6120         .set_hflags          = emulator_set_hflags,
6121         .pre_leave_smm       = emulator_pre_leave_smm,
6122         .post_leave_smm      = emulator_post_leave_smm,
6123         .set_xcr             = emulator_set_xcr,
6124 };
6125
6126 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6127 {
6128         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6129         /*
6130          * an sti; sti; sequence only disable interrupts for the first
6131          * instruction. So, if the last instruction, be it emulated or
6132          * not, left the system with the INT_STI flag enabled, it
6133          * means that the last instruction is an sti. We should not
6134          * leave the flag on in this case. The same goes for mov ss
6135          */
6136         if (int_shadow & mask)
6137                 mask = 0;
6138         if (unlikely(int_shadow || mask)) {
6139                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6140                 if (!mask)
6141                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6142         }
6143 }
6144
6145 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6146 {
6147         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6148         if (ctxt->exception.vector == PF_VECTOR)
6149                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6150
6151         if (ctxt->exception.error_code_valid)
6152                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6153                                       ctxt->exception.error_code);
6154         else
6155                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6156         return false;
6157 }
6158
6159 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6160 {
6161         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6162         int cs_db, cs_l;
6163
6164         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6165
6166         ctxt->eflags = kvm_get_rflags(vcpu);
6167         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6168
6169         ctxt->eip = kvm_rip_read(vcpu);
6170         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6171                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6172                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6173                      cs_db                              ? X86EMUL_MODE_PROT32 :
6174                                                           X86EMUL_MODE_PROT16;
6175         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6176         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6177         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6178
6179         init_decode_cache(ctxt);
6180         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6181 }
6182
6183 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6184 {
6185         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6186         int ret;
6187
6188         init_emulate_ctxt(vcpu);
6189
6190         ctxt->op_bytes = 2;
6191         ctxt->ad_bytes = 2;
6192         ctxt->_eip = ctxt->eip + inc_eip;
6193         ret = emulate_int_real(ctxt, irq);
6194
6195         if (ret != X86EMUL_CONTINUE)
6196                 return EMULATE_FAIL;
6197
6198         ctxt->eip = ctxt->_eip;
6199         kvm_rip_write(vcpu, ctxt->eip);
6200         kvm_set_rflags(vcpu, ctxt->eflags);
6201
6202         return EMULATE_DONE;
6203 }
6204 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6205
6206 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6207 {
6208         int r = EMULATE_DONE;
6209
6210         ++vcpu->stat.insn_emulation_fail;
6211         trace_kvm_emulate_insn_failed(vcpu);
6212
6213         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6214                 return EMULATE_FAIL;
6215
6216         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6217                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6218                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6219                 vcpu->run->internal.ndata = 0;
6220                 r = EMULATE_USER_EXIT;
6221         }
6222
6223         kvm_queue_exception(vcpu, UD_VECTOR);
6224
6225         return r;
6226 }
6227
6228 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6229                                   bool write_fault_to_shadow_pgtable,
6230                                   int emulation_type)
6231 {
6232         gpa_t gpa = cr2;
6233         kvm_pfn_t pfn;
6234
6235         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6236                 return false;
6237
6238         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6239                 return false;
6240
6241         if (!vcpu->arch.mmu->direct_map) {
6242                 /*
6243                  * Write permission should be allowed since only
6244                  * write access need to be emulated.
6245                  */
6246                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6247
6248                 /*
6249                  * If the mapping is invalid in guest, let cpu retry
6250                  * it to generate fault.
6251                  */
6252                 if (gpa == UNMAPPED_GVA)
6253                         return true;
6254         }
6255
6256         /*
6257          * Do not retry the unhandleable instruction if it faults on the
6258          * readonly host memory, otherwise it will goto a infinite loop:
6259          * retry instruction -> write #PF -> emulation fail -> retry
6260          * instruction -> ...
6261          */
6262         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6263
6264         /*
6265          * If the instruction failed on the error pfn, it can not be fixed,
6266          * report the error to userspace.
6267          */
6268         if (is_error_noslot_pfn(pfn))
6269                 return false;
6270
6271         kvm_release_pfn_clean(pfn);
6272
6273         /* The instructions are well-emulated on direct mmu. */
6274         if (vcpu->arch.mmu->direct_map) {
6275                 unsigned int indirect_shadow_pages;
6276
6277                 spin_lock(&vcpu->kvm->mmu_lock);
6278                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6279                 spin_unlock(&vcpu->kvm->mmu_lock);
6280
6281                 if (indirect_shadow_pages)
6282                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6283
6284                 return true;
6285         }
6286
6287         /*
6288          * if emulation was due to access to shadowed page table
6289          * and it failed try to unshadow page and re-enter the
6290          * guest to let CPU execute the instruction.
6291          */
6292         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6293
6294         /*
6295          * If the access faults on its page table, it can not
6296          * be fixed by unprotecting shadow page and it should
6297          * be reported to userspace.
6298          */
6299         return !write_fault_to_shadow_pgtable;
6300 }
6301
6302 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6303                               unsigned long cr2,  int emulation_type)
6304 {
6305         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6306         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6307
6308         last_retry_eip = vcpu->arch.last_retry_eip;
6309         last_retry_addr = vcpu->arch.last_retry_addr;
6310
6311         /*
6312          * If the emulation is caused by #PF and it is non-page_table
6313          * writing instruction, it means the VM-EXIT is caused by shadow
6314          * page protected, we can zap the shadow page and retry this
6315          * instruction directly.
6316          *
6317          * Note: if the guest uses a non-page-table modifying instruction
6318          * on the PDE that points to the instruction, then we will unmap
6319          * the instruction and go to an infinite loop. So, we cache the
6320          * last retried eip and the last fault address, if we meet the eip
6321          * and the address again, we can break out of the potential infinite
6322          * loop.
6323          */
6324         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6325
6326         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6327                 return false;
6328
6329         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6330                 return false;
6331
6332         if (x86_page_table_writing_insn(ctxt))
6333                 return false;
6334
6335         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6336                 return false;
6337
6338         vcpu->arch.last_retry_eip = ctxt->eip;
6339         vcpu->arch.last_retry_addr = cr2;
6340
6341         if (!vcpu->arch.mmu->direct_map)
6342                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6343
6344         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6345
6346         return true;
6347 }
6348
6349 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6350 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6351
6352 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6353 {
6354         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6355                 /* This is a good place to trace that we are exiting SMM.  */
6356                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6357
6358                 /* Process a latched INIT or SMI, if any.  */
6359                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6360         }
6361
6362         kvm_mmu_reset_context(vcpu);
6363 }
6364
6365 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6366                                 unsigned long *db)
6367 {
6368         u32 dr6 = 0;
6369         int i;
6370         u32 enable, rwlen;
6371
6372         enable = dr7;
6373         rwlen = dr7 >> 16;
6374         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6375                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6376                         dr6 |= (1 << i);
6377         return dr6;
6378 }
6379
6380 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6381 {
6382         struct kvm_run *kvm_run = vcpu->run;
6383
6384         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6385                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6386                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6387                 kvm_run->debug.arch.exception = DB_VECTOR;
6388                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6389                 *r = EMULATE_USER_EXIT;
6390         } else {
6391                 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6392         }
6393 }
6394
6395 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6396 {
6397         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6398         int r;
6399
6400         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6401         if (unlikely(r != EMULATE_DONE))
6402                 return 0;
6403
6404         /*
6405          * rflags is the old, "raw" value of the flags.  The new value has
6406          * not been saved yet.
6407          *
6408          * This is correct even for TF set by the guest, because "the
6409          * processor will not generate this exception after the instruction
6410          * that sets the TF flag".
6411          */
6412         if (unlikely(rflags & X86_EFLAGS_TF))
6413                 kvm_vcpu_do_singlestep(vcpu, &r);
6414         return r == EMULATE_DONE;
6415 }
6416 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6417
6418 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6419 {
6420         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6421             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6422                 struct kvm_run *kvm_run = vcpu->run;
6423                 unsigned long eip = kvm_get_linear_rip(vcpu);
6424                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6425                                            vcpu->arch.guest_debug_dr7,
6426                                            vcpu->arch.eff_db);
6427
6428                 if (dr6 != 0) {
6429                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6430                         kvm_run->debug.arch.pc = eip;
6431                         kvm_run->debug.arch.exception = DB_VECTOR;
6432                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6433                         *r = EMULATE_USER_EXIT;
6434                         return true;
6435                 }
6436         }
6437
6438         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6439             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6440                 unsigned long eip = kvm_get_linear_rip(vcpu);
6441                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6442                                            vcpu->arch.dr7,
6443                                            vcpu->arch.db);
6444
6445                 if (dr6 != 0) {
6446                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6447                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6448                         kvm_queue_exception(vcpu, DB_VECTOR);
6449                         *r = EMULATE_DONE;
6450                         return true;
6451                 }
6452         }
6453
6454         return false;
6455 }
6456
6457 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6458 {
6459         switch (ctxt->opcode_len) {
6460         case 1:
6461                 switch (ctxt->b) {
6462                 case 0xe4:      /* IN */
6463                 case 0xe5:
6464                 case 0xec:
6465                 case 0xed:
6466                 case 0xe6:      /* OUT */
6467                 case 0xe7:
6468                 case 0xee:
6469                 case 0xef:
6470                 case 0x6c:      /* INS */
6471                 case 0x6d:
6472                 case 0x6e:      /* OUTS */
6473                 case 0x6f:
6474                         return true;
6475                 }
6476                 break;
6477         case 2:
6478                 switch (ctxt->b) {
6479                 case 0x33:      /* RDPMC */
6480                         return true;
6481                 }
6482                 break;
6483         }
6484
6485         return false;
6486 }
6487
6488 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6489                             unsigned long cr2,
6490                             int emulation_type,
6491                             void *insn,
6492                             int insn_len)
6493 {
6494         int r;
6495         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6496         bool writeback = true;
6497         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6498
6499         vcpu->arch.l1tf_flush_l1d = true;
6500
6501         /*
6502          * Clear write_fault_to_shadow_pgtable here to ensure it is
6503          * never reused.
6504          */
6505         vcpu->arch.write_fault_to_shadow_pgtable = false;
6506         kvm_clear_exception_queue(vcpu);
6507
6508         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6509                 init_emulate_ctxt(vcpu);
6510
6511                 /*
6512                  * We will reenter on the same instruction since
6513                  * we do not set complete_userspace_io.  This does not
6514                  * handle watchpoints yet, those would be handled in
6515                  * the emulate_ops.
6516                  */
6517                 if (!(emulation_type & EMULTYPE_SKIP) &&
6518                     kvm_vcpu_check_breakpoint(vcpu, &r))
6519                         return r;
6520
6521                 ctxt->interruptibility = 0;
6522                 ctxt->have_exception = false;
6523                 ctxt->exception.vector = -1;
6524                 ctxt->perm_ok = false;
6525
6526                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6527
6528                 r = x86_decode_insn(ctxt, insn, insn_len);
6529
6530                 trace_kvm_emulate_insn_start(vcpu);
6531                 ++vcpu->stat.insn_emulation;
6532                 if (r != EMULATION_OK)  {
6533                         if (emulation_type & EMULTYPE_TRAP_UD)
6534                                 return EMULATE_FAIL;
6535                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6536                                                 emulation_type))
6537                                 return EMULATE_DONE;
6538                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6539                                 return EMULATE_DONE;
6540                         if (emulation_type & EMULTYPE_SKIP)
6541                                 return EMULATE_FAIL;
6542                         return handle_emulation_failure(vcpu, emulation_type);
6543                 }
6544         }
6545
6546         if ((emulation_type & EMULTYPE_VMWARE) &&
6547             !is_vmware_backdoor_opcode(ctxt))
6548                 return EMULATE_FAIL;
6549
6550         if (emulation_type & EMULTYPE_SKIP) {
6551                 kvm_rip_write(vcpu, ctxt->_eip);
6552                 if (ctxt->eflags & X86_EFLAGS_RF)
6553                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6554                 kvm_x86_ops->set_interrupt_shadow(vcpu, 0);
6555                 return EMULATE_DONE;
6556         }
6557
6558         if (retry_instruction(ctxt, cr2, emulation_type))
6559                 return EMULATE_DONE;
6560
6561         /* this is needed for vmware backdoor interface to work since it
6562            changes registers values  during IO operation */
6563         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6564                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6565                 emulator_invalidate_register_cache(ctxt);
6566         }
6567
6568 restart:
6569         /* Save the faulting GPA (cr2) in the address field */
6570         ctxt->exception.address = cr2;
6571
6572         r = x86_emulate_insn(ctxt);
6573
6574         if (r == EMULATION_INTERCEPTED)
6575                 return EMULATE_DONE;
6576
6577         if (r == EMULATION_FAILED) {
6578                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6579                                         emulation_type))
6580                         return EMULATE_DONE;
6581
6582                 return handle_emulation_failure(vcpu, emulation_type);
6583         }
6584
6585         if (ctxt->have_exception) {
6586                 r = EMULATE_DONE;
6587                 if (inject_emulated_exception(vcpu))
6588                         return r;
6589         } else if (vcpu->arch.pio.count) {
6590                 if (!vcpu->arch.pio.in) {
6591                         /* FIXME: return into emulator if single-stepping.  */
6592                         vcpu->arch.pio.count = 0;
6593                 } else {
6594                         writeback = false;
6595                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6596                 }
6597                 r = EMULATE_USER_EXIT;
6598         } else if (vcpu->mmio_needed) {
6599                 if (!vcpu->mmio_is_write)
6600                         writeback = false;
6601                 r = EMULATE_USER_EXIT;
6602                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6603         } else if (r == EMULATION_RESTART)
6604                 goto restart;
6605         else
6606                 r = EMULATE_DONE;
6607
6608         if (writeback) {
6609                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6610                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6611                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6612                 kvm_rip_write(vcpu, ctxt->eip);
6613                 if (r == EMULATE_DONE && ctxt->tf)
6614                         kvm_vcpu_do_singlestep(vcpu, &r);
6615                 if (!ctxt->have_exception ||
6616                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6617                         __kvm_set_rflags(vcpu, ctxt->eflags);
6618
6619                 /*
6620                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6621                  * do nothing, and it will be requested again as soon as
6622                  * the shadow expires.  But we still need to check here,
6623                  * because POPF has no interrupt shadow.
6624                  */
6625                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6626                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6627         } else
6628                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6629
6630         return r;
6631 }
6632
6633 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6634 {
6635         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6636 }
6637 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6638
6639 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6640                                         void *insn, int insn_len)
6641 {
6642         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6643 }
6644 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6645
6646 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6647 {
6648         vcpu->arch.pio.count = 0;
6649         return 1;
6650 }
6651
6652 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6653 {
6654         vcpu->arch.pio.count = 0;
6655
6656         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6657                 return 1;
6658
6659         return kvm_skip_emulated_instruction(vcpu);
6660 }
6661
6662 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6663                             unsigned short port)
6664 {
6665         unsigned long val = kvm_rax_read(vcpu);
6666         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6667                                             size, port, &val, 1);
6668         if (ret)
6669                 return ret;
6670
6671         /*
6672          * Workaround userspace that relies on old KVM behavior of %rip being
6673          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6674          */
6675         if (port == 0x7e &&
6676             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6677                 vcpu->arch.complete_userspace_io =
6678                         complete_fast_pio_out_port_0x7e;
6679                 kvm_skip_emulated_instruction(vcpu);
6680         } else {
6681                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6682                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6683         }
6684         return 0;
6685 }
6686
6687 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6688 {
6689         unsigned long val;
6690
6691         /* We should only ever be called with arch.pio.count equal to 1 */
6692         BUG_ON(vcpu->arch.pio.count != 1);
6693
6694         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6695                 vcpu->arch.pio.count = 0;
6696                 return 1;
6697         }
6698
6699         /* For size less than 4 we merge, else we zero extend */
6700         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6701
6702         /*
6703          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6704          * the copy and tracing
6705          */
6706         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6707                                  vcpu->arch.pio.port, &val, 1);
6708         kvm_rax_write(vcpu, val);
6709
6710         return kvm_skip_emulated_instruction(vcpu);
6711 }
6712
6713 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6714                            unsigned short port)
6715 {
6716         unsigned long val;
6717         int ret;
6718
6719         /* For size less than 4 we merge, else we zero extend */
6720         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6721
6722         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6723                                        &val, 1);
6724         if (ret) {
6725                 kvm_rax_write(vcpu, val);
6726                 return ret;
6727         }
6728
6729         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6730         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6731
6732         return 0;
6733 }
6734
6735 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6736 {
6737         int ret;
6738
6739         if (in)
6740                 ret = kvm_fast_pio_in(vcpu, size, port);
6741         else
6742                 ret = kvm_fast_pio_out(vcpu, size, port);
6743         return ret && kvm_skip_emulated_instruction(vcpu);
6744 }
6745 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6746
6747 static int kvmclock_cpu_down_prep(unsigned int cpu)
6748 {
6749         __this_cpu_write(cpu_tsc_khz, 0);
6750         return 0;
6751 }
6752
6753 static void tsc_khz_changed(void *data)
6754 {
6755         struct cpufreq_freqs *freq = data;
6756         unsigned long khz = 0;
6757
6758         if (data)
6759                 khz = freq->new;
6760         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6761                 khz = cpufreq_quick_get(raw_smp_processor_id());
6762         if (!khz)
6763                 khz = tsc_khz;
6764         __this_cpu_write(cpu_tsc_khz, khz);
6765 }
6766
6767 #ifdef CONFIG_X86_64
6768 static void kvm_hyperv_tsc_notifier(void)
6769 {
6770         struct kvm *kvm;
6771         struct kvm_vcpu *vcpu;
6772         int cpu;
6773
6774         mutex_lock(&kvm_lock);
6775         list_for_each_entry(kvm, &vm_list, vm_list)
6776                 kvm_make_mclock_inprogress_request(kvm);
6777
6778         hyperv_stop_tsc_emulation();
6779
6780         /* TSC frequency always matches when on Hyper-V */
6781         for_each_present_cpu(cpu)
6782                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6783         kvm_max_guest_tsc_khz = tsc_khz;
6784
6785         list_for_each_entry(kvm, &vm_list, vm_list) {
6786                 struct kvm_arch *ka = &kvm->arch;
6787
6788                 spin_lock(&ka->pvclock_gtod_sync_lock);
6789
6790                 pvclock_update_vm_gtod_copy(kvm);
6791
6792                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6793                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6794
6795                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6796                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6797
6798                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6799         }
6800         mutex_unlock(&kvm_lock);
6801 }
6802 #endif
6803
6804 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6805 {
6806         struct kvm *kvm;
6807         struct kvm_vcpu *vcpu;
6808         int i, send_ipi = 0;
6809
6810         /*
6811          * We allow guests to temporarily run on slowing clocks,
6812          * provided we notify them after, or to run on accelerating
6813          * clocks, provided we notify them before.  Thus time never
6814          * goes backwards.
6815          *
6816          * However, we have a problem.  We can't atomically update
6817          * the frequency of a given CPU from this function; it is
6818          * merely a notifier, which can be called from any CPU.
6819          * Changing the TSC frequency at arbitrary points in time
6820          * requires a recomputation of local variables related to
6821          * the TSC for each VCPU.  We must flag these local variables
6822          * to be updated and be sure the update takes place with the
6823          * new frequency before any guests proceed.
6824          *
6825          * Unfortunately, the combination of hotplug CPU and frequency
6826          * change creates an intractable locking scenario; the order
6827          * of when these callouts happen is undefined with respect to
6828          * CPU hotplug, and they can race with each other.  As such,
6829          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6830          * undefined; you can actually have a CPU frequency change take
6831          * place in between the computation of X and the setting of the
6832          * variable.  To protect against this problem, all updates of
6833          * the per_cpu tsc_khz variable are done in an interrupt
6834          * protected IPI, and all callers wishing to update the value
6835          * must wait for a synchronous IPI to complete (which is trivial
6836          * if the caller is on the CPU already).  This establishes the
6837          * necessary total order on variable updates.
6838          *
6839          * Note that because a guest time update may take place
6840          * anytime after the setting of the VCPU's request bit, the
6841          * correct TSC value must be set before the request.  However,
6842          * to ensure the update actually makes it to any guest which
6843          * starts running in hardware virtualization between the set
6844          * and the acquisition of the spinlock, we must also ping the
6845          * CPU after setting the request bit.
6846          *
6847          */
6848
6849         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6850
6851         mutex_lock(&kvm_lock);
6852         list_for_each_entry(kvm, &vm_list, vm_list) {
6853                 kvm_for_each_vcpu(i, vcpu, kvm) {
6854                         if (vcpu->cpu != cpu)
6855                                 continue;
6856                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6857                         if (vcpu->cpu != raw_smp_processor_id())
6858                                 send_ipi = 1;
6859                 }
6860         }
6861         mutex_unlock(&kvm_lock);
6862
6863         if (freq->old < freq->new && send_ipi) {
6864                 /*
6865                  * We upscale the frequency.  Must make the guest
6866                  * doesn't see old kvmclock values while running with
6867                  * the new frequency, otherwise we risk the guest sees
6868                  * time go backwards.
6869                  *
6870                  * In case we update the frequency for another cpu
6871                  * (which might be in guest context) send an interrupt
6872                  * to kick the cpu out of guest context.  Next time
6873                  * guest context is entered kvmclock will be updated,
6874                  * so the guest will not see stale values.
6875                  */
6876                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6877         }
6878 }
6879
6880 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6881                                      void *data)
6882 {
6883         struct cpufreq_freqs *freq = data;
6884         int cpu;
6885
6886         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6887                 return 0;
6888         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6889                 return 0;
6890
6891         for_each_cpu(cpu, freq->policy->cpus)
6892                 __kvmclock_cpufreq_notifier(freq, cpu);
6893
6894         return 0;
6895 }
6896
6897 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6898         .notifier_call  = kvmclock_cpufreq_notifier
6899 };
6900
6901 static int kvmclock_cpu_online(unsigned int cpu)
6902 {
6903         tsc_khz_changed(NULL);
6904         return 0;
6905 }
6906
6907 static void kvm_timer_init(void)
6908 {
6909         max_tsc_khz = tsc_khz;
6910
6911         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6912 #ifdef CONFIG_CPU_FREQ
6913                 struct cpufreq_policy policy;
6914                 int cpu;
6915
6916                 memset(&policy, 0, sizeof(policy));
6917                 cpu = get_cpu();
6918                 cpufreq_get_policy(&policy, cpu);
6919                 if (policy.cpuinfo.max_freq)
6920                         max_tsc_khz = policy.cpuinfo.max_freq;
6921                 put_cpu();
6922 #endif
6923                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6924                                           CPUFREQ_TRANSITION_NOTIFIER);
6925         }
6926
6927         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6928                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6929 }
6930
6931 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6932 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6933
6934 int kvm_is_in_guest(void)
6935 {
6936         return __this_cpu_read(current_vcpu) != NULL;
6937 }
6938
6939 static int kvm_is_user_mode(void)
6940 {
6941         int user_mode = 3;
6942
6943         if (__this_cpu_read(current_vcpu))
6944                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6945
6946         return user_mode != 0;
6947 }
6948
6949 static unsigned long kvm_get_guest_ip(void)
6950 {
6951         unsigned long ip = 0;
6952
6953         if (__this_cpu_read(current_vcpu))
6954                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6955
6956         return ip;
6957 }
6958
6959 static void kvm_handle_intel_pt_intr(void)
6960 {
6961         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
6962
6963         kvm_make_request(KVM_REQ_PMI, vcpu);
6964         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
6965                         (unsigned long *)&vcpu->arch.pmu.global_status);
6966 }
6967
6968 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6969         .is_in_guest            = kvm_is_in_guest,
6970         .is_user_mode           = kvm_is_user_mode,
6971         .get_guest_ip           = kvm_get_guest_ip,
6972         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
6973 };
6974
6975 #ifdef CONFIG_X86_64
6976 static void pvclock_gtod_update_fn(struct work_struct *work)
6977 {
6978         struct kvm *kvm;
6979
6980         struct kvm_vcpu *vcpu;
6981         int i;
6982
6983         mutex_lock(&kvm_lock);
6984         list_for_each_entry(kvm, &vm_list, vm_list)
6985                 kvm_for_each_vcpu(i, vcpu, kvm)
6986                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6987         atomic_set(&kvm_guest_has_master_clock, 0);
6988         mutex_unlock(&kvm_lock);
6989 }
6990
6991 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6992
6993 /*
6994  * Notification about pvclock gtod data update.
6995  */
6996 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6997                                void *priv)
6998 {
6999         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7000         struct timekeeper *tk = priv;
7001
7002         update_pvclock_gtod(tk);
7003
7004         /* disable master clock if host does not trust, or does not
7005          * use, TSC based clocksource.
7006          */
7007         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7008             atomic_read(&kvm_guest_has_master_clock) != 0)
7009                 queue_work(system_long_wq, &pvclock_gtod_work);
7010
7011         return 0;
7012 }
7013
7014 static struct notifier_block pvclock_gtod_notifier = {
7015         .notifier_call = pvclock_gtod_notify,
7016 };
7017 #endif
7018
7019 int kvm_arch_init(void *opaque)
7020 {
7021         int r;
7022         struct kvm_x86_ops *ops = opaque;
7023
7024         if (kvm_x86_ops) {
7025                 printk(KERN_ERR "kvm: already loaded the other module\n");
7026                 r = -EEXIST;
7027                 goto out;
7028         }
7029
7030         if (!ops->cpu_has_kvm_support()) {
7031                 printk(KERN_ERR "kvm: no hardware support\n");
7032                 r = -EOPNOTSUPP;
7033                 goto out;
7034         }
7035         if (ops->disabled_by_bios()) {
7036                 printk(KERN_ERR "kvm: disabled by bios\n");
7037                 r = -EOPNOTSUPP;
7038                 goto out;
7039         }
7040
7041         /*
7042          * KVM explicitly assumes that the guest has an FPU and
7043          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7044          * vCPU's FPU state as a fxregs_state struct.
7045          */
7046         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7047                 printk(KERN_ERR "kvm: inadequate fpu\n");
7048                 r = -EOPNOTSUPP;
7049                 goto out;
7050         }
7051
7052         r = -ENOMEM;
7053         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7054                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7055                                           NULL);
7056         if (!x86_fpu_cache) {
7057                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7058                 goto out;
7059         }
7060
7061         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7062         if (!shared_msrs) {
7063                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7064                 goto out_free_x86_fpu_cache;
7065         }
7066
7067         r = kvm_mmu_module_init();
7068         if (r)
7069                 goto out_free_percpu;
7070
7071         kvm_x86_ops = ops;
7072
7073         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7074                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7075                         PT_PRESENT_MASK, 0, sme_me_mask);
7076         kvm_timer_init();
7077
7078         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7079
7080         if (boot_cpu_has(X86_FEATURE_XSAVE))
7081                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7082
7083         kvm_lapic_init();
7084         if (pi_inject_timer == -1)
7085                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7086 #ifdef CONFIG_X86_64
7087         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7088
7089         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7090                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7091 #endif
7092
7093         return 0;
7094
7095 out_free_percpu:
7096         free_percpu(shared_msrs);
7097 out_free_x86_fpu_cache:
7098         kmem_cache_destroy(x86_fpu_cache);
7099 out:
7100         return r;
7101 }
7102
7103 void kvm_arch_exit(void)
7104 {
7105 #ifdef CONFIG_X86_64
7106         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7107                 clear_hv_tscchange_cb();
7108 #endif
7109         kvm_lapic_exit();
7110         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7111
7112         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7113                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7114                                             CPUFREQ_TRANSITION_NOTIFIER);
7115         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7116 #ifdef CONFIG_X86_64
7117         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7118 #endif
7119         kvm_x86_ops = NULL;
7120         kvm_mmu_module_exit();
7121         free_percpu(shared_msrs);
7122         kmem_cache_destroy(x86_fpu_cache);
7123 }
7124
7125 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7126 {
7127         ++vcpu->stat.halt_exits;
7128         if (lapic_in_kernel(vcpu)) {
7129                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7130                 return 1;
7131         } else {
7132                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7133                 return 0;
7134         }
7135 }
7136 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7137
7138 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7139 {
7140         int ret = kvm_skip_emulated_instruction(vcpu);
7141         /*
7142          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7143          * KVM_EXIT_DEBUG here.
7144          */
7145         return kvm_vcpu_halt(vcpu) && ret;
7146 }
7147 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7148
7149 #ifdef CONFIG_X86_64
7150 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7151                                 unsigned long clock_type)
7152 {
7153         struct kvm_clock_pairing clock_pairing;
7154         struct timespec64 ts;
7155         u64 cycle;
7156         int ret;
7157
7158         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7159                 return -KVM_EOPNOTSUPP;
7160
7161         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7162                 return -KVM_EOPNOTSUPP;
7163
7164         clock_pairing.sec = ts.tv_sec;
7165         clock_pairing.nsec = ts.tv_nsec;
7166         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7167         clock_pairing.flags = 0;
7168         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7169
7170         ret = 0;
7171         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7172                             sizeof(struct kvm_clock_pairing)))
7173                 ret = -KVM_EFAULT;
7174
7175         return ret;
7176 }
7177 #endif
7178
7179 /*
7180  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7181  *
7182  * @apicid - apicid of vcpu to be kicked.
7183  */
7184 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7185 {
7186         struct kvm_lapic_irq lapic_irq;
7187
7188         lapic_irq.shorthand = 0;
7189         lapic_irq.dest_mode = 0;
7190         lapic_irq.level = 0;
7191         lapic_irq.dest_id = apicid;
7192         lapic_irq.msi_redir_hint = false;
7193
7194         lapic_irq.delivery_mode = APIC_DM_REMRD;
7195         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7196 }
7197
7198 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7199 {
7200         if (!lapic_in_kernel(vcpu)) {
7201                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7202                 return;
7203         }
7204         if (!vcpu->arch.apicv_active)
7205                 return;
7206
7207         vcpu->arch.apicv_active = false;
7208         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7209 }
7210
7211 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7212 {
7213         struct kvm_vcpu *target = NULL;
7214         struct kvm_apic_map *map;
7215
7216         rcu_read_lock();
7217         map = rcu_dereference(kvm->arch.apic_map);
7218
7219         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7220                 target = map->phys_map[dest_id]->vcpu;
7221
7222         rcu_read_unlock();
7223
7224         if (target && READ_ONCE(target->ready))
7225                 kvm_vcpu_yield_to(target);
7226 }
7227
7228 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7229 {
7230         unsigned long nr, a0, a1, a2, a3, ret;
7231         int op_64_bit;
7232
7233         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7234                 return kvm_hv_hypercall(vcpu);
7235
7236         nr = kvm_rax_read(vcpu);
7237         a0 = kvm_rbx_read(vcpu);
7238         a1 = kvm_rcx_read(vcpu);
7239         a2 = kvm_rdx_read(vcpu);
7240         a3 = kvm_rsi_read(vcpu);
7241
7242         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7243
7244         op_64_bit = is_64_bit_mode(vcpu);
7245         if (!op_64_bit) {
7246                 nr &= 0xFFFFFFFF;
7247                 a0 &= 0xFFFFFFFF;
7248                 a1 &= 0xFFFFFFFF;
7249                 a2 &= 0xFFFFFFFF;
7250                 a3 &= 0xFFFFFFFF;
7251         }
7252
7253         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7254                 ret = -KVM_EPERM;
7255                 goto out;
7256         }
7257
7258         switch (nr) {
7259         case KVM_HC_VAPIC_POLL_IRQ:
7260                 ret = 0;
7261                 break;
7262         case KVM_HC_KICK_CPU:
7263                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7264                 kvm_sched_yield(vcpu->kvm, a1);
7265                 ret = 0;
7266                 break;
7267 #ifdef CONFIG_X86_64
7268         case KVM_HC_CLOCK_PAIRING:
7269                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7270                 break;
7271 #endif
7272         case KVM_HC_SEND_IPI:
7273                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7274                 break;
7275         case KVM_HC_SCHED_YIELD:
7276                 kvm_sched_yield(vcpu->kvm, a0);
7277                 ret = 0;
7278                 break;
7279         default:
7280                 ret = -KVM_ENOSYS;
7281                 break;
7282         }
7283 out:
7284         if (!op_64_bit)
7285                 ret = (u32)ret;
7286         kvm_rax_write(vcpu, ret);
7287
7288         ++vcpu->stat.hypercalls;
7289         return kvm_skip_emulated_instruction(vcpu);
7290 }
7291 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7292
7293 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7294 {
7295         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7296         char instruction[3];
7297         unsigned long rip = kvm_rip_read(vcpu);
7298
7299         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7300
7301         return emulator_write_emulated(ctxt, rip, instruction, 3,
7302                 &ctxt->exception);
7303 }
7304
7305 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7306 {
7307         return vcpu->run->request_interrupt_window &&
7308                 likely(!pic_in_kernel(vcpu->kvm));
7309 }
7310
7311 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7312 {
7313         struct kvm_run *kvm_run = vcpu->run;
7314
7315         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7316         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7317         kvm_run->cr8 = kvm_get_cr8(vcpu);
7318         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7319         kvm_run->ready_for_interrupt_injection =
7320                 pic_in_kernel(vcpu->kvm) ||
7321                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7322 }
7323
7324 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7325 {
7326         int max_irr, tpr;
7327
7328         if (!kvm_x86_ops->update_cr8_intercept)
7329                 return;
7330
7331         if (!lapic_in_kernel(vcpu))
7332                 return;
7333
7334         if (vcpu->arch.apicv_active)
7335                 return;
7336
7337         if (!vcpu->arch.apic->vapic_addr)
7338                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7339         else
7340                 max_irr = -1;
7341
7342         if (max_irr != -1)
7343                 max_irr >>= 4;
7344
7345         tpr = kvm_lapic_get_cr8(vcpu);
7346
7347         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7348 }
7349
7350 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7351 {
7352         int r;
7353
7354         /* try to reinject previous events if any */
7355
7356         if (vcpu->arch.exception.injected)
7357                 kvm_x86_ops->queue_exception(vcpu);
7358         /*
7359          * Do not inject an NMI or interrupt if there is a pending
7360          * exception.  Exceptions and interrupts are recognized at
7361          * instruction boundaries, i.e. the start of an instruction.
7362          * Trap-like exceptions, e.g. #DB, have higher priority than
7363          * NMIs and interrupts, i.e. traps are recognized before an
7364          * NMI/interrupt that's pending on the same instruction.
7365          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7366          * priority, but are only generated (pended) during instruction
7367          * execution, i.e. a pending fault-like exception means the
7368          * fault occurred on the *previous* instruction and must be
7369          * serviced prior to recognizing any new events in order to
7370          * fully complete the previous instruction.
7371          */
7372         else if (!vcpu->arch.exception.pending) {
7373                 if (vcpu->arch.nmi_injected)
7374                         kvm_x86_ops->set_nmi(vcpu);
7375                 else if (vcpu->arch.interrupt.injected)
7376                         kvm_x86_ops->set_irq(vcpu);
7377         }
7378
7379         /*
7380          * Call check_nested_events() even if we reinjected a previous event
7381          * in order for caller to determine if it should require immediate-exit
7382          * from L2 to L1 due to pending L1 events which require exit
7383          * from L2 to L1.
7384          */
7385         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7386                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7387                 if (r != 0)
7388                         return r;
7389         }
7390
7391         /* try to inject new event if pending */
7392         if (vcpu->arch.exception.pending) {
7393                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7394                                         vcpu->arch.exception.has_error_code,
7395                                         vcpu->arch.exception.error_code);
7396
7397                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7398                 vcpu->arch.exception.pending = false;
7399                 vcpu->arch.exception.injected = true;
7400
7401                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7402                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7403                                              X86_EFLAGS_RF);
7404
7405                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7406                         /*
7407                          * This code assumes that nSVM doesn't use
7408                          * check_nested_events(). If it does, the
7409                          * DR6/DR7 changes should happen before L1
7410                          * gets a #VMEXIT for an intercepted #DB in
7411                          * L2.  (Under VMX, on the other hand, the
7412                          * DR6/DR7 changes should not happen in the
7413                          * event of a VM-exit to L1 for an intercepted
7414                          * #DB in L2.)
7415                          */
7416                         kvm_deliver_exception_payload(vcpu);
7417                         if (vcpu->arch.dr7 & DR7_GD) {
7418                                 vcpu->arch.dr7 &= ~DR7_GD;
7419                                 kvm_update_dr7(vcpu);
7420                         }
7421                 }
7422
7423                 kvm_x86_ops->queue_exception(vcpu);
7424         }
7425
7426         /* Don't consider new event if we re-injected an event */
7427         if (kvm_event_needs_reinjection(vcpu))
7428                 return 0;
7429
7430         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7431             kvm_x86_ops->smi_allowed(vcpu)) {
7432                 vcpu->arch.smi_pending = false;
7433                 ++vcpu->arch.smi_count;
7434                 enter_smm(vcpu);
7435         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7436                 --vcpu->arch.nmi_pending;
7437                 vcpu->arch.nmi_injected = true;
7438                 kvm_x86_ops->set_nmi(vcpu);
7439         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7440                 /*
7441                  * Because interrupts can be injected asynchronously, we are
7442                  * calling check_nested_events again here to avoid a race condition.
7443                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7444                  * proposal and current concerns.  Perhaps we should be setting
7445                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7446                  */
7447                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7448                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7449                         if (r != 0)
7450                                 return r;
7451                 }
7452                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7453                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7454                                             false);
7455                         kvm_x86_ops->set_irq(vcpu);
7456                 }
7457         }
7458
7459         return 0;
7460 }
7461
7462 static void process_nmi(struct kvm_vcpu *vcpu)
7463 {
7464         unsigned limit = 2;
7465
7466         /*
7467          * x86 is limited to one NMI running, and one NMI pending after it.
7468          * If an NMI is already in progress, limit further NMIs to just one.
7469          * Otherwise, allow two (and we'll inject the first one immediately).
7470          */
7471         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7472                 limit = 1;
7473
7474         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7475         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7476         kvm_make_request(KVM_REQ_EVENT, vcpu);
7477 }
7478
7479 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7480 {
7481         u32 flags = 0;
7482         flags |= seg->g       << 23;
7483         flags |= seg->db      << 22;
7484         flags |= seg->l       << 21;
7485         flags |= seg->avl     << 20;
7486         flags |= seg->present << 15;
7487         flags |= seg->dpl     << 13;
7488         flags |= seg->s       << 12;
7489         flags |= seg->type    << 8;
7490         return flags;
7491 }
7492
7493 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7494 {
7495         struct kvm_segment seg;
7496         int offset;
7497
7498         kvm_get_segment(vcpu, &seg, n);
7499         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7500
7501         if (n < 3)
7502                 offset = 0x7f84 + n * 12;
7503         else
7504                 offset = 0x7f2c + (n - 3) * 12;
7505
7506         put_smstate(u32, buf, offset + 8, seg.base);
7507         put_smstate(u32, buf, offset + 4, seg.limit);
7508         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7509 }
7510
7511 #ifdef CONFIG_X86_64
7512 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7513 {
7514         struct kvm_segment seg;
7515         int offset;
7516         u16 flags;
7517
7518         kvm_get_segment(vcpu, &seg, n);
7519         offset = 0x7e00 + n * 16;
7520
7521         flags = enter_smm_get_segment_flags(&seg) >> 8;
7522         put_smstate(u16, buf, offset, seg.selector);
7523         put_smstate(u16, buf, offset + 2, flags);
7524         put_smstate(u32, buf, offset + 4, seg.limit);
7525         put_smstate(u64, buf, offset + 8, seg.base);
7526 }
7527 #endif
7528
7529 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7530 {
7531         struct desc_ptr dt;
7532         struct kvm_segment seg;
7533         unsigned long val;
7534         int i;
7535
7536         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7537         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7538         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7539         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7540
7541         for (i = 0; i < 8; i++)
7542                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7543
7544         kvm_get_dr(vcpu, 6, &val);
7545         put_smstate(u32, buf, 0x7fcc, (u32)val);
7546         kvm_get_dr(vcpu, 7, &val);
7547         put_smstate(u32, buf, 0x7fc8, (u32)val);
7548
7549         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7550         put_smstate(u32, buf, 0x7fc4, seg.selector);
7551         put_smstate(u32, buf, 0x7f64, seg.base);
7552         put_smstate(u32, buf, 0x7f60, seg.limit);
7553         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7554
7555         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7556         put_smstate(u32, buf, 0x7fc0, seg.selector);
7557         put_smstate(u32, buf, 0x7f80, seg.base);
7558         put_smstate(u32, buf, 0x7f7c, seg.limit);
7559         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7560
7561         kvm_x86_ops->get_gdt(vcpu, &dt);
7562         put_smstate(u32, buf, 0x7f74, dt.address);
7563         put_smstate(u32, buf, 0x7f70, dt.size);
7564
7565         kvm_x86_ops->get_idt(vcpu, &dt);
7566         put_smstate(u32, buf, 0x7f58, dt.address);
7567         put_smstate(u32, buf, 0x7f54, dt.size);
7568
7569         for (i = 0; i < 6; i++)
7570                 enter_smm_save_seg_32(vcpu, buf, i);
7571
7572         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7573
7574         /* revision id */
7575         put_smstate(u32, buf, 0x7efc, 0x00020000);
7576         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7577 }
7578
7579 #ifdef CONFIG_X86_64
7580 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7581 {
7582         struct desc_ptr dt;
7583         struct kvm_segment seg;
7584         unsigned long val;
7585         int i;
7586
7587         for (i = 0; i < 16; i++)
7588                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7589
7590         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7591         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7592
7593         kvm_get_dr(vcpu, 6, &val);
7594         put_smstate(u64, buf, 0x7f68, val);
7595         kvm_get_dr(vcpu, 7, &val);
7596         put_smstate(u64, buf, 0x7f60, val);
7597
7598         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7599         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7600         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7601
7602         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7603
7604         /* revision id */
7605         put_smstate(u32, buf, 0x7efc, 0x00020064);
7606
7607         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7608
7609         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7610         put_smstate(u16, buf, 0x7e90, seg.selector);
7611         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7612         put_smstate(u32, buf, 0x7e94, seg.limit);
7613         put_smstate(u64, buf, 0x7e98, seg.base);
7614
7615         kvm_x86_ops->get_idt(vcpu, &dt);
7616         put_smstate(u32, buf, 0x7e84, dt.size);
7617         put_smstate(u64, buf, 0x7e88, dt.address);
7618
7619         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7620         put_smstate(u16, buf, 0x7e70, seg.selector);
7621         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7622         put_smstate(u32, buf, 0x7e74, seg.limit);
7623         put_smstate(u64, buf, 0x7e78, seg.base);
7624
7625         kvm_x86_ops->get_gdt(vcpu, &dt);
7626         put_smstate(u32, buf, 0x7e64, dt.size);
7627         put_smstate(u64, buf, 0x7e68, dt.address);
7628
7629         for (i = 0; i < 6; i++)
7630                 enter_smm_save_seg_64(vcpu, buf, i);
7631 }
7632 #endif
7633
7634 static void enter_smm(struct kvm_vcpu *vcpu)
7635 {
7636         struct kvm_segment cs, ds;
7637         struct desc_ptr dt;
7638         char buf[512];
7639         u32 cr0;
7640
7641         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7642         memset(buf, 0, 512);
7643 #ifdef CONFIG_X86_64
7644         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7645                 enter_smm_save_state_64(vcpu, buf);
7646         else
7647 #endif
7648                 enter_smm_save_state_32(vcpu, buf);
7649
7650         /*
7651          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7652          * vCPU state (e.g. leave guest mode) after we've saved the state into
7653          * the SMM state-save area.
7654          */
7655         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7656
7657         vcpu->arch.hflags |= HF_SMM_MASK;
7658         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7659
7660         if (kvm_x86_ops->get_nmi_mask(vcpu))
7661                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7662         else
7663                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7664
7665         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7666         kvm_rip_write(vcpu, 0x8000);
7667
7668         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7669         kvm_x86_ops->set_cr0(vcpu, cr0);
7670         vcpu->arch.cr0 = cr0;
7671
7672         kvm_x86_ops->set_cr4(vcpu, 0);
7673
7674         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7675         dt.address = dt.size = 0;
7676         kvm_x86_ops->set_idt(vcpu, &dt);
7677
7678         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7679
7680         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7681         cs.base = vcpu->arch.smbase;
7682
7683         ds.selector = 0;
7684         ds.base = 0;
7685
7686         cs.limit    = ds.limit = 0xffffffff;
7687         cs.type     = ds.type = 0x3;
7688         cs.dpl      = ds.dpl = 0;
7689         cs.db       = ds.db = 0;
7690         cs.s        = ds.s = 1;
7691         cs.l        = ds.l = 0;
7692         cs.g        = ds.g = 1;
7693         cs.avl      = ds.avl = 0;
7694         cs.present  = ds.present = 1;
7695         cs.unusable = ds.unusable = 0;
7696         cs.padding  = ds.padding = 0;
7697
7698         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7699         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7700         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7701         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7702         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7703         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7704
7705 #ifdef CONFIG_X86_64
7706         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7707                 kvm_x86_ops->set_efer(vcpu, 0);
7708 #endif
7709
7710         kvm_update_cpuid(vcpu);
7711         kvm_mmu_reset_context(vcpu);
7712 }
7713
7714 static void process_smi(struct kvm_vcpu *vcpu)
7715 {
7716         vcpu->arch.smi_pending = true;
7717         kvm_make_request(KVM_REQ_EVENT, vcpu);
7718 }
7719
7720 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7721 {
7722         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7723 }
7724
7725 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7726 {
7727         if (!kvm_apic_present(vcpu))
7728                 return;
7729
7730         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7731
7732         if (irqchip_split(vcpu->kvm))
7733                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7734         else {
7735                 if (vcpu->arch.apicv_active)
7736                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7737                 if (ioapic_in_kernel(vcpu->kvm))
7738                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7739         }
7740
7741         if (is_guest_mode(vcpu))
7742                 vcpu->arch.load_eoi_exitmap_pending = true;
7743         else
7744                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7745 }
7746
7747 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7748 {
7749         u64 eoi_exit_bitmap[4];
7750
7751         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7752                 return;
7753
7754         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7755                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7756         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7757 }
7758
7759 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7760                 unsigned long start, unsigned long end,
7761                 bool blockable)
7762 {
7763         unsigned long apic_address;
7764
7765         /*
7766          * The physical address of apic access page is stored in the VMCS.
7767          * Update it when it becomes invalid.
7768          */
7769         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7770         if (start <= apic_address && apic_address < end)
7771                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7772
7773         return 0;
7774 }
7775
7776 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7777 {
7778         struct page *page = NULL;
7779
7780         if (!lapic_in_kernel(vcpu))
7781                 return;
7782
7783         if (!kvm_x86_ops->set_apic_access_page_addr)
7784                 return;
7785
7786         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7787         if (is_error_page(page))
7788                 return;
7789         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7790
7791         /*
7792          * Do not pin apic access page in memory, the MMU notifier
7793          * will call us again if it is migrated or swapped out.
7794          */
7795         put_page(page);
7796 }
7797 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7798
7799 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7800 {
7801         smp_send_reschedule(vcpu->cpu);
7802 }
7803 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7804
7805 /*
7806  * Returns 1 to let vcpu_run() continue the guest execution loop without
7807  * exiting to the userspace.  Otherwise, the value will be returned to the
7808  * userspace.
7809  */
7810 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7811 {
7812         int r;
7813         bool req_int_win =
7814                 dm_request_for_irq_injection(vcpu) &&
7815                 kvm_cpu_accept_dm_intr(vcpu);
7816
7817         bool req_immediate_exit = false;
7818
7819         if (kvm_request_pending(vcpu)) {
7820                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7821                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7822                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7823                         kvm_mmu_unload(vcpu);
7824                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7825                         __kvm_migrate_timers(vcpu);
7826                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7827                         kvm_gen_update_masterclock(vcpu->kvm);
7828                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7829                         kvm_gen_kvmclock_update(vcpu);
7830                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7831                         r = kvm_guest_time_update(vcpu);
7832                         if (unlikely(r))
7833                                 goto out;
7834                 }
7835                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7836                         kvm_mmu_sync_roots(vcpu);
7837                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7838                         kvm_mmu_load_cr3(vcpu);
7839                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7840                         kvm_vcpu_flush_tlb(vcpu, true);
7841                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7842                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7843                         r = 0;
7844                         goto out;
7845                 }
7846                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7847                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7848                         vcpu->mmio_needed = 0;
7849                         r = 0;
7850                         goto out;
7851                 }
7852                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7853                         /* Page is swapped out. Do synthetic halt */
7854                         vcpu->arch.apf.halted = true;
7855                         r = 1;
7856                         goto out;
7857                 }
7858                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7859                         record_steal_time(vcpu);
7860                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7861                         process_smi(vcpu);
7862                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7863                         process_nmi(vcpu);
7864                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7865                         kvm_pmu_handle_event(vcpu);
7866                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7867                         kvm_pmu_deliver_pmi(vcpu);
7868                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7869                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7870                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7871                                      vcpu->arch.ioapic_handled_vectors)) {
7872                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7873                                 vcpu->run->eoi.vector =
7874                                                 vcpu->arch.pending_ioapic_eoi;
7875                                 r = 0;
7876                                 goto out;
7877                         }
7878                 }
7879                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7880                         vcpu_scan_ioapic(vcpu);
7881                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7882                         vcpu_load_eoi_exitmap(vcpu);
7883                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7884                         kvm_vcpu_reload_apic_access_page(vcpu);
7885                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7886                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7887                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7888                         r = 0;
7889                         goto out;
7890                 }
7891                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7892                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7893                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7894                         r = 0;
7895                         goto out;
7896                 }
7897                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7898                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7899                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7900                         r = 0;
7901                         goto out;
7902                 }
7903
7904                 /*
7905                  * KVM_REQ_HV_STIMER has to be processed after
7906                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7907                  * depend on the guest clock being up-to-date
7908                  */
7909                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7910                         kvm_hv_process_stimers(vcpu);
7911         }
7912
7913         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7914                 ++vcpu->stat.req_event;
7915                 kvm_apic_accept_events(vcpu);
7916                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7917                         r = 1;
7918                         goto out;
7919                 }
7920
7921                 if (inject_pending_event(vcpu, req_int_win) != 0)
7922                         req_immediate_exit = true;
7923                 else {
7924                         /* Enable SMI/NMI/IRQ window open exits if needed.
7925                          *
7926                          * SMIs have three cases:
7927                          * 1) They can be nested, and then there is nothing to
7928                          *    do here because RSM will cause a vmexit anyway.
7929                          * 2) There is an ISA-specific reason why SMI cannot be
7930                          *    injected, and the moment when this changes can be
7931                          *    intercepted.
7932                          * 3) Or the SMI can be pending because
7933                          *    inject_pending_event has completed the injection
7934                          *    of an IRQ or NMI from the previous vmexit, and
7935                          *    then we request an immediate exit to inject the
7936                          *    SMI.
7937                          */
7938                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7939                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7940                                         req_immediate_exit = true;
7941                         if (vcpu->arch.nmi_pending)
7942                                 kvm_x86_ops->enable_nmi_window(vcpu);
7943                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7944                                 kvm_x86_ops->enable_irq_window(vcpu);
7945                         WARN_ON(vcpu->arch.exception.pending);
7946                 }
7947
7948                 if (kvm_lapic_enabled(vcpu)) {
7949                         update_cr8_intercept(vcpu);
7950                         kvm_lapic_sync_to_vapic(vcpu);
7951                 }
7952         }
7953
7954         r = kvm_mmu_reload(vcpu);
7955         if (unlikely(r)) {
7956                 goto cancel_injection;
7957         }
7958
7959         preempt_disable();
7960
7961         kvm_x86_ops->prepare_guest_switch(vcpu);
7962
7963         /*
7964          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7965          * IPI are then delayed after guest entry, which ensures that they
7966          * result in virtual interrupt delivery.
7967          */
7968         local_irq_disable();
7969         vcpu->mode = IN_GUEST_MODE;
7970
7971         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7972
7973         /*
7974          * 1) We should set ->mode before checking ->requests.  Please see
7975          * the comment in kvm_vcpu_exiting_guest_mode().
7976          *
7977          * 2) For APICv, we should set ->mode before checking PID.ON. This
7978          * pairs with the memory barrier implicit in pi_test_and_set_on
7979          * (see vmx_deliver_posted_interrupt).
7980          *
7981          * 3) This also orders the write to mode from any reads to the page
7982          * tables done while the VCPU is running.  Please see the comment
7983          * in kvm_flush_remote_tlbs.
7984          */
7985         smp_mb__after_srcu_read_unlock();
7986
7987         /*
7988          * This handles the case where a posted interrupt was
7989          * notified with kvm_vcpu_kick.
7990          */
7991         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7992                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7993
7994         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7995             || need_resched() || signal_pending(current)) {
7996                 vcpu->mode = OUTSIDE_GUEST_MODE;
7997                 smp_wmb();
7998                 local_irq_enable();
7999                 preempt_enable();
8000                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8001                 r = 1;
8002                 goto cancel_injection;
8003         }
8004
8005         if (req_immediate_exit) {
8006                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8007                 kvm_x86_ops->request_immediate_exit(vcpu);
8008         }
8009
8010         trace_kvm_entry(vcpu->vcpu_id);
8011         guest_enter_irqoff();
8012
8013         /* The preempt notifier should have taken care of the FPU already.  */
8014         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8015
8016         if (unlikely(vcpu->arch.switch_db_regs)) {
8017                 set_debugreg(0, 7);
8018                 set_debugreg(vcpu->arch.eff_db[0], 0);
8019                 set_debugreg(vcpu->arch.eff_db[1], 1);
8020                 set_debugreg(vcpu->arch.eff_db[2], 2);
8021                 set_debugreg(vcpu->arch.eff_db[3], 3);
8022                 set_debugreg(vcpu->arch.dr6, 6);
8023                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8024         }
8025
8026         kvm_x86_ops->run(vcpu);
8027
8028         /*
8029          * Do this here before restoring debug registers on the host.  And
8030          * since we do this before handling the vmexit, a DR access vmexit
8031          * can (a) read the correct value of the debug registers, (b) set
8032          * KVM_DEBUGREG_WONT_EXIT again.
8033          */
8034         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8035                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8036                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8037                 kvm_update_dr0123(vcpu);
8038                 kvm_update_dr6(vcpu);
8039                 kvm_update_dr7(vcpu);
8040                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8041         }
8042
8043         /*
8044          * If the guest has used debug registers, at least dr7
8045          * will be disabled while returning to the host.
8046          * If we don't have active breakpoints in the host, we don't
8047          * care about the messed up debug address registers. But if
8048          * we have some of them active, restore the old state.
8049          */
8050         if (hw_breakpoint_active())
8051                 hw_breakpoint_restore();
8052
8053         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8054
8055         vcpu->mode = OUTSIDE_GUEST_MODE;
8056         smp_wmb();
8057
8058         kvm_x86_ops->handle_exit_irqoff(vcpu);
8059
8060         /*
8061          * Consume any pending interrupts, including the possible source of
8062          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8063          * An instruction is required after local_irq_enable() to fully unblock
8064          * interrupts on processors that implement an interrupt shadow, the
8065          * stat.exits increment will do nicely.
8066          */
8067         kvm_before_interrupt(vcpu);
8068         local_irq_enable();
8069         ++vcpu->stat.exits;
8070         local_irq_disable();
8071         kvm_after_interrupt(vcpu);
8072
8073         guest_exit_irqoff();
8074         if (lapic_in_kernel(vcpu)) {
8075                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8076                 if (delta != S64_MIN) {
8077                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8078                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8079                 }
8080         }
8081
8082         local_irq_enable();
8083         preempt_enable();
8084
8085         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8086
8087         /*
8088          * Profile KVM exit RIPs:
8089          */
8090         if (unlikely(prof_on == KVM_PROFILING)) {
8091                 unsigned long rip = kvm_rip_read(vcpu);
8092                 profile_hit(KVM_PROFILING, (void *)rip);
8093         }
8094
8095         if (unlikely(vcpu->arch.tsc_always_catchup))
8096                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8097
8098         if (vcpu->arch.apic_attention)
8099                 kvm_lapic_sync_from_vapic(vcpu);
8100
8101         vcpu->arch.gpa_available = false;
8102         r = kvm_x86_ops->handle_exit(vcpu);
8103         return r;
8104
8105 cancel_injection:
8106         kvm_x86_ops->cancel_injection(vcpu);
8107         if (unlikely(vcpu->arch.apic_attention))
8108                 kvm_lapic_sync_from_vapic(vcpu);
8109 out:
8110         return r;
8111 }
8112
8113 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8114 {
8115         if (!kvm_arch_vcpu_runnable(vcpu) &&
8116             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8117                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8118                 kvm_vcpu_block(vcpu);
8119                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8120
8121                 if (kvm_x86_ops->post_block)
8122                         kvm_x86_ops->post_block(vcpu);
8123
8124                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8125                         return 1;
8126         }
8127
8128         kvm_apic_accept_events(vcpu);
8129         switch(vcpu->arch.mp_state) {
8130         case KVM_MP_STATE_HALTED:
8131                 vcpu->arch.pv.pv_unhalted = false;
8132                 vcpu->arch.mp_state =
8133                         KVM_MP_STATE_RUNNABLE;
8134                 /* fall through */
8135         case KVM_MP_STATE_RUNNABLE:
8136                 vcpu->arch.apf.halted = false;
8137                 break;
8138         case KVM_MP_STATE_INIT_RECEIVED:
8139                 break;
8140         default:
8141                 return -EINTR;
8142                 break;
8143         }
8144         return 1;
8145 }
8146
8147 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8148 {
8149         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8150                 kvm_x86_ops->check_nested_events(vcpu, false);
8151
8152         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8153                 !vcpu->arch.apf.halted);
8154 }
8155
8156 static int vcpu_run(struct kvm_vcpu *vcpu)
8157 {
8158         int r;
8159         struct kvm *kvm = vcpu->kvm;
8160
8161         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8162         vcpu->arch.l1tf_flush_l1d = true;
8163
8164         for (;;) {
8165                 if (kvm_vcpu_running(vcpu)) {
8166                         r = vcpu_enter_guest(vcpu);
8167                 } else {
8168                         r = vcpu_block(kvm, vcpu);
8169                 }
8170
8171                 if (r <= 0)
8172                         break;
8173
8174                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8175                 if (kvm_cpu_has_pending_timer(vcpu))
8176                         kvm_inject_pending_timer_irqs(vcpu);
8177
8178                 if (dm_request_for_irq_injection(vcpu) &&
8179                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8180                         r = 0;
8181                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8182                         ++vcpu->stat.request_irq_exits;
8183                         break;
8184                 }
8185
8186                 kvm_check_async_pf_completion(vcpu);
8187
8188                 if (signal_pending(current)) {
8189                         r = -EINTR;
8190                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8191                         ++vcpu->stat.signal_exits;
8192                         break;
8193                 }
8194                 if (need_resched()) {
8195                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8196                         cond_resched();
8197                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8198                 }
8199         }
8200
8201         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8202
8203         return r;
8204 }
8205
8206 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8207 {
8208         int r;
8209         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8210         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8211         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8212         if (r != EMULATE_DONE)
8213                 return 0;
8214         return 1;
8215 }
8216
8217 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8218 {
8219         BUG_ON(!vcpu->arch.pio.count);
8220
8221         return complete_emulated_io(vcpu);
8222 }
8223
8224 /*
8225  * Implements the following, as a state machine:
8226  *
8227  * read:
8228  *   for each fragment
8229  *     for each mmio piece in the fragment
8230  *       write gpa, len
8231  *       exit
8232  *       copy data
8233  *   execute insn
8234  *
8235  * write:
8236  *   for each fragment
8237  *     for each mmio piece in the fragment
8238  *       write gpa, len
8239  *       copy data
8240  *       exit
8241  */
8242 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8243 {
8244         struct kvm_run *run = vcpu->run;
8245         struct kvm_mmio_fragment *frag;
8246         unsigned len;
8247
8248         BUG_ON(!vcpu->mmio_needed);
8249
8250         /* Complete previous fragment */
8251         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8252         len = min(8u, frag->len);
8253         if (!vcpu->mmio_is_write)
8254                 memcpy(frag->data, run->mmio.data, len);
8255
8256         if (frag->len <= 8) {
8257                 /* Switch to the next fragment. */
8258                 frag++;
8259                 vcpu->mmio_cur_fragment++;
8260         } else {
8261                 /* Go forward to the next mmio piece. */
8262                 frag->data += len;
8263                 frag->gpa += len;
8264                 frag->len -= len;
8265         }
8266
8267         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8268                 vcpu->mmio_needed = 0;
8269
8270                 /* FIXME: return into emulator if single-stepping.  */
8271                 if (vcpu->mmio_is_write)
8272                         return 1;
8273                 vcpu->mmio_read_completed = 1;
8274                 return complete_emulated_io(vcpu);
8275         }
8276
8277         run->exit_reason = KVM_EXIT_MMIO;
8278         run->mmio.phys_addr = frag->gpa;
8279         if (vcpu->mmio_is_write)
8280                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8281         run->mmio.len = min(8u, frag->len);
8282         run->mmio.is_write = vcpu->mmio_is_write;
8283         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8284         return 0;
8285 }
8286
8287 /* Swap (qemu) user FPU context for the guest FPU context. */
8288 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8289 {
8290         fpregs_lock();
8291
8292         copy_fpregs_to_fpstate(vcpu->arch.user_fpu);
8293         /* PKRU is separately restored in kvm_x86_ops->run.  */
8294         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8295                                 ~XFEATURE_MASK_PKRU);
8296
8297         fpregs_mark_activate();
8298         fpregs_unlock();
8299
8300         trace_kvm_fpu(1);
8301 }
8302
8303 /* When vcpu_run ends, restore user space FPU context. */
8304 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8305 {
8306         fpregs_lock();
8307
8308         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8309         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8310
8311         fpregs_mark_activate();
8312         fpregs_unlock();
8313
8314         ++vcpu->stat.fpu_reload;
8315         trace_kvm_fpu(0);
8316 }
8317
8318 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8319 {
8320         int r;
8321
8322         vcpu_load(vcpu);
8323         kvm_sigset_activate(vcpu);
8324         kvm_load_guest_fpu(vcpu);
8325
8326         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8327                 if (kvm_run->immediate_exit) {
8328                         r = -EINTR;
8329                         goto out;
8330                 }
8331                 kvm_vcpu_block(vcpu);
8332                 kvm_apic_accept_events(vcpu);
8333                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8334                 r = -EAGAIN;
8335                 if (signal_pending(current)) {
8336                         r = -EINTR;
8337                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8338                         ++vcpu->stat.signal_exits;
8339                 }
8340                 goto out;
8341         }
8342
8343         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8344                 r = -EINVAL;
8345                 goto out;
8346         }
8347
8348         if (vcpu->run->kvm_dirty_regs) {
8349                 r = sync_regs(vcpu);
8350                 if (r != 0)
8351                         goto out;
8352         }
8353
8354         /* re-sync apic's tpr */
8355         if (!lapic_in_kernel(vcpu)) {
8356                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8357                         r = -EINVAL;
8358                         goto out;
8359                 }
8360         }
8361
8362         if (unlikely(vcpu->arch.complete_userspace_io)) {
8363                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8364                 vcpu->arch.complete_userspace_io = NULL;
8365                 r = cui(vcpu);
8366                 if (r <= 0)
8367                         goto out;
8368         } else
8369                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8370
8371         if (kvm_run->immediate_exit)
8372                 r = -EINTR;
8373         else
8374                 r = vcpu_run(vcpu);
8375
8376 out:
8377         kvm_put_guest_fpu(vcpu);
8378         if (vcpu->run->kvm_valid_regs)
8379                 store_regs(vcpu);
8380         post_kvm_run_save(vcpu);
8381         kvm_sigset_deactivate(vcpu);
8382
8383         vcpu_put(vcpu);
8384         return r;
8385 }
8386
8387 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8388 {
8389         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8390                 /*
8391                  * We are here if userspace calls get_regs() in the middle of
8392                  * instruction emulation. Registers state needs to be copied
8393                  * back from emulation context to vcpu. Userspace shouldn't do
8394                  * that usually, but some bad designed PV devices (vmware
8395                  * backdoor interface) need this to work
8396                  */
8397                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8398                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8399         }
8400         regs->rax = kvm_rax_read(vcpu);
8401         regs->rbx = kvm_rbx_read(vcpu);
8402         regs->rcx = kvm_rcx_read(vcpu);
8403         regs->rdx = kvm_rdx_read(vcpu);
8404         regs->rsi = kvm_rsi_read(vcpu);
8405         regs->rdi = kvm_rdi_read(vcpu);
8406         regs->rsp = kvm_rsp_read(vcpu);
8407         regs->rbp = kvm_rbp_read(vcpu);
8408 #ifdef CONFIG_X86_64
8409         regs->r8 = kvm_r8_read(vcpu);
8410         regs->r9 = kvm_r9_read(vcpu);
8411         regs->r10 = kvm_r10_read(vcpu);
8412         regs->r11 = kvm_r11_read(vcpu);
8413         regs->r12 = kvm_r12_read(vcpu);
8414         regs->r13 = kvm_r13_read(vcpu);
8415         regs->r14 = kvm_r14_read(vcpu);
8416         regs->r15 = kvm_r15_read(vcpu);
8417 #endif
8418
8419         regs->rip = kvm_rip_read(vcpu);
8420         regs->rflags = kvm_get_rflags(vcpu);
8421 }
8422
8423 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8424 {
8425         vcpu_load(vcpu);
8426         __get_regs(vcpu, regs);
8427         vcpu_put(vcpu);
8428         return 0;
8429 }
8430
8431 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8432 {
8433         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8434         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8435
8436         kvm_rax_write(vcpu, regs->rax);
8437         kvm_rbx_write(vcpu, regs->rbx);
8438         kvm_rcx_write(vcpu, regs->rcx);
8439         kvm_rdx_write(vcpu, regs->rdx);
8440         kvm_rsi_write(vcpu, regs->rsi);
8441         kvm_rdi_write(vcpu, regs->rdi);
8442         kvm_rsp_write(vcpu, regs->rsp);
8443         kvm_rbp_write(vcpu, regs->rbp);
8444 #ifdef CONFIG_X86_64
8445         kvm_r8_write(vcpu, regs->r8);
8446         kvm_r9_write(vcpu, regs->r9);
8447         kvm_r10_write(vcpu, regs->r10);
8448         kvm_r11_write(vcpu, regs->r11);
8449         kvm_r12_write(vcpu, regs->r12);
8450         kvm_r13_write(vcpu, regs->r13);
8451         kvm_r14_write(vcpu, regs->r14);
8452         kvm_r15_write(vcpu, regs->r15);
8453 #endif
8454
8455         kvm_rip_write(vcpu, regs->rip);
8456         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8457
8458         vcpu->arch.exception.pending = false;
8459
8460         kvm_make_request(KVM_REQ_EVENT, vcpu);
8461 }
8462
8463 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8464 {
8465         vcpu_load(vcpu);
8466         __set_regs(vcpu, regs);
8467         vcpu_put(vcpu);
8468         return 0;
8469 }
8470
8471 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8472 {
8473         struct kvm_segment cs;
8474
8475         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8476         *db = cs.db;
8477         *l = cs.l;
8478 }
8479 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8480
8481 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8482 {
8483         struct desc_ptr dt;
8484
8485         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8486         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8487         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8488         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8489         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8490         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8491
8492         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8493         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8494
8495         kvm_x86_ops->get_idt(vcpu, &dt);
8496         sregs->idt.limit = dt.size;
8497         sregs->idt.base = dt.address;
8498         kvm_x86_ops->get_gdt(vcpu, &dt);
8499         sregs->gdt.limit = dt.size;
8500         sregs->gdt.base = dt.address;
8501
8502         sregs->cr0 = kvm_read_cr0(vcpu);
8503         sregs->cr2 = vcpu->arch.cr2;
8504         sregs->cr3 = kvm_read_cr3(vcpu);
8505         sregs->cr4 = kvm_read_cr4(vcpu);
8506         sregs->cr8 = kvm_get_cr8(vcpu);
8507         sregs->efer = vcpu->arch.efer;
8508         sregs->apic_base = kvm_get_apic_base(vcpu);
8509
8510         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8511
8512         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8513                 set_bit(vcpu->arch.interrupt.nr,
8514                         (unsigned long *)sregs->interrupt_bitmap);
8515 }
8516
8517 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8518                                   struct kvm_sregs *sregs)
8519 {
8520         vcpu_load(vcpu);
8521         __get_sregs(vcpu, sregs);
8522         vcpu_put(vcpu);
8523         return 0;
8524 }
8525
8526 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8527                                     struct kvm_mp_state *mp_state)
8528 {
8529         vcpu_load(vcpu);
8530
8531         kvm_apic_accept_events(vcpu);
8532         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8533                                         vcpu->arch.pv.pv_unhalted)
8534                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8535         else
8536                 mp_state->mp_state = vcpu->arch.mp_state;
8537
8538         vcpu_put(vcpu);
8539         return 0;
8540 }
8541
8542 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8543                                     struct kvm_mp_state *mp_state)
8544 {
8545         int ret = -EINVAL;
8546
8547         vcpu_load(vcpu);
8548
8549         if (!lapic_in_kernel(vcpu) &&
8550             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8551                 goto out;
8552
8553         /* INITs are latched while in SMM */
8554         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8555             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8556              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8557                 goto out;
8558
8559         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8560                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8561                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8562         } else
8563                 vcpu->arch.mp_state = mp_state->mp_state;
8564         kvm_make_request(KVM_REQ_EVENT, vcpu);
8565
8566         ret = 0;
8567 out:
8568         vcpu_put(vcpu);
8569         return ret;
8570 }
8571
8572 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8573                     int reason, bool has_error_code, u32 error_code)
8574 {
8575         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8576         int ret;
8577
8578         init_emulate_ctxt(vcpu);
8579
8580         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8581                                    has_error_code, error_code);
8582
8583         if (ret)
8584                 return EMULATE_FAIL;
8585
8586         kvm_rip_write(vcpu, ctxt->eip);
8587         kvm_set_rflags(vcpu, ctxt->eflags);
8588         kvm_make_request(KVM_REQ_EVENT, vcpu);
8589         return EMULATE_DONE;
8590 }
8591 EXPORT_SYMBOL_GPL(kvm_task_switch);
8592
8593 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8594 {
8595         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8596                         (sregs->cr4 & X86_CR4_OSXSAVE))
8597                 return  -EINVAL;
8598
8599         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8600                 /*
8601                  * When EFER.LME and CR0.PG are set, the processor is in
8602                  * 64-bit mode (though maybe in a 32-bit code segment).
8603                  * CR4.PAE and EFER.LMA must be set.
8604                  */
8605                 if (!(sregs->cr4 & X86_CR4_PAE)
8606                     || !(sregs->efer & EFER_LMA))
8607                         return -EINVAL;
8608         } else {
8609                 /*
8610                  * Not in 64-bit mode: EFER.LMA is clear and the code
8611                  * segment cannot be 64-bit.
8612                  */
8613                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8614                         return -EINVAL;
8615         }
8616
8617         return 0;
8618 }
8619
8620 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8621 {
8622         struct msr_data apic_base_msr;
8623         int mmu_reset_needed = 0;
8624         int cpuid_update_needed = 0;
8625         int pending_vec, max_bits, idx;
8626         struct desc_ptr dt;
8627         int ret = -EINVAL;
8628
8629         if (kvm_valid_sregs(vcpu, sregs))
8630                 goto out;
8631
8632         apic_base_msr.data = sregs->apic_base;
8633         apic_base_msr.host_initiated = true;
8634         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8635                 goto out;
8636
8637         dt.size = sregs->idt.limit;
8638         dt.address = sregs->idt.base;
8639         kvm_x86_ops->set_idt(vcpu, &dt);
8640         dt.size = sregs->gdt.limit;
8641         dt.address = sregs->gdt.base;
8642         kvm_x86_ops->set_gdt(vcpu, &dt);
8643
8644         vcpu->arch.cr2 = sregs->cr2;
8645         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8646         vcpu->arch.cr3 = sregs->cr3;
8647         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8648
8649         kvm_set_cr8(vcpu, sregs->cr8);
8650
8651         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8652         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8653
8654         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8655         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8656         vcpu->arch.cr0 = sregs->cr0;
8657
8658         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8659         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8660                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8661         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8662         if (cpuid_update_needed)
8663                 kvm_update_cpuid(vcpu);
8664
8665         idx = srcu_read_lock(&vcpu->kvm->srcu);
8666         if (is_pae_paging(vcpu)) {
8667                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8668                 mmu_reset_needed = 1;
8669         }
8670         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8671
8672         if (mmu_reset_needed)
8673                 kvm_mmu_reset_context(vcpu);
8674
8675         max_bits = KVM_NR_INTERRUPTS;
8676         pending_vec = find_first_bit(
8677                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8678         if (pending_vec < max_bits) {
8679                 kvm_queue_interrupt(vcpu, pending_vec, false);
8680                 pr_debug("Set back pending irq %d\n", pending_vec);
8681         }
8682
8683         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8684         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8685         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8686         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8687         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8688         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8689
8690         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8691         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8692
8693         update_cr8_intercept(vcpu);
8694
8695         /* Older userspace won't unhalt the vcpu on reset. */
8696         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8697             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8698             !is_protmode(vcpu))
8699                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8700
8701         kvm_make_request(KVM_REQ_EVENT, vcpu);
8702
8703         ret = 0;
8704 out:
8705         return ret;
8706 }
8707
8708 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8709                                   struct kvm_sregs *sregs)
8710 {
8711         int ret;
8712
8713         vcpu_load(vcpu);
8714         ret = __set_sregs(vcpu, sregs);
8715         vcpu_put(vcpu);
8716         return ret;
8717 }
8718
8719 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8720                                         struct kvm_guest_debug *dbg)
8721 {
8722         unsigned long rflags;
8723         int i, r;
8724
8725         vcpu_load(vcpu);
8726
8727         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8728                 r = -EBUSY;
8729                 if (vcpu->arch.exception.pending)
8730                         goto out;
8731                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8732                         kvm_queue_exception(vcpu, DB_VECTOR);
8733                 else
8734                         kvm_queue_exception(vcpu, BP_VECTOR);
8735         }
8736
8737         /*
8738          * Read rflags as long as potentially injected trace flags are still
8739          * filtered out.
8740          */
8741         rflags = kvm_get_rflags(vcpu);
8742
8743         vcpu->guest_debug = dbg->control;
8744         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8745                 vcpu->guest_debug = 0;
8746
8747         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8748                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8749                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8750                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8751         } else {
8752                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8753                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8754         }
8755         kvm_update_dr7(vcpu);
8756
8757         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8758                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8759                         get_segment_base(vcpu, VCPU_SREG_CS);
8760
8761         /*
8762          * Trigger an rflags update that will inject or remove the trace
8763          * flags.
8764          */
8765         kvm_set_rflags(vcpu, rflags);
8766
8767         kvm_x86_ops->update_bp_intercept(vcpu);
8768
8769         r = 0;
8770
8771 out:
8772         vcpu_put(vcpu);
8773         return r;
8774 }
8775
8776 /*
8777  * Translate a guest virtual address to a guest physical address.
8778  */
8779 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8780                                     struct kvm_translation *tr)
8781 {
8782         unsigned long vaddr = tr->linear_address;
8783         gpa_t gpa;
8784         int idx;
8785
8786         vcpu_load(vcpu);
8787
8788         idx = srcu_read_lock(&vcpu->kvm->srcu);
8789         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8790         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8791         tr->physical_address = gpa;
8792         tr->valid = gpa != UNMAPPED_GVA;
8793         tr->writeable = 1;
8794         tr->usermode = 0;
8795
8796         vcpu_put(vcpu);
8797         return 0;
8798 }
8799
8800 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8801 {
8802         struct fxregs_state *fxsave;
8803
8804         vcpu_load(vcpu);
8805
8806         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8807         memcpy(fpu->fpr, fxsave->st_space, 128);
8808         fpu->fcw = fxsave->cwd;
8809         fpu->fsw = fxsave->swd;
8810         fpu->ftwx = fxsave->twd;
8811         fpu->last_opcode = fxsave->fop;
8812         fpu->last_ip = fxsave->rip;
8813         fpu->last_dp = fxsave->rdp;
8814         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8815
8816         vcpu_put(vcpu);
8817         return 0;
8818 }
8819
8820 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8821 {
8822         struct fxregs_state *fxsave;
8823
8824         vcpu_load(vcpu);
8825
8826         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8827
8828         memcpy(fxsave->st_space, fpu->fpr, 128);
8829         fxsave->cwd = fpu->fcw;
8830         fxsave->swd = fpu->fsw;
8831         fxsave->twd = fpu->ftwx;
8832         fxsave->fop = fpu->last_opcode;
8833         fxsave->rip = fpu->last_ip;
8834         fxsave->rdp = fpu->last_dp;
8835         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8836
8837         vcpu_put(vcpu);
8838         return 0;
8839 }
8840
8841 static void store_regs(struct kvm_vcpu *vcpu)
8842 {
8843         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8844
8845         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8846                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8847
8848         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8849                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8850
8851         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8852                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8853                                 vcpu, &vcpu->run->s.regs.events);
8854 }
8855
8856 static int sync_regs(struct kvm_vcpu *vcpu)
8857 {
8858         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8859                 return -EINVAL;
8860
8861         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8862                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8863                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8864         }
8865         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8866                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8867                         return -EINVAL;
8868                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8869         }
8870         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8871                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8872                                 vcpu, &vcpu->run->s.regs.events))
8873                         return -EINVAL;
8874                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8875         }
8876
8877         return 0;
8878 }
8879
8880 static void fx_init(struct kvm_vcpu *vcpu)
8881 {
8882         fpstate_init(&vcpu->arch.guest_fpu->state);
8883         if (boot_cpu_has(X86_FEATURE_XSAVES))
8884                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
8885                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8886
8887         /*
8888          * Ensure guest xcr0 is valid for loading
8889          */
8890         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8891
8892         vcpu->arch.cr0 |= X86_CR0_ET;
8893 }
8894
8895 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8896 {
8897         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8898
8899         kvmclock_reset(vcpu);
8900
8901         kvm_x86_ops->vcpu_free(vcpu);
8902         free_cpumask_var(wbinvd_dirty_mask);
8903 }
8904
8905 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8906                                                 unsigned int id)
8907 {
8908         struct kvm_vcpu *vcpu;
8909
8910         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8911                 printk_once(KERN_WARNING
8912                 "kvm: SMP vm created on host with unstable TSC; "
8913                 "guest TSC will not be reliable\n");
8914
8915         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8916
8917         return vcpu;
8918 }
8919
8920 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8921 {
8922         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
8923         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8924         kvm_vcpu_mtrr_init(vcpu);
8925         vcpu_load(vcpu);
8926         kvm_vcpu_reset(vcpu, false);
8927         kvm_init_mmu(vcpu, false);
8928         vcpu_put(vcpu);
8929         return 0;
8930 }
8931
8932 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8933 {
8934         struct msr_data msr;
8935         struct kvm *kvm = vcpu->kvm;
8936
8937         kvm_hv_vcpu_postcreate(vcpu);
8938
8939         if (mutex_lock_killable(&vcpu->mutex))
8940                 return;
8941         vcpu_load(vcpu);
8942         msr.data = 0x0;
8943         msr.index = MSR_IA32_TSC;
8944         msr.host_initiated = true;
8945         kvm_write_tsc(vcpu, &msr);
8946         vcpu_put(vcpu);
8947
8948         /* poll control enabled by default */
8949         vcpu->arch.msr_kvm_poll_control = 1;
8950
8951         mutex_unlock(&vcpu->mutex);
8952
8953         if (!kvmclock_periodic_sync)
8954                 return;
8955
8956         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8957                                         KVMCLOCK_SYNC_PERIOD);
8958 }
8959
8960 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8961 {
8962         vcpu->arch.apf.msr_val = 0;
8963
8964         vcpu_load(vcpu);
8965         kvm_mmu_unload(vcpu);
8966         vcpu_put(vcpu);
8967
8968         kvm_x86_ops->vcpu_free(vcpu);
8969 }
8970
8971 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8972 {
8973         kvm_lapic_reset(vcpu, init_event);
8974
8975         vcpu->arch.hflags = 0;
8976
8977         vcpu->arch.smi_pending = 0;
8978         vcpu->arch.smi_count = 0;
8979         atomic_set(&vcpu->arch.nmi_queued, 0);
8980         vcpu->arch.nmi_pending = 0;
8981         vcpu->arch.nmi_injected = false;
8982         kvm_clear_interrupt_queue(vcpu);
8983         kvm_clear_exception_queue(vcpu);
8984         vcpu->arch.exception.pending = false;
8985
8986         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8987         kvm_update_dr0123(vcpu);
8988         vcpu->arch.dr6 = DR6_INIT;
8989         kvm_update_dr6(vcpu);
8990         vcpu->arch.dr7 = DR7_FIXED_1;
8991         kvm_update_dr7(vcpu);
8992
8993         vcpu->arch.cr2 = 0;
8994
8995         kvm_make_request(KVM_REQ_EVENT, vcpu);
8996         vcpu->arch.apf.msr_val = 0;
8997         vcpu->arch.st.msr_val = 0;
8998
8999         kvmclock_reset(vcpu);
9000
9001         kvm_clear_async_pf_completion_queue(vcpu);
9002         kvm_async_pf_hash_reset(vcpu);
9003         vcpu->arch.apf.halted = false;
9004
9005         if (kvm_mpx_supported()) {
9006                 void *mpx_state_buffer;
9007
9008                 /*
9009                  * To avoid have the INIT path from kvm_apic_has_events() that be
9010                  * called with loaded FPU and does not let userspace fix the state.
9011                  */
9012                 if (init_event)
9013                         kvm_put_guest_fpu(vcpu);
9014                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9015                                         XFEATURE_BNDREGS);
9016                 if (mpx_state_buffer)
9017                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9018                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9019                                         XFEATURE_BNDCSR);
9020                 if (mpx_state_buffer)
9021                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9022                 if (init_event)
9023                         kvm_load_guest_fpu(vcpu);
9024         }
9025
9026         if (!init_event) {
9027                 kvm_pmu_reset(vcpu);
9028                 vcpu->arch.smbase = 0x30000;
9029
9030                 vcpu->arch.msr_misc_features_enables = 0;
9031
9032                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9033         }
9034
9035         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9036         vcpu->arch.regs_avail = ~0;
9037         vcpu->arch.regs_dirty = ~0;
9038
9039         vcpu->arch.ia32_xss = 0;
9040
9041         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9042 }
9043
9044 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9045 {
9046         struct kvm_segment cs;
9047
9048         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9049         cs.selector = vector << 8;
9050         cs.base = vector << 12;
9051         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9052         kvm_rip_write(vcpu, 0);
9053 }
9054
9055 int kvm_arch_hardware_enable(void)
9056 {
9057         struct kvm *kvm;
9058         struct kvm_vcpu *vcpu;
9059         int i;
9060         int ret;
9061         u64 local_tsc;
9062         u64 max_tsc = 0;
9063         bool stable, backwards_tsc = false;
9064
9065         kvm_shared_msr_cpu_online();
9066         ret = kvm_x86_ops->hardware_enable();
9067         if (ret != 0)
9068                 return ret;
9069
9070         local_tsc = rdtsc();
9071         stable = !kvm_check_tsc_unstable();
9072         list_for_each_entry(kvm, &vm_list, vm_list) {
9073                 kvm_for_each_vcpu(i, vcpu, kvm) {
9074                         if (!stable && vcpu->cpu == smp_processor_id())
9075                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9076                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9077                                 backwards_tsc = true;
9078                                 if (vcpu->arch.last_host_tsc > max_tsc)
9079                                         max_tsc = vcpu->arch.last_host_tsc;
9080                         }
9081                 }
9082         }
9083
9084         /*
9085          * Sometimes, even reliable TSCs go backwards.  This happens on
9086          * platforms that reset TSC during suspend or hibernate actions, but
9087          * maintain synchronization.  We must compensate.  Fortunately, we can
9088          * detect that condition here, which happens early in CPU bringup,
9089          * before any KVM threads can be running.  Unfortunately, we can't
9090          * bring the TSCs fully up to date with real time, as we aren't yet far
9091          * enough into CPU bringup that we know how much real time has actually
9092          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9093          * variables that haven't been updated yet.
9094          *
9095          * So we simply find the maximum observed TSC above, then record the
9096          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9097          * the adjustment will be applied.  Note that we accumulate
9098          * adjustments, in case multiple suspend cycles happen before some VCPU
9099          * gets a chance to run again.  In the event that no KVM threads get a
9100          * chance to run, we will miss the entire elapsed period, as we'll have
9101          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9102          * loose cycle time.  This isn't too big a deal, since the loss will be
9103          * uniform across all VCPUs (not to mention the scenario is extremely
9104          * unlikely). It is possible that a second hibernate recovery happens
9105          * much faster than a first, causing the observed TSC here to be
9106          * smaller; this would require additional padding adjustment, which is
9107          * why we set last_host_tsc to the local tsc observed here.
9108          *
9109          * N.B. - this code below runs only on platforms with reliable TSC,
9110          * as that is the only way backwards_tsc is set above.  Also note
9111          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9112          * have the same delta_cyc adjustment applied if backwards_tsc
9113          * is detected.  Note further, this adjustment is only done once,
9114          * as we reset last_host_tsc on all VCPUs to stop this from being
9115          * called multiple times (one for each physical CPU bringup).
9116          *
9117          * Platforms with unreliable TSCs don't have to deal with this, they
9118          * will be compensated by the logic in vcpu_load, which sets the TSC to
9119          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9120          * guarantee that they stay in perfect synchronization.
9121          */
9122         if (backwards_tsc) {
9123                 u64 delta_cyc = max_tsc - local_tsc;
9124                 list_for_each_entry(kvm, &vm_list, vm_list) {
9125                         kvm->arch.backwards_tsc_observed = true;
9126                         kvm_for_each_vcpu(i, vcpu, kvm) {
9127                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9128                                 vcpu->arch.last_host_tsc = local_tsc;
9129                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9130                         }
9131
9132                         /*
9133                          * We have to disable TSC offset matching.. if you were
9134                          * booting a VM while issuing an S4 host suspend....
9135                          * you may have some problem.  Solving this issue is
9136                          * left as an exercise to the reader.
9137                          */
9138                         kvm->arch.last_tsc_nsec = 0;
9139                         kvm->arch.last_tsc_write = 0;
9140                 }
9141
9142         }
9143         return 0;
9144 }
9145
9146 void kvm_arch_hardware_disable(void)
9147 {
9148         kvm_x86_ops->hardware_disable();
9149         drop_user_return_notifiers();
9150 }
9151
9152 int kvm_arch_hardware_setup(void)
9153 {
9154         int r;
9155
9156         r = kvm_x86_ops->hardware_setup();
9157         if (r != 0)
9158                 return r;
9159
9160         if (kvm_has_tsc_control) {
9161                 /*
9162                  * Make sure the user can only configure tsc_khz values that
9163                  * fit into a signed integer.
9164                  * A min value is not calculated because it will always
9165                  * be 1 on all machines.
9166                  */
9167                 u64 max = min(0x7fffffffULL,
9168                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9169                 kvm_max_guest_tsc_khz = max;
9170
9171                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9172         }
9173
9174         kvm_init_msr_list();
9175         return 0;
9176 }
9177
9178 void kvm_arch_hardware_unsetup(void)
9179 {
9180         kvm_x86_ops->hardware_unsetup();
9181 }
9182
9183 int kvm_arch_check_processor_compat(void)
9184 {
9185         return kvm_x86_ops->check_processor_compatibility();
9186 }
9187
9188 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9189 {
9190         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9191 }
9192 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9193
9194 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9195 {
9196         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9197 }
9198
9199 struct static_key kvm_no_apic_vcpu __read_mostly;
9200 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9201
9202 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9203 {
9204         struct page *page;
9205         int r;
9206
9207         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9208         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9209                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9210         else
9211                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9212
9213         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9214         if (!page) {
9215                 r = -ENOMEM;
9216                 goto fail;
9217         }
9218         vcpu->arch.pio_data = page_address(page);
9219
9220         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9221
9222         r = kvm_mmu_create(vcpu);
9223         if (r < 0)
9224                 goto fail_free_pio_data;
9225
9226         if (irqchip_in_kernel(vcpu->kvm)) {
9227                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9228                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9229                 if (r < 0)
9230                         goto fail_mmu_destroy;
9231         } else
9232                 static_key_slow_inc(&kvm_no_apic_vcpu);
9233
9234         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9235                                        GFP_KERNEL_ACCOUNT);
9236         if (!vcpu->arch.mce_banks) {
9237                 r = -ENOMEM;
9238                 goto fail_free_lapic;
9239         }
9240         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9241
9242         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9243                                 GFP_KERNEL_ACCOUNT)) {
9244                 r = -ENOMEM;
9245                 goto fail_free_mce_banks;
9246         }
9247
9248         fx_init(vcpu);
9249
9250         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9251
9252         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9253
9254         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9255
9256         kvm_async_pf_hash_reset(vcpu);
9257         kvm_pmu_init(vcpu);
9258
9259         vcpu->arch.pending_external_vector = -1;
9260         vcpu->arch.preempted_in_kernel = false;
9261
9262         kvm_hv_vcpu_init(vcpu);
9263
9264         return 0;
9265
9266 fail_free_mce_banks:
9267         kfree(vcpu->arch.mce_banks);
9268 fail_free_lapic:
9269         kvm_free_lapic(vcpu);
9270 fail_mmu_destroy:
9271         kvm_mmu_destroy(vcpu);
9272 fail_free_pio_data:
9273         free_page((unsigned long)vcpu->arch.pio_data);
9274 fail:
9275         return r;
9276 }
9277
9278 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9279 {
9280         int idx;
9281
9282         kvm_hv_vcpu_uninit(vcpu);
9283         kvm_pmu_destroy(vcpu);
9284         kfree(vcpu->arch.mce_banks);
9285         kvm_free_lapic(vcpu);
9286         idx = srcu_read_lock(&vcpu->kvm->srcu);
9287         kvm_mmu_destroy(vcpu);
9288         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9289         free_page((unsigned long)vcpu->arch.pio_data);
9290         if (!lapic_in_kernel(vcpu))
9291                 static_key_slow_dec(&kvm_no_apic_vcpu);
9292 }
9293
9294 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9295 {
9296         vcpu->arch.l1tf_flush_l1d = true;
9297         kvm_x86_ops->sched_in(vcpu, cpu);
9298 }
9299
9300 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9301 {
9302         if (type)
9303                 return -EINVAL;
9304
9305         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9306         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9307         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9308         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9309
9310         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9311         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9312         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9313         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9314                 &kvm->arch.irq_sources_bitmap);
9315
9316         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9317         mutex_init(&kvm->arch.apic_map_lock);
9318         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9319
9320         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9321         pvclock_update_vm_gtod_copy(kvm);
9322
9323         kvm->arch.guest_can_read_msr_platform_info = true;
9324
9325         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9326         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9327
9328         kvm_hv_init_vm(kvm);
9329         kvm_page_track_init(kvm);
9330         kvm_mmu_init_vm(kvm);
9331
9332         return kvm_x86_ops->vm_init(kvm);
9333 }
9334
9335 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9336 {
9337         vcpu_load(vcpu);
9338         kvm_mmu_unload(vcpu);
9339         vcpu_put(vcpu);
9340 }
9341
9342 static void kvm_free_vcpus(struct kvm *kvm)
9343 {
9344         unsigned int i;
9345         struct kvm_vcpu *vcpu;
9346
9347         /*
9348          * Unpin any mmu pages first.
9349          */
9350         kvm_for_each_vcpu(i, vcpu, kvm) {
9351                 kvm_clear_async_pf_completion_queue(vcpu);
9352                 kvm_unload_vcpu_mmu(vcpu);
9353         }
9354         kvm_for_each_vcpu(i, vcpu, kvm)
9355                 kvm_arch_vcpu_free(vcpu);
9356
9357         mutex_lock(&kvm->lock);
9358         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9359                 kvm->vcpus[i] = NULL;
9360
9361         atomic_set(&kvm->online_vcpus, 0);
9362         mutex_unlock(&kvm->lock);
9363 }
9364
9365 void kvm_arch_sync_events(struct kvm *kvm)
9366 {
9367         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9368         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9369         kvm_free_pit(kvm);
9370 }
9371
9372 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9373 {
9374         int i, r;
9375         unsigned long hva;
9376         struct kvm_memslots *slots = kvm_memslots(kvm);
9377         struct kvm_memory_slot *slot, old;
9378
9379         /* Called with kvm->slots_lock held.  */
9380         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9381                 return -EINVAL;
9382
9383         slot = id_to_memslot(slots, id);
9384         if (size) {
9385                 if (slot->npages)
9386                         return -EEXIST;
9387
9388                 /*
9389                  * MAP_SHARED to prevent internal slot pages from being moved
9390                  * by fork()/COW.
9391                  */
9392                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9393                               MAP_SHARED | MAP_ANONYMOUS, 0);
9394                 if (IS_ERR((void *)hva))
9395                         return PTR_ERR((void *)hva);
9396         } else {
9397                 if (!slot->npages)
9398                         return 0;
9399
9400                 hva = 0;
9401         }
9402
9403         old = *slot;
9404         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9405                 struct kvm_userspace_memory_region m;
9406
9407                 m.slot = id | (i << 16);
9408                 m.flags = 0;
9409                 m.guest_phys_addr = gpa;
9410                 m.userspace_addr = hva;
9411                 m.memory_size = size;
9412                 r = __kvm_set_memory_region(kvm, &m);
9413                 if (r < 0)
9414                         return r;
9415         }
9416
9417         if (!size)
9418                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9419
9420         return 0;
9421 }
9422 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9423
9424 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9425 {
9426         int r;
9427
9428         mutex_lock(&kvm->slots_lock);
9429         r = __x86_set_memory_region(kvm, id, gpa, size);
9430         mutex_unlock(&kvm->slots_lock);
9431
9432         return r;
9433 }
9434 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9435
9436 void kvm_arch_destroy_vm(struct kvm *kvm)
9437 {
9438         if (current->mm == kvm->mm) {
9439                 /*
9440                  * Free memory regions allocated on behalf of userspace,
9441                  * unless the the memory map has changed due to process exit
9442                  * or fd copying.
9443                  */
9444                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9445                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9446                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9447         }
9448         if (kvm_x86_ops->vm_destroy)
9449                 kvm_x86_ops->vm_destroy(kvm);
9450         kvm_pic_destroy(kvm);
9451         kvm_ioapic_destroy(kvm);
9452         kvm_free_vcpus(kvm);
9453         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9454         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9455         kvm_mmu_uninit_vm(kvm);
9456         kvm_page_track_cleanup(kvm);
9457         kvm_hv_destroy_vm(kvm);
9458 }
9459
9460 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9461                            struct kvm_memory_slot *dont)
9462 {
9463         int i;
9464
9465         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9466                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9467                         kvfree(free->arch.rmap[i]);
9468                         free->arch.rmap[i] = NULL;
9469                 }
9470                 if (i == 0)
9471                         continue;
9472
9473                 if (!dont || free->arch.lpage_info[i - 1] !=
9474                              dont->arch.lpage_info[i - 1]) {
9475                         kvfree(free->arch.lpage_info[i - 1]);
9476                         free->arch.lpage_info[i - 1] = NULL;
9477                 }
9478         }
9479
9480         kvm_page_track_free_memslot(free, dont);
9481 }
9482
9483 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9484                             unsigned long npages)
9485 {
9486         int i;
9487
9488         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9489                 struct kvm_lpage_info *linfo;
9490                 unsigned long ugfn;
9491                 int lpages;
9492                 int level = i + 1;
9493
9494                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9495                                       slot->base_gfn, level) + 1;
9496
9497                 slot->arch.rmap[i] =
9498                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9499                                  GFP_KERNEL_ACCOUNT);
9500                 if (!slot->arch.rmap[i])
9501                         goto out_free;
9502                 if (i == 0)
9503                         continue;
9504
9505                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9506                 if (!linfo)
9507                         goto out_free;
9508
9509                 slot->arch.lpage_info[i - 1] = linfo;
9510
9511                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9512                         linfo[0].disallow_lpage = 1;
9513                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9514                         linfo[lpages - 1].disallow_lpage = 1;
9515                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9516                 /*
9517                  * If the gfn and userspace address are not aligned wrt each
9518                  * other, or if explicitly asked to, disable large page
9519                  * support for this slot
9520                  */
9521                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9522                     !kvm_largepages_enabled()) {
9523                         unsigned long j;
9524
9525                         for (j = 0; j < lpages; ++j)
9526                                 linfo[j].disallow_lpage = 1;
9527                 }
9528         }
9529
9530         if (kvm_page_track_create_memslot(slot, npages))
9531                 goto out_free;
9532
9533         return 0;
9534
9535 out_free:
9536         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9537                 kvfree(slot->arch.rmap[i]);
9538                 slot->arch.rmap[i] = NULL;
9539                 if (i == 0)
9540                         continue;
9541
9542                 kvfree(slot->arch.lpage_info[i - 1]);
9543                 slot->arch.lpage_info[i - 1] = NULL;
9544         }
9545         return -ENOMEM;
9546 }
9547
9548 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9549 {
9550         /*
9551          * memslots->generation has been incremented.
9552          * mmio generation may have reached its maximum value.
9553          */
9554         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9555 }
9556
9557 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9558                                 struct kvm_memory_slot *memslot,
9559                                 const struct kvm_userspace_memory_region *mem,
9560                                 enum kvm_mr_change change)
9561 {
9562         return 0;
9563 }
9564
9565 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9566                                      struct kvm_memory_slot *new)
9567 {
9568         /* Still write protect RO slot */
9569         if (new->flags & KVM_MEM_READONLY) {
9570                 kvm_mmu_slot_remove_write_access(kvm, new);
9571                 return;
9572         }
9573
9574         /*
9575          * Call kvm_x86_ops dirty logging hooks when they are valid.
9576          *
9577          * kvm_x86_ops->slot_disable_log_dirty is called when:
9578          *
9579          *  - KVM_MR_CREATE with dirty logging is disabled
9580          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9581          *
9582          * The reason is, in case of PML, we need to set D-bit for any slots
9583          * with dirty logging disabled in order to eliminate unnecessary GPA
9584          * logging in PML buffer (and potential PML buffer full VMEXT). This
9585          * guarantees leaving PML enabled during guest's lifetime won't have
9586          * any additional overhead from PML when guest is running with dirty
9587          * logging disabled for memory slots.
9588          *
9589          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9590          * to dirty logging mode.
9591          *
9592          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9593          *
9594          * In case of write protect:
9595          *
9596          * Write protect all pages for dirty logging.
9597          *
9598          * All the sptes including the large sptes which point to this
9599          * slot are set to readonly. We can not create any new large
9600          * spte on this slot until the end of the logging.
9601          *
9602          * See the comments in fast_page_fault().
9603          */
9604         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9605                 if (kvm_x86_ops->slot_enable_log_dirty)
9606                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9607                 else
9608                         kvm_mmu_slot_remove_write_access(kvm, new);
9609         } else {
9610                 if (kvm_x86_ops->slot_disable_log_dirty)
9611                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9612         }
9613 }
9614
9615 void kvm_arch_commit_memory_region(struct kvm *kvm,
9616                                 const struct kvm_userspace_memory_region *mem,
9617                                 const struct kvm_memory_slot *old,
9618                                 const struct kvm_memory_slot *new,
9619                                 enum kvm_mr_change change)
9620 {
9621         if (!kvm->arch.n_requested_mmu_pages)
9622                 kvm_mmu_change_mmu_pages(kvm,
9623                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9624
9625         /*
9626          * Dirty logging tracks sptes in 4k granularity, meaning that large
9627          * sptes have to be split.  If live migration is successful, the guest
9628          * in the source machine will be destroyed and large sptes will be
9629          * created in the destination. However, if the guest continues to run
9630          * in the source machine (for example if live migration fails), small
9631          * sptes will remain around and cause bad performance.
9632          *
9633          * Scan sptes if dirty logging has been stopped, dropping those
9634          * which can be collapsed into a single large-page spte.  Later
9635          * page faults will create the large-page sptes.
9636          */
9637         if ((change != KVM_MR_DELETE) &&
9638                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9639                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9640                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9641
9642         /*
9643          * Set up write protection and/or dirty logging for the new slot.
9644          *
9645          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9646          * been zapped so no dirty logging staff is needed for old slot. For
9647          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9648          * new and it's also covered when dealing with the new slot.
9649          *
9650          * FIXME: const-ify all uses of struct kvm_memory_slot.
9651          */
9652         if (change != KVM_MR_DELETE)
9653                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9654 }
9655
9656 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9657 {
9658         kvm_mmu_zap_all(kvm);
9659 }
9660
9661 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9662                                    struct kvm_memory_slot *slot)
9663 {
9664         kvm_page_track_flush_slot(kvm, slot);
9665 }
9666
9667 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9668 {
9669         return (is_guest_mode(vcpu) &&
9670                         kvm_x86_ops->guest_apic_has_interrupt &&
9671                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9672 }
9673
9674 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9675 {
9676         if (!list_empty_careful(&vcpu->async_pf.done))
9677                 return true;
9678
9679         if (kvm_apic_has_events(vcpu))
9680                 return true;
9681
9682         if (vcpu->arch.pv.pv_unhalted)
9683                 return true;
9684
9685         if (vcpu->arch.exception.pending)
9686                 return true;
9687
9688         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9689             (vcpu->arch.nmi_pending &&
9690              kvm_x86_ops->nmi_allowed(vcpu)))
9691                 return true;
9692
9693         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9694             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9695                 return true;
9696
9697         if (kvm_arch_interrupt_allowed(vcpu) &&
9698             (kvm_cpu_has_interrupt(vcpu) ||
9699             kvm_guest_apic_has_interrupt(vcpu)))
9700                 return true;
9701
9702         if (kvm_hv_has_stimer_pending(vcpu))
9703                 return true;
9704
9705         return false;
9706 }
9707
9708 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9709 {
9710         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9711 }
9712
9713 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
9714 {
9715         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
9716                 return true;
9717
9718         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9719                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
9720                  kvm_test_request(KVM_REQ_EVENT, vcpu))
9721                 return true;
9722
9723         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
9724                 return true;
9725
9726         return false;
9727 }
9728
9729 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9730 {
9731         return vcpu->arch.preempted_in_kernel;
9732 }
9733
9734 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9735 {
9736         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9737 }
9738
9739 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9740 {
9741         return kvm_x86_ops->interrupt_allowed(vcpu);
9742 }
9743
9744 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9745 {
9746         if (is_64_bit_mode(vcpu))
9747                 return kvm_rip_read(vcpu);
9748         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9749                      kvm_rip_read(vcpu));
9750 }
9751 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9752
9753 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9754 {
9755         return kvm_get_linear_rip(vcpu) == linear_rip;
9756 }
9757 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9758
9759 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9760 {
9761         unsigned long rflags;
9762
9763         rflags = kvm_x86_ops->get_rflags(vcpu);
9764         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9765                 rflags &= ~X86_EFLAGS_TF;
9766         return rflags;
9767 }
9768 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9769
9770 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9771 {
9772         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9773             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9774                 rflags |= X86_EFLAGS_TF;
9775         kvm_x86_ops->set_rflags(vcpu, rflags);
9776 }
9777
9778 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9779 {
9780         __kvm_set_rflags(vcpu, rflags);
9781         kvm_make_request(KVM_REQ_EVENT, vcpu);
9782 }
9783 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9784
9785 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9786 {
9787         int r;
9788
9789         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9790               work->wakeup_all)
9791                 return;
9792
9793         r = kvm_mmu_reload(vcpu);
9794         if (unlikely(r))
9795                 return;
9796
9797         if (!vcpu->arch.mmu->direct_map &&
9798               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9799                 return;
9800
9801         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9802 }
9803
9804 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9805 {
9806         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9807 }
9808
9809 static inline u32 kvm_async_pf_next_probe(u32 key)
9810 {
9811         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9812 }
9813
9814 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9815 {
9816         u32 key = kvm_async_pf_hash_fn(gfn);
9817
9818         while (vcpu->arch.apf.gfns[key] != ~0)
9819                 key = kvm_async_pf_next_probe(key);
9820
9821         vcpu->arch.apf.gfns[key] = gfn;
9822 }
9823
9824 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9825 {
9826         int i;
9827         u32 key = kvm_async_pf_hash_fn(gfn);
9828
9829         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9830                      (vcpu->arch.apf.gfns[key] != gfn &&
9831                       vcpu->arch.apf.gfns[key] != ~0); i++)
9832                 key = kvm_async_pf_next_probe(key);
9833
9834         return key;
9835 }
9836
9837 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9838 {
9839         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9840 }
9841
9842 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9843 {
9844         u32 i, j, k;
9845
9846         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9847         while (true) {
9848                 vcpu->arch.apf.gfns[i] = ~0;
9849                 do {
9850                         j = kvm_async_pf_next_probe(j);
9851                         if (vcpu->arch.apf.gfns[j] == ~0)
9852                                 return;
9853                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9854                         /*
9855                          * k lies cyclically in ]i,j]
9856                          * |    i.k.j |
9857                          * |....j i.k.| or  |.k..j i...|
9858                          */
9859                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9860                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9861                 i = j;
9862         }
9863 }
9864
9865 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9866 {
9867
9868         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9869                                       sizeof(val));
9870 }
9871
9872 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9873 {
9874
9875         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9876                                       sizeof(u32));
9877 }
9878
9879 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
9880 {
9881         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
9882                 return false;
9883
9884         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9885             (vcpu->arch.apf.send_user_only &&
9886              kvm_x86_ops->get_cpl(vcpu) == 0))
9887                 return false;
9888
9889         return true;
9890 }
9891
9892 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
9893 {
9894         if (unlikely(!lapic_in_kernel(vcpu) ||
9895                      kvm_event_needs_reinjection(vcpu) ||
9896                      vcpu->arch.exception.pending))
9897                 return false;
9898
9899         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
9900                 return false;
9901
9902         /*
9903          * If interrupts are off we cannot even use an artificial
9904          * halt state.
9905          */
9906         return kvm_x86_ops->interrupt_allowed(vcpu);
9907 }
9908
9909 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9910                                      struct kvm_async_pf *work)
9911 {
9912         struct x86_exception fault;
9913
9914         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9915         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9916
9917         if (kvm_can_deliver_async_pf(vcpu) &&
9918             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9919                 fault.vector = PF_VECTOR;
9920                 fault.error_code_valid = true;
9921                 fault.error_code = 0;
9922                 fault.nested_page_fault = false;
9923                 fault.address = work->arch.token;
9924                 fault.async_page_fault = true;
9925                 kvm_inject_page_fault(vcpu, &fault);
9926         } else {
9927                 /*
9928                  * It is not possible to deliver a paravirtualized asynchronous
9929                  * page fault, but putting the guest in an artificial halt state
9930                  * can be beneficial nevertheless: if an interrupt arrives, we
9931                  * can deliver it timely and perhaps the guest will schedule
9932                  * another process.  When the instruction that triggered a page
9933                  * fault is retried, hopefully the page will be ready in the host.
9934                  */
9935                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9936         }
9937 }
9938
9939 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9940                                  struct kvm_async_pf *work)
9941 {
9942         struct x86_exception fault;
9943         u32 val;
9944
9945         if (work->wakeup_all)
9946                 work->arch.token = ~0; /* broadcast wakeup */
9947         else
9948                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9949         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9950
9951         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9952             !apf_get_user(vcpu, &val)) {
9953                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9954                     vcpu->arch.exception.pending &&
9955                     vcpu->arch.exception.nr == PF_VECTOR &&
9956                     !apf_put_user(vcpu, 0)) {
9957                         vcpu->arch.exception.injected = false;
9958                         vcpu->arch.exception.pending = false;
9959                         vcpu->arch.exception.nr = 0;
9960                         vcpu->arch.exception.has_error_code = false;
9961                         vcpu->arch.exception.error_code = 0;
9962                         vcpu->arch.exception.has_payload = false;
9963                         vcpu->arch.exception.payload = 0;
9964                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9965                         fault.vector = PF_VECTOR;
9966                         fault.error_code_valid = true;
9967                         fault.error_code = 0;
9968                         fault.nested_page_fault = false;
9969                         fault.address = work->arch.token;
9970                         fault.async_page_fault = true;
9971                         kvm_inject_page_fault(vcpu, &fault);
9972                 }
9973         }
9974         vcpu->arch.apf.halted = false;
9975         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9976 }
9977
9978 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9979 {
9980         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9981                 return true;
9982         else
9983                 return kvm_can_do_async_pf(vcpu);
9984 }
9985
9986 void kvm_arch_start_assignment(struct kvm *kvm)
9987 {
9988         atomic_inc(&kvm->arch.assigned_device_count);
9989 }
9990 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9991
9992 void kvm_arch_end_assignment(struct kvm *kvm)
9993 {
9994         atomic_dec(&kvm->arch.assigned_device_count);
9995 }
9996 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9997
9998 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9999 {
10000         return atomic_read(&kvm->arch.assigned_device_count);
10001 }
10002 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10003
10004 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10005 {
10006         atomic_inc(&kvm->arch.noncoherent_dma_count);
10007 }
10008 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10009
10010 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10011 {
10012         atomic_dec(&kvm->arch.noncoherent_dma_count);
10013 }
10014 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10015
10016 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10017 {
10018         return atomic_read(&kvm->arch.noncoherent_dma_count);
10019 }
10020 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10021
10022 bool kvm_arch_has_irq_bypass(void)
10023 {
10024         return true;
10025 }
10026
10027 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10028                                       struct irq_bypass_producer *prod)
10029 {
10030         struct kvm_kernel_irqfd *irqfd =
10031                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10032
10033         irqfd->producer = prod;
10034
10035         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10036                                            prod->irq, irqfd->gsi, 1);
10037 }
10038
10039 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10040                                       struct irq_bypass_producer *prod)
10041 {
10042         int ret;
10043         struct kvm_kernel_irqfd *irqfd =
10044                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10045
10046         WARN_ON(irqfd->producer != prod);
10047         irqfd->producer = NULL;
10048
10049         /*
10050          * When producer of consumer is unregistered, we change back to
10051          * remapped mode, so we can re-use the current implementation
10052          * when the irq is masked/disabled or the consumer side (KVM
10053          * int this case doesn't want to receive the interrupts.
10054         */
10055         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10056         if (ret)
10057                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10058                        " fails: %d\n", irqfd->consumer.token, ret);
10059 }
10060
10061 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10062                                    uint32_t guest_irq, bool set)
10063 {
10064         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10065 }
10066
10067 bool kvm_vector_hashing_enabled(void)
10068 {
10069         return vector_hashing;
10070 }
10071 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10072
10073 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10074 {
10075         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10076 }
10077 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10078
10079
10080 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10081 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10082 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10083 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10084 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10085 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10086 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10087 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10088 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10089 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10090 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10091 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10092 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10093 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10094 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
10095 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10096 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10097 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10098 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);