arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31
  32 #include <linux/clocksource.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/kvm.h>
  35 #include <linux/fs.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/module.h>
  38 #include <linux/mman.h>
  39 #include <linux/highmem.h>
  40 #include <linux/iommu.h>
  41 #include <linux/intel-iommu.h>
  42 #include <linux/cpufreq.h>
  43 #include <linux/user-return-notifier.h>
  44 #include <linux/srcu.h>
  45 #include <linux/slab.h>
  46 #include <linux/perf_event.h>
  47 #include <linux/uaccess.h>
  48 #include <linux/hash.h>
  49 #include <linux/pci.h>
  50 #include <linux/timekeeper_internal.h>
  51 #include <linux/pvclock_gtod.h>
  52 #include <trace/events/kvm.h>
  53
  54 #define CREATE_TRACE_POINTS
  55 #include "trace.h"
  56
  57 #include <asm/debugreg.h>
  58 #include <asm/msr.h>
  59 #include <asm/desc.h>
  60 #include <asm/mtrr.h>
  61 #include <asm/mce.h>
  62 #include <asm/i387.h>
  63 #include <asm/fpu-internal.h> /* Ugh! */
  64 #include <asm/xcr.h>
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67
  68 #define MAX_IO_MSRS 256
  69 #define KVM_MAX_MCE_BANKS 32
  70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  71
  72 #define emul_to_vcpu(ctxt) \
  73         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  74
  75 /* EFER defaults:
  76  * - enable syscall per default because its emulated by KVM
  77  * - enable LME and LMA per default on 64 bit KVM
  78  */
  79 #ifdef CONFIG_X86_64
  80 static
  81 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  82 #else
  83 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  84 #endif
  85
  86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  88
  89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  90 static void process_nmi(struct kvm_vcpu *vcpu);
  91 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  92
  93 struct kvm_x86_ops *kvm_x86_ops;
  94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  95
  96 static bool ignore_msrs = 0;
  97 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  98
  99 unsigned int min_timer_period_us = 500;
 100 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 101
 102 bool kvm_has_tsc_control;
 103 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 104 u32  kvm_max_guest_tsc_khz;
 105 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 106
 107 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 108 static u32 tsc_tolerance_ppm = 250;
 109 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 110
 111 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 112 unsigned int lapic_timer_advance_ns = 0;
 113 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 114
 115 static bool backwards_tsc_observed = false;
 116
 117 #define KVM_NR_SHARED_MSRS 16
 118
 119 struct kvm_shared_msrs_global {
 120         int nr;
 121         u32 msrs[KVM_NR_SHARED_MSRS];
 122 };
 123
 124 struct kvm_shared_msrs {
 125         struct user_return_notifier urn;
 126         bool registered;
 127         struct kvm_shared_msr_values {
 128                 u64 host;
 129                 u64 curr;
 130         } values[KVM_NR_SHARED_MSRS];
 131 };
 132
 133 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 134 static struct kvm_shared_msrs __percpu *shared_msrs;
 135
 136 struct kvm_stats_debugfs_item debugfs_entries[] = {
 137         { "pf_fixed", VCPU_STAT(pf_fixed) },
 138         { "pf_guest", VCPU_STAT(pf_guest) },
 139         { "tlb_flush", VCPU_STAT(tlb_flush) },
 140         { "invlpg", VCPU_STAT(invlpg) },
 141         { "exits", VCPU_STAT(exits) },
 142         { "io_exits", VCPU_STAT(io_exits) },
 143         { "mmio_exits", VCPU_STAT(mmio_exits) },
 144         { "signal_exits", VCPU_STAT(signal_exits) },
 145         { "irq_window", VCPU_STAT(irq_window_exits) },
 146         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 147         { "halt_exits", VCPU_STAT(halt_exits) },
 148         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 149         { "hypercalls", VCPU_STAT(hypercalls) },
 150         { "request_irq", VCPU_STAT(request_irq_exits) },
 151         { "irq_exits", VCPU_STAT(irq_exits) },
 152         { "host_state_reload", VCPU_STAT(host_state_reload) },
 153         { "efer_reload", VCPU_STAT(efer_reload) },
 154         { "fpu_reload", VCPU_STAT(fpu_reload) },
 155         { "insn_emulation", VCPU_STAT(insn_emulation) },
 156         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 157         { "irq_injections", VCPU_STAT(irq_injections) },
 158         { "nmi_injections", VCPU_STAT(nmi_injections) },
 159         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 160         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 161         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 162         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 163         { "mmu_flooded", VM_STAT(mmu_flooded) },
 164         { "mmu_recycled", VM_STAT(mmu_recycled) },
 165         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 166         { "mmu_unsync", VM_STAT(mmu_unsync) },
 167         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 168         { "largepages", VM_STAT(lpages) },
 169         { NULL }
 170 };
 171
 172 u64 __read_mostly host_xcr0;
 173
 174 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 175
 176 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 177 {
 178         int i;
 179         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 180                 vcpu->arch.apf.gfns[i] = ~0;
 181 }
 182
 183 static void kvm_on_user_return(struct user_return_notifier *urn)
 184 {
 185         unsigned slot;
 186         struct kvm_shared_msrs *locals
 187                 = container_of(urn, struct kvm_shared_msrs, urn);
 188         struct kvm_shared_msr_values *values;
 189
 190         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 191                 values = &locals->values[slot];
 192                 if (values->host != values->curr) {
 193                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 194                         values->curr = values->host;
 195                 }
 196         }
 197         locals->registered = false;
 198         user_return_notifier_unregister(urn);
 199 }
 200
 201 static void shared_msr_update(unsigned slot, u32 msr)
 202 {
 203         u64 value;
 204         unsigned int cpu = smp_processor_id();
 205         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 206
 207         /* only read, and nobody should modify it at this time,
 208          * so don't need lock */
 209         if (slot >= shared_msrs_global.nr) {
 210                 printk(KERN_ERR "kvm: invalid MSR slot!");
 211                 return;
 212         }
 213         rdmsrl_safe(msr, &value);
 214         smsr->values[slot].host = value;
 215         smsr->values[slot].curr = value;
 216 }
 217
 218 void kvm_define_shared_msr(unsigned slot, u32 msr)
 219 {
 220         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 221         if (slot >= shared_msrs_global.nr)
 222                 shared_msrs_global.nr = slot + 1;
 223         shared_msrs_global.msrs[slot] = msr;
 224         /* we need ensured the shared_msr_global have been updated */
 225         smp_wmb();
 226 }
 227 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 228
 229 static void kvm_shared_msr_cpu_online(void)
 230 {
 231         unsigned i;
 232
 233         for (i = 0; i < shared_msrs_global.nr; ++i)
 234                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 235 }
 236
 237 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 238 {
 239         unsigned int cpu = smp_processor_id();
 240         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 241         int err;
 242
 243         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 244                 return 0;
 245         smsr->values[slot].curr = value;
 246         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 247         if (err)
 248                 return 1;
 249
 250         if (!smsr->registered) {
 251                 smsr->urn.on_user_return = kvm_on_user_return;
 252                 user_return_notifier_register(&smsr->urn);
 253                 smsr->registered = true;
 254         }
 255         return 0;
 256 }
 257 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 258
 259 static void drop_user_return_notifiers(void)
 260 {
 261         unsigned int cpu = smp_processor_id();
 262         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 263
 264         if (smsr->registered)
 265                 kvm_on_user_return(&smsr->urn);
 266 }
 267
 268 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 269 {
 270         return vcpu->arch.apic_base;
 271 }
 272 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 273
 274 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 275 {
 276         u64 old_state = vcpu->arch.apic_base &
 277                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 278         u64 new_state = msr_info->data &
 279                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 280         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 281                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 282
 283         if (!msr_info->host_initiated &&
 284             ((msr_info->data & reserved_bits) != 0 ||
 285              new_state == X2APIC_ENABLE ||
 286              (new_state == MSR_IA32_APICBASE_ENABLE &&
 287               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 288              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 289               old_state == 0)))
 290                 return 1;
 291
 292         kvm_lapic_set_base(vcpu, msr_info->data);
 293         return 0;
 294 }
 295 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 296
 297 asmlinkage __visible void kvm_spurious_fault(void)
 298 {
 299         /* Fault while not rebooting.  We want the trace. */
 300         BUG();
 301 }
 302 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 303
 304 #define EXCPT_BENIGN            0
 305 #define EXCPT_CONTRIBUTORY      1
 306 #define EXCPT_PF                2
 307
 308 static int exception_class(int vector)
 309 {
 310         switch (vector) {
 311         case PF_VECTOR:
 312                 return EXCPT_PF;
 313         case DE_VECTOR:
 314         case TS_VECTOR:
 315         case NP_VECTOR:
 316         case SS_VECTOR:
 317         case GP_VECTOR:
 318                 return EXCPT_CONTRIBUTORY;
 319         default:
 320                 break;
 321         }
 322         return EXCPT_BENIGN;
 323 }
 324
 325 #define EXCPT_FAULT             0
 326 #define EXCPT_TRAP              1
 327 #define EXCPT_ABORT             2
 328 #define EXCPT_INTERRUPT         3
 329
 330 static int exception_type(int vector)
 331 {
 332         unsigned int mask;
 333
 334         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 335                 return EXCPT_INTERRUPT;
 336
 337         mask = 1 << vector;
 338
 339         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 340         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 341                 return EXCPT_TRAP;
 342
 343         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 344                 return EXCPT_ABORT;
 345
 346         /* Reserved exceptions will result in fault */
 347         return EXCPT_FAULT;
 348 }
 349
 350 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 351                 unsigned nr, bool has_error, u32 error_code,
 352                 bool reinject)
 353 {
 354         u32 prev_nr;
 355         int class1, class2;
 356
 357         kvm_make_request(KVM_REQ_EVENT, vcpu);
 358
 359         if (!vcpu->arch.exception.pending) {
 360         queue:
 361                 if (has_error && !is_protmode(vcpu))
 362                         has_error = false;
 363                 vcpu->arch.exception.pending = true;
 364                 vcpu->arch.exception.has_error_code = has_error;
 365                 vcpu->arch.exception.nr = nr;
 366                 vcpu->arch.exception.error_code = error_code;
 367                 vcpu->arch.exception.reinject = reinject;
 368                 return;
 369         }
 370
 371         /* to check exception */
 372         prev_nr = vcpu->arch.exception.nr;
 373         if (prev_nr == DF_VECTOR) {
 374                 /* triple fault -> shutdown */
 375                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 376                 return;
 377         }
 378         class1 = exception_class(prev_nr);
 379         class2 = exception_class(nr);
 380         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 381                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 382                 /* generate double fault per SDM Table 5-5 */
 383                 vcpu->arch.exception.pending = true;
 384                 vcpu->arch.exception.has_error_code = true;
 385                 vcpu->arch.exception.nr = DF_VECTOR;
 386                 vcpu->arch.exception.error_code = 0;
 387         } else
 388                 /* replace previous exception with a new one in a hope
 389                    that instruction re-execution will regenerate lost
 390                    exception */
 391                 goto queue;
 392 }
 393
 394 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 395 {
 396         kvm_multiple_exception(vcpu, nr, false, 0, false);
 397 }
 398 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 399
 400 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 401 {
 402         kvm_multiple_exception(vcpu, nr, false, 0, true);
 403 }
 404 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 405
 406 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 407 {
 408         if (err)
 409                 kvm_inject_gp(vcpu, 0);
 410         else
 411                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 414
 415 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 416 {
 417         ++vcpu->stat.pf_guest;
 418         vcpu->arch.cr2 = fault->address;
 419         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 420 }
 421 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 422
 423 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 424 {
 425         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 426                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 427         else
 428                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 429
 430         return fault->nested_page_fault;
 431 }
 432
 433 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 434 {
 435         atomic_inc(&vcpu->arch.nmi_queued);
 436         kvm_make_request(KVM_REQ_NMI, vcpu);
 437 }
 438 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 439
 440 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 441 {
 442         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 443 }
 444 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 445
 446 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 447 {
 448         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 449 }
 450 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 451
 452 /*
 453  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 454  * a #GP and return false.
 455  */
 456 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 457 {
 458         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 459                 return true;
 460         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 461         return false;
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 464
 465 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 466 {
 467         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 468                 return true;
 469
 470         kvm_queue_exception(vcpu, UD_VECTOR);
 471         return false;
 472 }
 473 EXPORT_SYMBOL_GPL(kvm_require_dr);
 474
 475 /*
 476  * This function will be used to read from the physical memory of the currently
 477  * running guest. The difference to kvm_read_guest_page is that this function
 478  * can read from guest physical or from the guest's guest physical memory.
 479  */
 480 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 481                             gfn_t ngfn, void *data, int offset, int len,
 482                             u32 access)
 483 {
 484         struct x86_exception exception;
 485         gfn_t real_gfn;
 486         gpa_t ngpa;
 487
 488         ngpa     = gfn_to_gpa(ngfn);
 489         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 490         if (real_gfn == UNMAPPED_GVA)
 491                 return -EFAULT;
 492
 493         real_gfn = gpa_to_gfn(real_gfn);
 494
 495         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 496 }
 497 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 498
 499 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 500                                void *data, int offset, int len, u32 access)
 501 {
 502         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 503                                        data, offset, len, access);
 504 }
 505
 506 /*
 507  * Load the pae pdptrs.  Return true is they are all valid.
 508  */
 509 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 510 {
 511         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 512         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 513         int i;
 514         int ret;
 515         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 516
 517         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 518                                       offset * sizeof(u64), sizeof(pdpte),
 519                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 520         if (ret < 0) {
 521                 ret = 0;
 522                 goto out;
 523         }
 524         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 525                 if (is_present_gpte(pdpte[i]) &&
 526                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 527                         ret = 0;
 528                         goto out;
 529                 }
 530         }
 531         ret = 1;
 532
 533         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 534         __set_bit(VCPU_EXREG_PDPTR,
 535                   (unsigned long *)&vcpu->arch.regs_avail);
 536         __set_bit(VCPU_EXREG_PDPTR,
 537                   (unsigned long *)&vcpu->arch.regs_dirty);
 538 out:
 539
 540         return ret;
 541 }
 542 EXPORT_SYMBOL_GPL(load_pdptrs);
 543
 544 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 545 {
 546         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 547         bool changed = true;
 548         int offset;
 549         gfn_t gfn;
 550         int r;
 551
 552         if (is_long_mode(vcpu) || !is_pae(vcpu))
 553                 return false;
 554
 555         if (!test_bit(VCPU_EXREG_PDPTR,
 556                       (unsigned long *)&vcpu->arch.regs_avail))
 557                 return true;
 558
 559         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 560         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 561         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 562                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 563         if (r < 0)
 564                 goto out;
 565         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 566 out:
 567
 568         return changed;
 569 }
 570
 571 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 572 {
 573         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 574         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 575                                     X86_CR0_CD | X86_CR0_NW;
 576
 577         cr0 |= X86_CR0_ET;
 578
 579 #ifdef CONFIG_X86_64
 580         if (cr0 & 0xffffffff00000000UL)
 581                 return 1;
 582 #endif
 583
 584         cr0 &= ~CR0_RESERVED_BITS;
 585
 586         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 587                 return 1;
 588
 589         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 590                 return 1;
 591
 592         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 593 #ifdef CONFIG_X86_64
 594                 if ((vcpu->arch.efer & EFER_LME)) {
 595                         int cs_db, cs_l;
 596
 597                         if (!is_pae(vcpu))
 598                                 return 1;
 599                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 600                         if (cs_l)
 601                                 return 1;
 602                 } else
 603 #endif
 604                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 605                                                  kvm_read_cr3(vcpu)))
 606                         return 1;
 607         }
 608
 609         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 610                 return 1;
 611
 612         kvm_x86_ops->set_cr0(vcpu, cr0);
 613
 614         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 615                 kvm_clear_async_pf_completion_queue(vcpu);
 616                 kvm_async_pf_hash_reset(vcpu);
 617         }
 618
 619         if ((cr0 ^ old_cr0) & update_bits)
 620                 kvm_mmu_reset_context(vcpu);
 621         return 0;
 622 }
 623 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 624
 625 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 626 {
 627         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_lmsw);
 630
 631 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 632 {
 633         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 634                         !vcpu->guest_xcr0_loaded) {
 635                 /* kvm_set_xcr() also depends on this */
 636                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 637                 vcpu->guest_xcr0_loaded = 1;
 638         }
 639 }
 640
 641 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 642 {
 643         if (vcpu->guest_xcr0_loaded) {
 644                 if (vcpu->arch.xcr0 != host_xcr0)
 645                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 646                 vcpu->guest_xcr0_loaded = 0;
 647         }
 648 }
 649
 650 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 651 {
 652         u64 xcr0 = xcr;
 653         u64 old_xcr0 = vcpu->arch.xcr0;
 654         u64 valid_bits;
 655
 656         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 657         if (index != XCR_XFEATURE_ENABLED_MASK)
 658                 return 1;
 659         if (!(xcr0 & XSTATE_FP))
 660                 return 1;
 661         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 662                 return 1;
 663
 664         /*
 665          * Do not allow the guest to set bits that we do not support
 666          * saving.  However, xcr0 bit 0 is always set, even if the
 667          * emulated CPU does not support XSAVE (see fx_init).
 668          */
 669         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 670         if (xcr0 & ~valid_bits)
 671                 return 1;
 672
 673         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 674                 return 1;
 675
 676         if (xcr0 & XSTATE_AVX512) {
 677                 if (!(xcr0 & XSTATE_YMM))
 678                         return 1;
 679                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 680                         return 1;
 681         }
 682         kvm_put_guest_xcr0(vcpu);
 683         vcpu->arch.xcr0 = xcr0;
 684
 685         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 686                 kvm_update_cpuid(vcpu);
 687         return 0;
 688 }
 689
 690 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 691 {
 692         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 693             __kvm_set_xcr(vcpu, index, xcr)) {
 694                 kvm_inject_gp(vcpu, 0);
 695                 return 1;
 696         }
 697         return 0;
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 700
 701 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 702 {
 703         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 704         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 705                                    X86_CR4_PAE | X86_CR4_SMEP;
 706         if (cr4 & CR4_RESERVED_BITS)
 707                 return 1;
 708
 709         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 710                 return 1;
 711
 712         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 713                 return 1;
 714
 715         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 716                 return 1;
 717
 718         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 719                 return 1;
 720
 721         if (is_long_mode(vcpu)) {
 722                 if (!(cr4 & X86_CR4_PAE))
 723                         return 1;
 724         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 725                    && ((cr4 ^ old_cr4) & pdptr_bits)
 726                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 727                                    kvm_read_cr3(vcpu)))
 728                 return 1;
 729
 730         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 731                 if (!guest_cpuid_has_pcid(vcpu))
 732                         return 1;
 733
 734                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 735                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 736                         return 1;
 737         }
 738
 739         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 740                 return 1;
 741
 742         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 743             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 744                 kvm_mmu_reset_context(vcpu);
 745
 746         if ((cr4 ^ old_cr4) & X86_CR4_SMAP)
 747                 update_permission_bitmask(vcpu, vcpu->arch.walk_mmu, false);
 748
 749         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 750                 kvm_update_cpuid(vcpu);
 751
 752         return 0;
 753 }
 754 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 755
 756 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 757 {
 758 #ifdef CONFIG_X86_64
 759         cr3 &= ~CR3_PCID_INVD;
 760 #endif
 761
 762         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 763                 kvm_mmu_sync_roots(vcpu);
 764                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 765                 return 0;
 766         }
 767
 768         if (is_long_mode(vcpu)) {
 769                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 770                         return 1;
 771         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 772                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 773                 return 1;
 774
 775         vcpu->arch.cr3 = cr3;
 776         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 777         kvm_mmu_new_cr3(vcpu);
 778         return 0;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 781
 782 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 783 {
 784         if (cr8 & CR8_RESERVED_BITS)
 785                 return 1;
 786         if (irqchip_in_kernel(vcpu->kvm))
 787                 kvm_lapic_set_tpr(vcpu, cr8);
 788         else
 789                 vcpu->arch.cr8 = cr8;
 790         return 0;
 791 }
 792 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 793
 794 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 795 {
 796         if (irqchip_in_kernel(vcpu->kvm))
 797                 return kvm_lapic_get_cr8(vcpu);
 798         else
 799                 return vcpu->arch.cr8;
 800 }
 801 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 802
 803 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 804 {
 805         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 806                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 807 }
 808
 809 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 810 {
 811         unsigned long dr7;
 812
 813         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 814                 dr7 = vcpu->arch.guest_debug_dr7;
 815         else
 816                 dr7 = vcpu->arch.dr7;
 817         kvm_x86_ops->set_dr7(vcpu, dr7);
 818         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 819         if (dr7 & DR7_BP_EN_MASK)
 820                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 821 }
 822
 823 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 824 {
 825         u64 fixed = DR6_FIXED_1;
 826
 827         if (!guest_cpuid_has_rtm(vcpu))
 828                 fixed |= DR6_RTM;
 829         return fixed;
 830 }
 831
 832 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 833 {
 834         switch (dr) {
 835         case 0 ... 3:
 836                 vcpu->arch.db[dr] = val;
 837                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 838                         vcpu->arch.eff_db[dr] = val;
 839                 break;
 840         case 4:
 841                 /* fall through */
 842         case 6:
 843                 if (val & 0xffffffff00000000ULL)
 844                         return -1; /* #GP */
 845                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 846                 kvm_update_dr6(vcpu);
 847                 break;
 848         case 5:
 849                 /* fall through */
 850         default: /* 7 */
 851                 if (val & 0xffffffff00000000ULL)
 852                         return -1; /* #GP */
 853                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 854                 kvm_update_dr7(vcpu);
 855                 break;
 856         }
 857
 858         return 0;
 859 }
 860
 861 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 862 {
 863         if (__kvm_set_dr(vcpu, dr, val)) {
 864                 kvm_inject_gp(vcpu, 0);
 865                 return 1;
 866         }
 867         return 0;
 868 }
 869 EXPORT_SYMBOL_GPL(kvm_set_dr);
 870
 871 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 872 {
 873         switch (dr) {
 874         case 0 ... 3:
 875                 *val = vcpu->arch.db[dr];
 876                 break;
 877         case 4:
 878                 /* fall through */
 879         case 6:
 880                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 881                         *val = vcpu->arch.dr6;
 882                 else
 883                         *val = kvm_x86_ops->get_dr6(vcpu);
 884                 break;
 885         case 5:
 886                 /* fall through */
 887         default: /* 7 */
 888                 *val = vcpu->arch.dr7;
 889                 break;
 890         }
 891         return 0;
 892 }
 893 EXPORT_SYMBOL_GPL(kvm_get_dr);
 894
 895 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 896 {
 897         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 898         u64 data;
 899         int err;
 900
 901         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 902         if (err)
 903                 return err;
 904         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 905         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 906         return err;
 907 }
 908 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 909
 910 /*
 911  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 912  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 913  *
 914  * This list is modified at module load time to reflect the
 915  * capabilities of the host cpu. This capabilities test skips MSRs that are
 916  * kvm-specific. Those are put in the beginning of the list.
 917  */
 918
 919 #define KVM_SAVE_MSRS_BEGIN     12
 920 static u32 msrs_to_save[] = {
 921         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 922         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 923         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 924         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 925         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 926         MSR_KVM_PV_EOI_EN,
 927         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 928         MSR_STAR,
 929 #ifdef CONFIG_X86_64
 930         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 931 #endif
 932         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 933         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 934 };
 935
 936 static unsigned num_msrs_to_save;
 937
 938 static const u32 emulated_msrs[] = {
 939         MSR_IA32_TSC_ADJUST,
 940         MSR_IA32_TSCDEADLINE,
 941         MSR_IA32_MISC_ENABLE,
 942         MSR_IA32_MCG_STATUS,
 943         MSR_IA32_MCG_CTL,
 944 };
 945
 946 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 947 {
 948         if (efer & efer_reserved_bits)
 949                 return false;
 950
 951         if (efer & EFER_FFXSR) {
 952                 struct kvm_cpuid_entry2 *feat;
 953
 954                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 955                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 956                         return false;
 957         }
 958
 959         if (efer & EFER_SVME) {
 960                 struct kvm_cpuid_entry2 *feat;
 961
 962                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 963                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 964                         return false;
 965         }
 966
 967         return true;
 968 }
 969 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 970
 971 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 972 {
 973         u64 old_efer = vcpu->arch.efer;
 974
 975         if (!kvm_valid_efer(vcpu, efer))
 976                 return 1;
 977
 978         if (is_paging(vcpu)
 979             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 980                 return 1;
 981
 982         efer &= ~EFER_LMA;
 983         efer |= vcpu->arch.efer & EFER_LMA;
 984
 985         kvm_x86_ops->set_efer(vcpu, efer);
 986
 987         /* Update reserved bits */
 988         if ((efer ^ old_efer) & EFER_NX)
 989                 kvm_mmu_reset_context(vcpu);
 990
 991         return 0;
 992 }
 993
 994 void kvm_enable_efer_bits(u64 mask)
 995 {
 996        efer_reserved_bits &= ~mask;
 997 }
 998 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 999
1000 /*
1001  * Writes msr value into into the appropriate "register".
1002  * Returns 0 on success, non-0 otherwise.
1003  * Assumes vcpu_load() was already called.
1004  */
1005 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1006 {
1007         switch (msr->index) {
1008         case MSR_FS_BASE:
1009         case MSR_GS_BASE:
1010         case MSR_KERNEL_GS_BASE:
1011         case MSR_CSTAR:
1012         case MSR_LSTAR:
1013                 if (is_noncanonical_address(msr->data))
1014                         return 1;
1015                 break;
1016         case MSR_IA32_SYSENTER_EIP:
1017         case MSR_IA32_SYSENTER_ESP:
1018                 /*
1019                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1020                  * non-canonical address is written on Intel but not on
1021                  * AMD (which ignores the top 32-bits, because it does
1022                  * not implement 64-bit SYSENTER).
1023                  *
1024                  * 64-bit code should hence be able to write a non-canonical
1025                  * value on AMD.  Making the address canonical ensures that
1026                  * vmentry does not fail on Intel after writing a non-canonical
1027                  * value, and that something deterministic happens if the guest
1028                  * invokes 64-bit SYSENTER.
1029                  */
1030                 msr->data = get_canonical(msr->data);
1031         }
1032         return kvm_x86_ops->set_msr(vcpu, msr);
1033 }
1034 EXPORT_SYMBOL_GPL(kvm_set_msr);
1035
1036 /*
1037  * Adapt set_msr() to msr_io()'s calling convention
1038  */
1039 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1040 {
1041         struct msr_data msr;
1042
1043         msr.data = *data;
1044         msr.index = index;
1045         msr.host_initiated = true;
1046         return kvm_set_msr(vcpu, &msr);
1047 }
1048
1049 #ifdef CONFIG_X86_64
1050 struct pvclock_gtod_data {
1051         seqcount_t      seq;
1052
1053         struct { /* extract of a clocksource struct */
1054                 int vclock_mode;
1055                 cycle_t cycle_last;
1056                 cycle_t mask;
1057                 u32     mult;
1058                 u32     shift;
1059         } clock;
1060
1061         u64             boot_ns;
1062         u64             nsec_base;
1063 };
1064
1065 static struct pvclock_gtod_data pvclock_gtod_data;
1066
1067 static void update_pvclock_gtod(struct timekeeper *tk)
1068 {
1069         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1070         u64 boot_ns;
1071
1072         boot_ns = ktime_to_ns(ktime_add(tk->tkr.base_mono, tk->offs_boot));
1073
1074         write_seqcount_begin(&vdata->seq);
1075
1076         /* copy pvclock gtod data */
1077         vdata->clock.vclock_mode        = tk->tkr.clock->archdata.vclock_mode;
1078         vdata->clock.cycle_last         = tk->tkr.cycle_last;
1079         vdata->clock.mask               = tk->tkr.mask;
1080         vdata->clock.mult               = tk->tkr.mult;
1081         vdata->clock.shift              = tk->tkr.shift;
1082
1083         vdata->boot_ns                  = boot_ns;
1084         vdata->nsec_base                = tk->tkr.xtime_nsec;
1085
1086         write_seqcount_end(&vdata->seq);
1087 }
1088 #endif
1089
1090 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1091 {
1092         /*
1093          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1094          * vcpu_enter_guest.  This function is only called from
1095          * the physical CPU that is running vcpu.
1096          */
1097         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1098 }
1099
1100 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1101 {
1102         int version;
1103         int r;
1104         struct pvclock_wall_clock wc;
1105         struct timespec boot;
1106
1107         if (!wall_clock)
1108                 return;
1109
1110         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1111         if (r)
1112                 return;
1113
1114         if (version & 1)
1115                 ++version;  /* first time write, random junk */
1116
1117         ++version;
1118
1119         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1120
1121         /*
1122          * The guest calculates current wall clock time by adding
1123          * system time (updated by kvm_guest_time_update below) to the
1124          * wall clock specified here.  guest system time equals host
1125          * system time for us, thus we must fill in host boot time here.
1126          */
1127         getboottime(&boot);
1128
1129         if (kvm->arch.kvmclock_offset) {
1130                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1131                 boot = timespec_sub(boot, ts);
1132         }
1133         wc.sec = boot.tv_sec;
1134         wc.nsec = boot.tv_nsec;
1135         wc.version = version;
1136
1137         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1138
1139         version++;
1140         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1141 }
1142
1143 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1144 {
1145         uint32_t quotient, remainder;
1146
1147         /* Don't try to replace with do_div(), this one calculates
1148          * "(dividend << 32) / divisor" */
1149         __asm__ ( "divl %4"
1150                   : "=a" (quotient), "=d" (remainder)
1151                   : "0" (0), "1" (dividend), "r" (divisor) );
1152         return quotient;
1153 }
1154
1155 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1156                                s8 *pshift, u32 *pmultiplier)
1157 {
1158         uint64_t scaled64;
1159         int32_t  shift = 0;
1160         uint64_t tps64;
1161         uint32_t tps32;
1162
1163         tps64 = base_khz * 1000LL;
1164         scaled64 = scaled_khz * 1000LL;
1165         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1166                 tps64 >>= 1;
1167                 shift--;
1168         }
1169
1170         tps32 = (uint32_t)tps64;
1171         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1172                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1173                         scaled64 >>= 1;
1174                 else
1175                         tps32 <<= 1;
1176                 shift++;
1177         }
1178
1179         *pshift = shift;
1180         *pmultiplier = div_frac(scaled64, tps32);
1181
1182         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1183                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1184 }
1185
1186 static inline u64 get_kernel_ns(void)
1187 {
1188         return ktime_get_boot_ns();
1189 }
1190
1191 #ifdef CONFIG_X86_64
1192 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1193 #endif
1194
1195 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1196 static unsigned long max_tsc_khz;
1197
1198 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1199 {
1200         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1201                                    vcpu->arch.virtual_tsc_shift);
1202 }
1203
1204 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1205 {
1206         u64 v = (u64)khz * (1000000 + ppm);
1207         do_div(v, 1000000);
1208         return v;
1209 }
1210
1211 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1212 {
1213         u32 thresh_lo, thresh_hi;
1214         int use_scaling = 0;
1215
1216         /* tsc_khz can be zero if TSC calibration fails */
1217         if (this_tsc_khz == 0)
1218                 return;
1219
1220         /* Compute a scale to convert nanoseconds in TSC cycles */
1221         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1222                            &vcpu->arch.virtual_tsc_shift,
1223                            &vcpu->arch.virtual_tsc_mult);
1224         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1225
1226         /*
1227          * Compute the variation in TSC rate which is acceptable
1228          * within the range of tolerance and decide if the
1229          * rate being applied is within that bounds of the hardware
1230          * rate.  If so, no scaling or compensation need be done.
1231          */
1232         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1233         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1234         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1235                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1236                 use_scaling = 1;
1237         }
1238         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1239 }
1240
1241 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1242 {
1243         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1244                                       vcpu->arch.virtual_tsc_mult,
1245                                       vcpu->arch.virtual_tsc_shift);
1246         tsc += vcpu->arch.this_tsc_write;
1247         return tsc;
1248 }
1249
1250 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1251 {
1252 #ifdef CONFIG_X86_64
1253         bool vcpus_matched;
1254         struct kvm_arch *ka = &vcpu->kvm->arch;
1255         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1256
1257         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1258                          atomic_read(&vcpu->kvm->online_vcpus));
1259
1260         /*
1261          * Once the masterclock is enabled, always perform request in
1262          * order to update it.
1263          *
1264          * In order to enable masterclock, the host clocksource must be TSC
1265          * and the vcpus need to have matched TSCs.  When that happens,
1266          * perform request to enable masterclock.
1267          */
1268         if (ka->use_master_clock ||
1269             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1270                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1271
1272         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1273                             atomic_read(&vcpu->kvm->online_vcpus),
1274                             ka->use_master_clock, gtod->clock.vclock_mode);
1275 #endif
1276 }
1277
1278 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1279 {
1280         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1281         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1282 }
1283
1284 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1285 {
1286         struct kvm *kvm = vcpu->kvm;
1287         u64 offset, ns, elapsed;
1288         unsigned long flags;
1289         s64 usdiff;
1290         bool matched;
1291         bool already_matched;
1292         u64 data = msr->data;
1293
1294         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1295         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1296         ns = get_kernel_ns();
1297         elapsed = ns - kvm->arch.last_tsc_nsec;
1298
1299         if (vcpu->arch.virtual_tsc_khz) {
1300                 int faulted = 0;
1301
1302                 /* n.b - signed multiplication and division required */
1303                 usdiff = data - kvm->arch.last_tsc_write;
1304 #ifdef CONFIG_X86_64
1305                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1306 #else
1307                 /* do_div() only does unsigned */
1308                 asm("1: idivl %[divisor]\n"
1309                     "2: xor %%edx, %%edx\n"
1310                     "   movl $0, %[faulted]\n"
1311                     "3:\n"
1312                     ".section .fixup,\"ax\"\n"
1313                     "4: movl $1, %[faulted]\n"
1314                     "   jmp  3b\n"
1315                     ".previous\n"
1316
1317                 _ASM_EXTABLE(1b, 4b)
1318
1319                 : "=A"(usdiff), [faulted] "=r" (faulted)
1320                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1321
1322 #endif
1323                 do_div(elapsed, 1000);
1324                 usdiff -= elapsed;
1325                 if (usdiff < 0)
1326                         usdiff = -usdiff;
1327
1328                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1329                 if (faulted)
1330                         usdiff = USEC_PER_SEC;
1331         } else
1332                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1333
1334         /*
1335          * Special case: TSC write with a small delta (1 second) of virtual
1336          * cycle time against real time is interpreted as an attempt to
1337          * synchronize the CPU.
1338          *
1339          * For a reliable TSC, we can match TSC offsets, and for an unstable
1340          * TSC, we add elapsed time in this computation.  We could let the
1341          * compensation code attempt to catch up if we fall behind, but
1342          * it's better to try to match offsets from the beginning.
1343          */
1344         if (usdiff < USEC_PER_SEC &&
1345             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1346                 if (!check_tsc_unstable()) {
1347                         offset = kvm->arch.cur_tsc_offset;
1348                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1349                 } else {
1350                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1351                         data += delta;
1352                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1353                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1354                 }
1355                 matched = true;
1356                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1357         } else {
1358                 /*
1359                  * We split periods of matched TSC writes into generations.
1360                  * For each generation, we track the original measured
1361                  * nanosecond time, offset, and write, so if TSCs are in
1362                  * sync, we can match exact offset, and if not, we can match
1363                  * exact software computation in compute_guest_tsc()
1364                  *
1365                  * These values are tracked in kvm->arch.cur_xxx variables.
1366                  */
1367                 kvm->arch.cur_tsc_generation++;
1368                 kvm->arch.cur_tsc_nsec = ns;
1369                 kvm->arch.cur_tsc_write = data;
1370                 kvm->arch.cur_tsc_offset = offset;
1371                 matched = false;
1372                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1373                          kvm->arch.cur_tsc_generation, data);
1374         }
1375
1376         /*
1377          * We also track th most recent recorded KHZ, write and time to
1378          * allow the matching interval to be extended at each write.
1379          */
1380         kvm->arch.last_tsc_nsec = ns;
1381         kvm->arch.last_tsc_write = data;
1382         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1383
1384         vcpu->arch.last_guest_tsc = data;
1385
1386         /* Keep track of which generation this VCPU has synchronized to */
1387         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1388         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1389         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1390
1391         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1392                 update_ia32_tsc_adjust_msr(vcpu, offset);
1393         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1394         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1395
1396         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1397         if (!matched) {
1398                 kvm->arch.nr_vcpus_matched_tsc = 0;
1399         } else if (!already_matched) {
1400                 kvm->arch.nr_vcpus_matched_tsc++;
1401         }
1402
1403         kvm_track_tsc_matching(vcpu);
1404         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1405 }
1406
1407 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1408
1409 #ifdef CONFIG_X86_64
1410
1411 static cycle_t read_tsc(void)
1412 {
1413         cycle_t ret;
1414         u64 last;
1415
1416         /*
1417          * Empirically, a fence (of type that depends on the CPU)
1418          * before rdtsc is enough to ensure that rdtsc is ordered
1419          * with respect to loads.  The various CPU manuals are unclear
1420          * as to whether rdtsc can be reordered with later loads,
1421          * but no one has ever seen it happen.
1422          */
1423         rdtsc_barrier();
1424         ret = (cycle_t)vget_cycles();
1425
1426         last = pvclock_gtod_data.clock.cycle_last;
1427
1428         if (likely(ret >= last))
1429                 return ret;
1430
1431         /*
1432          * GCC likes to generate cmov here, but this branch is extremely
1433          * predictable (it's just a funciton of time and the likely is
1434          * very likely) and there's a data dependence, so force GCC
1435          * to generate a branch instead.  I don't barrier() because
1436          * we don't actually need a barrier, and if this function
1437          * ever gets inlined it will generate worse code.
1438          */
1439         asm volatile ("");
1440         return last;
1441 }
1442
1443 static inline u64 vgettsc(cycle_t *cycle_now)
1444 {
1445         long v;
1446         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1447
1448         *cycle_now = read_tsc();
1449
1450         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1451         return v * gtod->clock.mult;
1452 }
1453
1454 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1455 {
1456         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1457         unsigned long seq;
1458         int mode;
1459         u64 ns;
1460
1461         do {
1462                 seq = read_seqcount_begin(&gtod->seq);
1463                 mode = gtod->clock.vclock_mode;
1464                 ns = gtod->nsec_base;
1465                 ns += vgettsc(cycle_now);
1466                 ns >>= gtod->clock.shift;
1467                 ns += gtod->boot_ns;
1468         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1469         *t = ns;
1470
1471         return mode;
1472 }
1473
1474 /* returns true if host is using tsc clocksource */
1475 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1476 {
1477         /* checked again under seqlock below */
1478         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1479                 return false;
1480
1481         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1482 }
1483 #endif
1484
1485 /*
1486  *
1487  * Assuming a stable TSC across physical CPUS, and a stable TSC
1488  * across virtual CPUs, the following condition is possible.
1489  * Each numbered line represents an event visible to both
1490  * CPUs at the next numbered event.
1491  *
1492  * "timespecX" represents host monotonic time. "tscX" represents
1493  * RDTSC value.
1494  *
1495  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1496  *
1497  * 1.  read timespec0,tsc0
1498  * 2.                                   | timespec1 = timespec0 + N
1499  *                                      | tsc1 = tsc0 + M
1500  * 3. transition to guest               | transition to guest
1501  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1502  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1503  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1504  *
1505  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1506  *
1507  *      - ret0 < ret1
1508  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1509  *              ...
1510  *      - 0 < N - M => M < N
1511  *
1512  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1513  * always the case (the difference between two distinct xtime instances
1514  * might be smaller then the difference between corresponding TSC reads,
1515  * when updating guest vcpus pvclock areas).
1516  *
1517  * To avoid that problem, do not allow visibility of distinct
1518  * system_timestamp/tsc_timestamp values simultaneously: use a master
1519  * copy of host monotonic time values. Update that master copy
1520  * in lockstep.
1521  *
1522  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1523  *
1524  */
1525
1526 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1527 {
1528 #ifdef CONFIG_X86_64
1529         struct kvm_arch *ka = &kvm->arch;
1530         int vclock_mode;
1531         bool host_tsc_clocksource, vcpus_matched;
1532
1533         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1534                         atomic_read(&kvm->online_vcpus));
1535
1536         /*
1537          * If the host uses TSC clock, then passthrough TSC as stable
1538          * to the guest.
1539          */
1540         host_tsc_clocksource = kvm_get_time_and_clockread(
1541                                         &ka->master_kernel_ns,
1542                                         &ka->master_cycle_now);
1543
1544         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1545                                 && !backwards_tsc_observed
1546                                 && !ka->boot_vcpu_runs_old_kvmclock;
1547
1548         if (ka->use_master_clock)
1549                 atomic_set(&kvm_guest_has_master_clock, 1);
1550
1551         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1552         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1553                                         vcpus_matched);
1554 #endif
1555 }
1556
1557 static void kvm_gen_update_masterclock(struct kvm *kvm)
1558 {
1559 #ifdef CONFIG_X86_64
1560         int i;
1561         struct kvm_vcpu *vcpu;
1562         struct kvm_arch *ka = &kvm->arch;
1563
1564         spin_lock(&ka->pvclock_gtod_sync_lock);
1565         kvm_make_mclock_inprogress_request(kvm);
1566         /* no guest entries from this point */
1567         pvclock_update_vm_gtod_copy(kvm);
1568
1569         kvm_for_each_vcpu(i, vcpu, kvm)
1570                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1571
1572         /* guest entries allowed */
1573         kvm_for_each_vcpu(i, vcpu, kvm)
1574                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1575
1576         spin_unlock(&ka->pvclock_gtod_sync_lock);
1577 #endif
1578 }
1579
1580 static int kvm_guest_time_update(struct kvm_vcpu *v)
1581 {
1582         unsigned long flags, this_tsc_khz;
1583         struct kvm_vcpu_arch *vcpu = &v->arch;
1584         struct kvm_arch *ka = &v->kvm->arch;
1585         s64 kernel_ns;
1586         u64 tsc_timestamp, host_tsc;
1587         struct pvclock_vcpu_time_info guest_hv_clock;
1588         u8 pvclock_flags;
1589         bool use_master_clock;
1590
1591         kernel_ns = 0;
1592         host_tsc = 0;
1593
1594         /*
1595          * If the host uses TSC clock, then passthrough TSC as stable
1596          * to the guest.
1597          */
1598         spin_lock(&ka->pvclock_gtod_sync_lock);
1599         use_master_clock = ka->use_master_clock;
1600         if (use_master_clock) {
1601                 host_tsc = ka->master_cycle_now;
1602                 kernel_ns = ka->master_kernel_ns;
1603         }
1604         spin_unlock(&ka->pvclock_gtod_sync_lock);
1605
1606         /* Keep irq disabled to prevent changes to the clock */
1607         local_irq_save(flags);
1608         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1609         if (unlikely(this_tsc_khz == 0)) {
1610                 local_irq_restore(flags);
1611                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1612                 return 1;
1613         }
1614         if (!use_master_clock) {
1615                 host_tsc = native_read_tsc();
1616                 kernel_ns = get_kernel_ns();
1617         }
1618
1619         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1620
1621         /*
1622          * We may have to catch up the TSC to match elapsed wall clock
1623          * time for two reasons, even if kvmclock is used.
1624          *   1) CPU could have been running below the maximum TSC rate
1625          *   2) Broken TSC compensation resets the base at each VCPU
1626          *      entry to avoid unknown leaps of TSC even when running
1627          *      again on the same CPU.  This may cause apparent elapsed
1628          *      time to disappear, and the guest to stand still or run
1629          *      very slowly.
1630          */
1631         if (vcpu->tsc_catchup) {
1632                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1633                 if (tsc > tsc_timestamp) {
1634                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1635                         tsc_timestamp = tsc;
1636                 }
1637         }
1638
1639         local_irq_restore(flags);
1640
1641         if (!vcpu->pv_time_enabled)
1642                 return 0;
1643
1644         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1645                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1646                                    &vcpu->hv_clock.tsc_shift,
1647                                    &vcpu->hv_clock.tsc_to_system_mul);
1648                 vcpu->hw_tsc_khz = this_tsc_khz;
1649         }
1650
1651         /* With all the info we got, fill in the values */
1652         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1653         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1654         vcpu->last_guest_tsc = tsc_timestamp;
1655
1656         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1657                 &guest_hv_clock, sizeof(guest_hv_clock))))
1658                 return 0;
1659
1660         /*
1661          * The interface expects us to write an even number signaling that the
1662          * update is finished. Since the guest won't see the intermediate
1663          * state, we just increase by 2 at the end.
1664          */
1665         vcpu->hv_clock.version = guest_hv_clock.version + 2;
1666
1667         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1668         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1669
1670         if (vcpu->pvclock_set_guest_stopped_request) {
1671                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1672                 vcpu->pvclock_set_guest_stopped_request = false;
1673         }
1674
1675         /* If the host uses TSC clocksource, then it is stable */
1676         if (use_master_clock)
1677                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1678
1679         vcpu->hv_clock.flags = pvclock_flags;
1680
1681         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1682
1683         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1684                                 &vcpu->hv_clock,
1685                                 sizeof(vcpu->hv_clock));
1686         return 0;
1687 }
1688
1689 /*
1690  * kvmclock updates which are isolated to a given vcpu, such as
1691  * vcpu->cpu migration, should not allow system_timestamp from
1692  * the rest of the vcpus to remain static. Otherwise ntp frequency
1693  * correction applies to one vcpu's system_timestamp but not
1694  * the others.
1695  *
1696  * So in those cases, request a kvmclock update for all vcpus.
1697  * We need to rate-limit these requests though, as they can
1698  * considerably slow guests that have a large number of vcpus.
1699  * The time for a remote vcpu to update its kvmclock is bound
1700  * by the delay we use to rate-limit the updates.
1701  */
1702
1703 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1704
1705 static void kvmclock_update_fn(struct work_struct *work)
1706 {
1707         int i;
1708         struct delayed_work *dwork = to_delayed_work(work);
1709         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1710                                            kvmclock_update_work);
1711         struct kvm *kvm = container_of(ka, struct kvm, arch);
1712         struct kvm_vcpu *vcpu;
1713
1714         kvm_for_each_vcpu(i, vcpu, kvm) {
1715                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1716                 kvm_vcpu_kick(vcpu);
1717         }
1718 }
1719
1720 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1721 {
1722         struct kvm *kvm = v->kvm;
1723
1724         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1725         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1726                                         KVMCLOCK_UPDATE_DELAY);
1727 }
1728
1729 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1730
1731 static void kvmclock_sync_fn(struct work_struct *work)
1732 {
1733         struct delayed_work *dwork = to_delayed_work(work);
1734         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1735                                            kvmclock_sync_work);
1736         struct kvm *kvm = container_of(ka, struct kvm, arch);
1737
1738         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1739         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1740                                         KVMCLOCK_SYNC_PERIOD);
1741 }
1742
1743 static bool msr_mtrr_valid(unsigned msr)
1744 {
1745         switch (msr) {
1746         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1747         case MSR_MTRRfix64K_00000:
1748         case MSR_MTRRfix16K_80000:
1749         case MSR_MTRRfix16K_A0000:
1750         case MSR_MTRRfix4K_C0000:
1751         case MSR_MTRRfix4K_C8000:
1752         case MSR_MTRRfix4K_D0000:
1753         case MSR_MTRRfix4K_D8000:
1754         case MSR_MTRRfix4K_E0000:
1755         case MSR_MTRRfix4K_E8000:
1756         case MSR_MTRRfix4K_F0000:
1757         case MSR_MTRRfix4K_F8000:
1758         case MSR_MTRRdefType:
1759         case MSR_IA32_CR_PAT:
1760                 return true;
1761         case 0x2f8:
1762                 return true;
1763         }
1764         return false;
1765 }
1766
1767 static bool valid_pat_type(unsigned t)
1768 {
1769         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1770 }
1771
1772 static bool valid_mtrr_type(unsigned t)
1773 {
1774         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1775 }
1776
1777 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1778 {
1779         int i;
1780         u64 mask;
1781
1782         if (!msr_mtrr_valid(msr))
1783                 return false;
1784
1785         if (msr == MSR_IA32_CR_PAT) {
1786                 for (i = 0; i < 8; i++)
1787                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1788                                 return false;
1789                 return true;
1790         } else if (msr == MSR_MTRRdefType) {
1791                 if (data & ~0xcff)
1792                         return false;
1793                 return valid_mtrr_type(data & 0xff);
1794         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1795                 for (i = 0; i < 8 ; i++)
1796                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1797                                 return false;
1798                 return true;
1799         }
1800
1801         /* variable MTRRs */
1802         WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
1803
1804         mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
1805         if ((msr & 1) == 0) {
1806                 /* MTRR base */
1807                 if (!valid_mtrr_type(data & 0xff))
1808                         return false;
1809                 mask |= 0xf00;
1810         } else
1811                 /* MTRR mask */
1812                 mask |= 0x7ff;
1813         if (data & mask) {
1814                 kvm_inject_gp(vcpu, 0);
1815                 return false;
1816         }
1817
1818         return true;
1819 }
1820 EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
1821
1822 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1823 {
1824         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1825
1826         if (!kvm_mtrr_valid(vcpu, msr, data))
1827                 return 1;
1828
1829         if (msr == MSR_MTRRdefType) {
1830                 vcpu->arch.mtrr_state.def_type = data;
1831                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1832         } else if (msr == MSR_MTRRfix64K_00000)
1833                 p[0] = data;
1834         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1835                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1836         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1837                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1838         else if (msr == MSR_IA32_CR_PAT)
1839                 vcpu->arch.pat = data;
1840         else {  /* Variable MTRRs */
1841                 int idx, is_mtrr_mask;
1842                 u64 *pt;
1843
1844                 idx = (msr - 0x200) / 2;
1845                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1846                 if (!is_mtrr_mask)
1847                         pt =
1848                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1849                 else
1850                         pt =
1851                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1852                 *pt = data;
1853         }
1854
1855         kvm_mmu_reset_context(vcpu);
1856         return 0;
1857 }
1858
1859 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1860 {
1861         u64 mcg_cap = vcpu->arch.mcg_cap;
1862         unsigned bank_num = mcg_cap & 0xff;
1863
1864         switch (msr) {
1865         case MSR_IA32_MCG_STATUS:
1866                 vcpu->arch.mcg_status = data;
1867                 break;
1868         case MSR_IA32_MCG_CTL:
1869                 if (!(mcg_cap & MCG_CTL_P))
1870                         return 1;
1871                 if (data != 0 && data != ~(u64)0)
1872                         return -1;
1873                 vcpu->arch.mcg_ctl = data;
1874                 break;
1875         default:
1876                 if (msr >= MSR_IA32_MC0_CTL &&
1877                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1878                         u32 offset = msr - MSR_IA32_MC0_CTL;
1879                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1880                          * some Linux kernels though clear bit 10 in bank 4 to
1881                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1882                          * this to avoid an uncatched #GP in the guest
1883                          */
1884                         if ((offset & 0x3) == 0 &&
1885                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1886                                 return -1;
1887                         vcpu->arch.mce_banks[offset] = data;
1888                         break;
1889                 }
1890                 return 1;
1891         }
1892         return 0;
1893 }
1894
1895 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1896 {
1897         struct kvm *kvm = vcpu->kvm;
1898         int lm = is_long_mode(vcpu);
1899         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1900                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1901         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1902                 : kvm->arch.xen_hvm_config.blob_size_32;
1903         u32 page_num = data & ~PAGE_MASK;
1904         u64 page_addr = data & PAGE_MASK;
1905         u8 *page;
1906         int r;
1907
1908         r = -E2BIG;
1909         if (page_num >= blob_size)
1910                 goto out;
1911         r = -ENOMEM;
1912         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1913         if (IS_ERR(page)) {
1914                 r = PTR_ERR(page);
1915                 goto out;
1916         }
1917         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1918                 goto out_free;
1919         r = 0;
1920 out_free:
1921         kfree(page);
1922 out:
1923         return r;
1924 }
1925
1926 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1927 {
1928         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1929 }
1930
1931 static bool kvm_hv_msr_partition_wide(u32 msr)
1932 {
1933         bool r = false;
1934         switch (msr) {
1935         case HV_X64_MSR_GUEST_OS_ID:
1936         case HV_X64_MSR_HYPERCALL:
1937         case HV_X64_MSR_REFERENCE_TSC:
1938         case HV_X64_MSR_TIME_REF_COUNT:
1939                 r = true;
1940                 break;
1941         }
1942
1943         return r;
1944 }
1945
1946 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1947 {
1948         struct kvm *kvm = vcpu->kvm;
1949
1950         switch (msr) {
1951         case HV_X64_MSR_GUEST_OS_ID:
1952                 kvm->arch.hv_guest_os_id = data;
1953                 /* setting guest os id to zero disables hypercall page */
1954                 if (!kvm->arch.hv_guest_os_id)
1955                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1956                 break;
1957         case HV_X64_MSR_HYPERCALL: {
1958                 u64 gfn;
1959                 unsigned long addr;
1960                 u8 instructions[4];
1961
1962                 /* if guest os id is not set hypercall should remain disabled */
1963                 if (!kvm->arch.hv_guest_os_id)
1964                         break;
1965                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1966                         kvm->arch.hv_hypercall = data;
1967                         break;
1968                 }
1969                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1970                 addr = gfn_to_hva(kvm, gfn);
1971                 if (kvm_is_error_hva(addr))
1972                         return 1;
1973                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1974                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1975                 if (__copy_to_user((void __user *)addr, instructions, 4))
1976                         return 1;
1977                 kvm->arch.hv_hypercall = data;
1978                 mark_page_dirty(kvm, gfn);
1979                 break;
1980         }
1981         case HV_X64_MSR_REFERENCE_TSC: {
1982                 u64 gfn;
1983                 HV_REFERENCE_TSC_PAGE tsc_ref;
1984                 memset(&tsc_ref, 0, sizeof(tsc_ref));
1985                 kvm->arch.hv_tsc_page = data;
1986                 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1987                         break;
1988                 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
1989                 if (kvm_write_guest(kvm, gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
1990                         &tsc_ref, sizeof(tsc_ref)))
1991                         return 1;
1992                 mark_page_dirty(kvm, gfn);
1993                 break;
1994         }
1995         default:
1996                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1997                             "data 0x%llx\n", msr, data);
1998                 return 1;
1999         }
2000         return 0;
2001 }
2002
2003 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2004 {
2005         switch (msr) {
2006         case HV_X64_MSR_APIC_ASSIST_PAGE: {
2007                 u64 gfn;
2008                 unsigned long addr;
2009
2010                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
2011                         vcpu->arch.hv_vapic = data;
2012                         if (kvm_lapic_enable_pv_eoi(vcpu, 0))
2013                                 return 1;
2014                         break;
2015                 }
2016                 gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
2017                 addr = gfn_to_hva(vcpu->kvm, gfn);
2018                 if (kvm_is_error_hva(addr))
2019                         return 1;
2020                 if (__clear_user((void __user *)addr, PAGE_SIZE))
2021                         return 1;
2022                 vcpu->arch.hv_vapic = data;
2023                 mark_page_dirty(vcpu->kvm, gfn);
2024                 if (kvm_lapic_enable_pv_eoi(vcpu, gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
2025                         return 1;
2026                 break;
2027         }
2028         case HV_X64_MSR_EOI:
2029                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
2030         case HV_X64_MSR_ICR:
2031                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
2032         case HV_X64_MSR_TPR:
2033                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
2034         default:
2035                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
2036                             "data 0x%llx\n", msr, data);
2037                 return 1;
2038         }
2039
2040         return 0;
2041 }
2042
2043 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2044 {
2045         gpa_t gpa = data & ~0x3f;
2046
2047         /* Bits 2:5 are reserved, Should be zero */
2048         if (data & 0x3c)
2049                 return 1;
2050
2051         vcpu->arch.apf.msr_val = data;
2052
2053         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2054                 kvm_clear_async_pf_completion_queue(vcpu);
2055                 kvm_async_pf_hash_reset(vcpu);
2056                 return 0;
2057         }
2058
2059         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2060                                         sizeof(u32)))
2061                 return 1;
2062
2063         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2064         kvm_async_pf_wakeup_all(vcpu);
2065         return 0;
2066 }
2067
2068 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2069 {
2070         vcpu->arch.pv_time_enabled = false;
2071 }
2072
2073 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2074 {
2075         u64 delta;
2076
2077         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2078                 return;
2079
2080         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2081         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2082         vcpu->arch.st.accum_steal = delta;
2083 }
2084
2085 static void record_steal_time(struct kvm_vcpu *vcpu)
2086 {
2087         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2088                 return;
2089
2090         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2091                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2092                 return;
2093
2094         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2095         vcpu->arch.st.steal.version += 2;
2096         vcpu->arch.st.accum_steal = 0;
2097
2098         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2099                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2100 }
2101
2102 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2103 {
2104         bool pr = false;
2105         u32 msr = msr_info->index;
2106         u64 data = msr_info->data;
2107
2108         switch (msr) {
2109         case MSR_AMD64_NB_CFG:
2110         case MSR_IA32_UCODE_REV:
2111         case MSR_IA32_UCODE_WRITE:
2112         case MSR_VM_HSAVE_PA:
2113         case MSR_AMD64_PATCH_LOADER:
2114         case MSR_AMD64_BU_CFG2:
2115                 break;
2116
2117         case MSR_EFER:
2118                 return set_efer(vcpu, data);
2119         case MSR_K7_HWCR:
2120                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2121                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2122                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2123                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2124                 if (data != 0) {
2125                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2126                                     data);
2127                         return 1;
2128                 }
2129                 break;
2130         case MSR_FAM10H_MMIO_CONF_BASE:
2131                 if (data != 0) {
2132                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2133                                     "0x%llx\n", data);
2134                         return 1;
2135                 }
2136                 break;
2137         case MSR_IA32_DEBUGCTLMSR:
2138                 if (!data) {
2139                         /* We support the non-activated case already */
2140                         break;
2141                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2142                         /* Values other than LBR and BTF are vendor-specific,
2143                            thus reserved and should throw a #GP */
2144                         return 1;
2145                 }
2146                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2147                             __func__, data);
2148                 break;
2149         case 0x200 ... 0x2ff:
2150                 return set_msr_mtrr(vcpu, msr, data);
2151         case MSR_IA32_APICBASE:
2152                 return kvm_set_apic_base(vcpu, msr_info);
2153         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2154                 return kvm_x2apic_msr_write(vcpu, msr, data);
2155         case MSR_IA32_TSCDEADLINE:
2156                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2157                 break;
2158         case MSR_IA32_TSC_ADJUST:
2159                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2160                         if (!msr_info->host_initiated) {
2161                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2162                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2163                         }
2164                         vcpu->arch.ia32_tsc_adjust_msr = data;
2165                 }
2166                 break;
2167         case MSR_IA32_MISC_ENABLE:
2168                 vcpu->arch.ia32_misc_enable_msr = data;
2169                 break;
2170         case MSR_KVM_WALL_CLOCK_NEW:
2171         case MSR_KVM_WALL_CLOCK:
2172                 vcpu->kvm->arch.wall_clock = data;
2173                 kvm_write_wall_clock(vcpu->kvm, data);
2174                 break;
2175         case MSR_KVM_SYSTEM_TIME_NEW:
2176         case MSR_KVM_SYSTEM_TIME: {
2177                 u64 gpa_offset;
2178                 struct kvm_arch *ka = &vcpu->kvm->arch;
2179
2180                 kvmclock_reset(vcpu);
2181
2182                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2183                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2184
2185                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2186                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2187                                         &vcpu->requests);
2188
2189                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2190                 }
2191
2192                 vcpu->arch.time = data;
2193                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2194
2195                 /* we verify if the enable bit is set... */
2196                 if (!(data & 1))
2197                         break;
2198
2199                 gpa_offset = data & ~(PAGE_MASK | 1);
2200
2201                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2202                      &vcpu->arch.pv_time, data & ~1ULL,
2203                      sizeof(struct pvclock_vcpu_time_info)))
2204                         vcpu->arch.pv_time_enabled = false;
2205                 else
2206                         vcpu->arch.pv_time_enabled = true;
2207
2208                 break;
2209         }
2210         case MSR_KVM_ASYNC_PF_EN:
2211                 if (kvm_pv_enable_async_pf(vcpu, data))
2212                         return 1;
2213                 break;
2214         case MSR_KVM_STEAL_TIME:
2215
2216                 if (unlikely(!sched_info_on()))
2217                         return 1;
2218
2219                 if (data & KVM_STEAL_RESERVED_MASK)
2220                         return 1;
2221
2222                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2223                                                 data & KVM_STEAL_VALID_BITS,
2224                                                 sizeof(struct kvm_steal_time)))
2225                         return 1;
2226
2227                 vcpu->arch.st.msr_val = data;
2228
2229                 if (!(data & KVM_MSR_ENABLED))
2230                         break;
2231
2232                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2233
2234                 preempt_disable();
2235                 accumulate_steal_time(vcpu);
2236                 preempt_enable();
2237
2238                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2239
2240                 break;
2241         case MSR_KVM_PV_EOI_EN:
2242                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2243                         return 1;
2244                 break;
2245
2246         case MSR_IA32_MCG_CTL:
2247         case MSR_IA32_MCG_STATUS:
2248         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2249                 return set_msr_mce(vcpu, msr, data);
2250
2251         /* Performance counters are not protected by a CPUID bit,
2252          * so we should check all of them in the generic path for the sake of
2253          * cross vendor migration.
2254          * Writing a zero into the event select MSRs disables them,
2255          * which we perfectly emulate ;-). Any other value should be at least
2256          * reported, some guests depend on them.
2257          */
2258         case MSR_K7_EVNTSEL0:
2259         case MSR_K7_EVNTSEL1:
2260         case MSR_K7_EVNTSEL2:
2261         case MSR_K7_EVNTSEL3:
2262                 if (data != 0)
2263                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2264                                     "0x%x data 0x%llx\n", msr, data);
2265                 break;
2266         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2267          * so we ignore writes to make it happy.
2268          */
2269         case MSR_K7_PERFCTR0:
2270         case MSR_K7_PERFCTR1:
2271         case MSR_K7_PERFCTR2:
2272         case MSR_K7_PERFCTR3:
2273                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2274                             "0x%x data 0x%llx\n", msr, data);
2275                 break;
2276         case MSR_P6_PERFCTR0:
2277         case MSR_P6_PERFCTR1:
2278                 pr = true;
2279         case MSR_P6_EVNTSEL0:
2280         case MSR_P6_EVNTSEL1:
2281                 if (kvm_pmu_msr(vcpu, msr))
2282                         return kvm_pmu_set_msr(vcpu, msr_info);
2283
2284                 if (pr || data != 0)
2285                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2286                                     "0x%x data 0x%llx\n", msr, data);
2287                 break;
2288         case MSR_K7_CLK_CTL:
2289                 /*
2290                  * Ignore all writes to this no longer documented MSR.
2291                  * Writes are only relevant for old K7 processors,
2292                  * all pre-dating SVM, but a recommended workaround from
2293                  * AMD for these chips. It is possible to specify the
2294                  * affected processor models on the command line, hence
2295                  * the need to ignore the workaround.
2296                  */
2297                 break;
2298         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2299                 if (kvm_hv_msr_partition_wide(msr)) {
2300                         int r;
2301                         mutex_lock(&vcpu->kvm->lock);
2302                         r = set_msr_hyperv_pw(vcpu, msr, data);
2303                         mutex_unlock(&vcpu->kvm->lock);
2304                         return r;
2305                 } else
2306                         return set_msr_hyperv(vcpu, msr, data);
2307                 break;
2308         case MSR_IA32_BBL_CR_CTL3:
2309                 /* Drop writes to this legacy MSR -- see rdmsr
2310                  * counterpart for further detail.
2311                  */
2312                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2313                 break;
2314         case MSR_AMD64_OSVW_ID_LENGTH:
2315                 if (!guest_cpuid_has_osvw(vcpu))
2316                         return 1;
2317                 vcpu->arch.osvw.length = data;
2318                 break;
2319         case MSR_AMD64_OSVW_STATUS:
2320                 if (!guest_cpuid_has_osvw(vcpu))
2321                         return 1;
2322                 vcpu->arch.osvw.status = data;
2323                 break;
2324         default:
2325                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2326                         return xen_hvm_config(vcpu, data);
2327                 if (kvm_pmu_msr(vcpu, msr))
2328                         return kvm_pmu_set_msr(vcpu, msr_info);
2329                 if (!ignore_msrs) {
2330                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2331                                     msr, data);
2332                         return 1;
2333                 } else {
2334                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2335                                     msr, data);
2336                         break;
2337                 }
2338         }
2339         return 0;
2340 }
2341 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2342
2343
2344 /*
2345  * Reads an msr value (of 'msr_index') into 'pdata'.
2346  * Returns 0 on success, non-0 otherwise.
2347  * Assumes vcpu_load() was already called.
2348  */
2349 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2350 {
2351         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2352 }
2353 EXPORT_SYMBOL_GPL(kvm_get_msr);
2354
2355 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2356 {
2357         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2358
2359         if (!msr_mtrr_valid(msr))
2360                 return 1;
2361
2362         if (msr == MSR_MTRRdefType)
2363                 *pdata = vcpu->arch.mtrr_state.def_type +
2364                          (vcpu->arch.mtrr_state.enabled << 10);
2365         else if (msr == MSR_MTRRfix64K_00000)
2366                 *pdata = p[0];
2367         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2368                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2369         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2370                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2371         else if (msr == MSR_IA32_CR_PAT)
2372                 *pdata = vcpu->arch.pat;
2373         else {  /* Variable MTRRs */
2374                 int idx, is_mtrr_mask;
2375                 u64 *pt;
2376
2377                 idx = (msr - 0x200) / 2;
2378                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2379                 if (!is_mtrr_mask)
2380                         pt =
2381                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2382                 else
2383                         pt =
2384                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2385                 *pdata = *pt;
2386         }
2387
2388         return 0;
2389 }
2390
2391 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2392 {
2393         u64 data;
2394         u64 mcg_cap = vcpu->arch.mcg_cap;
2395         unsigned bank_num = mcg_cap & 0xff;
2396
2397         switch (msr) {
2398         case MSR_IA32_P5_MC_ADDR:
2399         case MSR_IA32_P5_MC_TYPE:
2400                 data = 0;
2401                 break;
2402         case MSR_IA32_MCG_CAP:
2403                 data = vcpu->arch.mcg_cap;
2404                 break;
2405         case MSR_IA32_MCG_CTL:
2406                 if (!(mcg_cap & MCG_CTL_P))
2407                         return 1;
2408                 data = vcpu->arch.mcg_ctl;
2409                 break;
2410         case MSR_IA32_MCG_STATUS:
2411                 data = vcpu->arch.mcg_status;
2412                 break;
2413         default:
2414                 if (msr >= MSR_IA32_MC0_CTL &&
2415                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2416                         u32 offset = msr - MSR_IA32_MC0_CTL;
2417                         data = vcpu->arch.mce_banks[offset];
2418                         break;
2419                 }
2420                 return 1;
2421         }
2422         *pdata = data;
2423         return 0;
2424 }
2425
2426 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2427 {
2428         u64 data = 0;
2429         struct kvm *kvm = vcpu->kvm;
2430
2431         switch (msr) {
2432         case HV_X64_MSR_GUEST_OS_ID:
2433                 data = kvm->arch.hv_guest_os_id;
2434                 break;
2435         case HV_X64_MSR_HYPERCALL:
2436                 data = kvm->arch.hv_hypercall;
2437                 break;
2438         case HV_X64_MSR_TIME_REF_COUNT: {
2439                 data =
2440                      div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2441                 break;
2442         }
2443         case HV_X64_MSR_REFERENCE_TSC:
2444                 data = kvm->arch.hv_tsc_page;
2445                 break;
2446         default:
2447                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2448                 return 1;
2449         }
2450
2451         *pdata = data;
2452         return 0;
2453 }
2454
2455 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2456 {
2457         u64 data = 0;
2458
2459         switch (msr) {
2460         case HV_X64_MSR_VP_INDEX: {
2461                 int r;
2462                 struct kvm_vcpu *v;
2463                 kvm_for_each_vcpu(r, v, vcpu->kvm) {
2464                         if (v == vcpu) {
2465                                 data = r;
2466                                 break;
2467                         }
2468                 }
2469                 break;
2470         }
2471         case HV_X64_MSR_EOI:
2472                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2473         case HV_X64_MSR_ICR:
2474                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2475         case HV_X64_MSR_TPR:
2476                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2477         case HV_X64_MSR_APIC_ASSIST_PAGE:
2478                 data = vcpu->arch.hv_vapic;
2479                 break;
2480         default:
2481                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2482                 return 1;
2483         }
2484         *pdata = data;
2485         return 0;
2486 }
2487
2488 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2489 {
2490         u64 data;
2491
2492         switch (msr) {
2493         case MSR_IA32_PLATFORM_ID:
2494         case MSR_IA32_EBL_CR_POWERON:
2495         case MSR_IA32_DEBUGCTLMSR:
2496         case MSR_IA32_LASTBRANCHFROMIP:
2497         case MSR_IA32_LASTBRANCHTOIP:
2498         case MSR_IA32_LASTINTFROMIP:
2499         case MSR_IA32_LASTINTTOIP:
2500         case MSR_K8_SYSCFG:
2501         case MSR_K7_HWCR:
2502         case MSR_VM_HSAVE_PA:
2503         case MSR_K7_EVNTSEL0:
2504         case MSR_K7_EVNTSEL1:
2505         case MSR_K7_EVNTSEL2:
2506         case MSR_K7_EVNTSEL3:
2507         case MSR_K7_PERFCTR0:
2508         case MSR_K7_PERFCTR1:
2509         case MSR_K7_PERFCTR2:
2510         case MSR_K7_PERFCTR3:
2511         case MSR_K8_INT_PENDING_MSG:
2512         case MSR_AMD64_NB_CFG:
2513         case MSR_FAM10H_MMIO_CONF_BASE:
2514         case MSR_AMD64_BU_CFG2:
2515                 data = 0;
2516                 break;
2517         case MSR_P6_PERFCTR0:
2518         case MSR_P6_PERFCTR1:
2519         case MSR_P6_EVNTSEL0:
2520         case MSR_P6_EVNTSEL1:
2521                 if (kvm_pmu_msr(vcpu, msr))
2522                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2523                 data = 0;
2524                 break;
2525         case MSR_IA32_UCODE_REV:
2526                 data = 0x100000000ULL;
2527                 break;
2528         case MSR_MTRRcap:
2529                 data = 0x500 | KVM_NR_VAR_MTRR;
2530                 break;
2531         case 0x200 ... 0x2ff:
2532                 return get_msr_mtrr(vcpu, msr, pdata);
2533         case 0xcd: /* fsb frequency */
2534                 data = 3;
2535                 break;
2536                 /*
2537                  * MSR_EBC_FREQUENCY_ID
2538                  * Conservative value valid for even the basic CPU models.
2539                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2540                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2541                  * and 266MHz for model 3, or 4. Set Core Clock
2542                  * Frequency to System Bus Frequency Ratio to 1 (bits
2543                  * 31:24) even though these are only valid for CPU
2544                  * models > 2, however guests may end up dividing or
2545                  * multiplying by zero otherwise.
2546                  */
2547         case MSR_EBC_FREQUENCY_ID:
2548                 data = 1 << 24;
2549                 break;
2550         case MSR_IA32_APICBASE:
2551                 data = kvm_get_apic_base(vcpu);
2552                 break;
2553         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2554                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2555                 break;
2556         case MSR_IA32_TSCDEADLINE:
2557                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2558                 break;
2559         case MSR_IA32_TSC_ADJUST:
2560                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2561                 break;
2562         case MSR_IA32_MISC_ENABLE:
2563                 data = vcpu->arch.ia32_misc_enable_msr;
2564                 break;
2565         case MSR_IA32_PERF_STATUS:
2566                 /* TSC increment by tick */
2567                 data = 1000ULL;
2568                 /* CPU multiplier */
2569                 data |= (((uint64_t)4ULL) << 40);
2570                 break;
2571         case MSR_EFER:
2572                 data = vcpu->arch.efer;
2573                 break;
2574         case MSR_KVM_WALL_CLOCK:
2575         case MSR_KVM_WALL_CLOCK_NEW:
2576                 data = vcpu->kvm->arch.wall_clock;
2577                 break;
2578         case MSR_KVM_SYSTEM_TIME:
2579         case MSR_KVM_SYSTEM_TIME_NEW:
2580                 data = vcpu->arch.time;
2581                 break;
2582         case MSR_KVM_ASYNC_PF_EN:
2583                 data = vcpu->arch.apf.msr_val;
2584                 break;
2585         case MSR_KVM_STEAL_TIME:
2586                 data = vcpu->arch.st.msr_val;
2587                 break;
2588         case MSR_KVM_PV_EOI_EN:
2589                 data = vcpu->arch.pv_eoi.msr_val;
2590                 break;
2591         case MSR_IA32_P5_MC_ADDR:
2592         case MSR_IA32_P5_MC_TYPE:
2593         case MSR_IA32_MCG_CAP:
2594         case MSR_IA32_MCG_CTL:
2595         case MSR_IA32_MCG_STATUS:
2596         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2597                 return get_msr_mce(vcpu, msr, pdata);
2598         case MSR_K7_CLK_CTL:
2599                 /*
2600                  * Provide expected ramp-up count for K7. All other
2601                  * are set to zero, indicating minimum divisors for
2602                  * every field.
2603                  *
2604                  * This prevents guest kernels on AMD host with CPU
2605                  * type 6, model 8 and higher from exploding due to
2606                  * the rdmsr failing.
2607                  */
2608                 data = 0x20000000;
2609                 break;
2610         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2611                 if (kvm_hv_msr_partition_wide(msr)) {
2612                         int r;
2613                         mutex_lock(&vcpu->kvm->lock);
2614                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2615                         mutex_unlock(&vcpu->kvm->lock);
2616                         return r;
2617                 } else
2618                         return get_msr_hyperv(vcpu, msr, pdata);
2619                 break;
2620         case MSR_IA32_BBL_CR_CTL3:
2621                 /* This legacy MSR exists but isn't fully documented in current
2622                  * silicon.  It is however accessed by winxp in very narrow
2623                  * scenarios where it sets bit #19, itself documented as
2624                  * a "reserved" bit.  Best effort attempt to source coherent
2625                  * read data here should the balance of the register be
2626                  * interpreted by the guest:
2627                  *
2628                  * L2 cache control register 3: 64GB range, 256KB size,
2629                  * enabled, latency 0x1, configured
2630                  */
2631                 data = 0xbe702111;
2632                 break;
2633         case MSR_AMD64_OSVW_ID_LENGTH:
2634                 if (!guest_cpuid_has_osvw(vcpu))
2635                         return 1;
2636                 data = vcpu->arch.osvw.length;
2637                 break;
2638         case MSR_AMD64_OSVW_STATUS:
2639                 if (!guest_cpuid_has_osvw(vcpu))
2640                         return 1;
2641                 data = vcpu->arch.osvw.status;
2642                 break;
2643         default:
2644                 if (kvm_pmu_msr(vcpu, msr))
2645                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2646                 if (!ignore_msrs) {
2647                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2648                         return 1;
2649                 } else {
2650                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2651                         data = 0;
2652                 }
2653                 break;
2654         }
2655         *pdata = data;
2656         return 0;
2657 }
2658 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2659
2660 /*
2661  * Read or write a bunch of msrs. All parameters are kernel addresses.
2662  *
2663  * @return number of msrs set successfully.
2664  */
2665 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2666                     struct kvm_msr_entry *entries,
2667                     int (*do_msr)(struct kvm_vcpu *vcpu,
2668                                   unsigned index, u64 *data))
2669 {
2670         int i, idx;
2671
2672         idx = srcu_read_lock(&vcpu->kvm->srcu);
2673         for (i = 0; i < msrs->nmsrs; ++i)
2674                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2675                         break;
2676         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2677
2678         return i;
2679 }
2680
2681 /*
2682  * Read or write a bunch of msrs. Parameters are user addresses.
2683  *
2684  * @return number of msrs set successfully.
2685  */
2686 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2687                   int (*do_msr)(struct kvm_vcpu *vcpu,
2688                                 unsigned index, u64 *data),
2689                   int writeback)
2690 {
2691         struct kvm_msrs msrs;
2692         struct kvm_msr_entry *entries;
2693         int r, n;
2694         unsigned size;
2695
2696         r = -EFAULT;
2697         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2698                 goto out;
2699
2700         r = -E2BIG;
2701         if (msrs.nmsrs >= MAX_IO_MSRS)
2702                 goto out;
2703
2704         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2705         entries = memdup_user(user_msrs->entries, size);
2706         if (IS_ERR(entries)) {
2707                 r = PTR_ERR(entries);
2708                 goto out;
2709         }
2710
2711         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2712         if (r < 0)
2713                 goto out_free;
2714
2715         r = -EFAULT;
2716         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2717                 goto out_free;
2718
2719         r = n;
2720
2721 out_free:
2722         kfree(entries);
2723 out:
2724         return r;
2725 }
2726
2727 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2728 {
2729         int r;
2730
2731         switch (ext) {
2732         case KVM_CAP_IRQCHIP:
2733         case KVM_CAP_HLT:
2734         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2735         case KVM_CAP_SET_TSS_ADDR:
2736         case KVM_CAP_EXT_CPUID:
2737         case KVM_CAP_EXT_EMUL_CPUID:
2738         case KVM_CAP_CLOCKSOURCE:
2739         case KVM_CAP_PIT:
2740         case KVM_CAP_NOP_IO_DELAY:
2741         case KVM_CAP_MP_STATE:
2742         case KVM_CAP_SYNC_MMU:
2743         case KVM_CAP_USER_NMI:
2744         case KVM_CAP_REINJECT_CONTROL:
2745         case KVM_CAP_IRQ_INJECT_STATUS:
2746         case KVM_CAP_IRQFD:
2747         case KVM_CAP_IOEVENTFD:
2748         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2749         case KVM_CAP_PIT2:
2750         case KVM_CAP_PIT_STATE2:
2751         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2752         case KVM_CAP_XEN_HVM:
2753         case KVM_CAP_ADJUST_CLOCK:
2754         case KVM_CAP_VCPU_EVENTS:
2755         case KVM_CAP_HYPERV:
2756         case KVM_CAP_HYPERV_VAPIC:
2757         case KVM_CAP_HYPERV_SPIN:
2758         case KVM_CAP_PCI_SEGMENT:
2759         case KVM_CAP_DEBUGREGS:
2760         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2761         case KVM_CAP_XSAVE:
2762         case KVM_CAP_ASYNC_PF:
2763         case KVM_CAP_GET_TSC_KHZ:
2764         case KVM_CAP_KVMCLOCK_CTRL:
2765         case KVM_CAP_READONLY_MEM:
2766         case KVM_CAP_HYPERV_TIME:
2767         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2768         case KVM_CAP_TSC_DEADLINE_TIMER:
2769 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2770         case KVM_CAP_ASSIGN_DEV_IRQ:
2771         case KVM_CAP_PCI_2_3:
2772 #endif
2773                 r = 1;
2774                 break;
2775         case KVM_CAP_COALESCED_MMIO:
2776                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2777                 break;
2778         case KVM_CAP_VAPIC:
2779                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2780                 break;
2781         case KVM_CAP_NR_VCPUS:
2782                 r = KVM_SOFT_MAX_VCPUS;
2783                 break;
2784         case KVM_CAP_MAX_VCPUS:
2785                 r = KVM_MAX_VCPUS;
2786                 break;
2787         case KVM_CAP_NR_MEMSLOTS:
2788                 r = KVM_USER_MEM_SLOTS;
2789                 break;
2790         case KVM_CAP_PV_MMU:    /* obsolete */
2791                 r = 0;
2792                 break;
2793 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2794         case KVM_CAP_IOMMU:
2795                 r = iommu_present(&pci_bus_type);
2796                 break;
2797 #endif
2798         case KVM_CAP_MCE:
2799                 r = KVM_MAX_MCE_BANKS;
2800                 break;
2801         case KVM_CAP_XCRS:
2802                 r = cpu_has_xsave;
2803                 break;
2804         case KVM_CAP_TSC_CONTROL:
2805                 r = kvm_has_tsc_control;
2806                 break;
2807         default:
2808                 r = 0;
2809                 break;
2810         }
2811         return r;
2812
2813 }
2814
2815 long kvm_arch_dev_ioctl(struct file *filp,
2816                         unsigned int ioctl, unsigned long arg)
2817 {
2818         void __user *argp = (void __user *)arg;
2819         long r;
2820
2821         switch (ioctl) {
2822         case KVM_GET_MSR_INDEX_LIST: {
2823                 struct kvm_msr_list __user *user_msr_list = argp;
2824                 struct kvm_msr_list msr_list;
2825                 unsigned n;
2826
2827                 r = -EFAULT;
2828                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2829                         goto out;
2830                 n = msr_list.nmsrs;
2831                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2832                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2833                         goto out;
2834                 r = -E2BIG;
2835                 if (n < msr_list.nmsrs)
2836                         goto out;
2837                 r = -EFAULT;
2838                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2839                                  num_msrs_to_save * sizeof(u32)))
2840                         goto out;
2841                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2842                                  &emulated_msrs,
2843                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2844                         goto out;
2845                 r = 0;
2846                 break;
2847         }
2848         case KVM_GET_SUPPORTED_CPUID:
2849         case KVM_GET_EMULATED_CPUID: {
2850                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2851                 struct kvm_cpuid2 cpuid;
2852
2853                 r = -EFAULT;
2854                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2855                         goto out;
2856
2857                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2858                                             ioctl);
2859                 if (r)
2860                         goto out;
2861
2862                 r = -EFAULT;
2863                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2864                         goto out;
2865                 r = 0;
2866                 break;
2867         }
2868         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2869                 u64 mce_cap;
2870
2871                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2872                 r = -EFAULT;
2873                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2874                         goto out;
2875                 r = 0;
2876                 break;
2877         }
2878         default:
2879                 r = -EINVAL;
2880         }
2881 out:
2882         return r;
2883 }
2884
2885 static void wbinvd_ipi(void *garbage)
2886 {
2887         wbinvd();
2888 }
2889
2890 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2891 {
2892         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2893 }
2894
2895 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2896 {
2897         /* Address WBINVD may be executed by guest */
2898         if (need_emulate_wbinvd(vcpu)) {
2899                 if (kvm_x86_ops->has_wbinvd_exit())
2900                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2901                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2902                         smp_call_function_single(vcpu->cpu,
2903                                         wbinvd_ipi, NULL, 1);
2904         }
2905
2906         kvm_x86_ops->vcpu_load(vcpu, cpu);
2907
2908         /* Apply any externally detected TSC adjustments (due to suspend) */
2909         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2910                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2911                 vcpu->arch.tsc_offset_adjustment = 0;
2912                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2913         }
2914
2915         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2916                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2917                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2918                 if (tsc_delta < 0)
2919                         mark_tsc_unstable("KVM discovered backwards TSC");
2920                 if (check_tsc_unstable()) {
2921                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2922                                                 vcpu->arch.last_guest_tsc);
2923                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2924                         vcpu->arch.tsc_catchup = 1;
2925                 }
2926                 /*
2927                  * On a host with synchronized TSC, there is no need to update
2928                  * kvmclock on vcpu->cpu migration
2929                  */
2930                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2931                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2932                 if (vcpu->cpu != cpu)
2933                         kvm_migrate_timers(vcpu);
2934                 vcpu->cpu = cpu;
2935         }
2936
2937         accumulate_steal_time(vcpu);
2938         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2939 }
2940
2941 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2942 {
2943         kvm_x86_ops->vcpu_put(vcpu);
2944         kvm_put_guest_fpu(vcpu);
2945         vcpu->arch.last_host_tsc = native_read_tsc();
2946 }
2947
2948 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2949                                     struct kvm_lapic_state *s)
2950 {
2951         kvm_x86_ops->sync_pir_to_irr(vcpu);
2952         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2953
2954         return 0;
2955 }
2956
2957 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2958                                     struct kvm_lapic_state *s)
2959 {
2960         kvm_apic_post_state_restore(vcpu, s);
2961         update_cr8_intercept(vcpu);
2962
2963         return 0;
2964 }
2965
2966 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2967                                     struct kvm_interrupt *irq)
2968 {
2969         if (irq->irq >= KVM_NR_INTERRUPTS)
2970                 return -EINVAL;
2971         if (irqchip_in_kernel(vcpu->kvm))
2972                 return -ENXIO;
2973
2974         kvm_queue_interrupt(vcpu, irq->irq, false);
2975         kvm_make_request(KVM_REQ_EVENT, vcpu);
2976
2977         return 0;
2978 }
2979
2980 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2981 {
2982         kvm_inject_nmi(vcpu);
2983
2984         return 0;
2985 }
2986
2987 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2988                                            struct kvm_tpr_access_ctl *tac)
2989 {
2990         if (tac->flags)
2991                 return -EINVAL;
2992         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2993         return 0;
2994 }
2995
2996 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2997                                         u64 mcg_cap)
2998 {
2999         int r;
3000         unsigned bank_num = mcg_cap & 0xff, bank;
3001
3002         r = -EINVAL;
3003         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3004                 goto out;
3005         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
3006                 goto out;
3007         r = 0;
3008         vcpu->arch.mcg_cap = mcg_cap;
3009         /* Init IA32_MCG_CTL to all 1s */
3010         if (mcg_cap & MCG_CTL_P)
3011                 vcpu->arch.mcg_ctl = ~(u64)0;
3012         /* Init IA32_MCi_CTL to all 1s */
3013         for (bank = 0; bank < bank_num; bank++)
3014                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3015 out:
3016         return r;
3017 }
3018
3019 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3020                                       struct kvm_x86_mce *mce)
3021 {
3022         u64 mcg_cap = vcpu->arch.mcg_cap;
3023         unsigned bank_num = mcg_cap & 0xff;
3024         u64 *banks = vcpu->arch.mce_banks;
3025
3026         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3027                 return -EINVAL;
3028         /*
3029          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3030          * reporting is disabled
3031          */
3032         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3033             vcpu->arch.mcg_ctl != ~(u64)0)
3034                 return 0;
3035         banks += 4 * mce->bank;
3036         /*
3037          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3038          * reporting is disabled for the bank
3039          */
3040         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3041                 return 0;
3042         if (mce->status & MCI_STATUS_UC) {
3043                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3044                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3045                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3046                         return 0;
3047                 }
3048                 if (banks[1] & MCI_STATUS_VAL)
3049                         mce->status |= MCI_STATUS_OVER;
3050                 banks[2] = mce->addr;
3051                 banks[3] = mce->misc;
3052                 vcpu->arch.mcg_status = mce->mcg_status;
3053                 banks[1] = mce->status;
3054                 kvm_queue_exception(vcpu, MC_VECTOR);
3055         } else if (!(banks[1] & MCI_STATUS_VAL)
3056                    || !(banks[1] & MCI_STATUS_UC)) {
3057                 if (banks[1] & MCI_STATUS_VAL)
3058                         mce->status |= MCI_STATUS_OVER;
3059                 banks[2] = mce->addr;
3060                 banks[3] = mce->misc;
3061                 banks[1] = mce->status;
3062         } else
3063                 banks[1] |= MCI_STATUS_OVER;
3064         return 0;
3065 }
3066
3067 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3068                                                struct kvm_vcpu_events *events)
3069 {
3070         process_nmi(vcpu);
3071         events->exception.injected =
3072                 vcpu->arch.exception.pending &&
3073                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3074         events->exception.nr = vcpu->arch.exception.nr;
3075         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3076         events->exception.pad = 0;
3077         events->exception.error_code = vcpu->arch.exception.error_code;
3078
3079         events->interrupt.injected =
3080                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3081         events->interrupt.nr = vcpu->arch.interrupt.nr;
3082         events->interrupt.soft = 0;
3083         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3084
3085         events->nmi.injected = vcpu->arch.nmi_injected;
3086         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3087         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3088         events->nmi.pad = 0;
3089
3090         events->sipi_vector = 0; /* never valid when reporting to user space */
3091
3092         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3093                          | KVM_VCPUEVENT_VALID_SHADOW);
3094         memset(&events->reserved, 0, sizeof(events->reserved));
3095 }
3096
3097 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3098                                               struct kvm_vcpu_events *events)
3099 {
3100         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3101                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3102                               | KVM_VCPUEVENT_VALID_SHADOW))
3103                 return -EINVAL;
3104
3105         process_nmi(vcpu);
3106         vcpu->arch.exception.pending = events->exception.injected;
3107         vcpu->arch.exception.nr = events->exception.nr;
3108         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3109         vcpu->arch.exception.error_code = events->exception.error_code;
3110
3111         vcpu->arch.interrupt.pending = events->interrupt.injected;
3112         vcpu->arch.interrupt.nr = events->interrupt.nr;
3113         vcpu->arch.interrupt.soft = events->interrupt.soft;
3114         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3115                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3116                                                   events->interrupt.shadow);
3117
3118         vcpu->arch.nmi_injected = events->nmi.injected;
3119         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3120                 vcpu->arch.nmi_pending = events->nmi.pending;
3121         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3122
3123         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3124             kvm_vcpu_has_lapic(vcpu))
3125                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3126
3127         kvm_make_request(KVM_REQ_EVENT, vcpu);
3128
3129         return 0;
3130 }
3131
3132 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3133                                              struct kvm_debugregs *dbgregs)
3134 {
3135         unsigned long val;
3136
3137         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3138         kvm_get_dr(vcpu, 6, &val);
3139         dbgregs->dr6 = val;
3140         dbgregs->dr7 = vcpu->arch.dr7;
3141         dbgregs->flags = 0;
3142         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3143 }
3144
3145 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3146                                             struct kvm_debugregs *dbgregs)
3147 {
3148         if (dbgregs->flags)
3149                 return -EINVAL;
3150
3151         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3152         vcpu->arch.dr6 = dbgregs->dr6;
3153         kvm_update_dr6(vcpu);
3154         vcpu->arch.dr7 = dbgregs->dr7;
3155         kvm_update_dr7(vcpu);
3156
3157         return 0;
3158 }
3159
3160 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3161
3162 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3163 {
3164         struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
3165         u64 xstate_bv = xsave->xsave_hdr.xstate_bv;
3166         u64 valid;
3167
3168         /*
3169          * Copy legacy XSAVE area, to avoid complications with CPUID
3170          * leaves 0 and 1 in the loop below.
3171          */
3172         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3173
3174         /* Set XSTATE_BV */
3175         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3176
3177         /*
3178          * Copy each region from the possibly compacted offset to the
3179          * non-compacted offset.
3180          */
3181         valid = xstate_bv & ~XSTATE_FPSSE;
3182         while (valid) {
3183                 u64 feature = valid & -valid;
3184                 int index = fls64(feature) - 1;
3185                 void *src = get_xsave_addr(xsave, feature);
3186
3187                 if (src) {
3188                         u32 size, offset, ecx, edx;
3189                         cpuid_count(XSTATE_CPUID, index,
3190                                     &size, &offset, &ecx, &edx);
3191                         memcpy(dest + offset, src, size);
3192                 }
3193
3194                 valid -= feature;
3195         }
3196 }
3197
3198 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3199 {
3200         struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
3201         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3202         u64 valid;
3203
3204         /*
3205          * Copy legacy XSAVE area, to avoid complications with CPUID
3206          * leaves 0 and 1 in the loop below.
3207          */
3208         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3209
3210         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3211         xsave->xsave_hdr.xstate_bv = xstate_bv;
3212         if (cpu_has_xsaves)
3213                 xsave->xsave_hdr.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3214
3215         /*
3216          * Copy each region from the non-compacted offset to the
3217          * possibly compacted offset.
3218          */
3219         valid = xstate_bv & ~XSTATE_FPSSE;
3220         while (valid) {
3221                 u64 feature = valid & -valid;
3222                 int index = fls64(feature) - 1;
3223                 void *dest = get_xsave_addr(xsave, feature);
3224
3225                 if (dest) {
3226                         u32 size, offset, ecx, edx;
3227                         cpuid_count(XSTATE_CPUID, index,
3228                                     &size, &offset, &ecx, &edx);
3229                         memcpy(dest, src + offset, size);
3230                 } else
3231                         WARN_ON_ONCE(1);
3232
3233                 valid -= feature;
3234         }
3235 }
3236
3237 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3238                                          struct kvm_xsave *guest_xsave)
3239 {
3240         if (cpu_has_xsave) {
3241                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3242                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3243         } else {
3244                 memcpy(guest_xsave->region,
3245                         &vcpu->arch.guest_fpu.state->fxsave,
3246                         sizeof(struct i387_fxsave_struct));
3247                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3248                         XSTATE_FPSSE;
3249         }
3250 }
3251
3252 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3253                                         struct kvm_xsave *guest_xsave)
3254 {
3255         u64 xstate_bv =
3256                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3257
3258         if (cpu_has_xsave) {
3259                 /*
3260                  * Here we allow setting states that are not present in
3261                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3262                  * with old userspace.
3263                  */
3264                 if (xstate_bv & ~kvm_supported_xcr0())
3265                         return -EINVAL;
3266                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3267         } else {
3268                 if (xstate_bv & ~XSTATE_FPSSE)
3269                         return -EINVAL;
3270                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3271                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3272         }
3273         return 0;
3274 }
3275
3276 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3277                                         struct kvm_xcrs *guest_xcrs)
3278 {
3279         if (!cpu_has_xsave) {
3280                 guest_xcrs->nr_xcrs = 0;
3281                 return;
3282         }
3283
3284         guest_xcrs->nr_xcrs = 1;
3285         guest_xcrs->flags = 0;
3286         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3287         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3288 }
3289
3290 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3291                                        struct kvm_xcrs *guest_xcrs)
3292 {
3293         int i, r = 0;
3294
3295         if (!cpu_has_xsave)
3296                 return -EINVAL;
3297
3298         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3299                 return -EINVAL;
3300
3301         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3302                 /* Only support XCR0 currently */
3303                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3304                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3305                                 guest_xcrs->xcrs[i].value);
3306                         break;
3307                 }
3308         if (r)
3309                 r = -EINVAL;
3310         return r;
3311 }
3312
3313 /*
3314  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3315  * stopped by the hypervisor.  This function will be called from the host only.
3316  * EINVAL is returned when the host attempts to set the flag for a guest that
3317  * does not support pv clocks.
3318  */
3319 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3320 {
3321         if (!vcpu->arch.pv_time_enabled)
3322                 return -EINVAL;
3323         vcpu->arch.pvclock_set_guest_stopped_request = true;
3324         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3325         return 0;
3326 }
3327
3328 long kvm_arch_vcpu_ioctl(struct file *filp,
3329                          unsigned int ioctl, unsigned long arg)
3330 {
3331         struct kvm_vcpu *vcpu = filp->private_data;
3332         void __user *argp = (void __user *)arg;
3333         int r;
3334         union {
3335                 struct kvm_lapic_state *lapic;
3336                 struct kvm_xsave *xsave;
3337                 struct kvm_xcrs *xcrs;
3338                 void *buffer;
3339         } u;
3340
3341         u.buffer = NULL;
3342         switch (ioctl) {
3343         case KVM_GET_LAPIC: {
3344                 r = -EINVAL;
3345                 if (!vcpu->arch.apic)
3346                         goto out;
3347                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3348
3349                 r = -ENOMEM;
3350                 if (!u.lapic)
3351                         goto out;
3352                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3353                 if (r)
3354                         goto out;
3355                 r = -EFAULT;
3356                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3357                         goto out;
3358                 r = 0;
3359                 break;
3360         }
3361         case KVM_SET_LAPIC: {
3362                 r = -EINVAL;
3363                 if (!vcpu->arch.apic)
3364                         goto out;
3365                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3366                 if (IS_ERR(u.lapic))
3367                         return PTR_ERR(u.lapic);
3368
3369                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3370                 break;
3371         }
3372         case KVM_INTERRUPT: {
3373                 struct kvm_interrupt irq;
3374
3375                 r = -EFAULT;
3376                 if (copy_from_user(&irq, argp, sizeof irq))
3377                         goto out;
3378                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3379                 break;
3380         }
3381         case KVM_NMI: {
3382                 r = kvm_vcpu_ioctl_nmi(vcpu);
3383                 break;
3384         }
3385         case KVM_SET_CPUID: {
3386                 struct kvm_cpuid __user *cpuid_arg = argp;
3387                 struct kvm_cpuid cpuid;
3388
3389                 r = -EFAULT;
3390                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3391                         goto out;
3392                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3393                 break;
3394         }
3395         case KVM_SET_CPUID2: {
3396                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3397                 struct kvm_cpuid2 cpuid;
3398
3399                 r = -EFAULT;
3400                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3401                         goto out;
3402                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3403                                               cpuid_arg->entries);
3404                 break;
3405         }
3406         case KVM_GET_CPUID2: {
3407                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3408                 struct kvm_cpuid2 cpuid;
3409
3410                 r = -EFAULT;
3411                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3412                         goto out;
3413                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3414                                               cpuid_arg->entries);
3415                 if (r)
3416                         goto out;
3417                 r = -EFAULT;
3418                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3419                         goto out;
3420                 r = 0;
3421                 break;
3422         }
3423         case KVM_GET_MSRS:
3424                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3425                 break;
3426         case KVM_SET_MSRS:
3427                 r = msr_io(vcpu, argp, do_set_msr, 0);
3428                 break;
3429         case KVM_TPR_ACCESS_REPORTING: {
3430                 struct kvm_tpr_access_ctl tac;
3431
3432                 r = -EFAULT;
3433                 if (copy_from_user(&tac, argp, sizeof tac))
3434                         goto out;
3435                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3436                 if (r)
3437                         goto out;
3438                 r = -EFAULT;
3439                 if (copy_to_user(argp, &tac, sizeof tac))
3440                         goto out;
3441                 r = 0;
3442                 break;
3443         };
3444         case KVM_SET_VAPIC_ADDR: {
3445                 struct kvm_vapic_addr va;
3446
3447                 r = -EINVAL;
3448                 if (!irqchip_in_kernel(vcpu->kvm))
3449                         goto out;
3450                 r = -EFAULT;
3451                 if (copy_from_user(&va, argp, sizeof va))
3452                         goto out;
3453                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3454                 break;
3455         }
3456         case KVM_X86_SETUP_MCE: {
3457                 u64 mcg_cap;
3458
3459                 r = -EFAULT;
3460                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3461                         goto out;
3462                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3463                 break;
3464         }
3465         case KVM_X86_SET_MCE: {
3466                 struct kvm_x86_mce mce;
3467
3468                 r = -EFAULT;
3469                 if (copy_from_user(&mce, argp, sizeof mce))
3470                         goto out;
3471                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3472                 break;
3473         }
3474         case KVM_GET_VCPU_EVENTS: {
3475                 struct kvm_vcpu_events events;
3476
3477                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3478
3479                 r = -EFAULT;
3480                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3481                         break;
3482                 r = 0;
3483                 break;
3484         }
3485         case KVM_SET_VCPU_EVENTS: {
3486                 struct kvm_vcpu_events events;
3487
3488                 r = -EFAULT;
3489                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3490                         break;
3491
3492                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3493                 break;
3494         }
3495         case KVM_GET_DEBUGREGS: {
3496                 struct kvm_debugregs dbgregs;
3497
3498                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3499
3500                 r = -EFAULT;
3501                 if (copy_to_user(argp, &dbgregs,
3502                                  sizeof(struct kvm_debugregs)))
3503                         break;
3504                 r = 0;
3505                 break;
3506         }
3507         case KVM_SET_DEBUGREGS: {
3508                 struct kvm_debugregs dbgregs;
3509
3510                 r = -EFAULT;
3511                 if (copy_from_user(&dbgregs, argp,
3512                                    sizeof(struct kvm_debugregs)))
3513                         break;
3514
3515                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3516                 break;
3517         }
3518         case KVM_GET_XSAVE: {
3519                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3520                 r = -ENOMEM;
3521                 if (!u.xsave)
3522                         break;
3523
3524                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3525
3526                 r = -EFAULT;
3527                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3528                         break;
3529                 r = 0;
3530                 break;
3531         }
3532         case KVM_SET_XSAVE: {
3533                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3534                 if (IS_ERR(u.xsave))
3535                         return PTR_ERR(u.xsave);
3536
3537                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3538                 break;
3539         }
3540         case KVM_GET_XCRS: {
3541                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3542                 r = -ENOMEM;
3543                 if (!u.xcrs)
3544                         break;
3545
3546                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3547
3548                 r = -EFAULT;
3549                 if (copy_to_user(argp, u.xcrs,
3550                                  sizeof(struct kvm_xcrs)))
3551                         break;
3552                 r = 0;
3553                 break;
3554         }
3555         case KVM_SET_XCRS: {
3556                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3557                 if (IS_ERR(u.xcrs))
3558                         return PTR_ERR(u.xcrs);
3559
3560                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3561                 break;
3562         }
3563         case KVM_SET_TSC_KHZ: {
3564                 u32 user_tsc_khz;
3565
3566                 r = -EINVAL;
3567                 user_tsc_khz = (u32)arg;
3568
3569                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3570                         goto out;
3571
3572                 if (user_tsc_khz == 0)
3573                         user_tsc_khz = tsc_khz;
3574
3575                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3576
3577                 r = 0;
3578                 goto out;
3579         }
3580         case KVM_GET_TSC_KHZ: {
3581                 r = vcpu->arch.virtual_tsc_khz;
3582                 goto out;
3583         }
3584         case KVM_KVMCLOCK_CTRL: {
3585                 r = kvm_set_guest_paused(vcpu);
3586                 goto out;
3587         }
3588         default:
3589                 r = -EINVAL;
3590         }
3591 out:
3592         kfree(u.buffer);
3593         return r;
3594 }
3595
3596 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3597 {
3598         return VM_FAULT_SIGBUS;
3599 }
3600
3601 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3602 {
3603         int ret;
3604
3605         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3606                 return -EINVAL;
3607         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3608         return ret;
3609 }
3610
3611 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3612                                               u64 ident_addr)
3613 {
3614         kvm->arch.ept_identity_map_addr = ident_addr;
3615         return 0;
3616 }
3617
3618 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3619                                           u32 kvm_nr_mmu_pages)
3620 {
3621         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3622                 return -EINVAL;
3623
3624         mutex_lock(&kvm->slots_lock);
3625
3626         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3627         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3628
3629         mutex_unlock(&kvm->slots_lock);
3630         return 0;
3631 }
3632
3633 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3634 {
3635         return kvm->arch.n_max_mmu_pages;
3636 }
3637
3638 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3639 {
3640         int r;
3641
3642         r = 0;
3643         switch (chip->chip_id) {
3644         case KVM_IRQCHIP_PIC_MASTER:
3645                 memcpy(&chip->chip.pic,
3646                         &pic_irqchip(kvm)->pics[0],
3647                         sizeof(struct kvm_pic_state));
3648                 break;
3649         case KVM_IRQCHIP_PIC_SLAVE:
3650                 memcpy(&chip->chip.pic,
3651                         &pic_irqchip(kvm)->pics[1],
3652                         sizeof(struct kvm_pic_state));
3653                 break;
3654         case KVM_IRQCHIP_IOAPIC:
3655                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3656                 break;
3657         default:
3658                 r = -EINVAL;
3659                 break;
3660         }
3661         return r;
3662 }
3663
3664 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3665 {
3666         int r;
3667
3668         r = 0;
3669         switch (chip->chip_id) {
3670         case KVM_IRQCHIP_PIC_MASTER:
3671                 spin_lock(&pic_irqchip(kvm)->lock);
3672                 memcpy(&pic_irqchip(kvm)->pics[0],
3673                         &chip->chip.pic,
3674                         sizeof(struct kvm_pic_state));
3675                 spin_unlock(&pic_irqchip(kvm)->lock);
3676                 break;
3677         case KVM_IRQCHIP_PIC_SLAVE:
3678                 spin_lock(&pic_irqchip(kvm)->lock);
3679                 memcpy(&pic_irqchip(kvm)->pics[1],
3680                         &chip->chip.pic,
3681                         sizeof(struct kvm_pic_state));
3682                 spin_unlock(&pic_irqchip(kvm)->lock);
3683                 break;
3684         case KVM_IRQCHIP_IOAPIC:
3685                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3686                 break;
3687         default:
3688                 r = -EINVAL;
3689                 break;
3690         }
3691         kvm_pic_update_irq(pic_irqchip(kvm));
3692         return r;
3693 }
3694
3695 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3696 {
3697         int r = 0;
3698
3699         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3700         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3701         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3702         return r;
3703 }
3704
3705 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3706 {
3707         int r = 0;
3708
3709         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3710         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3711         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3712         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3713         return r;
3714 }
3715
3716 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3717 {
3718         int r = 0;
3719
3720         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3721         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3722                 sizeof(ps->channels));
3723         ps->flags = kvm->arch.vpit->pit_state.flags;
3724         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3725         memset(&ps->reserved, 0, sizeof(ps->reserved));
3726         return r;
3727 }
3728
3729 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3730 {
3731         int r = 0, start = 0;
3732         u32 prev_legacy, cur_legacy;
3733         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3734         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3735         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3736         if (!prev_legacy && cur_legacy)
3737                 start = 1;
3738         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3739                sizeof(kvm->arch.vpit->pit_state.channels));
3740         kvm->arch.vpit->pit_state.flags = ps->flags;
3741         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3742         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3743         return r;
3744 }
3745
3746 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3747                                  struct kvm_reinject_control *control)
3748 {
3749         if (!kvm->arch.vpit)
3750                 return -ENXIO;
3751         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3752         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3753         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3754         return 0;
3755 }
3756
3757 /**
3758  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3759  * @kvm: kvm instance
3760  * @log: slot id and address to which we copy the log
3761  *
3762  * Steps 1-4 below provide general overview of dirty page logging. See
3763  * kvm_get_dirty_log_protect() function description for additional details.
3764  *
3765  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3766  * always flush the TLB (step 4) even if previous step failed  and the dirty
3767  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3768  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3769  * writes will be marked dirty for next log read.
3770  *
3771  *   1. Take a snapshot of the bit and clear it if needed.
3772  *   2. Write protect the corresponding page.
3773  *   3. Copy the snapshot to the userspace.
3774  *   4. Flush TLB's if needed.
3775  */
3776 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3777 {
3778         bool is_dirty = false;
3779         int r;
3780
3781         mutex_lock(&kvm->slots_lock);
3782
3783         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3784
3785         /*
3786          * All the TLBs can be flushed out of mmu lock, see the comments in
3787          * kvm_mmu_slot_remove_write_access().
3788          */
3789         lockdep_assert_held(&kvm->slots_lock);
3790         if (is_dirty)
3791                 kvm_flush_remote_tlbs(kvm);
3792
3793         mutex_unlock(&kvm->slots_lock);
3794         return r;
3795 }
3796
3797 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3798                         bool line_status)
3799 {
3800         if (!irqchip_in_kernel(kvm))
3801                 return -ENXIO;
3802
3803         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3804                                         irq_event->irq, irq_event->level,
3805                                         line_status);
3806         return 0;
3807 }
3808
3809 long kvm_arch_vm_ioctl(struct file *filp,
3810                        unsigned int ioctl, unsigned long arg)
3811 {
3812         struct kvm *kvm = filp->private_data;
3813         void __user *argp = (void __user *)arg;
3814         int r = -ENOTTY;
3815         /*
3816          * This union makes it completely explicit to gcc-3.x
3817          * that these two variables' stack usage should be
3818          * combined, not added together.
3819          */
3820         union {
3821                 struct kvm_pit_state ps;
3822                 struct kvm_pit_state2 ps2;
3823                 struct kvm_pit_config pit_config;
3824         } u;
3825
3826         switch (ioctl) {
3827         case KVM_SET_TSS_ADDR:
3828                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3829                 break;
3830         case KVM_SET_IDENTITY_MAP_ADDR: {
3831                 u64 ident_addr;
3832
3833                 r = -EFAULT;
3834                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3835                         goto out;
3836                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3837                 break;
3838         }
3839         case KVM_SET_NR_MMU_PAGES:
3840                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3841                 break;
3842         case KVM_GET_NR_MMU_PAGES:
3843                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3844                 break;
3845         case KVM_CREATE_IRQCHIP: {
3846                 struct kvm_pic *vpic;
3847
3848                 mutex_lock(&kvm->lock);
3849                 r = -EEXIST;
3850                 if (kvm->arch.vpic)
3851                         goto create_irqchip_unlock;
3852                 r = -EINVAL;
3853                 if (atomic_read(&kvm->online_vcpus))
3854                         goto create_irqchip_unlock;
3855                 r = -ENOMEM;
3856                 vpic = kvm_create_pic(kvm);
3857                 if (vpic) {
3858                         r = kvm_ioapic_init(kvm);
3859                         if (r) {
3860                                 mutex_lock(&kvm->slots_lock);
3861                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3862                                                           &vpic->dev_master);
3863                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3864                                                           &vpic->dev_slave);
3865                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3866                                                           &vpic->dev_eclr);
3867                                 mutex_unlock(&kvm->slots_lock);
3868                                 kfree(vpic);
3869                                 goto create_irqchip_unlock;
3870                         }
3871                 } else
3872                         goto create_irqchip_unlock;
3873                 smp_wmb();
3874                 kvm->arch.vpic = vpic;
3875                 smp_wmb();
3876                 r = kvm_setup_default_irq_routing(kvm);
3877                 if (r) {
3878                         mutex_lock(&kvm->slots_lock);
3879                         mutex_lock(&kvm->irq_lock);
3880                         kvm_ioapic_destroy(kvm);
3881                         kvm_destroy_pic(kvm);
3882                         mutex_unlock(&kvm->irq_lock);
3883                         mutex_unlock(&kvm->slots_lock);
3884                 }
3885         create_irqchip_unlock:
3886                 mutex_unlock(&kvm->lock);
3887                 break;
3888         }
3889         case KVM_CREATE_PIT:
3890                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3891                 goto create_pit;
3892         case KVM_CREATE_PIT2:
3893                 r = -EFAULT;
3894                 if (copy_from_user(&u.pit_config, argp,
3895                                    sizeof(struct kvm_pit_config)))
3896                         goto out;
3897         create_pit:
3898                 mutex_lock(&kvm->slots_lock);
3899                 r = -EEXIST;
3900                 if (kvm->arch.vpit)
3901                         goto create_pit_unlock;
3902                 r = -ENOMEM;
3903                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3904                 if (kvm->arch.vpit)
3905                         r = 0;
3906         create_pit_unlock:
3907                 mutex_unlock(&kvm->slots_lock);
3908                 break;
3909         case KVM_GET_IRQCHIP: {
3910                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3911                 struct kvm_irqchip *chip;
3912
3913                 chip = memdup_user(argp, sizeof(*chip));
3914                 if (IS_ERR(chip)) {
3915                         r = PTR_ERR(chip);
3916                         goto out;
3917                 }
3918
3919                 r = -ENXIO;
3920                 if (!irqchip_in_kernel(kvm))
3921                         goto get_irqchip_out;
3922                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3923                 if (r)
3924                         goto get_irqchip_out;
3925                 r = -EFAULT;
3926                 if (copy_to_user(argp, chip, sizeof *chip))
3927                         goto get_irqchip_out;
3928                 r = 0;
3929         get_irqchip_out:
3930                 kfree(chip);
3931                 break;
3932         }
3933         case KVM_SET_IRQCHIP: {
3934                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3935                 struct kvm_irqchip *chip;
3936
3937                 chip = memdup_user(argp, sizeof(*chip));
3938                 if (IS_ERR(chip)) {
3939                         r = PTR_ERR(chip);
3940                         goto out;
3941                 }
3942
3943                 r = -ENXIO;
3944                 if (!irqchip_in_kernel(kvm))
3945                         goto set_irqchip_out;
3946                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3947                 if (r)
3948                         goto set_irqchip_out;
3949                 r = 0;
3950         set_irqchip_out:
3951                 kfree(chip);
3952                 break;
3953         }
3954         case KVM_GET_PIT: {
3955                 r = -EFAULT;
3956                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3957                         goto out;
3958                 r = -ENXIO;
3959                 if (!kvm->arch.vpit)
3960                         goto out;
3961                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3962                 if (r)
3963                         goto out;
3964                 r = -EFAULT;
3965                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3966                         goto out;
3967                 r = 0;
3968                 break;
3969         }
3970         case KVM_SET_PIT: {
3971                 r = -EFAULT;
3972                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3973                         goto out;
3974                 r = -ENXIO;
3975                 if (!kvm->arch.vpit)
3976                         goto out;
3977                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3978                 break;
3979         }
3980         case KVM_GET_PIT2: {
3981                 r = -ENXIO;
3982                 if (!kvm->arch.vpit)
3983                         goto out;
3984                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3985                 if (r)
3986                         goto out;
3987                 r = -EFAULT;
3988                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3989                         goto out;
3990                 r = 0;
3991                 break;
3992         }
3993         case KVM_SET_PIT2: {
3994                 r = -EFAULT;
3995                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3996                         goto out;
3997                 r = -ENXIO;
3998                 if (!kvm->arch.vpit)
3999                         goto out;
4000                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4001                 break;
4002         }
4003         case KVM_REINJECT_CONTROL: {
4004                 struct kvm_reinject_control control;
4005                 r =  -EFAULT;
4006                 if (copy_from_user(&control, argp, sizeof(control)))
4007                         goto out;
4008                 r = kvm_vm_ioctl_reinject(kvm, &control);
4009                 break;
4010         }
4011         case KVM_XEN_HVM_CONFIG: {
4012                 r = -EFAULT;
4013                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4014                                    sizeof(struct kvm_xen_hvm_config)))
4015                         goto out;
4016                 r = -EINVAL;
4017                 if (kvm->arch.xen_hvm_config.flags)
4018                         goto out;
4019                 r = 0;
4020                 break;
4021         }
4022         case KVM_SET_CLOCK: {
4023                 struct kvm_clock_data user_ns;
4024                 u64 now_ns;
4025                 s64 delta;
4026
4027                 r = -EFAULT;
4028                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4029                         goto out;
4030
4031                 r = -EINVAL;
4032                 if (user_ns.flags)
4033                         goto out;
4034
4035                 r = 0;
4036                 local_irq_disable();
4037                 now_ns = get_kernel_ns();
4038                 delta = user_ns.clock - now_ns;
4039                 local_irq_enable();
4040                 kvm->arch.kvmclock_offset = delta;
4041                 kvm_gen_update_masterclock(kvm);
4042                 break;
4043         }
4044         case KVM_GET_CLOCK: {
4045                 struct kvm_clock_data user_ns;
4046                 u64 now_ns;
4047
4048                 local_irq_disable();
4049                 now_ns = get_kernel_ns();
4050                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4051                 local_irq_enable();
4052                 user_ns.flags = 0;
4053                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4054
4055                 r = -EFAULT;
4056                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4057                         goto out;
4058                 r = 0;
4059                 break;
4060         }
4061
4062         default:
4063                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4064         }
4065 out:
4066         return r;
4067 }
4068
4069 static void kvm_init_msr_list(void)
4070 {
4071         u32 dummy[2];
4072         unsigned i, j;
4073
4074         /* skip the first msrs in the list. KVM-specific */
4075         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
4076                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4077                         continue;
4078
4079                 /*
4080                  * Even MSRs that are valid in the host may not be exposed
4081                  * to the guests in some cases.  We could work around this
4082                  * in VMX with the generic MSR save/load machinery, but it
4083                  * is not really worthwhile since it will really only
4084                  * happen with nested virtualization.
4085                  */
4086                 switch (msrs_to_save[i]) {
4087                 case MSR_IA32_BNDCFGS:
4088                         if (!kvm_x86_ops->mpx_supported())
4089                                 continue;
4090                         break;
4091                 default:
4092                         break;
4093                 }
4094
4095                 if (j < i)
4096                         msrs_to_save[j] = msrs_to_save[i];
4097                 j++;
4098         }
4099         num_msrs_to_save = j;
4100 }
4101
4102 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4103                            const void *v)
4104 {
4105         int handled = 0;
4106         int n;
4107
4108         do {
4109                 n = min(len, 8);
4110                 if (!(vcpu->arch.apic &&
4111                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
4112                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
4113                         break;
4114                 handled += n;
4115                 addr += n;
4116                 len -= n;
4117                 v += n;
4118         } while (len);
4119
4120         return handled;
4121 }
4122
4123 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4124 {
4125         int handled = 0;
4126         int n;
4127
4128         do {
4129                 n = min(len, 8);
4130                 if (!(vcpu->arch.apic &&
4131                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
4132                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
4133                         break;
4134                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4135                 handled += n;
4136                 addr += n;
4137                 len -= n;
4138                 v += n;
4139         } while (len);
4140
4141         return handled;
4142 }
4143
4144 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4145                         struct kvm_segment *var, int seg)
4146 {
4147         kvm_x86_ops->set_segment(vcpu, var, seg);
4148 }
4149
4150 void kvm_get_segment(struct kvm_vcpu *vcpu,
4151                      struct kvm_segment *var, int seg)
4152 {
4153         kvm_x86_ops->get_segment(vcpu, var, seg);
4154 }
4155
4156 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4157                            struct x86_exception *exception)
4158 {
4159         gpa_t t_gpa;
4160
4161         BUG_ON(!mmu_is_nested(vcpu));
4162
4163         /* NPT walks are always user-walks */
4164         access |= PFERR_USER_MASK;
4165         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4166
4167         return t_gpa;
4168 }
4169
4170 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4171                               struct x86_exception *exception)
4172 {
4173         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4174         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4175 }
4176
4177  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4178                                 struct x86_exception *exception)
4179 {
4180         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4181         access |= PFERR_FETCH_MASK;
4182         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4183 }
4184
4185 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4186                                struct x86_exception *exception)
4187 {
4188         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4189         access |= PFERR_WRITE_MASK;
4190         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4191 }
4192
4193 /* uses this to access any guest's mapped memory without checking CPL */
4194 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4195                                 struct x86_exception *exception)
4196 {
4197         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4198 }
4199
4200 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4201                                       struct kvm_vcpu *vcpu, u32 access,
4202                                       struct x86_exception *exception)
4203 {
4204         void *data = val;
4205         int r = X86EMUL_CONTINUE;
4206
4207         while (bytes) {
4208                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4209                                                             exception);
4210                 unsigned offset = addr & (PAGE_SIZE-1);
4211                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4212                 int ret;
4213
4214                 if (gpa == UNMAPPED_GVA)
4215                         return X86EMUL_PROPAGATE_FAULT;
4216                 ret = kvm_read_guest_page(vcpu->kvm, gpa >> PAGE_SHIFT, data,
4217                                           offset, toread);
4218                 if (ret < 0) {
4219                         r = X86EMUL_IO_NEEDED;
4220                         goto out;
4221                 }
4222
4223                 bytes -= toread;
4224                 data += toread;
4225                 addr += toread;
4226         }
4227 out:
4228         return r;
4229 }
4230
4231 /* used for instruction fetching */
4232 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4233                                 gva_t addr, void *val, unsigned int bytes,
4234                                 struct x86_exception *exception)
4235 {
4236         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4237         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4238         unsigned offset;
4239         int ret;
4240
4241         /* Inline kvm_read_guest_virt_helper for speed.  */
4242         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4243                                                     exception);
4244         if (unlikely(gpa == UNMAPPED_GVA))
4245                 return X86EMUL_PROPAGATE_FAULT;
4246
4247         offset = addr & (PAGE_SIZE-1);
4248         if (WARN_ON(offset + bytes > PAGE_SIZE))
4249                 bytes = (unsigned)PAGE_SIZE - offset;
4250         ret = kvm_read_guest_page(vcpu->kvm, gpa >> PAGE_SHIFT, val,
4251                                   offset, bytes);
4252         if (unlikely(ret < 0))
4253                 return X86EMUL_IO_NEEDED;
4254
4255         return X86EMUL_CONTINUE;
4256 }
4257
4258 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4259                                gva_t addr, void *val, unsigned int bytes,
4260                                struct x86_exception *exception)
4261 {
4262         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4263         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4264
4265         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4266                                           exception);
4267 }
4268 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4269
4270 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4271                                       gva_t addr, void *val, unsigned int bytes,
4272                                       struct x86_exception *exception)
4273 {
4274         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4275         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4276 }
4277
4278 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4279                                        gva_t addr, void *val,
4280                                        unsigned int bytes,
4281                                        struct x86_exception *exception)
4282 {
4283         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4284         void *data = val;
4285         int r = X86EMUL_CONTINUE;
4286
4287         while (bytes) {
4288                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4289                                                              PFERR_WRITE_MASK,
4290                                                              exception);
4291                 unsigned offset = addr & (PAGE_SIZE-1);
4292                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4293                 int ret;
4294
4295                 if (gpa == UNMAPPED_GVA)
4296                         return X86EMUL_PROPAGATE_FAULT;
4297                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4298                 if (ret < 0) {
4299                         r = X86EMUL_IO_NEEDED;
4300                         goto out;
4301                 }
4302
4303                 bytes -= towrite;
4304                 data += towrite;
4305                 addr += towrite;
4306         }
4307 out:
4308         return r;
4309 }
4310 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4311
4312 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4313                                 gpa_t *gpa, struct x86_exception *exception,
4314                                 bool write)
4315 {
4316         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4317                 | (write ? PFERR_WRITE_MASK : 0);
4318
4319         if (vcpu_match_mmio_gva(vcpu, gva)
4320             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4321                                  vcpu->arch.access, access)) {
4322                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4323                                         (gva & (PAGE_SIZE - 1));
4324                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4325                 return 1;
4326         }
4327
4328         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4329
4330         if (*gpa == UNMAPPED_GVA)
4331                 return -1;
4332
4333         /* For APIC access vmexit */
4334         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4335                 return 1;
4336
4337         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4338                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4339                 return 1;
4340         }
4341
4342         return 0;
4343 }
4344
4345 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4346                         const void *val, int bytes)
4347 {
4348         int ret;
4349
4350         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4351         if (ret < 0)
4352                 return 0;
4353         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4354         return 1;
4355 }
4356
4357 struct read_write_emulator_ops {
4358         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4359                                   int bytes);
4360         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4361                                   void *val, int bytes);
4362         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4363                                int bytes, void *val);
4364         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4365                                     void *val, int bytes);
4366         bool write;
4367 };
4368
4369 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4370 {
4371         if (vcpu->mmio_read_completed) {
4372                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4373                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4374                 vcpu->mmio_read_completed = 0;
4375                 return 1;
4376         }
4377
4378         return 0;
4379 }
4380
4381 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4382                         void *val, int bytes)
4383 {
4384         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4385 }
4386
4387 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4388                          void *val, int bytes)
4389 {
4390         return emulator_write_phys(vcpu, gpa, val, bytes);
4391 }
4392
4393 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4394 {
4395         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4396         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4397 }
4398
4399 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4400                           void *val, int bytes)
4401 {
4402         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4403         return X86EMUL_IO_NEEDED;
4404 }
4405
4406 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4407                            void *val, int bytes)
4408 {
4409         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4410
4411         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4412         return X86EMUL_CONTINUE;
4413 }
4414
4415 static const struct read_write_emulator_ops read_emultor = {
4416         .read_write_prepare = read_prepare,
4417         .read_write_emulate = read_emulate,
4418         .read_write_mmio = vcpu_mmio_read,
4419         .read_write_exit_mmio = read_exit_mmio,
4420 };
4421
4422 static const struct read_write_emulator_ops write_emultor = {
4423         .read_write_emulate = write_emulate,
4424         .read_write_mmio = write_mmio,
4425         .read_write_exit_mmio = write_exit_mmio,
4426         .write = true,
4427 };
4428
4429 static int emulator_read_write_onepage(unsigned long addr, void *val,
4430                                        unsigned int bytes,
4431                                        struct x86_exception *exception,
4432                                        struct kvm_vcpu *vcpu,
4433                                        const struct read_write_emulator_ops *ops)
4434 {
4435         gpa_t gpa;
4436         int handled, ret;
4437         bool write = ops->write;
4438         struct kvm_mmio_fragment *frag;
4439
4440         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4441
4442         if (ret < 0)
4443                 return X86EMUL_PROPAGATE_FAULT;
4444
4445         /* For APIC access vmexit */
4446         if (ret)
4447                 goto mmio;
4448
4449         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4450                 return X86EMUL_CONTINUE;
4451
4452 mmio:
4453         /*
4454          * Is this MMIO handled locally?
4455          */
4456         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4457         if (handled == bytes)
4458                 return X86EMUL_CONTINUE;
4459
4460         gpa += handled;
4461         bytes -= handled;
4462         val += handled;
4463
4464         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4465         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4466         frag->gpa = gpa;
4467         frag->data = val;
4468         frag->len = bytes;
4469         return X86EMUL_CONTINUE;
4470 }
4471
4472 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4473                         void *val, unsigned int bytes,
4474                         struct x86_exception *exception,
4475                         const struct read_write_emulator_ops *ops)
4476 {
4477         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4478         gpa_t gpa;
4479         int rc;
4480
4481         if (ops->read_write_prepare &&
4482                   ops->read_write_prepare(vcpu, val, bytes))
4483                 return X86EMUL_CONTINUE;
4484
4485         vcpu->mmio_nr_fragments = 0;
4486
4487         /* Crossing a page boundary? */
4488         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4489                 int now;
4490
4491                 now = -addr & ~PAGE_MASK;
4492                 rc = emulator_read_write_onepage(addr, val, now, exception,
4493                                                  vcpu, ops);
4494
4495                 if (rc != X86EMUL_CONTINUE)
4496                         return rc;
4497                 addr += now;
4498                 val += now;
4499                 bytes -= now;
4500         }
4501
4502         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4503                                          vcpu, ops);
4504         if (rc != X86EMUL_CONTINUE)
4505                 return rc;
4506
4507         if (!vcpu->mmio_nr_fragments)
4508                 return rc;
4509
4510         gpa = vcpu->mmio_fragments[0].gpa;
4511
4512         vcpu->mmio_needed = 1;
4513         vcpu->mmio_cur_fragment = 0;
4514
4515         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4516         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4517         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4518         vcpu->run->mmio.phys_addr = gpa;
4519
4520         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4521 }
4522
4523 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4524                                   unsigned long addr,
4525                                   void *val,
4526                                   unsigned int bytes,
4527                                   struct x86_exception *exception)
4528 {
4529         return emulator_read_write(ctxt, addr, val, bytes,
4530                                    exception, &read_emultor);
4531 }
4532
4533 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4534                             unsigned long addr,
4535                             const void *val,
4536                             unsigned int bytes,
4537                             struct x86_exception *exception)
4538 {
4539         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4540                                    exception, &write_emultor);
4541 }
4542
4543 #define CMPXCHG_TYPE(t, ptr, old, new) \
4544         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4545
4546 #ifdef CONFIG_X86_64
4547 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4548 #else
4549 #  define CMPXCHG64(ptr, old, new) \
4550         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4551 #endif
4552
4553 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4554                                      unsigned long addr,
4555                                      const void *old,
4556                                      const void *new,
4557                                      unsigned int bytes,
4558                                      struct x86_exception *exception)
4559 {
4560         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4561         gpa_t gpa;
4562         struct page *page;
4563         char *kaddr;
4564         bool exchanged;
4565
4566         /* guests cmpxchg8b have to be emulated atomically */
4567         if (bytes > 8 || (bytes & (bytes - 1)))
4568                 goto emul_write;
4569
4570         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4571
4572         if (gpa == UNMAPPED_GVA ||
4573             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4574                 goto emul_write;
4575
4576         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4577                 goto emul_write;
4578
4579         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4580         if (is_error_page(page))
4581                 goto emul_write;
4582
4583         kaddr = kmap_atomic(page);
4584         kaddr += offset_in_page(gpa);
4585         switch (bytes) {
4586         case 1:
4587                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4588                 break;
4589         case 2:
4590                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4591                 break;
4592         case 4:
4593                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4594                 break;
4595         case 8:
4596                 exchanged = CMPXCHG64(kaddr, old, new);
4597                 break;
4598         default:
4599                 BUG();
4600         }
4601         kunmap_atomic(kaddr);
4602         kvm_release_page_dirty(page);
4603
4604         if (!exchanged)
4605                 return X86EMUL_CMPXCHG_FAILED;
4606
4607         mark_page_dirty(vcpu->kvm, gpa >> PAGE_SHIFT);
4608         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4609
4610         return X86EMUL_CONTINUE;
4611
4612 emul_write:
4613         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4614
4615         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4616 }
4617
4618 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4619 {
4620         /* TODO: String I/O for in kernel device */
4621         int r;
4622
4623         if (vcpu->arch.pio.in)
4624                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4625                                     vcpu->arch.pio.size, pd);
4626         else
4627                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4628                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4629                                      pd);
4630         return r;
4631 }
4632
4633 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4634                                unsigned short port, void *val,
4635                                unsigned int count, bool in)
4636 {
4637         vcpu->arch.pio.port = port;
4638         vcpu->arch.pio.in = in;
4639         vcpu->arch.pio.count  = count;
4640         vcpu->arch.pio.size = size;
4641
4642         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4643                 vcpu->arch.pio.count = 0;
4644                 return 1;
4645         }
4646
4647         vcpu->run->exit_reason = KVM_EXIT_IO;
4648         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4649         vcpu->run->io.size = size;
4650         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4651         vcpu->run->io.count = count;
4652         vcpu->run->io.port = port;
4653
4654         return 0;
4655 }
4656
4657 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4658                                     int size, unsigned short port, void *val,
4659                                     unsigned int count)
4660 {
4661         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4662         int ret;
4663
4664         if (vcpu->arch.pio.count)
4665                 goto data_avail;
4666
4667         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4668         if (ret) {
4669 data_avail:
4670                 memcpy(val, vcpu->arch.pio_data, size * count);
4671                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4672                 vcpu->arch.pio.count = 0;
4673                 return 1;
4674         }
4675
4676         return 0;
4677 }
4678
4679 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4680                                      int size, unsigned short port,
4681                                      const void *val, unsigned int count)
4682 {
4683         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4684
4685         memcpy(vcpu->arch.pio_data, val, size * count);
4686         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4687         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4688 }
4689
4690 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4691 {
4692         return kvm_x86_ops->get_segment_base(vcpu, seg);
4693 }
4694
4695 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4696 {
4697         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4698 }
4699
4700 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4701 {
4702         if (!need_emulate_wbinvd(vcpu))
4703                 return X86EMUL_CONTINUE;
4704
4705         if (kvm_x86_ops->has_wbinvd_exit()) {
4706                 int cpu = get_cpu();
4707
4708                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4709                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4710                                 wbinvd_ipi, NULL, 1);
4711                 put_cpu();
4712                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4713         } else
4714                 wbinvd();
4715         return X86EMUL_CONTINUE;
4716 }
4717 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4718
4719 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4720 {
4721         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4722 }
4723
4724 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4725 {
4726         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4727 }
4728
4729 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4730 {
4731
4732         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4733 }
4734
4735 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4736 {
4737         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4738 }
4739
4740 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4741 {
4742         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4743         unsigned long value;
4744
4745         switch (cr) {
4746         case 0:
4747                 value = kvm_read_cr0(vcpu);
4748                 break;
4749         case 2:
4750                 value = vcpu->arch.cr2;
4751                 break;
4752         case 3:
4753                 value = kvm_read_cr3(vcpu);
4754                 break;
4755         case 4:
4756                 value = kvm_read_cr4(vcpu);
4757                 break;
4758         case 8:
4759                 value = kvm_get_cr8(vcpu);
4760                 break;
4761         default:
4762                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4763                 return 0;
4764         }
4765
4766         return value;
4767 }
4768
4769 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4770 {
4771         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4772         int res = 0;
4773
4774         switch (cr) {
4775         case 0:
4776                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4777                 break;
4778         case 2:
4779                 vcpu->arch.cr2 = val;
4780                 break;
4781         case 3:
4782                 res = kvm_set_cr3(vcpu, val);
4783                 break;
4784         case 4:
4785                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4786                 break;
4787         case 8:
4788                 res = kvm_set_cr8(vcpu, val);
4789                 break;
4790         default:
4791                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4792                 res = -1;
4793         }
4794
4795         return res;
4796 }
4797
4798 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4799 {
4800         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4801 }
4802
4803 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4804 {
4805         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4806 }
4807
4808 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4809 {
4810         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4811 }
4812
4813 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4814 {
4815         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4816 }
4817
4818 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4819 {
4820         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4821 }
4822
4823 static unsigned long emulator_get_cached_segment_base(
4824         struct x86_emulate_ctxt *ctxt, int seg)
4825 {
4826         return get_segment_base(emul_to_vcpu(ctxt), seg);
4827 }
4828
4829 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4830                                  struct desc_struct *desc, u32 *base3,
4831                                  int seg)
4832 {
4833         struct kvm_segment var;
4834
4835         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4836         *selector = var.selector;
4837
4838         if (var.unusable) {
4839                 memset(desc, 0, sizeof(*desc));
4840                 return false;
4841         }
4842
4843         if (var.g)
4844                 var.limit >>= 12;
4845         set_desc_limit(desc, var.limit);
4846         set_desc_base(desc, (unsigned long)var.base);
4847 #ifdef CONFIG_X86_64
4848         if (base3)
4849                 *base3 = var.base >> 32;
4850 #endif
4851         desc->type = var.type;
4852         desc->s = var.s;
4853         desc->dpl = var.dpl;
4854         desc->p = var.present;
4855         desc->avl = var.avl;
4856         desc->l = var.l;
4857         desc->d = var.db;
4858         desc->g = var.g;
4859
4860         return true;
4861 }
4862
4863 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4864                                  struct desc_struct *desc, u32 base3,
4865                                  int seg)
4866 {
4867         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4868         struct kvm_segment var;
4869
4870         var.selector = selector;
4871         var.base = get_desc_base(desc);
4872 #ifdef CONFIG_X86_64
4873         var.base |= ((u64)base3) << 32;
4874 #endif
4875         var.limit = get_desc_limit(desc);
4876         if (desc->g)
4877                 var.limit = (var.limit << 12) | 0xfff;
4878         var.type = desc->type;
4879         var.dpl = desc->dpl;
4880         var.db = desc->d;
4881         var.s = desc->s;
4882         var.l = desc->l;
4883         var.g = desc->g;
4884         var.avl = desc->avl;
4885         var.present = desc->p;
4886         var.unusable = !var.present;
4887         var.padding = 0;
4888
4889         kvm_set_segment(vcpu, &var, seg);
4890         return;
4891 }
4892
4893 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4894                             u32 msr_index, u64 *pdata)
4895 {
4896         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4897 }
4898
4899 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4900                             u32 msr_index, u64 data)
4901 {
4902         struct msr_data msr;
4903
4904         msr.data = data;
4905         msr.index = msr_index;
4906         msr.host_initiated = false;
4907         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4908 }
4909
4910 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4911                               u32 pmc)
4912 {
4913         return kvm_pmu_check_pmc(emul_to_vcpu(ctxt), pmc);
4914 }
4915
4916 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4917                              u32 pmc, u64 *pdata)
4918 {
4919         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4920 }
4921
4922 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4923 {
4924         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4925 }
4926
4927 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4928 {
4929         preempt_disable();
4930         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4931         /*
4932          * CR0.TS may reference the host fpu state, not the guest fpu state,
4933          * so it may be clear at this point.
4934          */
4935         clts();
4936 }
4937
4938 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4939 {
4940         preempt_enable();
4941 }
4942
4943 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4944                               struct x86_instruction_info *info,
4945                               enum x86_intercept_stage stage)
4946 {
4947         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4948 }
4949
4950 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4951                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4952 {
4953         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4954 }
4955
4956 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4957 {
4958         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4959 }
4960
4961 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4962 {
4963         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4964 }
4965
4966 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4967 {
4968         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4969 }
4970
4971 static const struct x86_emulate_ops emulate_ops = {
4972         .read_gpr            = emulator_read_gpr,
4973         .write_gpr           = emulator_write_gpr,
4974         .read_std            = kvm_read_guest_virt_system,
4975         .write_std           = kvm_write_guest_virt_system,
4976         .fetch               = kvm_fetch_guest_virt,
4977         .read_emulated       = emulator_read_emulated,
4978         .write_emulated      = emulator_write_emulated,
4979         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4980         .invlpg              = emulator_invlpg,
4981         .pio_in_emulated     = emulator_pio_in_emulated,
4982         .pio_out_emulated    = emulator_pio_out_emulated,
4983         .get_segment         = emulator_get_segment,
4984         .set_segment         = emulator_set_segment,
4985         .get_cached_segment_base = emulator_get_cached_segment_base,
4986         .get_gdt             = emulator_get_gdt,
4987         .get_idt             = emulator_get_idt,
4988         .set_gdt             = emulator_set_gdt,
4989         .set_idt             = emulator_set_idt,
4990         .get_cr              = emulator_get_cr,
4991         .set_cr              = emulator_set_cr,
4992         .cpl                 = emulator_get_cpl,
4993         .get_dr              = emulator_get_dr,
4994         .set_dr              = emulator_set_dr,
4995         .set_msr             = emulator_set_msr,
4996         .get_msr             = emulator_get_msr,
4997         .check_pmc           = emulator_check_pmc,
4998         .read_pmc            = emulator_read_pmc,
4999         .halt                = emulator_halt,
5000         .wbinvd              = emulator_wbinvd,
5001         .fix_hypercall       = emulator_fix_hypercall,
5002         .get_fpu             = emulator_get_fpu,
5003         .put_fpu             = emulator_put_fpu,
5004         .intercept           = emulator_intercept,
5005         .get_cpuid           = emulator_get_cpuid,
5006         .set_nmi_mask        = emulator_set_nmi_mask,
5007 };
5008
5009 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5010 {
5011         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5012         /*
5013          * an sti; sti; sequence only disable interrupts for the first
5014          * instruction. So, if the last instruction, be it emulated or
5015          * not, left the system with the INT_STI flag enabled, it
5016          * means that the last instruction is an sti. We should not
5017          * leave the flag on in this case. The same goes for mov ss
5018          */
5019         if (int_shadow & mask)
5020                 mask = 0;
5021         if (unlikely(int_shadow || mask)) {
5022                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5023                 if (!mask)
5024                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5025         }
5026 }
5027
5028 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5029 {
5030         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5031         if (ctxt->exception.vector == PF_VECTOR)
5032                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5033
5034         if (ctxt->exception.error_code_valid)
5035                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5036                                       ctxt->exception.error_code);
5037         else
5038                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5039         return false;
5040 }
5041
5042 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5043 {
5044         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5045         int cs_db, cs_l;
5046
5047         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5048
5049         ctxt->eflags = kvm_get_rflags(vcpu);
5050         ctxt->eip = kvm_rip_read(vcpu);
5051         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5052                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5053                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5054                      cs_db                              ? X86EMUL_MODE_PROT32 :
5055                                                           X86EMUL_MODE_PROT16;
5056         ctxt->guest_mode = is_guest_mode(vcpu);
5057
5058         init_decode_cache(ctxt);
5059         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5060 }
5061
5062 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5063 {
5064         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5065         int ret;
5066
5067         init_emulate_ctxt(vcpu);
5068
5069         ctxt->op_bytes = 2;
5070         ctxt->ad_bytes = 2;
5071         ctxt->_eip = ctxt->eip + inc_eip;
5072         ret = emulate_int_real(ctxt, irq);
5073
5074         if (ret != X86EMUL_CONTINUE)
5075                 return EMULATE_FAIL;
5076
5077         ctxt->eip = ctxt->_eip;
5078         kvm_rip_write(vcpu, ctxt->eip);
5079         kvm_set_rflags(vcpu, ctxt->eflags);
5080
5081         if (irq == NMI_VECTOR)
5082                 vcpu->arch.nmi_pending = 0;
5083         else
5084                 vcpu->arch.interrupt.pending = false;
5085
5086         return EMULATE_DONE;
5087 }
5088 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5089
5090 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5091 {
5092         int r = EMULATE_DONE;
5093
5094         ++vcpu->stat.insn_emulation_fail;
5095         trace_kvm_emulate_insn_failed(vcpu);
5096         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5097                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5098                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5099                 vcpu->run->internal.ndata = 0;
5100                 r = EMULATE_FAIL;
5101         }
5102         kvm_queue_exception(vcpu, UD_VECTOR);
5103
5104         return r;
5105 }
5106
5107 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5108                                   bool write_fault_to_shadow_pgtable,
5109                                   int emulation_type)
5110 {
5111         gpa_t gpa = cr2;
5112         pfn_t pfn;
5113
5114         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5115                 return false;
5116
5117         if (!vcpu->arch.mmu.direct_map) {
5118                 /*
5119                  * Write permission should be allowed since only
5120                  * write access need to be emulated.
5121                  */
5122                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5123
5124                 /*
5125                  * If the mapping is invalid in guest, let cpu retry
5126                  * it to generate fault.
5127                  */
5128                 if (gpa == UNMAPPED_GVA)
5129                         return true;
5130         }
5131
5132         /*
5133          * Do not retry the unhandleable instruction if it faults on the
5134          * readonly host memory, otherwise it will goto a infinite loop:
5135          * retry instruction -> write #PF -> emulation fail -> retry
5136          * instruction -> ...
5137          */
5138         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5139
5140         /*
5141          * If the instruction failed on the error pfn, it can not be fixed,
5142          * report the error to userspace.
5143          */
5144         if (is_error_noslot_pfn(pfn))
5145                 return false;
5146
5147         kvm_release_pfn_clean(pfn);
5148
5149         /* The instructions are well-emulated on direct mmu. */
5150         if (vcpu->arch.mmu.direct_map) {
5151                 unsigned int indirect_shadow_pages;
5152
5153                 spin_lock(&vcpu->kvm->mmu_lock);
5154                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5155                 spin_unlock(&vcpu->kvm->mmu_lock);
5156
5157                 if (indirect_shadow_pages)
5158                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5159
5160                 return true;
5161         }
5162
5163         /*
5164          * if emulation was due to access to shadowed page table
5165          * and it failed try to unshadow page and re-enter the
5166          * guest to let CPU execute the instruction.
5167          */
5168         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5169
5170         /*
5171          * If the access faults on its page table, it can not
5172          * be fixed by unprotecting shadow page and it should
5173          * be reported to userspace.
5174          */
5175         return !write_fault_to_shadow_pgtable;
5176 }
5177
5178 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5179                               unsigned long cr2,  int emulation_type)
5180 {
5181         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5182         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5183
5184         last_retry_eip = vcpu->arch.last_retry_eip;
5185         last_retry_addr = vcpu->arch.last_retry_addr;
5186
5187         /*
5188          * If the emulation is caused by #PF and it is non-page_table
5189          * writing instruction, it means the VM-EXIT is caused by shadow
5190          * page protected, we can zap the shadow page and retry this
5191          * instruction directly.
5192          *
5193          * Note: if the guest uses a non-page-table modifying instruction
5194          * on the PDE that points to the instruction, then we will unmap
5195          * the instruction and go to an infinite loop. So, we cache the
5196          * last retried eip and the last fault address, if we meet the eip
5197          * and the address again, we can break out of the potential infinite
5198          * loop.
5199          */
5200         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5201
5202         if (!(emulation_type & EMULTYPE_RETRY))
5203                 return false;
5204
5205         if (x86_page_table_writing_insn(ctxt))
5206                 return false;
5207
5208         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5209                 return false;
5210
5211         vcpu->arch.last_retry_eip = ctxt->eip;
5212         vcpu->arch.last_retry_addr = cr2;
5213
5214         if (!vcpu->arch.mmu.direct_map)
5215                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5216
5217         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5218
5219         return true;
5220 }
5221
5222 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5223 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5224
5225 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5226                                 unsigned long *db)
5227 {
5228         u32 dr6 = 0;
5229         int i;
5230         u32 enable, rwlen;
5231
5232         enable = dr7;
5233         rwlen = dr7 >> 16;
5234         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5235                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5236                         dr6 |= (1 << i);
5237         return dr6;
5238 }
5239
5240 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5241 {
5242         struct kvm_run *kvm_run = vcpu->run;
5243
5244         /*
5245          * rflags is the old, "raw" value of the flags.  The new value has
5246          * not been saved yet.
5247          *
5248          * This is correct even for TF set by the guest, because "the
5249          * processor will not generate this exception after the instruction
5250          * that sets the TF flag".
5251          */
5252         if (unlikely(rflags & X86_EFLAGS_TF)) {
5253                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5254                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5255                                                   DR6_RTM;
5256                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5257                         kvm_run->debug.arch.exception = DB_VECTOR;
5258                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5259                         *r = EMULATE_USER_EXIT;
5260                 } else {
5261                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5262                         /*
5263                          * "Certain debug exceptions may clear bit 0-3.  The
5264                          * remaining contents of the DR6 register are never
5265                          * cleared by the processor".
5266                          */
5267                         vcpu->arch.dr6 &= ~15;
5268                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5269                         kvm_queue_exception(vcpu, DB_VECTOR);
5270                 }
5271         }
5272 }
5273
5274 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5275 {
5276         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5277             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5278                 struct kvm_run *kvm_run = vcpu->run;
5279                 unsigned long eip = kvm_get_linear_rip(vcpu);
5280                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5281                                            vcpu->arch.guest_debug_dr7,
5282                                            vcpu->arch.eff_db);
5283
5284                 if (dr6 != 0) {
5285                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5286                         kvm_run->debug.arch.pc = eip;
5287                         kvm_run->debug.arch.exception = DB_VECTOR;
5288                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5289                         *r = EMULATE_USER_EXIT;
5290                         return true;
5291                 }
5292         }
5293
5294         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5295             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5296                 unsigned long eip = kvm_get_linear_rip(vcpu);
5297                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5298                                            vcpu->arch.dr7,
5299                                            vcpu->arch.db);
5300
5301                 if (dr6 != 0) {
5302                         vcpu->arch.dr6 &= ~15;
5303                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5304                         kvm_queue_exception(vcpu, DB_VECTOR);
5305                         *r = EMULATE_DONE;
5306                         return true;
5307                 }
5308         }
5309
5310         return false;
5311 }
5312
5313 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5314                             unsigned long cr2,
5315                             int emulation_type,
5316                             void *insn,
5317                             int insn_len)
5318 {
5319         int r;
5320         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5321         bool writeback = true;
5322         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5323
5324         /*
5325          * Clear write_fault_to_shadow_pgtable here to ensure it is
5326          * never reused.
5327          */
5328         vcpu->arch.write_fault_to_shadow_pgtable = false;
5329         kvm_clear_exception_queue(vcpu);
5330
5331         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5332                 init_emulate_ctxt(vcpu);
5333
5334                 /*
5335                  * We will reenter on the same instruction since
5336                  * we do not set complete_userspace_io.  This does not
5337                  * handle watchpoints yet, those would be handled in
5338                  * the emulate_ops.
5339                  */
5340                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5341                         return r;
5342
5343                 ctxt->interruptibility = 0;
5344                 ctxt->have_exception = false;
5345                 ctxt->exception.vector = -1;
5346                 ctxt->perm_ok = false;
5347
5348                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5349
5350                 r = x86_decode_insn(ctxt, insn, insn_len);
5351
5352                 trace_kvm_emulate_insn_start(vcpu);
5353                 ++vcpu->stat.insn_emulation;
5354                 if (r != EMULATION_OK)  {
5355                         if (emulation_type & EMULTYPE_TRAP_UD)
5356                                 return EMULATE_FAIL;
5357                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5358                                                 emulation_type))
5359                                 return EMULATE_DONE;
5360                         if (emulation_type & EMULTYPE_SKIP)
5361                                 return EMULATE_FAIL;
5362                         return handle_emulation_failure(vcpu);
5363                 }
5364         }
5365
5366         if (emulation_type & EMULTYPE_SKIP) {
5367                 kvm_rip_write(vcpu, ctxt->_eip);
5368                 if (ctxt->eflags & X86_EFLAGS_RF)
5369                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5370                 return EMULATE_DONE;
5371         }
5372
5373         if (retry_instruction(ctxt, cr2, emulation_type))
5374                 return EMULATE_DONE;
5375
5376         /* this is needed for vmware backdoor interface to work since it
5377            changes registers values  during IO operation */
5378         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5379                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5380                 emulator_invalidate_register_cache(ctxt);
5381         }
5382
5383 restart:
5384         r = x86_emulate_insn(ctxt);
5385
5386         if (r == EMULATION_INTERCEPTED)
5387                 return EMULATE_DONE;
5388
5389         if (r == EMULATION_FAILED) {
5390                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5391                                         emulation_type))
5392                         return EMULATE_DONE;
5393
5394                 return handle_emulation_failure(vcpu);
5395         }
5396
5397         if (ctxt->have_exception) {
5398                 r = EMULATE_DONE;
5399                 if (inject_emulated_exception(vcpu))
5400                         return r;
5401         } else if (vcpu->arch.pio.count) {
5402                 if (!vcpu->arch.pio.in) {
5403                         /* FIXME: return into emulator if single-stepping.  */
5404                         vcpu->arch.pio.count = 0;
5405                 } else {
5406                         writeback = false;
5407                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5408                 }
5409                 r = EMULATE_USER_EXIT;
5410         } else if (vcpu->mmio_needed) {
5411                 if (!vcpu->mmio_is_write)
5412                         writeback = false;
5413                 r = EMULATE_USER_EXIT;
5414                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5415         } else if (r == EMULATION_RESTART)
5416                 goto restart;
5417         else
5418                 r = EMULATE_DONE;
5419
5420         if (writeback) {
5421                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5422                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5423                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5424                 kvm_rip_write(vcpu, ctxt->eip);
5425                 if (r == EMULATE_DONE)
5426                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5427                 if (!ctxt->have_exception ||
5428                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5429                         __kvm_set_rflags(vcpu, ctxt->eflags);
5430
5431                 /*
5432                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5433                  * do nothing, and it will be requested again as soon as
5434                  * the shadow expires.  But we still need to check here,
5435                  * because POPF has no interrupt shadow.
5436                  */
5437                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5438                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5439         } else
5440                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5441
5442         return r;
5443 }
5444 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5445
5446 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5447 {
5448         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5449         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5450                                             size, port, &val, 1);
5451         /* do not return to emulator after return from userspace */
5452         vcpu->arch.pio.count = 0;
5453         return ret;
5454 }
5455 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5456
5457 static void tsc_bad(void *info)
5458 {
5459         __this_cpu_write(cpu_tsc_khz, 0);
5460 }
5461
5462 static void tsc_khz_changed(void *data)
5463 {
5464         struct cpufreq_freqs *freq = data;
5465         unsigned long khz = 0;
5466
5467         if (data)
5468                 khz = freq->new;
5469         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5470                 khz = cpufreq_quick_get(raw_smp_processor_id());
5471         if (!khz)
5472                 khz = tsc_khz;
5473         __this_cpu_write(cpu_tsc_khz, khz);
5474 }
5475
5476 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5477                                      void *data)
5478 {
5479         struct cpufreq_freqs *freq = data;
5480         struct kvm *kvm;
5481         struct kvm_vcpu *vcpu;
5482         int i, send_ipi = 0;
5483
5484         /*
5485          * We allow guests to temporarily run on slowing clocks,
5486          * provided we notify them after, or to run on accelerating
5487          * clocks, provided we notify them before.  Thus time never
5488          * goes backwards.
5489          *
5490          * However, we have a problem.  We can't atomically update
5491          * the frequency of a given CPU from this function; it is
5492          * merely a notifier, which can be called from any CPU.
5493          * Changing the TSC frequency at arbitrary points in time
5494          * requires a recomputation of local variables related to
5495          * the TSC for each VCPU.  We must flag these local variables
5496          * to be updated and be sure the update takes place with the
5497          * new frequency before any guests proceed.
5498          *
5499          * Unfortunately, the combination of hotplug CPU and frequency
5500          * change creates an intractable locking scenario; the order
5501          * of when these callouts happen is undefined with respect to
5502          * CPU hotplug, and they can race with each other.  As such,
5503          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5504          * undefined; you can actually have a CPU frequency change take
5505          * place in between the computation of X and the setting of the
5506          * variable.  To protect against this problem, all updates of
5507          * the per_cpu tsc_khz variable are done in an interrupt
5508          * protected IPI, and all callers wishing to update the value
5509          * must wait for a synchronous IPI to complete (which is trivial
5510          * if the caller is on the CPU already).  This establishes the
5511          * necessary total order on variable updates.
5512          *
5513          * Note that because a guest time update may take place
5514          * anytime after the setting of the VCPU's request bit, the
5515          * correct TSC value must be set before the request.  However,
5516          * to ensure the update actually makes it to any guest which
5517          * starts running in hardware virtualization between the set
5518          * and the acquisition of the spinlock, we must also ping the
5519          * CPU after setting the request bit.
5520          *
5521          */
5522
5523         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5524                 return 0;
5525         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5526                 return 0;
5527
5528         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5529
5530         spin_lock(&kvm_lock);
5531         list_for_each_entry(kvm, &vm_list, vm_list) {
5532                 kvm_for_each_vcpu(i, vcpu, kvm) {
5533                         if (vcpu->cpu != freq->cpu)
5534                                 continue;
5535                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5536                         if (vcpu->cpu != smp_processor_id())
5537                                 send_ipi = 1;
5538                 }
5539         }
5540         spin_unlock(&kvm_lock);
5541
5542         if (freq->old < freq->new && send_ipi) {
5543                 /*
5544                  * We upscale the frequency.  Must make the guest
5545                  * doesn't see old kvmclock values while running with
5546                  * the new frequency, otherwise we risk the guest sees
5547                  * time go backwards.
5548                  *
5549                  * In case we update the frequency for another cpu
5550                  * (which might be in guest context) send an interrupt
5551                  * to kick the cpu out of guest context.  Next time
5552                  * guest context is entered kvmclock will be updated,
5553                  * so the guest will not see stale values.
5554                  */
5555                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5556         }
5557         return 0;
5558 }
5559
5560 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5561         .notifier_call  = kvmclock_cpufreq_notifier
5562 };
5563
5564 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5565                                         unsigned long action, void *hcpu)
5566 {
5567         unsigned int cpu = (unsigned long)hcpu;
5568
5569         switch (action) {
5570                 case CPU_ONLINE:
5571                 case CPU_DOWN_FAILED:
5572                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5573                         break;
5574                 case CPU_DOWN_PREPARE:
5575                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5576                         break;
5577         }
5578         return NOTIFY_OK;
5579 }
5580
5581 static struct notifier_block kvmclock_cpu_notifier_block = {
5582         .notifier_call  = kvmclock_cpu_notifier,
5583         .priority = -INT_MAX
5584 };
5585
5586 static void kvm_timer_init(void)
5587 {
5588         int cpu;
5589
5590         max_tsc_khz = tsc_khz;
5591
5592         cpu_notifier_register_begin();
5593         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5594 #ifdef CONFIG_CPU_FREQ
5595                 struct cpufreq_policy policy;
5596                 memset(&policy, 0, sizeof(policy));
5597                 cpu = get_cpu();
5598                 cpufreq_get_policy(&policy, cpu);
5599                 if (policy.cpuinfo.max_freq)
5600                         max_tsc_khz = policy.cpuinfo.max_freq;
5601                 put_cpu();
5602 #endif
5603                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5604                                           CPUFREQ_TRANSITION_NOTIFIER);
5605         }
5606         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5607         for_each_online_cpu(cpu)
5608                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5609
5610         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5611         cpu_notifier_register_done();
5612
5613 }
5614
5615 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5616
5617 int kvm_is_in_guest(void)
5618 {
5619         return __this_cpu_read(current_vcpu) != NULL;
5620 }
5621
5622 static int kvm_is_user_mode(void)
5623 {
5624         int user_mode = 3;
5625
5626         if (__this_cpu_read(current_vcpu))
5627                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5628
5629         return user_mode != 0;
5630 }
5631
5632 static unsigned long kvm_get_guest_ip(void)
5633 {
5634         unsigned long ip = 0;
5635
5636         if (__this_cpu_read(current_vcpu))
5637                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5638
5639         return ip;
5640 }
5641
5642 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5643         .is_in_guest            = kvm_is_in_guest,
5644         .is_user_mode           = kvm_is_user_mode,
5645         .get_guest_ip           = kvm_get_guest_ip,
5646 };
5647
5648 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5649 {
5650         __this_cpu_write(current_vcpu, vcpu);
5651 }
5652 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5653
5654 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5655 {
5656         __this_cpu_write(current_vcpu, NULL);
5657 }
5658 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5659
5660 static void kvm_set_mmio_spte_mask(void)
5661 {
5662         u64 mask;
5663         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5664
5665         /*
5666          * Set the reserved bits and the present bit of an paging-structure
5667          * entry to generate page fault with PFER.RSV = 1.
5668          */
5669          /* Mask the reserved physical address bits. */
5670         mask = rsvd_bits(maxphyaddr, 51);
5671
5672         /* Bit 62 is always reserved for 32bit host. */
5673         mask |= 0x3ull << 62;
5674
5675         /* Set the present bit. */
5676         mask |= 1ull;
5677
5678 #ifdef CONFIG_X86_64
5679         /*
5680          * If reserved bit is not supported, clear the present bit to disable
5681          * mmio page fault.
5682          */
5683         if (maxphyaddr == 52)
5684                 mask &= ~1ull;
5685 #endif
5686
5687         kvm_mmu_set_mmio_spte_mask(mask);
5688 }
5689
5690 #ifdef CONFIG_X86_64
5691 static void pvclock_gtod_update_fn(struct work_struct *work)
5692 {
5693         struct kvm *kvm;
5694
5695         struct kvm_vcpu *vcpu;
5696         int i;
5697
5698         spin_lock(&kvm_lock);
5699         list_for_each_entry(kvm, &vm_list, vm_list)
5700                 kvm_for_each_vcpu(i, vcpu, kvm)
5701                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5702         atomic_set(&kvm_guest_has_master_clock, 0);
5703         spin_unlock(&kvm_lock);
5704 }
5705
5706 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5707
5708 /*
5709  * Notification about pvclock gtod data update.
5710  */
5711 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5712                                void *priv)
5713 {
5714         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5715         struct timekeeper *tk = priv;
5716
5717         update_pvclock_gtod(tk);
5718
5719         /* disable master clock if host does not trust, or does not
5720          * use, TSC clocksource
5721          */
5722         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5723             atomic_read(&kvm_guest_has_master_clock) != 0)
5724                 queue_work(system_long_wq, &pvclock_gtod_work);
5725
5726         return 0;
5727 }
5728
5729 static struct notifier_block pvclock_gtod_notifier = {
5730         .notifier_call = pvclock_gtod_notify,
5731 };
5732 #endif
5733
5734 int kvm_arch_init(void *opaque)
5735 {
5736         int r;
5737         struct kvm_x86_ops *ops = opaque;
5738
5739         if (kvm_x86_ops) {
5740                 printk(KERN_ERR "kvm: already loaded the other module\n");
5741                 r = -EEXIST;
5742                 goto out;
5743         }
5744
5745         if (!ops->cpu_has_kvm_support()) {
5746                 printk(KERN_ERR "kvm: no hardware support\n");
5747                 r = -EOPNOTSUPP;
5748                 goto out;
5749         }
5750         if (ops->disabled_by_bios()) {
5751                 printk(KERN_ERR "kvm: disabled by bios\n");
5752                 r = -EOPNOTSUPP;
5753                 goto out;
5754         }
5755
5756         r = -ENOMEM;
5757         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5758         if (!shared_msrs) {
5759                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5760                 goto out;
5761         }
5762
5763         r = kvm_mmu_module_init();
5764         if (r)
5765                 goto out_free_percpu;
5766
5767         kvm_set_mmio_spte_mask();
5768
5769         kvm_x86_ops = ops;
5770         kvm_init_msr_list();
5771
5772         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5773                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5774
5775         kvm_timer_init();
5776
5777         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5778
5779         if (cpu_has_xsave)
5780                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5781
5782         kvm_lapic_init();
5783 #ifdef CONFIG_X86_64
5784         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5785 #endif
5786
5787         return 0;
5788
5789 out_free_percpu:
5790         free_percpu(shared_msrs);
5791 out:
5792         return r;
5793 }
5794
5795 void kvm_arch_exit(void)
5796 {
5797         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5798
5799         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5800                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5801                                             CPUFREQ_TRANSITION_NOTIFIER);
5802         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5803 #ifdef CONFIG_X86_64
5804         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5805 #endif
5806         kvm_x86_ops = NULL;
5807         kvm_mmu_module_exit();
5808         free_percpu(shared_msrs);
5809 }
5810
5811 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5812 {
5813         ++vcpu->stat.halt_exits;
5814         if (irqchip_in_kernel(vcpu->kvm)) {
5815                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5816                 return 1;
5817         } else {
5818                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5819                 return 0;
5820         }
5821 }
5822 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5823
5824 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5825 {
5826         u64 param, ingpa, outgpa, ret;
5827         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5828         bool fast, longmode;
5829
5830         /*
5831          * hypercall generates UD from non zero cpl and real mode
5832          * per HYPER-V spec
5833          */
5834         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5835                 kvm_queue_exception(vcpu, UD_VECTOR);
5836                 return 0;
5837         }
5838
5839         longmode = is_64_bit_mode(vcpu);
5840
5841         if (!longmode) {
5842                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5843                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5844                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5845                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5846                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5847                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5848         }
5849 #ifdef CONFIG_X86_64
5850         else {
5851                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5852                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5853                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5854         }
5855 #endif
5856
5857         code = param & 0xffff;
5858         fast = (param >> 16) & 0x1;
5859         rep_cnt = (param >> 32) & 0xfff;
5860         rep_idx = (param >> 48) & 0xfff;
5861
5862         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5863
5864         switch (code) {
5865         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5866                 kvm_vcpu_on_spin(vcpu);
5867                 break;
5868         default:
5869                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5870                 break;
5871         }
5872
5873         ret = res | (((u64)rep_done & 0xfff) << 32);
5874         if (longmode) {
5875                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5876         } else {
5877                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5878                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5879         }
5880
5881         return 1;
5882 }
5883
5884 /*
5885  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5886  *
5887  * @apicid - apicid of vcpu to be kicked.
5888  */
5889 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5890 {
5891         struct kvm_lapic_irq lapic_irq;
5892
5893         lapic_irq.shorthand = 0;
5894         lapic_irq.dest_mode = 0;
5895         lapic_irq.dest_id = apicid;
5896
5897         lapic_irq.delivery_mode = APIC_DM_REMRD;
5898         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5899 }
5900
5901 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5902 {
5903         unsigned long nr, a0, a1, a2, a3, ret;
5904         int op_64_bit, r = 1;
5905
5906         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5907                 return kvm_hv_hypercall(vcpu);
5908
5909         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5910         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5911         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5912         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5913         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5914
5915         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5916
5917         op_64_bit = is_64_bit_mode(vcpu);
5918         if (!op_64_bit) {
5919                 nr &= 0xFFFFFFFF;
5920                 a0 &= 0xFFFFFFFF;
5921                 a1 &= 0xFFFFFFFF;
5922                 a2 &= 0xFFFFFFFF;
5923                 a3 &= 0xFFFFFFFF;
5924         }
5925
5926         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5927                 ret = -KVM_EPERM;
5928                 goto out;
5929         }
5930
5931         switch (nr) {
5932         case KVM_HC_VAPIC_POLL_IRQ:
5933                 ret = 0;
5934                 break;
5935         case KVM_HC_KICK_CPU:
5936                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5937                 ret = 0;
5938                 break;
5939         default:
5940                 ret = -KVM_ENOSYS;
5941                 break;
5942         }
5943 out:
5944         if (!op_64_bit)
5945                 ret = (u32)ret;
5946         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5947         ++vcpu->stat.hypercalls;
5948         return r;
5949 }
5950 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5951
5952 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5953 {
5954         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5955         char instruction[3];
5956         unsigned long rip = kvm_rip_read(vcpu);
5957
5958         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5959
5960         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5961 }
5962
5963 /*
5964  * Check if userspace requested an interrupt window, and that the
5965  * interrupt window is open.
5966  *
5967  * No need to exit to userspace if we already have an interrupt queued.
5968  */
5969 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5970 {
5971         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5972                 vcpu->run->request_interrupt_window &&
5973                 kvm_arch_interrupt_allowed(vcpu));
5974 }
5975
5976 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5977 {
5978         struct kvm_run *kvm_run = vcpu->run;
5979
5980         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5981         kvm_run->cr8 = kvm_get_cr8(vcpu);
5982         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5983         if (irqchip_in_kernel(vcpu->kvm))
5984                 kvm_run->ready_for_interrupt_injection = 1;
5985         else
5986                 kvm_run->ready_for_interrupt_injection =
5987                         kvm_arch_interrupt_allowed(vcpu) &&
5988                         !kvm_cpu_has_interrupt(vcpu) &&
5989                         !kvm_event_needs_reinjection(vcpu);
5990 }
5991
5992 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5993 {
5994         int max_irr, tpr;
5995
5996         if (!kvm_x86_ops->update_cr8_intercept)
5997                 return;
5998
5999         if (!vcpu->arch.apic)
6000                 return;
6001
6002         if (!vcpu->arch.apic->vapic_addr)
6003                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6004         else
6005                 max_irr = -1;
6006
6007         if (max_irr != -1)
6008                 max_irr >>= 4;
6009
6010         tpr = kvm_lapic_get_cr8(vcpu);
6011
6012         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6013 }
6014
6015 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6016 {
6017         int r;
6018
6019         /* try to reinject previous events if any */
6020         if (vcpu->arch.exception.pending) {
6021                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6022                                         vcpu->arch.exception.has_error_code,
6023                                         vcpu->arch.exception.error_code);
6024
6025                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6026                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6027                                              X86_EFLAGS_RF);
6028
6029                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6030                     (vcpu->arch.dr7 & DR7_GD)) {
6031                         vcpu->arch.dr7 &= ~DR7_GD;
6032                         kvm_update_dr7(vcpu);
6033                 }
6034
6035                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6036                                           vcpu->arch.exception.has_error_code,
6037                                           vcpu->arch.exception.error_code,
6038                                           vcpu->arch.exception.reinject);
6039                 return 0;
6040         }
6041
6042         if (vcpu->arch.nmi_injected) {
6043                 kvm_x86_ops->set_nmi(vcpu);
6044                 return 0;
6045         }
6046
6047         if (vcpu->arch.interrupt.pending) {
6048                 kvm_x86_ops->set_irq(vcpu);
6049                 return 0;
6050         }
6051
6052         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6053                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6054                 if (r != 0)
6055                         return r;
6056         }
6057
6058         /* try to inject new event if pending */
6059         if (vcpu->arch.nmi_pending) {
6060                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6061                         --vcpu->arch.nmi_pending;
6062                         vcpu->arch.nmi_injected = true;
6063                         kvm_x86_ops->set_nmi(vcpu);
6064                 }
6065         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6066                 /*
6067                  * Because interrupts can be injected asynchronously, we are
6068                  * calling check_nested_events again here to avoid a race condition.
6069                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6070                  * proposal and current concerns.  Perhaps we should be setting
6071                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6072                  */
6073                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6074                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6075                         if (r != 0)
6076                                 return r;
6077                 }
6078                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6079                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6080                                             false);
6081                         kvm_x86_ops->set_irq(vcpu);
6082                 }
6083         }
6084         return 0;
6085 }
6086
6087 static void process_nmi(struct kvm_vcpu *vcpu)
6088 {
6089         unsigned limit = 2;
6090
6091         /*
6092          * x86 is limited to one NMI running, and one NMI pending after it.
6093          * If an NMI is already in progress, limit further NMIs to just one.
6094          * Otherwise, allow two (and we'll inject the first one immediately).
6095          */
6096         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6097                 limit = 1;
6098
6099         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6100         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6101         kvm_make_request(KVM_REQ_EVENT, vcpu);
6102 }
6103
6104 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6105 {
6106         u64 eoi_exit_bitmap[4];
6107         u32 tmr[8];
6108
6109         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6110                 return;
6111
6112         memset(eoi_exit_bitmap, 0, 32);
6113         memset(tmr, 0, 32);
6114
6115         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
6116         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6117         kvm_apic_update_tmr(vcpu, tmr);
6118 }
6119
6120 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6121 {
6122         ++vcpu->stat.tlb_flush;
6123         kvm_x86_ops->tlb_flush(vcpu);
6124 }
6125
6126 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6127 {
6128         struct page *page = NULL;
6129
6130         if (!irqchip_in_kernel(vcpu->kvm))
6131                 return;
6132
6133         if (!kvm_x86_ops->set_apic_access_page_addr)
6134                 return;
6135
6136         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6137         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6138
6139         /*
6140          * Do not pin apic access page in memory, the MMU notifier
6141          * will call us again if it is migrated or swapped out.
6142          */
6143         put_page(page);
6144 }
6145 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6146
6147 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6148                                            unsigned long address)
6149 {
6150         /*
6151          * The physical address of apic access page is stored in the VMCS.
6152          * Update it when it becomes invalid.
6153          */
6154         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6155                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6156 }
6157
6158 /*
6159  * Returns 1 to let __vcpu_run() continue the guest execution loop without
6160  * exiting to the userspace.  Otherwise, the value will be returned to the
6161  * userspace.
6162  */
6163 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6164 {
6165         int r;
6166         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
6167                 vcpu->run->request_interrupt_window;
6168         bool req_immediate_exit = false;
6169
6170         if (vcpu->requests) {
6171                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6172                         kvm_mmu_unload(vcpu);
6173                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6174                         __kvm_migrate_timers(vcpu);
6175                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6176                         kvm_gen_update_masterclock(vcpu->kvm);
6177                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6178                         kvm_gen_kvmclock_update(vcpu);
6179                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6180                         r = kvm_guest_time_update(vcpu);
6181                         if (unlikely(r))
6182                                 goto out;
6183                 }
6184                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6185                         kvm_mmu_sync_roots(vcpu);
6186                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6187                         kvm_vcpu_flush_tlb(vcpu);
6188                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6189                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6190                         r = 0;
6191                         goto out;
6192                 }
6193                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6194                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6195                         r = 0;
6196                         goto out;
6197                 }
6198                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6199                         vcpu->fpu_active = 0;
6200                         kvm_x86_ops->fpu_deactivate(vcpu);
6201                 }
6202                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6203                         /* Page is swapped out. Do synthetic halt */
6204                         vcpu->arch.apf.halted = true;
6205                         r = 1;
6206                         goto out;
6207                 }
6208                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6209                         record_steal_time(vcpu);
6210                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6211                         process_nmi(vcpu);
6212                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6213                         kvm_handle_pmu_event(vcpu);
6214                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6215                         kvm_deliver_pmi(vcpu);
6216                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6217                         vcpu_scan_ioapic(vcpu);
6218                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6219                         kvm_vcpu_reload_apic_access_page(vcpu);
6220         }
6221
6222         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6223                 kvm_apic_accept_events(vcpu);
6224                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6225                         r = 1;
6226                         goto out;
6227                 }
6228
6229                 if (inject_pending_event(vcpu, req_int_win) != 0)
6230                         req_immediate_exit = true;
6231                 /* enable NMI/IRQ window open exits if needed */
6232                 else if (vcpu->arch.nmi_pending)
6233                         kvm_x86_ops->enable_nmi_window(vcpu);
6234                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6235                         kvm_x86_ops->enable_irq_window(vcpu);
6236
6237                 if (kvm_lapic_enabled(vcpu)) {
6238                         /*
6239                          * Update architecture specific hints for APIC
6240                          * virtual interrupt delivery.
6241                          */
6242                         if (kvm_x86_ops->hwapic_irr_update)
6243                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6244                                         kvm_lapic_find_highest_irr(vcpu));
6245                         update_cr8_intercept(vcpu);
6246                         kvm_lapic_sync_to_vapic(vcpu);
6247                 }
6248         }
6249
6250         r = kvm_mmu_reload(vcpu);
6251         if (unlikely(r)) {
6252                 goto cancel_injection;
6253         }
6254
6255         preempt_disable();
6256
6257         kvm_x86_ops->prepare_guest_switch(vcpu);
6258         if (vcpu->fpu_active)
6259                 kvm_load_guest_fpu(vcpu);
6260         kvm_load_guest_xcr0(vcpu);
6261
6262         vcpu->mode = IN_GUEST_MODE;
6263
6264         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6265
6266         /* We should set ->mode before check ->requests,
6267          * see the comment in make_all_cpus_request.
6268          */
6269         smp_mb__after_srcu_read_unlock();
6270
6271         local_irq_disable();
6272
6273         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6274             || need_resched() || signal_pending(current)) {
6275                 vcpu->mode = OUTSIDE_GUEST_MODE;
6276                 smp_wmb();
6277                 local_irq_enable();
6278                 preempt_enable();
6279                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6280                 r = 1;
6281                 goto cancel_injection;
6282         }
6283
6284         if (req_immediate_exit)
6285                 smp_send_reschedule(vcpu->cpu);
6286
6287         kvm_guest_enter();
6288
6289         if (unlikely(vcpu->arch.switch_db_regs)) {
6290                 set_debugreg(0, 7);
6291                 set_debugreg(vcpu->arch.eff_db[0], 0);
6292                 set_debugreg(vcpu->arch.eff_db[1], 1);
6293                 set_debugreg(vcpu->arch.eff_db[2], 2);
6294                 set_debugreg(vcpu->arch.eff_db[3], 3);
6295                 set_debugreg(vcpu->arch.dr6, 6);
6296         }
6297
6298         trace_kvm_entry(vcpu->vcpu_id);
6299         wait_lapic_expire(vcpu);
6300         kvm_x86_ops->run(vcpu);
6301
6302         /*
6303          * Do this here before restoring debug registers on the host.  And
6304          * since we do this before handling the vmexit, a DR access vmexit
6305          * can (a) read the correct value of the debug registers, (b) set
6306          * KVM_DEBUGREG_WONT_EXIT again.
6307          */
6308         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6309                 int i;
6310
6311                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6312                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6313                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6314                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6315         }
6316
6317         /*
6318          * If the guest has used debug registers, at least dr7
6319          * will be disabled while returning to the host.
6320          * If we don't have active breakpoints in the host, we don't
6321          * care about the messed up debug address registers. But if
6322          * we have some of them active, restore the old state.
6323          */
6324         if (hw_breakpoint_active())
6325                 hw_breakpoint_restore();
6326
6327         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6328                                                            native_read_tsc());
6329
6330         vcpu->mode = OUTSIDE_GUEST_MODE;
6331         smp_wmb();
6332
6333         /* Interrupt is enabled by handle_external_intr() */
6334         kvm_x86_ops->handle_external_intr(vcpu);
6335
6336         ++vcpu->stat.exits;
6337
6338         /*
6339          * We must have an instruction between local_irq_enable() and
6340          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6341          * the interrupt shadow.  The stat.exits increment will do nicely.
6342          * But we need to prevent reordering, hence this barrier():
6343          */
6344         barrier();
6345
6346         kvm_guest_exit();
6347
6348         preempt_enable();
6349
6350         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6351
6352         /*
6353          * Profile KVM exit RIPs:
6354          */
6355         if (unlikely(prof_on == KVM_PROFILING)) {
6356                 unsigned long rip = kvm_rip_read(vcpu);
6357                 profile_hit(KVM_PROFILING, (void *)rip);
6358         }
6359
6360         if (unlikely(vcpu->arch.tsc_always_catchup))
6361                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6362
6363         if (vcpu->arch.apic_attention)
6364                 kvm_lapic_sync_from_vapic(vcpu);
6365
6366         r = kvm_x86_ops->handle_exit(vcpu);
6367         return r;
6368
6369 cancel_injection:
6370         kvm_x86_ops->cancel_injection(vcpu);
6371         if (unlikely(vcpu->arch.apic_attention))
6372                 kvm_lapic_sync_from_vapic(vcpu);
6373 out:
6374         return r;
6375 }
6376
6377
6378 static int __vcpu_run(struct kvm_vcpu *vcpu)
6379 {
6380         int r;
6381         struct kvm *kvm = vcpu->kvm;
6382
6383         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6384
6385         r = 1;
6386         while (r > 0) {
6387                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6388                     !vcpu->arch.apf.halted)
6389                         r = vcpu_enter_guest(vcpu);
6390                 else {
6391                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6392                         kvm_vcpu_block(vcpu);
6393                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6394                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6395                                 kvm_apic_accept_events(vcpu);
6396                                 switch(vcpu->arch.mp_state) {
6397                                 case KVM_MP_STATE_HALTED:
6398                                         vcpu->arch.pv.pv_unhalted = false;
6399                                         vcpu->arch.mp_state =
6400                                                 KVM_MP_STATE_RUNNABLE;
6401                                 case KVM_MP_STATE_RUNNABLE:
6402                                         vcpu->arch.apf.halted = false;
6403                                         break;
6404                                 case KVM_MP_STATE_INIT_RECEIVED:
6405                                         break;
6406                                 default:
6407                                         r = -EINTR;
6408                                         break;
6409                                 }
6410                         }
6411                 }
6412
6413                 if (r <= 0)
6414                         break;
6415
6416                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6417                 if (kvm_cpu_has_pending_timer(vcpu))
6418                         kvm_inject_pending_timer_irqs(vcpu);
6419
6420                 if (dm_request_for_irq_injection(vcpu)) {
6421                         r = -EINTR;
6422                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6423                         ++vcpu->stat.request_irq_exits;
6424                 }
6425
6426                 kvm_check_async_pf_completion(vcpu);
6427
6428                 if (signal_pending(current)) {
6429                         r = -EINTR;
6430                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6431                         ++vcpu->stat.signal_exits;
6432                 }
6433                 if (need_resched()) {
6434                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6435                         cond_resched();
6436                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6437                 }
6438         }
6439
6440         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6441
6442         return r;
6443 }
6444
6445 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6446 {
6447         int r;
6448         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6449         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6450         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6451         if (r != EMULATE_DONE)
6452                 return 0;
6453         return 1;
6454 }
6455
6456 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6457 {
6458         BUG_ON(!vcpu->arch.pio.count);
6459
6460         return complete_emulated_io(vcpu);
6461 }
6462
6463 /*
6464  * Implements the following, as a state machine:
6465  *
6466  * read:
6467  *   for each fragment
6468  *     for each mmio piece in the fragment
6469  *       write gpa, len
6470  *       exit
6471  *       copy data
6472  *   execute insn
6473  *
6474  * write:
6475  *   for each fragment
6476  *     for each mmio piece in the fragment
6477  *       write gpa, len
6478  *       copy data
6479  *       exit
6480  */
6481 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6482 {
6483         struct kvm_run *run = vcpu->run;
6484         struct kvm_mmio_fragment *frag;
6485         unsigned len;
6486
6487         BUG_ON(!vcpu->mmio_needed);
6488
6489         /* Complete previous fragment */
6490         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6491         len = min(8u, frag->len);
6492         if (!vcpu->mmio_is_write)
6493                 memcpy(frag->data, run->mmio.data, len);
6494
6495         if (frag->len <= 8) {
6496                 /* Switch to the next fragment. */
6497                 frag++;
6498                 vcpu->mmio_cur_fragment++;
6499         } else {
6500                 /* Go forward to the next mmio piece. */
6501                 frag->data += len;
6502                 frag->gpa += len;
6503                 frag->len -= len;
6504         }
6505
6506         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6507                 vcpu->mmio_needed = 0;
6508
6509                 /* FIXME: return into emulator if single-stepping.  */
6510                 if (vcpu->mmio_is_write)
6511                         return 1;
6512                 vcpu->mmio_read_completed = 1;
6513                 return complete_emulated_io(vcpu);
6514         }
6515
6516         run->exit_reason = KVM_EXIT_MMIO;
6517         run->mmio.phys_addr = frag->gpa;
6518         if (vcpu->mmio_is_write)
6519                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6520         run->mmio.len = min(8u, frag->len);
6521         run->mmio.is_write = vcpu->mmio_is_write;
6522         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6523         return 0;
6524 }
6525
6526
6527 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6528 {
6529         int r;
6530         sigset_t sigsaved;
6531
6532         if (!tsk_used_math(current) && init_fpu(current))
6533                 return -ENOMEM;
6534
6535         if (vcpu->sigset_active)
6536                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6537
6538         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6539                 kvm_vcpu_block(vcpu);
6540                 kvm_apic_accept_events(vcpu);
6541                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6542                 r = -EAGAIN;
6543                 goto out;
6544         }
6545
6546         /* re-sync apic's tpr */
6547         if (!irqchip_in_kernel(vcpu->kvm)) {
6548                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6549                         r = -EINVAL;
6550                         goto out;
6551                 }
6552         }
6553
6554         if (unlikely(vcpu->arch.complete_userspace_io)) {
6555                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6556                 vcpu->arch.complete_userspace_io = NULL;
6557                 r = cui(vcpu);
6558                 if (r <= 0)
6559                         goto out;
6560         } else
6561                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6562
6563         r = __vcpu_run(vcpu);
6564
6565 out:
6566         post_kvm_run_save(vcpu);
6567         if (vcpu->sigset_active)
6568                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6569
6570         return r;
6571 }
6572
6573 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6574 {
6575         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6576                 /*
6577                  * We are here if userspace calls get_regs() in the middle of
6578                  * instruction emulation. Registers state needs to be copied
6579                  * back from emulation context to vcpu. Userspace shouldn't do
6580                  * that usually, but some bad designed PV devices (vmware
6581                  * backdoor interface) need this to work
6582                  */
6583                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6584                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6585         }
6586         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6587         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6588         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6589         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6590         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6591         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6592         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6593         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6594 #ifdef CONFIG_X86_64
6595         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6596         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6597         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6598         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6599         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6600         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6601         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6602         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6603 #endif
6604
6605         regs->rip = kvm_rip_read(vcpu);
6606         regs->rflags = kvm_get_rflags(vcpu);
6607
6608         return 0;
6609 }
6610
6611 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6612 {
6613         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6614         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6615
6616         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6617         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6618         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6619         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6620         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6621         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6622         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6623         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6624 #ifdef CONFIG_X86_64
6625         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6626         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6627         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6628         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6629         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6630         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6631         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6632         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6633 #endif
6634
6635         kvm_rip_write(vcpu, regs->rip);
6636         kvm_set_rflags(vcpu, regs->rflags);
6637
6638         vcpu->arch.exception.pending = false;
6639
6640         kvm_make_request(KVM_REQ_EVENT, vcpu);
6641
6642         return 0;
6643 }
6644
6645 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6646 {
6647         struct kvm_segment cs;
6648
6649         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6650         *db = cs.db;
6651         *l = cs.l;
6652 }
6653 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6654
6655 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6656                                   struct kvm_sregs *sregs)
6657 {
6658         struct desc_ptr dt;
6659
6660         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6661         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6662         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6663         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6664         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6665         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6666
6667         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6668         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6669
6670         kvm_x86_ops->get_idt(vcpu, &dt);
6671         sregs->idt.limit = dt.size;
6672         sregs->idt.base = dt.address;
6673         kvm_x86_ops->get_gdt(vcpu, &dt);
6674         sregs->gdt.limit = dt.size;
6675         sregs->gdt.base = dt.address;
6676
6677         sregs->cr0 = kvm_read_cr0(vcpu);
6678         sregs->cr2 = vcpu->arch.cr2;
6679         sregs->cr3 = kvm_read_cr3(vcpu);
6680         sregs->cr4 = kvm_read_cr4(vcpu);
6681         sregs->cr8 = kvm_get_cr8(vcpu);
6682         sregs->efer = vcpu->arch.efer;
6683         sregs->apic_base = kvm_get_apic_base(vcpu);
6684
6685         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6686
6687         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6688                 set_bit(vcpu->arch.interrupt.nr,
6689                         (unsigned long *)sregs->interrupt_bitmap);
6690
6691         return 0;
6692 }
6693
6694 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6695                                     struct kvm_mp_state *mp_state)
6696 {
6697         kvm_apic_accept_events(vcpu);
6698         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6699                                         vcpu->arch.pv.pv_unhalted)
6700                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6701         else
6702                 mp_state->mp_state = vcpu->arch.mp_state;
6703
6704         return 0;
6705 }
6706
6707 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6708                                     struct kvm_mp_state *mp_state)
6709 {
6710         if (!kvm_vcpu_has_lapic(vcpu) &&
6711             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6712                 return -EINVAL;
6713
6714         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6715                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6716                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6717         } else
6718                 vcpu->arch.mp_state = mp_state->mp_state;
6719         kvm_make_request(KVM_REQ_EVENT, vcpu);
6720         return 0;
6721 }
6722
6723 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6724                     int reason, bool has_error_code, u32 error_code)
6725 {
6726         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6727         int ret;
6728
6729         init_emulate_ctxt(vcpu);
6730
6731         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6732                                    has_error_code, error_code);
6733
6734         if (ret)
6735                 return EMULATE_FAIL;
6736
6737         kvm_rip_write(vcpu, ctxt->eip);
6738         kvm_set_rflags(vcpu, ctxt->eflags);
6739         kvm_make_request(KVM_REQ_EVENT, vcpu);
6740         return EMULATE_DONE;
6741 }
6742 EXPORT_SYMBOL_GPL(kvm_task_switch);
6743
6744 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6745                                   struct kvm_sregs *sregs)
6746 {
6747         struct msr_data apic_base_msr;
6748         int mmu_reset_needed = 0;
6749         int pending_vec, max_bits, idx;
6750         struct desc_ptr dt;
6751
6752         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6753                 return -EINVAL;
6754
6755         dt.size = sregs->idt.limit;
6756         dt.address = sregs->idt.base;
6757         kvm_x86_ops->set_idt(vcpu, &dt);
6758         dt.size = sregs->gdt.limit;
6759         dt.address = sregs->gdt.base;
6760         kvm_x86_ops->set_gdt(vcpu, &dt);
6761
6762         vcpu->arch.cr2 = sregs->cr2;
6763         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6764         vcpu->arch.cr3 = sregs->cr3;
6765         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6766
6767         kvm_set_cr8(vcpu, sregs->cr8);
6768
6769         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6770         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6771         apic_base_msr.data = sregs->apic_base;
6772         apic_base_msr.host_initiated = true;
6773         kvm_set_apic_base(vcpu, &apic_base_msr);
6774
6775         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6776         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6777         vcpu->arch.cr0 = sregs->cr0;
6778
6779         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6780         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6781         if (sregs->cr4 & X86_CR4_OSXSAVE)
6782                 kvm_update_cpuid(vcpu);
6783
6784         idx = srcu_read_lock(&vcpu->kvm->srcu);
6785         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6786                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6787                 mmu_reset_needed = 1;
6788         }
6789         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6790
6791         if (mmu_reset_needed)
6792                 kvm_mmu_reset_context(vcpu);
6793
6794         max_bits = KVM_NR_INTERRUPTS;
6795         pending_vec = find_first_bit(
6796                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6797         if (pending_vec < max_bits) {
6798                 kvm_queue_interrupt(vcpu, pending_vec, false);
6799                 pr_debug("Set back pending irq %d\n", pending_vec);
6800         }
6801
6802         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6803         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6804         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6805         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6806         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6807         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6808
6809         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6810         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6811
6812         update_cr8_intercept(vcpu);
6813
6814         /* Older userspace won't unhalt the vcpu on reset. */
6815         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6816             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6817             !is_protmode(vcpu))
6818                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6819
6820         kvm_make_request(KVM_REQ_EVENT, vcpu);
6821
6822         return 0;
6823 }
6824
6825 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6826                                         struct kvm_guest_debug *dbg)
6827 {
6828         unsigned long rflags;
6829         int i, r;
6830
6831         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6832                 r = -EBUSY;
6833                 if (vcpu->arch.exception.pending)
6834                         goto out;
6835                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6836                         kvm_queue_exception(vcpu, DB_VECTOR);
6837                 else
6838                         kvm_queue_exception(vcpu, BP_VECTOR);
6839         }
6840
6841         /*
6842          * Read rflags as long as potentially injected trace flags are still
6843          * filtered out.
6844          */
6845         rflags = kvm_get_rflags(vcpu);
6846
6847         vcpu->guest_debug = dbg->control;
6848         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6849                 vcpu->guest_debug = 0;
6850
6851         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6852                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6853                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6854                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6855         } else {
6856                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6857                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6858         }
6859         kvm_update_dr7(vcpu);
6860
6861         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6862                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6863                         get_segment_base(vcpu, VCPU_SREG_CS);
6864
6865         /*
6866          * Trigger an rflags update that will inject or remove the trace
6867          * flags.
6868          */
6869         kvm_set_rflags(vcpu, rflags);
6870
6871         kvm_x86_ops->update_db_bp_intercept(vcpu);
6872
6873         r = 0;
6874
6875 out:
6876
6877         return r;
6878 }
6879
6880 /*
6881  * Translate a guest virtual address to a guest physical address.
6882  */
6883 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6884                                     struct kvm_translation *tr)
6885 {
6886         unsigned long vaddr = tr->linear_address;
6887         gpa_t gpa;
6888         int idx;
6889
6890         idx = srcu_read_lock(&vcpu->kvm->srcu);
6891         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6892         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6893         tr->physical_address = gpa;
6894         tr->valid = gpa != UNMAPPED_GVA;
6895         tr->writeable = 1;
6896         tr->usermode = 0;
6897
6898         return 0;
6899 }
6900
6901 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6902 {
6903         struct i387_fxsave_struct *fxsave =
6904                         &vcpu->arch.guest_fpu.state->fxsave;
6905
6906         memcpy(fpu->fpr, fxsave->st_space, 128);
6907         fpu->fcw = fxsave->cwd;
6908         fpu->fsw = fxsave->swd;
6909         fpu->ftwx = fxsave->twd;
6910         fpu->last_opcode = fxsave->fop;
6911         fpu->last_ip = fxsave->rip;
6912         fpu->last_dp = fxsave->rdp;
6913         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6914
6915         return 0;
6916 }
6917
6918 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6919 {
6920         struct i387_fxsave_struct *fxsave =
6921                         &vcpu->arch.guest_fpu.state->fxsave;
6922
6923         memcpy(fxsave->st_space, fpu->fpr, 128);
6924         fxsave->cwd = fpu->fcw;
6925         fxsave->swd = fpu->fsw;
6926         fxsave->twd = fpu->ftwx;
6927         fxsave->fop = fpu->last_opcode;
6928         fxsave->rip = fpu->last_ip;
6929         fxsave->rdp = fpu->last_dp;
6930         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6931
6932         return 0;
6933 }
6934
6935 int fx_init(struct kvm_vcpu *vcpu)
6936 {
6937         int err;
6938
6939         err = fpu_alloc(&vcpu->arch.guest_fpu);
6940         if (err)
6941                 return err;
6942
6943         fpu_finit(&vcpu->arch.guest_fpu);
6944         if (cpu_has_xsaves)
6945                 vcpu->arch.guest_fpu.state->xsave.xsave_hdr.xcomp_bv =
6946                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
6947
6948         /*
6949          * Ensure guest xcr0 is valid for loading
6950          */
6951         vcpu->arch.xcr0 = XSTATE_FP;
6952
6953         vcpu->arch.cr0 |= X86_CR0_ET;
6954
6955         return 0;
6956 }
6957 EXPORT_SYMBOL_GPL(fx_init);
6958
6959 static void fx_free(struct kvm_vcpu *vcpu)
6960 {
6961         fpu_free(&vcpu->arch.guest_fpu);
6962 }
6963
6964 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6965 {
6966         if (vcpu->guest_fpu_loaded)
6967                 return;
6968
6969         /*
6970          * Restore all possible states in the guest,
6971          * and assume host would use all available bits.
6972          * Guest xcr0 would be loaded later.
6973          */
6974         kvm_put_guest_xcr0(vcpu);
6975         vcpu->guest_fpu_loaded = 1;
6976         __kernel_fpu_begin();
6977         fpu_restore_checking(&vcpu->arch.guest_fpu);
6978         trace_kvm_fpu(1);
6979 }
6980
6981 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6982 {
6983         kvm_put_guest_xcr0(vcpu);
6984
6985         if (!vcpu->guest_fpu_loaded)
6986                 return;
6987
6988         vcpu->guest_fpu_loaded = 0;
6989         fpu_save_init(&vcpu->arch.guest_fpu);
6990         __kernel_fpu_end();
6991         ++vcpu->stat.fpu_reload;
6992         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6993         trace_kvm_fpu(0);
6994 }
6995
6996 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6997 {
6998         kvmclock_reset(vcpu);
6999
7000         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7001         fx_free(vcpu);
7002         kvm_x86_ops->vcpu_free(vcpu);
7003 }
7004
7005 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7006                                                 unsigned int id)
7007 {
7008         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7009                 printk_once(KERN_WARNING
7010                 "kvm: SMP vm created on host with unstable TSC; "
7011                 "guest TSC will not be reliable\n");
7012         return kvm_x86_ops->vcpu_create(kvm, id);
7013 }
7014
7015 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7016 {
7017         int r;
7018
7019         vcpu->arch.mtrr_state.have_fixed = 1;
7020         r = vcpu_load(vcpu);
7021         if (r)
7022                 return r;
7023         kvm_vcpu_reset(vcpu);
7024         kvm_mmu_setup(vcpu);
7025         vcpu_put(vcpu);
7026
7027         return r;
7028 }
7029
7030 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7031 {
7032         struct msr_data msr;
7033         struct kvm *kvm = vcpu->kvm;
7034
7035         if (vcpu_load(vcpu))
7036                 return;
7037         msr.data = 0x0;
7038         msr.index = MSR_IA32_TSC;
7039         msr.host_initiated = true;
7040         kvm_write_tsc(vcpu, &msr);
7041         vcpu_put(vcpu);
7042
7043         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7044                                         KVMCLOCK_SYNC_PERIOD);
7045 }
7046
7047 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7048 {
7049         int r;
7050         vcpu->arch.apf.msr_val = 0;
7051
7052         r = vcpu_load(vcpu);
7053         BUG_ON(r);
7054         kvm_mmu_unload(vcpu);
7055         vcpu_put(vcpu);
7056
7057         fx_free(vcpu);
7058         kvm_x86_ops->vcpu_free(vcpu);
7059 }
7060
7061 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
7062 {
7063         atomic_set(&vcpu->arch.nmi_queued, 0);
7064         vcpu->arch.nmi_pending = 0;
7065         vcpu->arch.nmi_injected = false;
7066         kvm_clear_interrupt_queue(vcpu);
7067         kvm_clear_exception_queue(vcpu);
7068
7069         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7070         vcpu->arch.dr6 = DR6_INIT;
7071         kvm_update_dr6(vcpu);
7072         vcpu->arch.dr7 = DR7_FIXED_1;
7073         kvm_update_dr7(vcpu);
7074
7075         kvm_make_request(KVM_REQ_EVENT, vcpu);
7076         vcpu->arch.apf.msr_val = 0;
7077         vcpu->arch.st.msr_val = 0;
7078
7079         kvmclock_reset(vcpu);
7080
7081         kvm_clear_async_pf_completion_queue(vcpu);
7082         kvm_async_pf_hash_reset(vcpu);
7083         vcpu->arch.apf.halted = false;
7084
7085         kvm_pmu_reset(vcpu);
7086
7087         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7088         vcpu->arch.regs_avail = ~0;
7089         vcpu->arch.regs_dirty = ~0;
7090
7091         kvm_x86_ops->vcpu_reset(vcpu);
7092 }
7093
7094 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7095 {
7096         struct kvm_segment cs;
7097
7098         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7099         cs.selector = vector << 8;
7100         cs.base = vector << 12;
7101         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7102         kvm_rip_write(vcpu, 0);
7103 }
7104
7105 int kvm_arch_hardware_enable(void)
7106 {
7107         struct kvm *kvm;
7108         struct kvm_vcpu *vcpu;
7109         int i;
7110         int ret;
7111         u64 local_tsc;
7112         u64 max_tsc = 0;
7113         bool stable, backwards_tsc = false;
7114
7115         kvm_shared_msr_cpu_online();
7116         ret = kvm_x86_ops->hardware_enable();
7117         if (ret != 0)
7118                 return ret;
7119
7120         local_tsc = native_read_tsc();
7121         stable = !check_tsc_unstable();
7122         list_for_each_entry(kvm, &vm_list, vm_list) {
7123                 kvm_for_each_vcpu(i, vcpu, kvm) {
7124                         if (!stable && vcpu->cpu == smp_processor_id())
7125                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7126                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7127                                 backwards_tsc = true;
7128                                 if (vcpu->arch.last_host_tsc > max_tsc)
7129                                         max_tsc = vcpu->arch.last_host_tsc;
7130                         }
7131                 }
7132         }
7133
7134         /*
7135          * Sometimes, even reliable TSCs go backwards.  This happens on
7136          * platforms that reset TSC during suspend or hibernate actions, but
7137          * maintain synchronization.  We must compensate.  Fortunately, we can
7138          * detect that condition here, which happens early in CPU bringup,
7139          * before any KVM threads can be running.  Unfortunately, we can't
7140          * bring the TSCs fully up to date with real time, as we aren't yet far
7141          * enough into CPU bringup that we know how much real time has actually
7142          * elapsed; our helper function, get_kernel_ns() will be using boot
7143          * variables that haven't been updated yet.
7144          *
7145          * So we simply find the maximum observed TSC above, then record the
7146          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7147          * the adjustment will be applied.  Note that we accumulate
7148          * adjustments, in case multiple suspend cycles happen before some VCPU
7149          * gets a chance to run again.  In the event that no KVM threads get a
7150          * chance to run, we will miss the entire elapsed period, as we'll have
7151          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7152          * loose cycle time.  This isn't too big a deal, since the loss will be
7153          * uniform across all VCPUs (not to mention the scenario is extremely
7154          * unlikely). It is possible that a second hibernate recovery happens
7155          * much faster than a first, causing the observed TSC here to be
7156          * smaller; this would require additional padding adjustment, which is
7157          * why we set last_host_tsc to the local tsc observed here.
7158          *
7159          * N.B. - this code below runs only on platforms with reliable TSC,
7160          * as that is the only way backwards_tsc is set above.  Also note
7161          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7162          * have the same delta_cyc adjustment applied if backwards_tsc
7163          * is detected.  Note further, this adjustment is only done once,
7164          * as we reset last_host_tsc on all VCPUs to stop this from being
7165          * called multiple times (one for each physical CPU bringup).
7166          *
7167          * Platforms with unreliable TSCs don't have to deal with this, they
7168          * will be compensated by the logic in vcpu_load, which sets the TSC to
7169          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7170          * guarantee that they stay in perfect synchronization.
7171          */
7172         if (backwards_tsc) {
7173                 u64 delta_cyc = max_tsc - local_tsc;
7174                 backwards_tsc_observed = true;
7175                 list_for_each_entry(kvm, &vm_list, vm_list) {
7176                         kvm_for_each_vcpu(i, vcpu, kvm) {
7177                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7178                                 vcpu->arch.last_host_tsc = local_tsc;
7179                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7180                         }
7181
7182                         /*
7183                          * We have to disable TSC offset matching.. if you were
7184                          * booting a VM while issuing an S4 host suspend....
7185                          * you may have some problem.  Solving this issue is
7186                          * left as an exercise to the reader.
7187                          */
7188                         kvm->arch.last_tsc_nsec = 0;
7189                         kvm->arch.last_tsc_write = 0;
7190                 }
7191
7192         }
7193         return 0;
7194 }
7195
7196 void kvm_arch_hardware_disable(void)
7197 {
7198         kvm_x86_ops->hardware_disable();
7199         drop_user_return_notifiers();
7200 }
7201
7202 int kvm_arch_hardware_setup(void)
7203 {
7204         return kvm_x86_ops->hardware_setup();
7205 }
7206
7207 void kvm_arch_hardware_unsetup(void)
7208 {
7209         kvm_x86_ops->hardware_unsetup();
7210 }
7211
7212 void kvm_arch_check_processor_compat(void *rtn)
7213 {
7214         kvm_x86_ops->check_processor_compatibility(rtn);
7215 }
7216
7217 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7218 {
7219         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
7220 }
7221
7222 struct static_key kvm_no_apic_vcpu __read_mostly;
7223
7224 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7225 {
7226         struct page *page;
7227         struct kvm *kvm;
7228         int r;
7229
7230         BUG_ON(vcpu->kvm == NULL);
7231         kvm = vcpu->kvm;
7232
7233         vcpu->arch.pv.pv_unhalted = false;
7234         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7235         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
7236                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7237         else
7238                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7239
7240         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7241         if (!page) {
7242                 r = -ENOMEM;
7243                 goto fail;
7244         }
7245         vcpu->arch.pio_data = page_address(page);
7246
7247         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7248
7249         r = kvm_mmu_create(vcpu);
7250         if (r < 0)
7251                 goto fail_free_pio_data;
7252
7253         if (irqchip_in_kernel(kvm)) {
7254                 r = kvm_create_lapic(vcpu);
7255                 if (r < 0)
7256                         goto fail_mmu_destroy;
7257         } else
7258                 static_key_slow_inc(&kvm_no_apic_vcpu);
7259
7260         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7261                                        GFP_KERNEL);
7262         if (!vcpu->arch.mce_banks) {
7263                 r = -ENOMEM;
7264                 goto fail_free_lapic;
7265         }
7266         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7267
7268         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7269                 r = -ENOMEM;
7270                 goto fail_free_mce_banks;
7271         }
7272
7273         r = fx_init(vcpu);
7274         if (r)
7275                 goto fail_free_wbinvd_dirty_mask;
7276
7277         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7278         vcpu->arch.pv_time_enabled = false;
7279
7280         vcpu->arch.guest_supported_xcr0 = 0;
7281         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7282
7283         kvm_async_pf_hash_reset(vcpu);
7284         kvm_pmu_init(vcpu);
7285
7286         return 0;
7287 fail_free_wbinvd_dirty_mask:
7288         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7289 fail_free_mce_banks:
7290         kfree(vcpu->arch.mce_banks);
7291 fail_free_lapic:
7292         kvm_free_lapic(vcpu);
7293 fail_mmu_destroy:
7294         kvm_mmu_destroy(vcpu);
7295 fail_free_pio_data:
7296         free_page((unsigned long)vcpu->arch.pio_data);
7297 fail:
7298         return r;
7299 }
7300
7301 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7302 {
7303         int idx;
7304
7305         kvm_pmu_destroy(vcpu);
7306         kfree(vcpu->arch.mce_banks);
7307         kvm_free_lapic(vcpu);
7308         idx = srcu_read_lock(&vcpu->kvm->srcu);
7309         kvm_mmu_destroy(vcpu);
7310         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7311         free_page((unsigned long)vcpu->arch.pio_data);
7312         if (!irqchip_in_kernel(vcpu->kvm))
7313                 static_key_slow_dec(&kvm_no_apic_vcpu);
7314 }
7315
7316 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7317 {
7318         kvm_x86_ops->sched_in(vcpu, cpu);
7319 }
7320
7321 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7322 {
7323         if (type)
7324                 return -EINVAL;
7325
7326         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7327         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7328         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7329         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7330         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7331
7332         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7333         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7334         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7335         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7336                 &kvm->arch.irq_sources_bitmap);
7337
7338         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7339         mutex_init(&kvm->arch.apic_map_lock);
7340         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7341
7342         pvclock_update_vm_gtod_copy(kvm);
7343
7344         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7345         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7346
7347         return 0;
7348 }
7349
7350 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7351 {
7352         int r;
7353         r = vcpu_load(vcpu);
7354         BUG_ON(r);
7355         kvm_mmu_unload(vcpu);
7356         vcpu_put(vcpu);
7357 }
7358
7359 static void kvm_free_vcpus(struct kvm *kvm)
7360 {
7361         unsigned int i;
7362         struct kvm_vcpu *vcpu;
7363
7364         /*
7365          * Unpin any mmu pages first.
7366          */
7367         kvm_for_each_vcpu(i, vcpu, kvm) {
7368                 kvm_clear_async_pf_completion_queue(vcpu);
7369                 kvm_unload_vcpu_mmu(vcpu);
7370         }
7371         kvm_for_each_vcpu(i, vcpu, kvm)
7372                 kvm_arch_vcpu_free(vcpu);
7373
7374         mutex_lock(&kvm->lock);
7375         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7376                 kvm->vcpus[i] = NULL;
7377
7378         atomic_set(&kvm->online_vcpus, 0);
7379         mutex_unlock(&kvm->lock);
7380 }
7381
7382 void kvm_arch_sync_events(struct kvm *kvm)
7383 {
7384         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7385         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7386         kvm_free_all_assigned_devices(kvm);
7387         kvm_free_pit(kvm);
7388 }
7389
7390 void kvm_arch_destroy_vm(struct kvm *kvm)
7391 {
7392         if (current->mm == kvm->mm) {
7393                 /*
7394                  * Free memory regions allocated on behalf of userspace,
7395                  * unless the the memory map has changed due to process exit
7396                  * or fd copying.
7397                  */
7398                 struct kvm_userspace_memory_region mem;
7399                 memset(&mem, 0, sizeof(mem));
7400                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7401                 kvm_set_memory_region(kvm, &mem);
7402
7403                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7404                 kvm_set_memory_region(kvm, &mem);
7405
7406                 mem.slot = TSS_PRIVATE_MEMSLOT;
7407                 kvm_set_memory_region(kvm, &mem);
7408         }
7409         kvm_iommu_unmap_guest(kvm);
7410         kfree(kvm->arch.vpic);
7411         kfree(kvm->arch.vioapic);
7412         kvm_free_vcpus(kvm);
7413         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7414 }
7415
7416 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7417                            struct kvm_memory_slot *dont)
7418 {
7419         int i;
7420
7421         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7422                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7423                         kvm_kvfree(free->arch.rmap[i]);
7424                         free->arch.rmap[i] = NULL;
7425                 }
7426                 if (i == 0)
7427                         continue;
7428
7429                 if (!dont || free->arch.lpage_info[i - 1] !=
7430                              dont->arch.lpage_info[i - 1]) {
7431                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7432                         free->arch.lpage_info[i - 1] = NULL;
7433                 }
7434         }
7435 }
7436
7437 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7438                             unsigned long npages)
7439 {
7440         int i;
7441
7442         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7443                 unsigned long ugfn;
7444                 int lpages;
7445                 int level = i + 1;
7446
7447                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7448                                       slot->base_gfn, level) + 1;
7449
7450                 slot->arch.rmap[i] =
7451                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7452                 if (!slot->arch.rmap[i])
7453                         goto out_free;
7454                 if (i == 0)
7455                         continue;
7456
7457                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7458                                         sizeof(*slot->arch.lpage_info[i - 1]));
7459                 if (!slot->arch.lpage_info[i - 1])
7460                         goto out_free;
7461
7462                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7463                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7464                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7465                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7466                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7467                 /*
7468                  * If the gfn and userspace address are not aligned wrt each
7469                  * other, or if explicitly asked to, disable large page
7470                  * support for this slot
7471                  */
7472                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7473                     !kvm_largepages_enabled()) {
7474                         unsigned long j;
7475
7476                         for (j = 0; j < lpages; ++j)
7477                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7478                 }
7479         }
7480
7481         return 0;
7482
7483 out_free:
7484         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7485                 kvm_kvfree(slot->arch.rmap[i]);
7486                 slot->arch.rmap[i] = NULL;
7487                 if (i == 0)
7488                         continue;
7489
7490                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7491                 slot->arch.lpage_info[i - 1] = NULL;
7492         }
7493         return -ENOMEM;
7494 }
7495
7496 void kvm_arch_memslots_updated(struct kvm *kvm)
7497 {
7498         /*
7499          * memslots->generation has been incremented.
7500          * mmio generation may have reached its maximum value.
7501          */
7502         kvm_mmu_invalidate_mmio_sptes(kvm);
7503 }
7504
7505 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7506                                 struct kvm_memory_slot *memslot,
7507                                 struct kvm_userspace_memory_region *mem,
7508                                 enum kvm_mr_change change)
7509 {
7510         /*
7511          * Only private memory slots need to be mapped here since
7512          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7513          */
7514         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7515                 unsigned long userspace_addr;
7516
7517                 /*
7518                  * MAP_SHARED to prevent internal slot pages from being moved
7519                  * by fork()/COW.
7520                  */
7521                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7522                                          PROT_READ | PROT_WRITE,
7523                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7524
7525                 if (IS_ERR((void *)userspace_addr))
7526                         return PTR_ERR((void *)userspace_addr);
7527
7528                 memslot->userspace_addr = userspace_addr;
7529         }
7530
7531         return 0;
7532 }
7533
7534 void kvm_arch_commit_memory_region(struct kvm *kvm,
7535                                 struct kvm_userspace_memory_region *mem,
7536                                 const struct kvm_memory_slot *old,
7537                                 enum kvm_mr_change change)
7538 {
7539
7540         int nr_mmu_pages = 0;
7541
7542         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7543                 int ret;
7544
7545                 ret = vm_munmap(old->userspace_addr,
7546                                 old->npages * PAGE_SIZE);
7547                 if (ret < 0)
7548                         printk(KERN_WARNING
7549                                "kvm_vm_ioctl_set_memory_region: "
7550                                "failed to munmap memory\n");
7551         }
7552
7553         if (!kvm->arch.n_requested_mmu_pages)
7554                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7555
7556         if (nr_mmu_pages)
7557                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7558         /*
7559          * Write protect all pages for dirty logging.
7560          *
7561          * All the sptes including the large sptes which point to this
7562          * slot are set to readonly. We can not create any new large
7563          * spte on this slot until the end of the logging.
7564          *
7565          * See the comments in fast_page_fault().
7566          */
7567         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7568                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7569 }
7570
7571 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7572 {
7573         kvm_mmu_invalidate_zap_all_pages(kvm);
7574 }
7575
7576 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7577                                    struct kvm_memory_slot *slot)
7578 {
7579         kvm_mmu_invalidate_zap_all_pages(kvm);
7580 }
7581
7582 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7583 {
7584         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7585                 kvm_x86_ops->check_nested_events(vcpu, false);
7586
7587         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7588                 !vcpu->arch.apf.halted)
7589                 || !list_empty_careful(&vcpu->async_pf.done)
7590                 || kvm_apic_has_events(vcpu)
7591                 || vcpu->arch.pv.pv_unhalted
7592                 || atomic_read(&vcpu->arch.nmi_queued) ||
7593                 (kvm_arch_interrupt_allowed(vcpu) &&
7594                  kvm_cpu_has_interrupt(vcpu));
7595 }
7596
7597 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7598 {
7599         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7600 }
7601
7602 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7603 {
7604         return kvm_x86_ops->interrupt_allowed(vcpu);
7605 }
7606
7607 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
7608 {
7609         if (is_64_bit_mode(vcpu))
7610                 return kvm_rip_read(vcpu);
7611         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
7612                      kvm_rip_read(vcpu));
7613 }
7614 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
7615
7616 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7617 {
7618         return kvm_get_linear_rip(vcpu) == linear_rip;
7619 }
7620 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7621
7622 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7623 {
7624         unsigned long rflags;
7625
7626         rflags = kvm_x86_ops->get_rflags(vcpu);
7627         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7628                 rflags &= ~X86_EFLAGS_TF;
7629         return rflags;
7630 }
7631 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7632
7633 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7634 {
7635         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7636             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7637                 rflags |= X86_EFLAGS_TF;
7638         kvm_x86_ops->set_rflags(vcpu, rflags);
7639 }
7640
7641 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7642 {
7643         __kvm_set_rflags(vcpu, rflags);
7644         kvm_make_request(KVM_REQ_EVENT, vcpu);
7645 }
7646 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7647
7648 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7649 {
7650         int r;
7651
7652         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7653               work->wakeup_all)
7654                 return;
7655
7656         r = kvm_mmu_reload(vcpu);
7657         if (unlikely(r))
7658                 return;
7659
7660         if (!vcpu->arch.mmu.direct_map &&
7661               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7662                 return;
7663
7664         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7665 }
7666
7667 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7668 {
7669         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7670 }
7671
7672 static inline u32 kvm_async_pf_next_probe(u32 key)
7673 {
7674         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7675 }
7676
7677 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7678 {
7679         u32 key = kvm_async_pf_hash_fn(gfn);
7680
7681         while (vcpu->arch.apf.gfns[key] != ~0)
7682                 key = kvm_async_pf_next_probe(key);
7683
7684         vcpu->arch.apf.gfns[key] = gfn;
7685 }
7686
7687 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7688 {
7689         int i;
7690         u32 key = kvm_async_pf_hash_fn(gfn);
7691
7692         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7693                      (vcpu->arch.apf.gfns[key] != gfn &&
7694                       vcpu->arch.apf.gfns[key] != ~0); i++)
7695                 key = kvm_async_pf_next_probe(key);
7696
7697         return key;
7698 }
7699
7700 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7701 {
7702         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7703 }
7704
7705 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7706 {
7707         u32 i, j, k;
7708
7709         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7710         while (true) {
7711                 vcpu->arch.apf.gfns[i] = ~0;
7712                 do {
7713                         j = kvm_async_pf_next_probe(j);
7714                         if (vcpu->arch.apf.gfns[j] == ~0)
7715                                 return;
7716                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7717                         /*
7718                          * k lies cyclically in ]i,j]
7719                          * |    i.k.j |
7720                          * |....j i.k.| or  |.k..j i...|
7721                          */
7722                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7723                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7724                 i = j;
7725         }
7726 }
7727
7728 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7729 {
7730
7731         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7732                                       sizeof(val));
7733 }
7734
7735 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7736                                      struct kvm_async_pf *work)
7737 {
7738         struct x86_exception fault;
7739
7740         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7741         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7742
7743         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7744             (vcpu->arch.apf.send_user_only &&
7745              kvm_x86_ops->get_cpl(vcpu) == 0))
7746                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7747         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7748                 fault.vector = PF_VECTOR;
7749                 fault.error_code_valid = true;
7750                 fault.error_code = 0;
7751                 fault.nested_page_fault = false;
7752                 fault.address = work->arch.token;
7753                 kvm_inject_page_fault(vcpu, &fault);
7754         }
7755 }
7756
7757 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7758                                  struct kvm_async_pf *work)
7759 {
7760         struct x86_exception fault;
7761
7762         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7763         if (work->wakeup_all)
7764                 work->arch.token = ~0; /* broadcast wakeup */
7765         else
7766                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7767
7768         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7769             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7770                 fault.vector = PF_VECTOR;
7771                 fault.error_code_valid = true;
7772                 fault.error_code = 0;
7773                 fault.nested_page_fault = false;
7774                 fault.address = work->arch.token;
7775                 kvm_inject_page_fault(vcpu, &fault);
7776         }
7777         vcpu->arch.apf.halted = false;
7778         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7779 }
7780
7781 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7782 {
7783         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7784                 return true;
7785         else
7786                 return !kvm_event_needs_reinjection(vcpu) &&
7787                         kvm_x86_ops->interrupt_allowed(vcpu);
7788 }
7789
7790 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7791 {
7792         atomic_inc(&kvm->arch.noncoherent_dma_count);
7793 }
7794 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7795
7796 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7797 {
7798         atomic_dec(&kvm->arch.noncoherent_dma_count);
7799 }
7800 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7801
7802 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7803 {
7804         return atomic_read(&kvm->arch.noncoherent_dma_count);
7805 }
7806 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7807
7808 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7809 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7810 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7811 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7812 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7813 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7814 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7815 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7816 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7817 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7818 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7819 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7820 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
7821 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);