2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
70 #include <asm/mshyperv.h>
71 #include <asm/hypervisor.h>
72 #include <asm/intel_pt.h>
74 #define CREATE_TRACE_POINTS
77 #define MAX_IO_MSRS 256
78 #define KVM_MAX_MCE_BANKS 32
79 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
80 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
82 #define emul_to_vcpu(ctxt) \
83 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
86 * - enable syscall per default because its emulated by KVM
87 * - enable LME and LMA per default on 64 bit KVM
91 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
93 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
96 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
97 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
99 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
100 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
102 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
103 static void process_nmi(struct kvm_vcpu *vcpu);
104 static void enter_smm(struct kvm_vcpu *vcpu);
105 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
106 static void store_regs(struct kvm_vcpu *vcpu);
107 static int sync_regs(struct kvm_vcpu *vcpu);
109 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
110 EXPORT_SYMBOL_GPL(kvm_x86_ops);
112 static bool __read_mostly ignore_msrs = 0;
113 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
115 static bool __read_mostly report_ignored_msrs = true;
116 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
118 unsigned int min_timer_period_us = 200;
119 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
121 static bool __read_mostly kvmclock_periodic_sync = true;
122 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
124 bool __read_mostly kvm_has_tsc_control;
125 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
126 u32 __read_mostly kvm_max_guest_tsc_khz;
127 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
128 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
129 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
130 u64 __read_mostly kvm_max_tsc_scaling_ratio;
131 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
132 u64 __read_mostly kvm_default_tsc_scaling_ratio;
133 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
135 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
136 static u32 __read_mostly tsc_tolerance_ppm = 250;
137 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
140 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
141 * adaptive tuning starting from default advancment of 1000ns. '0' disables
142 * advancement entirely. Any other value is used as-is and disables adaptive
143 * tuning, i.e. allows priveleged userspace to set an exact advancement time.
145 static int __read_mostly lapic_timer_advance_ns = -1;
146 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
148 static bool __read_mostly vector_hashing = true;
149 module_param(vector_hashing, bool, S_IRUGO);
151 bool __read_mostly enable_vmware_backdoor = false;
152 module_param(enable_vmware_backdoor, bool, S_IRUGO);
153 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
155 static bool __read_mostly force_emulation_prefix = false;
156 module_param(force_emulation_prefix, bool, S_IRUGO);
158 #define KVM_NR_SHARED_MSRS 16
160 struct kvm_shared_msrs_global {
162 u32 msrs[KVM_NR_SHARED_MSRS];
165 struct kvm_shared_msrs {
166 struct user_return_notifier urn;
168 struct kvm_shared_msr_values {
171 } values[KVM_NR_SHARED_MSRS];
174 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
175 static struct kvm_shared_msrs __percpu *shared_msrs;
177 struct kvm_stats_debugfs_item debugfs_entries[] = {
178 { "pf_fixed", VCPU_STAT(pf_fixed) },
179 { "pf_guest", VCPU_STAT(pf_guest) },
180 { "tlb_flush", VCPU_STAT(tlb_flush) },
181 { "invlpg", VCPU_STAT(invlpg) },
182 { "exits", VCPU_STAT(exits) },
183 { "io_exits", VCPU_STAT(io_exits) },
184 { "mmio_exits", VCPU_STAT(mmio_exits) },
185 { "signal_exits", VCPU_STAT(signal_exits) },
186 { "irq_window", VCPU_STAT(irq_window_exits) },
187 { "nmi_window", VCPU_STAT(nmi_window_exits) },
188 { "halt_exits", VCPU_STAT(halt_exits) },
189 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
190 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
191 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
192 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
193 { "hypercalls", VCPU_STAT(hypercalls) },
194 { "request_irq", VCPU_STAT(request_irq_exits) },
195 { "irq_exits", VCPU_STAT(irq_exits) },
196 { "host_state_reload", VCPU_STAT(host_state_reload) },
197 { "fpu_reload", VCPU_STAT(fpu_reload) },
198 { "insn_emulation", VCPU_STAT(insn_emulation) },
199 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
200 { "irq_injections", VCPU_STAT(irq_injections) },
201 { "nmi_injections", VCPU_STAT(nmi_injections) },
202 { "req_event", VCPU_STAT(req_event) },
203 { "l1d_flush", VCPU_STAT(l1d_flush) },
204 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
205 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
206 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
207 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
208 { "mmu_flooded", VM_STAT(mmu_flooded) },
209 { "mmu_recycled", VM_STAT(mmu_recycled) },
210 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
211 { "mmu_unsync", VM_STAT(mmu_unsync) },
212 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
213 { "largepages", VM_STAT(lpages) },
214 { "max_mmu_page_hash_collisions",
215 VM_STAT(max_mmu_page_hash_collisions) },
219 u64 __read_mostly host_xcr0;
221 struct kmem_cache *x86_fpu_cache;
222 EXPORT_SYMBOL_GPL(x86_fpu_cache);
224 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
226 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
229 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
230 vcpu->arch.apf.gfns[i] = ~0;
233 static void kvm_on_user_return(struct user_return_notifier *urn)
236 struct kvm_shared_msrs *locals
237 = container_of(urn, struct kvm_shared_msrs, urn);
238 struct kvm_shared_msr_values *values;
242 * Disabling irqs at this point since the following code could be
243 * interrupted and executed through kvm_arch_hardware_disable()
245 local_irq_save(flags);
246 if (locals->registered) {
247 locals->registered = false;
248 user_return_notifier_unregister(urn);
250 local_irq_restore(flags);
251 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
252 values = &locals->values[slot];
253 if (values->host != values->curr) {
254 wrmsrl(shared_msrs_global.msrs[slot], values->host);
255 values->curr = values->host;
260 static void shared_msr_update(unsigned slot, u32 msr)
263 unsigned int cpu = smp_processor_id();
264 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
266 /* only read, and nobody should modify it at this time,
267 * so don't need lock */
268 if (slot >= shared_msrs_global.nr) {
269 printk(KERN_ERR "kvm: invalid MSR slot!");
272 rdmsrl_safe(msr, &value);
273 smsr->values[slot].host = value;
274 smsr->values[slot].curr = value;
277 void kvm_define_shared_msr(unsigned slot, u32 msr)
279 BUG_ON(slot >= KVM_NR_SHARED_MSRS);
280 shared_msrs_global.msrs[slot] = msr;
281 if (slot >= shared_msrs_global.nr)
282 shared_msrs_global.nr = slot + 1;
284 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
286 static void kvm_shared_msr_cpu_online(void)
290 for (i = 0; i < shared_msrs_global.nr; ++i)
291 shared_msr_update(i, shared_msrs_global.msrs[i]);
294 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
296 unsigned int cpu = smp_processor_id();
297 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
300 if (((value ^ smsr->values[slot].curr) & mask) == 0)
302 smsr->values[slot].curr = value;
303 err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
307 if (!smsr->registered) {
308 smsr->urn.on_user_return = kvm_on_user_return;
309 user_return_notifier_register(&smsr->urn);
310 smsr->registered = true;
314 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
316 static void drop_user_return_notifiers(void)
318 unsigned int cpu = smp_processor_id();
319 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
321 if (smsr->registered)
322 kvm_on_user_return(&smsr->urn);
325 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
327 return vcpu->arch.apic_base;
329 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
331 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
333 return kvm_apic_mode(kvm_get_apic_base(vcpu));
335 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
337 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
339 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
340 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
341 u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
342 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
344 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
346 if (!msr_info->host_initiated) {
347 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
349 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
353 kvm_lapic_set_base(vcpu, msr_info->data);
356 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
358 asmlinkage __visible void kvm_spurious_fault(void)
360 /* Fault while not rebooting. We want the trace. */
363 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
365 #define EXCPT_BENIGN 0
366 #define EXCPT_CONTRIBUTORY 1
369 static int exception_class(int vector)
379 return EXCPT_CONTRIBUTORY;
386 #define EXCPT_FAULT 0
388 #define EXCPT_ABORT 2
389 #define EXCPT_INTERRUPT 3
391 static int exception_type(int vector)
395 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
396 return EXCPT_INTERRUPT;
400 /* #DB is trap, as instruction watchpoints are handled elsewhere */
401 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
404 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
407 /* Reserved exceptions will result in fault */
411 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
413 unsigned nr = vcpu->arch.exception.nr;
414 bool has_payload = vcpu->arch.exception.has_payload;
415 unsigned long payload = vcpu->arch.exception.payload;
423 * "Certain debug exceptions may clear bit 0-3. The
424 * remaining contents of the DR6 register are never
425 * cleared by the processor".
427 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
429 * DR6.RTM is set by all #DB exceptions that don't clear it.
431 vcpu->arch.dr6 |= DR6_RTM;
432 vcpu->arch.dr6 |= payload;
434 * Bit 16 should be set in the payload whenever the #DB
435 * exception should clear DR6.RTM. This makes the payload
436 * compatible with the pending debug exceptions under VMX.
437 * Though not currently documented in the SDM, this also
438 * makes the payload compatible with the exit qualification
439 * for #DB exceptions under VMX.
441 vcpu->arch.dr6 ^= payload & DR6_RTM;
444 vcpu->arch.cr2 = payload;
448 vcpu->arch.exception.has_payload = false;
449 vcpu->arch.exception.payload = 0;
451 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
453 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
454 unsigned nr, bool has_error, u32 error_code,
455 bool has_payload, unsigned long payload, bool reinject)
460 kvm_make_request(KVM_REQ_EVENT, vcpu);
462 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
464 if (has_error && !is_protmode(vcpu))
468 * On vmentry, vcpu->arch.exception.pending is only
469 * true if an event injection was blocked by
470 * nested_run_pending. In that case, however,
471 * vcpu_enter_guest requests an immediate exit,
472 * and the guest shouldn't proceed far enough to
475 WARN_ON_ONCE(vcpu->arch.exception.pending);
476 vcpu->arch.exception.injected = true;
477 if (WARN_ON_ONCE(has_payload)) {
479 * A reinjected event has already
480 * delivered its payload.
486 vcpu->arch.exception.pending = true;
487 vcpu->arch.exception.injected = false;
489 vcpu->arch.exception.has_error_code = has_error;
490 vcpu->arch.exception.nr = nr;
491 vcpu->arch.exception.error_code = error_code;
492 vcpu->arch.exception.has_payload = has_payload;
493 vcpu->arch.exception.payload = payload;
495 * In guest mode, payload delivery should be deferred,
496 * so that the L1 hypervisor can intercept #PF before
497 * CR2 is modified (or intercept #DB before DR6 is
498 * modified under nVMX). However, for ABI
499 * compatibility with KVM_GET_VCPU_EVENTS and
500 * KVM_SET_VCPU_EVENTS, we can't delay payload
501 * delivery unless userspace has enabled this
502 * functionality via the per-VM capability,
503 * KVM_CAP_EXCEPTION_PAYLOAD.
505 if (!vcpu->kvm->arch.exception_payload_enabled ||
506 !is_guest_mode(vcpu))
507 kvm_deliver_exception_payload(vcpu);
511 /* to check exception */
512 prev_nr = vcpu->arch.exception.nr;
513 if (prev_nr == DF_VECTOR) {
514 /* triple fault -> shutdown */
515 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
518 class1 = exception_class(prev_nr);
519 class2 = exception_class(nr);
520 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
521 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
523 * Generate double fault per SDM Table 5-5. Set
524 * exception.pending = true so that the double fault
525 * can trigger a nested vmexit.
527 vcpu->arch.exception.pending = true;
528 vcpu->arch.exception.injected = false;
529 vcpu->arch.exception.has_error_code = true;
530 vcpu->arch.exception.nr = DF_VECTOR;
531 vcpu->arch.exception.error_code = 0;
532 vcpu->arch.exception.has_payload = false;
533 vcpu->arch.exception.payload = 0;
535 /* replace previous exception with a new one in a hope
536 that instruction re-execution will regenerate lost
541 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
543 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
545 EXPORT_SYMBOL_GPL(kvm_queue_exception);
547 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
549 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
551 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
553 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
554 unsigned long payload)
556 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
559 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
560 u32 error_code, unsigned long payload)
562 kvm_multiple_exception(vcpu, nr, true, error_code,
563 true, payload, false);
566 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
569 kvm_inject_gp(vcpu, 0);
571 return kvm_skip_emulated_instruction(vcpu);
575 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
577 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
579 ++vcpu->stat.pf_guest;
580 vcpu->arch.exception.nested_apf =
581 is_guest_mode(vcpu) && fault->async_page_fault;
582 if (vcpu->arch.exception.nested_apf) {
583 vcpu->arch.apf.nested_apf_token = fault->address;
584 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
586 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
590 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
592 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
594 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
595 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
597 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
599 return fault->nested_page_fault;
602 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
604 atomic_inc(&vcpu->arch.nmi_queued);
605 kvm_make_request(KVM_REQ_NMI, vcpu);
607 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
609 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
611 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
613 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
615 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
617 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
619 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
622 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
623 * a #GP and return false.
625 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
627 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
629 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
632 EXPORT_SYMBOL_GPL(kvm_require_cpl);
634 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
636 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
639 kvm_queue_exception(vcpu, UD_VECTOR);
642 EXPORT_SYMBOL_GPL(kvm_require_dr);
645 * This function will be used to read from the physical memory of the currently
646 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
647 * can read from guest physical or from the guest's guest physical memory.
649 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
650 gfn_t ngfn, void *data, int offset, int len,
653 struct x86_exception exception;
657 ngpa = gfn_to_gpa(ngfn);
658 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
659 if (real_gfn == UNMAPPED_GVA)
662 real_gfn = gpa_to_gfn(real_gfn);
664 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
666 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
668 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
669 void *data, int offset, int len, u32 access)
671 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
672 data, offset, len, access);
676 * Load the pae pdptrs. Return true is they are all valid.
678 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
680 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
681 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
684 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
686 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
687 offset * sizeof(u64), sizeof(pdpte),
688 PFERR_USER_MASK|PFERR_WRITE_MASK);
693 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
694 if ((pdpte[i] & PT_PRESENT_MASK) &&
696 vcpu->arch.mmu->guest_rsvd_check.rsvd_bits_mask[0][2])) {
703 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
704 __set_bit(VCPU_EXREG_PDPTR,
705 (unsigned long *)&vcpu->arch.regs_avail);
706 __set_bit(VCPU_EXREG_PDPTR,
707 (unsigned long *)&vcpu->arch.regs_dirty);
712 EXPORT_SYMBOL_GPL(load_pdptrs);
714 bool pdptrs_changed(struct kvm_vcpu *vcpu)
716 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
722 if (is_long_mode(vcpu) || !is_pae(vcpu) || !is_paging(vcpu))
725 if (!test_bit(VCPU_EXREG_PDPTR,
726 (unsigned long *)&vcpu->arch.regs_avail))
729 gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
730 offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
731 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
732 PFERR_USER_MASK | PFERR_WRITE_MASK);
735 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
740 EXPORT_SYMBOL_GPL(pdptrs_changed);
742 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
744 unsigned long old_cr0 = kvm_read_cr0(vcpu);
745 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
750 if (cr0 & 0xffffffff00000000UL)
754 cr0 &= ~CR0_RESERVED_BITS;
756 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
759 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
762 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
764 if ((vcpu->arch.efer & EFER_LME)) {
769 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
774 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
779 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
782 kvm_x86_ops->set_cr0(vcpu, cr0);
784 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
785 kvm_clear_async_pf_completion_queue(vcpu);
786 kvm_async_pf_hash_reset(vcpu);
789 if ((cr0 ^ old_cr0) & update_bits)
790 kvm_mmu_reset_context(vcpu);
792 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
793 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
794 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
795 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
799 EXPORT_SYMBOL_GPL(kvm_set_cr0);
801 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
803 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
805 EXPORT_SYMBOL_GPL(kvm_lmsw);
807 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
809 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
810 !vcpu->guest_xcr0_loaded) {
811 /* kvm_set_xcr() also depends on this */
812 if (vcpu->arch.xcr0 != host_xcr0)
813 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
814 vcpu->guest_xcr0_loaded = 1;
817 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
819 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
821 if (vcpu->guest_xcr0_loaded) {
822 if (vcpu->arch.xcr0 != host_xcr0)
823 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
824 vcpu->guest_xcr0_loaded = 0;
827 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
829 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
832 u64 old_xcr0 = vcpu->arch.xcr0;
835 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
836 if (index != XCR_XFEATURE_ENABLED_MASK)
838 if (!(xcr0 & XFEATURE_MASK_FP))
840 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
844 * Do not allow the guest to set bits that we do not support
845 * saving. However, xcr0 bit 0 is always set, even if the
846 * emulated CPU does not support XSAVE (see fx_init).
848 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
849 if (xcr0 & ~valid_bits)
852 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
853 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
856 if (xcr0 & XFEATURE_MASK_AVX512) {
857 if (!(xcr0 & XFEATURE_MASK_YMM))
859 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
862 vcpu->arch.xcr0 = xcr0;
864 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
865 kvm_update_cpuid(vcpu);
869 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
871 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
872 __kvm_set_xcr(vcpu, index, xcr)) {
873 kvm_inject_gp(vcpu, 0);
878 EXPORT_SYMBOL_GPL(kvm_set_xcr);
880 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
882 unsigned long old_cr4 = kvm_read_cr4(vcpu);
883 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
884 X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
886 if (cr4 & CR4_RESERVED_BITS)
889 if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
892 if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
895 if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
898 if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
901 if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
904 if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
907 if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
910 if (is_long_mode(vcpu)) {
911 if (!(cr4 & X86_CR4_PAE))
913 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
914 && ((cr4 ^ old_cr4) & pdptr_bits)
915 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
919 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
920 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
923 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
924 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
928 if (kvm_x86_ops->set_cr4(vcpu, cr4))
931 if (((cr4 ^ old_cr4) & pdptr_bits) ||
932 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
933 kvm_mmu_reset_context(vcpu);
935 if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
936 kvm_update_cpuid(vcpu);
940 EXPORT_SYMBOL_GPL(kvm_set_cr4);
942 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
944 bool skip_tlb_flush = false;
946 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
949 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
950 cr3 &= ~X86_CR3_PCID_NOFLUSH;
954 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
955 if (!skip_tlb_flush) {
956 kvm_mmu_sync_roots(vcpu);
957 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
962 if (is_long_mode(vcpu) &&
963 (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
965 else if (is_pae(vcpu) && is_paging(vcpu) &&
966 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
969 kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
970 vcpu->arch.cr3 = cr3;
971 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
975 EXPORT_SYMBOL_GPL(kvm_set_cr3);
977 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
979 if (cr8 & CR8_RESERVED_BITS)
981 if (lapic_in_kernel(vcpu))
982 kvm_lapic_set_tpr(vcpu, cr8);
984 vcpu->arch.cr8 = cr8;
987 EXPORT_SYMBOL_GPL(kvm_set_cr8);
989 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
991 if (lapic_in_kernel(vcpu))
992 return kvm_lapic_get_cr8(vcpu);
994 return vcpu->arch.cr8;
996 EXPORT_SYMBOL_GPL(kvm_get_cr8);
998 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1002 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1003 for (i = 0; i < KVM_NR_DB_REGS; i++)
1004 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1005 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1009 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1011 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1012 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1015 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1019 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1020 dr7 = vcpu->arch.guest_debug_dr7;
1022 dr7 = vcpu->arch.dr7;
1023 kvm_x86_ops->set_dr7(vcpu, dr7);
1024 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1025 if (dr7 & DR7_BP_EN_MASK)
1026 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1029 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1031 u64 fixed = DR6_FIXED_1;
1033 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1038 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1042 vcpu->arch.db[dr] = val;
1043 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1044 vcpu->arch.eff_db[dr] = val;
1049 if (val & 0xffffffff00000000ULL)
1050 return -1; /* #GP */
1051 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1052 kvm_update_dr6(vcpu);
1057 if (val & 0xffffffff00000000ULL)
1058 return -1; /* #GP */
1059 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1060 kvm_update_dr7(vcpu);
1067 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1069 if (__kvm_set_dr(vcpu, dr, val)) {
1070 kvm_inject_gp(vcpu, 0);
1075 EXPORT_SYMBOL_GPL(kvm_set_dr);
1077 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1081 *val = vcpu->arch.db[dr];
1086 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1087 *val = vcpu->arch.dr6;
1089 *val = kvm_x86_ops->get_dr6(vcpu);
1094 *val = vcpu->arch.dr7;
1099 EXPORT_SYMBOL_GPL(kvm_get_dr);
1101 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1103 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
1107 err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1110 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1111 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1114 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1117 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1118 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1120 * This list is modified at module load time to reflect the
1121 * capabilities of the host cpu. This capabilities test skips MSRs that are
1122 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1123 * may depend on host virtualization features rather than host cpu features.
1126 static u32 msrs_to_save[] = {
1127 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1129 #ifdef CONFIG_X86_64
1130 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1132 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1133 MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1135 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1136 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1137 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1138 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1139 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1140 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1143 static unsigned num_msrs_to_save;
1145 static u32 emulated_msrs[] = {
1146 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1147 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1148 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1149 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1150 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1151 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1152 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1154 HV_X64_MSR_VP_INDEX,
1155 HV_X64_MSR_VP_RUNTIME,
1156 HV_X64_MSR_SCONTROL,
1157 HV_X64_MSR_STIMER0_CONFIG,
1158 HV_X64_MSR_VP_ASSIST_PAGE,
1159 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1160 HV_X64_MSR_TSC_EMULATION_STATUS,
1162 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1165 MSR_IA32_TSC_ADJUST,
1166 MSR_IA32_TSCDEADLINE,
1167 MSR_IA32_ARCH_CAPABILITIES,
1168 MSR_IA32_MISC_ENABLE,
1169 MSR_IA32_MCG_STATUS,
1171 MSR_IA32_MCG_EXT_CTL,
1175 MSR_MISC_FEATURES_ENABLES,
1176 MSR_AMD64_VIRT_SPEC_CTRL,
1179 static unsigned num_emulated_msrs;
1182 * List of msr numbers which are used to expose MSR-based features that
1183 * can be used by a hypervisor to validate requested CPU features.
1185 static u32 msr_based_features[] = {
1187 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1188 MSR_IA32_VMX_PINBASED_CTLS,
1189 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1190 MSR_IA32_VMX_PROCBASED_CTLS,
1191 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1192 MSR_IA32_VMX_EXIT_CTLS,
1193 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1194 MSR_IA32_VMX_ENTRY_CTLS,
1196 MSR_IA32_VMX_CR0_FIXED0,
1197 MSR_IA32_VMX_CR0_FIXED1,
1198 MSR_IA32_VMX_CR4_FIXED0,
1199 MSR_IA32_VMX_CR4_FIXED1,
1200 MSR_IA32_VMX_VMCS_ENUM,
1201 MSR_IA32_VMX_PROCBASED_CTLS2,
1202 MSR_IA32_VMX_EPT_VPID_CAP,
1203 MSR_IA32_VMX_VMFUNC,
1207 MSR_IA32_ARCH_CAPABILITIES,
1210 static unsigned int num_msr_based_features;
1212 u64 kvm_get_arch_capabilities(void)
1216 rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES, &data);
1219 * If we're doing cache flushes (either "always" or "cond")
1220 * we will do one whenever the guest does a vmlaunch/vmresume.
1221 * If an outer hypervisor is doing the cache flush for us
1222 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1223 * capability to the guest too, and if EPT is disabled we're not
1224 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1225 * require a nested hypervisor to do a flush of its own.
1227 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1228 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1232 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities);
1234 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1236 switch (msr->index) {
1237 case MSR_IA32_ARCH_CAPABILITIES:
1238 msr->data = kvm_get_arch_capabilities();
1240 case MSR_IA32_UCODE_REV:
1241 rdmsrl_safe(msr->index, &msr->data);
1244 if (kvm_x86_ops->get_msr_feature(msr))
1250 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1252 struct kvm_msr_entry msr;
1256 r = kvm_get_msr_feature(&msr);
1265 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1267 if (efer & efer_reserved_bits)
1270 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1273 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1278 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1280 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1282 u64 old_efer = vcpu->arch.efer;
1284 if (!kvm_valid_efer(vcpu, efer))
1288 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1292 efer |= vcpu->arch.efer & EFER_LMA;
1294 kvm_x86_ops->set_efer(vcpu, efer);
1296 /* Update reserved bits */
1297 if ((efer ^ old_efer) & EFER_NX)
1298 kvm_mmu_reset_context(vcpu);
1303 void kvm_enable_efer_bits(u64 mask)
1305 efer_reserved_bits &= ~mask;
1307 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1310 * Writes msr value into into the appropriate "register".
1311 * Returns 0 on success, non-0 otherwise.
1312 * Assumes vcpu_load() was already called.
1314 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1316 switch (msr->index) {
1319 case MSR_KERNEL_GS_BASE:
1322 if (is_noncanonical_address(msr->data, vcpu))
1325 case MSR_IA32_SYSENTER_EIP:
1326 case MSR_IA32_SYSENTER_ESP:
1328 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1329 * non-canonical address is written on Intel but not on
1330 * AMD (which ignores the top 32-bits, because it does
1331 * not implement 64-bit SYSENTER).
1333 * 64-bit code should hence be able to write a non-canonical
1334 * value on AMD. Making the address canonical ensures that
1335 * vmentry does not fail on Intel after writing a non-canonical
1336 * value, and that something deterministic happens if the guest
1337 * invokes 64-bit SYSENTER.
1339 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1341 return kvm_x86_ops->set_msr(vcpu, msr);
1343 EXPORT_SYMBOL_GPL(kvm_set_msr);
1346 * Adapt set_msr() to msr_io()'s calling convention
1348 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1350 struct msr_data msr;
1354 msr.host_initiated = true;
1355 r = kvm_get_msr(vcpu, &msr);
1363 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1365 struct msr_data msr;
1369 msr.host_initiated = true;
1370 return kvm_set_msr(vcpu, &msr);
1373 #ifdef CONFIG_X86_64
1374 struct pvclock_gtod_data {
1377 struct { /* extract of a clocksource struct */
1390 static struct pvclock_gtod_data pvclock_gtod_data;
1392 static void update_pvclock_gtod(struct timekeeper *tk)
1394 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1397 boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1399 write_seqcount_begin(&vdata->seq);
1401 /* copy pvclock gtod data */
1402 vdata->clock.vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;
1403 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
1404 vdata->clock.mask = tk->tkr_mono.mask;
1405 vdata->clock.mult = tk->tkr_mono.mult;
1406 vdata->clock.shift = tk->tkr_mono.shift;
1408 vdata->boot_ns = boot_ns;
1409 vdata->nsec_base = tk->tkr_mono.xtime_nsec;
1411 vdata->wall_time_sec = tk->xtime_sec;
1413 write_seqcount_end(&vdata->seq);
1417 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1420 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1421 * vcpu_enter_guest. This function is only called from
1422 * the physical CPU that is running vcpu.
1424 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1427 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1431 struct pvclock_wall_clock wc;
1432 struct timespec64 boot;
1437 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1442 ++version; /* first time write, random junk */
1446 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1450 * The guest calculates current wall clock time by adding
1451 * system time (updated by kvm_guest_time_update below) to the
1452 * wall clock specified here. guest system time equals host
1453 * system time for us, thus we must fill in host boot time here.
1455 getboottime64(&boot);
1457 if (kvm->arch.kvmclock_offset) {
1458 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1459 boot = timespec64_sub(boot, ts);
1461 wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1462 wc.nsec = boot.tv_nsec;
1463 wc.version = version;
1465 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1468 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1471 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1473 do_shl32_div32(dividend, divisor);
1477 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1478 s8 *pshift, u32 *pmultiplier)
1486 scaled64 = scaled_hz;
1487 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1492 tps32 = (uint32_t)tps64;
1493 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1494 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1502 *pmultiplier = div_frac(scaled64, tps32);
1504 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1505 __func__, base_hz, scaled_hz, shift, *pmultiplier);
1508 #ifdef CONFIG_X86_64
1509 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1512 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1513 static unsigned long max_tsc_khz;
1515 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1517 u64 v = (u64)khz * (1000000 + ppm);
1522 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1526 /* Guest TSC same frequency as host TSC? */
1528 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1532 /* TSC scaling supported? */
1533 if (!kvm_has_tsc_control) {
1534 if (user_tsc_khz > tsc_khz) {
1535 vcpu->arch.tsc_catchup = 1;
1536 vcpu->arch.tsc_always_catchup = 1;
1539 WARN(1, "user requested TSC rate below hardware speed\n");
1544 /* TSC scaling required - calculate ratio */
1545 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1546 user_tsc_khz, tsc_khz);
1548 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1549 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1554 vcpu->arch.tsc_scaling_ratio = ratio;
1558 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1560 u32 thresh_lo, thresh_hi;
1561 int use_scaling = 0;
1563 /* tsc_khz can be zero if TSC calibration fails */
1564 if (user_tsc_khz == 0) {
1565 /* set tsc_scaling_ratio to a safe value */
1566 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1570 /* Compute a scale to convert nanoseconds in TSC cycles */
1571 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1572 &vcpu->arch.virtual_tsc_shift,
1573 &vcpu->arch.virtual_tsc_mult);
1574 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1577 * Compute the variation in TSC rate which is acceptable
1578 * within the range of tolerance and decide if the
1579 * rate being applied is within that bounds of the hardware
1580 * rate. If so, no scaling or compensation need be done.
1582 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1583 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1584 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1585 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1588 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1591 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1593 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1594 vcpu->arch.virtual_tsc_mult,
1595 vcpu->arch.virtual_tsc_shift);
1596 tsc += vcpu->arch.this_tsc_write;
1600 static inline int gtod_is_based_on_tsc(int mode)
1602 return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1605 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1607 #ifdef CONFIG_X86_64
1609 struct kvm_arch *ka = &vcpu->kvm->arch;
1610 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1612 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1613 atomic_read(&vcpu->kvm->online_vcpus));
1616 * Once the masterclock is enabled, always perform request in
1617 * order to update it.
1619 * In order to enable masterclock, the host clocksource must be TSC
1620 * and the vcpus need to have matched TSCs. When that happens,
1621 * perform request to enable masterclock.
1623 if (ka->use_master_clock ||
1624 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1625 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1627 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1628 atomic_read(&vcpu->kvm->online_vcpus),
1629 ka->use_master_clock, gtod->clock.vclock_mode);
1633 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1635 u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1636 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1640 * Multiply tsc by a fixed point number represented by ratio.
1642 * The most significant 64-N bits (mult) of ratio represent the
1643 * integral part of the fixed point number; the remaining N bits
1644 * (frac) represent the fractional part, ie. ratio represents a fixed
1645 * point number (mult + frac * 2^(-N)).
1647 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1649 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1651 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1654 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1657 u64 ratio = vcpu->arch.tsc_scaling_ratio;
1659 if (ratio != kvm_default_tsc_scaling_ratio)
1660 _tsc = __scale_tsc(ratio, tsc);
1664 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1666 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1670 tsc = kvm_scale_tsc(vcpu, rdtsc());
1672 return target_tsc - tsc;
1675 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1677 u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1679 return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1681 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1683 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1685 vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1688 static inline bool kvm_check_tsc_unstable(void)
1690 #ifdef CONFIG_X86_64
1692 * TSC is marked unstable when we're running on Hyper-V,
1693 * 'TSC page' clocksource is good.
1695 if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1698 return check_tsc_unstable();
1701 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1703 struct kvm *kvm = vcpu->kvm;
1704 u64 offset, ns, elapsed;
1705 unsigned long flags;
1707 bool already_matched;
1708 u64 data = msr->data;
1709 bool synchronizing = false;
1711 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1712 offset = kvm_compute_tsc_offset(vcpu, data);
1713 ns = ktime_get_boot_ns();
1714 elapsed = ns - kvm->arch.last_tsc_nsec;
1716 if (vcpu->arch.virtual_tsc_khz) {
1717 if (data == 0 && msr->host_initiated) {
1719 * detection of vcpu initialization -- need to sync
1720 * with other vCPUs. This particularly helps to keep
1721 * kvm_clock stable after CPU hotplug
1723 synchronizing = true;
1725 u64 tsc_exp = kvm->arch.last_tsc_write +
1726 nsec_to_cycles(vcpu, elapsed);
1727 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1729 * Special case: TSC write with a small delta (1 second)
1730 * of virtual cycle time against real time is
1731 * interpreted as an attempt to synchronize the CPU.
1733 synchronizing = data < tsc_exp + tsc_hz &&
1734 data + tsc_hz > tsc_exp;
1739 * For a reliable TSC, we can match TSC offsets, and for an unstable
1740 * TSC, we add elapsed time in this computation. We could let the
1741 * compensation code attempt to catch up if we fall behind, but
1742 * it's better to try to match offsets from the beginning.
1744 if (synchronizing &&
1745 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1746 if (!kvm_check_tsc_unstable()) {
1747 offset = kvm->arch.cur_tsc_offset;
1748 pr_debug("kvm: matched tsc offset for %llu\n", data);
1750 u64 delta = nsec_to_cycles(vcpu, elapsed);
1752 offset = kvm_compute_tsc_offset(vcpu, data);
1753 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1756 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1759 * We split periods of matched TSC writes into generations.
1760 * For each generation, we track the original measured
1761 * nanosecond time, offset, and write, so if TSCs are in
1762 * sync, we can match exact offset, and if not, we can match
1763 * exact software computation in compute_guest_tsc()
1765 * These values are tracked in kvm->arch.cur_xxx variables.
1767 kvm->arch.cur_tsc_generation++;
1768 kvm->arch.cur_tsc_nsec = ns;
1769 kvm->arch.cur_tsc_write = data;
1770 kvm->arch.cur_tsc_offset = offset;
1772 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1773 kvm->arch.cur_tsc_generation, data);
1777 * We also track th most recent recorded KHZ, write and time to
1778 * allow the matching interval to be extended at each write.
1780 kvm->arch.last_tsc_nsec = ns;
1781 kvm->arch.last_tsc_write = data;
1782 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1784 vcpu->arch.last_guest_tsc = data;
1786 /* Keep track of which generation this VCPU has synchronized to */
1787 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1788 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1789 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1791 if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1792 update_ia32_tsc_adjust_msr(vcpu, offset);
1794 kvm_vcpu_write_tsc_offset(vcpu, offset);
1795 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1797 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1799 kvm->arch.nr_vcpus_matched_tsc = 0;
1800 } else if (!already_matched) {
1801 kvm->arch.nr_vcpus_matched_tsc++;
1804 kvm_track_tsc_matching(vcpu);
1805 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1808 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1810 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1813 u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1814 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1817 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1819 if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1820 WARN_ON(adjustment < 0);
1821 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1822 adjust_tsc_offset_guest(vcpu, adjustment);
1825 #ifdef CONFIG_X86_64
1827 static u64 read_tsc(void)
1829 u64 ret = (u64)rdtsc_ordered();
1830 u64 last = pvclock_gtod_data.clock.cycle_last;
1832 if (likely(ret >= last))
1836 * GCC likes to generate cmov here, but this branch is extremely
1837 * predictable (it's just a function of time and the likely is
1838 * very likely) and there's a data dependence, so force GCC
1839 * to generate a branch instead. I don't barrier() because
1840 * we don't actually need a barrier, and if this function
1841 * ever gets inlined it will generate worse code.
1847 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1850 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1853 switch (gtod->clock.vclock_mode) {
1854 case VCLOCK_HVCLOCK:
1855 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1857 if (tsc_pg_val != U64_MAX) {
1858 /* TSC page valid */
1859 *mode = VCLOCK_HVCLOCK;
1860 v = (tsc_pg_val - gtod->clock.cycle_last) &
1863 /* TSC page invalid */
1864 *mode = VCLOCK_NONE;
1869 *tsc_timestamp = read_tsc();
1870 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1874 *mode = VCLOCK_NONE;
1877 if (*mode == VCLOCK_NONE)
1878 *tsc_timestamp = v = 0;
1880 return v * gtod->clock.mult;
1883 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1885 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1891 seq = read_seqcount_begin(>od->seq);
1892 ns = gtod->nsec_base;
1893 ns += vgettsc(tsc_timestamp, &mode);
1894 ns >>= gtod->clock.shift;
1895 ns += gtod->boot_ns;
1896 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1902 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1904 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1910 seq = read_seqcount_begin(>od->seq);
1911 ts->tv_sec = gtod->wall_time_sec;
1912 ns = gtod->nsec_base;
1913 ns += vgettsc(tsc_timestamp, &mode);
1914 ns >>= gtod->clock.shift;
1915 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1917 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1923 /* returns true if host is using TSC based clocksource */
1924 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1926 /* checked again under seqlock below */
1927 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1930 return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1934 /* returns true if host is using TSC based clocksource */
1935 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1938 /* checked again under seqlock below */
1939 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1942 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1948 * Assuming a stable TSC across physical CPUS, and a stable TSC
1949 * across virtual CPUs, the following condition is possible.
1950 * Each numbered line represents an event visible to both
1951 * CPUs at the next numbered event.
1953 * "timespecX" represents host monotonic time. "tscX" represents
1956 * VCPU0 on CPU0 | VCPU1 on CPU1
1958 * 1. read timespec0,tsc0
1959 * 2. | timespec1 = timespec0 + N
1961 * 3. transition to guest | transition to guest
1962 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1963 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1964 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1966 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1969 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1971 * - 0 < N - M => M < N
1973 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1974 * always the case (the difference between two distinct xtime instances
1975 * might be smaller then the difference between corresponding TSC reads,
1976 * when updating guest vcpus pvclock areas).
1978 * To avoid that problem, do not allow visibility of distinct
1979 * system_timestamp/tsc_timestamp values simultaneously: use a master
1980 * copy of host monotonic time values. Update that master copy
1983 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1987 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1989 #ifdef CONFIG_X86_64
1990 struct kvm_arch *ka = &kvm->arch;
1992 bool host_tsc_clocksource, vcpus_matched;
1994 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1995 atomic_read(&kvm->online_vcpus));
1998 * If the host uses TSC clock, then passthrough TSC as stable
2001 host_tsc_clocksource = kvm_get_time_and_clockread(
2002 &ka->master_kernel_ns,
2003 &ka->master_cycle_now);
2005 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2006 && !ka->backwards_tsc_observed
2007 && !ka->boot_vcpu_runs_old_kvmclock;
2009 if (ka->use_master_clock)
2010 atomic_set(&kvm_guest_has_master_clock, 1);
2012 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2013 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2018 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2020 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2023 static void kvm_gen_update_masterclock(struct kvm *kvm)
2025 #ifdef CONFIG_X86_64
2027 struct kvm_vcpu *vcpu;
2028 struct kvm_arch *ka = &kvm->arch;
2030 spin_lock(&ka->pvclock_gtod_sync_lock);
2031 kvm_make_mclock_inprogress_request(kvm);
2032 /* no guest entries from this point */
2033 pvclock_update_vm_gtod_copy(kvm);
2035 kvm_for_each_vcpu(i, vcpu, kvm)
2036 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2038 /* guest entries allowed */
2039 kvm_for_each_vcpu(i, vcpu, kvm)
2040 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2042 spin_unlock(&ka->pvclock_gtod_sync_lock);
2046 u64 get_kvmclock_ns(struct kvm *kvm)
2048 struct kvm_arch *ka = &kvm->arch;
2049 struct pvclock_vcpu_time_info hv_clock;
2052 spin_lock(&ka->pvclock_gtod_sync_lock);
2053 if (!ka->use_master_clock) {
2054 spin_unlock(&ka->pvclock_gtod_sync_lock);
2055 return ktime_get_boot_ns() + ka->kvmclock_offset;
2058 hv_clock.tsc_timestamp = ka->master_cycle_now;
2059 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2060 spin_unlock(&ka->pvclock_gtod_sync_lock);
2062 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2065 if (__this_cpu_read(cpu_tsc_khz)) {
2066 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2067 &hv_clock.tsc_shift,
2068 &hv_clock.tsc_to_system_mul);
2069 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2071 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
2078 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2080 struct kvm_vcpu_arch *vcpu = &v->arch;
2081 struct pvclock_vcpu_time_info guest_hv_clock;
2083 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2084 &guest_hv_clock, sizeof(guest_hv_clock))))
2087 /* This VCPU is paused, but it's legal for a guest to read another
2088 * VCPU's kvmclock, so we really have to follow the specification where
2089 * it says that version is odd if data is being modified, and even after
2092 * Version field updates must be kept separate. This is because
2093 * kvm_write_guest_cached might use a "rep movs" instruction, and
2094 * writes within a string instruction are weakly ordered. So there
2095 * are three writes overall.
2097 * As a small optimization, only write the version field in the first
2098 * and third write. The vcpu->pv_time cache is still valid, because the
2099 * version field is the first in the struct.
2101 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2103 if (guest_hv_clock.version & 1)
2104 ++guest_hv_clock.version; /* first time write, random junk */
2106 vcpu->hv_clock.version = guest_hv_clock.version + 1;
2107 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2109 sizeof(vcpu->hv_clock.version));
2113 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2114 vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2116 if (vcpu->pvclock_set_guest_stopped_request) {
2117 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2118 vcpu->pvclock_set_guest_stopped_request = false;
2121 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2123 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2125 sizeof(vcpu->hv_clock));
2129 vcpu->hv_clock.version++;
2130 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2132 sizeof(vcpu->hv_clock.version));
2135 static int kvm_guest_time_update(struct kvm_vcpu *v)
2137 unsigned long flags, tgt_tsc_khz;
2138 struct kvm_vcpu_arch *vcpu = &v->arch;
2139 struct kvm_arch *ka = &v->kvm->arch;
2141 u64 tsc_timestamp, host_tsc;
2143 bool use_master_clock;
2149 * If the host uses TSC clock, then passthrough TSC as stable
2152 spin_lock(&ka->pvclock_gtod_sync_lock);
2153 use_master_clock = ka->use_master_clock;
2154 if (use_master_clock) {
2155 host_tsc = ka->master_cycle_now;
2156 kernel_ns = ka->master_kernel_ns;
2158 spin_unlock(&ka->pvclock_gtod_sync_lock);
2160 /* Keep irq disabled to prevent changes to the clock */
2161 local_irq_save(flags);
2162 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2163 if (unlikely(tgt_tsc_khz == 0)) {
2164 local_irq_restore(flags);
2165 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2168 if (!use_master_clock) {
2170 kernel_ns = ktime_get_boot_ns();
2173 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2176 * We may have to catch up the TSC to match elapsed wall clock
2177 * time for two reasons, even if kvmclock is used.
2178 * 1) CPU could have been running below the maximum TSC rate
2179 * 2) Broken TSC compensation resets the base at each VCPU
2180 * entry to avoid unknown leaps of TSC even when running
2181 * again on the same CPU. This may cause apparent elapsed
2182 * time to disappear, and the guest to stand still or run
2185 if (vcpu->tsc_catchup) {
2186 u64 tsc = compute_guest_tsc(v, kernel_ns);
2187 if (tsc > tsc_timestamp) {
2188 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2189 tsc_timestamp = tsc;
2193 local_irq_restore(flags);
2195 /* With all the info we got, fill in the values */
2197 if (kvm_has_tsc_control)
2198 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2200 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2201 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2202 &vcpu->hv_clock.tsc_shift,
2203 &vcpu->hv_clock.tsc_to_system_mul);
2204 vcpu->hw_tsc_khz = tgt_tsc_khz;
2207 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2208 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2209 vcpu->last_guest_tsc = tsc_timestamp;
2211 /* If the host uses TSC clocksource, then it is stable */
2213 if (use_master_clock)
2214 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2216 vcpu->hv_clock.flags = pvclock_flags;
2218 if (vcpu->pv_time_enabled)
2219 kvm_setup_pvclock_page(v);
2220 if (v == kvm_get_vcpu(v->kvm, 0))
2221 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2226 * kvmclock updates which are isolated to a given vcpu, such as
2227 * vcpu->cpu migration, should not allow system_timestamp from
2228 * the rest of the vcpus to remain static. Otherwise ntp frequency
2229 * correction applies to one vcpu's system_timestamp but not
2232 * So in those cases, request a kvmclock update for all vcpus.
2233 * We need to rate-limit these requests though, as they can
2234 * considerably slow guests that have a large number of vcpus.
2235 * The time for a remote vcpu to update its kvmclock is bound
2236 * by the delay we use to rate-limit the updates.
2239 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2241 static void kvmclock_update_fn(struct work_struct *work)
2244 struct delayed_work *dwork = to_delayed_work(work);
2245 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2246 kvmclock_update_work);
2247 struct kvm *kvm = container_of(ka, struct kvm, arch);
2248 struct kvm_vcpu *vcpu;
2250 kvm_for_each_vcpu(i, vcpu, kvm) {
2251 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2252 kvm_vcpu_kick(vcpu);
2256 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2258 struct kvm *kvm = v->kvm;
2260 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2261 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2262 KVMCLOCK_UPDATE_DELAY);
2265 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2267 static void kvmclock_sync_fn(struct work_struct *work)
2269 struct delayed_work *dwork = to_delayed_work(work);
2270 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2271 kvmclock_sync_work);
2272 struct kvm *kvm = container_of(ka, struct kvm, arch);
2274 if (!kvmclock_periodic_sync)
2277 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2278 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2279 KVMCLOCK_SYNC_PERIOD);
2282 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2284 u64 mcg_cap = vcpu->arch.mcg_cap;
2285 unsigned bank_num = mcg_cap & 0xff;
2286 u32 msr = msr_info->index;
2287 u64 data = msr_info->data;
2290 case MSR_IA32_MCG_STATUS:
2291 vcpu->arch.mcg_status = data;
2293 case MSR_IA32_MCG_CTL:
2294 if (!(mcg_cap & MCG_CTL_P) &&
2295 (data || !msr_info->host_initiated))
2297 if (data != 0 && data != ~(u64)0)
2299 vcpu->arch.mcg_ctl = data;
2302 if (msr >= MSR_IA32_MC0_CTL &&
2303 msr < MSR_IA32_MCx_CTL(bank_num)) {
2304 u32 offset = msr - MSR_IA32_MC0_CTL;
2305 /* only 0 or all 1s can be written to IA32_MCi_CTL
2306 * some Linux kernels though clear bit 10 in bank 4 to
2307 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2308 * this to avoid an uncatched #GP in the guest
2310 if ((offset & 0x3) == 0 &&
2311 data != 0 && (data | (1 << 10)) != ~(u64)0)
2313 if (!msr_info->host_initiated &&
2314 (offset & 0x3) == 1 && data != 0)
2316 vcpu->arch.mce_banks[offset] = data;
2324 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2326 struct kvm *kvm = vcpu->kvm;
2327 int lm = is_long_mode(vcpu);
2328 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2329 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2330 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2331 : kvm->arch.xen_hvm_config.blob_size_32;
2332 u32 page_num = data & ~PAGE_MASK;
2333 u64 page_addr = data & PAGE_MASK;
2338 if (page_num >= blob_size)
2341 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2346 if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2355 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2357 gpa_t gpa = data & ~0x3f;
2359 /* Bits 3:5 are reserved, Should be zero */
2363 vcpu->arch.apf.msr_val = data;
2365 if (!(data & KVM_ASYNC_PF_ENABLED)) {
2366 kvm_clear_async_pf_completion_queue(vcpu);
2367 kvm_async_pf_hash_reset(vcpu);
2371 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2375 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2376 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2377 kvm_async_pf_wakeup_all(vcpu);
2381 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2383 vcpu->arch.pv_time_enabled = false;
2386 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2388 ++vcpu->stat.tlb_flush;
2389 kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2392 static void record_steal_time(struct kvm_vcpu *vcpu)
2394 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2397 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2398 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2402 * Doing a TLB flush here, on the guest's behalf, can avoid
2405 if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2406 kvm_vcpu_flush_tlb(vcpu, false);
2408 if (vcpu->arch.st.steal.version & 1)
2409 vcpu->arch.st.steal.version += 1; /* first time write, random junk */
2411 vcpu->arch.st.steal.version += 1;
2413 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2414 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2418 vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2419 vcpu->arch.st.last_steal;
2420 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2422 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2423 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2427 vcpu->arch.st.steal.version += 1;
2429 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2430 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2433 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2436 u32 msr = msr_info->index;
2437 u64 data = msr_info->data;
2440 case MSR_AMD64_NB_CFG:
2441 case MSR_IA32_UCODE_WRITE:
2442 case MSR_VM_HSAVE_PA:
2443 case MSR_AMD64_PATCH_LOADER:
2444 case MSR_AMD64_BU_CFG2:
2445 case MSR_AMD64_DC_CFG:
2446 case MSR_F15H_EX_CFG:
2449 case MSR_IA32_UCODE_REV:
2450 if (msr_info->host_initiated)
2451 vcpu->arch.microcode_version = data;
2453 case MSR_IA32_ARCH_CAPABILITIES:
2454 if (!msr_info->host_initiated)
2456 vcpu->arch.arch_capabilities = data;
2459 return set_efer(vcpu, data);
2461 data &= ~(u64)0x40; /* ignore flush filter disable */
2462 data &= ~(u64)0x100; /* ignore ignne emulation enable */
2463 data &= ~(u64)0x8; /* ignore TLB cache disable */
2464 data &= ~(u64)0x40000; /* ignore Mc status write enable */
2466 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2471 case MSR_FAM10H_MMIO_CONF_BASE:
2473 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2478 case MSR_IA32_DEBUGCTLMSR:
2480 /* We support the non-activated case already */
2482 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2483 /* Values other than LBR and BTF are vendor-specific,
2484 thus reserved and should throw a #GP */
2487 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2490 case 0x200 ... 0x2ff:
2491 return kvm_mtrr_set_msr(vcpu, msr, data);
2492 case MSR_IA32_APICBASE:
2493 return kvm_set_apic_base(vcpu, msr_info);
2494 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2495 return kvm_x2apic_msr_write(vcpu, msr, data);
2496 case MSR_IA32_TSCDEADLINE:
2497 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2499 case MSR_IA32_TSC_ADJUST:
2500 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2501 if (!msr_info->host_initiated) {
2502 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2503 adjust_tsc_offset_guest(vcpu, adj);
2505 vcpu->arch.ia32_tsc_adjust_msr = data;
2508 case MSR_IA32_MISC_ENABLE:
2509 vcpu->arch.ia32_misc_enable_msr = data;
2511 case MSR_IA32_SMBASE:
2512 if (!msr_info->host_initiated)
2514 vcpu->arch.smbase = data;
2517 kvm_write_tsc(vcpu, msr_info);
2520 if (!msr_info->host_initiated)
2522 vcpu->arch.smi_count = data;
2524 case MSR_KVM_WALL_CLOCK_NEW:
2525 case MSR_KVM_WALL_CLOCK:
2526 vcpu->kvm->arch.wall_clock = data;
2527 kvm_write_wall_clock(vcpu->kvm, data);
2529 case MSR_KVM_SYSTEM_TIME_NEW:
2530 case MSR_KVM_SYSTEM_TIME: {
2531 struct kvm_arch *ka = &vcpu->kvm->arch;
2533 kvmclock_reset(vcpu);
2535 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2536 bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2538 if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2539 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2541 ka->boot_vcpu_runs_old_kvmclock = tmp;
2544 vcpu->arch.time = data;
2545 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2547 /* we verify if the enable bit is set... */
2551 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2552 &vcpu->arch.pv_time, data & ~1ULL,
2553 sizeof(struct pvclock_vcpu_time_info)))
2554 vcpu->arch.pv_time_enabled = false;
2556 vcpu->arch.pv_time_enabled = true;
2560 case MSR_KVM_ASYNC_PF_EN:
2561 if (kvm_pv_enable_async_pf(vcpu, data))
2564 case MSR_KVM_STEAL_TIME:
2566 if (unlikely(!sched_info_on()))
2569 if (data & KVM_STEAL_RESERVED_MASK)
2572 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2573 data & KVM_STEAL_VALID_BITS,
2574 sizeof(struct kvm_steal_time)))
2577 vcpu->arch.st.msr_val = data;
2579 if (!(data & KVM_MSR_ENABLED))
2582 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2585 case MSR_KVM_PV_EOI_EN:
2586 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2590 case MSR_IA32_MCG_CTL:
2591 case MSR_IA32_MCG_STATUS:
2592 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2593 return set_msr_mce(vcpu, msr_info);
2595 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2596 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2597 pr = true; /* fall through */
2598 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2599 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2600 if (kvm_pmu_is_valid_msr(vcpu, msr))
2601 return kvm_pmu_set_msr(vcpu, msr_info);
2603 if (pr || data != 0)
2604 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2605 "0x%x data 0x%llx\n", msr, data);
2607 case MSR_K7_CLK_CTL:
2609 * Ignore all writes to this no longer documented MSR.
2610 * Writes are only relevant for old K7 processors,
2611 * all pre-dating SVM, but a recommended workaround from
2612 * AMD for these chips. It is possible to specify the
2613 * affected processor models on the command line, hence
2614 * the need to ignore the workaround.
2617 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2618 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2619 case HV_X64_MSR_CRASH_CTL:
2620 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2621 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2622 case HV_X64_MSR_TSC_EMULATION_CONTROL:
2623 case HV_X64_MSR_TSC_EMULATION_STATUS:
2624 return kvm_hv_set_msr_common(vcpu, msr, data,
2625 msr_info->host_initiated);
2626 case MSR_IA32_BBL_CR_CTL3:
2627 /* Drop writes to this legacy MSR -- see rdmsr
2628 * counterpart for further detail.
2630 if (report_ignored_msrs)
2631 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2634 case MSR_AMD64_OSVW_ID_LENGTH:
2635 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2637 vcpu->arch.osvw.length = data;
2639 case MSR_AMD64_OSVW_STATUS:
2640 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2642 vcpu->arch.osvw.status = data;
2644 case MSR_PLATFORM_INFO:
2645 if (!msr_info->host_initiated ||
2646 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2647 cpuid_fault_enabled(vcpu)))
2649 vcpu->arch.msr_platform_info = data;
2651 case MSR_MISC_FEATURES_ENABLES:
2652 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2653 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2654 !supports_cpuid_fault(vcpu)))
2656 vcpu->arch.msr_misc_features_enables = data;
2659 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2660 return xen_hvm_config(vcpu, data);
2661 if (kvm_pmu_is_valid_msr(vcpu, msr))
2662 return kvm_pmu_set_msr(vcpu, msr_info);
2664 vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2668 if (report_ignored_msrs)
2670 "ignored wrmsr: 0x%x data 0x%llx\n",
2677 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2681 * Reads an msr value (of 'msr_index') into 'pdata'.
2682 * Returns 0 on success, non-0 otherwise.
2683 * Assumes vcpu_load() was already called.
2685 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2687 return kvm_x86_ops->get_msr(vcpu, msr);
2689 EXPORT_SYMBOL_GPL(kvm_get_msr);
2691 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2694 u64 mcg_cap = vcpu->arch.mcg_cap;
2695 unsigned bank_num = mcg_cap & 0xff;
2698 case MSR_IA32_P5_MC_ADDR:
2699 case MSR_IA32_P5_MC_TYPE:
2702 case MSR_IA32_MCG_CAP:
2703 data = vcpu->arch.mcg_cap;
2705 case MSR_IA32_MCG_CTL:
2706 if (!(mcg_cap & MCG_CTL_P) && !host)
2708 data = vcpu->arch.mcg_ctl;
2710 case MSR_IA32_MCG_STATUS:
2711 data = vcpu->arch.mcg_status;
2714 if (msr >= MSR_IA32_MC0_CTL &&
2715 msr < MSR_IA32_MCx_CTL(bank_num)) {
2716 u32 offset = msr - MSR_IA32_MC0_CTL;
2717 data = vcpu->arch.mce_banks[offset];
2726 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2728 switch (msr_info->index) {
2729 case MSR_IA32_PLATFORM_ID:
2730 case MSR_IA32_EBL_CR_POWERON:
2731 case MSR_IA32_DEBUGCTLMSR:
2732 case MSR_IA32_LASTBRANCHFROMIP:
2733 case MSR_IA32_LASTBRANCHTOIP:
2734 case MSR_IA32_LASTINTFROMIP:
2735 case MSR_IA32_LASTINTTOIP:
2737 case MSR_K8_TSEG_ADDR:
2738 case MSR_K8_TSEG_MASK:
2740 case MSR_VM_HSAVE_PA:
2741 case MSR_K8_INT_PENDING_MSG:
2742 case MSR_AMD64_NB_CFG:
2743 case MSR_FAM10H_MMIO_CONF_BASE:
2744 case MSR_AMD64_BU_CFG2:
2745 case MSR_IA32_PERF_CTL:
2746 case MSR_AMD64_DC_CFG:
2747 case MSR_F15H_EX_CFG:
2750 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2751 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2752 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2753 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2754 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2755 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2756 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2759 case MSR_IA32_UCODE_REV:
2760 msr_info->data = vcpu->arch.microcode_version;
2762 case MSR_IA32_ARCH_CAPABILITIES:
2763 if (!msr_info->host_initiated &&
2764 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2766 msr_info->data = vcpu->arch.arch_capabilities;
2769 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2772 case 0x200 ... 0x2ff:
2773 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2774 case 0xcd: /* fsb frequency */
2778 * MSR_EBC_FREQUENCY_ID
2779 * Conservative value valid for even the basic CPU models.
2780 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2781 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2782 * and 266MHz for model 3, or 4. Set Core Clock
2783 * Frequency to System Bus Frequency Ratio to 1 (bits
2784 * 31:24) even though these are only valid for CPU
2785 * models > 2, however guests may end up dividing or
2786 * multiplying by zero otherwise.
2788 case MSR_EBC_FREQUENCY_ID:
2789 msr_info->data = 1 << 24;
2791 case MSR_IA32_APICBASE:
2792 msr_info->data = kvm_get_apic_base(vcpu);
2794 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2795 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2797 case MSR_IA32_TSCDEADLINE:
2798 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2800 case MSR_IA32_TSC_ADJUST:
2801 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2803 case MSR_IA32_MISC_ENABLE:
2804 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2806 case MSR_IA32_SMBASE:
2807 if (!msr_info->host_initiated)
2809 msr_info->data = vcpu->arch.smbase;
2812 msr_info->data = vcpu->arch.smi_count;
2814 case MSR_IA32_PERF_STATUS:
2815 /* TSC increment by tick */
2816 msr_info->data = 1000ULL;
2817 /* CPU multiplier */
2818 msr_info->data |= (((uint64_t)4ULL) << 40);
2821 msr_info->data = vcpu->arch.efer;
2823 case MSR_KVM_WALL_CLOCK:
2824 case MSR_KVM_WALL_CLOCK_NEW:
2825 msr_info->data = vcpu->kvm->arch.wall_clock;
2827 case MSR_KVM_SYSTEM_TIME:
2828 case MSR_KVM_SYSTEM_TIME_NEW:
2829 msr_info->data = vcpu->arch.time;
2831 case MSR_KVM_ASYNC_PF_EN:
2832 msr_info->data = vcpu->arch.apf.msr_val;
2834 case MSR_KVM_STEAL_TIME:
2835 msr_info->data = vcpu->arch.st.msr_val;
2837 case MSR_KVM_PV_EOI_EN:
2838 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2840 case MSR_IA32_P5_MC_ADDR:
2841 case MSR_IA32_P5_MC_TYPE:
2842 case MSR_IA32_MCG_CAP:
2843 case MSR_IA32_MCG_CTL:
2844 case MSR_IA32_MCG_STATUS:
2845 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2846 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2847 msr_info->host_initiated);
2848 case MSR_K7_CLK_CTL:
2850 * Provide expected ramp-up count for K7. All other
2851 * are set to zero, indicating minimum divisors for
2854 * This prevents guest kernels on AMD host with CPU
2855 * type 6, model 8 and higher from exploding due to
2856 * the rdmsr failing.
2858 msr_info->data = 0x20000000;
2860 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2861 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2862 case HV_X64_MSR_CRASH_CTL:
2863 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2864 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2865 case HV_X64_MSR_TSC_EMULATION_CONTROL:
2866 case HV_X64_MSR_TSC_EMULATION_STATUS:
2867 return kvm_hv_get_msr_common(vcpu,
2868 msr_info->index, &msr_info->data,
2869 msr_info->host_initiated);
2871 case MSR_IA32_BBL_CR_CTL3:
2872 /* This legacy MSR exists but isn't fully documented in current
2873 * silicon. It is however accessed by winxp in very narrow
2874 * scenarios where it sets bit #19, itself documented as
2875 * a "reserved" bit. Best effort attempt to source coherent
2876 * read data here should the balance of the register be
2877 * interpreted by the guest:
2879 * L2 cache control register 3: 64GB range, 256KB size,
2880 * enabled, latency 0x1, configured
2882 msr_info->data = 0xbe702111;
2884 case MSR_AMD64_OSVW_ID_LENGTH:
2885 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2887 msr_info->data = vcpu->arch.osvw.length;
2889 case MSR_AMD64_OSVW_STATUS:
2890 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2892 msr_info->data = vcpu->arch.osvw.status;
2894 case MSR_PLATFORM_INFO:
2895 if (!msr_info->host_initiated &&
2896 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
2898 msr_info->data = vcpu->arch.msr_platform_info;
2900 case MSR_MISC_FEATURES_ENABLES:
2901 msr_info->data = vcpu->arch.msr_misc_features_enables;
2904 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2905 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2907 vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2911 if (report_ignored_msrs)
2912 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2920 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2923 * Read or write a bunch of msrs. All parameters are kernel addresses.
2925 * @return number of msrs set successfully.
2927 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2928 struct kvm_msr_entry *entries,
2929 int (*do_msr)(struct kvm_vcpu *vcpu,
2930 unsigned index, u64 *data))
2934 for (i = 0; i < msrs->nmsrs; ++i)
2935 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2942 * Read or write a bunch of msrs. Parameters are user addresses.
2944 * @return number of msrs set successfully.
2946 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2947 int (*do_msr)(struct kvm_vcpu *vcpu,
2948 unsigned index, u64 *data),
2951 struct kvm_msrs msrs;
2952 struct kvm_msr_entry *entries;
2957 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
2961 if (msrs.nmsrs >= MAX_IO_MSRS)
2964 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2965 entries = memdup_user(user_msrs->entries, size);
2966 if (IS_ERR(entries)) {
2967 r = PTR_ERR(entries);
2971 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2976 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2987 static inline bool kvm_can_mwait_in_guest(void)
2989 return boot_cpu_has(X86_FEATURE_MWAIT) &&
2990 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
2991 boot_cpu_has(X86_FEATURE_ARAT);
2994 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2999 case KVM_CAP_IRQCHIP:
3001 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3002 case KVM_CAP_SET_TSS_ADDR:
3003 case KVM_CAP_EXT_CPUID:
3004 case KVM_CAP_EXT_EMUL_CPUID:
3005 case KVM_CAP_CLOCKSOURCE:
3007 case KVM_CAP_NOP_IO_DELAY:
3008 case KVM_CAP_MP_STATE:
3009 case KVM_CAP_SYNC_MMU:
3010 case KVM_CAP_USER_NMI:
3011 case KVM_CAP_REINJECT_CONTROL:
3012 case KVM_CAP_IRQ_INJECT_STATUS:
3013 case KVM_CAP_IOEVENTFD:
3014 case KVM_CAP_IOEVENTFD_NO_LENGTH:
3016 case KVM_CAP_PIT_STATE2:
3017 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3018 case KVM_CAP_XEN_HVM:
3019 case KVM_CAP_VCPU_EVENTS:
3020 case KVM_CAP_HYPERV:
3021 case KVM_CAP_HYPERV_VAPIC:
3022 case KVM_CAP_HYPERV_SPIN:
3023 case KVM_CAP_HYPERV_SYNIC:
3024 case KVM_CAP_HYPERV_SYNIC2:
3025 case KVM_CAP_HYPERV_VP_INDEX:
3026 case KVM_CAP_HYPERV_EVENTFD:
3027 case KVM_CAP_HYPERV_TLBFLUSH:
3028 case KVM_CAP_HYPERV_SEND_IPI:
3029 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3030 case KVM_CAP_HYPERV_CPUID:
3031 case KVM_CAP_PCI_SEGMENT:
3032 case KVM_CAP_DEBUGREGS:
3033 case KVM_CAP_X86_ROBUST_SINGLESTEP:
3035 case KVM_CAP_ASYNC_PF:
3036 case KVM_CAP_GET_TSC_KHZ:
3037 case KVM_CAP_KVMCLOCK_CTRL:
3038 case KVM_CAP_READONLY_MEM:
3039 case KVM_CAP_HYPERV_TIME:
3040 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3041 case KVM_CAP_TSC_DEADLINE_TIMER:
3042 case KVM_CAP_DISABLE_QUIRKS:
3043 case KVM_CAP_SET_BOOT_CPU_ID:
3044 case KVM_CAP_SPLIT_IRQCHIP:
3045 case KVM_CAP_IMMEDIATE_EXIT:
3046 case KVM_CAP_GET_MSR_FEATURES:
3047 case KVM_CAP_MSR_PLATFORM_INFO:
3048 case KVM_CAP_EXCEPTION_PAYLOAD:
3051 case KVM_CAP_SYNC_REGS:
3052 r = KVM_SYNC_X86_VALID_FIELDS;
3054 case KVM_CAP_ADJUST_CLOCK:
3055 r = KVM_CLOCK_TSC_STABLE;
3057 case KVM_CAP_X86_DISABLE_EXITS:
3058 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE;
3059 if(kvm_can_mwait_in_guest())
3060 r |= KVM_X86_DISABLE_EXITS_MWAIT;
3062 case KVM_CAP_X86_SMM:
3063 /* SMBASE is usually relocated above 1M on modern chipsets,
3064 * and SMM handlers might indeed rely on 4G segment limits,
3065 * so do not report SMM to be available if real mode is
3066 * emulated via vm86 mode. Still, do not go to great lengths
3067 * to avoid userspace's usage of the feature, because it is a
3068 * fringe case that is not enabled except via specific settings
3069 * of the module parameters.
3071 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3074 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3076 case KVM_CAP_NR_VCPUS:
3077 r = KVM_SOFT_MAX_VCPUS;
3079 case KVM_CAP_MAX_VCPUS:
3082 case KVM_CAP_NR_MEMSLOTS:
3083 r = KVM_USER_MEM_SLOTS;
3085 case KVM_CAP_PV_MMU: /* obsolete */
3089 r = KVM_MAX_MCE_BANKS;
3092 r = boot_cpu_has(X86_FEATURE_XSAVE);
3094 case KVM_CAP_TSC_CONTROL:
3095 r = kvm_has_tsc_control;
3097 case KVM_CAP_X2APIC_API:
3098 r = KVM_X2APIC_API_VALID_FLAGS;
3100 case KVM_CAP_NESTED_STATE:
3101 r = kvm_x86_ops->get_nested_state ?
3102 kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3111 long kvm_arch_dev_ioctl(struct file *filp,
3112 unsigned int ioctl, unsigned long arg)
3114 void __user *argp = (void __user *)arg;
3118 case KVM_GET_MSR_INDEX_LIST: {
3119 struct kvm_msr_list __user *user_msr_list = argp;
3120 struct kvm_msr_list msr_list;
3124 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3127 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3128 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3131 if (n < msr_list.nmsrs)
3134 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3135 num_msrs_to_save * sizeof(u32)))
3137 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3139 num_emulated_msrs * sizeof(u32)))
3144 case KVM_GET_SUPPORTED_CPUID:
3145 case KVM_GET_EMULATED_CPUID: {
3146 struct kvm_cpuid2 __user *cpuid_arg = argp;
3147 struct kvm_cpuid2 cpuid;
3150 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3153 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3159 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3164 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3166 if (copy_to_user(argp, &kvm_mce_cap_supported,
3167 sizeof(kvm_mce_cap_supported)))
3171 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3172 struct kvm_msr_list __user *user_msr_list = argp;
3173 struct kvm_msr_list msr_list;
3177 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3180 msr_list.nmsrs = num_msr_based_features;
3181 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3184 if (n < msr_list.nmsrs)
3187 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3188 num_msr_based_features * sizeof(u32)))
3194 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3204 static void wbinvd_ipi(void *garbage)
3209 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3211 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3214 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3216 /* Address WBINVD may be executed by guest */
3217 if (need_emulate_wbinvd(vcpu)) {
3218 if (kvm_x86_ops->has_wbinvd_exit())
3219 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3220 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3221 smp_call_function_single(vcpu->cpu,
3222 wbinvd_ipi, NULL, 1);
3225 kvm_x86_ops->vcpu_load(vcpu, cpu);
3227 /* Apply any externally detected TSC adjustments (due to suspend) */
3228 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3229 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3230 vcpu->arch.tsc_offset_adjustment = 0;
3231 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3234 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3235 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3236 rdtsc() - vcpu->arch.last_host_tsc;
3238 mark_tsc_unstable("KVM discovered backwards TSC");
3240 if (kvm_check_tsc_unstable()) {
3241 u64 offset = kvm_compute_tsc_offset(vcpu,
3242 vcpu->arch.last_guest_tsc);
3243 kvm_vcpu_write_tsc_offset(vcpu, offset);
3244 vcpu->arch.tsc_catchup = 1;
3247 if (kvm_lapic_hv_timer_in_use(vcpu))
3248 kvm_lapic_restart_hv_timer(vcpu);
3251 * On a host with synchronized TSC, there is no need to update
3252 * kvmclock on vcpu->cpu migration
3254 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3255 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3256 if (vcpu->cpu != cpu)
3257 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3261 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3264 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3266 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3269 vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3271 kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3272 &vcpu->arch.st.steal.preempted,
3273 offsetof(struct kvm_steal_time, preempted),
3274 sizeof(vcpu->arch.st.steal.preempted));
3277 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3281 if (vcpu->preempted)
3282 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3285 * Disable page faults because we're in atomic context here.
3286 * kvm_write_guest_offset_cached() would call might_fault()
3287 * that relies on pagefault_disable() to tell if there's a
3288 * bug. NOTE: the write to guest memory may not go through if
3289 * during postcopy live migration or if there's heavy guest
3292 pagefault_disable();
3294 * kvm_memslots() will be called by
3295 * kvm_write_guest_offset_cached() so take the srcu lock.
3297 idx = srcu_read_lock(&vcpu->kvm->srcu);
3298 kvm_steal_time_set_preempted(vcpu);
3299 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3301 kvm_x86_ops->vcpu_put(vcpu);
3302 vcpu->arch.last_host_tsc = rdtsc();
3304 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3305 * on every vmexit, but if not, we might have a stale dr6 from the
3306 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3311 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3312 struct kvm_lapic_state *s)
3314 if (vcpu->arch.apicv_active)
3315 kvm_x86_ops->sync_pir_to_irr(vcpu);
3317 return kvm_apic_get_state(vcpu, s);
3320 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3321 struct kvm_lapic_state *s)
3325 r = kvm_apic_set_state(vcpu, s);
3328 update_cr8_intercept(vcpu);
3333 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3335 return (!lapic_in_kernel(vcpu) ||
3336 kvm_apic_accept_pic_intr(vcpu));
3340 * if userspace requested an interrupt window, check that the
3341 * interrupt window is open.
3343 * No need to exit to userspace if we already have an interrupt queued.
3345 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3347 return kvm_arch_interrupt_allowed(vcpu) &&
3348 !kvm_cpu_has_interrupt(vcpu) &&
3349 !kvm_event_needs_reinjection(vcpu) &&
3350 kvm_cpu_accept_dm_intr(vcpu);
3353 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3354 struct kvm_interrupt *irq)
3356 if (irq->irq >= KVM_NR_INTERRUPTS)
3359 if (!irqchip_in_kernel(vcpu->kvm)) {
3360 kvm_queue_interrupt(vcpu, irq->irq, false);
3361 kvm_make_request(KVM_REQ_EVENT, vcpu);
3366 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3367 * fail for in-kernel 8259.
3369 if (pic_in_kernel(vcpu->kvm))
3372 if (vcpu->arch.pending_external_vector != -1)
3375 vcpu->arch.pending_external_vector = irq->irq;
3376 kvm_make_request(KVM_REQ_EVENT, vcpu);
3380 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3382 kvm_inject_nmi(vcpu);
3387 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3389 kvm_make_request(KVM_REQ_SMI, vcpu);
3394 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3395 struct kvm_tpr_access_ctl *tac)
3399 vcpu->arch.tpr_access_reporting = !!tac->enabled;
3403 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3407 unsigned bank_num = mcg_cap & 0xff, bank;
3410 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3412 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3415 vcpu->arch.mcg_cap = mcg_cap;
3416 /* Init IA32_MCG_CTL to all 1s */
3417 if (mcg_cap & MCG_CTL_P)
3418 vcpu->arch.mcg_ctl = ~(u64)0;
3419 /* Init IA32_MCi_CTL to all 1s */
3420 for (bank = 0; bank < bank_num; bank++)
3421 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3423 if (kvm_x86_ops->setup_mce)
3424 kvm_x86_ops->setup_mce(vcpu);
3429 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3430 struct kvm_x86_mce *mce)
3432 u64 mcg_cap = vcpu->arch.mcg_cap;
3433 unsigned bank_num = mcg_cap & 0xff;
3434 u64 *banks = vcpu->arch.mce_banks;
3436 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3439 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3440 * reporting is disabled
3442 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3443 vcpu->arch.mcg_ctl != ~(u64)0)
3445 banks += 4 * mce->bank;
3447 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3448 * reporting is disabled for the bank
3450 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3452 if (mce->status & MCI_STATUS_UC) {
3453 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3454 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3455 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3458 if (banks[1] & MCI_STATUS_VAL)
3459 mce->status |= MCI_STATUS_OVER;
3460 banks[2] = mce->addr;
3461 banks[3] = mce->misc;
3462 vcpu->arch.mcg_status = mce->mcg_status;
3463 banks[1] = mce->status;
3464 kvm_queue_exception(vcpu, MC_VECTOR);
3465 } else if (!(banks[1] & MCI_STATUS_VAL)
3466 || !(banks[1] & MCI_STATUS_UC)) {
3467 if (banks[1] & MCI_STATUS_VAL)
3468 mce->status |= MCI_STATUS_OVER;
3469 banks[2] = mce->addr;
3470 banks[3] = mce->misc;
3471 banks[1] = mce->status;
3473 banks[1] |= MCI_STATUS_OVER;
3477 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3478 struct kvm_vcpu_events *events)
3483 * The API doesn't provide the instruction length for software
3484 * exceptions, so don't report them. As long as the guest RIP
3485 * isn't advanced, we should expect to encounter the exception
3488 if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3489 events->exception.injected = 0;
3490 events->exception.pending = 0;
3492 events->exception.injected = vcpu->arch.exception.injected;
3493 events->exception.pending = vcpu->arch.exception.pending;
3495 * For ABI compatibility, deliberately conflate
3496 * pending and injected exceptions when
3497 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3499 if (!vcpu->kvm->arch.exception_payload_enabled)
3500 events->exception.injected |=
3501 vcpu->arch.exception.pending;
3503 events->exception.nr = vcpu->arch.exception.nr;
3504 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3505 events->exception.error_code = vcpu->arch.exception.error_code;
3506 events->exception_has_payload = vcpu->arch.exception.has_payload;
3507 events->exception_payload = vcpu->arch.exception.payload;
3509 events->interrupt.injected =
3510 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3511 events->interrupt.nr = vcpu->arch.interrupt.nr;
3512 events->interrupt.soft = 0;
3513 events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3515 events->nmi.injected = vcpu->arch.nmi_injected;
3516 events->nmi.pending = vcpu->arch.nmi_pending != 0;
3517 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3518 events->nmi.pad = 0;
3520 events->sipi_vector = 0; /* never valid when reporting to user space */
3522 events->smi.smm = is_smm(vcpu);
3523 events->smi.pending = vcpu->arch.smi_pending;
3524 events->smi.smm_inside_nmi =
3525 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3526 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3528 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3529 | KVM_VCPUEVENT_VALID_SHADOW
3530 | KVM_VCPUEVENT_VALID_SMM);
3531 if (vcpu->kvm->arch.exception_payload_enabled)
3532 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3534 memset(&events->reserved, 0, sizeof(events->reserved));
3537 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3539 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3540 struct kvm_vcpu_events *events)
3542 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3543 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3544 | KVM_VCPUEVENT_VALID_SHADOW
3545 | KVM_VCPUEVENT_VALID_SMM
3546 | KVM_VCPUEVENT_VALID_PAYLOAD))
3549 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3550 if (!vcpu->kvm->arch.exception_payload_enabled)
3552 if (events->exception.pending)
3553 events->exception.injected = 0;
3555 events->exception_has_payload = 0;
3557 events->exception.pending = 0;
3558 events->exception_has_payload = 0;
3561 if ((events->exception.injected || events->exception.pending) &&
3562 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3565 /* INITs are latched while in SMM */
3566 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3567 (events->smi.smm || events->smi.pending) &&
3568 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3572 vcpu->arch.exception.injected = events->exception.injected;
3573 vcpu->arch.exception.pending = events->exception.pending;
3574 vcpu->arch.exception.nr = events->exception.nr;
3575 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3576 vcpu->arch.exception.error_code = events->exception.error_code;
3577 vcpu->arch.exception.has_payload = events->exception_has_payload;
3578 vcpu->arch.exception.payload = events->exception_payload;
3580 vcpu->arch.interrupt.injected = events->interrupt.injected;
3581 vcpu->arch.interrupt.nr = events->interrupt.nr;
3582 vcpu->arch.interrupt.soft = events->interrupt.soft;
3583 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3584 kvm_x86_ops->set_interrupt_shadow(vcpu,
3585 events->interrupt.shadow);
3587 vcpu->arch.nmi_injected = events->nmi.injected;
3588 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3589 vcpu->arch.nmi_pending = events->nmi.pending;
3590 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3592 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3593 lapic_in_kernel(vcpu))
3594 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3596 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3597 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3598 if (events->smi.smm)
3599 vcpu->arch.hflags |= HF_SMM_MASK;
3601 vcpu->arch.hflags &= ~HF_SMM_MASK;
3602 kvm_smm_changed(vcpu);
3605 vcpu->arch.smi_pending = events->smi.pending;
3607 if (events->smi.smm) {
3608 if (events->smi.smm_inside_nmi)
3609 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3611 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3612 if (lapic_in_kernel(vcpu)) {
3613 if (events->smi.latched_init)
3614 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3616 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3621 kvm_make_request(KVM_REQ_EVENT, vcpu);
3626 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3627 struct kvm_debugregs *dbgregs)
3631 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3632 kvm_get_dr(vcpu, 6, &val);
3634 dbgregs->dr7 = vcpu->arch.dr7;
3636 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3639 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3640 struct kvm_debugregs *dbgregs)
3645 if (dbgregs->dr6 & ~0xffffffffull)
3647 if (dbgregs->dr7 & ~0xffffffffull)
3650 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3651 kvm_update_dr0123(vcpu);
3652 vcpu->arch.dr6 = dbgregs->dr6;
3653 kvm_update_dr6(vcpu);
3654 vcpu->arch.dr7 = dbgregs->dr7;
3655 kvm_update_dr7(vcpu);
3660 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3662 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3664 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3665 u64 xstate_bv = xsave->header.xfeatures;
3669 * Copy legacy XSAVE area, to avoid complications with CPUID
3670 * leaves 0 and 1 in the loop below.
3672 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3675 xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3676 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3679 * Copy each region from the possibly compacted offset to the
3680 * non-compacted offset.
3682 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3684 u64 xfeature_mask = valid & -valid;
3685 int xfeature_nr = fls64(xfeature_mask) - 1;
3686 void *src = get_xsave_addr(xsave, xfeature_nr);
3689 u32 size, offset, ecx, edx;
3690 cpuid_count(XSTATE_CPUID, xfeature_nr,
3691 &size, &offset, &ecx, &edx);
3692 if (xfeature_nr == XFEATURE_PKRU)
3693 memcpy(dest + offset, &vcpu->arch.pkru,
3694 sizeof(vcpu->arch.pkru));
3696 memcpy(dest + offset, src, size);
3700 valid -= xfeature_mask;
3704 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3706 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3707 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3711 * Copy legacy XSAVE area, to avoid complications with CPUID
3712 * leaves 0 and 1 in the loop below.
3714 memcpy(xsave, src, XSAVE_HDR_OFFSET);
3716 /* Set XSTATE_BV and possibly XCOMP_BV. */
3717 xsave->header.xfeatures = xstate_bv;
3718 if (boot_cpu_has(X86_FEATURE_XSAVES))
3719 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3722 * Copy each region from the non-compacted offset to the
3723 * possibly compacted offset.
3725 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3727 u64 xfeature_mask = valid & -valid;
3728 int xfeature_nr = fls64(xfeature_mask) - 1;
3729 void *dest = get_xsave_addr(xsave, xfeature_nr);
3732 u32 size, offset, ecx, edx;
3733 cpuid_count(XSTATE_CPUID, xfeature_nr,
3734 &size, &offset, &ecx, &edx);
3735 if (xfeature_nr == XFEATURE_PKRU)
3736 memcpy(&vcpu->arch.pkru, src + offset,
3737 sizeof(vcpu->arch.pkru));
3739 memcpy(dest, src + offset, size);
3742 valid -= xfeature_mask;
3746 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3747 struct kvm_xsave *guest_xsave)
3749 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3750 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3751 fill_xsave((u8 *) guest_xsave->region, vcpu);
3753 memcpy(guest_xsave->region,
3754 &vcpu->arch.guest_fpu->state.fxsave,
3755 sizeof(struct fxregs_state));
3756 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3757 XFEATURE_MASK_FPSSE;
3761 #define XSAVE_MXCSR_OFFSET 24
3763 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3764 struct kvm_xsave *guest_xsave)
3767 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3768 u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3770 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3772 * Here we allow setting states that are not present in
3773 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3774 * with old userspace.
3776 if (xstate_bv & ~kvm_supported_xcr0() ||
3777 mxcsr & ~mxcsr_feature_mask)
3779 load_xsave(vcpu, (u8 *)guest_xsave->region);
3781 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3782 mxcsr & ~mxcsr_feature_mask)
3784 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3785 guest_xsave->region, sizeof(struct fxregs_state));
3790 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3791 struct kvm_xcrs *guest_xcrs)
3793 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3794 guest_xcrs->nr_xcrs = 0;
3798 guest_xcrs->nr_xcrs = 1;
3799 guest_xcrs->flags = 0;
3800 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3801 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3804 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3805 struct kvm_xcrs *guest_xcrs)
3809 if (!boot_cpu_has(X86_FEATURE_XSAVE))
3812 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3815 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3816 /* Only support XCR0 currently */
3817 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3818 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3819 guest_xcrs->xcrs[i].value);
3828 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3829 * stopped by the hypervisor. This function will be called from the host only.
3830 * EINVAL is returned when the host attempts to set the flag for a guest that
3831 * does not support pv clocks.
3833 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3835 if (!vcpu->arch.pv_time_enabled)
3837 vcpu->arch.pvclock_set_guest_stopped_request = true;
3838 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3842 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3843 struct kvm_enable_cap *cap)
3846 uint16_t vmcs_version;
3847 void __user *user_ptr;
3853 case KVM_CAP_HYPERV_SYNIC2:
3858 case KVM_CAP_HYPERV_SYNIC:
3859 if (!irqchip_in_kernel(vcpu->kvm))
3861 return kvm_hv_activate_synic(vcpu, cap->cap ==
3862 KVM_CAP_HYPERV_SYNIC2);
3863 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3864 if (!kvm_x86_ops->nested_enable_evmcs)
3866 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
3868 user_ptr = (void __user *)(uintptr_t)cap->args[0];
3869 if (copy_to_user(user_ptr, &vmcs_version,
3870 sizeof(vmcs_version)))
3880 long kvm_arch_vcpu_ioctl(struct file *filp,
3881 unsigned int ioctl, unsigned long arg)
3883 struct kvm_vcpu *vcpu = filp->private_data;
3884 void __user *argp = (void __user *)arg;
3887 struct kvm_lapic_state *lapic;
3888 struct kvm_xsave *xsave;
3889 struct kvm_xcrs *xcrs;
3897 case KVM_GET_LAPIC: {
3899 if (!lapic_in_kernel(vcpu))
3901 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
3902 GFP_KERNEL_ACCOUNT);
3907 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3911 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3916 case KVM_SET_LAPIC: {
3918 if (!lapic_in_kernel(vcpu))
3920 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3921 if (IS_ERR(u.lapic)) {
3922 r = PTR_ERR(u.lapic);
3926 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3929 case KVM_INTERRUPT: {
3930 struct kvm_interrupt irq;
3933 if (copy_from_user(&irq, argp, sizeof(irq)))
3935 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3939 r = kvm_vcpu_ioctl_nmi(vcpu);
3943 r = kvm_vcpu_ioctl_smi(vcpu);
3946 case KVM_SET_CPUID: {
3947 struct kvm_cpuid __user *cpuid_arg = argp;
3948 struct kvm_cpuid cpuid;
3951 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3953 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3956 case KVM_SET_CPUID2: {
3957 struct kvm_cpuid2 __user *cpuid_arg = argp;
3958 struct kvm_cpuid2 cpuid;
3961 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3963 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3964 cpuid_arg->entries);
3967 case KVM_GET_CPUID2: {
3968 struct kvm_cpuid2 __user *cpuid_arg = argp;
3969 struct kvm_cpuid2 cpuid;
3972 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3974 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3975 cpuid_arg->entries);
3979 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3984 case KVM_GET_MSRS: {
3985 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3986 r = msr_io(vcpu, argp, do_get_msr, 1);
3987 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3990 case KVM_SET_MSRS: {
3991 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3992 r = msr_io(vcpu, argp, do_set_msr, 0);
3993 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3996 case KVM_TPR_ACCESS_REPORTING: {
3997 struct kvm_tpr_access_ctl tac;
4000 if (copy_from_user(&tac, argp, sizeof(tac)))
4002 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4006 if (copy_to_user(argp, &tac, sizeof(tac)))
4011 case KVM_SET_VAPIC_ADDR: {
4012 struct kvm_vapic_addr va;
4016 if (!lapic_in_kernel(vcpu))
4019 if (copy_from_user(&va, argp, sizeof(va)))
4021 idx = srcu_read_lock(&vcpu->kvm->srcu);
4022 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4023 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4026 case KVM_X86_SETUP_MCE: {
4030 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4032 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4035 case KVM_X86_SET_MCE: {
4036 struct kvm_x86_mce mce;
4039 if (copy_from_user(&mce, argp, sizeof(mce)))
4041 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4044 case KVM_GET_VCPU_EVENTS: {
4045 struct kvm_vcpu_events events;
4047 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4050 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4055 case KVM_SET_VCPU_EVENTS: {
4056 struct kvm_vcpu_events events;
4059 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4062 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4065 case KVM_GET_DEBUGREGS: {
4066 struct kvm_debugregs dbgregs;
4068 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4071 if (copy_to_user(argp, &dbgregs,
4072 sizeof(struct kvm_debugregs)))
4077 case KVM_SET_DEBUGREGS: {
4078 struct kvm_debugregs dbgregs;
4081 if (copy_from_user(&dbgregs, argp,
4082 sizeof(struct kvm_debugregs)))
4085 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4088 case KVM_GET_XSAVE: {
4089 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4094 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4097 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4102 case KVM_SET_XSAVE: {
4103 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4104 if (IS_ERR(u.xsave)) {
4105 r = PTR_ERR(u.xsave);
4109 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4112 case KVM_GET_XCRS: {
4113 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4118 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4121 if (copy_to_user(argp, u.xcrs,
4122 sizeof(struct kvm_xcrs)))
4127 case KVM_SET_XCRS: {
4128 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4129 if (IS_ERR(u.xcrs)) {
4130 r = PTR_ERR(u.xcrs);
4134 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4137 case KVM_SET_TSC_KHZ: {
4141 user_tsc_khz = (u32)arg;
4143 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4146 if (user_tsc_khz == 0)
4147 user_tsc_khz = tsc_khz;
4149 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4154 case KVM_GET_TSC_KHZ: {
4155 r = vcpu->arch.virtual_tsc_khz;
4158 case KVM_KVMCLOCK_CTRL: {
4159 r = kvm_set_guest_paused(vcpu);
4162 case KVM_ENABLE_CAP: {
4163 struct kvm_enable_cap cap;
4166 if (copy_from_user(&cap, argp, sizeof(cap)))
4168 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4171 case KVM_GET_NESTED_STATE: {
4172 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4176 if (!kvm_x86_ops->get_nested_state)
4179 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4181 if (get_user(user_data_size, &user_kvm_nested_state->size))
4184 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4189 if (r > user_data_size) {
4190 if (put_user(r, &user_kvm_nested_state->size))
4200 case KVM_SET_NESTED_STATE: {
4201 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4202 struct kvm_nested_state kvm_state;
4205 if (!kvm_x86_ops->set_nested_state)
4209 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4213 if (kvm_state.size < sizeof(kvm_state))
4216 if (kvm_state.flags &
4217 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4218 | KVM_STATE_NESTED_EVMCS))
4221 /* nested_run_pending implies guest_mode. */
4222 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4223 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4226 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4229 case KVM_GET_SUPPORTED_HV_CPUID: {
4230 struct kvm_cpuid2 __user *cpuid_arg = argp;
4231 struct kvm_cpuid2 cpuid;
4234 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4237 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4238 cpuid_arg->entries);
4243 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4258 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4260 return VM_FAULT_SIGBUS;
4263 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4267 if (addr > (unsigned int)(-3 * PAGE_SIZE))
4269 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4273 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4276 return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4279 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4280 unsigned long kvm_nr_mmu_pages)
4282 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4285 mutex_lock(&kvm->slots_lock);
4287 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4288 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4290 mutex_unlock(&kvm->slots_lock);
4294 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4296 return kvm->arch.n_max_mmu_pages;
4299 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4301 struct kvm_pic *pic = kvm->arch.vpic;
4305 switch (chip->chip_id) {
4306 case KVM_IRQCHIP_PIC_MASTER:
4307 memcpy(&chip->chip.pic, &pic->pics[0],
4308 sizeof(struct kvm_pic_state));
4310 case KVM_IRQCHIP_PIC_SLAVE:
4311 memcpy(&chip->chip.pic, &pic->pics[1],
4312 sizeof(struct kvm_pic_state));
4314 case KVM_IRQCHIP_IOAPIC:
4315 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4324 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4326 struct kvm_pic *pic = kvm->arch.vpic;
4330 switch (chip->chip_id) {
4331 case KVM_IRQCHIP_PIC_MASTER:
4332 spin_lock(&pic->lock);
4333 memcpy(&pic->pics[0], &chip->chip.pic,
4334 sizeof(struct kvm_pic_state));
4335 spin_unlock(&pic->lock);
4337 case KVM_IRQCHIP_PIC_SLAVE:
4338 spin_lock(&pic->lock);
4339 memcpy(&pic->pics[1], &chip->chip.pic,
4340 sizeof(struct kvm_pic_state));
4341 spin_unlock(&pic->lock);
4343 case KVM_IRQCHIP_IOAPIC:
4344 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4350 kvm_pic_update_irq(pic);
4354 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4356 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4358 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4360 mutex_lock(&kps->lock);
4361 memcpy(ps, &kps->channels, sizeof(*ps));
4362 mutex_unlock(&kps->lock);
4366 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4369 struct kvm_pit *pit = kvm->arch.vpit;
4371 mutex_lock(&pit->pit_state.lock);
4372 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4373 for (i = 0; i < 3; i++)
4374 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4375 mutex_unlock(&pit->pit_state.lock);
4379 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4381 mutex_lock(&kvm->arch.vpit->pit_state.lock);
4382 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4383 sizeof(ps->channels));
4384 ps->flags = kvm->arch.vpit->pit_state.flags;
4385 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4386 memset(&ps->reserved, 0, sizeof(ps->reserved));
4390 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4394 u32 prev_legacy, cur_legacy;
4395 struct kvm_pit *pit = kvm->arch.vpit;
4397 mutex_lock(&pit->pit_state.lock);
4398 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4399 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4400 if (!prev_legacy && cur_legacy)
4402 memcpy(&pit->pit_state.channels, &ps->channels,
4403 sizeof(pit->pit_state.channels));
4404 pit->pit_state.flags = ps->flags;
4405 for (i = 0; i < 3; i++)
4406 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4408 mutex_unlock(&pit->pit_state.lock);
4412 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4413 struct kvm_reinject_control *control)
4415 struct kvm_pit *pit = kvm->arch.vpit;
4420 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4421 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4422 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4424 mutex_lock(&pit->pit_state.lock);
4425 kvm_pit_set_reinject(pit, control->pit_reinject);
4426 mutex_unlock(&pit->pit_state.lock);
4432 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4433 * @kvm: kvm instance
4434 * @log: slot id and address to which we copy the log
4436 * Steps 1-4 below provide general overview of dirty page logging. See
4437 * kvm_get_dirty_log_protect() function description for additional details.
4439 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4440 * always flush the TLB (step 4) even if previous step failed and the dirty
4441 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4442 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4443 * writes will be marked dirty for next log read.
4445 * 1. Take a snapshot of the bit and clear it if needed.
4446 * 2. Write protect the corresponding page.
4447 * 3. Copy the snapshot to the userspace.
4448 * 4. Flush TLB's if needed.
4450 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4455 mutex_lock(&kvm->slots_lock);
4458 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4460 if (kvm_x86_ops->flush_log_dirty)
4461 kvm_x86_ops->flush_log_dirty(kvm);
4463 r = kvm_get_dirty_log_protect(kvm, log, &flush);
4466 * All the TLBs can be flushed out of mmu lock, see the comments in
4467 * kvm_mmu_slot_remove_write_access().
4469 lockdep_assert_held(&kvm->slots_lock);
4471 kvm_flush_remote_tlbs(kvm);
4473 mutex_unlock(&kvm->slots_lock);
4477 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4482 mutex_lock(&kvm->slots_lock);
4485 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4487 if (kvm_x86_ops->flush_log_dirty)
4488 kvm_x86_ops->flush_log_dirty(kvm);
4490 r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4493 * All the TLBs can be flushed out of mmu lock, see the comments in
4494 * kvm_mmu_slot_remove_write_access().
4496 lockdep_assert_held(&kvm->slots_lock);
4498 kvm_flush_remote_tlbs(kvm);
4500 mutex_unlock(&kvm->slots_lock);
4504 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4507 if (!irqchip_in_kernel(kvm))
4510 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4511 irq_event->irq, irq_event->level,
4516 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4517 struct kvm_enable_cap *cap)
4525 case KVM_CAP_DISABLE_QUIRKS:
4526 kvm->arch.disabled_quirks = cap->args[0];
4529 case KVM_CAP_SPLIT_IRQCHIP: {
4530 mutex_lock(&kvm->lock);
4532 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4533 goto split_irqchip_unlock;
4535 if (irqchip_in_kernel(kvm))
4536 goto split_irqchip_unlock;
4537 if (kvm->created_vcpus)
4538 goto split_irqchip_unlock;
4539 r = kvm_setup_empty_irq_routing(kvm);
4541 goto split_irqchip_unlock;
4542 /* Pairs with irqchip_in_kernel. */
4544 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4545 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4547 split_irqchip_unlock:
4548 mutex_unlock(&kvm->lock);
4551 case KVM_CAP_X2APIC_API:
4553 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4556 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4557 kvm->arch.x2apic_format = true;
4558 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4559 kvm->arch.x2apic_broadcast_quirk_disabled = true;
4563 case KVM_CAP_X86_DISABLE_EXITS:
4565 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4568 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4569 kvm_can_mwait_in_guest())
4570 kvm->arch.mwait_in_guest = true;
4571 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4572 kvm->arch.hlt_in_guest = true;
4573 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4574 kvm->arch.pause_in_guest = true;
4577 case KVM_CAP_MSR_PLATFORM_INFO:
4578 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4581 case KVM_CAP_EXCEPTION_PAYLOAD:
4582 kvm->arch.exception_payload_enabled = cap->args[0];
4592 long kvm_arch_vm_ioctl(struct file *filp,
4593 unsigned int ioctl, unsigned long arg)
4595 struct kvm *kvm = filp->private_data;
4596 void __user *argp = (void __user *)arg;
4599 * This union makes it completely explicit to gcc-3.x
4600 * that these two variables' stack usage should be
4601 * combined, not added together.
4604 struct kvm_pit_state ps;
4605 struct kvm_pit_state2 ps2;
4606 struct kvm_pit_config pit_config;
4610 case KVM_SET_TSS_ADDR:
4611 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4613 case KVM_SET_IDENTITY_MAP_ADDR: {
4616 mutex_lock(&kvm->lock);
4618 if (kvm->created_vcpus)
4619 goto set_identity_unlock;
4621 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4622 goto set_identity_unlock;
4623 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4624 set_identity_unlock:
4625 mutex_unlock(&kvm->lock);
4628 case KVM_SET_NR_MMU_PAGES:
4629 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4631 case KVM_GET_NR_MMU_PAGES:
4632 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4634 case KVM_CREATE_IRQCHIP: {
4635 mutex_lock(&kvm->lock);
4638 if (irqchip_in_kernel(kvm))
4639 goto create_irqchip_unlock;
4642 if (kvm->created_vcpus)
4643 goto create_irqchip_unlock;
4645 r = kvm_pic_init(kvm);
4647 goto create_irqchip_unlock;
4649 r = kvm_ioapic_init(kvm);
4651 kvm_pic_destroy(kvm);
4652 goto create_irqchip_unlock;
4655 r = kvm_setup_default_irq_routing(kvm);
4657 kvm_ioapic_destroy(kvm);
4658 kvm_pic_destroy(kvm);
4659 goto create_irqchip_unlock;
4661 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4663 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4664 create_irqchip_unlock:
4665 mutex_unlock(&kvm->lock);
4668 case KVM_CREATE_PIT:
4669 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4671 case KVM_CREATE_PIT2:
4673 if (copy_from_user(&u.pit_config, argp,
4674 sizeof(struct kvm_pit_config)))
4677 mutex_lock(&kvm->lock);
4680 goto create_pit_unlock;
4682 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4686 mutex_unlock(&kvm->lock);
4688 case KVM_GET_IRQCHIP: {
4689 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4690 struct kvm_irqchip *chip;
4692 chip = memdup_user(argp, sizeof(*chip));
4699 if (!irqchip_kernel(kvm))
4700 goto get_irqchip_out;
4701 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4703 goto get_irqchip_out;
4705 if (copy_to_user(argp, chip, sizeof(*chip)))
4706 goto get_irqchip_out;
4712 case KVM_SET_IRQCHIP: {
4713 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4714 struct kvm_irqchip *chip;
4716 chip = memdup_user(argp, sizeof(*chip));
4723 if (!irqchip_kernel(kvm))
4724 goto set_irqchip_out;
4725 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4727 goto set_irqchip_out;
4735 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4738 if (!kvm->arch.vpit)
4740 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4744 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4751 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4754 if (!kvm->arch.vpit)
4756 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4759 case KVM_GET_PIT2: {
4761 if (!kvm->arch.vpit)
4763 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4767 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4772 case KVM_SET_PIT2: {
4774 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4777 if (!kvm->arch.vpit)
4779 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4782 case KVM_REINJECT_CONTROL: {
4783 struct kvm_reinject_control control;
4785 if (copy_from_user(&control, argp, sizeof(control)))
4787 r = kvm_vm_ioctl_reinject(kvm, &control);
4790 case KVM_SET_BOOT_CPU_ID:
4792 mutex_lock(&kvm->lock);
4793 if (kvm->created_vcpus)
4796 kvm->arch.bsp_vcpu_id = arg;
4797 mutex_unlock(&kvm->lock);
4799 case KVM_XEN_HVM_CONFIG: {
4800 struct kvm_xen_hvm_config xhc;
4802 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4807 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4811 case KVM_SET_CLOCK: {
4812 struct kvm_clock_data user_ns;
4816 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4825 * TODO: userspace has to take care of races with VCPU_RUN, so
4826 * kvm_gen_update_masterclock() can be cut down to locked
4827 * pvclock_update_vm_gtod_copy().
4829 kvm_gen_update_masterclock(kvm);
4830 now_ns = get_kvmclock_ns(kvm);
4831 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4832 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4835 case KVM_GET_CLOCK: {
4836 struct kvm_clock_data user_ns;
4839 now_ns = get_kvmclock_ns(kvm);
4840 user_ns.clock = now_ns;
4841 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4842 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4845 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4850 case KVM_MEMORY_ENCRYPT_OP: {
4852 if (kvm_x86_ops->mem_enc_op)
4853 r = kvm_x86_ops->mem_enc_op(kvm, argp);
4856 case KVM_MEMORY_ENCRYPT_REG_REGION: {
4857 struct kvm_enc_region region;
4860 if (copy_from_user(®ion, argp, sizeof(region)))
4864 if (kvm_x86_ops->mem_enc_reg_region)
4865 r = kvm_x86_ops->mem_enc_reg_region(kvm, ®ion);
4868 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4869 struct kvm_enc_region region;
4872 if (copy_from_user(®ion, argp, sizeof(region)))
4876 if (kvm_x86_ops->mem_enc_unreg_region)
4877 r = kvm_x86_ops->mem_enc_unreg_region(kvm, ®ion);
4880 case KVM_HYPERV_EVENTFD: {
4881 struct kvm_hyperv_eventfd hvevfd;
4884 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4886 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4896 static void kvm_init_msr_list(void)
4901 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4902 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4906 * Even MSRs that are valid in the host may not be exposed
4907 * to the guests in some cases.
4909 switch (msrs_to_save[i]) {
4910 case MSR_IA32_BNDCFGS:
4911 if (!kvm_mpx_supported())
4915 if (!kvm_x86_ops->rdtscp_supported())
4918 case MSR_IA32_RTIT_CTL:
4919 case MSR_IA32_RTIT_STATUS:
4920 if (!kvm_x86_ops->pt_supported())
4923 case MSR_IA32_RTIT_CR3_MATCH:
4924 if (!kvm_x86_ops->pt_supported() ||
4925 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
4928 case MSR_IA32_RTIT_OUTPUT_BASE:
4929 case MSR_IA32_RTIT_OUTPUT_MASK:
4930 if (!kvm_x86_ops->pt_supported() ||
4931 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
4932 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
4935 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
4936 if (!kvm_x86_ops->pt_supported() ||
4937 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
4938 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
4947 msrs_to_save[j] = msrs_to_save[i];
4950 num_msrs_to_save = j;
4952 for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4953 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4957 emulated_msrs[j] = emulated_msrs[i];
4960 num_emulated_msrs = j;
4962 for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4963 struct kvm_msr_entry msr;
4965 msr.index = msr_based_features[i];
4966 if (kvm_get_msr_feature(&msr))
4970 msr_based_features[j] = msr_based_features[i];
4973 num_msr_based_features = j;
4976 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4984 if (!(lapic_in_kernel(vcpu) &&
4985 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4986 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4997 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5004 if (!(lapic_in_kernel(vcpu) &&
5005 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5007 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5009 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5019 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5020 struct kvm_segment *var, int seg)
5022 kvm_x86_ops->set_segment(vcpu, var, seg);
5025 void kvm_get_segment(struct kvm_vcpu *vcpu,
5026 struct kvm_segment *var, int seg)
5028 kvm_x86_ops->get_segment(vcpu, var, seg);
5031 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5032 struct x86_exception *exception)
5036 BUG_ON(!mmu_is_nested(vcpu));
5038 /* NPT walks are always user-walks */
5039 access |= PFERR_USER_MASK;
5040 t_gpa = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5045 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5046 struct x86_exception *exception)
5048 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5049 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5052 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5053 struct x86_exception *exception)
5055 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5056 access |= PFERR_FETCH_MASK;
5057 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5060 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5061 struct x86_exception *exception)
5063 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5064 access |= PFERR_WRITE_MASK;
5065 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5068 /* uses this to access any guest's mapped memory without checking CPL */
5069 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5070 struct x86_exception *exception)
5072 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5075 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5076 struct kvm_vcpu *vcpu, u32 access,
5077 struct x86_exception *exception)
5080 int r = X86EMUL_CONTINUE;
5083 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5085 unsigned offset = addr & (PAGE_SIZE-1);
5086 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5089 if (gpa == UNMAPPED_GVA)
5090 return X86EMUL_PROPAGATE_FAULT;
5091 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5094 r = X86EMUL_IO_NEEDED;
5106 /* used for instruction fetching */
5107 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5108 gva_t addr, void *val, unsigned int bytes,
5109 struct x86_exception *exception)
5111 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5112 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5116 /* Inline kvm_read_guest_virt_helper for speed. */
5117 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5119 if (unlikely(gpa == UNMAPPED_GVA))
5120 return X86EMUL_PROPAGATE_FAULT;
5122 offset = addr & (PAGE_SIZE-1);
5123 if (WARN_ON(offset + bytes > PAGE_SIZE))
5124 bytes = (unsigned)PAGE_SIZE - offset;
5125 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5127 if (unlikely(ret < 0))
5128 return X86EMUL_IO_NEEDED;
5130 return X86EMUL_CONTINUE;
5133 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5134 gva_t addr, void *val, unsigned int bytes,
5135 struct x86_exception *exception)
5137 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5140 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5141 * is returned, but our callers are not ready for that and they blindly
5142 * call kvm_inject_page_fault. Ensure that they at least do not leak
5143 * uninitialized kernel stack memory into cr2 and error code.
5145 memset(exception, 0, sizeof(*exception));
5146 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5149 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5151 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5152 gva_t addr, void *val, unsigned int bytes,
5153 struct x86_exception *exception, bool system)
5155 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5158 if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5159 access |= PFERR_USER_MASK;
5161 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5164 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5165 unsigned long addr, void *val, unsigned int bytes)
5167 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5168 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5170 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5173 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5174 struct kvm_vcpu *vcpu, u32 access,
5175 struct x86_exception *exception)
5178 int r = X86EMUL_CONTINUE;
5181 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5184 unsigned offset = addr & (PAGE_SIZE-1);
5185 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5188 if (gpa == UNMAPPED_GVA)
5189 return X86EMUL_PROPAGATE_FAULT;
5190 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5192 r = X86EMUL_IO_NEEDED;
5204 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5205 unsigned int bytes, struct x86_exception *exception,
5208 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5209 u32 access = PFERR_WRITE_MASK;
5211 if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5212 access |= PFERR_USER_MASK;
5214 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5218 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5219 unsigned int bytes, struct x86_exception *exception)
5221 /* kvm_write_guest_virt_system can pull in tons of pages. */
5222 vcpu->arch.l1tf_flush_l1d = true;
5224 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5225 PFERR_WRITE_MASK, exception);
5227 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5229 int handle_ud(struct kvm_vcpu *vcpu)
5231 int emul_type = EMULTYPE_TRAP_UD;
5232 enum emulation_result er;
5233 char sig[5]; /* ud2; .ascii "kvm" */
5234 struct x86_exception e;
5236 if (force_emulation_prefix &&
5237 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5238 sig, sizeof(sig), &e) == 0 &&
5239 memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5240 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5244 er = kvm_emulate_instruction(vcpu, emul_type);
5245 if (er == EMULATE_USER_EXIT)
5247 if (er != EMULATE_DONE)
5248 kvm_queue_exception(vcpu, UD_VECTOR);
5251 EXPORT_SYMBOL_GPL(handle_ud);
5253 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5254 gpa_t gpa, bool write)
5256 /* For APIC access vmexit */
5257 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5260 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5261 trace_vcpu_match_mmio(gva, gpa, write, true);
5268 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5269 gpa_t *gpa, struct x86_exception *exception,
5272 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5273 | (write ? PFERR_WRITE_MASK : 0);
5276 * currently PKRU is only applied to ept enabled guest so
5277 * there is no pkey in EPT page table for L1 guest or EPT
5278 * shadow page table for L2 guest.
5280 if (vcpu_match_mmio_gva(vcpu, gva)
5281 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5282 vcpu->arch.access, 0, access)) {
5283 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5284 (gva & (PAGE_SIZE - 1));
5285 trace_vcpu_match_mmio(gva, *gpa, write, false);
5289 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5291 if (*gpa == UNMAPPED_GVA)
5294 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5297 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5298 const void *val, int bytes)
5302 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5305 kvm_page_track_write(vcpu, gpa, val, bytes);
5309 struct read_write_emulator_ops {
5310 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5312 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5313 void *val, int bytes);
5314 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5315 int bytes, void *val);
5316 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5317 void *val, int bytes);
5321 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5323 if (vcpu->mmio_read_completed) {
5324 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5325 vcpu->mmio_fragments[0].gpa, val);
5326 vcpu->mmio_read_completed = 0;
5333 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5334 void *val, int bytes)
5336 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5339 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5340 void *val, int bytes)
5342 return emulator_write_phys(vcpu, gpa, val, bytes);
5345 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5347 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5348 return vcpu_mmio_write(vcpu, gpa, bytes, val);
5351 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5352 void *val, int bytes)
5354 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5355 return X86EMUL_IO_NEEDED;
5358 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5359 void *val, int bytes)
5361 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5363 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5364 return X86EMUL_CONTINUE;
5367 static const struct read_write_emulator_ops read_emultor = {
5368 .read_write_prepare = read_prepare,
5369 .read_write_emulate = read_emulate,
5370 .read_write_mmio = vcpu_mmio_read,
5371 .read_write_exit_mmio = read_exit_mmio,
5374 static const struct read_write_emulator_ops write_emultor = {
5375 .read_write_emulate = write_emulate,
5376 .read_write_mmio = write_mmio,
5377 .read_write_exit_mmio = write_exit_mmio,
5381 static int emulator_read_write_onepage(unsigned long addr, void *val,
5383 struct x86_exception *exception,
5384 struct kvm_vcpu *vcpu,
5385 const struct read_write_emulator_ops *ops)
5389 bool write = ops->write;
5390 struct kvm_mmio_fragment *frag;
5391 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5394 * If the exit was due to a NPF we may already have a GPA.
5395 * If the GPA is present, use it to avoid the GVA to GPA table walk.
5396 * Note, this cannot be used on string operations since string
5397 * operation using rep will only have the initial GPA from the NPF
5400 if (vcpu->arch.gpa_available &&
5401 emulator_can_use_gpa(ctxt) &&
5402 (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5403 gpa = vcpu->arch.gpa_val;
5404 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5406 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5408 return X86EMUL_PROPAGATE_FAULT;
5411 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5412 return X86EMUL_CONTINUE;
5415 * Is this MMIO handled locally?
5417 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5418 if (handled == bytes)
5419 return X86EMUL_CONTINUE;
5425 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5426 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5430 return X86EMUL_CONTINUE;
5433 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5435 void *val, unsigned int bytes,
5436 struct x86_exception *exception,
5437 const struct read_write_emulator_ops *ops)
5439 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5443 if (ops->read_write_prepare &&
5444 ops->read_write_prepare(vcpu, val, bytes))
5445 return X86EMUL_CONTINUE;
5447 vcpu->mmio_nr_fragments = 0;
5449 /* Crossing a page boundary? */
5450 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5453 now = -addr & ~PAGE_MASK;
5454 rc = emulator_read_write_onepage(addr, val, now, exception,
5457 if (rc != X86EMUL_CONTINUE)
5460 if (ctxt->mode != X86EMUL_MODE_PROT64)
5466 rc = emulator_read_write_onepage(addr, val, bytes, exception,
5468 if (rc != X86EMUL_CONTINUE)
5471 if (!vcpu->mmio_nr_fragments)
5474 gpa = vcpu->mmio_fragments[0].gpa;
5476 vcpu->mmio_needed = 1;
5477 vcpu->mmio_cur_fragment = 0;
5479 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5480 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5481 vcpu->run->exit_reason = KVM_EXIT_MMIO;
5482 vcpu->run->mmio.phys_addr = gpa;
5484 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5487 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5491 struct x86_exception *exception)
5493 return emulator_read_write(ctxt, addr, val, bytes,
5494 exception, &read_emultor);
5497 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5501 struct x86_exception *exception)
5503 return emulator_read_write(ctxt, addr, (void *)val, bytes,
5504 exception, &write_emultor);
5507 #define CMPXCHG_TYPE(t, ptr, old, new) \
5508 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5510 #ifdef CONFIG_X86_64
5511 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5513 # define CMPXCHG64(ptr, old, new) \
5514 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5517 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5522 struct x86_exception *exception)
5524 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5530 /* guests cmpxchg8b have to be emulated atomically */
5531 if (bytes > 8 || (bytes & (bytes - 1)))
5534 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5536 if (gpa == UNMAPPED_GVA ||
5537 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5540 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5543 page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5544 if (is_error_page(page))
5547 kaddr = kmap_atomic(page);
5548 kaddr += offset_in_page(gpa);
5551 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5554 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5557 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5560 exchanged = CMPXCHG64(kaddr, old, new);
5565 kunmap_atomic(kaddr);
5566 kvm_release_page_dirty(page);
5569 return X86EMUL_CMPXCHG_FAILED;
5571 kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5572 kvm_page_track_write(vcpu, gpa, new, bytes);
5574 return X86EMUL_CONTINUE;
5577 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5579 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5582 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5586 for (i = 0; i < vcpu->arch.pio.count; i++) {
5587 if (vcpu->arch.pio.in)
5588 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5589 vcpu->arch.pio.size, pd);
5591 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5592 vcpu->arch.pio.port, vcpu->arch.pio.size,
5596 pd += vcpu->arch.pio.size;
5601 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5602 unsigned short port, void *val,
5603 unsigned int count, bool in)
5605 vcpu->arch.pio.port = port;
5606 vcpu->arch.pio.in = in;
5607 vcpu->arch.pio.count = count;
5608 vcpu->arch.pio.size = size;
5610 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5611 vcpu->arch.pio.count = 0;
5615 vcpu->run->exit_reason = KVM_EXIT_IO;
5616 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5617 vcpu->run->io.size = size;
5618 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5619 vcpu->run->io.count = count;
5620 vcpu->run->io.port = port;
5625 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5626 int size, unsigned short port, void *val,
5629 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5632 if (vcpu->arch.pio.count)
5635 memset(vcpu->arch.pio_data, 0, size * count);
5637 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5640 memcpy(val, vcpu->arch.pio_data, size * count);
5641 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5642 vcpu->arch.pio.count = 0;
5649 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5650 int size, unsigned short port,
5651 const void *val, unsigned int count)
5653 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5655 memcpy(vcpu->arch.pio_data, val, size * count);
5656 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5657 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5660 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5662 return kvm_x86_ops->get_segment_base(vcpu, seg);
5665 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5667 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5670 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5672 if (!need_emulate_wbinvd(vcpu))
5673 return X86EMUL_CONTINUE;
5675 if (kvm_x86_ops->has_wbinvd_exit()) {
5676 int cpu = get_cpu();
5678 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5679 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5680 wbinvd_ipi, NULL, 1);
5682 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5685 return X86EMUL_CONTINUE;
5688 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5690 kvm_emulate_wbinvd_noskip(vcpu);
5691 return kvm_skip_emulated_instruction(vcpu);
5693 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5697 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5699 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5702 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5703 unsigned long *dest)
5705 return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5708 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5709 unsigned long value)
5712 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5715 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5717 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5720 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5722 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5723 unsigned long value;
5727 value = kvm_read_cr0(vcpu);
5730 value = vcpu->arch.cr2;
5733 value = kvm_read_cr3(vcpu);
5736 value = kvm_read_cr4(vcpu);
5739 value = kvm_get_cr8(vcpu);
5742 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5749 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5751 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5756 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5759 vcpu->arch.cr2 = val;
5762 res = kvm_set_cr3(vcpu, val);
5765 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5768 res = kvm_set_cr8(vcpu, val);
5771 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5778 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5780 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5783 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5785 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5788 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5790 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5793 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5795 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5798 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5800 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5803 static unsigned long emulator_get_cached_segment_base(
5804 struct x86_emulate_ctxt *ctxt, int seg)
5806 return get_segment_base(emul_to_vcpu(ctxt), seg);
5809 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5810 struct desc_struct *desc, u32 *base3,
5813 struct kvm_segment var;
5815 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5816 *selector = var.selector;
5819 memset(desc, 0, sizeof(*desc));
5827 set_desc_limit(desc, var.limit);
5828 set_desc_base(desc, (unsigned long)var.base);
5829 #ifdef CONFIG_X86_64
5831 *base3 = var.base >> 32;
5833 desc->type = var.type;
5835 desc->dpl = var.dpl;
5836 desc->p = var.present;
5837 desc->avl = var.avl;
5845 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5846 struct desc_struct *desc, u32 base3,
5849 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5850 struct kvm_segment var;
5852 var.selector = selector;
5853 var.base = get_desc_base(desc);
5854 #ifdef CONFIG_X86_64
5855 var.base |= ((u64)base3) << 32;
5857 var.limit = get_desc_limit(desc);
5859 var.limit = (var.limit << 12) | 0xfff;
5860 var.type = desc->type;
5861 var.dpl = desc->dpl;
5866 var.avl = desc->avl;
5867 var.present = desc->p;
5868 var.unusable = !var.present;
5871 kvm_set_segment(vcpu, &var, seg);
5875 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5876 u32 msr_index, u64 *pdata)
5878 struct msr_data msr;
5881 msr.index = msr_index;
5882 msr.host_initiated = false;
5883 r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5891 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5892 u32 msr_index, u64 data)
5894 struct msr_data msr;
5897 msr.index = msr_index;
5898 msr.host_initiated = false;
5899 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5902 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5904 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5906 return vcpu->arch.smbase;
5909 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5911 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5913 vcpu->arch.smbase = smbase;
5916 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5919 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5922 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5923 u32 pmc, u64 *pdata)
5925 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5928 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5930 emul_to_vcpu(ctxt)->arch.halt_request = 1;
5933 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5934 struct x86_instruction_info *info,
5935 enum x86_intercept_stage stage)
5937 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5940 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5941 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5943 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5946 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5948 return kvm_register_read(emul_to_vcpu(ctxt), reg);
5951 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5953 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5956 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5958 kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5961 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5963 return emul_to_vcpu(ctxt)->arch.hflags;
5966 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5968 emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
5971 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
5972 const char *smstate)
5974 return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
5977 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
5979 kvm_smm_changed(emul_to_vcpu(ctxt));
5982 static const struct x86_emulate_ops emulate_ops = {
5983 .read_gpr = emulator_read_gpr,
5984 .write_gpr = emulator_write_gpr,
5985 .read_std = emulator_read_std,
5986 .write_std = emulator_write_std,
5987 .read_phys = kvm_read_guest_phys_system,
5988 .fetch = kvm_fetch_guest_virt,
5989 .read_emulated = emulator_read_emulated,
5990 .write_emulated = emulator_write_emulated,
5991 .cmpxchg_emulated = emulator_cmpxchg_emulated,
5992 .invlpg = emulator_invlpg,
5993 .pio_in_emulated = emulator_pio_in_emulated,
5994 .pio_out_emulated = emulator_pio_out_emulated,
5995 .get_segment = emulator_get_segment,
5996 .set_segment = emulator_set_segment,
5997 .get_cached_segment_base = emulator_get_cached_segment_base,
5998 .get_gdt = emulator_get_gdt,
5999 .get_idt = emulator_get_idt,
6000 .set_gdt = emulator_set_gdt,
6001 .set_idt = emulator_set_idt,
6002 .get_cr = emulator_get_cr,
6003 .set_cr = emulator_set_cr,
6004 .cpl = emulator_get_cpl,
6005 .get_dr = emulator_get_dr,
6006 .set_dr = emulator_set_dr,
6007 .get_smbase = emulator_get_smbase,
6008 .set_smbase = emulator_set_smbase,
6009 .set_msr = emulator_set_msr,
6010 .get_msr = emulator_get_msr,
6011 .check_pmc = emulator_check_pmc,
6012 .read_pmc = emulator_read_pmc,
6013 .halt = emulator_halt,
6014 .wbinvd = emulator_wbinvd,
6015 .fix_hypercall = emulator_fix_hypercall,
6016 .intercept = emulator_intercept,
6017 .get_cpuid = emulator_get_cpuid,
6018 .set_nmi_mask = emulator_set_nmi_mask,
6019 .get_hflags = emulator_get_hflags,
6020 .set_hflags = emulator_set_hflags,
6021 .pre_leave_smm = emulator_pre_leave_smm,
6022 .post_leave_smm = emulator_post_leave_smm,
6025 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6027 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6029 * an sti; sti; sequence only disable interrupts for the first
6030 * instruction. So, if the last instruction, be it emulated or
6031 * not, left the system with the INT_STI flag enabled, it
6032 * means that the last instruction is an sti. We should not
6033 * leave the flag on in this case. The same goes for mov ss
6035 if (int_shadow & mask)
6037 if (unlikely(int_shadow || mask)) {
6038 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6040 kvm_make_request(KVM_REQ_EVENT, vcpu);
6044 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6046 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6047 if (ctxt->exception.vector == PF_VECTOR)
6048 return kvm_propagate_fault(vcpu, &ctxt->exception);
6050 if (ctxt->exception.error_code_valid)
6051 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6052 ctxt->exception.error_code);
6054 kvm_queue_exception(vcpu, ctxt->exception.vector);
6058 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6060 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6063 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6065 ctxt->eflags = kvm_get_rflags(vcpu);
6066 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6068 ctxt->eip = kvm_rip_read(vcpu);
6069 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
6070 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
6071 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
6072 cs_db ? X86EMUL_MODE_PROT32 :
6073 X86EMUL_MODE_PROT16;
6074 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6075 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6076 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6078 init_decode_cache(ctxt);
6079 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6082 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6084 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6087 init_emulate_ctxt(vcpu);
6091 ctxt->_eip = ctxt->eip + inc_eip;
6092 ret = emulate_int_real(ctxt, irq);
6094 if (ret != X86EMUL_CONTINUE)
6095 return EMULATE_FAIL;
6097 ctxt->eip = ctxt->_eip;
6098 kvm_rip_write(vcpu, ctxt->eip);
6099 kvm_set_rflags(vcpu, ctxt->eflags);
6101 return EMULATE_DONE;
6103 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6105 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6107 int r = EMULATE_DONE;
6109 ++vcpu->stat.insn_emulation_fail;
6110 trace_kvm_emulate_insn_failed(vcpu);
6112 if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6113 return EMULATE_FAIL;
6115 if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6116 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6117 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6118 vcpu->run->internal.ndata = 0;
6119 r = EMULATE_USER_EXIT;
6122 kvm_queue_exception(vcpu, UD_VECTOR);
6127 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6128 bool write_fault_to_shadow_pgtable,
6134 if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6137 if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6140 if (!vcpu->arch.mmu->direct_map) {
6142 * Write permission should be allowed since only
6143 * write access need to be emulated.
6145 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6148 * If the mapping is invalid in guest, let cpu retry
6149 * it to generate fault.
6151 if (gpa == UNMAPPED_GVA)
6156 * Do not retry the unhandleable instruction if it faults on the
6157 * readonly host memory, otherwise it will goto a infinite loop:
6158 * retry instruction -> write #PF -> emulation fail -> retry
6159 * instruction -> ...
6161 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6164 * If the instruction failed on the error pfn, it can not be fixed,
6165 * report the error to userspace.
6167 if (is_error_noslot_pfn(pfn))
6170 kvm_release_pfn_clean(pfn);
6172 /* The instructions are well-emulated on direct mmu. */
6173 if (vcpu->arch.mmu->direct_map) {
6174 unsigned int indirect_shadow_pages;
6176 spin_lock(&vcpu->kvm->mmu_lock);
6177 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6178 spin_unlock(&vcpu->kvm->mmu_lock);
6180 if (indirect_shadow_pages)
6181 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6187 * if emulation was due to access to shadowed page table
6188 * and it failed try to unshadow page and re-enter the
6189 * guest to let CPU execute the instruction.
6191 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6194 * If the access faults on its page table, it can not
6195 * be fixed by unprotecting shadow page and it should
6196 * be reported to userspace.
6198 return !write_fault_to_shadow_pgtable;
6201 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6202 unsigned long cr2, int emulation_type)
6204 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6205 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6207 last_retry_eip = vcpu->arch.last_retry_eip;
6208 last_retry_addr = vcpu->arch.last_retry_addr;
6211 * If the emulation is caused by #PF and it is non-page_table
6212 * writing instruction, it means the VM-EXIT is caused by shadow
6213 * page protected, we can zap the shadow page and retry this
6214 * instruction directly.
6216 * Note: if the guest uses a non-page-table modifying instruction
6217 * on the PDE that points to the instruction, then we will unmap
6218 * the instruction and go to an infinite loop. So, we cache the
6219 * last retried eip and the last fault address, if we meet the eip
6220 * and the address again, we can break out of the potential infinite
6223 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6225 if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6228 if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6231 if (x86_page_table_writing_insn(ctxt))
6234 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6237 vcpu->arch.last_retry_eip = ctxt->eip;
6238 vcpu->arch.last_retry_addr = cr2;
6240 if (!vcpu->arch.mmu->direct_map)
6241 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6243 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6248 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6249 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6251 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6253 if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6254 /* This is a good place to trace that we are exiting SMM. */
6255 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6257 /* Process a latched INIT or SMI, if any. */
6258 kvm_make_request(KVM_REQ_EVENT, vcpu);
6261 kvm_mmu_reset_context(vcpu);
6264 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6273 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6274 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6279 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6281 struct kvm_run *kvm_run = vcpu->run;
6283 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6284 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6285 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6286 kvm_run->debug.arch.exception = DB_VECTOR;
6287 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6288 *r = EMULATE_USER_EXIT;
6290 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6294 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6296 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6297 int r = EMULATE_DONE;
6299 kvm_x86_ops->skip_emulated_instruction(vcpu);
6302 * rflags is the old, "raw" value of the flags. The new value has
6303 * not been saved yet.
6305 * This is correct even for TF set by the guest, because "the
6306 * processor will not generate this exception after the instruction
6307 * that sets the TF flag".
6309 if (unlikely(rflags & X86_EFLAGS_TF))
6310 kvm_vcpu_do_singlestep(vcpu, &r);
6311 return r == EMULATE_DONE;
6313 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6315 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6317 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6318 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6319 struct kvm_run *kvm_run = vcpu->run;
6320 unsigned long eip = kvm_get_linear_rip(vcpu);
6321 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6322 vcpu->arch.guest_debug_dr7,
6326 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6327 kvm_run->debug.arch.pc = eip;
6328 kvm_run->debug.arch.exception = DB_VECTOR;
6329 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6330 *r = EMULATE_USER_EXIT;
6335 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6336 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6337 unsigned long eip = kvm_get_linear_rip(vcpu);
6338 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6343 vcpu->arch.dr6 &= ~15;
6344 vcpu->arch.dr6 |= dr6 | DR6_RTM;
6345 kvm_queue_exception(vcpu, DB_VECTOR);
6354 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6356 switch (ctxt->opcode_len) {
6363 case 0xe6: /* OUT */
6367 case 0x6c: /* INS */
6369 case 0x6e: /* OUTS */
6376 case 0x33: /* RDPMC */
6385 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6392 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6393 bool writeback = true;
6394 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6396 vcpu->arch.l1tf_flush_l1d = true;
6399 * Clear write_fault_to_shadow_pgtable here to ensure it is
6402 vcpu->arch.write_fault_to_shadow_pgtable = false;
6403 kvm_clear_exception_queue(vcpu);
6405 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6406 init_emulate_ctxt(vcpu);
6409 * We will reenter on the same instruction since
6410 * we do not set complete_userspace_io. This does not
6411 * handle watchpoints yet, those would be handled in
6414 if (!(emulation_type & EMULTYPE_SKIP) &&
6415 kvm_vcpu_check_breakpoint(vcpu, &r))
6418 ctxt->interruptibility = 0;
6419 ctxt->have_exception = false;
6420 ctxt->exception.vector = -1;
6421 ctxt->perm_ok = false;
6423 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6425 r = x86_decode_insn(ctxt, insn, insn_len);
6427 trace_kvm_emulate_insn_start(vcpu);
6428 ++vcpu->stat.insn_emulation;
6429 if (r != EMULATION_OK) {
6430 if (emulation_type & EMULTYPE_TRAP_UD)
6431 return EMULATE_FAIL;
6432 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6434 return EMULATE_DONE;
6435 if (ctxt->have_exception && inject_emulated_exception(vcpu))
6436 return EMULATE_DONE;
6437 if (emulation_type & EMULTYPE_SKIP)
6438 return EMULATE_FAIL;
6439 return handle_emulation_failure(vcpu, emulation_type);
6443 if ((emulation_type & EMULTYPE_VMWARE) &&
6444 !is_vmware_backdoor_opcode(ctxt))
6445 return EMULATE_FAIL;
6447 if (emulation_type & EMULTYPE_SKIP) {
6448 kvm_rip_write(vcpu, ctxt->_eip);
6449 if (ctxt->eflags & X86_EFLAGS_RF)
6450 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6451 return EMULATE_DONE;
6454 if (retry_instruction(ctxt, cr2, emulation_type))
6455 return EMULATE_DONE;
6457 /* this is needed for vmware backdoor interface to work since it
6458 changes registers values during IO operation */
6459 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6460 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6461 emulator_invalidate_register_cache(ctxt);
6465 /* Save the faulting GPA (cr2) in the address field */
6466 ctxt->exception.address = cr2;
6468 r = x86_emulate_insn(ctxt);
6470 if (r == EMULATION_INTERCEPTED)
6471 return EMULATE_DONE;
6473 if (r == EMULATION_FAILED) {
6474 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6476 return EMULATE_DONE;
6478 return handle_emulation_failure(vcpu, emulation_type);
6481 if (ctxt->have_exception) {
6483 if (inject_emulated_exception(vcpu))
6485 } else if (vcpu->arch.pio.count) {
6486 if (!vcpu->arch.pio.in) {
6487 /* FIXME: return into emulator if single-stepping. */
6488 vcpu->arch.pio.count = 0;
6491 vcpu->arch.complete_userspace_io = complete_emulated_pio;
6493 r = EMULATE_USER_EXIT;
6494 } else if (vcpu->mmio_needed) {
6495 if (!vcpu->mmio_is_write)
6497 r = EMULATE_USER_EXIT;
6498 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6499 } else if (r == EMULATION_RESTART)
6505 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6506 toggle_interruptibility(vcpu, ctxt->interruptibility);
6507 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6508 kvm_rip_write(vcpu, ctxt->eip);
6509 if (r == EMULATE_DONE && ctxt->tf)
6510 kvm_vcpu_do_singlestep(vcpu, &r);
6511 if (!ctxt->have_exception ||
6512 exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6513 __kvm_set_rflags(vcpu, ctxt->eflags);
6516 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6517 * do nothing, and it will be requested again as soon as
6518 * the shadow expires. But we still need to check here,
6519 * because POPF has no interrupt shadow.
6521 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6522 kvm_make_request(KVM_REQ_EVENT, vcpu);
6524 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6529 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6531 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6533 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6535 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6536 void *insn, int insn_len)
6538 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6540 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6542 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6544 vcpu->arch.pio.count = 0;
6548 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6550 vcpu->arch.pio.count = 0;
6552 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6555 return kvm_skip_emulated_instruction(vcpu);
6558 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6559 unsigned short port)
6561 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6562 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6563 size, port, &val, 1);
6568 * Workaround userspace that relies on old KVM behavior of %rip being
6569 * incremented prior to exiting to userspace to handle "OUT 0x7e".
6572 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6573 vcpu->arch.complete_userspace_io =
6574 complete_fast_pio_out_port_0x7e;
6575 kvm_skip_emulated_instruction(vcpu);
6577 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6578 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6583 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6587 /* We should only ever be called with arch.pio.count equal to 1 */
6588 BUG_ON(vcpu->arch.pio.count != 1);
6590 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6591 vcpu->arch.pio.count = 0;
6595 /* For size less than 4 we merge, else we zero extend */
6596 val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6600 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6601 * the copy and tracing
6603 emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6604 vcpu->arch.pio.port, &val, 1);
6605 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6607 return kvm_skip_emulated_instruction(vcpu);
6610 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6611 unsigned short port)
6616 /* For size less than 4 we merge, else we zero extend */
6617 val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6619 ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6622 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6626 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6627 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6632 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6637 ret = kvm_fast_pio_in(vcpu, size, port);
6639 ret = kvm_fast_pio_out(vcpu, size, port);
6640 return ret && kvm_skip_emulated_instruction(vcpu);
6642 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6644 static int kvmclock_cpu_down_prep(unsigned int cpu)
6646 __this_cpu_write(cpu_tsc_khz, 0);
6650 static void tsc_khz_changed(void *data)
6652 struct cpufreq_freqs *freq = data;
6653 unsigned long khz = 0;
6657 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6658 khz = cpufreq_quick_get(raw_smp_processor_id());
6661 __this_cpu_write(cpu_tsc_khz, khz);
6664 #ifdef CONFIG_X86_64
6665 static void kvm_hyperv_tsc_notifier(void)
6668 struct kvm_vcpu *vcpu;
6671 spin_lock(&kvm_lock);
6672 list_for_each_entry(kvm, &vm_list, vm_list)
6673 kvm_make_mclock_inprogress_request(kvm);
6675 hyperv_stop_tsc_emulation();
6677 /* TSC frequency always matches when on Hyper-V */
6678 for_each_present_cpu(cpu)
6679 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6680 kvm_max_guest_tsc_khz = tsc_khz;
6682 list_for_each_entry(kvm, &vm_list, vm_list) {
6683 struct kvm_arch *ka = &kvm->arch;
6685 spin_lock(&ka->pvclock_gtod_sync_lock);
6687 pvclock_update_vm_gtod_copy(kvm);
6689 kvm_for_each_vcpu(cpu, vcpu, kvm)
6690 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6692 kvm_for_each_vcpu(cpu, vcpu, kvm)
6693 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6695 spin_unlock(&ka->pvclock_gtod_sync_lock);
6697 spin_unlock(&kvm_lock);
6701 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6704 struct cpufreq_freqs *freq = data;
6706 struct kvm_vcpu *vcpu;
6707 int i, send_ipi = 0;
6710 * We allow guests to temporarily run on slowing clocks,
6711 * provided we notify them after, or to run on accelerating
6712 * clocks, provided we notify them before. Thus time never
6715 * However, we have a problem. We can't atomically update
6716 * the frequency of a given CPU from this function; it is
6717 * merely a notifier, which can be called from any CPU.
6718 * Changing the TSC frequency at arbitrary points in time
6719 * requires a recomputation of local variables related to
6720 * the TSC for each VCPU. We must flag these local variables
6721 * to be updated and be sure the update takes place with the
6722 * new frequency before any guests proceed.
6724 * Unfortunately, the combination of hotplug CPU and frequency
6725 * change creates an intractable locking scenario; the order
6726 * of when these callouts happen is undefined with respect to
6727 * CPU hotplug, and they can race with each other. As such,
6728 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6729 * undefined; you can actually have a CPU frequency change take
6730 * place in between the computation of X and the setting of the
6731 * variable. To protect against this problem, all updates of
6732 * the per_cpu tsc_khz variable are done in an interrupt
6733 * protected IPI, and all callers wishing to update the value
6734 * must wait for a synchronous IPI to complete (which is trivial
6735 * if the caller is on the CPU already). This establishes the
6736 * necessary total order on variable updates.
6738 * Note that because a guest time update may take place
6739 * anytime after the setting of the VCPU's request bit, the
6740 * correct TSC value must be set before the request. However,
6741 * to ensure the update actually makes it to any guest which
6742 * starts running in hardware virtualization between the set
6743 * and the acquisition of the spinlock, we must also ping the
6744 * CPU after setting the request bit.
6748 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6750 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6753 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6755 spin_lock(&kvm_lock);
6756 list_for_each_entry(kvm, &vm_list, vm_list) {
6757 kvm_for_each_vcpu(i, vcpu, kvm) {
6758 if (vcpu->cpu != freq->cpu)
6760 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6761 if (vcpu->cpu != smp_processor_id())
6765 spin_unlock(&kvm_lock);
6767 if (freq->old < freq->new && send_ipi) {
6769 * We upscale the frequency. Must make the guest
6770 * doesn't see old kvmclock values while running with
6771 * the new frequency, otherwise we risk the guest sees
6772 * time go backwards.
6774 * In case we update the frequency for another cpu
6775 * (which might be in guest context) send an interrupt
6776 * to kick the cpu out of guest context. Next time
6777 * guest context is entered kvmclock will be updated,
6778 * so the guest will not see stale values.
6780 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6785 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6786 .notifier_call = kvmclock_cpufreq_notifier
6789 static int kvmclock_cpu_online(unsigned int cpu)
6791 tsc_khz_changed(NULL);
6795 static void kvm_timer_init(void)
6797 max_tsc_khz = tsc_khz;
6799 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6800 #ifdef CONFIG_CPU_FREQ
6801 struct cpufreq_policy policy;
6804 memset(&policy, 0, sizeof(policy));
6806 cpufreq_get_policy(&policy, cpu);
6807 if (policy.cpuinfo.max_freq)
6808 max_tsc_khz = policy.cpuinfo.max_freq;
6811 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6812 CPUFREQ_TRANSITION_NOTIFIER);
6814 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6816 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6817 kvmclock_cpu_online, kvmclock_cpu_down_prep);
6820 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6821 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6823 int kvm_is_in_guest(void)
6825 return __this_cpu_read(current_vcpu) != NULL;
6828 static int kvm_is_user_mode(void)
6832 if (__this_cpu_read(current_vcpu))
6833 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6835 return user_mode != 0;
6838 static unsigned long kvm_get_guest_ip(void)
6840 unsigned long ip = 0;
6842 if (__this_cpu_read(current_vcpu))
6843 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6848 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6849 .is_in_guest = kvm_is_in_guest,
6850 .is_user_mode = kvm_is_user_mode,
6851 .get_guest_ip = kvm_get_guest_ip,
6854 static void kvm_set_mmio_spte_mask(void)
6857 int maxphyaddr = boot_cpu_data.x86_phys_bits;
6860 * Set the reserved bits and the present bit of an paging-structure
6861 * entry to generate page fault with PFER.RSV = 1.
6865 * Mask the uppermost physical address bit, which would be reserved as
6866 * long as the supported physical address width is less than 52.
6870 /* Set the present bit. */
6874 * If reserved bit is not supported, clear the present bit to disable
6877 if (IS_ENABLED(CONFIG_X86_64) && maxphyaddr == 52)
6880 kvm_mmu_set_mmio_spte_mask(mask, mask);
6883 #ifdef CONFIG_X86_64
6884 static void pvclock_gtod_update_fn(struct work_struct *work)
6888 struct kvm_vcpu *vcpu;
6891 spin_lock(&kvm_lock);
6892 list_for_each_entry(kvm, &vm_list, vm_list)
6893 kvm_for_each_vcpu(i, vcpu, kvm)
6894 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6895 atomic_set(&kvm_guest_has_master_clock, 0);
6896 spin_unlock(&kvm_lock);
6899 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6902 * Notification about pvclock gtod data update.
6904 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6907 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6908 struct timekeeper *tk = priv;
6910 update_pvclock_gtod(tk);
6912 /* disable master clock if host does not trust, or does not
6913 * use, TSC based clocksource.
6915 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6916 atomic_read(&kvm_guest_has_master_clock) != 0)
6917 queue_work(system_long_wq, &pvclock_gtod_work);
6922 static struct notifier_block pvclock_gtod_notifier = {
6923 .notifier_call = pvclock_gtod_notify,
6927 int kvm_arch_init(void *opaque)
6930 struct kvm_x86_ops *ops = opaque;
6933 printk(KERN_ERR "kvm: already loaded the other module\n");
6938 if (!ops->cpu_has_kvm_support()) {
6939 printk(KERN_ERR "kvm: no hardware support\n");
6943 if (ops->disabled_by_bios()) {
6944 printk(KERN_ERR "kvm: disabled by bios\n");
6950 * KVM explicitly assumes that the guest has an FPU and
6951 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
6952 * vCPU's FPU state as a fxregs_state struct.
6954 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
6955 printk(KERN_ERR "kvm: inadequate fpu\n");
6961 x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
6962 __alignof__(struct fpu), SLAB_ACCOUNT,
6964 if (!x86_fpu_cache) {
6965 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
6969 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6971 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6972 goto out_free_x86_fpu_cache;
6975 r = kvm_mmu_module_init();
6977 goto out_free_percpu;
6979 kvm_set_mmio_spte_mask();
6983 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6984 PT_DIRTY_MASK, PT64_NX_MASK, 0,
6985 PT_PRESENT_MASK, 0, sme_me_mask);
6988 perf_register_guest_info_callbacks(&kvm_guest_cbs);
6990 if (boot_cpu_has(X86_FEATURE_XSAVE))
6991 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6994 #ifdef CONFIG_X86_64
6995 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6997 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6998 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7004 free_percpu(shared_msrs);
7005 out_free_x86_fpu_cache:
7006 kmem_cache_destroy(x86_fpu_cache);
7011 void kvm_arch_exit(void)
7013 #ifdef CONFIG_X86_64
7014 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7015 clear_hv_tscchange_cb();
7018 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7020 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7021 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7022 CPUFREQ_TRANSITION_NOTIFIER);
7023 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7024 #ifdef CONFIG_X86_64
7025 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7028 kvm_mmu_module_exit();
7029 free_percpu(shared_msrs);
7030 kmem_cache_destroy(x86_fpu_cache);
7033 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7035 ++vcpu->stat.halt_exits;
7036 if (lapic_in_kernel(vcpu)) {
7037 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7040 vcpu->run->exit_reason = KVM_EXIT_HLT;
7044 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7046 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7048 int ret = kvm_skip_emulated_instruction(vcpu);
7050 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7051 * KVM_EXIT_DEBUG here.
7053 return kvm_vcpu_halt(vcpu) && ret;
7055 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7057 #ifdef CONFIG_X86_64
7058 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7059 unsigned long clock_type)
7061 struct kvm_clock_pairing clock_pairing;
7062 struct timespec64 ts;
7066 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7067 return -KVM_EOPNOTSUPP;
7069 if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7070 return -KVM_EOPNOTSUPP;
7072 clock_pairing.sec = ts.tv_sec;
7073 clock_pairing.nsec = ts.tv_nsec;
7074 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7075 clock_pairing.flags = 0;
7076 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7079 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7080 sizeof(struct kvm_clock_pairing)))
7088 * kvm_pv_kick_cpu_op: Kick a vcpu.
7090 * @apicid - apicid of vcpu to be kicked.
7092 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7094 struct kvm_lapic_irq lapic_irq;
7096 lapic_irq.shorthand = 0;
7097 lapic_irq.dest_mode = 0;
7098 lapic_irq.level = 0;
7099 lapic_irq.dest_id = apicid;
7100 lapic_irq.msi_redir_hint = false;
7102 lapic_irq.delivery_mode = APIC_DM_REMRD;
7103 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7106 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7108 if (!lapic_in_kernel(vcpu)) {
7109 WARN_ON_ONCE(vcpu->arch.apicv_active);
7112 if (!vcpu->arch.apicv_active)
7115 vcpu->arch.apicv_active = false;
7116 kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7119 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7121 unsigned long nr, a0, a1, a2, a3, ret;
7124 if (kvm_hv_hypercall_enabled(vcpu->kvm))
7125 return kvm_hv_hypercall(vcpu);
7127 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
7128 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
7129 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
7130 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
7131 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
7133 trace_kvm_hypercall(nr, a0, a1, a2, a3);
7135 op_64_bit = is_64_bit_mode(vcpu);
7144 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7150 case KVM_HC_VAPIC_POLL_IRQ:
7153 case KVM_HC_KICK_CPU:
7154 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7157 #ifdef CONFIG_X86_64
7158 case KVM_HC_CLOCK_PAIRING:
7159 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7162 case KVM_HC_SEND_IPI:
7163 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7172 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
7174 ++vcpu->stat.hypercalls;
7175 return kvm_skip_emulated_instruction(vcpu);
7177 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7179 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7181 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7182 char instruction[3];
7183 unsigned long rip = kvm_rip_read(vcpu);
7185 kvm_x86_ops->patch_hypercall(vcpu, instruction);
7187 return emulator_write_emulated(ctxt, rip, instruction, 3,
7191 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7193 return vcpu->run->request_interrupt_window &&
7194 likely(!pic_in_kernel(vcpu->kvm));
7197 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7199 struct kvm_run *kvm_run = vcpu->run;
7201 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7202 kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7203 kvm_run->cr8 = kvm_get_cr8(vcpu);
7204 kvm_run->apic_base = kvm_get_apic_base(vcpu);
7205 kvm_run->ready_for_interrupt_injection =
7206 pic_in_kernel(vcpu->kvm) ||
7207 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7210 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7214 if (!kvm_x86_ops->update_cr8_intercept)
7217 if (!lapic_in_kernel(vcpu))
7220 if (vcpu->arch.apicv_active)
7223 if (!vcpu->arch.apic->vapic_addr)
7224 max_irr = kvm_lapic_find_highest_irr(vcpu);
7231 tpr = kvm_lapic_get_cr8(vcpu);
7233 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7236 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7240 /* try to reinject previous events if any */
7242 if (vcpu->arch.exception.injected)
7243 kvm_x86_ops->queue_exception(vcpu);
7245 * Do not inject an NMI or interrupt if there is a pending
7246 * exception. Exceptions and interrupts are recognized at
7247 * instruction boundaries, i.e. the start of an instruction.
7248 * Trap-like exceptions, e.g. #DB, have higher priority than
7249 * NMIs and interrupts, i.e. traps are recognized before an
7250 * NMI/interrupt that's pending on the same instruction.
7251 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7252 * priority, but are only generated (pended) during instruction
7253 * execution, i.e. a pending fault-like exception means the
7254 * fault occurred on the *previous* instruction and must be
7255 * serviced prior to recognizing any new events in order to
7256 * fully complete the previous instruction.
7258 else if (!vcpu->arch.exception.pending) {
7259 if (vcpu->arch.nmi_injected)
7260 kvm_x86_ops->set_nmi(vcpu);
7261 else if (vcpu->arch.interrupt.injected)
7262 kvm_x86_ops->set_irq(vcpu);
7266 * Call check_nested_events() even if we reinjected a previous event
7267 * in order for caller to determine if it should require immediate-exit
7268 * from L2 to L1 due to pending L1 events which require exit
7271 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7272 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7277 /* try to inject new event if pending */
7278 if (vcpu->arch.exception.pending) {
7279 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7280 vcpu->arch.exception.has_error_code,
7281 vcpu->arch.exception.error_code);
7283 WARN_ON_ONCE(vcpu->arch.exception.injected);
7284 vcpu->arch.exception.pending = false;
7285 vcpu->arch.exception.injected = true;
7287 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7288 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7291 if (vcpu->arch.exception.nr == DB_VECTOR) {
7293 * This code assumes that nSVM doesn't use
7294 * check_nested_events(). If it does, the
7295 * DR6/DR7 changes should happen before L1
7296 * gets a #VMEXIT for an intercepted #DB in
7297 * L2. (Under VMX, on the other hand, the
7298 * DR6/DR7 changes should not happen in the
7299 * event of a VM-exit to L1 for an intercepted
7302 kvm_deliver_exception_payload(vcpu);
7303 if (vcpu->arch.dr7 & DR7_GD) {
7304 vcpu->arch.dr7 &= ~DR7_GD;
7305 kvm_update_dr7(vcpu);
7309 kvm_x86_ops->queue_exception(vcpu);
7312 /* Don't consider new event if we re-injected an event */
7313 if (kvm_event_needs_reinjection(vcpu))
7316 if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7317 kvm_x86_ops->smi_allowed(vcpu)) {
7318 vcpu->arch.smi_pending = false;
7319 ++vcpu->arch.smi_count;
7321 } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7322 --vcpu->arch.nmi_pending;
7323 vcpu->arch.nmi_injected = true;
7324 kvm_x86_ops->set_nmi(vcpu);
7325 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7327 * Because interrupts can be injected asynchronously, we are
7328 * calling check_nested_events again here to avoid a race condition.
7329 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7330 * proposal and current concerns. Perhaps we should be setting
7331 * KVM_REQ_EVENT only on certain events and not unconditionally?
7333 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7334 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7338 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7339 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7341 kvm_x86_ops->set_irq(vcpu);
7348 static void process_nmi(struct kvm_vcpu *vcpu)
7353 * x86 is limited to one NMI running, and one NMI pending after it.
7354 * If an NMI is already in progress, limit further NMIs to just one.
7355 * Otherwise, allow two (and we'll inject the first one immediately).
7357 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7360 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7361 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7362 kvm_make_request(KVM_REQ_EVENT, vcpu);
7365 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7368 flags |= seg->g << 23;
7369 flags |= seg->db << 22;
7370 flags |= seg->l << 21;
7371 flags |= seg->avl << 20;
7372 flags |= seg->present << 15;
7373 flags |= seg->dpl << 13;
7374 flags |= seg->s << 12;
7375 flags |= seg->type << 8;
7379 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7381 struct kvm_segment seg;
7384 kvm_get_segment(vcpu, &seg, n);
7385 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7388 offset = 0x7f84 + n * 12;
7390 offset = 0x7f2c + (n - 3) * 12;
7392 put_smstate(u32, buf, offset + 8, seg.base);
7393 put_smstate(u32, buf, offset + 4, seg.limit);
7394 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7397 #ifdef CONFIG_X86_64
7398 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7400 struct kvm_segment seg;
7404 kvm_get_segment(vcpu, &seg, n);
7405 offset = 0x7e00 + n * 16;
7407 flags = enter_smm_get_segment_flags(&seg) >> 8;
7408 put_smstate(u16, buf, offset, seg.selector);
7409 put_smstate(u16, buf, offset + 2, flags);
7410 put_smstate(u32, buf, offset + 4, seg.limit);
7411 put_smstate(u64, buf, offset + 8, seg.base);
7415 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7418 struct kvm_segment seg;
7422 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7423 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7424 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7425 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7427 for (i = 0; i < 8; i++)
7428 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7430 kvm_get_dr(vcpu, 6, &val);
7431 put_smstate(u32, buf, 0x7fcc, (u32)val);
7432 kvm_get_dr(vcpu, 7, &val);
7433 put_smstate(u32, buf, 0x7fc8, (u32)val);
7435 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7436 put_smstate(u32, buf, 0x7fc4, seg.selector);
7437 put_smstate(u32, buf, 0x7f64, seg.base);
7438 put_smstate(u32, buf, 0x7f60, seg.limit);
7439 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7441 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7442 put_smstate(u32, buf, 0x7fc0, seg.selector);
7443 put_smstate(u32, buf, 0x7f80, seg.base);
7444 put_smstate(u32, buf, 0x7f7c, seg.limit);
7445 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7447 kvm_x86_ops->get_gdt(vcpu, &dt);
7448 put_smstate(u32, buf, 0x7f74, dt.address);
7449 put_smstate(u32, buf, 0x7f70, dt.size);
7451 kvm_x86_ops->get_idt(vcpu, &dt);
7452 put_smstate(u32, buf, 0x7f58, dt.address);
7453 put_smstate(u32, buf, 0x7f54, dt.size);
7455 for (i = 0; i < 6; i++)
7456 enter_smm_save_seg_32(vcpu, buf, i);
7458 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7461 put_smstate(u32, buf, 0x7efc, 0x00020000);
7462 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7465 #ifdef CONFIG_X86_64
7466 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7469 struct kvm_segment seg;
7473 for (i = 0; i < 16; i++)
7474 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7476 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7477 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7479 kvm_get_dr(vcpu, 6, &val);
7480 put_smstate(u64, buf, 0x7f68, val);
7481 kvm_get_dr(vcpu, 7, &val);
7482 put_smstate(u64, buf, 0x7f60, val);
7484 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7485 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7486 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7488 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7491 put_smstate(u32, buf, 0x7efc, 0x00020064);
7493 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7495 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7496 put_smstate(u16, buf, 0x7e90, seg.selector);
7497 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7498 put_smstate(u32, buf, 0x7e94, seg.limit);
7499 put_smstate(u64, buf, 0x7e98, seg.base);
7501 kvm_x86_ops->get_idt(vcpu, &dt);
7502 put_smstate(u32, buf, 0x7e84, dt.size);
7503 put_smstate(u64, buf, 0x7e88, dt.address);
7505 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7506 put_smstate(u16, buf, 0x7e70, seg.selector);
7507 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7508 put_smstate(u32, buf, 0x7e74, seg.limit);
7509 put_smstate(u64, buf, 0x7e78, seg.base);
7511 kvm_x86_ops->get_gdt(vcpu, &dt);
7512 put_smstate(u32, buf, 0x7e64, dt.size);
7513 put_smstate(u64, buf, 0x7e68, dt.address);
7515 for (i = 0; i < 6; i++)
7516 enter_smm_save_seg_64(vcpu, buf, i);
7520 static void enter_smm(struct kvm_vcpu *vcpu)
7522 struct kvm_segment cs, ds;
7527 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7528 memset(buf, 0, 512);
7529 #ifdef CONFIG_X86_64
7530 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7531 enter_smm_save_state_64(vcpu, buf);
7534 enter_smm_save_state_32(vcpu, buf);
7537 * Give pre_enter_smm() a chance to make ISA-specific changes to the
7538 * vCPU state (e.g. leave guest mode) after we've saved the state into
7539 * the SMM state-save area.
7541 kvm_x86_ops->pre_enter_smm(vcpu, buf);
7543 vcpu->arch.hflags |= HF_SMM_MASK;
7544 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7546 if (kvm_x86_ops->get_nmi_mask(vcpu))
7547 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7549 kvm_x86_ops->set_nmi_mask(vcpu, true);
7551 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7552 kvm_rip_write(vcpu, 0x8000);
7554 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7555 kvm_x86_ops->set_cr0(vcpu, cr0);
7556 vcpu->arch.cr0 = cr0;
7558 kvm_x86_ops->set_cr4(vcpu, 0);
7560 /* Undocumented: IDT limit is set to zero on entry to SMM. */
7561 dt.address = dt.size = 0;
7562 kvm_x86_ops->set_idt(vcpu, &dt);
7564 __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7566 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7567 cs.base = vcpu->arch.smbase;
7572 cs.limit = ds.limit = 0xffffffff;
7573 cs.type = ds.type = 0x3;
7574 cs.dpl = ds.dpl = 0;
7579 cs.avl = ds.avl = 0;
7580 cs.present = ds.present = 1;
7581 cs.unusable = ds.unusable = 0;
7582 cs.padding = ds.padding = 0;
7584 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7585 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7586 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7587 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7588 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7589 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7591 #ifdef CONFIG_X86_64
7592 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7593 kvm_x86_ops->set_efer(vcpu, 0);
7596 kvm_update_cpuid(vcpu);
7597 kvm_mmu_reset_context(vcpu);
7600 static void process_smi(struct kvm_vcpu *vcpu)
7602 vcpu->arch.smi_pending = true;
7603 kvm_make_request(KVM_REQ_EVENT, vcpu);
7606 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7608 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7611 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7613 if (!kvm_apic_present(vcpu))
7616 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7618 if (irqchip_split(vcpu->kvm))
7619 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7621 if (vcpu->arch.apicv_active)
7622 kvm_x86_ops->sync_pir_to_irr(vcpu);
7623 if (ioapic_in_kernel(vcpu->kvm))
7624 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7627 if (is_guest_mode(vcpu))
7628 vcpu->arch.load_eoi_exitmap_pending = true;
7630 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7633 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7635 u64 eoi_exit_bitmap[4];
7637 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7640 bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7641 vcpu_to_synic(vcpu)->vec_bitmap, 256);
7642 kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7645 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7646 unsigned long start, unsigned long end,
7649 unsigned long apic_address;
7652 * The physical address of apic access page is stored in the VMCS.
7653 * Update it when it becomes invalid.
7655 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7656 if (start <= apic_address && apic_address < end)
7657 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7662 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7664 struct page *page = NULL;
7666 if (!lapic_in_kernel(vcpu))
7669 if (!kvm_x86_ops->set_apic_access_page_addr)
7672 page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7673 if (is_error_page(page))
7675 kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7678 * Do not pin apic access page in memory, the MMU notifier
7679 * will call us again if it is migrated or swapped out.
7683 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7685 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7687 smp_send_reschedule(vcpu->cpu);
7689 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7692 * Returns 1 to let vcpu_run() continue the guest execution loop without
7693 * exiting to the userspace. Otherwise, the value will be returned to the
7696 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7700 dm_request_for_irq_injection(vcpu) &&
7701 kvm_cpu_accept_dm_intr(vcpu);
7703 bool req_immediate_exit = false;
7705 if (kvm_request_pending(vcpu)) {
7706 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7707 kvm_x86_ops->get_vmcs12_pages(vcpu);
7708 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7709 kvm_mmu_unload(vcpu);
7710 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7711 __kvm_migrate_timers(vcpu);
7712 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7713 kvm_gen_update_masterclock(vcpu->kvm);
7714 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7715 kvm_gen_kvmclock_update(vcpu);
7716 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7717 r = kvm_guest_time_update(vcpu);
7721 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7722 kvm_mmu_sync_roots(vcpu);
7723 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7724 kvm_mmu_load_cr3(vcpu);
7725 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7726 kvm_vcpu_flush_tlb(vcpu, true);
7727 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7728 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7732 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7733 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7734 vcpu->mmio_needed = 0;
7738 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7739 /* Page is swapped out. Do synthetic halt */
7740 vcpu->arch.apf.halted = true;
7744 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7745 record_steal_time(vcpu);
7746 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7748 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7750 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7751 kvm_pmu_handle_event(vcpu);
7752 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7753 kvm_pmu_deliver_pmi(vcpu);
7754 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7755 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7756 if (test_bit(vcpu->arch.pending_ioapic_eoi,
7757 vcpu->arch.ioapic_handled_vectors)) {
7758 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7759 vcpu->run->eoi.vector =
7760 vcpu->arch.pending_ioapic_eoi;
7765 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7766 vcpu_scan_ioapic(vcpu);
7767 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7768 vcpu_load_eoi_exitmap(vcpu);
7769 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7770 kvm_vcpu_reload_apic_access_page(vcpu);
7771 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7772 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7773 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7777 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7778 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7779 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7783 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7784 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7785 vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7791 * KVM_REQ_HV_STIMER has to be processed after
7792 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7793 * depend on the guest clock being up-to-date
7795 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7796 kvm_hv_process_stimers(vcpu);
7799 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7800 ++vcpu->stat.req_event;
7801 kvm_apic_accept_events(vcpu);
7802 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7807 if (inject_pending_event(vcpu, req_int_win) != 0)
7808 req_immediate_exit = true;
7810 /* Enable SMI/NMI/IRQ window open exits if needed.
7812 * SMIs have three cases:
7813 * 1) They can be nested, and then there is nothing to
7814 * do here because RSM will cause a vmexit anyway.
7815 * 2) There is an ISA-specific reason why SMI cannot be
7816 * injected, and the moment when this changes can be
7818 * 3) Or the SMI can be pending because
7819 * inject_pending_event has completed the injection
7820 * of an IRQ or NMI from the previous vmexit, and
7821 * then we request an immediate exit to inject the
7824 if (vcpu->arch.smi_pending && !is_smm(vcpu))
7825 if (!kvm_x86_ops->enable_smi_window(vcpu))
7826 req_immediate_exit = true;
7827 if (vcpu->arch.nmi_pending)
7828 kvm_x86_ops->enable_nmi_window(vcpu);
7829 if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7830 kvm_x86_ops->enable_irq_window(vcpu);
7831 WARN_ON(vcpu->arch.exception.pending);
7834 if (kvm_lapic_enabled(vcpu)) {
7835 update_cr8_intercept(vcpu);
7836 kvm_lapic_sync_to_vapic(vcpu);
7840 r = kvm_mmu_reload(vcpu);
7842 goto cancel_injection;
7847 kvm_x86_ops->prepare_guest_switch(vcpu);
7850 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7851 * IPI are then delayed after guest entry, which ensures that they
7852 * result in virtual interrupt delivery.
7854 local_irq_disable();
7855 vcpu->mode = IN_GUEST_MODE;
7857 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7860 * 1) We should set ->mode before checking ->requests. Please see
7861 * the comment in kvm_vcpu_exiting_guest_mode().
7863 * 2) For APICv, we should set ->mode before checking PID.ON. This
7864 * pairs with the memory barrier implicit in pi_test_and_set_on
7865 * (see vmx_deliver_posted_interrupt).
7867 * 3) This also orders the write to mode from any reads to the page
7868 * tables done while the VCPU is running. Please see the comment
7869 * in kvm_flush_remote_tlbs.
7871 smp_mb__after_srcu_read_unlock();
7874 * This handles the case where a posted interrupt was
7875 * notified with kvm_vcpu_kick.
7877 if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7878 kvm_x86_ops->sync_pir_to_irr(vcpu);
7880 if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7881 || need_resched() || signal_pending(current)) {
7882 vcpu->mode = OUTSIDE_GUEST_MODE;
7886 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7888 goto cancel_injection;
7891 if (req_immediate_exit) {
7892 kvm_make_request(KVM_REQ_EVENT, vcpu);
7893 kvm_x86_ops->request_immediate_exit(vcpu);
7896 trace_kvm_entry(vcpu->vcpu_id);
7897 if (lapic_in_kernel(vcpu) &&
7898 vcpu->arch.apic->lapic_timer.timer_advance_ns)
7899 wait_lapic_expire(vcpu);
7900 guest_enter_irqoff();
7902 fpregs_assert_state_consistent();
7903 if (test_thread_flag(TIF_NEED_FPU_LOAD))
7904 switch_fpu_return();
7906 if (unlikely(vcpu->arch.switch_db_regs)) {
7908 set_debugreg(vcpu->arch.eff_db[0], 0);
7909 set_debugreg(vcpu->arch.eff_db[1], 1);
7910 set_debugreg(vcpu->arch.eff_db[2], 2);
7911 set_debugreg(vcpu->arch.eff_db[3], 3);
7912 set_debugreg(vcpu->arch.dr6, 6);
7913 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7916 kvm_x86_ops->run(vcpu);
7919 * Do this here before restoring debug registers on the host. And
7920 * since we do this before handling the vmexit, a DR access vmexit
7921 * can (a) read the correct value of the debug registers, (b) set
7922 * KVM_DEBUGREG_WONT_EXIT again.
7924 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7925 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7926 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7927 kvm_update_dr0123(vcpu);
7928 kvm_update_dr6(vcpu);
7929 kvm_update_dr7(vcpu);
7930 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7934 * If the guest has used debug registers, at least dr7
7935 * will be disabled while returning to the host.
7936 * If we don't have active breakpoints in the host, we don't
7937 * care about the messed up debug address registers. But if
7938 * we have some of them active, restore the old state.
7940 if (hw_breakpoint_active())
7941 hw_breakpoint_restore();
7943 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7945 vcpu->mode = OUTSIDE_GUEST_MODE;
7948 kvm_before_interrupt(vcpu);
7949 kvm_x86_ops->handle_external_intr(vcpu);
7950 kvm_after_interrupt(vcpu);
7954 guest_exit_irqoff();
7959 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7962 * Profile KVM exit RIPs:
7964 if (unlikely(prof_on == KVM_PROFILING)) {
7965 unsigned long rip = kvm_rip_read(vcpu);
7966 profile_hit(KVM_PROFILING, (void *)rip);
7969 if (unlikely(vcpu->arch.tsc_always_catchup))
7970 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7972 if (vcpu->arch.apic_attention)
7973 kvm_lapic_sync_from_vapic(vcpu);
7975 vcpu->arch.gpa_available = false;
7976 r = kvm_x86_ops->handle_exit(vcpu);
7980 kvm_x86_ops->cancel_injection(vcpu);
7981 if (unlikely(vcpu->arch.apic_attention))
7982 kvm_lapic_sync_from_vapic(vcpu);
7987 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7989 if (!kvm_arch_vcpu_runnable(vcpu) &&
7990 (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7991 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7992 kvm_vcpu_block(vcpu);
7993 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7995 if (kvm_x86_ops->post_block)
7996 kvm_x86_ops->post_block(vcpu);
7998 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8002 kvm_apic_accept_events(vcpu);
8003 switch(vcpu->arch.mp_state) {
8004 case KVM_MP_STATE_HALTED:
8005 vcpu->arch.pv.pv_unhalted = false;
8006 vcpu->arch.mp_state =
8007 KVM_MP_STATE_RUNNABLE;
8009 case KVM_MP_STATE_RUNNABLE:
8010 vcpu->arch.apf.halted = false;
8012 case KVM_MP_STATE_INIT_RECEIVED:
8021 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8023 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8024 kvm_x86_ops->check_nested_events(vcpu, false);
8026 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8027 !vcpu->arch.apf.halted);
8030 static int vcpu_run(struct kvm_vcpu *vcpu)
8033 struct kvm *kvm = vcpu->kvm;
8035 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8036 vcpu->arch.l1tf_flush_l1d = true;
8039 if (kvm_vcpu_running(vcpu)) {
8040 r = vcpu_enter_guest(vcpu);
8042 r = vcpu_block(kvm, vcpu);
8048 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8049 if (kvm_cpu_has_pending_timer(vcpu))
8050 kvm_inject_pending_timer_irqs(vcpu);
8052 if (dm_request_for_irq_injection(vcpu) &&
8053 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8055 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8056 ++vcpu->stat.request_irq_exits;
8060 kvm_check_async_pf_completion(vcpu);
8062 if (signal_pending(current)) {
8064 vcpu->run->exit_reason = KVM_EXIT_INTR;
8065 ++vcpu->stat.signal_exits;
8068 if (need_resched()) {
8069 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8071 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8075 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8080 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8083 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8084 r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8085 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8086 if (r != EMULATE_DONE)
8091 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8093 BUG_ON(!vcpu->arch.pio.count);
8095 return complete_emulated_io(vcpu);
8099 * Implements the following, as a state machine:
8103 * for each mmio piece in the fragment
8111 * for each mmio piece in the fragment
8116 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8118 struct kvm_run *run = vcpu->run;
8119 struct kvm_mmio_fragment *frag;
8122 BUG_ON(!vcpu->mmio_needed);
8124 /* Complete previous fragment */
8125 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8126 len = min(8u, frag->len);
8127 if (!vcpu->mmio_is_write)
8128 memcpy(frag->data, run->mmio.data, len);
8130 if (frag->len <= 8) {
8131 /* Switch to the next fragment. */
8133 vcpu->mmio_cur_fragment++;
8135 /* Go forward to the next mmio piece. */
8141 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8142 vcpu->mmio_needed = 0;
8144 /* FIXME: return into emulator if single-stepping. */
8145 if (vcpu->mmio_is_write)
8147 vcpu->mmio_read_completed = 1;
8148 return complete_emulated_io(vcpu);
8151 run->exit_reason = KVM_EXIT_MMIO;
8152 run->mmio.phys_addr = frag->gpa;
8153 if (vcpu->mmio_is_write)
8154 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8155 run->mmio.len = min(8u, frag->len);
8156 run->mmio.is_write = vcpu->mmio_is_write;
8157 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8161 /* Swap (qemu) user FPU context for the guest FPU context. */
8162 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8166 copy_fpregs_to_fpstate(¤t->thread.fpu);
8167 /* PKRU is separately restored in kvm_x86_ops->run. */
8168 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8169 ~XFEATURE_MASK_PKRU);
8171 fpregs_mark_activate();
8177 /* When vcpu_run ends, restore user space FPU context. */
8178 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8182 copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8183 copy_kernel_to_fpregs(¤t->thread.fpu.state);
8185 fpregs_mark_activate();
8188 ++vcpu->stat.fpu_reload;
8192 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8197 kvm_sigset_activate(vcpu);
8198 kvm_load_guest_fpu(vcpu);
8200 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8201 if (kvm_run->immediate_exit) {
8205 kvm_vcpu_block(vcpu);
8206 kvm_apic_accept_events(vcpu);
8207 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8209 if (signal_pending(current)) {
8211 vcpu->run->exit_reason = KVM_EXIT_INTR;
8212 ++vcpu->stat.signal_exits;
8217 if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8222 if (vcpu->run->kvm_dirty_regs) {
8223 r = sync_regs(vcpu);
8228 /* re-sync apic's tpr */
8229 if (!lapic_in_kernel(vcpu)) {
8230 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8236 if (unlikely(vcpu->arch.complete_userspace_io)) {
8237 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8238 vcpu->arch.complete_userspace_io = NULL;
8243 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8245 if (kvm_run->immediate_exit)
8251 kvm_put_guest_fpu(vcpu);
8252 if (vcpu->run->kvm_valid_regs)
8254 post_kvm_run_save(vcpu);
8255 kvm_sigset_deactivate(vcpu);
8261 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8263 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8265 * We are here if userspace calls get_regs() in the middle of
8266 * instruction emulation. Registers state needs to be copied
8267 * back from emulation context to vcpu. Userspace shouldn't do
8268 * that usually, but some bad designed PV devices (vmware
8269 * backdoor interface) need this to work
8271 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8272 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8274 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
8275 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
8276 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
8277 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
8278 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
8279 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
8280 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
8281 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
8282 #ifdef CONFIG_X86_64
8283 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
8284 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
8285 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
8286 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
8287 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
8288 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
8289 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
8290 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
8293 regs->rip = kvm_rip_read(vcpu);
8294 regs->rflags = kvm_get_rflags(vcpu);
8297 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8300 __get_regs(vcpu, regs);
8305 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8307 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8308 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8310 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
8311 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
8312 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
8313 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
8314 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
8315 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
8316 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
8317 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
8318 #ifdef CONFIG_X86_64
8319 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
8320 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
8321 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
8322 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
8323 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
8324 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
8325 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
8326 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
8329 kvm_rip_write(vcpu, regs->rip);
8330 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8332 vcpu->arch.exception.pending = false;
8334 kvm_make_request(KVM_REQ_EVENT, vcpu);
8337 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8340 __set_regs(vcpu, regs);
8345 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8347 struct kvm_segment cs;
8349 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8353 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8355 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8359 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8360 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8361 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8362 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8363 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8364 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8366 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8367 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8369 kvm_x86_ops->get_idt(vcpu, &dt);
8370 sregs->idt.limit = dt.size;
8371 sregs->idt.base = dt.address;
8372 kvm_x86_ops->get_gdt(vcpu, &dt);
8373 sregs->gdt.limit = dt.size;
8374 sregs->gdt.base = dt.address;
8376 sregs->cr0 = kvm_read_cr0(vcpu);
8377 sregs->cr2 = vcpu->arch.cr2;
8378 sregs->cr3 = kvm_read_cr3(vcpu);
8379 sregs->cr4 = kvm_read_cr4(vcpu);
8380 sregs->cr8 = kvm_get_cr8(vcpu);
8381 sregs->efer = vcpu->arch.efer;
8382 sregs->apic_base = kvm_get_apic_base(vcpu);
8384 memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8386 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8387 set_bit(vcpu->arch.interrupt.nr,
8388 (unsigned long *)sregs->interrupt_bitmap);
8391 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8392 struct kvm_sregs *sregs)
8395 __get_sregs(vcpu, sregs);
8400 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8401 struct kvm_mp_state *mp_state)
8405 kvm_apic_accept_events(vcpu);
8406 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8407 vcpu->arch.pv.pv_unhalted)
8408 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8410 mp_state->mp_state = vcpu->arch.mp_state;
8416 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8417 struct kvm_mp_state *mp_state)
8423 if (!lapic_in_kernel(vcpu) &&
8424 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8427 /* INITs are latched while in SMM */
8428 if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8429 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8430 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8433 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8434 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8435 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8437 vcpu->arch.mp_state = mp_state->mp_state;
8438 kvm_make_request(KVM_REQ_EVENT, vcpu);
8446 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8447 int reason, bool has_error_code, u32 error_code)
8449 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8452 init_emulate_ctxt(vcpu);
8454 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8455 has_error_code, error_code);
8458 return EMULATE_FAIL;
8460 kvm_rip_write(vcpu, ctxt->eip);
8461 kvm_set_rflags(vcpu, ctxt->eflags);
8462 kvm_make_request(KVM_REQ_EVENT, vcpu);
8463 return EMULATE_DONE;
8465 EXPORT_SYMBOL_GPL(kvm_task_switch);
8467 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8469 if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8470 (sregs->cr4 & X86_CR4_OSXSAVE))
8473 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8475 * When EFER.LME and CR0.PG are set, the processor is in
8476 * 64-bit mode (though maybe in a 32-bit code segment).
8477 * CR4.PAE and EFER.LMA must be set.
8479 if (!(sregs->cr4 & X86_CR4_PAE)
8480 || !(sregs->efer & EFER_LMA))
8484 * Not in 64-bit mode: EFER.LMA is clear and the code
8485 * segment cannot be 64-bit.
8487 if (sregs->efer & EFER_LMA || sregs->cs.l)
8494 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8496 struct msr_data apic_base_msr;
8497 int mmu_reset_needed = 0;
8498 int cpuid_update_needed = 0;
8499 int pending_vec, max_bits, idx;
8503 if (kvm_valid_sregs(vcpu, sregs))
8506 apic_base_msr.data = sregs->apic_base;
8507 apic_base_msr.host_initiated = true;
8508 if (kvm_set_apic_base(vcpu, &apic_base_msr))
8511 dt.size = sregs->idt.limit;
8512 dt.address = sregs->idt.base;
8513 kvm_x86_ops->set_idt(vcpu, &dt);
8514 dt.size = sregs->gdt.limit;
8515 dt.address = sregs->gdt.base;
8516 kvm_x86_ops->set_gdt(vcpu, &dt);
8518 vcpu->arch.cr2 = sregs->cr2;
8519 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8520 vcpu->arch.cr3 = sregs->cr3;
8521 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8523 kvm_set_cr8(vcpu, sregs->cr8);
8525 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8526 kvm_x86_ops->set_efer(vcpu, sregs->efer);
8528 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8529 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8530 vcpu->arch.cr0 = sregs->cr0;
8532 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8533 cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8534 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8535 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8536 if (cpuid_update_needed)
8537 kvm_update_cpuid(vcpu);
8539 idx = srcu_read_lock(&vcpu->kvm->srcu);
8540 if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu)) {
8541 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8542 mmu_reset_needed = 1;
8544 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8546 if (mmu_reset_needed)
8547 kvm_mmu_reset_context(vcpu);
8549 max_bits = KVM_NR_INTERRUPTS;
8550 pending_vec = find_first_bit(
8551 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8552 if (pending_vec < max_bits) {
8553 kvm_queue_interrupt(vcpu, pending_vec, false);
8554 pr_debug("Set back pending irq %d\n", pending_vec);
8557 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8558 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8559 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8560 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8561 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8562 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8564 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8565 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8567 update_cr8_intercept(vcpu);
8569 /* Older userspace won't unhalt the vcpu on reset. */
8570 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8571 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8573 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8575 kvm_make_request(KVM_REQ_EVENT, vcpu);
8582 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8583 struct kvm_sregs *sregs)
8588 ret = __set_sregs(vcpu, sregs);
8593 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8594 struct kvm_guest_debug *dbg)
8596 unsigned long rflags;
8601 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8603 if (vcpu->arch.exception.pending)
8605 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8606 kvm_queue_exception(vcpu, DB_VECTOR);
8608 kvm_queue_exception(vcpu, BP_VECTOR);
8612 * Read rflags as long as potentially injected trace flags are still
8615 rflags = kvm_get_rflags(vcpu);
8617 vcpu->guest_debug = dbg->control;
8618 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8619 vcpu->guest_debug = 0;
8621 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8622 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8623 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8624 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8626 for (i = 0; i < KVM_NR_DB_REGS; i++)
8627 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8629 kvm_update_dr7(vcpu);
8631 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8632 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8633 get_segment_base(vcpu, VCPU_SREG_CS);
8636 * Trigger an rflags update that will inject or remove the trace
8639 kvm_set_rflags(vcpu, rflags);
8641 kvm_x86_ops->update_bp_intercept(vcpu);
8651 * Translate a guest virtual address to a guest physical address.
8653 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8654 struct kvm_translation *tr)
8656 unsigned long vaddr = tr->linear_address;
8662 idx = srcu_read_lock(&vcpu->kvm->srcu);
8663 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8664 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8665 tr->physical_address = gpa;
8666 tr->valid = gpa != UNMAPPED_GVA;
8674 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8676 struct fxregs_state *fxsave;
8680 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8681 memcpy(fpu->fpr, fxsave->st_space, 128);
8682 fpu->fcw = fxsave->cwd;
8683 fpu->fsw = fxsave->swd;
8684 fpu->ftwx = fxsave->twd;
8685 fpu->last_opcode = fxsave->fop;
8686 fpu->last_ip = fxsave->rip;
8687 fpu->last_dp = fxsave->rdp;
8688 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8694 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8696 struct fxregs_state *fxsave;
8700 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8702 memcpy(fxsave->st_space, fpu->fpr, 128);
8703 fxsave->cwd = fpu->fcw;
8704 fxsave->swd = fpu->fsw;
8705 fxsave->twd = fpu->ftwx;
8706 fxsave->fop = fpu->last_opcode;
8707 fxsave->rip = fpu->last_ip;
8708 fxsave->rdp = fpu->last_dp;
8709 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8715 static void store_regs(struct kvm_vcpu *vcpu)
8717 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8719 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8720 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8722 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8723 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8725 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8726 kvm_vcpu_ioctl_x86_get_vcpu_events(
8727 vcpu, &vcpu->run->s.regs.events);
8730 static int sync_regs(struct kvm_vcpu *vcpu)
8732 if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8735 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8736 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8737 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8739 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8740 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8742 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8744 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8745 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8746 vcpu, &vcpu->run->s.regs.events))
8748 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8754 static void fx_init(struct kvm_vcpu *vcpu)
8756 fpstate_init(&vcpu->arch.guest_fpu->state);
8757 if (boot_cpu_has(X86_FEATURE_XSAVES))
8758 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
8759 host_xcr0 | XSTATE_COMPACTION_ENABLED;
8762 * Ensure guest xcr0 is valid for loading
8764 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8766 vcpu->arch.cr0 |= X86_CR0_ET;
8769 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8771 void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8773 kvmclock_reset(vcpu);
8775 kvm_x86_ops->vcpu_free(vcpu);
8776 free_cpumask_var(wbinvd_dirty_mask);
8779 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8782 struct kvm_vcpu *vcpu;
8784 if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8785 printk_once(KERN_WARNING
8786 "kvm: SMP vm created on host with unstable TSC; "
8787 "guest TSC will not be reliable\n");
8789 vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8794 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8796 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
8797 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8798 kvm_vcpu_mtrr_init(vcpu);
8800 kvm_vcpu_reset(vcpu, false);
8801 kvm_init_mmu(vcpu, false);
8806 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8808 struct msr_data msr;
8809 struct kvm *kvm = vcpu->kvm;
8811 kvm_hv_vcpu_postcreate(vcpu);
8813 if (mutex_lock_killable(&vcpu->mutex))
8817 msr.index = MSR_IA32_TSC;
8818 msr.host_initiated = true;
8819 kvm_write_tsc(vcpu, &msr);
8821 mutex_unlock(&vcpu->mutex);
8823 if (!kvmclock_periodic_sync)
8826 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8827 KVMCLOCK_SYNC_PERIOD);
8830 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8832 vcpu->arch.apf.msr_val = 0;
8835 kvm_mmu_unload(vcpu);
8838 kvm_x86_ops->vcpu_free(vcpu);
8841 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8843 kvm_lapic_reset(vcpu, init_event);
8845 vcpu->arch.hflags = 0;
8847 vcpu->arch.smi_pending = 0;
8848 vcpu->arch.smi_count = 0;
8849 atomic_set(&vcpu->arch.nmi_queued, 0);
8850 vcpu->arch.nmi_pending = 0;
8851 vcpu->arch.nmi_injected = false;
8852 kvm_clear_interrupt_queue(vcpu);
8853 kvm_clear_exception_queue(vcpu);
8854 vcpu->arch.exception.pending = false;
8856 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8857 kvm_update_dr0123(vcpu);
8858 vcpu->arch.dr6 = DR6_INIT;
8859 kvm_update_dr6(vcpu);
8860 vcpu->arch.dr7 = DR7_FIXED_1;
8861 kvm_update_dr7(vcpu);
8865 kvm_make_request(KVM_REQ_EVENT, vcpu);
8866 vcpu->arch.apf.msr_val = 0;
8867 vcpu->arch.st.msr_val = 0;
8869 kvmclock_reset(vcpu);
8871 kvm_clear_async_pf_completion_queue(vcpu);
8872 kvm_async_pf_hash_reset(vcpu);
8873 vcpu->arch.apf.halted = false;
8875 if (kvm_mpx_supported()) {
8876 void *mpx_state_buffer;
8879 * To avoid have the INIT path from kvm_apic_has_events() that be
8880 * called with loaded FPU and does not let userspace fix the state.
8883 kvm_put_guest_fpu(vcpu);
8884 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
8886 if (mpx_state_buffer)
8887 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8888 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
8890 if (mpx_state_buffer)
8891 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8893 kvm_load_guest_fpu(vcpu);
8897 kvm_pmu_reset(vcpu);
8898 vcpu->arch.smbase = 0x30000;
8900 vcpu->arch.msr_misc_features_enables = 0;
8902 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8905 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8906 vcpu->arch.regs_avail = ~0;
8907 vcpu->arch.regs_dirty = ~0;
8909 vcpu->arch.ia32_xss = 0;
8911 kvm_x86_ops->vcpu_reset(vcpu, init_event);
8914 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8916 struct kvm_segment cs;
8918 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8919 cs.selector = vector << 8;
8920 cs.base = vector << 12;
8921 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8922 kvm_rip_write(vcpu, 0);
8925 int kvm_arch_hardware_enable(void)
8928 struct kvm_vcpu *vcpu;
8933 bool stable, backwards_tsc = false;
8935 kvm_shared_msr_cpu_online();
8936 ret = kvm_x86_ops->hardware_enable();
8940 local_tsc = rdtsc();
8941 stable = !kvm_check_tsc_unstable();
8942 list_for_each_entry(kvm, &vm_list, vm_list) {
8943 kvm_for_each_vcpu(i, vcpu, kvm) {
8944 if (!stable && vcpu->cpu == smp_processor_id())
8945 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8946 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8947 backwards_tsc = true;
8948 if (vcpu->arch.last_host_tsc > max_tsc)
8949 max_tsc = vcpu->arch.last_host_tsc;
8955 * Sometimes, even reliable TSCs go backwards. This happens on
8956 * platforms that reset TSC during suspend or hibernate actions, but
8957 * maintain synchronization. We must compensate. Fortunately, we can
8958 * detect that condition here, which happens early in CPU bringup,
8959 * before any KVM threads can be running. Unfortunately, we can't
8960 * bring the TSCs fully up to date with real time, as we aren't yet far
8961 * enough into CPU bringup that we know how much real time has actually
8962 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8963 * variables that haven't been updated yet.
8965 * So we simply find the maximum observed TSC above, then record the
8966 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8967 * the adjustment will be applied. Note that we accumulate
8968 * adjustments, in case multiple suspend cycles happen before some VCPU
8969 * gets a chance to run again. In the event that no KVM threads get a
8970 * chance to run, we will miss the entire elapsed period, as we'll have
8971 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8972 * loose cycle time. This isn't too big a deal, since the loss will be
8973 * uniform across all VCPUs (not to mention the scenario is extremely
8974 * unlikely). It is possible that a second hibernate recovery happens
8975 * much faster than a first, causing the observed TSC here to be
8976 * smaller; this would require additional padding adjustment, which is
8977 * why we set last_host_tsc to the local tsc observed here.
8979 * N.B. - this code below runs only on platforms with reliable TSC,
8980 * as that is the only way backwards_tsc is set above. Also note
8981 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8982 * have the same delta_cyc adjustment applied if backwards_tsc
8983 * is detected. Note further, this adjustment is only done once,
8984 * as we reset last_host_tsc on all VCPUs to stop this from being
8985 * called multiple times (one for each physical CPU bringup).
8987 * Platforms with unreliable TSCs don't have to deal with this, they
8988 * will be compensated by the logic in vcpu_load, which sets the TSC to
8989 * catchup mode. This will catchup all VCPUs to real time, but cannot
8990 * guarantee that they stay in perfect synchronization.
8992 if (backwards_tsc) {
8993 u64 delta_cyc = max_tsc - local_tsc;
8994 list_for_each_entry(kvm, &vm_list, vm_list) {
8995 kvm->arch.backwards_tsc_observed = true;
8996 kvm_for_each_vcpu(i, vcpu, kvm) {
8997 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8998 vcpu->arch.last_host_tsc = local_tsc;
8999 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9003 * We have to disable TSC offset matching.. if you were
9004 * booting a VM while issuing an S4 host suspend....
9005 * you may have some problem. Solving this issue is
9006 * left as an exercise to the reader.
9008 kvm->arch.last_tsc_nsec = 0;
9009 kvm->arch.last_tsc_write = 0;
9016 void kvm_arch_hardware_disable(void)
9018 kvm_x86_ops->hardware_disable();
9019 drop_user_return_notifiers();
9022 int kvm_arch_hardware_setup(void)
9026 r = kvm_x86_ops->hardware_setup();
9030 if (kvm_has_tsc_control) {
9032 * Make sure the user can only configure tsc_khz values that
9033 * fit into a signed integer.
9034 * A min value is not calculated because it will always
9035 * be 1 on all machines.
9037 u64 max = min(0x7fffffffULL,
9038 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9039 kvm_max_guest_tsc_khz = max;
9041 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9044 kvm_init_msr_list();
9048 void kvm_arch_hardware_unsetup(void)
9050 kvm_x86_ops->hardware_unsetup();
9053 void kvm_arch_check_processor_compat(void *rtn)
9055 kvm_x86_ops->check_processor_compatibility(rtn);
9058 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9060 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9062 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9064 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9066 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9069 struct static_key kvm_no_apic_vcpu __read_mostly;
9070 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9072 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9077 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9078 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9079 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9081 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9083 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9088 vcpu->arch.pio_data = page_address(page);
9090 kvm_set_tsc_khz(vcpu, max_tsc_khz);
9092 r = kvm_mmu_create(vcpu);
9094 goto fail_free_pio_data;
9096 if (irqchip_in_kernel(vcpu->kvm)) {
9097 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9098 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9100 goto fail_mmu_destroy;
9102 static_key_slow_inc(&kvm_no_apic_vcpu);
9104 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9105 GFP_KERNEL_ACCOUNT);
9106 if (!vcpu->arch.mce_banks) {
9108 goto fail_free_lapic;
9110 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9112 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9113 GFP_KERNEL_ACCOUNT)) {
9115 goto fail_free_mce_banks;
9120 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9122 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9124 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9126 kvm_async_pf_hash_reset(vcpu);
9129 vcpu->arch.pending_external_vector = -1;
9130 vcpu->arch.preempted_in_kernel = false;
9132 kvm_hv_vcpu_init(vcpu);
9136 fail_free_mce_banks:
9137 kfree(vcpu->arch.mce_banks);
9139 kvm_free_lapic(vcpu);
9141 kvm_mmu_destroy(vcpu);
9143 free_page((unsigned long)vcpu->arch.pio_data);
9148 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9152 kvm_hv_vcpu_uninit(vcpu);
9153 kvm_pmu_destroy(vcpu);
9154 kfree(vcpu->arch.mce_banks);
9155 kvm_free_lapic(vcpu);
9156 idx = srcu_read_lock(&vcpu->kvm->srcu);
9157 kvm_mmu_destroy(vcpu);
9158 srcu_read_unlock(&vcpu->kvm->srcu, idx);
9159 free_page((unsigned long)vcpu->arch.pio_data);
9160 if (!lapic_in_kernel(vcpu))
9161 static_key_slow_dec(&kvm_no_apic_vcpu);
9164 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9166 vcpu->arch.l1tf_flush_l1d = true;
9167 kvm_x86_ops->sched_in(vcpu, cpu);
9170 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9175 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9176 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9177 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9178 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9180 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9181 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9182 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9183 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9184 &kvm->arch.irq_sources_bitmap);
9186 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9187 mutex_init(&kvm->arch.apic_map_lock);
9188 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9190 kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
9191 pvclock_update_vm_gtod_copy(kvm);
9193 kvm->arch.guest_can_read_msr_platform_info = true;
9195 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9196 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9198 kvm_hv_init_vm(kvm);
9199 kvm_page_track_init(kvm);
9200 kvm_mmu_init_vm(kvm);
9202 if (kvm_x86_ops->vm_init)
9203 return kvm_x86_ops->vm_init(kvm);
9208 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9211 kvm_mmu_unload(vcpu);
9215 static void kvm_free_vcpus(struct kvm *kvm)
9218 struct kvm_vcpu *vcpu;
9221 * Unpin any mmu pages first.
9223 kvm_for_each_vcpu(i, vcpu, kvm) {
9224 kvm_clear_async_pf_completion_queue(vcpu);
9225 kvm_unload_vcpu_mmu(vcpu);
9227 kvm_for_each_vcpu(i, vcpu, kvm)
9228 kvm_arch_vcpu_free(vcpu);
9230 mutex_lock(&kvm->lock);
9231 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9232 kvm->vcpus[i] = NULL;
9234 atomic_set(&kvm->online_vcpus, 0);
9235 mutex_unlock(&kvm->lock);
9238 void kvm_arch_sync_events(struct kvm *kvm)
9240 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9241 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9245 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9249 struct kvm_memslots *slots = kvm_memslots(kvm);
9250 struct kvm_memory_slot *slot, old;
9252 /* Called with kvm->slots_lock held. */
9253 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9256 slot = id_to_memslot(slots, id);
9262 * MAP_SHARED to prevent internal slot pages from being moved
9265 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9266 MAP_SHARED | MAP_ANONYMOUS, 0);
9267 if (IS_ERR((void *)hva))
9268 return PTR_ERR((void *)hva);
9277 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9278 struct kvm_userspace_memory_region m;
9280 m.slot = id | (i << 16);
9282 m.guest_phys_addr = gpa;
9283 m.userspace_addr = hva;
9284 m.memory_size = size;
9285 r = __kvm_set_memory_region(kvm, &m);
9291 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9295 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9297 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9301 mutex_lock(&kvm->slots_lock);
9302 r = __x86_set_memory_region(kvm, id, gpa, size);
9303 mutex_unlock(&kvm->slots_lock);
9307 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9309 void kvm_arch_destroy_vm(struct kvm *kvm)
9311 if (current->mm == kvm->mm) {
9313 * Free memory regions allocated on behalf of userspace,
9314 * unless the the memory map has changed due to process exit
9317 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9318 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9319 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9321 if (kvm_x86_ops->vm_destroy)
9322 kvm_x86_ops->vm_destroy(kvm);
9323 kvm_pic_destroy(kvm);
9324 kvm_ioapic_destroy(kvm);
9325 kvm_free_vcpus(kvm);
9326 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9327 kvm_mmu_uninit_vm(kvm);
9328 kvm_page_track_cleanup(kvm);
9329 kvm_hv_destroy_vm(kvm);
9332 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9333 struct kvm_memory_slot *dont)
9337 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9338 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9339 kvfree(free->arch.rmap[i]);
9340 free->arch.rmap[i] = NULL;
9345 if (!dont || free->arch.lpage_info[i - 1] !=
9346 dont->arch.lpage_info[i - 1]) {
9347 kvfree(free->arch.lpage_info[i - 1]);
9348 free->arch.lpage_info[i - 1] = NULL;
9352 kvm_page_track_free_memslot(free, dont);
9355 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9356 unsigned long npages)
9360 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9361 struct kvm_lpage_info *linfo;
9366 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9367 slot->base_gfn, level) + 1;
9369 slot->arch.rmap[i] =
9370 kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9371 GFP_KERNEL_ACCOUNT);
9372 if (!slot->arch.rmap[i])
9377 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9381 slot->arch.lpage_info[i - 1] = linfo;
9383 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9384 linfo[0].disallow_lpage = 1;
9385 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9386 linfo[lpages - 1].disallow_lpage = 1;
9387 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9389 * If the gfn and userspace address are not aligned wrt each
9390 * other, or if explicitly asked to, disable large page
9391 * support for this slot
9393 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9394 !kvm_largepages_enabled()) {
9397 for (j = 0; j < lpages; ++j)
9398 linfo[j].disallow_lpage = 1;
9402 if (kvm_page_track_create_memslot(slot, npages))
9408 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9409 kvfree(slot->arch.rmap[i]);
9410 slot->arch.rmap[i] = NULL;
9414 kvfree(slot->arch.lpage_info[i - 1]);
9415 slot->arch.lpage_info[i - 1] = NULL;
9420 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9423 * memslots->generation has been incremented.
9424 * mmio generation may have reached its maximum value.
9426 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9429 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9430 struct kvm_memory_slot *memslot,
9431 const struct kvm_userspace_memory_region *mem,
9432 enum kvm_mr_change change)
9437 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9438 struct kvm_memory_slot *new)
9440 /* Still write protect RO slot */
9441 if (new->flags & KVM_MEM_READONLY) {
9442 kvm_mmu_slot_remove_write_access(kvm, new);
9447 * Call kvm_x86_ops dirty logging hooks when they are valid.
9449 * kvm_x86_ops->slot_disable_log_dirty is called when:
9451 * - KVM_MR_CREATE with dirty logging is disabled
9452 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9454 * The reason is, in case of PML, we need to set D-bit for any slots
9455 * with dirty logging disabled in order to eliminate unnecessary GPA
9456 * logging in PML buffer (and potential PML buffer full VMEXT). This
9457 * guarantees leaving PML enabled during guest's lifetime won't have
9458 * any additional overhead from PML when guest is running with dirty
9459 * logging disabled for memory slots.
9461 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9462 * to dirty logging mode.
9464 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9466 * In case of write protect:
9468 * Write protect all pages for dirty logging.
9470 * All the sptes including the large sptes which point to this
9471 * slot are set to readonly. We can not create any new large
9472 * spte on this slot until the end of the logging.
9474 * See the comments in fast_page_fault().
9476 if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9477 if (kvm_x86_ops->slot_enable_log_dirty)
9478 kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9480 kvm_mmu_slot_remove_write_access(kvm, new);
9482 if (kvm_x86_ops->slot_disable_log_dirty)
9483 kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9487 void kvm_arch_commit_memory_region(struct kvm *kvm,
9488 const struct kvm_userspace_memory_region *mem,
9489 const struct kvm_memory_slot *old,
9490 const struct kvm_memory_slot *new,
9491 enum kvm_mr_change change)
9493 if (!kvm->arch.n_requested_mmu_pages)
9494 kvm_mmu_change_mmu_pages(kvm,
9495 kvm_mmu_calculate_default_mmu_pages(kvm));
9498 * Dirty logging tracks sptes in 4k granularity, meaning that large
9499 * sptes have to be split. If live migration is successful, the guest
9500 * in the source machine will be destroyed and large sptes will be
9501 * created in the destination. However, if the guest continues to run
9502 * in the source machine (for example if live migration fails), small
9503 * sptes will remain around and cause bad performance.
9505 * Scan sptes if dirty logging has been stopped, dropping those
9506 * which can be collapsed into a single large-page spte. Later
9507 * page faults will create the large-page sptes.
9509 if ((change != KVM_MR_DELETE) &&
9510 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9511 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9512 kvm_mmu_zap_collapsible_sptes(kvm, new);
9515 * Set up write protection and/or dirty logging for the new slot.
9517 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9518 * been zapped so no dirty logging staff is needed for old slot. For
9519 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9520 * new and it's also covered when dealing with the new slot.
9522 * FIXME: const-ify all uses of struct kvm_memory_slot.
9524 if (change != KVM_MR_DELETE)
9525 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9528 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9530 kvm_mmu_zap_all(kvm);
9533 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9534 struct kvm_memory_slot *slot)
9536 kvm_page_track_flush_slot(kvm, slot);
9539 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9541 return (is_guest_mode(vcpu) &&
9542 kvm_x86_ops->guest_apic_has_interrupt &&
9543 kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9546 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9548 if (!list_empty_careful(&vcpu->async_pf.done))
9551 if (kvm_apic_has_events(vcpu))
9554 if (vcpu->arch.pv.pv_unhalted)
9557 if (vcpu->arch.exception.pending)
9560 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9561 (vcpu->arch.nmi_pending &&
9562 kvm_x86_ops->nmi_allowed(vcpu)))
9565 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9566 (vcpu->arch.smi_pending && !is_smm(vcpu)))
9569 if (kvm_arch_interrupt_allowed(vcpu) &&
9570 (kvm_cpu_has_interrupt(vcpu) ||
9571 kvm_guest_apic_has_interrupt(vcpu)))
9574 if (kvm_hv_has_stimer_pending(vcpu))
9580 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9582 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9585 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9587 return vcpu->arch.preempted_in_kernel;
9590 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9592 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9595 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9597 return kvm_x86_ops->interrupt_allowed(vcpu);
9600 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9602 if (is_64_bit_mode(vcpu))
9603 return kvm_rip_read(vcpu);
9604 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9605 kvm_rip_read(vcpu));
9607 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9609 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9611 return kvm_get_linear_rip(vcpu) == linear_rip;
9613 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9615 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9617 unsigned long rflags;
9619 rflags = kvm_x86_ops->get_rflags(vcpu);
9620 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9621 rflags &= ~X86_EFLAGS_TF;
9624 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9626 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9628 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9629 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9630 rflags |= X86_EFLAGS_TF;
9631 kvm_x86_ops->set_rflags(vcpu, rflags);
9634 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9636 __kvm_set_rflags(vcpu, rflags);
9637 kvm_make_request(KVM_REQ_EVENT, vcpu);
9639 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9641 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9645 if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9649 r = kvm_mmu_reload(vcpu);
9653 if (!vcpu->arch.mmu->direct_map &&
9654 work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9657 vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9660 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9662 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9665 static inline u32 kvm_async_pf_next_probe(u32 key)
9667 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9670 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9672 u32 key = kvm_async_pf_hash_fn(gfn);
9674 while (vcpu->arch.apf.gfns[key] != ~0)
9675 key = kvm_async_pf_next_probe(key);
9677 vcpu->arch.apf.gfns[key] = gfn;
9680 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9683 u32 key = kvm_async_pf_hash_fn(gfn);
9685 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9686 (vcpu->arch.apf.gfns[key] != gfn &&
9687 vcpu->arch.apf.gfns[key] != ~0); i++)
9688 key = kvm_async_pf_next_probe(key);
9693 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9695 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9698 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9702 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9704 vcpu->arch.apf.gfns[i] = ~0;
9706 j = kvm_async_pf_next_probe(j);
9707 if (vcpu->arch.apf.gfns[j] == ~0)
9709 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9711 * k lies cyclically in ]i,j]
9713 * |....j i.k.| or |.k..j i...|
9715 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9716 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9721 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9724 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9728 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9731 return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9735 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9736 struct kvm_async_pf *work)
9738 struct x86_exception fault;
9740 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9741 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9743 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9744 (vcpu->arch.apf.send_user_only &&
9745 kvm_x86_ops->get_cpl(vcpu) == 0))
9746 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9747 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9748 fault.vector = PF_VECTOR;
9749 fault.error_code_valid = true;
9750 fault.error_code = 0;
9751 fault.nested_page_fault = false;
9752 fault.address = work->arch.token;
9753 fault.async_page_fault = true;
9754 kvm_inject_page_fault(vcpu, &fault);
9758 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9759 struct kvm_async_pf *work)
9761 struct x86_exception fault;
9764 if (work->wakeup_all)
9765 work->arch.token = ~0; /* broadcast wakeup */
9767 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9768 trace_kvm_async_pf_ready(work->arch.token, work->gva);
9770 if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9771 !apf_get_user(vcpu, &val)) {
9772 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9773 vcpu->arch.exception.pending &&
9774 vcpu->arch.exception.nr == PF_VECTOR &&
9775 !apf_put_user(vcpu, 0)) {
9776 vcpu->arch.exception.injected = false;
9777 vcpu->arch.exception.pending = false;
9778 vcpu->arch.exception.nr = 0;
9779 vcpu->arch.exception.has_error_code = false;
9780 vcpu->arch.exception.error_code = 0;
9781 vcpu->arch.exception.has_payload = false;
9782 vcpu->arch.exception.payload = 0;
9783 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9784 fault.vector = PF_VECTOR;
9785 fault.error_code_valid = true;
9786 fault.error_code = 0;
9787 fault.nested_page_fault = false;
9788 fault.address = work->arch.token;
9789 fault.async_page_fault = true;
9790 kvm_inject_page_fault(vcpu, &fault);
9793 vcpu->arch.apf.halted = false;
9794 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9797 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9799 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9802 return kvm_can_do_async_pf(vcpu);
9805 void kvm_arch_start_assignment(struct kvm *kvm)
9807 atomic_inc(&kvm->arch.assigned_device_count);
9809 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9811 void kvm_arch_end_assignment(struct kvm *kvm)
9813 atomic_dec(&kvm->arch.assigned_device_count);
9815 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9817 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9819 return atomic_read(&kvm->arch.assigned_device_count);
9821 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9823 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9825 atomic_inc(&kvm->arch.noncoherent_dma_count);
9827 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9829 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9831 atomic_dec(&kvm->arch.noncoherent_dma_count);
9833 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9835 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9837 return atomic_read(&kvm->arch.noncoherent_dma_count);
9839 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9841 bool kvm_arch_has_irq_bypass(void)
9843 return kvm_x86_ops->update_pi_irte != NULL;
9846 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9847 struct irq_bypass_producer *prod)
9849 struct kvm_kernel_irqfd *irqfd =
9850 container_of(cons, struct kvm_kernel_irqfd, consumer);
9852 irqfd->producer = prod;
9854 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9855 prod->irq, irqfd->gsi, 1);
9858 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9859 struct irq_bypass_producer *prod)
9862 struct kvm_kernel_irqfd *irqfd =
9863 container_of(cons, struct kvm_kernel_irqfd, consumer);
9865 WARN_ON(irqfd->producer != prod);
9866 irqfd->producer = NULL;
9869 * When producer of consumer is unregistered, we change back to
9870 * remapped mode, so we can re-use the current implementation
9871 * when the irq is masked/disabled or the consumer side (KVM
9872 * int this case doesn't want to receive the interrupts.
9874 ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9876 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9877 " fails: %d\n", irqfd->consumer.token, ret);
9880 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9881 uint32_t guest_irq, bool set)
9883 if (!kvm_x86_ops->update_pi_irte)
9886 return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9889 bool kvm_vector_hashing_enabled(void)
9891 return vector_hashing;
9893 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9895 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9896 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9897 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9898 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9899 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9900 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9901 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9902 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9903 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9904 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9905 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9906 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9907 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9908 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9909 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9910 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9911 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9912 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9913 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);